Altera SerialLite II Protocol User Manual

101 Innovation Drive San Jose, CA 95134 (408) 544-7000 www.altera.com
SerialLite II Protocol
Reference Manual
Document Version: 1.0
Document Date: October 2005
MNL-SLITE2-1.0
ii Altera Corporation SerialLite II Protocol Reference Manual Preliminary

Table of Contents

About This Manual ................................................................................. v
Revision History ........................................................................................................................................ v
How to Contact Altera .............................................................................................................................. v
Typographic Conventions ........................................................................................................................ v
Glossary ..................................................................................................................................................... vi
SerialLite II Specification ......................................................................... 9
Introduction ............................................................................................................................................ 2–9
Protocol Features .............................................................................................................................. 2–9
Typical Applications ........................................................................................................................ 2–9
Architectural Overview ...................................................................................................................... 2–10
Physical Layer ................................................................................................................................. 2–11
Data Link Layer .............................................................................................................................. 2–12
Physical Layer Description ................................................................................................................. 2–12
Signal Definitions ........................................................................................................................... 2–13
Interface Diagrams ......................................................................................................................... 2–13
Electrical Specifications ................................................................................................................. 2–14
Symbol Encoding ........................................................................................................................... 2–16
Control Sequences .......................................................................................................................... 2–22
Ordered Sequences ........................................................................................................................ 2–25
Link Initialization and Training ................................................................................................... 2–27
Data Link Layer Description .............................................................................................................. 2–36
Packet Description .......................................................................................................................... 2–36
Idle Generation ............................................................................................................................... 2–41
Data Transmission Priority ........................................................................................................... 2–42
Multi-Lane Alignment ................................................................................................................... 2–44
Transfer Size .................................................................................................................................... 2–52
Channel Multiplexing .................................................................................................................... 2–56
Flow Control (Optional) ................................................................................................................ 2–61
Retry-on-Error (Optional) ............................................................................................................. 2–64
Error Events & Handling .................................................................................................................... 2–69
Catastrophic Error Events ............................................................................................................. 2–71
Link Error Events ........................................................................................................................... 2–71
Data Error Events ........................................................................................................................... 2–72
Packets Marked Bad ....................................................................................................................... 2–74
8b/10b Code Groups .......................................................................................................................... 2–75
References ............................................................................................................................................. 2–83
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Table of Contents
iv Altera Corporation SerialLite II Protocol Reference Manual

About This Manual

Revision History

Chapter Date Version Changes Made
All October 2005 1.0 Initial release of this specification.

How to Contact Altera

Information Type USA & Canada All Other Locations
Technical support www.altera.com/mysupport/ www.altera.com/mysupport/
Product literature www.altera.com www.altera.com
Altera literature services literature@altera.com literature@altera.com
Non-technical customer service
FTP site ftp.altera.com ftp.altera.com
The table below displays the revision history for this reference manual.
For the most up-to-date information about Altera® products, go to the Altera world-wide web site at www.altera.com. For technical support on this product, go to www.altera.com/mysupport. For additional information about Altera products, consult the sources shown below.
(800) 800-EPLD (3753) (7:00 a.m. to 5:00 p.m. Pacific Time)
(800) 767-3753 + 1 408-544-7000
+1 408-544-8767 7:00 a.m. to 5:00 p.m. (GMT -8:00) Pacific Time
7:00 a.m. to 5:00 p.m. (GMT -8:00) Pacific Time
Typographic
This document uses the typographic conventions shown below.
Conventions
Visual Cue Meaning
Bold Type with Initial Capital Letters
bold type External timing parameters, directory names, project names, disk drive names,
Altera Corporation v
Command names, dialog box titles, checkbox options, and dialog box options are shown in bold, initial capital letters. Example: Save As dialog box.
filenames, filename extensions, and software utility names are shown in bold type. Examples: f
, \qdesigns directory, d: drive, chiptrip.gdf file.
MAX
SerialLite II Protocol Reference Manual

Glossary

Visual Cue Meaning
Italic Type with Initial Capital Letters
Italic type Internal timing parameters and variables are shown in italic type.
Initial Capital Letters Keyboard keys and menu names are shown with initial capital letters. Examples:
“Subheading Title” References to sections within a document and titles of on-line help topics are
Document titles are shown in italic type with initial capital letters. Example: AN 75:
High-Speed Board Design.
Examples: t
Variable names are enclosed in angle brackets (< >) and shown in italic type. Example: <file name>, <project name>.pof file.
Delete key, the Options menu.
shown in quotation marks. Example: “Typographic Conventions.”
PIA
, n + 1.
Courier type Signal and port names are shown in lowercase Courier type. Examples: data1,
tdi, input. Active-low signals are denoted by suffix n, e.g., resetn.
Anything that must be typed exactly as it appears is shown in Courier type. For example: actual file, such as a Report File, references to parts of files (e.g., the VHDL keyword Courier.
1., 2., 3., and a., b., c., etc.
Bullets are used in a list of items when the sequence of the items is not important.
v The checkmark indicates a procedure that consists of one step only. 1 The hand points to information that requires special attention.
c
w
r The angled arrow indicates you should press the Enter key.
f The feet direct you to more information on a particular topic.
Numbered steps are used in a list of items when the sequence of the items is important, such as the steps listed in a procedure.
The caution indicates required information that needs special consideration and understanding and should be read prior to starting or continuing with the procedure or process.
The warning indicates information that should be read prior to starting or continuing the procedure or processes
c:\qdesigns\tutorial\chiptrip.gdf. Also, sections of an
BEGIN), as well as logic function names (e.g., TRI) are shown in
Glossary
This section describes some of the terms used in this manual.
Bit Alignment: The process of selecting the proper sampling position of incoming bits.
Byte: 8-bit unencoded value that represents raw data intended for, or after, transmission. All data in the Link layer has the byte as the basic unit.
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About This Manual
Character: General term used to describe a byte after conversion to its 10-bit encoded value. This term only appears in the context of the Physical layer.
Code Group: Refers to specific 10-bit values in the context of defining how to encode and decode. Uses /Dx.y/ and /Kx.y/ notation.
Column: The collection of all lanes during a particular character cycle. While column is the common term used, it is somewhat confusing in this specification because all figures show time progressing up/down. Thus
columns are actually seen as rows.
CRC: Cyclic redundancy check. A number derived from, and transmitted
with, a block of data in order to detect data corruption.
Data Packets: One of two possible user packet types transferred through the user side interface. (The second type is the priority packet.)
Field: A defined portion of a sequence of symbols or ordered sets. Any particular sequence is defined as a series of fields, each having a specific purpose.
Lane: A set of differential pairs, one pair for transmission and one pair for reception.
Lane Alignment: The process of deskewing multiple lanes in a link. Special characters are used to identify the relationship to other lanes that are skewed during transmission. Alignment is achieved when all lanes have the alignment character adjacent to each other.
Lane Bonding: Data payload mapping across multiple lanes which take place at the transmitter side.
Lane Stripping: The receiver process by which all packet encapsulations are removed, reversing the transmitter bonding process.
Link: A communications path between two components. An xN link is composed of N lanes.
Link Management Packets: Used by the SerialLite II protocol to maintain the link.
Ordered Set: A symbol that is transmitted simultaneously on all lanes at once; notated with double-vertical lines, as in ||COM||.
Port: A group of transmitters and receivers located on the same chip that define a link.
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Glossary
Priority Packets: User packet transmitted/received through the high-priority user-side interface. The transmission of priority packets takes precedence over that of data packets.
Sequence: A predefined series of symbols or ordered sets, one following another. A sequence of symbols is notated using curly braces, for example {SDP}. A sequence of ordered sets is notated {|TS1|}.
Symbol: A symbolic representation of a specific code group or sequence notated with a letter or letters, for example COM.
Transfer Size: The number of columns for a contiguous burst of data.
User Packets: A term used to describe data or priority packets
transmitted/received through one of two user-side interfaces.
Word: Used loosely to refer to one byte (8-bit space) as a single unit.
Word Alignment: The process of aligning data to a word boundary.
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SerialLite II
Specification

Introduction

SerialLite II is a lightweight, chip-to-chip protocol suitable for packet and streaming data in chip-to-chip, board-to-board, and backplane applications. This protocol offers low protocol overhead, low gate count, and minimum data transfer latency. It provides reliable, high-speed transfers of packets between devices over serial links. The SerialLite II protocol defines packet encapsulation at the link layer and data encoding at the physical layer. This protocol integrates transparently with existing networks, without software support.

Protocol Features

Simplex and duplex operation
Symmetrical and asymmetrical operation
In-band control signalling
Supports streaming and packet-based protocols
Support for two user packet types: data packet and priority packet
Nesting (priority packet within data packet) for time-critical control
packet
Support for single or multiple lanes
Data packet size: minimum one byte; no maximum.
Priority packet size: minimum one byte; no maximum
8B/10B Physical layer encoding
Synchronous or asynchronous operation
Lane polarity reversal
Lane-to-lane reordering for multi-lane operation
Packet integrity protection using CRC-32 or CRC-16
Payload and idle scrambling
Link management packets
Error detection
Segment retry-on-error for priority packets
In-band flow control for priority and data packets
Low protocol overhead
Low point-to-point transfer latency
Inter-frame gaps are not required

Typical Applications

Packet or streaming data applications
Chip-to-chip connectivity
Board-to-board connectivity
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Preliminary

Architectural Overview

Shelf-to-shelf connectivity
Backplane communication
Architectural Overview
The SerialLite II protocol involves the Data Link layer and the Physical layer of the OSI layer reference model, as shown in Figure 2–1. The Physical layer is fully implemented. The link layer can be also be fully implemented; though the amount of link-layer functionality that is added to the SerialLite II protocol can be application specific. The SerialLite II protocol integrates transparently with existing networks and provides a reliable data transfer mechanism in simple applications that do not need the layers between the Data Link layer and the Application layer, or that do not use the OSI model at all.
Figure 2–1. OSI Reference Model Layers
Application
Presentation
Session
Transport
Network
Data Link
Physical
SerialLite II
SerialLite II is a general-purpose protocol useful for a wide variety of applications. The SerialLite II interface consists of a scalable number of physical data lanes, as shown in Figure 2–2.
Figure 2–2. SerialLite Architecture Overview
One or More
Lanes
User
Application
Link Layer
Logical
Electrical
Physical Layer
Logical
Electrical
Physical Layer
Link Layer
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User
Application
SerialLite II Specification

Physical Layer

The Physical layer defines 8B/10B symbols for converting 8-bit user data characters from the Data Link layer to 10-bit data symbols, as well as control symbols and idle symbols for inter-packet fill. The Physical layer also specifies the bit transmission order, and serial-to-parallel and parallel-to-serial conversion. Figure 2–3 shows an example of the Physical layer connection.
Figure 2–3. Physical Layer Definition
LinkPort
PHY PHY
Lane
Transmit Direction
Serialization of data
8B/10B encoding
Link initialization
Insertion of clock compensation characters for asynchronous
applications
Idle character conversion
Payload and idle scrambling
Receive Direction
Clock recovery
Deserialization of data
Character alignment using a comma control symbol
8B/10B decoding
Link initialization
Lane alignment (for multiple lanes)
Check for running disparity error and invalid character error
Clock tolerance compensation for asynchronous applications
Payload and idle descrambling
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Physical Layer Description

Data Link Layer

The Data Link layer describes packet encapsulation, link initialization, lane bonding, lane striping, flow control, and packet retransmission request commands.
Transmit Direction
Packet encapsulation
Packet nesting
Idle character generation
Flow control (optional)
CRC generation (optional)
Lane striping for multi-lane link
Priority packet retry-on-error handling (optional)
Receive Direction
Packet encapsulation removal
Nested packet separation
Lane stripping
Idle character deletion
CRC verification (optional)
Flow control commands generation (optional)
Error handling
Priority packet retry-on-error commands (optional)
Physical Layer Description
The Physical layer consists of an electrical sublayer and a logical sublayer. The electrical sublayer converts the electrical signals from a serial bit stream into characters and provides a synchronous clock to the logical sublayer. The logical sublayer handles the character alignment, symbol encoding, link initialization and training, lane alignment, and clock compensation.
The SerialLite II protocol uses control characters to identify link information that is embedded into the data stream. This information allows multiple channels to be easily bonded together, matching the application's throughput requirements to the link capacity.
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SerialLite II Specification

Signal Definitions

Table 2–1 provides a list of the interface signals, including a short
description of their functionality.
Table 2–1. Interface Signals
Signal Direction Description
TD[0-N]
RD[0-N]
Output Transmit data—Carries payload data and in-band
control words. TD connects to RD of the receiving device.
Input Receive data—Carries payload and in-band control
words. RD connects to TD of the transmitting device.

Interface Diagrams

The SerialLite II protocol supports an interface that recovers the clock and data for a serial bit.
Figure 2–4 shows the SerialLite II protocol in asynchronous mode, where
the clock and data is recovered from the serial bit stream, and each device has its own reference clock.
Figure 2–4. Asynchronous Clock & Data Recovery
Device A Dev ice B
TD[ 0- N] RD[0 -N]
RD[0 -N] T D[0- N]
REFCLKREFCLK
Figure 2–5 on page 2–14 shows the SerialLite II protocol in synchronous
mode, where the clock and data is recovered from the serial bit stream, and the reference clock is shared between devices.
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Physical Layer Description
Figure 2–5. Synchronous Clock & Data Recovery
Device A Device B
TD[ 0- N] RD[0 -N]
RD[0 -N] T D[0- N]
REFCLK

Electrical Specifications

This section defines the electrical specifications for the SerialLite II Physical layer. The AC electrical specifications are given for the transmitter and receiver, and cover single- and multi-lane instantiations.
To ensure interoperability between components operating from different supply voltages or implemented in different technologies, use AC coupling at the receiver input.
Advisory Note for Electrical Specifications
The parameters for the AC electrical specifications are based on existing electrical interfaces. For example, SerialLite II can use the XAUI electrical interface specified in Clause 47 of IEEE 802.3ae-2002, or the CEI electrical interface specified in Clause 6 of OIF-CEI-02.0. This standard usage allows electrical designs for SerialLite II to reuse electrical designs from the XAUI and CEI, suitably modified for applications at the SerialLite II-specific baud interval and reach described in this specification.
Where elements of the electrical specification follow the exact XAUI specification, this document points to the XAUI and CEI documents. Where there are differences motivated by the frequency range supported by SerialLite II, the applicable SerialLite II information is provided.
Equalization and Pre-emphasis
The use of high-speed serial links causes the interconnect media to degrade the signal at the receiver, which produces effects such as inter-symbol interference (ISI) or data-dependent jitter. The signal loss
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SerialLite II Specification
can be large enough to degrade the eye opening at the receiver beyond what is allowed in the specification. To reduce some of these effects, both transmitter equalization and receiver pre-emphasis can be used.
Driver Characteristics
Refer to IEEE 802.3ae Clause 47.3.3 for XAUI characteristics and OIF-CEI-02.0 Clause 6.4.1 for CIE characteristics. Tab le 2 –2 describes the characteristics for other possible frequencies.
Table 2–2. Driver Characteristics
Parameter Value or Range Units
Bit rate
Tolerance
Unit interval (nominal) [UI] 156 – 1607 pS
Differential amplitude
Maximum
Minimum
Absolute output voltage limits
Maximum
Minimum
Output jitter
Maximum deterministic jitter (JD)
Maximum total jitter (JT)
Transition Time (20% – 80%) 60 – 130 pS
Differential Output Impedance 100 ± 10% Ohm
Differential Pair Output Skew 0 – 15 pS
0.622 – 6.375 ±300
1600 400
2.3
-0.4
0.17
0.35
Gbaud ppm
mV
p-p
mV
p-p
V V
UI UI
Receiver Characteristics
Refer to IEEE 802.3ae Clause 47.3.4 for XAUI characteristics and OIF-CEI-02.0 Clause 6.4.2 for CIE characteristics. Tab le 2 –3 describes the characteristics for other possible frequencies.
Table 2–3. Receiver Characteristics (Part 1 of 2)
Parameter Value Units
Bit rate
Tolerance 0.622 – 6.375
±300
Unit interval (nominal) [UI] 156 – 1607 pS
Receiver coupling AC
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Gbaud ppm
Physical Layer Description
Table 2–3. Receiver Characteristics (Part 2 of 2)
Parameter Value Units
Bit Error Rate 10 –12
Differential Input Impedance 100 ± 10% Ohm
Return loss
Common mode106
Jitter amplitude tolerance
Minimum deterministic
Minimum deterministic plus random
Minimum total
Differential
0.37
0.55
0.65
dB dB
UI UI UI
p-p
p-p
p-p
Interconnect Characteristics
Refer to IEEE 802.3ae Clause 47.3.5 for XAUI characteristics and OIF-CEI-02.0 Clause 6.A for CIE characteristics.
Electrical Measurement Requirements
Refer to IEEE 802.3ae Clause 47.4 for XAUI and OIF-CEI-02.0 Clause 2 for CEI.

Symbol Encoding

The SerialLite II protocol encodes physical lanes using the industry-standard 8B/10B encoding scheme. This approach takes 8-bit data bytes and encodes them into 10-bit characters for transmission. The 10-bit coding is designed to allow the receiver to be able to recover a clock signal from the transmitted data. Each 10-bit code has either an equal number of ones and zeros (balanced) or the number of ones and zeros differs by two (unbalanced). As the 10-bit code space is larger than the 8-bit data space, two 10-bit values can represent the same 8-bit code where both 10-bit codes are either balanced or unbalanced. Unbalanced pairs of 10-bit codes are compliments of each other to have the opposite number of ones and zeros. Thus allowing the encoding to select between unbalanced characters to evenly balance a stream of characters with a maximum run length of five consecutive identical digits.
To maintain a balanced stream of characters, the encoder and decoder keep a running disparity. Each 10-bit character of a specific code-group is used for either positive running disparity (RD+) or negative running disparity (RD-). The encoder selects between the two values based on the current running disparity and ensures the maximum run length of five is never violated. Running disparity is also used to detect if the 10-bit code symbol has been corrupted.
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SerialLite II Specification
There are two categories of code group:
Data code-groups: Any 8-bit byte can be converted into a 10-bit
encoded character.
Special code-groups: A limited number of 8-bit values can be
converted into 10-bit control characters.
When a control byte is to be encoded, a separate signal must be asserted to inform the encoder that it must generate a special code-group, not a data code-group.
Notation Convention
The 8B/10B transmission scheme uses letter notation to describe the bits of an unencoded information byte and the one-bit control variable. The control variable is set to 1 to select a K value from the special code-groups; it is not set for the D value of the data code-groups. Code-groups are indicated by the notation ‘Dx.y’ or ‘Kx.y’. See “8b/10b Code Groups” on
page 2–75 for a listing of the possible values and encodings.
The bit notation of HGF EDCBA is used to indicate the bits of the unencoded 8-bit value, where A is the least-significant bit (LSB), as shown in Figure 2–6.
Figure 2–6. Character Notation Example of D30.4
D30.4
yx
4 30 100 11110
HGF EDCBADx.y
The HGF EDCBA bits are translated to the abcdei fghj bits of the 10-bit transmission code-groups, as shown in Figure 2–7.
Figure 2–7. Code-Group Notation Example of D30.4
Altera Corporation 17
fghjabcdei
0010011110
RD-
1101100001
RD+
SerialLite II Protocol Reference Manual
Physical Layer Description
Several terms that are used to describe different entities and combinations of entities involved in specifying how encoding works. This specification uses the terms and notation defined in Ta bl e 2– 4.
Table 2–4. Terms and Notation
Term Meaning Notation Example
Byte 8-bit value, prior to 8B/10B
Character 10-bit value, the result of the
Code-group A specific 10-bit encoding of a
Symbol The symbolic representation of a
Sequence A series of symbols that are
Ordered set A character that is placed
Ordered set sequence
encoding; used to refer to general data.
encoding of a byte; used to refer to general data.
specific byte.
specific code-group, placed on a single lane of an actual implementation.
transmitted in the given order; given a shorthand name to refer to the entire sequence.
simultaneously on all lanes of a multi-lane implementation.
A series of ordered sets that are transmitted in the given order, of which each element appears simultaneously on all lanes of a multi-lane implementation.
Dx.y or Kx.y D26.5
K28.5
/x/ /COM/
{x} {SDP}
||x|| ||ALN||
{|x|} {|TS1|}
Transmission Order
Code transmission and reception start with bit ‘a’ of the 10-bit code, as shown in Figure 2–8 on page 2–19. The order of transmission of multiple characters across multiple lanes is described under “Multi-Lane
Alignment” on page 2–44.
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SerialLite II Specification
Figure 2–8. 8B/10B Notation Convention and Transmission Order
Transmit Receive
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
C C
HG F ED C B A HGFE DC BA
bc d e i fgh jabcdeifghja
8 7 6 5 4 3 2 1 09
“a” Transmitted First “a” Received First
Figure 2–9 shows the transmission of multiple words on a single lane
starting with the first symbol.
Figure 2–9. Single Lane Serial Transmission Order
Symbol 0
Lane
b c d e i f g h j
a b c d e i f g h j
#0
Time
Symbo l 1
a b c d e i f g h j
8b to 10b
Encoder
8+Control
10b to 8b
Decoder
8+Control
10 10
8 7 6 5 4 3 2 1 09
Symbol 2
a b c d e i f g h j
a
Symbo l 3
Figure 2–10 on page 2–20 shows the transmission of multiple words
across multiple lanes. The first symbol is transmitted on the lowest lane followed by the second on next lane until a column is completed.
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Physical Layer Description
Figure 2–10. Four Lane Serial Transmission Order
Symbol 0
Symbo l 4
Symbol 8
Lane
#0
Lane
#1
Lane
#2
Lane
#3
b c d e i f g h j
a b c d e i f g h j
Symbol 1
b c d e i f g h j
a b c d e i f g h j
Symbol 2
b c d e i f g h j
a b c d e i f g h j
Symbol 3
b c d e i f g h j
a b c d e i f g h j
Time
a b c d e i f g h j
Symbo l 5
a b c d e i f g h j
Symbo l 6
a b c d e i f g h j
Symbo l7
a b c d e i f g h j
a
Symbol 9
a
Symbo l 10
a
Symbo l 11
a
Running Disparity Rules
The SerialLite II rules for running disparity are as specified in Clause 36 of the IEEE 802.3-2002 specification.
Valid and Invalid code-groups
Not every 10-bit value constitutes a valid 10-bit code. The 10-bit space is only partially populated with valid combinations.
Valid and invalid 10-bit code groups for SerialLite II are as specified in Clause 36 of the IEEE 802.3-2002 specification. This clause defines both the data code-group (D code-group) and the special code-group (K code-group). See “8b/10b Code Groups” on page 2–75 for a complete list of these groups.
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SerialLite II Specification
Control Symbols
This section defines the individual symbols used either alone or as part of control sequences, see Ta bl e 2 –5 . For simplicity, these symbols are used instead of their associated code groups.
Table 2–5. Description of the Control Symbols
Name Description 8b10b Hex
/COM/ Comma (Sync) K28.5 0xBC
/ALN/ Align K28.3 0x7C
/IDL/ Idle (Skip) K28.0 0x1C
/SPP/ Start of priority packet K28.1 0x3C
/SDP/ Start of data packet K28.2 0x5C
/CPP/ Continuation of priority packet K28.4 0x9C
/CDP/ Continuation of data packet K28.6 0xDC
/SLP/ Start of link management packet K23.7 0xF7
/SUP/ Suspend user packet K27.7 0xFB
/EGP/ End of good packet K29.7 0xFD
/EBP/ End of bad packet K30.7 0xFE
/DAT/ Normal data. Dx.y 0xXX
Comma /COM/
The comma symbol, sometimes called the sync symbol, has a number of uses. It is used by the physical layer to identify a character boundary, and it is included in the training sequence for lane initialization and in the clock compensation sequence.
Align /ALN/
The align symbol is never used alone. It is part of the link deskew sequence.
Idle /IDL/
The idle symbol is used when no complete transfer of data is available to send or to fill inter-packet gaps. It is part of the clock compensation sequence.
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Physical Layer Description
Start of Data Packet /SDP/
The start of data packet symbol identifies the start of a regular user data packet.
Start of Priority Packet /SPP/
The start of priority packet symbol identifies the start of a high-priority user data packet.
Continuation of Data Packet /CDP/
The continuation of data packet symbol identifies the continuation of a regular user data packet.
Continuation of Priority Packet /CPP/
The continuation of priority packet symbol identifies the continuation of a high-priority user data packet.
Suspend User Packet /SUP/
The suspend user packet symbol identifies the termination of the burst to allow for the potential switch of channel number of regular user data packet.
End of Good Packet /EGP/
The end of good packet symbol identifies the end of a user packet that was transmitted without errors.
End of Bad Packet /EBP/
The end of bad packet symbol identifies the end of a user packet whose data is known by the transmitter to be unreliable.
Start of Link Management Packet/SLP/
The start of link management packet symbol identifies a link management packet.

Control Sequences

The SerialLite II protocol defines a number of control sequences. These are sequences of code-groups used to mark the beginning and end of a burst or packets.
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SerialLite II Specification
f See “User Packet Encapsulation” on page 2–37 for more information on
packet encapsulation, and “Channel Multiplexing” on page 2–56 for more information on multiplexing channels.
Start of Data Packet Sequence {SDP}
The start of data packet sequence consists of two symbols, as shown in
Table 2–6. The first symbol is the /SDP/ control symbol. The second
symbol is a data code-group that you can use to convey a channel number for channel multiplexing.
Table 2–6. {SDP} Composition
Field Symbol Description
SDP1 /SDP/ Start of data packet symbol
SDP2 /DAT/ Channel number
Start of Priority Packet Sequence {SPP}
The start of priority packet sequence consists of two symbols as shown in
Table 2–7. The first symbol is the /SPP/ control symbol. The second
symbol is a data code-group that is divided into two sections. The upper nibble contains a segment identification number and is used for retry-on­error (see“Retry-on-Error (Optional)” on page 2–64). The lower nibble can be used to convey a channel number for channel multiplexing.
Table 2–7. {SPP} Composition
Field Symbol Description
SPP1 /SPP/ Start of priority packet symbol
SPP2 /DAT/ Segment identification/channel number
End of Good Packet Sequence {EGP}
The end of good packet sequence consists of two symbols, as shown in
Table 2–8 on page 2–24. It is used to mark the end of a packet that has left
the transmitter without errors. The first symbol is the /EGP/ control symbol. The second symbol is a data code-group that can be used to
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Physical Layer Description
verify a channel number for channel multiplexing. For priority packets, the second symbol contains both the segment identification and channel number.
Table 2–8. {EGP} Composition
Field Symbol Description
EGP1 /EGP/ End of good packet symbol
EGP2 /DAT/ Segment identification/channel number
End of Bad Packet Sequence {EBP}
The end of bad packet sequence consists of two symbols as shown in
Table 2–9. It is used to mark the end of a packet that the transmitter has
decided is unreliable. The first symbol is the /EBP/ control symbol. The second symbol is a data code-group that can be used to verify a channel number for channel multiplexing. For priority packets, the second symbol contains both the segment identification and channel number. See
“Packets Marked Bad” on page 2–74 for more information on the {EBP}.
Table 2–9. {EBP} Composition
Field Symbol Description
EBP1 /EBP/ End of bad packet symbol
EBP2 /DAT/ Segment identification/channel number
Suspend User Packet Sequence {SUP}
The suspend user packet sequence consists of two symbols as shown in
Table 2–10. The first symbol is the /SUP/ control symbol. The second
symbol is a data code-group that can be used to convey a channel number for channel multiplexing. The SUP signals the end of a burst, allowing for a switch to a new channel number or insertion of CRC.
Table 2–10. {SUP} Composition
Field Symbol Description
SUP1 /SUP/ Suspend user packet symbol
SUP2 /DAT/ Channel number
24 Altera Corporation SerialLite II Protocol Reference Manual
SerialLite II Specification
Continuation of Data Packet Sequence {CDP}
The continuation of data packet sequence consists of two symbols as shown in Ta bl e 2 –11 . The first symbol is the /CDP/ control symbol. The second symbol is a data code-group that can be used to convey a channel number for channel multiplexing. The channel number represent the packet segment to be continued.
Table 2–11. {CDP} Composition
Field Symbol Description
CDP1 /CDP/ Continuation of Data Packet Symbol
CDP2 /DAT/ Channel Number
Continuation of Priority Packet Sequence {CPP}
The continuation of priority packet sequence consists of two symbols as shown in Ta bl e 2 –1 2. The first symbol is the /CPP/ control symbol. The second symbol is a data code-group that is divided into two sections. The upper nibble contains a segment identification number and is used for retry-on-error (see“Retry-on-Error (Optional)” on page 2–64). The lower nibble can be used to convey a channel number for channel. The channel number represents the packet segment to be continued.
Table 2–12. {CPP} Composition
Field Symbol Description
CPP1 /CPP/ Continuation of priority packet symbol
CPP2 /DAT/ Segment identification/channel number

Ordered Sequences

The SerialLite II protocol defines a number of sequences as ordered sets. As such, each element of the sequence is a symbol that appears on all lanes simultaneously in a column.
f See “Link Initialization and Training” on page 2–27 for more information
on link training.
Altera Corporation 25
SerialLite II Protocol Reference Manual
Physical Layer Description
Training Sequence One Ordered Set Sequence {|TS1|}
The first link training sequence consists of eight ordered sets as shown in
Table 2–13. This sequence is used to initialize the links.
Table 2–13. {|TS1|} Composition
Field Ordered Set Description
TC ||COM|| Comma (or Sync) identifier
LN ||DAT|| Lane number. A number from 0 to 255 (in
8-bit space, encoded before transmission, with 0 representing the most significant lane)
MLN ||DAT|| Maximum lane number. A number from 0 to
255 (in 8-bit space, encoded before transmission, with 0 representing a single lane implementation)
TSZ ||DAT|| Transfer size. Valid numbers are 1, 2, and
4. The transfer size defines the number of columns for a contiguous burst of data; 1 column, 2 columns, 4 columns, and all other values are reserved.
RSV 3x||DAT|| Reserved. Set to all zeros (D0.0); repeated
three times
T1 ||DAT|| First training sequence identifier (D10.2)
Training Sequence Two Ordered Set Sequence {|TS2|}
The second link training sequence consists of eight ordered sets as shown in Ta bl e 2 –1 4. This sequence is used to indicate that link initialization is complete, and forms part of the link-deskew sequence.
Table 2–14. {|TS2|} Composition
Field Ordered Set Description
TC ||COM|| Comma (or Sync) identifier
LN ||DAT|| Lane number. A number from 0 to 255 (in
8-bit space, encoded before transmission, with 0 representing the most significant lane)
MLN ||DAT|| Maximum lane number. A number from 0 to
255 (in 8-bit space, encoded before transmission, with 0 representing a single lane implementation)
26 Altera Corporation SerialLite II Protocol Reference Manual
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