ALLEGRO A3425 User Manual

A3425
Ultra-Sensitive Dual-Channel Quadrature
Hall-Effect Bipolar Switch
Features and Benefits
Two matched Hall effect switches on a single substrate Sensor Hall element spacing approximately 1 mm Superior temperature stability 3.3 to 18 V operation Integrated ESD diode from OUTPUT and VCC pins
to GND
High-sensitivity switchpoints Robust structure for EMC protection Solid-state reliability
Package: 8 pin SOIC (suffix L), and 4 pin SIP (suffix K)
Description
The A3425 is a dual–output-channel, bipolar switch with each channel comprising a separate complete Hall-effect sensor circuit with dedicated Hall element and separate digital output for speed and direction signal processing capability. The independent Hall elements (E1 integrated with OUTPUTA, and E2 integrated with OUTPUTB) are photolithographically aligned to better than 1 μm. Maintaining this accurate mechanical location between the two active Hall elements eliminates the major manufacturing hurdle encountered in fine-pitch detection applications. The A3425 is a highly sensitive, temperature-stable magnetic sensing device, which is ideal for use in ring magnet­based speed and direction systems used in harsh automotive and industrial environments.
The A3425 contains two independent Hall effect switches, and has a monolithic IC that accurately locates the two Hall elements, E1 and E2, approximately 1 mm apart. The digital outputs are 90º out of phase so that the outputs are in quadrature, with the proper ring magnet design. This allows for easy processing of speed and direction signals. Extremely low-drift amplifiers guarantee symmetry between the switches to maintain signal
Not to scale
V
Supply
Continued on the next page…
T ypical Application
100 Ω
0.1 uF
Using unregulated supply
VOUTPUTB
VOUTPUTA
2
OUTPUTA
A3425
1
VCC
OUTPUTB
4
3
A3425DS-Rev. 7
Ultra-Sensitive Dual-Channel Quadrature
A3425
Description (continued)
quadrature. The patented chopper stabilization technique cancels
offsets in each channel, and provides stable operation over the
operating temperature and voltage ranges. An on-chip regulator
allows the use of this device over a wide operating voltage range.
Post-assembly factory programming provides sensitive switchpoints
Selection Guide
Part Number Packing
A3425EK-T Bulk, 500 pieces/bag
A3425EKTN-T 13-in. reel, 4000 pieces/reel
A3425EL-T Bulk, 500 pieces/bag
A3425ELTR-T 13-in. reel, 3000 pieces/reel
A3425LK-T Bulk, 98 pieces/bag
A3425LKTN-T 13-in. reel, 4000 pieces/reel
A3425LL-T Bulk, 500 pieces/bag
A3425LLTR-T 13-in. reel, 3000 pieces/reel
*
Contact Allegro for additional packing options.
*
4-pin SIP through hole
8-pin SOIC surface mount
4-pin SIP through hole
8-pin SOIC surface mount
Hall-Effect Bipolar Switch
that are symmetrical between the two switches.
The A3425 is available in a plastic 8-pin SOIC surface mount package (L) and a plastic 4-pin SIP (K), both in two operating temperature ranges. Each package is available in a lead (Pb) free version with 100% matte tin plated leadframe.
Mounting Ambient, T
–40ºC to 85ºC
–40ºC to 150ºC
A
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
Supply Voltage V
Reverse Battery Voltage V
Output Off Voltage V
Output Sink Current I
Magnetic Flux Density B Unlimited
Operating Ambient Temperature T
Maximum Junction Temperature TJ(max) 165 ºC
Storage Temperature T
CC
RCC
OUTPUT
OUTPUT(Sink)
A
stg
Range E –40 to 85 ºC
Range L –40 to 150 ºC
26.5 V
–16 V
V
CC
Internally Limited
–65 to 170 ºC
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
V
2
A3425
Ultra-Sensitive Dual-Channel Quadrature
Hall-Effect Bipolar Switch
Functional Block Diagram
VCC
Channel A
Hall Element E1
Channel B
Hall Element E2
Programmable
Tri m
8 Bits
4 Bits
lation
Amp
Cancel
Dynamic Offset
lation
Amp
Cancel
Dynamic Offset
Low­Pass Filter
Sample and Hold
4 Bits
Low­Pass Filter
Sample and Hold
Regulator
Output
Output
OUTPUTA
Drive
OUTPUTB
Drive
E1
E2
1 2 3 4
GND
Terminal List Table
Package LPackage K
1
2
3
4
8
E1
7
6
E2
5
Pin Number
Package K Package L
Name Function
1 1 VCC Connects power supply to on-chip voltage regulator
2 2 OUTPUTA Output from E1 via fi rst Schmitt circuit
3 3 OUTPUTB Output from E2 via second Schmitt circuit
4 4 GND Terminal for ground connection
5-8 NC No connection
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
3
Ultra-Sensitive Dual-Channel Quadrature
A3425
Hall-Effect Bipolar Switch
OPERATING CHARACTERISTICS Valid over operating temperature ranges unless otherwise noted; typical data applies to
= 12 V, and TA = 25ºC
V
CC
Characteristic Symbol Test Conditions Min. Typ. Max Units
ELECTRICAL CHARACTERISTICS
Supply Voltage
1
Output Leakage Current I
Output Rise Time t
Output Fall Time t
Supply Current
Low Output Voltage V
Output Sink Current I
Output Sink Current, Continuous
Output Sink Current, Peak
2
3
Chopping Frequency f
TRANSIENT PROTECTION CHARACTERISTICS
V
CC
OUTPUT(OFF)
r
f
I
CC(OFF)
I
CC(ON)
OUTPUT(ON)
OUTPUT(SINK)
I
OUTPUT(SINK)CTJ
I
OUTPUT(SINK)P
C
Operating; TA 150°C 3.3 18 V
Either output < 1 10 A
C
= 20 pF, R
LOAD
C
= 20 pF, R
LOAD
B < B
B > B
RP(A)
OP(A)
,B < B
,B > B
Both outputs; I
OP(B)
B > B
= 820 1.8 s
LOAD
= 820 1.2 s
LOAD
RP(B)
OP(B)
OUTPUT(SINK)
= 20 mA; B > B
OP(A)
3.5 6.0 mA
4.0 6.0 mA
,
160 500 mV
20 mA
< T
J(max)
,V
= 12 V 70 mA
OUTPUT
t < 3 seconds 220 mA
340 kHz
Supply Zener Voltage V
Supply Zener Current
4
Reverse-Battery Current I
Continued on the next page...
I
Z
RCC
Z
ICC = 15 mA 28 33 37 V
VS = 28 V 9.0 mA
V
= –18 V, TJ < T
RCC
J(max)
2 15 mA
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
4
Ultra-Sensitive Dual-Channel Quadrature
A3425
Hall-Effect Bipolar Switch
OPERATING CHARACTERISTICS (continued) Valid over operating temperature ranges unless otherwise noted; typical
data applies to V
Characteristic Symbol Test Conditions Min. Typ. Max Units
MAGNETIC CHARACTERISTICS, K Package
= 12 V, and TA = 25ºC
CC
5
Operate Point: B > B
Release Point: B < B
Hysteresis: B B
OP(B)
– B
OP(A)
RP(B)
– B
OP
RP
RP(A)
,
Symmetry: Channel A, Channel B, B
Operate Symmetry: B
Release Symmetry: B
OP(A)
+ B
RP(A), BOP(B)
OP(A)
RP(A)
+ B
– B
– B
RP(B)
OP(B)
RP(B)
MAGNETIC CHARACTERISTICS, L Package
Operate Point: B > B
Release Point: B < B
Hysteresis: B B
OP(B)
– B
OP(A)
RP(B)
– B
OP
RP
RP(A)
,
Symmetry: Channel A, Channel B, B
Operate Symmetry: B
Release Symmetry: B
1
When operating at maximum voltage, never exceed maximum junction temperature, T
2
Device will survive the current level specifi ed, but operation within magnetic specifi cation cannot be guaranteed.
3
Short circuit of the output to VCC is protected for the time duration specifi ed.
4
Maximum specifi cation limit is equivalent to I
5
Magnetic fl ux density, B, is indicated as a negative value for north-polarity magnetic fi elds, and as a positive value for south-polarity
OP(A)
+ B
RP(A), BOP(B)
OP(A)
RP(A)
+ B
– B
– B
RP(B)
OP(B)
RP(B)
B
, B
OP(A)
B
, B
RP(A)
B
, B
HYS(A)
SYMA, SYM
SYM
AB(OP)
SYM
AB(RP)
5
B
, B
OP(A)
B
, B
RP(A)
B
, B
HYS(A)
SYMA, SYM
SYM
AB(OP)
SYM
AB(RP)
CC(max)
OP(B)
RP(B)
HYS(B)
OP(B)
RP(B)
HYS(B)
B
B
+ 3 mA.
7 35 G
–35 –7 G
51640 G
–40 40 G
–30 30 G
–30 30 G
7 30 G
–30 –7 G
51435 G
–35 35 G
–25 25 G
–25 25 G
. Refer to power derating curve charts.
J(max)
magnetic fi elds. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the fi eld is indicated by the absolute value of B, and the sign indicates the polarity of the fi eld (for example, a –100 G fi eld and a 100 G fi eld have equivalent strength, but opposite polarity).
EMC
Contact Allegro MicroSystems for EMC performance.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
5
Ultra-Sensitive Dual-Channel Quadrature
A3425
Hall-Effect Bipolar Switch
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions* Value Units
Package K, 1-layer PCB with copper limited to solder pads 177 ºC/W
Package Thermal Resistance
*Additional thermal data available on the Allegro Web site.
R
θJA
Package L-8 pin, 1-layer PCB with copper limited to solder pads 140 ºC/W
Package L-8 pin, 4-layer PCB based on JEDEC standard 80 ºC/W
Power Derating Curve
20 19 18 17
(V)
16 15
CC
14 13 12 11 10
9 8 7 6 5 4
Maximum Allowable V
3 2
20 40 60 80 100 120 180140 160
Package L, 4-layer PCB (R
= 80 ºC/W)
θJA
Package L, 1-layer PCB (R
= 140 ºC/W)
θJA
Package K, 1-layer PCB (R
= 177 ºC/W)
θJA
Temperature (ºC)
V
CC(max)
V
CC(min)
Power Dissipation versus Temperature
1900 1800 1700 1600 1500 1400
(mW)
D
Power Dissipation, P
1300 1200 1100 1000
900 800 700 600 500 400 300
Package K, 1-l
(R
θJA
(R
PackageL,1
(R
θ
JA
=
140 ºC/W)
=17
7 ºC/W)
Pa
ckage L, 4-layer PCB
θJA
=80ºC/W)
-
l
a
yer PCB
a
yer P
CB
200 100
0
20 40 60 80 100 120 140 160 180
Temperature, TA(°C)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
6
A3425
Ultra-Sensitive Dual-Channel Quadrature
Hall-Effect Bipolar Switch
Functional Description
Chopper-Stabilized Technique
When using Hall effect technology, a limiting factor for switchpoint accuracy is the small signal voltage developed across the Hall element. This voltage is dis­proportionally small relative to the offset that can be produced at the output of the Hall device. This makes it diffi cult to process the signal and maintain an accu- rate, reliable output over the specifi ed temperature and voltage range.
Chopper stabilization is a unique approach used to minimize Hall offset on the chip. The patented Allegro
technique, dynamic quadrature offset cancellation,
removes key sources of the output drift induced by thermal and mechanical stress. This offset reduction technique is based on a signal modulation-demodula­tion process. The undesired offset signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent demodu­lation acts as a modulation process for the offset, causing the magnetically-induced signal to recover its original spectrum at the baseband level, while the dc offset becomes a high-frequency signal. Then, using a low-pass fi lter, the signal passes while the modulated dc offset is suppressed.
The chopper stabilization technique uses a 170 kHz high-frequency clock. The Hall element chopping
occurs on each clock edge, resulting in a 340 kHz chop frequency. This high-frequency operation allows for a greater sampling rate, which produces higher accuracy and faster signal processing capability. This approach desensitizes the chip to the effects of ther­mal and mechanical stress. The disadvantage to this
approach is that jitter, also known as 360° repeatability, can be induced on the output signal. The sample-and- hold process, used by the demodulator to store and
recover the signal, can slightly degrade the signal­to-noise ratio. This is because the process generates replicas of the noise spectrum at the baseband, causing a decrease in jitter performance. However, the improve­ment in switchpoint performance, resulting from the reduction of the effects of thermal and mechanical stress, outweighs the degradation in the signal-to-noise ratio.
This technique produces devices that have an extremely stable quiescent Hall element output volt­age, are immune to thermal stress, and have precise recoverability after temperature cycling. This tech­nique is made possible through the use of a BiCMOS process, which allows the use of low-offset and low­noise amplifi ers in combination with high-density logic integration and sample-and-hold circuits. This process is illustrated in the following diagram.
Regulator
Amp
Chopper stabilization circuit (dynamic quadrature offset cancellation)
Low­Pass Filter
Sample andHold
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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