OSC
Vss
LE
LE
LE
LE
VD
Grid1
Grid2
Grid3
Grid4
Grid5
Grid6
VEE
Seg11
Seg10
C
44
43
42
D1
41
D2
40
D3
39
D4
38
D
37
36
35
34
33
32
31
30
29
28
27
26
25
24
2322
+24V
G
+5V
B
3
IR
G
A
+5V
+5V
C4
C5
10
10
7
4
CZ1
1
+24V
2
F+
3
F-
4
G
5
+5V
6
IR
7
STB
8
CLK
9
SDA
G
R5
21
+5V
0
D4
G
A
12345678
Page 10
5
4
3
2
1
1KCAJ
1
2
D
2KCAJ
1
2
8L
L
5L
L
46C
422
87C
CAP NP
1R
K01
2R
K01
36C
22
97C
4
14C
V21
73R
K001
43R
K001
V05/Fu7.
4
14C
CAP NP
C
1
63R
K01
V05/Fu7.4
5
6
94R
K2
B5U
8554
+
7
-
4
95C
V
4
05/Fu7.
06R
7.4
K
TUO_CIM
D
P0257C
402C
V05/Fu01
53R
1
K0
26R
K2
06C
V
05/Fu0
15RK021
A41U
C
08
54
3
+
1
2
-
4
0267C
P
1
05RK0
2
85
V
4
05/Fu
7.
36R
7
.4
K
C
B
A
5
4
3
2
1
B
A
Page 11
3.Critical Components List
SingingAppellation
S29AL008070TF102
HY57V641620ETP-7
CD5954CB
89DE-E
MT13
E13005
PT6315
VFD18-0602
IC
IC
C
I
C
I
IC
IC
DISPLAY
Page 12
4. IC Date Sheet & IC Description
Version 1.5 MT1389E
Specifications are subject to change without notice Pin Assignment
Abbreviations:
SR: Slew Rate
PU: Pull Up
PD: Pull Down
SMT: Schmitt Trigger
4mA~16mA: Output buffer driving strength.
Pin Main Alt. Type Description
RF Interface (26)
191 RFGND18 Ground Analog ground
192 RFVDD18 Power Analog power 1.8V
212 OSP Analog output RF Offset cancellation capacitor connecting
213 OSN Analog output RF Offset cancellation capacitor connecting
214 RFGC Analog output RF AGC loop capacitor connecting for DVD-ROM
rrent reference input. It generates reference current for
Cu
215 IREF Analog Input
216 AVDD3 Power Analog power 3.3V
1 AGND Ground Analog ground
2 DVDA Analog Input AC coupled input path A
3 DVDB Analog Input AC coupled input path B
4 DVDC Analog Input AC coupled input path C
5 DVDD Analog Input AC coupled input path D
6 DVDRFIP Analog Input AC coupled DVD RF signal input RFIP
7 DVDRFIN Analog Input AC coupled DVD RF signal input RFIN
8 MA Analog Input DC coupled main-beam RF signal input A
9 MB Analog Input DC coupled main-beam RF signal input B
10 MC Analog Input DC coupled main-beam RF signal input C
11 MD Analog Input DC coupled main-beam RF signal input D
12 SA Analog Input DC coupled sub-beam RF signal input A
13 SB Analog Input DC coupled sub-beam RF signal input B
14 SC Analog Input DC coupled sub-beam RF signal input C
15 SD Analog Input DC coupled sub-beam RF signal input D
16 CDFON Analog Input CD focusing error negative input
17 CDFOP Analog Input CD focusing error positive input
18 TNI Analog Input 3 beam satellite PD signal negative input
19 TPI Analog Input 3 beam satellite PD signal positive input
RF path. Connect an external 15K resistor to this pin and
AVSS
ALPC (4)
20 MDI1 Analog Input Laser power monitor input
2004/12/14
Page 13
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389E
Pin Main Alt. Type Description
21 MDI2 Analog Input Laser power monitor input
22 LDO2 Analog Output Laser driver output
23 LDO1 Analog Output Laser driver output
Reference Voltage (3)
28 V2REFO Analog output Reference voltage 2.8V
29 V20 Analog output Reference voltage 2.0V
30 VREFO Analog output Reference voltage 1.4V
Analog Monitor Output (7)
24 SVDD3 Power Analog power 3.3V
25 CSO RFOP Analog output
26 RFLVL RFON Analog output
27 SGND Ground Analog ground
31 FEO Analog output Focus error monitor output
32 TEO Analog output Tracking error monitor output
33 TEZISLV Analog output TE slicing Level
1) Central servo
2) Positive main beam summing output
1) RFRP low pass, or
2) Negative main beam summing output
Analog Servo Interface (8)
204 ADCVDD3 Power Analog 3.3V power for ADC
205 ADCVSS Ground Analog ground for ADC
206 RFVDD3 Power Analog power
207 RFRPDC Analog output RF ripple detect output
208 RFRPAC Analog Input RF ripple detect input (through AC-coupling)
209 HRFZC Analog Input High frequency RF ripple zero crossing
210 CRTPLP Analog output Defect level filter capacitor connecting
211 RFGND Ground Analog Power
RF Data PLL Interface (9)
195 JITFO Analog output Output terminal of RF jitter meter
196 JITFN Analog Input Input terminal of RF jitter meter
197 PLLVSS Ground Ground pin for data PLL and related analog circuitry
198 IDACEXLP Analog output Data PLL DAC Low-pass filter
199 PLLVDD3 Power Power pin for data PLL and related analog circuitry
200 LPFON Analog Output Negative output of loop filter amplifier
201 LPFIP Analog Input Positive input terminal of loop filter amplifier
202 LPFIN Analog Input Negative input terminal of loop filter amplifier
203 LPFOP Analog Output Positive output of loop filter amplifier
Motor and Actuator Driver Interface (10)
2
Page 14
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389E
Pin Main Alt. Type Description
34 OP_OUT Analog output Op amp output
35 OP_INN Analog input Op amp negative input
36 OP_INP Analog input Op amp positive input
37 DMO Analog Output Disk motor control output. PWM output
38 FMO Analog Output Feed motor control. PWM output
39 TROPENPWM Analog Output Tray PWM output/Tray open output
40 PWMOUT1 ADIN0 Analog Output
41 TRO Analog Output
42 FOO Analog Output Focus servo output. PDM output of focus servo compensator
43
48,84,
132, 146
74, 120 DVSS Ground 1.8V Ground pin for internal digital circuitry
60,87,
108,137
149 DVSS Ground 3.3V Ground pin for internal digital circuitry
FG
(Digital pin)
DVDD18 Power 1.8V power pin for internal digital circuitry
DVDD3 Power 3.3V power pin for internal digital circuitry
ADIN1
GPIO
LVTTL 3.3V Input,
Schmitt Input, pull
up, with analog
input path for ADIN1
General Power/Ground (11)
st
General PWM output
1) 1
2) AD input 0
Tracking servo output. PDM output of tracking servo
compensator
1) Motor Hall sensor input
2) AD input 1
3) GPIO
Micro Controller and Flash Interface (48)
54 HIGHA0
66 HIGHA1
65 HIGHA2
64 HIGHA3
63 HIGHA4
62 HIGHA5
61 HIGHA6
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
Microcontroller address 8
Microcontroller address 9
Microcontroller address 10
Microcontroller address 11
Microcontroller address 12
Microcontroller address 13
Microcontroller address 14
3
Page 15
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389E
Pin Main Alt. Type Description
InOut
59 HIGHA7
81 AD7
78 AD6
77 AD5
76 AD4
75 AD3
73 AD2
72 AD1
71 AD0
83 IOA0
69 IOA1
47 IOA2
49 IOA3
50 IOA4
51 IOA5
52 IOA6
53 IOA7
58 A16
4~16mA, SR
PU
InOut
4~16mA, SR
InOut
4~16mA, SR
InOut
4~16mA, SR
InOut
4~16mA, SR
InOut
4~16mA, SR
InOut
4~16mA, SR
InOut
4~16mA, SR
InOut
4~16mA, SR
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
InOut
4~16mA, SR
PU
Output
4~16mA, SR
PU
Microcontroller address 15
Microcontroller address/data 7
Microcontroller address/data 6
Microcontroller address/data 5
Microcontroller address/data 4
Microcontroller address/data 3
Microcontroller address/data 2
Microcontroller address/data 1
Microcontroller address/data 0
Microcontroller address 0 / IO
Microcontroller address 1 / IO
Microcontroller address 2 / IO
Microcontroller address 3 / IO
Microcontroller address 4 / IO
Microcontroller address 5 / IO
Microcontroller address 6 / IO
Microcontroller address 7 / IO
Flash address 16
4
Page 16
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389E
Pin Main Alt. Type Description
Output
82 A17
55 IOA18
56 IOA19
67 IOA20 YUV0
79 IOA21
80 ALE
70 IOOE#
57 IOWR#
68 IOCS#
85 UWR#
86 URD#
88 UP1_2
89 UP1_3
91 UP1_4
92 UP1_5
YUV7
GPIO
4~16mA, SR
PU
InOut
4~16mA, SR
PD, SMT
InOut
4~16mA, SR
PD, SMT
InOut
4~16mA, SR
PD, SMT
InOut
4~16mA, SR
PD, SMT
InOut
4~16mA, SR
PU, SMT
InOut
4~16mA, SR
SMT
InOut
4~16mA, SR
PU, SMT
InOut
4~16mA, SR
SMT
InOut
4~16mA, SR
PU, SMT
InOut
4~16mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
Flash address 17
Flash address 18 / IO
Flash address 19 / IO
1) Flash address 20 / IO
2) While External Fl ash size <= 1MB:
I) Alternate digital video YUV output 0
1) Flash address 21 / IO
2) While External Fl ash size <= 2MB:
I) Digital video YUV output 7
II) GPIO
Microcontroller address latch enable
Flash output enable, active low / IO
Flash write enable, active low / IO
Flash chip select, active low / IO
Microcontroller write strobe, active low
Microcontroller read strobe, active low
Microcontroller port 1-2
Microcontroller port 1-3
Microcontroller port 1-4
Microcontroller port 1-5
5
Page 17
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389E
Pin Main Alt. Type Description
93 UP1_6 SCL
94 UP1_7 SDA
95 UP3_0 RXD
96 UP3_1 TXD
97 UP3_4
98 UP3_5
RXD
SCL
TXD
SDA
102 IR
103 INT0#
InOut
4mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
InOut
4mA, SR
PU, SMT
Input
SMT
InOut
4~16mA, SR
PU, SMT
1) Microcontroller port 1-6
2
2) I
C clock pin
1) Microcontroller port 1-7
2
2) I
C data pin
1) Microcontroller port 3-0
2) 8032 RS232 RxD
1) Microcontroller port 3-1
2) 8032 RS232 TxD
1) Microcontroller port 3-4
2) Hardwired RD232 RxD
2
C clock pin
3) I
1) Microcontroller port 3-5
2) Hardwired RD232 TxD
2
3) I
C data pin
IR control signal input
Microcontroller external interrupt 0, active low
153 ALRCK
151 ABCK
152 ACLK
YUV1
GPO
YUV0
GPIO
YUV0
GPIO
Audio interface (28)
1) Audio left/right channel clock
2) Trap value in power-on reset:
InOut
4mA,
PD, SMT
3) While internal audio DAC used:
1) Audio bit clock
InOut
2) While internal audio DAC used:
4mA
InOut
4mA
1) Audio DAC master clock
2) While internal audio DAC used:
SMT
I) 1: use external 373
II) 0: use internal 373
I) Digital video YUV output 1
II) GPO
I) Digital video YUV output 0
II) GPIO
I) Alternate digital video YUV output 0
II) GPIO
6
Page 18
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389E
Pin Main Alt. Type Description
1) Audio serial data 0 (Front-Left/Front-Right)
2) Trap value in power-on reset:
154 ASDATA0
155 ASDATA1
156 ASDATA2
157 ASDATA3
158 MC_DATA
159 SPDIF
172 AADVSS Ground Ground pin for 2ch audio ADC circuitry
173 AKIN2 Analog Audio ADC input 2
174 ADVCM Analog 2ch audio ADC reference voltage
175 AKIN1 Analog Audio ADC input 1
176 AADVDD Power 3.3V power pin for 2ch audio ADC circuitry
177 APLLVDD3 Power 3.3V Power pin for audio clock circuitry
178 APLLCAP Analog InOut APLL external capacitance connection
179 APLLVSS Ground Ground pin for audio clock circuitry
180 ADACVSS2 Ground Ground pin for audio DAC circuitry
181 ADACVSS1 Ground Ground pin for audio DAC circuitry
182 ARF GPIO Output
YUV2
GPO
YUV4
GPO
YUV5
GPO
YUV6
GPIO
INT2#
YUV0
GPIO
InOut
4mA
PD SMT
InOut
4mA
PD SMT
InOut
4mA
PD SMT
InOut
4mA
PD SMT
InOut
2mA
Output
4~16mA,
SR: ON/OFF
I) 1: manufactory test mode
II) 0: normal operation
3) While internal audio DAC used:
I) Digital video YUV output 2
II) GPO
1) Audio serial data 1 (Left-Surround/Right-Surround)
2) Trap value in power-on reset:
I) 1: manufactory test mode
II) 0: normal operation
3) While only 2 channels output:
I) Digital video YUV output 4
II) GPO
1) Audio serial data 2 (Center/LFE)
2) Trap value in power-on reset:
I) 1: manufactory test mode
II) 0: normal operation
3) While only 2 channels output:
I) Digital video YUV output 5
II) GPO
1) Audio serial data 3 (Center-back/
Center-left-back/Center-right-back, in 6.1 or 7.1 mo de)
2) While only 2 channels output:
I) Digital video YUV output 6
II) GPIO
1) Microphone serial input
2) While not support Microphone:
I) Microcontroller external interrupt 2
II) Digital video YUV output 0
III) GPIO
S/PDIF output
1) Audio DAC sub-woofer channel output
2) While internal audio DAC not used: GPIO
7
Page 19
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389E
Pin Main Alt. Type Description
183 ARS GPIO Output
184 AR GPIO Output
185 AVCM Analog Audio DAC reference voltage
186 AL GPIO Output
187 ALS GPIO Output
188 ALF GPIO Output
189 ADACVDD1 Power 3.3V power pin for audio DAC circuitry
190 ADACVDD2 Power 3.3V power pin for audio DAC circuitry
1) Audio DAC right Surround channel output
2) While internal audio DAC not used: GPIO
1) Audio DAC right channel output
2) While internal audio DAC not used:
a. SDATA1
b. GPIO
1) Audio DAC left channel output
2) While internal audio DAC not used:
a. SDATA2
b. GPIO
1) Audio DAC left Surround channel outp ut
2) While internal audio DAC not used:
a. SDATA0
b. GPIO
1) Audio DAC center channel output
2) While internal audio DAC not used: GPIO
Video Interface (12)
160 DACVDDC Power 3.3V power pin for video DAC circuitry
161 VREF Analog Bandgap reference voltage
162 FS Analog Full scale adjustment
163 DACVSSC Ground Ground pin for video DAC circuitry
164 CVBS
165 DACVDDB Power 3.3V power pin for video DAC circuitry
166 DACVSSB Ground Ground pin for video DAC circuitry
167 DACVDDA Power 3.3V power pin for video DAC circuitry
168 Y/G
169 DACVSSA Ground Ground pin for video DAC circuitry
170 B/CB/PB
171 R/CR/PR
101 PRST#
100 ICE
193 XTALO Output 27MHz crystal output
Output
4mA, SR
Output
4mA, SR
Output
4mA, SR
Output
4mA, SR
Input
PU, SMT
Input
PD, SMT
Analog composite output
Green, Y, SY, or CVBS
Blue, CB/PB, or SC
Red, CR/PR, CVBS, or SY
MISC (12)
Power on reset input, active low
Microcontroller ICE mode enable
8
Page 20
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
DRAM address 4
DRAM address 5
DRAM address 6
DRAM address 7
DRAM address 8
DRAM address 9
DRAM address bit 11
DRAM address 3
DRAM address 2
DRAM address 1
DRAM address 0
DRAM address 10
DRAM bank address 1
DRAM bank address 0
DRAM chip select, active low
DRAM row address strobe, active low
9
Page 21
MTK Confidential A
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389E
Pin Main Alt. Type Description
Output
Output
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
InOut
DRAM column address strobe, active low
DRAM Write enable, active low
Data mask 1
DRAM data 8
DRAM data 9
DRAM data 10
DRAM data 11
DRAM data 12
DRAM data 13
DRAM data 14
DRAM data 15
DRAM data 0
DRAM data 1
DRAM data 2
DRAM data 3
DRAM data 4
DRAM data 5
DRAM data 6
DRAM data 7
Data mask 0