Akai 29ct24fs schematic

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COLOUR TV SET
Models:
29CT24FS
29CT71FS
SERVICE MANUAL
www.akai.ru
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TABLE OF CONTENTS
SPECIFICATIONS............................................................................................................. 1
SAFETY INSTRUCTIONS AND MAINTENANCE......................................... 2
X-RAY RADIATION PRECAUTION.......................................................................................... 2
SAFETY PRECAUTION.............................................................................................................. 2
PRODUCT SAFETY NOTICE.................................................................................................... 3
SAFETY SYMBOL DESCRIPTION........................................................................................... 3
MAINTENANCE............................................................................................................................ 4
ADJUSTMENTS.................................................................................................................. 5
SET-UP ADJUSTMENTS ........................................................................................................... 5
CIRCUIT ADJUSTMENTS.......................................................................................................... 8
STRUCTURE AND CHASSIS FUNCTION DESCRIPTION.................... 18
STRUCTURE BLOCK DIAGRAM ............................................................................................. 18
BLOCK DIAGRAM FOR SUPPLY VOLTAGE SYSTEM ...................................................... 19
CHASSIS DESCRIPTION ...........................................................................................................20
SERVICE DATA .................................................................................................................21
TECHNICAL DATA OF KEY ICS ...............................................................................................21
SERVICE DATA OF KEY ICS ....................................................................................................43
REPLACEMENT OF PARTS.......................................................................................................46
APPENDIX
1. CIRCUIT DIAGRAM
2. FINAL ASSEMBLY DIAGRAM
3. FINAL WIRING DIAGRAM
4. PRINTED CIRCUIT BOARD LAYOUTS
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SPECIFICATIONS
Number 29CT24FS, 29CT71FS
Model
SERVICE MANUAL
Table 1 Specifications
Color system
RF system
system B/G, D/K
Sound
Video system PAL4.43, SECAM, NTSC3.58, NTSC4.43 (50/60Hz)
Programs preset 236(0-235)
Antenna input
Picture tube (Approx.)
Effective screen dimensions
Video/Audio inputs
Power source 170-260V ~, 50Hz
Weight (Approx.) 30kg
Video/Audio outputs
Rated power consumption 110 W
Designs and specifications are subject to change without notice.
Composite-3; component-1; S-video-1
PAL, SECAM
75 (unbalanced)
478 363mm
Composite - 1
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INSTRUCTIONS FOR SERVICE SAFETY AND MAINTENANCE
WARNING: BEFORE SERVICING THIS CHASSIS, READ THE “X-RAY RADIATION PRECAUTION”, “SAFETY PRECAUTION”AND “PRODUCT SAFETY NOTICE”INSTRUCTION BELOW.
X-RAY RADIATION PRECAUTION
1. The EHT must be checked every time the TV is serviced to ensure that the CRT does not emit
X-ray radiation as result of excessive EHT voltage. The maximum EHT voltage permissible in
any operating circumstances must not exceed the rated value. When checking the EHT, use
the High Voltage Check procedure in this manual using an accurate EHT voltmeter.
2. The only source of X-RAY radiation in this TV is the CRT. The TV minimizes X-RAY radiation,
which ensures safety during normal operation. To prevent X-ray radiation, the replacement
CRT must be
3. Some components used in this TV have safety related characteristics preventing the CRT from
emitting X-ray radiation. For continued safety, replacement component should be made after
referring the PRODUCT SAFETY NOTICE below.
4. Service and adjustment of the TV may result in changes in the nominal EHT voltage of the
CRT anode. So ensure that the maximum EHT voltage does not exceed the rated value after
service and adjustment.
identical to the original fitted as specified in the parts list.
SAFETY PRECAUTION
WARNING: REFER SERVICING TO QUALIFIED SERVICE PERSONNEL ONLY.
1. The TV has a nominal working EHT voltage. Extreme caution should be exercised when
working on the TV with the back removed.
1.1 Do not attempt to service this TV if you are not conversant with the precautions and procedures
for working on high voltage equipment.
1.2 When handling or working on the CRT, always discharge the anode to the TV chassis before
removing the anode cap in case of electric shock.
1.3 The CRT, if broken, will violently expel glass fragments. Use shatterproof goggles and take
extreme care while handling.
1.4 Do not hold the CRT by the neck as this is a very dangerous practice.
2. It is essential that to maintain the safety of the customer all power cord forms be replaced
exactly as supplied from factory.
3. Voltage exists between the hot and cold ground when the TV is in operation. Install a suitable
isolating transformer of beyond rated overall power when servicing or connecting any test
equipment for the sake of safety.
4. When replacing ICs, use specific tools or a static-proof electric iron with small power (below
35W).
5. Do not use a magnetized screwdriver when tightening or loosing the deflection yoke assembly
to avoid electronic gun magnetized and decrement in convergence of the CRT.
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6. When remounting the TV chassis, ensure that all guard devices, such as nonmetal control
buttons, switch, insulating sleeve, shielding cover, isolating resistors and capacitors, are
installed on the original place.
7. Replace blown fuses within the TV with the fuse specified in the parts list.
8. When replacing wires or components to terminals or tags, wind the leads around the terminal
before soldering. When replacing safety components identified by the international hazard
symbols on the circuit diagram and parts list, it must be the company-approved type and must
be mounted as the original.
9. Keep wires away from high temperature components.
PRODUCT SAFETY NOTICE
CAUTION: FOR YOUR PROTECTION, THE FOLLOWING PRODUCT SAFETY NOTICE SHOULD BE READ CAREFULLY BEFORE OPERA TING AND SERVICING THIS TV SET.
1. Many electrical and mechanical components in this chassis have special safety-related
characteristics. These characteristics are often passed unnoticed by a visual inspection and
the X-ray radiation protection afforded by them cannot necessarily be obtained by using
replacements rated at higher voltages or wattage, etc. Components which have these special
safety characteristics in this manual and its supplements are identified by the international
hazard symbols on the circuit diagram and parts list. Before replacing any of these components
read the parts list in this manual carefully. Substitute replacement components which do not
have the same safety characteristics as specified in the parts list may create X-ray radiation.
2. Do not slap or beat the cabinet or CRT, since this may result in fire or explosion.
3. Never allow the TV sharing a plug or socket with other large-power equipment. Doing so may
result in too large load, causing fire.
4. Do not allow anything to rest on or roll over the power cord. Protect the power cord from being
walked on, modified, cut or pinched, particularly at plugs.
5. Do not place any objects, especially heavy objects and lightings, on top of the TV set. Do not
install the TV near any heat sources such as radiators, heat registers, stove, or other
apparatus that produce heat.
6. Service personnel should observe the SAFETY INSTRUCTIONS in this manual during use and
servicing of this TV set. Otherwise, the resulted damage is not protected by the manufacturer.
SAFETY SYMBOL DESCRIPTION
The lightning symbol in the triangle tells you that the voltage inside this product
may be strong enough to cause an electric shock. Extreme caution should be
exercised when working on the TV with the back removed.
This is an international hazard symbol, telling you that the components identified
by the symbol have special safety-related characteristics.
FDA This symbol tells you that the critical components identified by the FDA marking
have special safety-related characteristics.
UL
This symbol tells you that the critical components identified by the UL marking
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have special safety-related characteristics.
C UL
This symbol tells you that the critical components identified by the C-UL marking
have been evaluated to the UL and C-UL standards and have special safety-related characteristics.
VDE
MAINTENANCE
1. Place the TV set on a stable stand or base that is of adequate size and strength to prevent it
2. Do not install the TV set in a place exposed to rain, water, excessive dust, mechanical
3. Allow enough space (at least 10cm) between the TV and wall or enclosures for proper
4. Slots and openings in the cabinet should never be blocked by clothes or other objects.
5. Please power off the TV set and disconnect it from the wall immediately if any abnormal
6. Unplug the TV set from the wall outlet before cleaning or polishing it. Use a dry soft cloth for
This symbol tells you that the critical components identified by the VDE marking
have special safety-related characteristics.
from being accidentally tipped over, pushed off, or pulled off. Do not place the set near or
over a radiator or heat register, or where it is exposed to direct sunlight.
vibrations or impacts.
ventilation.
condition are met, such as bad smell, belching smoke, sparkling, abnormal sound, no
picture/sound/raster. Hold the plug firmly when disconnecting the power cord.
cleaning the exterior of the TV set or CRT screen. Do not use liquid cleaners or aerosol
cleaners.
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ADJUSTMENTS
SET-UP ADJUSTMENTS
The following adjustments should be made when a complete realignment is required or a new
picture tube is installed.
Perform the adjustments in the following order:
1. Color purity
2. Convergence
3. White balance
Notes:
The purity/convergence magnet assembly and rubber wedges need mechanical
positioning. Refer to Fig1, 2.
For some picture tubes, purity/ convergence adjustments are not required.
1. Color Purity Adjustment
Preparation:
Before starting this adjustment, adjust the vertical sync, horizontal sync, vertical amplitude and
focus.
1.1 Face the TV set north or south.
1.2 Connect the power plug into the wall outlet and turn on the main power switch of the TV set.
1.3 Operate the TV for at least 15 minutes.
1.4 Degauss the TV set using a specific degaussing coil.
1.5 Set the brightness and contrast to maximum.
1.6 Counter clockwise rotate the R /B low brightness potentiometers to the end and rotate the
green low brightness potentiometer to center.
1.7 Receive green raster pattern signals.
1.8 Loosen the clamp screw holding the deflection yoke assembly and slide it forward or backward
to display a vertical green zone on the screen. Rotate and spread the tabs of the purity magnet
around the neck of the CRT until the green zone is located vertically at the center of the screen.
1.9 Slowly move the deflection yoke assembly forward or backward until a uniform green screen is
obtained.
1.10 Tighten the clamp screw of the assembly temporarily. Check purity of the red raster and blue
raster until purities of the three rasters meet the requirement.
2. Convergence Adjustment Preparation:
Before attempting any convergence adjustment, the TV should be operated for at least 15
minutes.
2.1 Center convergence adjustment
2.1.1 Receive dot pattern.
2.1.2 Adjust the brightness/contrast controls to obtain a sharp picture.
2.1.3 Adjust two tabs of the 4-pole magnet to change the angle between them and red and blue
vertical lines are superimposed each other on the center of the screen.
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Fig. 1
Yok
2.1.4 Turn both tabs at the same time keeping the angle constant to superimpose red and blue
horizontal on the center of the screen.
2.1.5 Adjust two tabs of the 6-pole magnet to superimpose red/blue line and green line.
2.1.6 Remember red and blue movement. Repeat steps 2.1.3)2.1.5) until optimal convergence is
obtained.
2.2 Circumference convergence adjustment
2.2.1 Loosen the clamp screw holding the deflection yoke assembly and allow it tilting.
2.2.2 Temporarily put the first wedge between the picture tube and deflection yoke assembly.
Move front of the deflection yoke up or down to obtain better convergence in circumference.
Push the mounted wedge in to fix the yoke temporarily.
2.2.3 Put the second wedge into bottom.
2.2.4 Move front of the deflection yoke to the left or right to obtain better convergence in
circumference.
2.2.5 Fix the deflection yoke position and put the third wedge in either upper space. Fasten the
deflection yoke assembly on the picture tube.
2.2.6 Detach the temporarily mounted wedge and put it in either upper space. Fasten the
deflection yoke assembly on the picture tube.
2.2.7 After fastening the three wedges, recheck overall convergence and ensure to get optimal
convergence. Tighten the lamp screw holding the deflection yoke assembly.
3. White Balance Adjustment
Generally, white balance adjustment is made with professional equipment. It’s not practical to
get good white balance only through manual adjustment. For TVs with I
the bus data to adjust white balance.
2
C bus control, change
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Fig. 2
4-pole Magnet Movement 6-pole Magnet Movement
Center Convergence by Convergence Magnets
Incline the Yoke Up (or Down) Incline the Yoke Right (or Left)
Circumference Convergence by DEF Yoke
Fig.3
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CIRCUIT ADJUSTMENTS
Preparation:
Circuit adjustments should be made only after completion of set-up adjustments.
Circuit adjustments can be performed using the adjustable components inside the TV set. For TVs
2
with I
C bus control, first change the bus data.
1. Degaussing
A degaussing coil is built inside the TV set. Each time the TV is powered on, the degaussing
coil will automatically degauss the TV. If the TV is magnetized by external strong magnetic field,
causing color spot on the screen, use a specific degausser to demagnetize the TV in the
following ways. Otherwise, color distortion will be shown on the screen.
1.1 Power on the TV set and operate it for at least 15 minutes.
1.2 Receive red full-field pattern.
1.3 Power on the specific degausser and face it to the TV screen.
1.4 Turn on the degausser. Slowly move it around the screen and slowly take it away from the TV.
1.5 Repeat the above steps until the TV is degaussed completely.
2. Confirmation and Adjustment for Voltage
Caution: +B voltage has close relation to high voltage. To prevent X-ray radiation, set +B voltage to the rated value.
2.1 Power on the TV and receive Philips test pattern.
2.2 Check the resistors and coils for being burned. (If the fuse is burned out, do not power on the
TV again until the cause is found out.)
2.3 ---Measure voltages of test points with the digital voltmeter. Measure the CRT high voltage with
the high-voltage testing equipment and heater voltage with the high-frequency effective
voltmeter. The rated values are shown as below.
Table 2
Test Point Voltage (V) Test Point Voltage (V)
Negative of VD871
Positive of C879 5±0.5V Positive of C412 9±0.5V Positive of C882 9±0.5V Negative of VD872 16±1V Positive of C117 32±1V Negative of VD873 16±1V Negative of VD402A 12.5±1V Negative of VD874 16±1V Negative of VD404 27±1.5V Negative of VD403 190±5.0V Heater 6.3+0.2\-0.3Vrms CRT anode 29.5±1.2KV
3. High Voltage Inspection
Caution: No high voltage adjustment components inside the chassis. Please perform high voltage inspection in the following ways.
3.1 Connect a precise static high voltmeter to the second anode (inside the high voltage cap) of the
CRT.
3.2 Plug in the supply socket (150-250V, AC) and turn on the TV. Set the brightness and contrast
82V±5V in standby 134±1.5V in use
Positive of C414 5±0.5V
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to minimum (0μA).
3.3 The high voltage reading should be less than the limited EHT voltage.
3.4 Change the brightness from minimum to maximum, and ensure high voltage not beyond the
limitation in any case.
Nominal EHT voltage: 29.5±1.2KV Limited EHT voltage: 32KV
4. Focus Adjustment
Caution: Dangerously high voltages are present inside the TV. Extreme caution should be exercised when working on the TV with the back removed.
4.1 After removing the back cover, look for the FBT on the main PCB. There should be a FCB on
the FBT.
4.2 Power on the TV and preheat it for 15 min.
4.3 Receive a normal TV signal. Rotate knob of the FCB until you get a sharp picture.
Before Adjusting After Adjusting
Fig. 4
5. Safety Inspection
5.1 Inspection for insulation and voltage-resistant
Perform safety test for all naked metal of the TV. Supply high voltage of 3000V AC, 50Hz (limit
current of 10mA) between all naked metal and cold ground. Test every point for 3 sec. and
ensure no arcing and sparking.
5.2 Requirements for insulation resistance
Measure resistance between naked metal of the TV and feed end of the power cord to be
infinity with a DC-500 high resistance meter and insulation resistance between the naked metal
and degaussing coil to be over 20MΩ.
6. SERVICE mode
6.1 To enter the SERVICE mode
Set the volume to 0 by the remote control. Then press and hold the MUTE button on the
remote control and MENU button on the TV at the same time for over 2 seconds. In the S mode,
ress the POWER button to quit the S mode. p
S
(Sis red and other items are yellow.)
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Use the ↓/↑buttons on the remote control to highlight an adjustment and the ←/→ buttons
to adjust it.
The POS+/-,↑/↓/←/→,1~6, RECALL, VOL+/-, MUTE and POWER buttons on the remote
control function in the S mode, but 100+, 7, 8, 9 and 0 buttons not.
6.2
Adjustments for Service mode and design mode
Table 3
Bit Function Description Status
MODE0
MODE1
MODE2
Bit7.6 Audio system options (available during auto search
Bit5 Function switchover for CPU’s Pin 61 0: External mute 1: Audio system switchover Bit4 V MUTE When changing channels: 0: Y- mute 1: RGB mute Bit3 Bit2 Bit1 SECAM 0: No 1:Yes Bit0 Fixed to 00 Bit7 Write-in LOGO option 0: No 1:Yes Bit6 Power-on modes 0: Memory on 1: Soft on Bit5 Step length setting for lighting up gradually during
Bit4 Screen saver setting 0: No 1: Yes Bit3 M option 0: No 1: Yes Bit2 D/K option 0: No 1: Yes Bit1 I option 0: No 1: Yes Bit0 B/G option 0: No 1: Yes Bit7 Arabic numeral 0: Yes 1: No Bit6 DVD setting bit for AV board TC90L01 0: No 1: Yes Bit5 Tilt correction setting bit 0: No 1: Yes Bit4 SVMin PICTURE menu 0: No 1: Yes Bit 3 TA1343/NICAM woofer output setting 0: Mono output 1: Overlapped to main channel Bit 2 “WOOFER”in SOUND menu 0: No 1: Yes Bit 1 Black-screen time setting 0: Short time 1: If OPT.2 = 1, long time; OPT.2 = 0, short
Bit.0 BBE AGC option 1: 300mv 0: 150mv
and use of AUTO button)
SECAM gate pulse width
power-on
00: B/G 01: I 10: D/K 11: M
00: 2.2μS 01: 2.0μS 10:1.8μS 11: SECAM decoding disabled
1Large step 0: Small step
time
MODE3
BIT 7 Relay switch option 1: Yes 0: No BIT 6 Instant power-on option 1: Yes 0: No BIT 5.4 Fixed to 00
BIT 3 BBE/SRS IC 1: Yes 0: No BIT 2
BIT 1
TA1218 Multi AV switch options
BIT 0 BIT 1 BIT2
0 0 0 TV - AV1(S) - AV2 - AV3(S) - DVD 0 0 1 TV - AV1(S) - AV2 - AV3(S) 0 1 0 TV - AV1(S) - AV2 - DVD
0 1 1 TV - AV1(S) - AV2
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(continued)
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BIT 0
MODE4
LANG-OPT When only with
single language option, reset the CPU to enable the options.
BIT 7 TC90A49 option 0: No 1: Yes BIT 6 TA1343 option 0: No 1: Yes
BIT 5 TC90L01 option 0: No 1: Yes BIT 4 TA1218 option 0: No 1: Yes BIT 3 NA BIT 2 NJW1161 option 0: No 1: Yes BIT 1 NJW1160 option 0: No 1: Yes BIT 0 NJW1137 option 0: No 1: Yes BIT 7 Arabic 0: No 1: Yes
BIT 6 Farsi 0: No 1: Yes BIT 5 Malay 0: No 1: Yes BIT 4 Indonesian 0: No 1: Yes BIT 3 Russian 0: No 1: Yes BIT 2 German 0: No 1: Yes BIT 1 French 0: No 1: Yes BIT 0 English 0: No 1: Yes
1 0 0 TV - AV1(S) - AV3(S) - DVD 1 0 1 TV - AV1(S) - AV3(S) 1 1 0 TV - AV1(S) - DVD 1 1 1 TV - AV1
LANG-OUT Ex-factory language options with AUTO key 00: English 01: French 02: German 03: Russian
04: Indonesian 05: Malay 06: Farsi 07: Arabic
OPT
OSD Horizontal position of OSD
RCUT R cut off GCUT G cut off BCUT B cut off GDRV G drive
BDRV B drive
Bit 7 Interval between relay on and off 0: No 1: Yes Bit 6 VCO adjustments 0: PIF VCO functions (PIFVCO = 10) during auto search and
search 1: PIFVCO = 10 during turn-onand PIFVCO = 00 in Normal
mode Bit 5 Audio processing 1: Yes 0: No Bit 4 Large-amplitude AFT switch when no signal 1: Off 0: On
Bit 3 Audio gain switch 1: Off 0: On Bit 2 Usage of Y-mute 0: No 1: Yes Bit 1 Thailand B/G (5.74M) 1: Yes 0: No
Bit 0 Single audio system 1: Yes 0: No
CNTX Contrast Max.
BRTC Brightness center
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COLC Color center (for NTSC) TNTC Tint center (for NTSC) TNTCAV Tint center (for NTSC IN AV)
COLP Color center (for PAL) COLS Color center (for SECAM) DCOL DVD color SCOL Sub color center (for DVD) SCNT Y- sub contrast
CNTC Contrast center CNTN Contrast Min. BRTX Brightness Max. BRTN Brightness Min. COLX Color Max. COLN Color Min. TNTX Tint Max. TNTN Tint Min. ST3 Sharpness center for NTSC 3.58 (TV) SV3 Sharpness center for NTSC 3.58 (VIDEO) ST4 Sharpness center for other color system (TV)
SV4 Sharpness center for other color system (VIDEO) SVD Sub Sharpness center in DVD
ASSH Asymmetry sharpness
SHPX Sharpness Max. SHPN Sharpness Min. TXCX Text RGB in user contrast Max. RGCN Text RGB in user contrast Min.
ABL
DCBS
CLTO Chroma data
(TV & not M)
BIT 5 Y peak limiter 0: Off 1: On BIT 4 OSD ABL 0: Active 1: Inactive BIT 3.2 ABL start point
BIT 1.0 ABL gain
BIT 7 Blank SW 0: H, V blanking on 1: H, V blanking off Bit 6
Bit 5.4 OSD level
Bit 3.2 Y gamma
Bi t 1.0 Black stretch
BIT 7 Killer off BIT 6 P/N ID BIT 5 C gamma 0: Color gamma off 1: On
00: ABL start point: 0V 01: -0.15V 10: -0.30V 11: -0.45V
00: -0.2V 01: -0.4V 10: -0.6V 11: -0.8V
00: OSD level, 80 IRE 01: 70IRE 10: 60IRE 11: 50IRE
00: Off 01: Y point 90 IRE, Gain –3dB 10: 80IRE 11: 70IRE
00: Off 01: Black stretch point, 25 IRE 10: 35IRE 11: 45IRE
0: Normal 1: Always killer off 0: PAL/ NTSC killer sensitivity, 1mVpp 1: 10mVpp
(continued)
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CLTM (TV & M)
CLVD(DVD)
CLVO(50hz) /CLVM(60hz) (VIDEO)
DEF BIT0 = 0: V AGC reference depends on YC VCC; BIT0 = 1: V AGC reference depends on integrated regulator
SECD No use HPOS 50Hz horizontal phase VP50 V phase (50Hz) HIT V size HPS Adjusting difference between horizontal centers in PAL and NTSC
VP60 V phase (60Hz) HITS VLIN V-linearity VSC V-S correction VLIS VSS DPC EW parabola DPCS HIT69 DPC69 HIT69S DPC69S KEY Trapezium KEYS WID H size WIDS ECCT EW corner top ECCB EW corner bottom VEHT V EHT gain HEHT H EHT gain SBY Use in SECAM SRY Use in SECAM BRTS RFAGC RF AGC
BIT 4.3 NTSC matrix
BIT 2.1.0 Y DL
Adjusting difference between vertical amplitudes in PAL and NTSC
Adjusting difference between vertical linear in PAL and NTSC Correction for shift data of 50 Hz/ 60 Hz
Shift data of EW parabola Vertical amplitude in 16:9 mode (PAL) EW parabola 16:9 in 16:9 mode (PAL) Vertical amplitude in 16:9 mode (NTSC) EW parabola 16:9 in 16:9 mode (NTSC)
Shift data of trapezium
Shift data of H size
Sub brightness (difference)
00: USA (105 degree) 01: Japan (93 degree) 10: DVD 11:
000: -40 nsec 001: 0 010: 40 nsec 011: 80 nsec 100: 120 nsec 101: 160 nsec 110: 200 nsec 111: 240 nsec
00: -3usec 10: 0 1F: +3usec 0: V phase delay, 0H 7: 7H 00: -50% 20: 0% 3F: 50%
0: V phase delay, 0H 7: 7H
0: -15% 8: 0% F: 15% 0: -16% 8: 0% F: 16%
00: 0Vpp 20: 1.4Vpp 3F: 2.8Vpp
00: -13% 20: 0% 3F: 13%
00: 1.5V V20: 4V 3F: 6.5V
00: -1.5V 10: 0V 1F: 1.5V 00: -1.5V 10: 0V 1F: 1.5V 0: 0% 4: 5% 7: 10% 0: 0% 4: 5% 7: 10%
00: IF mute 01: 65dBu 3F: 100dBu
(continued)
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Data Description
BIT 3.2
HAFC
BIT 1.0
V01 Volume output data at 1% V25 Volume output data at 25% V50 Volume output data at 50% V100 Volume output data at 100% Woofer TA1343 woofer Max. STAT No use
BIT 7 Readjust VCO when selecting position 0: Enable 1: Disable
FLG0
FLG1
REFP AKB pulse position
RSNS R SENSE 00: x 0 20: x 0.5 3F: x 1.0
BIT 2 N buzz cancel 0: Nyquist buzz cancel, on 1: Off
BIT 1 AFT window SW
BIT 0 Over modulation 0: Normal 1: PIF over modulation switch on BIT 5 MIX GAIN 0: SIF 1MHz convert gain, low gain 1: High gain BIT 4 Sync separation. 0: Sync separation level 40% 1: 36%
AFC gain (in VIDEO mode)
AFC gain (in TV mode)
0 0 3 1 0 1 4/7 2/7 1 0 4/3 1 1 1 Off Off
Data Description 0 0 3 1
0 1 4/7 2/7 1 0 4/3 1 1 1 Off Off
0: Wide (-/+ 250kHz) AFT sensitivity, for channel search 1: Narrow (83kHz) For normal operation
000: 0H 001: 1H 010: 2H 011: 3H 100: 4H 101: 5H 110: 6H 111: 7H
Blanking Period Picture Period
Blanking Period Picture Period
GSNS G SENSE 00: x 0 20: x 0.5 3F: x 1.0 BSNS B SENSE 00: x 0 20: x 0.5 3F: x 1.0
MOD
STBY
SVM BIT.4
SVM1 Data when SVM off SVM3 Data when SVM on
VBLK
VCEN Vertical centering 00: -32% 20: 0% 3F: 30%
UCOM
Bit 6.5.4 PIF FREQUENCY 001: 45.75 MHz 011: 38.9 MHz 100: 38.0 MHz
Bit 1.0 AKB MODE
BIT 3.2 VCD STANDBY
BIT 1.0 IF Standby
BIT 3.2 V blanking stop point
BIT 1.0 V blanking start point
BIT 1.0 Internal ADC
BIT5.4.3
Improving NTSC color signal-to-noise ratio
00: AKB off 01: ACB (cutoff: align to targets) 10: ADB (drive: align to targets) 11: AKB (cutoff/drive: align to targets)
00: Normal 01: Normal 10: Normal 11: VCD Standby
00: Normal 01: Normal 10: Normal 11: IF Standby
1:co max=1(-0.65 to +0.85) 0: co max=0(cutoff range:
-0.65 to +0.65)
00: 310H(50hz) 263H(60hz) 01: 299H(50hz) 254H(60hz) 10: 295H(50hz) 250H(60hz) 11: 291H(50hz) 246H(60hz)
00: 23H(50hz) 22H(60hz) 01: 33H (50hz)30H(60hz) 10: 37H (50hz)34H(60hz) 11: 41H(50hz) 38H(60hz)
00: GND 01: R output 10: B output 11: Monitor RF AGC via ADC
Available range: 000….011
(continued)
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VTST No use PYNX Normal H.SYNC Max. 0-----------3F
PYNN Normal H.SYNC Min. 0-----------3F PYXS ASM/Search H.SYNC Max. 0-----------3F PYNS ASM/Search H.SYNC Min 0-----------3F
BASC BASX TREC BALC Balance volume Center
BAS1 Bass in MUSIC mode setting TRE1 Treble in MUSIC mode setting WFL1 Woofer in MUSIC mode setting
Bass volume Center Bass volume Max. Treble volume Center
BAS2 TRE2 Treble in NEWS mode setting WFL2 Woofer in NEWS mode setting
BAS3 Bass in THEATRE mode setting TRE3 Treble in THEATRE mode setting WFL3 Woofer in THEATRE mode setting
WON1 TA1343 Max. woofer setting. The bigger the setting the smaller Max. woofer. WON2 NVOL NICL NICAM->MONO level
NICH MONO->NICAM level
NOIS
VATT COM1
(TC90A49)
COM2 (TC90A49)
B1(12345)
B2(12345)
B3(12345)
BBE OSDF OSD frequency setting
Bass in NEWS mode setting
Woofer linear setting Prescale NICAM
BIT 2 BIT 7-BIT 0 Audio ATT 00:-85DB or less 7F:0DB (7 BITS)
BIT 3 Pedestal clip 0: On 1: Off BIT 2.1.0 VENH2.1.0 000: 0db(x1) …… 111: 3.52db(x1.5)
BIT 7.6.5.4 Set vertical enhancer non-linear point 0000: 4LSB …… 1111: 64LSB BIT 3 Set Y output horizontal peaking gain 0: 1.5dB 1: 3.0dB BIT2 Set Y output horizontal peaking on/off 0: On 1: Off
BIT 1.0 Set vertical enhancer coring level 00: 0LSB …… 11: 3LSB NICAM chip five-equalizer data when the sound mode set to MUSIC:
B11 (for 120Hz) B12 (for 500 Hz) B13 (for 1.5KHz) B14 (for 5KHz) B15 (for 10KHz) NICAM chip five-equalizer data when the sound mode set to NEWS:
B21 (for 120Hz) B22 (for 500 Hz) B23 (for 1.5KHz) B24 (for 5KHz) B25 (for 10KHz) NICAM chip five-equalizer data when the sound mode set to THEATRE:
B31(for 120Hz) B32 (for 500 Hz) B33 (for 1.5KHz) B34 (for 5KHz) B35 (for 10KHz) Highest four bitsBBE contour (0dB to 15dB); Lowest four bits: BBE process (0dB to 15dB)
AFC gain data setting in TV mode: 1: Adjust AFC gain in the lowest two bits of HAFC 0: With weak signal received, AFC gain = 0x10; with strong signal received, AFC gain = 0x00 Criterion of signal strength: >NOIS: Weak signal <= NOIS: Strong signal
15
Page 18
6.3 Adjustments and Bus data
Table 4
Item Data Item Data Item Data Item Data
* MODE0 A6 CNTC 40 # HITS 04 GSNS 00
* MODE1 35 CNTN 08 # VLIN 0C BSNS 00
* MODE2 5D BRTX 20 # VSC 06 MOD 40
* MODE3 00 BRTN 20 # VLIS 00 STBY 00
* MODE4 20 COLX 20 # VSS 01 SVM 00
LANG-OPT 09 COLN 00 # HIT69 14 SVM1 00
LANG-OUT 03 TNTX 28 # DPC69 10 SVM3 06
COM1 04 TNTN 28 # DPC69 18 VBLK 00
COM2 3F ST3 30 # KEY 22 # VCEN 20
BBE 9B SV3 30 # WID 16 UCOM 00
C-MT 99 ST4 28 # HIT69S 01 VTST 00
C-MTB 44 SV4 30 # DPC69S 01 PYNX 2E
C-MB F9 SVD 30 # DPCS 03 PYNN 18
C-MBB 36 ASSH 07 # KEYS 00 PYXS 22
C-N 9E SHPX 10 # WIDS 02 PYNS 1E
C-NB 36 SHPN 10 # ECCT 08 BASC 40
OSDF 70 TXCX 3F # ECCB 08 BASX 70
# OSD 30 RGCN 1F VEHT 04 TEEC 40
* OPT 00 ABL 21 HEHT 01 BALC 40
# RCUT 30 DCBS 16 # SBY 08 BAS1 3C
# GCUT 30 CLTO 3F # SRY 08 TRE1 40
# BCUT 30 CLTS 30 # BRTS 17 WFL1 46
# GDRV 40 * CLTM 23 # RAGC 18 BAS2 20
# BDRV 40 CLVO 3F HAFC 08 TRE2 50
CNTX 7F * CLVM 20 * V01 25 WFL2 00
BRTC 40 CLVD 30 * V25 3A BAS3 20
COLC 28 DEF 01 * V50 4A TRE3 40
TNTC 30 AKB 00 * V100 7F WFL3 20
(continued)
16
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TNTCAV 48 SECD 08 * WOOFER 72 * WON1 00
COLP 00 # HPOS 0B STST 00 WON2 00
COLS 40 # VP50 04 FLG0 06 NOIS 01
DCOL 40 # HIT 15 FLG1 18 VATT 5D
SCOL 00 # HPS 03 REFP 00
SCNT 09 # VP60 02 RSNS 00
Notes:
The data sheet may differ dependent on different models. The data sheet may differ dependent on different CRTs for the same model. The data marked with *can be adjusted.
17
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p
A
STRUCTURE AND CHASSIS FUNCTION DESCRIPTION
1. STRUCTURE BLOCK DIAGRAM
Circuit for
Buttons on
the TV
Fig. 5 Structure Block Diagram of CN -18ED Chassis
Remote
Control
Remote
Sensor
TDQ-5B
-6M
Tuner
Sound Power
Amplifier
TDA8944J (N603)
Preamplifier
V101
IF
SAW
Filter
CH08T0605 (TMPA8827PSNG)
Small Signal Processor &MCU
Y/C Audio
L
R Speaker
Speaker
S AV1 AV2
TC90L01N (N901)
EEPROM
AT24C16
(N230)
TV/Video S witch
(N210)
ABL
2 IN1 IC
Second
Sound Tra
VIDEO R L
Side AV
Switch
AV Output
VM
Amplifier
Vertical
Out put
Li ene Driv
V404
LA78041
Video
Amplifier
Q901-906
Horizon
Outp
V405
ut
tal
V202
VM
Processing
Circuit
VM
To VM Coil
Degau
Circuit
ssing
FBT
T401
HV
FV
SV
CRT
16VH
135V
150-250v
C 50Hz
Interferen
Circuit
oce-pro f
Power
Circuit
STR-G8
656
(N801)
5V-1
9V-1
16VB
16VC
18
Page 21
A
A
A
A
A
p
C882
r
A
A
A
A
A
A
2. BLOCK DIAGRAM FOR SUPPLY VOLTAGE SYSTEM
150-250v
C 50Hz
Degau sing s
Circuit
P801 P802
CP801 CP802
Interference-
proof
Circuit
VD810
Bridge
Rectifier
VD807-
(N801),
T801 etc.
Regulator
STR-G8656
Switch
N802
Sampling
Fig. 5 Structure Block Diagram of CN -18ED Chassis Supply Voltage System
mplifier
Regulator
V801 VD875
16VC
N603
Sound Powe
Regul
N871
ator
mpl
ifier
9V-1
5V-1
LED RMT
2 in 1
N210
Video
mplifier
Circuit
N603
Sound
Power
mplifier
2 in 1
N210
Second
Sound Trap
Tuner
101
V Switch
NICAM
Regulator
N401
5V-2
Sound
2 in 1
Preamplifi
IF
er
N210
Power
mplifier
Including
N901 etc.
V Switch
Video
m lifier
Vertical
Output
N301
E/W
Correction
Circuit
Second
Sound
NICAM
Trap
16VB
EEPROM
N402
Circuit
9V-2
16VH
Line Drive
V404
Regulator
12V
VM
135V
Regulator
VD101
33V
Tuner
Horizontal
Output V405
FBT
T401
27V
EHT
Protection
101
HV FV SV
19
Page 22
3 CHASSIS DESCRIPTION
General Description
CN-18ED chassis is applied in PF2939E. By use of Toshiba V/C/D-MCU 2IN1 IC for TV small
signal processing and bus control, the chassis enables TV tuning, adjustment, control and
picture correction, featuring high-integration, high-performance-to-price ratio and high-reliability
and compact circuit with fewer external components. The chassis, widely used in small and
medium TVs, provides much more convenience for manufacturing and technical service. It
includes:
2IN1 IC TMAP8827PSNG with function of E/W correction for PAL/NTSC/SECAM small
signal processing and bus control
EEPROM AT24C16 for data memory
LA78040 /LA78041for vertical output power amplifying
TDA8944J (mono) for audio power amplifying
Thick-film IC STR-G8656 for power circuit adjustment and control
AV control TC90L01N
The following features are available in the chassis:
Color systems: PAL/ SECAM
Sound systems: D/K B/G
236 programs preset
Multilingual on screen display
2
I
C bus control
NICAM/AV stereo
Selectable picture/sound modes
Intelligent lock
Message board
Telephone directory
Game
Biorhythm
Calendar inquiry
The chassis mainly uses the following ICs and assemblies.
Table 5 Key ICs and Assemblies
Serial No. Position Type Description
1 N230 AT24C016 EERPOM 2 N210 CH08T0605 (TMPA8827PSNG) 2IN1 IC (Small signal processor + micro control (UOC)) 3 N603 TDA8944J Stereo audio power amplifier 4 N301 LA78040/LA78041 Vertical scan output stage circuit 5 N801 STR-G8656 Switch-mode power supply control 6 N901 TC90L01N AV switch 7 A101 TDQ-5B6-M Tuner
20
Page 23
SERVICE DATA
TECHNICAL DATA OF KEY ICS
1. TOSHIBA 2IN1 IC SERIES TMPA8827CMBNG /CPNG/CSNG
MCU AND SIGNAL PROCESSOR FOR A PAL/NTSC/SECAM TV
The TMPA8827CMNG /CPNG /CSNG is an integrated circuit
for a PAL/ NTSC/SECAM TV. A MCU and a TV signal processor
are integrated in a 64-pin shrink DIP package. The MCU
contains 8-bit CPU, ROM, RAM, I/O ports, timer/ counters, A/D
converters, an on-screen display controller, remote control
interfaces, IIC bus interfaces and the Closed Caption decoder.
The TV signal processor contains PIF, SIF, Video, multi-standard
chroma, Deflection, RGB processors. Fig. 6
MROM: TMPA8827CMNG (ROM: 32k)
TMPA8827CPNG (ROM: 48k)
TMPA8827CSNG (ROM: 64k)
OTP: TMPA8827PSNG
Weight: 8.85 g (typ.)
1) Features
MCU
High speed 8-bit CPU (TLCS-870/X series) Instruction execution time: 0.5 μs (at 8 MHz) (TMPA8827CMNG)
32-Kbytes ROM, 2-Kbytes RAM (TMPA8827CPNG) 48-Kbytes ROM, 2-Kbytes RAM (TMPA8827CSNG) 64-Kbytes ROM, 2-Kbytes RAM
ROM correction 12 I/O ports 14-bit PWM output 1 ch for a voltage
synthesizer
7-bit PWM output 1 channel 8-bit A/D converter 3 ch for a touch-key input
with key ON wake-up CIRCUIT
Remote control signal preprocessor Two 16-bit internal timer/counter 2 ch
CCD Decoder
Digital data slicer for NTSC
OSD
Clock generation for OSD display Font ROM characters: 384 characters Characters display: 32 columns × 12 lines Composition: 16 × 18 dots Size of character: 3 (line by line) Color of character: 8 (character by character) Display position: H 256/V 512 steps BOX function Fringing, smoothing, Italic, underline function Conform to CCD REGULATION Jitter elimination
21
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Two 8-bit internal timer/counter 2 ch Time base timer, watchdog timer 16 interrupt sources: external 5, internal 11 IIC bus interface (multi-master)
TV Processor
IF
Integrated PIF VCO aligned automatically Negative demodulation PIF Multi-frequency SIF demodulator without
external Tank-coil
Video
Integrated chroma traps Black stretch Y-gamma
Chroma
Integrated chroma BPFs PAL/NTSC/SECAM demodulation
RGB/Base-Band
Integrated 1 H base-band delay line Base-band TINT control Internal OSD interface Half-tone and transparent for OSD External YCbCr interface for DVD RGB cut-off/drive controls by bus ABCL (ABL and ACL combined)
Sync.Integrated fH ×640 VCO
DC coupled vert. ramp output (single) EW correction with EHT input
22
Page 25
2) Block Diagram
Fig. 7 Block diagram
23
Page 26
3) Basic Structure
3.1) Internal Connections
TMPA8827 has two pieces of IC chip in one package, using Multi-Chip-Package (MCP) technology.
One is a micro controller (MCU) and the other one is a signal processor (SP) for a color TV. There
are some internal connections between these two ICs for handling below signals.
Table 6
No.
1 SCL M to S Internal IIC bus SCL
2 SDA Bi-direction Internal IIC bus SDA
3 OSD R M to S OSD signal connection
4 OSD G M to S OSD signal connection
5 OSD B M to S OSD signal connection
6 OSD Y/BL M to S OSD display control
7 OSD I, CS OUT M to S OSD half-tone control/Test pattern signal
8 C-Video S to M Composite video signal from internal video switch, for CCD
9 C-Sync S to M Composite sync. signal from sync. Separator, for CCD
10 HD S to M Horizontal timing pulse regenerated from FBP, for OSD
11 VD S to M Vertical timing pulse from sync. Separator, for OSD
12 CLK M to S 8 MHz clock
13 AVDD M to S Reference voltage for C-Video interface
14 ADC S to M A/D converter monitoring RF-AGC, R-Y and B-Y
Signal Name Direction Description
Signal Name Direction Description
Functions of SP from MCU are controllable through the IIC bus of the internal connections.
3.2) Power Supply
TMPA8827 has some power supply and GND pins. Power supplies related MCU must be applied at
the first. Power supplies for H.VCC and TV D.VCC are the second with at least 100 ms delay after
MCU power ON. The other power supplies are the last, which are recommended to be supplied from
a regulator circuit using FBP.
3.3) Crystal Resonator
TMPA8827 requires only one crystal resonator, in stead that a conventional two-chip solution
requires two resonators at least, one for MCU and the other one for SP. An oscillation clock with the
crystal resonator of TMPA8827is supplied for MCU operation, PIF VCO automatic alignment,
alignment free AFT, chroma demodulation and horizontal oscillation. The oscillation frequency is
very important so that those of functions work properly, so that designing the oscillation frequency
accurately is required. The spec of crystal is recommended to be within
fosc: 8 MHz +/-20 ppm
ftemp: 8 MHz +/-40 ppm (-20°C to +65°C)
While RESET of MCU is active, the MCU function stops. Hardware and software initialization
sequence including power supplies control is required, because status of any hardware after the
24
Page 27
(
)
RESET period is unknown especially horizontal oscillator which is a very basic timing generator of
SP operation.
4) Terminal Interface
MCU Block
Table 7
Pin No. Pin Name Interface Ci I/O Function
P61/LED1/ADC 8 bit
1
2
3
4 uP DVSS
5 /Reset I/O
6 7
8 TEST Input
9
10 uP VVSS
54
55
56 P56 I/O
57
58
59
(/KWU5) (AIN5) (LED1)
P60/ADC 8 bit (/KWU4) (AIN4)
P53/ADC 8 bit/TC1/Int2 (/KWU0) (AIN0) (TC1) (INT2)
XOUT XIN
uP DVDD 5 V
uP MPAGND
uP AVDD 5 V
P52/SDA (SDA)
P51/SCL (SCL)
P50/PWM 7 bit/TC2/ Int0 (/PWM8)
I/O (input) (input) (output)
I/O (input) (input)
I/O (input) (input) (input) (input)
Power Supply
Output Input
Power Supply
Power Supply
Power Suppl
Power Supply
I/O (I/O)
I/O (I/O)
I/O (output) (input)
Key on wake up input A/D converter analog input High current sink open drain output
Key on wake up input A/D converter analog input
Key on wake up input A/D converter analog input Timer/counter input External interrupt input
GND
Reset signal input or watchdog timer output Address trap reset output
X’tal connecting pins
Test pin for out-going test. Be tied to low.
VDD Supply 5 V
GND for Slicer circuit
GND for Oscillator circuit
VDD for OSD Oscillator circuit Supply 5 V
IIC bus serial data input/output
IIC bus serial clock input/output
7-bit D/A conversion (PWM) output Timer/Counter input External interrupt input
continued
25
Page 28
(
)
(TC2) (/INT0)
60
61
62
63
64
Signal Processor Block
P40/PWM 14 bit (/PWM0)
P20/Int5/Stop (/INT5) (/STOP)
P31/Int4/TC3 (INT4) (TC3)
P30/Int3/RXIN (INT3) (RXIN)
P63/LED2/ (LED2)
(input)
I/O (output)
I/O (input) (input)
I/O (input) (input)
I/O (input) (input)
I/O (output)
14/12-bit D/A conversion (PWM) output
External interrupt input STOP mode release signal input
External interrupt input Timer/Counter input
External interrupt input Remote control signal Preprocessor input
High current sink open drain output
Table 8
Pin No. Pin Name Function
11 TV AGND GND terminal for Analog block.
12 FBP in Input terminal for FBP.
13 HOUT Output terminal for Horizontal driving pulse.
14 HAFC 1
15 V saw
16 V OUT Output terminal for Vertical driving pulse.
17 H.VCC 9 V VCC terminal for DEF circuit. Supply 9 V.
Terminal to be connected capacitor for HAFC filter.
This terminal voltage controls H VCO frequency.
Terminal to be connected capacitor to generate V saw
signal.
V saw amplitude is kept constant by V AGC function.
18 S Filter Terminal to be connected capacitor for SECAM filter.
19 Cb input Input terminal for Cb signal.
20 Y input Input terminal for Y signal. (Input level =1 Vp-p
21 Cr input
22 TV DGND GND terminal for Digital block.
23 CIN Input terminal for Chroma signal.
24
25 TV DVCC
EXT CVBS/Y (V2
IN)
Input terminal for Cr signal. It is recommended that input
impedance is low.
Input terminal for Video signal.
(Input level =1 Vp-p)
VCC terminal for Digital block.
This terminal voltage is clipped about 3.3 V by regulator
circuit.
Supply TV DVCC voltage from HVCC
continued
26
Page 29
(#17) voltage via 270Ω.
26 fsc out
27 ABCL Input terminal for ABL/ACL control.
28 Ew out Output terminal for East-West correction signal.
29 IF VCC 9 V
30 TV out
31 SIF out Output terminal for detected SIF signal.
32 EHT in Input terminal for EHT feedback signal.
33 H.correc/SIF in Input terminal for H correction and 2nd SIF.
34 DC NF
35 PIF PLL
36 IF VCC 5V
37 S-Reg.F
38
39 IF AGC
40 IF GND GND terminal for IF circuit.
41
42
43 RF AGC Output terminal for RF AGC control level.
44 YC VCC 5 V
45 Monitor out
46 Black Det.
47
48 IKin Input terminal to sense AKB cathode current.
Deemph/
Audio out
IF IN
APC Fil.
(Chrome PLL filter)
Output terminal for fsc wave signal.
(Output level =0.55Vp-p typ.)
VCC terminal for IF circuit.
Supply 9 V.
Output terminal for detected PIF signal.
(Output level =2.2 Vp-p)
Terminal to be connected capacitor for DC Negative
Feedback from SIF Det. output.
Terminal to be connected with loop filter for PIF PLL.
This terminal voltage is controlled
PIF VCO frequency.
VCC terminal for IF circuit.
Supply 5 V.
Terminal to be connected capacitor for stabilizing internal
bias.
Terminal to be connected capacitor for SIF Det.
De-Emphasis.
Terminal to be connected with IF
AGC filter.
Input terminals for IF signals.
Pin 41 and Pin 42 are both input poles of differential
amplifier.
VCC terminal for Y/C circuit.
Supply 5 V.
Output terminal for CVBS or Y signal selected by BUS
(video SW).
Terminal to be connected with
Black Det. filter for black stretch.
Terminal to be connected with
APC filter for Chroma demodulation.
This terminal voltage controls frequency of VCXO.
(continued)
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Page 30
49 RGB VCC9 V
50 ROUT Output terminal for R signal.
51 GOUT Output terminal for G signal.
52 BOUT Output terminal for B signal.
53 TV AGND GND terminal for Analog block.
VCC terminal for RGB circuit.
Supply 9 V.
5) Microcontrollers Descriptions
Fig. 8 Functional Diagram
6) Refer to Table 13 about Functions and Data of the IC’s Pins.
28
Page 31
2. AUDIO POWER AMPLIFIER TDA8944J 2 X 7 W STEREO BRIDGE TIED LOAD (BTL) AUDIO AMPLIFIER
1) General description
The TDA8944J is a dual-channel audio power amplifier with an output power of
2 × 7 W at an 8 load and a 12 V supply. The circuit contains two Bridge Tied Load
(BTL) amplifiers with an all-NPN output stage and standby/mute logic. The TDA8944J
comes in a 17-pin DIL-bent-SIL (DBS) power package. The TDA8944J is
printed-circuit board (PCB) compatible with all other types in the TDA894x family.
One PCB footprint accommodates both the mono and the stereo products.
2) Features
Few external components Fixed gain Standby and mute mode No on/off switching plops Low standby current High supply voltage ripple rejection Outputs short-circuit protected to ground, supply and across the load Thermally protected Printed-circuit board compatible.
3) Block diagram
Fig 9. Block diagram.
29
Page 32
4) Pinning information
4.1) Pinning
Fig 10. Pin configuration.
30
Page 33
4.2) Pin description
Table 9: Pin description
Symbol Pin Description
OUT1 1 negative loudspeaker terminal 1
GND1 2
VCC1 3 supply voltage channel 1
OUT1+ 4 positive loudspeaker terminal 1
n.c. 5 not connected
IN1+ 6 positive input 1
n.c. 7 not connected
IN1 8 Negative input 1
IN2 9 Negative input 2
MODE 10 Mode selection input (standby, mute, operating)
SVR 11 Half supply voltage decoupling (ripple rejection) IN2+ 12 Positive input 2
n.c. 13 Not connected
OUT2 14 Negative loudspeaker terminal 2
GND2 15 Ground channel 2
VCC2 16 Supply voltage channel 2 OUT2+ 17 Positive loudspeaker terminal 2
ground channel 1
TDA8944J: Stereo power amplifier, Max output power: 2×7W
5) Refer to Table 14 about Functions and Data of the IC’s Pins.
31
Page 34
3. VERTICAL SCAN OUTPUT STAGE CIRCUIT LA78040/LA78041
Both LA78040/LA78041 are vertical scan output stage power amplifiers. But there is a little bit
difference between the two amplifiers, that is, LA78040 has supply voltage of 24V and output
current of 1.8A
LA7840 (N301)
Vertical Deflection Output Circuit
1) Features
Low power dissipation due to built-in pump-up circuit
·Vertical output circuit
·Thermal protection circuit built in
·Excellent crossover characteristics
DC coupling possible
2) Block Diagram
while LA78041 has supply voltage of 30V and output current of 2.2A
P-P
.
P-P
Package Type: TO-220-7H
Fig. 11
Fig.12 Block diagram
3) Refer to Table 15 about Functions and Data of the IC’s Pins.
32
Page 35
4.EEPROM AT24C04/08/16
1) Features
Low-voltage and Standard-voltage Operation
-2.7 (Vcc=2.7V to 5.5V)
-1.8 (Vcc=1.8V to 5.5V)
Internally Organized 128x8(1K), 256x8 (2K), 512x8 (4K),
1024x8 (8K) or 2048x8 (16K)
2-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
100kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes
Partial Page Writes are allowed
Self-timed Write Cycle (10 ms max)
High-reliability
-Endurance: 1 Million Write Cycles
- Data Retention: 100 Years
Automotive Grade and Extended Temperature Devices Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP Package
2-wire
Serial EEPROM
AT24C01A 1K (128 x 8)
AT24C02 2K (256 x 8)
AT24C04 4K (512 x 8)
AT24C08 8K (1024 x 8)
AT24C16 6K (2048 x 8)
2) Description
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically
erasable and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048
words of 8 bits each. The device is optimized for use in many industrial and commercial
applications where low-power and low-voltage operations are essential. The
AT24C01A/02/04/08/16 is available in space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead MAP
and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire
family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
33
Page 36
A0 A1 A
A0 A1 A
A0 A1 A
A
A1 A
3) Pin Configuration
8-lead MAP
8
7
6
5
1
2
3
4
2
GND
Pin Name Function
A0-A2 Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
2
GND
8-lead TSSOP
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
NC No Connect
Bottom View
Fig. 13
8-pin PDIP
8-lead SOIC
VCC
VCC
0
GND
1
2
2
3
4
8
WP
7
SCL
6
SDA
5
GND
1
2
2
3
4
8
WP
7
SCL
6
SDA
5
Fig. 14
4) Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM
device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain
driven and may be wired with any number of other open-drain or open-collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that
are hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K devices may be
addressed on a single bus system (device addressing is discussed in detail under the Device
Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices
may be addressed on a single bus system. The A0 pin is a no connect.
The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be
addressed on a single bus system. The A0 and A1 pins are no connects.
The AT24C16 does not use the device address pins, which limits the number of devices on a single
bus to one. The A0, A1 and A2 pins are no connects.
34
Page 37
WRITE PROTECT (WP): The AT24C01A/02/04/16 has a Write Protect pin that provides hardware
data protection. The Write Protect pin allows normal read/write operations when connected to
ground (GND). When the Write Protect pin is connected to Vcc, the write protection feature is
enabled and operates as shown in the following table.
Table 10
WP Pin
Status
At Vcc Full (1K)
At GND Normal Read/Write Operations
5) Memory Organization
Part of the Array Protected
24C01A 24C02 24C04 24C08 24C16
Array
Full (2K)
Array
Full (4K)
Array
Normal
Read/
Write
Operation
Upper
Half
(8K)
Array
·AT24C01A, 1K SERIAL EEPROM: Internally organized with 16 pages of 8 bytes each, the 1K
requires a 7-bit data word address for random word addressing.
·AT24C02, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K
requires an 8-bit data word address for random word addressing.
·AT24C04, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K
requires a 9-bit data word address for random word addressing.
·AT24C08, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K
requires a 10-bit data word address for random word addressing.
·AT24C16, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K
requires an 11-bit data word address for random word addressing.
6) Block Diagram
Fig. 15 Block diagram
7) Refer to Table 16 about Functions and Data of the IC’s Pins.
35
Page 38
5. SWITCH-MODE POWER SUPPLY IC STRG5653/G8656
1) General Description
The STRG5653/G8656 are part of the STRG5600/G8600 series thick-film ICs for switch-mode
power supply incorporating power MOSFET with a high-precise error amplifier. The ICs feature
fewer external components, small-size and standard power supply.
The series STR-G8600 use Chip on Chip technology with the same operation principle as
STR-G5600. Pin configuration, function and threshold of STR-G8600 are compatible with
those of STR-G5600.
2) Block Diagram
Fig.16 Block diagram
3) Function of Terminal
Table 11
Terminal No. Symbols Description Functions
1 D Drain Terminal MOS FET drain
2 S Source Terminal MOS FET source
3 GND Ground Terminal Ground
Input of power supply for control
4 VIN Power supply Terminal
signals
Input of overcurrent detection
5 O.C.P/F.B Overcurrent/Feedback Terminal
signal and constant voltage
signals
4) Refer to Table 17 about Functions and Data of the IC’s Pins.
36
Page 39
6. TC90L01N AUDIO/VIDEO SWITCHING IC FOR TVs
The TC90L01N is an audio/video switching
IC for TV sets. Conforming to I
2
C bus
standards, it allows you to perform various
switching operations through the bus lines
by using a microcomputer. This IC has the
functions of audio mute, ALC (Auto Level
Control), audio volume and so on.
1) Features
2
·I
C bus control
Fig. 17
·Video: 3-channel inputs and 1-channel outputs (1 channels conforming to S system)
·Audio: 3-channel inputs and 3-channel outputs
·Monitor Audio out
·ALC (Auto Level Control)
·Audio volume by attenuator circuit
·Audio mute
·2 I/O ports
37
Page 40
2). Block Diagram
A
V1-V /Y in
V2-V in TV -V in
TV - V in
V1-C in
ALC
V1-L in V2-L in
V1-R in V2-R in TV -R in
4
8
2
6
10
5
9
1
7
11
3
S
V
CC
GND
12
15
V
CC
GND
22
V out
18
Y out
+
20
C out
SCL SDA
I/O-1 I/O-2
LC
24
Mute
2
I
L
Logic
2
I
C
BUS
I/O
14
13
19
21
Volume
17
TV -L out
24
Mon-L out
Volume
16
TV -R o u t
23
Mon-R out
Fig. 18 Block diagram
38
Page 41
3) Pin Assignment
Fig.19 Pin assignment
39
Page 42
4) Pin Description
Pin No. Name Function
This pin is for input a left audio signal from the main
demodulator in the TV set. The signal fed into this pin is
Table 12
1 TV-L in
2 TV-V in
3 TV-R in
presented to TV-L out, and Mon-L out.
The input dynamic range of this pin is 6.0 Vp-p and the input
resistance is 120 k.
This pin is for input a composite audio signal from the main
demodulator in the TV set. The signal fed into this pin is
presented to V out, Y out, and C out.
The input dynamic range of this pin is 2.0 Vp-p and the input
resistance is 30 k.
This pin is for input a right audio signal from the main
demodulator in the TV set. The signal fed into this pin is
presented to TV-R out, and Mon-R out.
The input dynamic range of this pin is 6.0 Vp-p and the input
resistance is 120 k.
This pin is for input a luminance signal or composite video
signal from an external source (V1 channel). The signal fed into
4 V1-V/Y in
5 V1-L in
6 V1-C in
this pin is presented to V out, Y out, and C out.
The input dynamic range of this pin is 2.0 Vp-p and the input resistance is 30 k . 
This pin is for input a left audio signal from an external source
(V1 channel). The signal fed into this pin is presented to TV-L
out, and Mon-L out.
The input dynamic range of this pin is 6.0 Vp-p and the input
resistance is 120k.
This pin is for input a chroma signal from an external source
(S1 channel). The signal fed into this pin is presented to C out
directly and to V out after being combined with the V1-Y in
signal.
The input dynamic range of this pin is 2.0 Vp-p and the input
(continued)
40
Page 43
resistance is 30 k.
This pin is for input a right audio signal from an external source
(V1 channel). The signal fed into this pin is presented to TV-R
7 V1-R in
out, and Mon-R out.
The input dynamic range of this pin is 6.0 Vp-p and the input
resistance is 120 k.
This pin is for input a composite video signal from an external
source (V2 channel). The signal fed into this pin is presented to
8 V2-V in
V out, Y out, and C out.
The input dynamic range of this pin is 2.0 Vp-p and the input
resistance is 30 k.
This pin is for input a left audio signal from an external source
(V2 channel). The signal fed into this pin is presented to TV-L
9 V2-L in
out and Mon-L out.
The input dynamic range of this pin is 6.0 Vp-p and the input
resistance is 120.
10 ALC
This is an detect output pin of ALC[:Auto Level Control]. It
controls ALC.
This pin is for input a right audio signal from an external source
(V2 channel). The signal fed into this pin is presented to TV-R
11 V2-R in
out and Mon-Rout.
The input dynamic range of this pin is 6.0 Vp-p and the input
resistance is 120 k . 
12 VCC
This is the power supply pin. Apply 9 V to this pin. The current
consumption of this pin is 32 mA.
This is an I
13 SDA
level of this in is 3.0 V.
Make sure that the current flowing into this pin is 3.0 mA or
less.
14 SCL
This is an I
level of this pin is 3.0 V.
2
C bus data input/output pin. The input threshold
2
C bus data input/output pin. The input threshold
15 GND
16 TV-R out
This is the GND pin.
This pin is for output right audio signal. The signal fed into TV-R
in, V1-R in, or V2-R in is outputted from this pin.
(continued)
41
Page 44
This outputted can be muted independently of TV-L out by bus
control.
This pin is for output left audio signal. The signal fed into TV-L
17 TV-L out
18 Y out
19 I/O-1
20 C out
21 I/O-2
in, V1-L in, or V2-L in is outputted from this pin.
This output can be muted independently of TV-R out by bus
control.
This pin is for output a luminance signal. The signal fed into
V1-V/Y in, V2-V in, or TV-V in is outputted from this pin.
This is an ADC input/DAC output pin. The ADC is a 2-level
detection type
(1 bits). The threshold level is 3.0 V. The DAC (1 bit) is an
open-drain output. Make sure that the current flowing into this
pin is 2.0 mA or less.
This pin is for output a chroma signal. The signal fed into V1-C
in, V1-V in, V2-V in , or TV-V in is outputted from this pin.
This is an ADC input/DAC output pin. The ADC is a 2-level
detection type (1 bits). The threshold level is 3.0 V.
The DAC (1 bit) is an open-drain output. Make sure that the
current flowing into this pin is 2.0 mA or less.
This pin is for output the main channel composite video signal.
The signal fed into TV-V in, V1-V in, V2-V in, or V1-Y in +_V1-C
22 V out
in is outputted from this pin.
This output can be muted by bus control.
This pin is for monitor-output right audio signal. The signals fed
into the chip via V1-R in, V2-R in, or TV-R in is output from this
23 Mon-R out
24 Mon-L out
pin.
This output can be muted in combination with Mon-L out by bus
control.
This pin is for monitor-output left audio signal. The signals fed
into the chip via V1-L in, V2-L in, or TV-L in is output from this
pin.
This output can be muted in combination with Mon-R out by
bus control.
(continued)
42
Page 45
SERVICE DATA OF KEY ICS
Table 13 Functions and Service Data of TMPA8827PSGN (N210)’s Pins
Pin No. 1 2 3 4 5 6 7 8
Voltage(V)
Resistance(KΩ)
Pin No. 9 10 11 12 13 14 15 16
Voltage(V)
Resistance(KΩ)
Pin No. 17 18 19 20 21 22 23 24
Voltage(V)
Resistance(KΩ)
Pin No. 25 26 27 28 29 30 31 32
Voltage(V) Resistance(KΩ)
Pin No. 33 34 35 36 37 38 39 40
Voltage(V)
Resistance(KΩ)
4.9 4.9 5 0 5 2.22 2 0
8.8 8.8 22 0 4.55 22.8 22.7 0
5 0 0 1.22 1.87 6.63 4.16 5
3.6 0 0 35.7 0.79 36.3 36.3 15.6
9 2 2.45 4.43 2.44 0 4.8 2.47
10 26 26 26 26 0 26 26
3.4 1.9 4.85 5.4 8.84 3.1 0 3.8
10.3 26 24.2 22.9 0.39 3.32 3.3 2.9
2.97 2.44 2.49 4.96 2.2 4.39 1.8 0
26 24.8 26 1.6 20 22.8 26 0
Pin No. 41 42 43 44 45 46 47 48
Voltage(V)
Resistance(KΩ)
Pin No. 49 50 51 52 53 54 55 56
Voltage(V) Resistance(KΩ)
Pin No. 57 58 59 60 61 62 63 64
Voltage(V)
Resistance(KΩ)
1.6 1.6 2.4 4.9 2.5 3.3 2.4 0
26 26 12.9 1.6 3.3 26 26 0
8.88 2 2 2 0 0 5 5
0 23.1 23.1 23.1 0 0 3.52 8.2
5 5 5 4.38 1.6 4.29 0 0
13.7 13.7 12 22.6 13.5 20.4 6.6 6.7
43
Page 46
Pin
No.
Table 14 Functions and Service Data of TDA8944J (N603)’s Pins
Digital Multimeter
Functions Description
Reference Voltage
(V)
Positive Resistance
(20KΩ)
Negative Resistance
(20KΩ)
1 Negative loudspeaker terminal 1 7.98
2 Ground channel 1 0 0 0
3 Supply voltage channel 1 14.9 5.8 7.7
4 Positive loudspeaker terminal 1 7.3
5 Not connected 0
6 Positive input 1 7.3
7 Not connected 0
8 Negative input 1 7.4
9 Negative input 2 7.3
Mode selection input (standby,
10
mute, operating)
Half supply voltage decoupling
11
(ripple rejection)
12 Positive input 2 7.3
0 7.8 8.9
7.6
∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞ ∞
13 Not connected 0
14 Negative loudspeaker terminal 2 7.3
15 Ground channel 2 0 0 0
16 Supply voltage channel 2 14.8 3.5 3.5
17 Positive loudspeaker terminal 2 7.3
∞ ∞
Table 15 Functions and Service Data of LA78040/78041 (N301)’s Pins
GDM8145 Multimeter
Ground Resistance (KΩ)
Pin No. Function Description
1 2
3
Ground
Vertical output terminal
Pump supply voltage input
Voltage of
Pin (V)
0 0 0
9.73 0.58 0.58
24.88
Measure with red probe while grounding black probe.
Measure with black probe while grounding red probe.
(continued)
44
Page 47
4
5
6
7
In-phase input terminal
Inverting input terminal
Supply voltage
Pump supply voltage output/vertical flyback
pulse output
2.22 1.30 1.30
2.22 4.58 4.55
24.13 1.55 1.55
2.61 7.09 5.93
Table 16 Functions and Service Data of AT24C16 (N230)’s Pins
Digital Multimeter
Pin
Function Description
Reference Voltage
Positive
Negative Resistance
No.
(V)
Resistance (20KΩ)
(20K)
1 Address input 0 0.001 0.00
2 Address input 0 0.001 0.00
3 Address input 0 0.001 0.00
4 Common ground 0 0.001 0.00
5 Clock line 5 7 4.83
6 Data line 4.99 6.9 5.15
7 PW write protect 4.99 9.5 5.31
8 Supply voltage 5 3.5 3.25
Table 17 Functions and Service Data of STR-G8656 (N801)’s Pins
Digital Multimeter
Pin
Functions Description
No.
1 Drain terminal 146.3
2 Source terminal 0 0 0
3 Ground terminal 0 0 0
4 Power supply terminal 31.96
Reference Voltage
(V)
Positive Resistance
(20KΩ)
Negative Resistance
(20KΩ)
Overcurrent/Freedback
5
terminal
1.72 0.699 0.166
45
Page 48
REPLACEMENT OF PARTS
1. Description
Many electrical and mechanical components in this chassis have special safety-related
characteristics. Components which have these special safety characteristics in this manual
and its supplements are identified by the international hazard symbols or UL, FCC, FDA or
VDE marking on the circuit diagram and parts list. When replacing any of these components,
substitute the one which has the same safety characteristics as specified in the manual.
Description of the special markings:
A: The components identified by the A marking have special safety-related characteristics. AE: The components identified by the AE marking are listed by EMC and have special
safety-related characteristics.
CB: The components identified by the CB marking have been evaluated to the CB standard. E: The components identified by the E marking are listed by EMC G: The components identified by the G marking have critical characteristics. Z: The components identified by the Z marking have important characteristics.
46
Page 49
APPENDIX:
CIRCUIT DIAGRAM (1)
JUC7.820.1117
Page 50
CIRCUIT DIAGRAM (2)
CRT RGB
SIDE AV B OARD
8.5
JUC7.820.1014
JUC7.820.1151
Page 51
FINAL ASSEMBLY DIAGRAM FOR 29CT24FS, 29CT71FS
1616
1010
(X4)(X4)
To the joint of the power switchTo the joint of the power switch
1313
(X4)(X4)
560m m
A ViewA View
11
55
44
77
66
22
1111
(X2)(X2)
1. Install the CRT with fixing torque of 3.5--5 N.m.1. Install the CRT with fixing torque of 3.5--5 N.m.
2. Check and make sure that all control buttons can work flexibly and normally.2. Check and make sure that all control buttons can work flexibly and normally.
3. Connect wires according to the final wiring diagram and check if the 3. Connect wires according to the final wiring diagram and check if the wired connectors are connected correctly and fixedly, and the highwired connectors are connected correctly and fixedly, and the high
high voltage cap and CRT RGB PCB are mounted. After adjustment of high voltage cap and CRT RGB PCB are mounted. After adjustment of
the two FCBs, lock them with white nitro magnetic paint Q04-3 on the shafts.the two FCBs, lock them with white nitro magnetic paint Q04-3 on the shafts. After inspection and ensuring O.K, Reinstall the back cover.After inspection and ensuring O.K, Reinstall the back cover.
4. Insert the wire clip B(16) into the slot on the rear terminal board.4. Insert the wire clip B(16) into the slot on the rear terminal board.
5. Tie the degaussing coil with the wire clip XJ-100(9) to make the wire far 5. Tie the degaussing coil with the wire clip XJ-100(9) to make the wire far from high temperature components.from high temperature components.
AA
2222
2121
2020
1919
33
1111
1212
(X6)(X6)
1414 1111 1515
1818
1717 1616
1515 1414 1313 1212
1111
1010 99 88
77 66
55 44
33 22
11
SerialSerial
No.No.
Code No.Code No.
White nitro magnetic paint Q04-
Soldering agent H-01Soldering agent H-01 Tin solder HLSn60PbATin solder HLSn60PbA
Wire clip BWire clip B PlasticinePlasticine
Seal capSeal cap
Specific tapping screw M6X35WSpecific tapping screw M6X35W
Tapping screw 4X20BAHChTapping screw 4X20BAHCh
Tapping screw 4X16BTHChTapping screw 4X16BTHCh
Rubber washer DP-1Rubber washer DP-1 Wire clip XJ-100Wire clip XJ-100
eRear plate
Rear plat
Back cove
rBack cover
Distance clipDistance clip
CRT RGB PCB assemblyCRT RGB PCB assembly
Chassis assemblyChassis assembly
Front Cover AssemblyFront Cover Assembly
CRT assemblyCRT assembly
3White nitro magnetic paint Q04-3
11
0.5g0.5g
11 44
66 44 44 11
11
11
11
11 11
11
11
RemarksRemarksPartsParts QtyQty
Page 52
FINAL WIRING DIAGRAM FOR 29CT24FS, 29CT71FS
In
Infr
ared Sensor PCB AssemblyInfrared Sensor PCB Assembly
dicator PCB AssemblyIndicator PCB Assembly
Remote Sensor PCB AssemblyRemote Sensor PCB Assembly
Wired Connector XP602BWired Connector XP602B
k
k
c
c
a
a
l
l
B
B
++
--
44
11
XPK01XPK01
Wired Connector XPL01Wired Connector XPL01
Wired Connector AWD-02-360 T360Wired Connector AWD-02-360 T360
yl
l
b
emb y s
sem
s
s
XPK01XPK01
0
0
S80
S80
X
r X
Wired Connector XP602AWired Connector XP602A
ed Connector
r
i
i ed Connecto
W r
W
h A
B
w ti ch A S
er Sw ti c w
wer o
Po m
o Degauss ni g Co li
To Degaussni g Co li
T
Fro
From P
XS804XS804
XP803XP803
Power PAB AssemblyPower PAB Assembly
XP801XP801
B
B
B
B
-
-
0
0
2
2
-
-
1
1
6
6
0
0
Main PCB AssemblyMain PCB Assembly
XP801XP801
XS400XS400
To Deflection YokeTo Deflection Yoke
XP401XP401
XP200BXP200B
XP200
XP200
AXP200A
DXP200D
XP205XP205
5
5
0
0
6
6
P
P
X
X
3
3
0
0
6
6
P
P
X
X
4
04Wri e
0
PK
PK
X
X
r
r
o
t c
cto
ne
ne
n
n Co
d Co
d
r
i e W
AX
A
1
1
0
0
9
9
P
P
X
L+L
+ L
L
-
­R
R
+
+ R
R
-
-
R
-R­R +R+ L-L
-
L+L
+
JUC7.820.453JUC7.820.453
R
R S
S
0
0
44
1
1
11
X
X
K
K
0
0
3
3
11
44
X
X
K
K
0
0 2
2
R
R
S
S
0
0
2
2
RR
B
l
l
a
a
c
c
k
k
S
S
K
K 0
0
G
G
2
2
N
N D
D
LL
RR
S
S
K
K
0
0
1
1
VV
Side-set AV PCB AssemblySide-set AV PCB Assembly
LL
RR
++
--
Screen Wire (Grey)Screen Wire (Grey)
CRT's Ground WireCRT's Ground Wire
(Soldered)(Soldered)
s Wire (Red)Focus Wire (Red)
Focu
A2A2
A1A1
BB
CRT RGB PAB AssemblyCRT RGB PAB Assembly
P903P903
First soldere
then close th
d the focus wire,First soldered the focus wire,
e cover.then close the cover.
XP403XP403
XP202XP202
XP904XP904
0
0
4
4
4
4
-
4-
04 D-
D-0
A
A
A
A
2
2
0
0
9
9
P
P
AV P
or
or
t
t
c e
nn Co ed
ed Connec
r
i
i
W
W r
CB Assembly AV PCB Assembly
InputInput
XP201XP201
XP903XP903
XP909XP909
Inpu
B
B
3
tInput
3
0
0
1
1 0
K
PK
P
PY0
r X
r X
o
o
r X
t
t
o
or XPY
c
t
t
e
c
c
n
e
n
nnec
n n
Co
Co
Co
d
d
e
d
r
r
i
i e
e
r
i
i ed Conne
W
W
W
W r
Page 53
MAIN
PRINTED CIRCUIT BOARD DIAGRAMS
Page 54
CRT RGB PRINTED CIRCUIT BOARD
AV PRINTED CIRCUIT BOARD
Page 55
POWER PRINTED CIRCUIT BOARD
Page 56
PARTS ON SOFT SWITCH PRINTED CIRCUIT BOARD
SIDE AV PRINTED CIRCUIT BOARD
REMOTE SENSOR AND INDICATOR PRINTED CIRCUIT BOARD
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