This Service Manual is the "Revision Publishing" and replaces "Simple Manual"
(S/M Code No. 09-003-340-0T1).
BASIC TAPE MECHANISM : 2ZM-1YR8N
BASIC CD MECHANISM : DA11T3C
S/M Code No. 09-003-340-0R1
REVISION
DATA
Page 2
SPECIFICATIONS
Design and specifications are subject to change without
•
notice.
2
Page 3
PROTECTION OF EYES FROM LASER BEAM DURING SERVICING
CLASS 1
KLASSE 1
LUOKAN 1
KLASS 1
LASER PRODUCT
LASER PRODUKT
LASER LAITE
LASER APPARAT
This set employs laser. Therefore, be sure to follow carefully the
instructions below when servicing.
WARNING!
WHEN SERVICING, DO NOT APPROACH THE LASER EXIT
WITH THE EYE TOO CLOSELY. IN CASE IT IS NECESSARY TO
CONFIRM LASER BEAM EMISSION. BE SURE TO OBSERVE
FROM A DISTANCE OF MORE THAN 30cm FROM THE
SURFACE OF THE OBJECTIVE LENS ON THE OPTICAL
PICK-UP BLOCK.
Caution: Invisible laser radiation when
open and interlocks defeated avoid exposure to beam.
Advarsel:Usynling laserståling ved åbning,
når sikkerhedsafbrydere er ude af funktion.
Undgå udsættelse for stråling.
VAROITUS!
Laiteen Käyttäminen muulla kuin tässä käyttöohjeessa mainitulla tavalla saattaa altistaa käyt-täjän turvallisuusluokan 1 ylittävälle näkymättömälle lasersäteilylle.
CAUTION
Use of controls or adjustments or performance of procedures
other than those specified herein may result in hazardous
radiation exposure.
ATTENTION
L'utilisation de commandes, réglages ou procédures autres que
ceux spécifiés peut entraîner une dangereuse exposition aux
radiations.
ADVARSEL!
Usynlig laserståling ved åbning, når sikkerhedsafbrydereer ude
af funktion. Undgå udsættelse for stråling.
This Compact Disc player is classified as a CLASS 1 LASER
product.
The CLASS 1 LASER PRODUCT label is located on the rear
exterior.
VARNING!
Om apparaten används på annat sätt än vad som specificeras i
denna bruksanvising, kan användaren utsättas för osynling
laserstrålning, som överskrider gränsen för laserklass 1.
Precaution to replace Optical block
(SF-P101NR)
Body or clothes electrostatic potential could ruin
laser diode in the optical block. Be sure ground
body and workbench, and use care the clothes
do not touch the diode.
1) After the connection, remove solder shown in
the right figure.
C102 87-010-190-080 S CHIP F 0.01
C103 87-010-190-080 S CHIP F 0.01
C104 87-010-404-080 CAP, ELECT 4.7-50V
C105 87-010-403-080 CAP, ELECT 3.3-50V
C106 87-010-192-080 C-CAP,S 0.022-50 F
C107 87-010-192-080 C-CAP,S 0.022-50 F
C108 87-010-192-080 C-CAP,S 0.022-50 F
C109 87-010-192-080 C-CAP,S 0.022-50 F
C110 87-010-190-080 S CHIP F 0.01
CN510 87-009-034-010 CONN,6P PH V
CN520 87-A60-248-010 CONN,16P H CFF1416
L501 87-005-647-080 COIL,10UH K LF5S
L502 87-005-659-080 COIL,100UH K LF5.0S
SFR501 87-A90-787-080 SFR,100K H HOKU
• Regarding connectors, they are not stocked as they are not the initial order items.
The connectors are available after they are supplied from connector manufacturers upon the order is received.
1. Tape Speed Adjustment
Settings:• Test tape: TTA-100
• Test point: SP-OUT 2V
• Adjustment location: SFR1
Method:Play back the test tape and adjust SFR1 for
3000Hz±5Hz (FWD) and FWD PLAY
speed±45Hz (REV).
2. Head Azimuth Adjustment
Settings:• Test tape: TTA-300
• Test point: SP-OUT 2V
• Adjustment location: Head azimuth
adjustment screw
Method:Play back the 8kHz signal of the test tape and
adjust screw so that the output becomes
maximum. Next, Perform on each FWD PLAY
and REV PLAY mode.
3. PB Frequency Response Check
Settings:• Test tape: TTA-320
• Test point: SP-OUT 2V
Method:Play back the 315Hz and 10kHz signals of the
test tape and check that the 10kHz signal with
respect to that of the 315Hz signal is 0dB±3dB.
4. REC/PB Frequency Response Check
Settings:• Test tape: TTA-602
• Test point: SP-OUT 2V
Method:Input a-20VU signal to the AUX terminal.
Record the 1kHz and 10kHz signals on the test
tape and play back them. Check that the
difference between the record level and the
play back level at 1kHz and 10kHz signal is
0dB to ±3dB.
PRACTICAL SERVICE FIGURE
< TUNER SECTION >
< FM SECTION >
IHF Sensitivity:15dB±5dB (at 90.0MHz)
(THD 3%)14dB±5dB (at 98.0/106.0MHz)
Signal to noise ratio:More than 60dB
(Input 54dB)(at 98.0MHz)
Distortion:Less than 1.2%
(Input 54dB)(at 98.0MHz)
Auto stop level:25±10dB (at 98.0MHz)
Stereo separation:More than 20dB (at 98.0MHz)
Intermediate frequency:10.75MHz
42±5dB (at 1400kHz)
Signal to noise ratio:More than 33dB
(Input 74dB)(at 999kHz)
Distortion:Less than 3.0%
(Input 74dB)(at 999kHz)
Auto stop level:50+10/-15dB (at 1000kHz)
Intermediate frequency:450kHz
< DECK SECTION >
Tape speed:3000Hz±45%
Wow & flutter:Less than 0.14%
(W.R.M.S)
Pinch roller pressure:270-330g
Take-up torque:30-55g-cm (FWD, REV)
FF & REW torque:75-180g-cm
Back tension:2-7g-cm (FWD, REV)
Distortion:Less than 3.0%
(REC/PB, 0VU)
Noise level:Less than 80mV
(PB, REC/PB,
FILTER DIN AUDIO)
Erasing ratio:More than 55dB
(at 125Hz, +10VU)
Test tape:TTA-100
TTA-602 (NORMAL)
31
Page 22
IC DESCRIPTION
IC, LC867240A-5P33
Pin No.Pin NameI/ODescription
1
2
3
4
5
6
7
8
9
10
11
12
13
O-SCONTM
O-SCONTL
O-DATA
___________
I-TUNE/IFC
O-TUCL
O-COIN
I-SQOUT
___________
O-CQCK
O-RWC
_______________
O-CLKSFT
I-TMBASE
____________
I-RESET
XT1
O
M62439SP control. open drain output.
O
O
Tuner control. CMOS output.
I
Tuner control.
O
Tuner control. CMOS output.
O
CD control. open drain output.
I
CD control.
O
CD control. open drain output.
O
O
Clock shift output. “L” during shift. open drain output.
I
8 Hz time base input.
I
Reset input.
I
Input pin.
14
15
16, 17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
XT2
VSS1
CF1, CF2
VDD1
I-KEY0
I-KEY1
I-RDSIG
I-WRQ
I-DRF
I-DOOR
I-PUIN
I-SWTAPE
________________
I-STEREO
I-RDCL
________
I-REM
___________
I-HOLD
I-RDDT
I-TPREC
I-TPPLAY
O
—
I/O
—
Output pin for 32.768kHz crystal oscillation.
GND.
Main clock input/output 5.76 MHz.
+5V.
I
KEY0 A/D input.
I
KEY1 A/D input.
I
RDS signal level input. (A/D input)
I
CD control.
I
I
CD door SW detection SW input. “L” at CLOSE.
I
CD pick-up detection SW input. “L” at ON.
I
Tape detection SW input. (A/D input)
I
Monaural/stereo indication selector input. “L” at stereo.
I
RDS clock input.
I
Remote control input. (fall-down edge interrupt input)
I
Hold mode detection. “L” at hold mode.
I
RDS data input.
I
Tape REC detection input. “H” at REC.
I
Tape PLAY detection input. “H” at PLAY.
34
35
36-38
39-55
56
57
58-79
80
81
O-MOTOR
O-PL
O-NC
S9-S25
VDD2
VSS2
S26-S47
I-CLKDSP
I-AS
—
—
O
Mechanism deck motor ON/OFF output. “H” at ON. CMOS output.
O
Mechanism deck plunger solenoid ON/OFF output. “H” at ON. CMOS output .
O
Not used.
O
LCD SEG terminal Initial setting output. (S10 to S16)
+5V.
GND.
O
LCD SEG terminal .
I
Watch indication select input “L”: 12H. “H”: 24H.
I
Auto stop. counter input .
32
Page 23
Pin No.Pin NameI/ODescription
__________
82
83-86
87
88
89
90
91
92
I-STOP
COM0-COM3
I-INIT
______
I-AC/DC
VSS3
VDD3
O-NC
O-TUCE
I
Tape stop input.
O
LCD common output.
I
Initial setting input.
O
Beat selector output. “H” during selection. CMOS output .
REC mute output. “H” during mute. Open drain output.
O
REC/PB select output. “H” during PB. Open drain output.
O
Mute output. “H” during mute. Open drain output.
O
Power control output. “H” at ON. CMOS output.
O
REC bias ON/OFF output. “H” at ON. Open drain output.
O
Not used.
33
Page 24
IC, LA9241ML
Pin No.Pin NameI/ODescription
1
2
FIN2
FIN1
Pin to which external pickup photo diode is connected. RF signal is created by adding
I
with the FIN1 pin signal. FE signal is created by subtracting from the FIN1 pin signal.
I
Pin to which external pickup photo diode is connected.
10
11
12
13
14
15
16
17
3
4
5
6
7
8
9
E
F
TB
TE–
TE
TESI
SCI
TH
TA
TD–
TD
JP
TO
FD
FD–
Pin to which external pickup photo diode is connected. TE signal is created by
I
subtracting from the F pin signal.
I
Pin to which external pickup photo diode is connected.
I
DC component of the TE signal is input.
I
Pin to which external resistor setting the TE signal gain is connected between the TE pin.
O
TE signal output pin.
TES “Track Error Sense” comparator input pin. TE signal is passed through a band-
I
pass filter then input.
I
Shock detection signal input pin.
I
Tracking gain time constant setting pin.
O
TA amplifier output pin.
Pin to which external tracking phase compensation constants are connected between
I
the TD and VR pins.
I
Tracking phase compensation setting pin.
I
Tracking jump signal (kick pulse) amplitude setting pin.
O
Tracking control signal output pin.
O
Focusing control signal output pin.
Pin to which external focusing phase compensation constants are connected between
I
the FD and FA pins.
18
19
20
21
22
23
24
25
26
27
28
29
30, 31
32, 33
34
FA
FA–
FE
FE–
AGND
SP
SPI
SPG
SP–
SPD
SLEQ
SLD
SL–, SL+
JP–, JP+
TGL
—
—
Pin to which external focusing phase compensation constants are connected between
I
the FD– and FA– pins.
Pin to which external focusing phase compensation constants are connected between
I
the FA and FE pins.
O
FE signal output pin.
I
Pin to which external FE signal gain setting resistor is connected between the FE pin.
Analog signal GND.
Single ended output of the CV+ and CV– pin input signal.
O
Spindle amp input.
I
Pin to which external spindle gain setting resistor in 12 cm mode is connected.
Pin to which external spindle phase compensation constants are connected together
I
with SPD pin.
O
Spindle control signal output pin.
I
Pin to which external sled phase compensation constants are connected.
O
Sled control signal output pin.
I
Sled advance signal input pin from microprocessor.
I
Tracking jump signal input pin from DSP.
I
Tracking gain control signal input from DSP. Low gain when TGL = H.
35
TOFF
I
Tracking off control signal input pin from DSP. Off when TOFF = H.
34
Page 25
Pin No.Pin NameI/ODescription
36
TES
O
Pin from which TES signal is output to DSP.
37
38
39, 40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
HFL
SLOF
CV–, CV+
RFSM
RFS–
SLC
SLI
DGND
FSC
TBC
NC
DEF
CLK
CL
DAT
CE
DRF
FSS
“High Frequency Level” is used to judge whether the main beam position is on top of
O
bit or on top of mirror.
I
Sled servo off control input pin.
I
CLV error signal input pin from DSP.
O
RF output pin.
RF gain setting and EFM signal 3T compensation constant setting pin together with
I
RFSM pin.
“Slice Level Control” is the output pin which controls the RF signal data slice level by
O
DSP.
I
Input pin which control the data slice level by the DSP.
—
Digital system GND.
O
Output pin to which external focus search smoothing capacitor is connected.
I
“Tracking Balance Control” EF balance variable range setting pin.
—
No connection.
O
Disc defect detector output pin.
I
Reference clock input pin. 4.23 MHz of the DSP is input.
Pin to which external bypass capacitor for reference voltage is connected.
O
Reference voltage output pin.
I
Disc defect detector time constant setting pin.
I
Pin to which external capacitor for RF signal peak holding is connected.
I
Pin to which external capacitor for RF signal bottom holding is connected.
O
APC circuit output pin.
I
APC circuit input pin.
—
RF system Vcc pin.
35
Page 26
IC, LC78622E
Pin No.Pin NameI/ODescription
1
2
3
4
5
DEFI
TAI
PDO
VVSS
ISET
—
I
Defect sense signal (DEF) input pin. (Connect to 0V when not used).
I
O
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Phase comparator output pin to control external VCO.
GND pin for built-in VCO. Be sure to connect to 0V.
For PLL.
I
Pin to which external resistor adjusting the PD0 output current.
6
7
8
9
10
11
12, 13
14
15
16
17
18
19, 20
21
22
23
24-28
29
VVDD
FR
VSS
EFMO
EFMIN
TEST2
CLV+, CLV–
___
V/P
HFL
TES
TOFF
TGL
JP+, JP–
PCK
FSEQ
VDD
SL+ - PUIN
EMPH
—
—
O
O
O
O
O
O
O
O
—
I/O
O
Power supply pin for built-in VCO.
I
Pin for VCO frequency range adjustment.
Digital system GND. Be sure to connect to 0V.
EFM signal output pin.
For slice level control.
I
I
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
EFM signal input pin.
Disc motor control output. Three level output is possible using command.
Rough servo or phase control automatic selection monitoring output pin. Rough servo
at H. Phase servo at L.
I
Track detect signal input pin. Schmidt input.
I
Tracking error signal input pin. Schmidt input.
Tracking OFF output pin.
Tracking gain selection output pin. Gain boost at L.
Track jump control signal output pin. Three level output is possible using command.
EFM data playback clock monitoring pin 4.3218 MHz when phase is locked in.
Sync signal detection output pin. H when the sync signal which is detected from EFM
signal and thesync signal which is internally generated agree.
Digital system power supply pin.
The pin is controlled by the serial data
command from microprocessor. When
General purpose input/output pin 1 to 5.
the pin is not used, set the pin to the input
terminal and connect to 0V, or alternately
set the pin to output terminal and leave
the pin open.
De-emphasis monitor output pin. De-emphasis disc is being played back at H.
30
31
32, 33
34
35
36
37
38
39
40
41
42
C2F
DOUT
TEST3, TEST4
N.C.
MUTEL
LVDD
LCHO
LVSS
RVSS
RCHO
RVDD
MUTER
—
—
—
—
—
O
C2 flag output pin.
O
DIGITAL OUT output pin. (EIAJ format).
I
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Not used. Set the pin to open.
O
L-channel 1-bit DAC.
O
L-channel mute output pin.
L-channel power supply pin.
L-channel output pin.
L-channel GND. Be sure to connect to 0V.
R-channel GND. Be sure to connect to 0V.
O
R-channel output pin.
R-channel 1-bit DAC.
R-channel power supply pin.
O
R-channel mute output pin.
36
Page 27
Pin No.Pin NameI/ODescription
43
44
45
46
47
XVDD
XOUT
XIN
XVSS
SBSY
—
Crystal oscillator power supply pin.
O
Pin to which external 16.9344 MHz crystal oscillator is connected.
I
—
Crystal oscillator GND pin. Be sure to connect to 0V.
O
Subcode block sync signal output pin.
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
EFLG
PW
SFSY
SBCK
FSX
WRQ
RWC
SQOUT
COIN
___________
CQCK
________
RES
TST11
16M
4.2M
TEST5
______
CS
TEST1
O
C1, C2, single and dual correction monitoring pin.
O
Subcode P, Q, R, S, T, U and W output pin.
O
Subcode frame sync signal output pin. Falls down when subcode enters standby.
Subcode read clock input pin. Schmidt input. (Be sure to connected to 0V when not in
I
use.)
Pin outputting the 7.35 kHz sync signal which is generated by dividing frequency of
O
crystal oscillator.
O
Subcode Q output standby output pin.
I
Read/write control input pin. Schmidt input.
O
Subcode Q output pin.
I
Command input pin from microprocessor.
I
Command input read clock or subcode read input clock from SQOUT pin
I
LC78622 reset input pin. Set this pin to L once when the main power is turned on.
O
Test signal output pin. Use this pin as open (normally L output).
O
16.9344 MHz output pin.
O
4.2336 MHz output pin.
I
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Chip select signal input pin with built-in pull-down resistor. Be sure to connect to 0V
I
while it is not controlling.
I
Test signal input pin without built-in pull-down resistor. Be sure to connect to 0V.
Note: The same potential must be applied to the respective power supply terminals. (VDD, VVDD, LVDD, RVDD, XVDD)
36 87-064-108-110 HLDR,NC LUTCH
37 82-NF5-229-010 PLATE,LOCK
38 82-NF5-228-010 SPR-C,LOCK
39 88-CL5-202-010 HLDR,CASS LOCKE R
40 88-CL5-203-010 LEVER,CASS LOCKE R
A 87-B10-239-010 QT2+3-8 W/O CR
B 8Z-CL8-220-010 W,30-0856-01-01-01
C 87-067-579-010 TAPPING SCREW, BVT2+3-8
D 87-067-703-010 TAPPING SCREW, BVT2+3-10
E 87-342-074-010 UT2+2.6-8
F 87-571-033-410 TAPPING SCREW, VIT+2-4
G 87-761-097-410 VFT2+3-10 GLD
H 87-B10-230-010 BVT2+3-10 W/O SLOT SILVER CR
NO.
COLOR NAME TABLE
Basic color symbolColorBasic color symbolColorBasic color symbolColor
BBlackCCreamDOrange
GGreenHGrayLBlue
LTTransparent BlueNGoldPPink
RRedSSilverSTTitan Silver
TBrownVVioletWWhite
WTTransparent WhiteYYellowYTTransparent Yellow
LMMetallic BlueLLLight BlueGTTransparent Green
LDDark BlueDTTransparent Orange
• The speakers that are supplied with the following models, are dedicated speakers for their respective models.
Speakers of LCX-337 and those of LCX-357 have completely the same outside appearance but have no compatibility each other.
Therefore, be careful not make mistake when using the speakers of the following models.
LCX-357
Speaker wire color is gray.
8Z-CL8-694-110
LCX-337
Speaker wire color is black.
8A-CL8-695-110
45
Page 34
SPRING APPLICATION POSITION
82-ZM1-285-410
SPR-C,BT L
82-ZM3-323-110
SPR-T,LINK
82-ZM1-258-210
SPR-T,PINCH L
82-ZM1-257-010
SPR-T,CAS
82-ZM1-218-010
SPR-E,HB
82-ZM1-244-510
SPR-C,BT
82-ZM1-259-210
SPR-T,PINCH R
82-ZM1-305-210
SPR-E.TRIG 2
82-ZM1-255-310
SPR-E,LER DIR
82-ZM1-213-010
SPR-T,HEAD
82-ZM1-269-210
SPR-T,BRG
82-ZM1-322-010
SPR-T,FR 60
82-ZM1-214-010
SPR-T,DIR
46
Page 35
ACCESSORIES/PACKAGE LIST
REF. NOPART NO.KANRIDESCRIPTION
1 8A-CLL-902-010 IB,LH(ESP)B
2 87-A90-030-010 ANT,LOOP AM-NC C
3 87-043-115-010 ANT,FEEDER FM
4 8A-CLB-961-010 RC UNIT,RC-AAT11
NO.
47
Page 36
2–11, IKENOHATA 1–CHOME, TAITO-KU, TOKYO 110, JAPAN TEL:03 (3827) 3111
737004
Printed in Singapore
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