The HSDL-3220 is a new
generation low profile high speed
infrared transceiver module that
provides interface between logic
and IR signals for through-air,
serial, half-duplex IR data-link.
The module is fully compliant to
IrDA Physical Layer specification
version 1.4 low power from
9.6kbit/s to 4.0 Mbit/s (FIR) and
is IEC825-Class 1 Eye Safe.
V
CX2
CC
CX4
CX1
V
(6)
IOV
SD (5)
RXD (4)
TXD (3)
LED C (2)
R1
V
led
Figure 1. Functional block diagram of HSDL-3220.
LED A (1)
CX3
CC
(7)
CC
HSDL-3220
TRANSMITTER
GND (8)
RECEIVER
Agilent HSDL-3220 IrDA
®
Data Compliant Low Power
4.0 Mbit/s Infrared Transceiver
Data Sheet
Features
•
Fully compliant to IrDA 1.4 physical
layer low power specification from
9.6 kbit/s to 4.0 Mbit/s (FIR)
• Miniature package
– Height: 2.5 mm
– Width: 8.0 mm
– Depth: 3.0 mm
• Typical link distance > 50 cm
Guaranteed temperature performance,
•
o
to 70oC
-25
•
The HSDL-3220 can be shutdown
completely to achieve very low
power consumption. In the
shutdown mode, the PIN diode
will be inactive and thus producing very little photocurrent even
under very bright ambient light.
It is also designed to interface to
input/output logic circuits as low
as 1.8V. These features are ideal
for mobile devices that require
low power consumption.
SHIELD
Critical parameters are guaranteed over
temperature and supply voltage
• Low power consumption
Low shutdown current
–
– Complete shutdown of TXD, RXD,
and PIN diode
• Excellent EMI performance
• Vcc supply 2.7 to 3.6 Volts
• Interfacing with I/O logic circuits as
low as 1.8 V
• Lead-free package
• LED stuck-high protection
• Designed to accommodate light loss
with cosmetic windows
• IEC 825-class 1 eye safe
• Lead-free and RoHS Compliant
Applications
• Mobile telecom
– Mobile phones
– Smart phones
– Pagers
• Data communication
– Pocket PC handheld products
– Personal digital assistants
– Portable printers
• Digital imaging
– Digital cameras
– Photo-imaging printers
• Electronic wallet
• Small industrial & medical
instrumentation
– General data collection devices
– Patient & pharmaceutical data
collection devices
1
2
3
4
5
6
7
8
Figure 2. Rear view diagram with pinout.
Application Support Information
The Application Engineering
Group is available to assist you
with the application design
associated with the HSDL -3220
infrared transceiver module. You
can contact them through your
local sales representatives for
additional details.
Order Information
Part NumberPackaging TypePackageQuantity
HSDL-3220-021Tape and ReelFront View2500
HSDL-3220-001Tape and ReelFront View500
I/O Pins Configuration Table
PinSymbolDescriptionI/O TypeNotes
1LED ALED AnodeI1
2LED CLED Cathode2
3TXDTransmit Data. Active High.I3
4RXDReceive Data. Active Low.O4
5SDShutdown. Active High.I5
6VccSupply Voltage6
7IOVccInput/Output ASIC Vcc7
8GNDGround8
-ShieldEMI Shield9
Marking Information
The unit is marked with the
letter “G” and “YWWLL” on the
shield where:
Y is the last digit of the year
WW is the work week
LL is the lot information
Recommended Application Circuit Components
ComponentRecommended ValueNotes
R15.6Ω ± 5%, 0.25 watt for 2.7 ≤ Vled <3.3V
10Ω± 5%, 0.25 watt for 3.3 ≤ Vled <4.2V
15Ω± 5%, 0.25 watt for 4.2 ≤ Vled < 5.5V
CX1, CX40.47 µF ± 20%, X7R Ceramic10
CX2, CX36.8 µF ± 20%, Tantalum11
Notes:
1. Tied through external series resistor, R1, to regulated Vled from 2.7 to 5.5V. Please refer to table
above for recommended series resistor value.
2. Internally connected to LED driver. Leave this pin unconnected.
3. This pin is used to transmit serial data when SD pin is low. If this pin is held high for longer than
50 µs, the LED is turned off. Do NOT float this pin.
4. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down
resistor is required. The pin is in tri-state when the transceiver is in shutdown mode. The receiver
output echoes transmitted signal.
5. The transceiver is in shutdown mode if this pin is high for more than 400 µs. On falling edge of
this signal, the state of the TXD pin sampled and used to set receiver low bandwidth (TXD=low)
or high bandwidth (TXD=high) mode. Refer to the section ”Bandwidth selection timing” for
programming information. Do NOT float this pin.
6. Regulated, 2.7 to 3.6 Volts.
7. Connect to ASIC logic controller Vcc voltage or supply voltage. The voltage at this pin must be
equal to or less than supply voltage.
8. Connect to system ground.
9. Connect to system ground via a low inductance trace. For best performance, do not connect
directly to the transceiver pin GND.
10. CX1 must be placed within 0.7 cm of the HSDL-3220 to obtain optimum noise immunity.
11. In environments with noisy power supplies, including CX2, as shown in Figure 1, can enhance
supply ripple rejection performance.
2
Bandwidth Selection Timing
The transceiver is in default SIR/
MIR mode when powered on.
User needs to apply the following
programming sequence to both
the SD and TXD inputs to enable
the transceiver to operate at FIR
mode.
SD/MODE
t
S
50%
V
V
IH
SD/MODE
V
IL
t
H
t
S
50%
t
H
IH
V
IL
V
IH
50%50%TXD
V
IL
Figure 3. Bandwidth selection timing at SIR/MIR mode.Figure 4. Bandwidth selection timing at FIR mode.
Setting the transceiver to SIR/MIR
Mode (9.6 kbit/s to 1.152 Mbit/s)
1. Set SD/Mode input to logic
HIGH
2. TXD input should remain at
logic LOW
3. After waiting for t
≥ 25 ns, set
S
SD/Mode to logic LOW, the
HIGH to LOW negative edge
transition will determine the
receiver bandwidth
4. Ensure that TXD input remains low for tH ≥ 100 ns, the
receiver is now in SIR/MIR
mode
5. SD input pulse width for mode
selection should be > 50 ns.
Setting the transceiver to FIR
(4.0 Mbit/s) Mode
1. Set SD/Mode input to logic
HIGH
2. After SD/Mode input remains
HIGH at > 25 ns, set TXD input
to logic HIGH, wait tS ≥ 25 ns
(from 50% of TXD rising edge
till 50% of SD falling edge)
3. Then set SD/Mode to logic
LOW, the HIGH to LOW
negative edge transition will
determine the receiver bandwidth
4. After waiting for tH ≥ 100 ns,
set the TXD input to logic LOW
5. SD input pulse width mode
selection should be > 50 ns.
Transceiver I/O Truth Table
50%50%TXD
V
IL
Inputs Outputs
TXDLight Input to ReceiverSDLEDRXDNote
HighDon’t CareLowOnNot Valid
LowHighLowOffLow12,13
LowLowLowOffHigh
Don’t CareDon’t CareHighOffHigh
Notes:
12. In-band IrDA signals and data rates ≤ 4.0 Mbit/s
13. RXD logic low is a pulsed response. The condition is maintained for a duration dependent on pattern and strength of the incident intensity.
3
CAUTIONS: The BiCMOS inherent to the design of this component increases the component’s
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions
be taken in handling and assembly of this component to prevent damage and/or degradation which may
be induced by ESD.
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is ≤50°C/W.
ParameterSymbolMin.Max.UnitsConditions
Storage TemperatureT
Operating TemperatureT
LED Anode VoltageV
Supply VoltageV
Input Voltage: TXD, SD/ModeV
Output Voltage: RXDV
DC LED Transmit CurrentI
Average Transmit CurrentI
S
A
LEDA
CC
I
O
(DC)50mA
LED
(PK)200mA≤90 µs pulse width
LED
-40+100°C
-25+70°C
06.5V
06.5V
06.5V
06.5V
≤25% duty cycle
Recommended Operating Conditions
ParameterSymbolMin.Typ.Max.UnitsConditions
Supply VoltageV
CC
Input/Output VoltageIOVcc1.8VccV
Logic Input Voltage
for TXD, SD/Mode
Logic HighV
Logic LowV
Logic High
IH
IL
E
IH, min
Receiver Input Irradiance0.020mW/cm
E
IH, max
Logic LowE
LED (Logic High) CurrentI
Pulse Amplitude
IL
LEDA
Receiver Data Rate0.00964.0Mbit/s
Note :
14. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 ≤ λp ≤ 900 nm, and the pulse characteristics are
compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.
2.73.6V
IOVcc – 0.5IOV
cc
00.4V
0.0081mW/cm
500mW/cm
0.3µW/cm
150mA
V
2
9.6kbit/s ≤ in-band signals
≤1.152 Mbit/s
2
1.152 Mbit/s < in-band signals
≤ 4.0 Mbit/s
2
9.6 kbit/s ≤ in-band signals
≤ 4.0 Mbit/s
2
For in-band signals
[14]
[14]
[14]
[14]
4
Electrical and Optical Specifications
Specifications (Min. and Max. values) hold over the recommended operating conditions unless otherwise noted.
Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C, Vcc set to 3.0V
and IOVcc set to 1.8V unless otherwise noted.
TXD Pulse Width (FIR)tPW(FIR)115125135nstPW(TXD)=125 ns at 4.0 Mbit/s
Maximum Optical PW
TXD Rise and fall Time (Optical)t
[19]
t
PW(max.)
, t
r
f
50100µs
600nstPW(TXD) = 1.4 µs at 115.2 kbit/s
40nstPW (TXD) = 125 ns at 4.0 Mbit/s
LED Anode On-State VoltageV
ON(LEDA)
1.62.1VI
=150 mA, V
LEDA
TXD≥VIH
Transceiver
Supply CurrentShutdownI
IdleI
Notes:
15. For in-band signals from 9.6 kbit/s to 115.2 kbit/s, where 9 µW/cm
16. For in-band signals from 0.576 Mbit/s to 4.0 Mbit/s, where 22.5 µW/cm
17. Latency time is defined as the time from the last TxD light output pulse until the receiver has recovered full sensitivity.
18. Receiver wake up time is measured from Vcc power on or SD pin high to low transition to a valid RXD output.
19. The maximum optical PW is the maximum time the LED remains on when the TXD is constantly high. This is to prevent long turn on time of the LED
for eye safety protection.
CC1
CC2
0.11µAV
≥ V
SD
1.83.0mAVSD ≤ VIL, V
2
≤ EI ≤ 500 mW/cm2.
2
≤ EI ≤ 500 mW/cm2.
Ta= 25°C
IH,
TXD
≤ VIL, EI=0
5
t
t
V
OH
V
OL
90%
50%
10%
pw
LED ON
LED OFF
90%
50%
10%
pw
t
f
t
r
t
r
Figure 5. RxD output waveform.Figure 6. LED optical waveform.