Agilent HCPL-2201, HCPL-2202, HCPL-2211, HCPL-2212, HCPL-2231 User Guide

...
Very High CMR, Wide V Gate Optocouplers
Technical Data
Logic
CC
HCPL-2201 HCPL-2202 HCPL-2211 HCPL-2212 HCPL-2231 HCPL-2232 HCPL-0201 HCPL-0211 HCNW2201 HCNW2211
Features
• 10 kV/µs Minimum Common
Mode Rejection (CMR) at VCM = 1000 V (HCPL-2211/2212/0211/ 2232, HCNW2211)
• Wide Operating VCC Range:
4.5 to 20 Volts
• 300 ns Propagation Delay Guaranteed over the Full Temperature Range
• 5 Mbd Typical Signal Rate
• Low Input Current (1.6 mA to 1.8 mA)
• Hysteresis
• Totem Pole Output (No Pullup Resistor Required)
• Available in 8-Pin DIP, SOIC-8, Widebody Packages
• Guaranteed Performance from -40°C to 85°C
• Safety Approval
UL Recognized -3750 V rms
for 1 minute (5000 V rms for 1 minute for
HCNW22XX) per UL1577 CSA Approved IEC/EN/DIN EN 60747-5-2 Approved with V V peak (HCPL-2211/2212 Option 060 only) and V V peak (HCNW22XX only)
IORM
IORM
= 630
= 1414
• MIL-PRF-38534 Hermetic Version Available (HCPL-52XX/62XX)
Applications
• Isolation of High Speed Logic Systems
• Computer-Peripheral Interfaces
• Microprocessor System Interfaces
• Ground Loop Elimination
• Pulse Transformer Replacement
• High Speed Line Receiver
• Power Control Systems
Functional Diagram
HCPL-2201/11 HCPL-0201/11 HCNW2201/11
NC
1
2
ANODE
CATHODE
ANODE 1
CATHODE 1
CATHODE 2
3
4
NC GND
SHIELD
HCPL-2231/32
1
2
3
Description
The HCPL-22XX, HCPL-02XX, and HCNW22XX are optically­coupled logic gates. The HCPL-22XX, and HCPL-02XX contain a GaAsP LED while the HCNW22XX contains an AlGaAs LED. The detectors have totem pole output stages and optical receiver input stages with built-in Schmitt triggers to provide logic­compatible waveforms, eliminat­ing the need for additional waveshaping.
A superior internal shield on the HCPL-2211/12, HCPL-0211,
HCPL-2202/12
8
V
CC
V
7
O
NC
6
5
8
V
CC
V
7
O1
V
6
O2
NC
1
2
ANODE
CATHODE
3
4
NC GND
SHIELD
TRUTH TABLE
(POSITIVE LOGIC)
LED
HIGH
ON
LOW
OFF
8
V
CC
7
NC
6
V
O
5
V
O
ANODE 2 GND
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
4
SHIELD
5
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
2
HCPL-2232 and HCNW2211 guarantees common mode transient immunity of 10 kV/µs at a common mode voltage of 1000 volts.
Selection Guide
The electrical and switching characteristics of the HCPL­22XX, HCPL-02XX and HCNW22XX are guaranteed from
-40°C to +85°C and a VCC from
4.5 volts to 20 volts. Low IF and
wide VCC range allow compatibil­ity with TTL, LSTTL, and CMOS logic and result in lower power consumption compared to other high speed couplers. Logic signals are transmitted with a typical propagation delay of 150 ns.
Small- Widebody
Minimum CMR Input 8-Pin DIP (300 Mil) Outline SO-8 (400 Mil) Hermetic
On- Single Dual Single Single Single and
dV/dt Current Channel Channel Channel Channel Dual Channel
(V/µs) VCM (V) (mA) Package Package Package Package Packages
1,000 50 1.6 HCPL-2200
[1,2]
HCPL-0201 HCNW2201 HCPL-2201 HCPL-2202
1.8 HCPL-2231
2,500 400 1.6 HCPL-2219
5,000
[3]
300
[3]
1.6 HCPL-2211 HCPL-0211 HCNW2211
[1,2]
HCPL-2212
1.8 HCPL-2232
1,000 50 2.0 HCPL-52XX
HCPL-62XX
Notes:
1. HCPL-2200/2219 devices include output enable/disable function.
2. Technical data for the HCPL-2200/2219, HCPL-52XX and HCPL-62XX are on separate Agilent publications.
3. Minimum CMR of 10 kV/µs with VCM = 1000 V can be achieved with input current, IF, of 5 mA.
[2]
[2]
Ordering Information
Specify Part Number followed by Option Number (if desired).
Example:
HCPL-2211#XXXX
060 = IEC/EN/DIN EN 60747-5-2 V 300 = Gull Wing Surface Mount Option** 500 = Tape and Reel Packaging Option XXXE = Lead Free Option
Option data sheets available. Contact your Agilent sales representative or authorized distributor for information.
Remarks: The notation “#” is used for existing products, while (new) products launched since 15th July 2001 and lead free option will use “-”
*For HCPL-2211/2212 only. **Gull wing surface mount option applies to through hole parts only.
Schematic
V
CC
V
O
GND
V
V
I
CC
8
I
F
2
+
V
F
3
SHIELD
HCPL-2201/02/11/12
HCPL-0201/11 HCNW2201/11
I
O
5
= 630 V peak Option*
IORM
I
F1
1
+
F1
2
SHIELD
3
F2
+
4
I
F2
SHIELD
HCPL-2231/32
I
CC
V
CC
8
I
O1
V
O1
7
I
O2
V
O2
6
GND
5
Package Outline Drawings
8-Pin DIP Package (HCPL-2201/02/11/12/31/32)
3
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
5° TYP.
0.254
(0.010
+ 0.076
- 0.051
+ 0.003)
- 0.002)
TYPE NUMBER
1.19 (0.047) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
1.080 ± 0.320
(0.043 ± 0.013)
9.65 ± 0.25
(0.380 ± 0.010)
A XXXXZ
YYWW
5678
OPTION CODE*
DATE CODE
UR
UL RECOGNITION
4321
1.78 (0.070) MAX.
4.70 (0.185) MAX.
2.92 (0.115) MIN.
0.65 (0.025) MAX.
2.54 ± 0.25
(0.100 ± 0.010)
0.51 (0.020) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
* MARKING CODE LETTER FOR OPTION NUMBERS "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
8-Pin DIP Package with Gull Wing Surface Mount Option 300 (HCPL-2201/02/11/12/31/32)
1.19
(0.047)
MAX.
1.080 ± 0.320
(0.043 ± 0.013)
LAND PATTERN RECOMMENDATION
9.65 ± 0.25
(0.380 ± 0.010)
6
7
8
1
2
2.54
(0.100)
BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
5
6.350 ± 0.25
(0.250 ± 0.010)
3
4
1.27 (0.050)
1.780
(0.070)
MAX.
3.56 ± 0.13
(0.140 ± 0.005)
0.635 ± 0.130
(0.025 ± 0.005)
(0.380 ± 0.010)
(0.300 ± 0.010)
0.635 ± 0.25
(0.025 ± 0.010)
1.016 (0.040)
9.65 ± 0.25
7.62 ± 0.25
10.9 (0.430)
2.0 (0.080)
0.254
(0.010
12° NOM.
+ 0.076
- 0.051
+ 0.003)
- 0.002)
4
Small-Outline SO-8 Package (HCPL-0201/11)
8765
3.937 ± 0.127
(0.155 ± 0.005)
PIN ONE
0.406 ± 0.076
(0.016 ± 0.003)
3.175 ± 0.127
(0.125 ± 0.005)
TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
*
5.207 ± 0.254 (0.205 ± 0.010)
DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
XXX
YWW
*
5.080 ± 0.127
(0.200 ± 0.005)
4321
1.270
(0.050)
5.994 ± 0.203
(0.236 ± 0.008)
TYPE NUMBER (LAST 3 DIGITS)
DATE CODE
BSC
1.524
(0.060)
0 ~ 7°
7°
LAND PATTERN RECOMMENDATION
0.64 (0.025)
0.432
45° X
(0.017)
0.203 ± 0.102
(0.008 ± 0.004)
0.305 MIN.
(0.012)
7.49 (0.295)
1.9 (0.075)
0.228 ± 0.025
(0.009 ± 0.001)
8-Pin Widebody DIP Package (HCNW2201/11)
11.15 ± 0.15
(0.442 ± 0.006)
6
5
TYPE NUMBER
DATE CODE
3
4
1.55
(0.061)
MAX.
3.10 (0.122)
3.90 (0.154)
0.40 (0.016)
0.56 (0.022)
2.54 (0.100) TYP.
1.78 ± 0.15
(0.070 ± 0.006)
7
8
HCNWXXXX
1
2
A
YYWW
11.00 MAX.
(0.433)
9.00 ± 0.15
(0.354 ± 0.006)
10.16 (0.400) TYP.
7° TYP.
5.10 MAX.
(0.201)
0.51 (0.021) MIN.
DIMENSIONS IN MILLIMETERS (INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
0.254
(0.010
+ 0.076
- 0.0051 + 0.003)
- 0.002)
5
8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW2201/11)
11.15 ± 0.15
(0.442 ± 0.006)
7
8
6
5
LAND PATTERN RECOMMENDATION
1.78 ± 0.15
(0.070 ± 0.006)
9.00 ± 0.15
(0.354 ± 0.006)
1
3
2
2.54
(0.100)
BSC
4
1.55
(0.061)
MAX.
4.00
(0.158)
MAX.
0.75 ± 0.25
(0.030 ± 0.010)
1.3
(0.051)
(0.039 ± 0.006)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
12.30 ± 0.30
(0.484 ± 0.012)
11.00 MAX.
(0.433)
1.00 ± 0.15
2.29
(0.09)
(0.534)
7° NOM.
13.56
0.254
(0.010
+ 0.076
- 0.0051 + 0.003)
- 0.002)
Solder Reflow Temperature Profile
300
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC. REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
ROOM
TEMPERATURE
200
160°C 150°C 140°C
3°C + 1°C/–0.5°C
100
TEMPERATURE (°C)
0
0
50 150100 200 250
2.5°C ± 0.5°C/SEC.
PREHEATING TIME 150°C, 90 + 30 SEC.
TIME (SECONDS)
PEAK TEMP. 245°C
30
SEC.
SEC.
30
SOLDERING
TIME
200°C
50 SEC.
PEAK TEMP. 240°C
PEAK
TEMP.
230°C
TIGHT TYPICAL LOOSE
Recommended Pb-Free IR Profile
t
p
260 +0/-5 °C
RAMP-UP
3 °C/SEC. MAX.
t
s
PREHEAT
60 to 180 SEC.
t
L
T
smax
T
TEMPERATURE
T
T
smin
p
217 °C
L
150 - 200 °C
TIME WITHIN 5 °C of ACTUAL PEAK TEMPERATURE
20-40 SEC.
RAMP-DOWN 6 °C/SEC. MAX.
60 to 150 SEC.
6
25
NOTES: THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX. T
= 200 °C, T
smax
Regulatory Information
The HCPL-22XX/02XX and HCNW22XX have been approved by the following organizations:
t 25 °C to PEAK
= 150 °C
smin
TIME
UL
Recognized under UL 1577, Component Recognition Program, File E55361.
IEC/EN/DIN EN 60747-5-2
Approved under: IEC 60747-5-2:1997 + A1:2002 EN 60747-5-2:2001 + A1:2002 DIN EN 60747-5-2 (VDE 0884
CSA
Approved under CSA Component
Teil 2):2003-01 (Option 060 and HCNW only)
Acceptance Notice #5, File CA
88324.
Insulation and Safety Related Specifications
8-pin DIP Package
8-Pin DIP Widebody (300 Mil) SO-8 (400 Mil)
Parameter Symbol Value Value Value Units Conditions
Minimum External L(101) 7.1 4.9 9.6 mm Measured from input terminals Air Gap (External to output terminals, shortest Clearance) distance through air.
Minimum External L(102) 7.4 4.8 10.0 mm Measured from input terminals Tracking (External to output terminals, shortest Creepage) distance path along body.
Minimum Internal 0.08 0.08 1.0 mm Through insulation distance, Plastic Gap conductor to conductor, usually (Internal Clearance) the direct distance between the
photoemitter and photodetector inside the optocoupler cavity.
Minimum Internal NA NA 4.0 mm Measured from input terminals Tracking (Internal to output terminals, along Creepage) internal cavity.
Tracking Resistance CTI 200 200 200 Volts DIN IEC 112/VDE 0303 Part 1 (Comparative Tracking Index)
Isolation Group IIIa IIIa IIIa Material Group
(DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
7
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCPL-2211/2212 Option 060 ONLY)
Description Symbol Characteristic Units
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage 300 V rms I-IV
for rated mains voltage 450 V rms I-III Climatic Classification 55/85/21 Pollution Degree (DIN VDE 0110/1.89) 2 Maximum Working Insulation Voltage V
IORM
Input to Output Test Voltage, Method b*
V
x 1.875 = VPR, 100% Production Test with tm = 1 sec, V
IORM
PR
Partial Discharge < 5 pC Input to Output Test Voltage, Method a*
V
x 1.5 = VPR, Type and sample test, V
IORM
PR
tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage*
(Transient Overvoltage, t
= 10 sec) V
ini
IOTM
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 12, Thermal Derating curve.)
Case Temperature T Input Current I Output Power P
Insulation Resistance at TS, VIO = 500 V R
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section IEC/EN/DIN EN 60747-5-2, for a detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
S
S,OUTPUT
S,OUTPUT
S
630 V peak
1181 V peak
945 V peak
6000 V peak
175 °C 230 mA 600 mW
9
10
8
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCNW22XX ONLY)
Description Symbol Characteristic Units
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage 600 V rms I-IV
for rated mains voltage 1000 V rms I-III Climatic Classification 55/100/21 Pollution Degree (DIN VDE 0110/1.89) 2 Maximum Working Insulation Voltage V
IORM
Input to Output Test Voltage, Method b*
V
x 1.875 = VPR, 100% Production Test with tm = 1 sec, V
IORM
PR
Partial Discharge < 5 pC Input to Output Test Voltage, Method a*
V
x 1.5 = VPR, Type and sample test, V
IORM
PR
tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage*
(Transient Overvoltage, t
= 10 sec) V
ini
IOTM
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 12, Thermal Derating curve.)
Case Temperature T Current (Input Current IF, PS = 0) I Output Power P
Insulation Resistance at TS, VIO = 500 V R
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section IEC/EN/DIN EN 60747-5-2, for a detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
S
S,INPUT
S,OUTPUT
S
1414 V peak
2652 V peak
2121 V peak
8000 V peak
150 °C 400 mA 700 mW
9
10
Absolute Maximum Ratings
Parameter Symbol Min. Max. Units Note
Storage Temperature T Operating Temperature T Average Forward Input Current I
S
A
F(AVG)
Peak Transient Input Current
( 1 µs Pulse Width, 300 pps) I
F(TRAN)
( 200 µs Pulse Width, HCNW22XX 40 mA
< 1% Duty Cycle)
Reverse Input Voltage V
R
HCNW22XX 3 Average Output Current I Supply Voltage V Output Voltage V Total Package Power Dissipation P
O
CC
O
T
HCPL-223X 294 Output Power Dissipation P
O
Lead Solder Temperature (Through Hole Parts 260°C for 10 sec., Only) 1.6 mm below seating plane
HCNW22XX 260°C for 10 sec., up to seating plane Solder Reflow Temperature Profile (Surface See Package Outline Drawings section
Mount Parts Only)
-55 125 °C
-40 85 °C 10 mA 1
1.0 A 1
5V 1
25 mA 1
020V
-0.5 20 V 1 210 mW 2
See Figure 7 1
9
Recommended Operating Conditions
Parameter Symbol Min. Max. Units
Power Supply Voltage V Forward Input Current (ON) I
CC
F(ON)
4.5 20 V
1.6* 5 mA
HCPL-223X 1.8†
Forward Input Voltage (OFF) V
F(OFF)
Operating Temperature T Junction Temperature T
A
J
- 0.8 V
-40 85 °C
-40 125 °C
Fan Out N 4 TTL Loads
*The initial switching threshold is 1.6 mA or less. It is recommended that 2.2 mA be used to permit at least a 20% LED degradation guardband. †The initial switching threshold is 1.8 mA or less. It is recommended that 2.5 mA be used to permit at least a 20% LED degradation guardband.
Electrical Specifications
-40°C TA 85°C, 4.5 V ≤ VCC 20 V, 1.6 mA I specified. All Typicals at TA = 25°C. See Note 7.
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Logic Low Output Voltage V Logic High Output Voltage V
OL
2.4 ** V IOH = -2.6 mA 2, 3, 1
OH
2.7 IOH = -0.4 mA
Output Leakage Current I
(V
> VCC)
OUT
Logic Low Supply I Current
OHH
CCL
3.7 6.0 mA V
4.3 7.0 V
HCPL-223X 7.4 12.0 V
8.6 14.0 V
Logic High Supply I Current
CCH
2.4 4.0 mA V
2.7 5.0 V
HCPL-223X 4.8 8.0 V
5.4 10.0 V
Logic Low Short Circuit I
Output Current
Logic High Short Circuit I
OSL
OSH
15 mA VO = V 20 VO = V
Output Current VO = GND
Input Forward Voltage V
F
1.5 1.7 V TA = 25°CI
HCNW22XX 1.5 1.82 TA = 25°C
Input Reverse Breakdown BV Voltage
HCNW22XX 3 IR = 100 µA
Input Diode Temperature ∆V Coefficient
HCNW22XX ∆T
Input Capacitance C
IN
5VI
R
F
A
-1.7 mV / °C IF = 5 mA
-1.4 60 pF f = 1 MHz, VF = 0 V 1, 4
HCNW22XX 70
* 5 mA, 0 V V
F(ON)
0.8 V, unless otherwise
F(OFF)
0.5 V IOL = 6.4 mA (4 TTL Loads) 1, 3 1
8
100 µAVO = 5.5 V IF = 5 mA 1 500 VO = 20 V
= 5.5 V VF = 0 V
CC
IO = Open
IO = Open
= 5 mA 4 1
F
-10 mA V
-20 V
= 20 V
CC
= 5.5 V
CC
= 20 V
CC
= 5.5 V IF = 5 mA
CC
= 20 V
CC
= 5.5 V
CC
= 20 V
CC
= 5.5 V VF = 0 V 1, 3
CC
= 20 V
CC
= 5.5 V IF = 5 mA 1, 3
CC
= 20 V
CC
1.85
1.95 = 10 µA1
R
*For HCPL-223X, 1.8 mA I **Typical VOH = VCC - 2.1 V.
F(ON)
5 mA.
10
Switching Specifications (AC)
-40°C ≤ TA 85°C, 4.5 V ≤ VCC 20 V, 1.6 mA ≤ I All Typicals at TA = 25°C, VCC = 5 V, I
= 3 mA unless otherwise specified.
F(ON)
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay Time t
to Logic Low Output Level
Propagation Delay Time t to Logic High Output Level
Output Rise Time (10-90%) t Output Fall Time (90-10%) t
PHL
PLH
r
f
150 ns Without Peaking Capacitor 5, 6 1, 6 160 HCNW22XX 150 300 With Peaking Capacitor 110 ns Without Peaking Capacitor 5, 6 1, 6 180 HCNW22XX
90 300 With Peaking Capacitor 30 ns 5, 9 1
7 ns 5, 9 1
Parameter Sym. Device Min. Units Test Conditions Fig. Note
Logic High |CMH| HCPL-2201/02 1,000 V/µs|VCM| = 50 V VCC = 5 V 10 1, 7 Common Mode HCPL-0201 IF = 1.6 mA Transient HCPL-2231 Immunity HCNW2201
HCPL-2211/12 5,000 V/µs|VCM| = 300 V HCPL-0211 IF = 1.6 mA HCPL-2232
10,000 V/µs|VCM| = 1 kV
HCNW2211
Logic Low |CML| HCPL-2201/02 1,000 V/µs|VCM| = 50 V VF = 0 V 10 1, 7 Common Mode HCPL-0201 VCC = 5 V Transient HCPL-2231 TA = 25°C Immunity HCNW2201
HCPL-2211/12 10,000 V/µs|VCM| = 1 kV HCPL-0211 HCPL-2232 HCNW2211
*For HCPL-223X, 1.8 mA ≤ I †IF = 1.8 mA for HCPL-2231. ‡IF = 1.8 mA for HCPL-2232.
F(ON)
5 mA.
*
5 mA, 0 V V
F(ON)
F(OFF)
IF = 5.0 mA
0.8 V.
TA = 25°C
11
Package Characteristics
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Input-Output Momentary V Withstand Voltage
HCNW22XX 5000 TA = 25°C
*
Input-Output Resistance R
HCNW22XX 101210
Input-Output Capacitance C
HCNW22XX 0.5 0.6 TA = 25°C
Input-Input Insulation I Leakage Current t = 5 s, V
Resistance (Input-Input) R Capacitance (Input-Input) C
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equipment level safety specification or Agilent Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,” publication number 5963-2203E.
3750 V rms RH < 50%, t = 1 min. 5, 10
ISO
12
I-O
I-O
I-I
10
13
11
10
0.6 pF f = 1 MHz, 5
0.005 µA Relative Humidity = 45%, 12
11
I-I
I-I
10
0.25 pF f = 1 MHz 12
V
TA = 25°C TA = 100°C
= 500 V
I-I
V
= 500 V 12
I-I
= 500 Vdc 5
I-O
V
= 0 Vdc
I-O
5, 11
Notes:
1. Each channel.
2. Derate total package power dissipation, PT, linearly above 70°C free-air temperature at a rate of 4.5 mW/°C.
3. Duration of output short circuit time should not exceed 10 ms.
4. For single devices, input capacitance is measured between pin 2 and pin 3.
5. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
6. The t
7. CMH is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state,
8. For HCPL-2202/12, VO is on pin 6.
9. Use of a 0.1 µF bypass capacitor connected between pins 5 and 8 is recommended.
10. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 V rms for one second
11. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 6000 V rms for one second
12. For HCPL-2231/32 only. Measured between pins 1 and 2, shorted together, and pins 3 and 4, shorted together.
propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the
PLH
leading edge of the output pulse. The t pulse to the 1.3 V point on the trailing edge of the output pulse.
VO > 2.0 V. CML is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, VO < 0.8 V.
(leakage detection current limit, I b) shown in the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table, if applicable.
(leakage detection current limit, I b) shown in the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table.
propagation delay is measured from the 50% point on the trailing edge of the input
PHL
5 µA). This test is performed before the 100% production test for partial discharge (Method
I-O
5 µA). This test is performed before the 100% production test for partial discharge (Method
I-O
12
1.0
0.9
0.8
VCC = 4.5 V
= 0 V
V
F
= 6.4 mA
I
O
0.7
0.6
0.5
0.4
0.3
0.2
0.1
– LOW LEVEL OUTPUT VOLTAGE – V
0
OL
-60
V
-20
20 60-40 0 40 80
TA – TEMPERATURE – °C
Figure 1. Typical Logic Low Output Voltage vs. Temperature.
HCPL-22XX
I
F
+
V
F
HCPL-02XX
= 25 °C
T
A
1000
100
10
1.0
0.1
0
-1
-2 VO = 2.7 V
-3
-4
-5
-6
VO = 2.4 V
-7
– HIGH LEVEL OUTPUT CURRENT – mA
-8
-60
100
OH
I
-20
TA – TEMPERATURE – °C
Figure 2. Typical Logic High Output Current vs. Temperature.
1000
100
10
1.0
0.1
VCC = 4.5 V
= 5 mA
I
F
20 60-40 0 40 80
HCNW22XX
I
F
+
V
F
100
T
A
5
V
= 4.5 V
CC
= 25 °C
T
4
A
3
2
– OUTPUT VOLTAGE – V
1
O
= 6.4 mA
I
V
O
0
0
IF – INPUT CURRENT – mA
Figure 3. Typical Output Voltage vs. Forward Input Current.
= 25 °C
IO = -2.6 mA
1.00.5
1.5
0.01
– FORWARD CURRENT – mA
F
I
0.001
1.1
1.3
1.51.2 1.4
VF – FORWARD VOLTAGE – V
Figure 4. Typical Input Diode Forward Characteristic.
PULSE GEN.
t
= t
=
r
f
f = 100 kHz
10 % DUTY
CYCLE
= 5 V
V
O
= 50
Z
O
INPUT MONITORING NODE
R
1
5 ns
HCPL-2201/11
HCPL-02XX HCNW22XX
1
2
3
4
C1 = 120 pF
THE PROBE AND JIG CAPACITANCES ARE INCLUDED IN C
R
1
IF (ON)
V
GND
2.15 k
1.6 mA
ALL DIODES ARE 1N916 OR 1N3064.
CC
1.10 k 3 mA
V
8
7
6
5
AND
1
INPUT I
OUTPUT V
CC
OUTPUT V MONITORING NODE
*
C
.
2
681
5 mA
F
O
C2 = 15 pF
– FORWARD CURRENT – mA
F
I
0.001
O
D
5 k
t
0.01
1.1
1.3
VF – FORWARD VOLTAGE – V
5 V
619
1
INPUT MONITORING
D
2
NODE
D
3
D
4
PLHtPHL
PULSE GEN.
= t
5 ns
=
t
r
f
f = 100 kHz
10 % DUTY
CYCLE
= 5 V
V
O
= 50
Z
O
R
1
IF (ON)
50 % IF (ON)
0 mA
V
OH
1.3 V V
OL
1.6
1.51.2 1.4
HCPL-223X
V
1
2
3
4
C1 = 120 pF
THE PROBE AND JIG CAPACITANCES ARE INCLUDED IN C
1.96 k
R
1
1.8 mA
IF (ON)
CC
GND
8
7
6
5
1
1.10 k 3 mA
AND
ALL DIODES ARE 1N916 OR 1N3064.
V
CC
*
C
2
681 5 mA
OUTPUT V MONITORING NODE
C2 = 15 pF
.
O
5 V
619
D
1
D
2
D
5 k
3
D
4
Figure 5. Circuit for t
PLH
, t
PHL
, tr,tf.
* 0.1 µF BYPASS SEE NOTE 9.
250
VCC = 5.0 V, 20 V C1 (120 pF) PEAKING CAPACITOR IS USED. SEE FIGURE 5.
200
*I
= 1.8 mA FOR HCPL-223X
F
DEVICES.
150
t
PHL
100
– PROPAGATION DELAY – ns
P
t
t
PLH
50
-60
TA – TEMPERATURE – °C
-20
HCPL-22XX HCPL-02XX
20 60-40 0 40 80
IF (mA)
1.6*
1.6*
13
250
VCC = 5.0 V, 20 V C1 (120 pF) PEAKING CAPACITOR
5 3
- 5
IS USED. SEE FIGURE 5.
200
150
t
PHL
100
– PROPAGATION DELAY – ns
t
PLH
P
t
50
100
-60
HCNW22XX
-20
20 60-40 0 40 80
TA – TEMPERATURE – °C
IF (mA)
1.6
1.6,
80
5
60
3
TA = 75 °C
TA = 80°C
40
TA = 85 °C
5
100
20
PER CHANNEL (mW)
– MAXIMUM OUTPUT POWER
O
P
0
0
10
5
15
20
VCC – SUPPLY VOLTAGE – V
Figure 6. Typical Propagation Delays vs. Temperature. Figure 7. Maximum Output Power per
Channel vs. Supply Voltage.
20
TYPICAL V
vs. V
OH
CC
AT IO = -2.6 mA
15
T
= 25 °C
A
10
5
– HIGH LEVEL OUTPUT VOLTAGE – V
0
OH
0
5
V
10 15
VCC – SUPPLY VOLTAGE – V
Figure 8. Typical Logic High Output Voltage vs. Supply Voltage.
HCPL-2201/11
HCPL-02XX HCNW22XX
1
A
2
3
4
V
CM
+
R
IN
+
V
FF
PULSE GENERATOR
B
20
8
7
6
5
100
VCC = 5 V
80
60
– RISE, FALL TIME – ns
f
, t
r
t
40
20
0
-60
-20
t
r
t
f
20 60-40 0 40 80
TA – TEMPERATURE – °C
Figure 9. Typical Rise, Fall Time vs. Temperature.
V
CC
OUTPUT V MONITORING NODE
0.1 µF BYPASS
O
+
V
FF
100
R
1
A
1
B
2
3
4
PULSE GENERATOR
HCPL-2231/32
V
CM
+
V
CC
8
7
6
5
OUTPUT V MONITORING NODE
0.1 µF BYPASS
O
|VCM|
0 V
SWITCH AT A: IF = 1.6 mA**
V
OH
VCM (PEAK)
VO (MIN.)*
OUTPUT V
SWITCH AT B: V
O
V
OL
VO (MAX.)*
= 0 V
F
* SEE NOTE 7, 9. ** I
= 1.8 mA FOR HCPL-2231/32 DEVICES.
F
Figure 10. Test Circuit for Common Mode Transient Immunity and Typical Waveforms.
14
INPUT CURRENT THRESHOLD – mA
1.0 VCC = 5.0 V
0.9
V
0.8
I
(ON)
F
0.7
I
(OFF)
F
0.6
I
(ON)
F
I
(OFF)
F
0.5
-60
-20
TA – TEMPERATURE – °C
HCPL-22XX HCPL-02XX
= 20 V
CC
20 60-40 0 40 80
100
INPUT CURRENT THRESHOLD – mA
1.0
0.9
0.8
0.7
0.6
0.5
-60
I
F
I
F
I
F
I
F
(ON)
(OFF)
(ON)
(OFF)
HCNW22XX
VCC = 5.0 V
= 20 V
V
CC
-20
TA – TEMPERATURE – °C
Figure 11. Typical Input Threshold Current vs. Temperature.
S
, INPUT CURRENT – I
S
OUTPUT POWER – P
HCPL-2211/2212 OPTION 060
800
700
PS (mW)
I
(mA)
S
600
500
400
300
200
100
0
0
TS – CASE TEMPERATURE – °C
12525 75 100 150
175
S
1000
900
800
PS (mW)
I
S
700
600
, INPUT CURRENT I
500
S
400
300
200
100
0
OUTPUT POWER P
20050
0
50
TS – CASE TEMPERATURE – °C
20 60-40 0 40 80
HCNW22XX
(mA)
12525 75 100 150
100
175
Figure 12. Thermal Derating Curve, Dependence of Safety Limiting Value with Case Temperature per IEC/EN/DIN EN 60747-5-2.
HCPL-2201/11
HCPL-02XX HCNW22XX
(+5 V)
V
CC1
18
V
CC2
1.1 k DATA OUTPUT
UP TO 16 LSTTL LOADS OR 4 TTL LOADS
DATA INPUT
TTL OR LSTTL
1
27
36
*
45
* 0.1 µF BYPASS
2
Figure 13a. Recommended LSTTL to LSTTL Circuit where 500 ns Propagation Delay is Sufficient.
(+5 V)
18
27
36
45
HCPL-2201/11
HCPL-02XX HCNW22XX
DATA
INPUT
D1 (1N4150) REQUIRED FOR ACTIVE PULL-UP DRIVER.
1.1 k
V
CC1
(+5 V)
V
CC
GND
D1
TTL or LSTTL
V
(+5 V)
CC1
DATA INPUT
80
1.1 k
TTL OR LSTTL
HCPL-2201/11
HCPL-02XX HCNW22XX
18
120 pF
27
36
45
15
V
(+5 V)
CC2
DATA OUTPUT
*
UP TO 16 LSTTL LOADS OR 4 TTL LOADS
1
* 0.1 µF BYPASS
2
Figure 13b. Recommended LSTTL to LSTTL Circuit for Applications Requiring a Maximum Allowable Propagation Delay of 300 ns.
V
CC2
(4.5 TO 20 V)
R
L
CMOS
**
2
DATA OUTPUT
(+5 V)
DATA
INPUT
TOTEM
OUTPUT
V
CC1
POLE
GATE
80 *
1.1 k
TTL OR LSTTL
1
HCPL-2201/11
HCPL-02XX HCNW22XX
120
18
pF*
27
36
45
CC2
R
L
1.1 k
2.37 k
3.83 k
5.11 k
V
5 V 10 V 15 V 20 V
V
CC
GND
* 120 pF PEAKING CAPACITOR MAY BE OMITTED AND 80 RESISTOR MAY BE SHORTED WHERE 500 ns PROPAGATION DELAY IS SUFFICIENT.
**0.1 µF BYPASS
Figure 14. LSTTL to CMOS Interface Circuit.
HCPL-2201/11
HCPL-02XX
HCNW22XX
V
(+5 V)
CC
DATA INPUT
OPEN
COLLECTOR
GATE
Figure 16. Series LED Drive with Open Collector Gate
80 *
1.1 k
4.7 k
TTL OR LSTTL
* 120 pF PEAKING CAPACITOR MAY BE OMITTED AND 80 RESISTOR MAY BE SHORTED WHERE 500 ns PROPAGATION DELAY IS SUFFICIENT.
18
120 pF*
27
36
45
V
GND
CC
(4.7 k Resistor Shunts IOH from the LED).
Figure 15. Alternative LED Drive Circuit.
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Copyright © 2005 Agilent Technologies, Inc. Obsoletes 5989-0288EN February 28, 2005 5989-2123EN
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