Agilent 8901B Service Manual

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Model 8901B

08901-90114V2

VOLUME

Service Sheet 1-A53 Service Sheet 2-A53 Service Sheet 3-A32 Power Reference Oscillator Assembly Service Sheet 4-A15 Service Sheet &A17 Input Mixer. A16 Buffer Amplifier. and A18 Service Sheet 6-A55 Service Sheet 7-A54 Service Sheet 8-A6 Service Sheet 9-A6 Service Sheet 10-A4 FM Demodulator Assembly (Limiters) Service Sheet ll-A4 FM Demodulator Assembly (Discriminator)

Service Sheet 12-A2 Audio Filters Assembly Service Sheet 13-A3 Audio De-emphasis and Output Assembly Service Sheet 14-A5 Voltmeter Assembly (Audio Detectors) Service Sheet 15-A5 Voltmeter Assembly (Voltmeter) Service Sheet 16-A52 Audio Counter and Distortion Analyzer Assembly Service Sheet 17-A19 Service Sheet Service Sheet 19-A22 Low Frequency VCXO and

Filter Assemblies Service Sheet 20-A20 Service Sheet 20-A20 Service Sheet 21-A20 Service Sheet 21-A20 Service Sheet 22-All Counter Assembly (Time Base) Service Sheet 23-A11 Counter Assembly (Counter) Service Sheet 24-A13 Controller Assembly Service Sheet 25-A1 Keyboard Assembly (Keyboard) Service Sheet 26-A1 Keyboard Assembly (Displays) Service Sheet 27-A1 Keyboard and Display Assembly (Annunciators) Service Sheet 28-A14 Remote Interface Assembly Service Sheet 29-A51 FM Calibrator Assembly

Service Sheet 30-A50 Service Sheet 31-A10 Power Supply Regulators. A26 Power Supply Motherboard.

and A29 Series Regulator Heat Sink Assemblies

Service Sheet 32-A10 Power Supply Regulators. A26 Power Supply.

and A29 Series Regulator Heat Sink Assemblies

Service Sheet 33-A72 Service Sheet 34-A71

18-A23

RF

Power Assembly (Sensor Input Circuits)

RF

Power Assembly (Control Circuits)

R.F

Input Assembly

IF

Channel Filter Assembly (Option Series 030)

IF

AmplifierAIetector Assembly (Option Series 030)

AM

Demodulator Assembly (ALC Loop)

AM

Demodulator Assembly (Control Circuits)

LO

Divider Assembly

Sampler and A24 High Frequency VCO Assemblies

LO

Control Assembly

LO

Control Assembly

LO

Control Assembly (Digital Circuits) (2314A

LO

Control Assembly (Digital Circuits)

AM

Calibrator Assembly

IF

Channel Filter Assembly (Option Series 030) (2642A

IF

Amplifier Detector Assembly

2

TABLE

OF

CONTENTS

.....................

.........................

........................

...................................

IF

Amplifier Assemblies

W14A

to

2636A)

W14A

........................

....................

........................

.....................

................................

......................

........................

...........................

................

................................

..............

A21

Low Frequency VCXO

(Analog

Circuits)

(2314A

(2642A

(2627A

to2622A)

and

to2622A)

and

..........................

............................

................................

...........................

.................

............................

..............................

..................

(Option

Series 030K2642A

.......

Above)

and

......

........

to

2636A)

......

:

....

...........

..........

...........

..........

Above)

and

.....

Above)

...

.8

F.l

8F-9 8F-15 8F-17 8F-23

8F-33

8F-37

8F-41

8F-51

8F-55 8F-57 8F-63

8F-69

8F-79 8F-87

8F-93

8F-101 8F-107 8F-119

8F-123 8F-129

8F-135

8F-139

8F-143 8F-147 8F-157

8F-167

8F-173 8F-177

8F-181

8F-197 8F-205 8F-213

8F-217

8F-221 8F-225

rev.08JUL91

Model 8901B Service

ASSEMBLY

0

A53

PRINCIPLES

General

The load impedance of the power-sensing element dissipates the RF input power applied power sensor (in tile Sensor Module). output and convert the signal back

Amplifier

The ac signal, which in the external power sensor and the RF Power circuits. Amplifier external power sensor form a low-noise, high-gain operational amplifier. See Figure of the amplifier VR1, non-linear output of the power sensor’s power sensing element. (The efficiency of the power-sensing element shaping network reduces the gain of Amplifier R16 (RNG

Service

RF

Power (Sensor Input Circuits)

OF

OPERATION

of

the power-sensing element

to

1

is

proportional

is

approximately

and

VR2 and associated components are

is

slightly impaired when the RF input

5)

permit fine adjustment

to

dc for measurement by the Voltmeter.

to

700.

Sheet

A

sampling gate (chopper) in the power sensor converts the dc

a 220

Hz

ac signal. The RF Power circuits amplify the ac signal

the

RF

input power, is amplified

DC

bias

is

set by R2,

part

to

1

to give a linear overall response.

of

the gain of the shaping circuit for high levels.

1

to

the external

by

tuned ac amplifier stages

1

and the output amplifier of the

8F-1.

The ac gain

R3,

R4,

R5,

and R6. Diodes CR1, CR2,

of

a shaping network which compensates for the

the power sensor is near maximum power.) The

R13

(RNG

4)

and

I

SENSOR MODULE

h

Figure

8F-1.

-,Y

I

POHER

First Amplifier Stage

A53 POWER METER ASSEMBLY

SENSOR

CABLE

of

the RF Power Meter

-

Service Sheet

1

8F-1

Service Model 8901B

The combination of C10, R9, and R10 determines, in part, the upper cutoff frequency (240

of

the bandpass response

frequency (200

Hz).

the ac amplifiers; C14, R19, and R20 determine, in part, the lower cutoff

C1,

C5,

and C13 filter line noise.

Ground Regulator

U17 and U1B are connected as a voltage follower between the GND

Sensor Module and ANALOG GND

1

of the RF Power circuits. This circuit ensures that a minimum voltage difference exists between the grounds to eliminate error-creating voltage difference between measurement ground and instrument ground.

Attenuators 1 and 2 and Amplifiers 2 and

Attenuators 1 and 2 operate as shown in Table

Zuble

8F-1.

Range

1

2

3

4

5

Attenuation

’

Attenuator

3

8F-1.

(The attenuation indicated

us.

Range

Attenuation

1

Attenuator2

0 0

0

40

20

40

20

40

of

Attenuators

(dB)

REGULATOR

1

and

I

Total

I

0

20

40

60

80

line from the

is

voltage attenuation.)

2

Hz)

of

Amplifier 2 has a gain

R31

C27 and

determine, in part, the upper cutoff frequency (240

ac amplifiers; C19, R24, R25, and R26

Hz).

(200

of

21. Amplifier 3 has a gain of 19. The two combinations of

Hz)

of the bandpass response of the

and

C22

and

R27 determine, in part, the lower cutoff frequency

C18

and R21 and of

Synchronous Detector

The 220 gate (chopper) Q6

is

-1.

ac signal originating in the power sensor’s chopper, the output dc level of the signal from the external power sensor.

220

Hz

The 220

(Q4)

Qll and Q12 are drivers. R40 (FREQ) allows fine adjustment of the multivibrator’s frequency. R40 is adjusted for minimum phase shift through the bandpass filter response of the ac amplifiers. The point of minimum phase shift gives the maximum and most drift-immune power indication.

Hz

to

the gate of

When Q4

Multivibrator drives the Synchronous Detector in the same way

in

the external power sensor. The 220

FET

Q4 which causes Q4 to turn on and off. When Q4 is on, the gain of amplifier U3

is

off,

the gain

of

U3

is proportional

is

+l.

Since the 220

to

Hz

switching signal is applied through Q5 and

Hz

drive signal is in synchronism with the

of

U3

is

full-wave rectified. The average

the power dissipated in the power-sensing element of

it

drives the sampling

Multivibrator

Hz

Multivibrator drives both the chopper in the external power sensor and the gain switch

of

the Synchronous Detector. Q8, Q9, and associated components form an astable multivibrator.

8F-2

Service Sheet

1

Model

8901B

TROUBLESHOOTING

General

Procedures for checking the RF Power Assembly are given below. The circuits to check are marked on the schematic diagram by a hexagon with a check mark and a number inside, for example,

In

addition, any points outside the labeled circuit area that must be checked are

signals are also shown on the schematic inside a hexagon, for example, Extend the board assembly where necessary to make measurements. Extending the assembly will require

freeing the the cables will require disconnecting several RF cables. The RF cables need not be reconnected while troubleshooting the assembly.

two

multi-conductor cables atop the assembly

Service

also

identified. Fixed

(+1.9

TO

+2.1

VDC)

.

so

that they may be reconnected. Freeing

@

.

Tighten

SMC

connectors to tors is insufficient. Hand-tightened connectors can reduced performance

Equipment

Oscilloscope Range Calibrator.

(ZJ

Amplifier 1 and Ground Regulator

1.

Remove any connection to the SENSOR connector.

2.

Connect one channel of a high-impedance, dc coupled oscilloscope

other channel to pin 7 of UlB. Connect pin 3 of

indicated in the table below. After connecting the resistor to the supply, briefly short pin

U17 to chassis ground and observe the oscilloscope display. The voltages should be as indicated

in Table

......................................................................

................................................................

Failure of the Ground Regulator may make Amplifier 1 appear to fail.

8F-2.

0.6

N.

or

malfunctions.

Check

m

(5

NOTE

in.

lb). Hand tightening of connec-

work

loose and cause

to

pin 6 of U17. Connect the

U17

through a

100

kR resistor to the supply

HP

1740A

HP 11683A

2

of

NOTE

U17

and

UlB

will be operating with nearly short-circuited outputs, which

they should be able to withstand indefinitely. It

as

brief

as

possible. The +15V Supply is easily accessed at the + end

-15V

Supply at the - end of

Table

Connection on U17 Pin

-15V

8F-2.

is

Voltage Limits for

Limits (Vdc) Limits (Vdc)

+0.2

to

+1

-1

.o

to

-0.2

removed, the outputs of U17 and U1B will normally

Hint:

to be

C2,

the

of

If

the short on pin 2 of U17

towards the corresponding supply and, for the

is

a good practice, however,

C4.

(./1>

Step

6

.o

+15V

on U1B Pin 7

+0.1

to

+0.3

-0.3

to

-0.1

Supply, will begin pulsing.

2

Service Sheet

If

this change

1

drift

8F-3

Service

Model

8901B

does not occur, the Ground Regulator is working properly but Analog Ground

3.

Remove the short from pin 2 of U17. Connect the oscilloscope to A53TP6 the 100 and

4.

Ground pin 3 of U1A. (Shorting

5.

Connect the oscilloscope to pin 1 of U1A. The voltage should be between

Hint:

is

6. Connect a be between

7.

Remove all jumpers. Leave the oscilloscope connected

8.

Connect the range calibrator to the SENSOR input. Set the calibrator’s range to calibrate, and polarity to normal.

9.

Press RF POWER. The waveform on the oscilloscope display should appear as shown in

Figure 8F-2.

kS1

f50

mVdc.

UlA,

high enough to drive UlA into limiting by the

1)

requires more current than the regulator

resistor to chassis ground. The level at A53TP6 should slowly

R1

with a cliplead may be the simplest way to do this.)

R2,

and R6 form an inverting amplifier with the

-15V

Supply.

42.2

kR

-0.5

resistor between the + end

and

+0.5

Vdc. (Ignore any ac ripple.)

4.2

to

of

4.9

C5

and the -15V Supply. The voltage should

to

ms

+

its

load (the devices connected

is

able to supply.

+15V

Supply

pin 1 of U1A.

(A

GND).

drift

to between

-15

and

as

the input. The gain

to

1

Connect

-12

Vdc.

mW, function

to

-50

ov

Figure

Hint:

If

the period the Zeroing Control circuit can alter the input to Amplifier this is suspected, short R65 (see Service Sheet

10.

Set the calibrator’s range to waveform should appear as in the figure for step

Hint:

If

faulty, check the components associated with the Range 4 shaping circuit (R13,

CR2, etc.).

is

out of limits, see

10

8F-2.

mW.

Waveform

@

Reduce the oscilloscope’s vertical gain by a factor of

for

220

Hz

2)

and recheck the waveform.

9

with the voltage limits multiplied by

(v’l)

Step

9

Multivibrator Check. Improper operation of

1

and cause an erroneous output. If

10.

The

10.

CR1,

8F-4

Service Sheet

1

Model 8901B Service

11.

Set the calibrator’s range to 100 mW. Reduce the oscilloscope’s vertical gain by a factor of 10. The waveform should appear as in the figure for step 9 with the voltage limits multiplied by 100.

Hint:

If

faulty, check the components associated with the Range 5 shaping circuit (R16, VR1,

VR2, etc.).

@

Attenuator

1.

Connect the range calibrator to the SENSOR input. Set the calibrator’s range to 1 mW, function

to calibrate, and polarity to normal.

2. Connect a high-impedance, ac coupled oscilloscope to pin shown in the figure for step 9 of the

Hint:

1,

Amplifier

If faulty, perform

2,

Attenuator

(./1>

above.

2,

and Amplifier 3 Check

1

of U1A. The display should be as

(J1)

Amplifier 1 and Ground Regulator Check.

3. Connect the oscilloscope to pin 2 of U4A. Key in 0.209 SPCL to switch U4A on and U4B The waveform on the oscilloscope display should appear as shown in Figure 8F-3.

-4

4.2

to

4.9

ms

+

ov

off.

Figure

Hint:

Pin 1 of U4A should be a TTL low. Pin 8 of U4B should be high.

4. Key in 0.208 SPCL to switch U4A The waveform should appear

Hint:

Pin 1 of U4A should be high. Pin 8 of U4B should be low.

5. Connect the oscilloscope to pin SPCL to switch U4C on and U4D and U8A 8F-4.

Hint:

Pin 9 of U4C should be low. Pin 16

8F-3.

as

in the figure for step

11

of U4C. Switch the calibrator’s range to 1 mW. Key in 0.202

Waveform

off

and

for

@

Step

3

U4B on. Switch the calibrator’s range to 100 mW.

3.

off.

The waveform should appear as shown in Figure

of

U4D and pin

1

of

U8A should be high.

Service Sheet

1

8F-5

Service

I

ov

-+

4.2

to

4.9

ms

+

Model

8901B

Figure 8F-4.

ov

+

Waveform for

4.2

to

4.9

ms

@

+

Step

5

8F-6

Service Sheet

Figure 8F-5.

1

Waveform for

@

Step

8

Model 8901B Service

6.

Key in 0.204 SPCL to switch U4D on and U4C and U8A mW. The waveform should appear as in the figure for step

Hint:

Pin 16

7.

Key in 0.208 SPCL to switch U8A on and U4C and U4D mW. The waveform should appear as in the figure for step

8.

Connect the oscilloscope to A53TP1 (AC). The waveform should appear as shown

of

U4D should be low. Pin 9 of U4C and pin

off.

Switch the calibrator’s range

5.

1

of

U8A should be high.

off.

Switch the calibrator’s range

5.

in

Figure 8F-5.

to

10

100

Hint:

approximately

@

Synchronous Detector Check

1.

Connect the range calibrator to the to calibrate, and polarity to normal. Press

2.

Connect a high-impedance, ac coupled oscilloscope to A53TP1 (AC). The display should be as shown in the figure for step 3 Check.

Hint:

3.

DC couple the oscilloscope and connect

shown in Figure

Hint:

between 4.2 and 4.9 as Q4 switches from

of

The waveform at pin 7 of

600

mVpp.

If

faulty, perform

8F-6.

The collector of Q6 should be switching between

u3.

U2B should have a similar shape and an amplitude of

SENSOR

8

of the

(J2)

above.

ms.

The gain

off

to on. Non-uniform half-cycles indicates unequal gain for the

@

of

operational amplifier based on U3 switches from

4.2

input. Set the calibrator’s range

RF

POWER.

Amplifier

it

to A53TP2

to

4.9

1,

Attenuator 2, Amplifier 2, and Amplifier

(a

DET). The waveform should appear as

0

and

approximately -15V with a period

ms

+-

to

1

mW, function

$1

two

to

-1

states

ov

Figure

8F-6.

Waveform

for

(J3)

Step

e-

3.4

to

3.8

v

e-

ov

3

Service Sheet

1

8F-7

Service

@

Model

220

Ht

Multivibrator

1.

Connect a high-impedance, dc coupled oscilloscope to A53TP4 (MULTVIB or MV1). The waveform should be a square wave switching between

4.2

and

4.9

ms.

Check

OV

and 10 to

11V

with a period between

8901B

Hint: A more accurate way of measuring the multivibrator’s frequency and adjusting it

is found in

2.

Connect the oscilloscope to

Adjustment 20-Power Meter.

A53TP5

(MV2)

and

repeat step

1.

if

necessary

8F-8

Service Sheet

1

Model

8901B

Service

ASSEMBLY

0

A53

RF

Power

(Control Circuits)

PRINCIPLES OF OPERATION

General

This Service Sheet documents the circuits that filter the signal from the Synchronous Detector, zero the Power Sensor, and control the Power Meter and external Sensor Module.

Noise Filter

The dc voltage from the Synchronous Detector (see Service Sheet improve measurement readability. U13 and associated components form an active, three-pole, low-pass filter. The noise bandwidth

is

bandwidth

1.

(In addition, in range 1, the Controller effectively increases filtering by averaging several successive

readings.) The Voltmeter reads the Noise Filter output (RF PWR/SENSOR TYPE) via switch U8C to display RF

power. The Voltmeter also reads the Noise Filter output via

to

the front-panel SENSOR input connector. By reading the voltage developed at the junction of R68, R69, and the SENSOR-TYPE READBACK line the type of sensor has a unique resistor value with one end of the resistor connected Module, the resistor is 1.62

used in ranges 5,4, and 3 (refer

Service

is

10 Hz with switch U8B closed and 1 Hz with U8B open. The 10 Hz

Sheet

to

Table

2

8F-1);

U8D

1)

is

filtered to remove noise and

the 1 Hz bandwidth

to identify the type of sensor connected

is

determined. Each sensor type

to

ground. (In the HP 11722A Sensor

is

used in ranges 2 and

kn.)

Zeroing Control

Power offsets (positive come primarily from the Power Sensing Element in the external Power Sensor. The offset by the Zeroing Control DAC (U10) when the Power Meter Controller removes the power from the external Power Sensor using the Input Switch in the Sensor Module. manually removed before zeroing takes an RF power reading and adjusts the Zeroing Control DAC attempt may be required to bring the reading within limits.

The Zeroing Control DAC outputs a current proportional current, flowing through R65 develops a negative voltage. Another current, originating from Q15, flows

through R67 to develop a constant positive voltage across R65. The combination of the currents from the DAC and Q15 thus permits a positive Sensing Element of the external Power Sensor. To minimize VR4, and VR5 are biased by thermally compensated current sources (Q14 and Q15) to produce the reference voltage to the DAC and R67.

(If

a sensor

or

negative readings from the Power Meter when no power

is

zeroed. To zero the Power Meter, the

is

used which

is

not part of a Sensor Module, the RF power source must be

is

attempted.) With no power into the Power Sensor, the Controller

to

cancel the reading; more than one

to

the binary-weighted input. This output

or

negative offset. The offsetting voltage

drift

of the offset, reference diodes VR3,

is

actually applied)

is

fed to the Power

Sensor Module Switch Control

The Switch Drive One-Shot permits control of latching-type RF switches in the Sensor Module which can have either automatic breaking U16 provides an energizing pulse for

Switch Q3 actually energizes the RF switch solenoid. The collector resistor (R77) of Q3 provides sufficient drive current for the types of RF switches commonly used in the external Sensor Module.

or

non-breaking solenoid drive contacts. For either case, one-shot

30

ms which

is

sufficient to throw the switch’s plunger.

is

cancelled

Service Sheet 2

8F-9

Service Model 8901B

CR3 suppresses the emf generated by the

is

driven from U16 via Q13.

Relays K1 and K2, activated by U14A and U14B, route the switch drive to the proper solenoid contacts. The Controller then activates the RF switch via the Switch Drive One-Shot.

RF

switch solenoid when the drive current

is

interrupted. Q3

Power Reference Oscillator Control

The

RF

When

Power Reference Oscillator (see Service Sheet

Q2

is on, -15V is supplied to the reference circuitry.

3)

is activated

by

the Controller via Q7 and

Frequency Offset Control

Gates U15A and U15B provide a three-level down-converter the status and frequency range of frequency offset. information.)

(0,

+3,

and

+5V)

output

to

indicate to

(See Table 8D-4 for status

Select Decoder and Data Latches

Refer to the general discussion under Power-Up Reset circuit that sets the front-end components of the instrument to the most-protected state at power-up; that is, input attenuation switched out.

Instrument

is

set

Bus

in Service Sheet BD5. R53 and C35 for the

to

maximum and the external Power Sensor

an

Q2.

external

is

8F-10

Service Sheet

2

Model

8901B

TROUBLESHOOTING

General

Procedures for checking the on the schematic diagram by In addition, any points outside the labeled circuit area that must be checked are also identified. Fixed signals are also shown on the schematic inside a hexagon, for example,

Extend the board assembly where necessary to make measurements. Extending the assembly will require freeing the the cables will require disconnecting several troubleshooting the assembly.

two

RF

Power Assembly are given below. The circuits to check are marked

a

hexagon with a check mark and a number inside, for example,

multi-conductor cables atop the assembly

RF

cables. The

(+I

.9

TO

+2.1

VDC)

.

so

that they may be reconnected. Freeing

RF

cables need not be reconnected while

Service

(J3)

.

Equipment

Oscilloscope Range Calibrator.

(XJ

Noise Filters Check

1.

Connect the range calibrator to calibrate, and polarity to normal. On the Measuring Receiver, press RF POWER.

2.

Connect a high-impedance, dc coupled oscilloscope to A53TP2 The waveform should appear as in Figure 8F-7.

Hint:

If

I

Tighten tors reduced performance

SMC

connectors to

is

insufficient. Hand-tightened connectors can

or

0.6

N.

m

malfunctions.

(5

in.

lb).

Hand tightening of connec-

work

loose and came

......................................................................

................................................................

to

the SENSOR input. Set the calibrator’s range

(a

DET). (See Service Sheet

the waveform

is

faulty, see Service Sheet 1 and check the Synchronous Detector.

4

4.2

to

4.9

ms

+

3.4

to

1

mW,

to

HP

3.8

HP 1740A

11683A

function

1.)

v

Figure

8F-7.

Waveform for

(J1)

Step

2

Service Sheet

ov

2

8F-11

Service Model 8901B

0

3. Connect the oscilloscope The waveform should be dc

Hint:

Pin 8 of U8B should be a TTL high.

4. Key in 0.230 SPCL to set the Noise Filters to narrow. The waveform should be between

900

mV.

Hint:

Pin 8 of U8B should be a TTL low.

RF

Power and Sensor-Type Readback Switches Check

1.

Connect the range calibrator to the SENSOR input. Set the calibrator’s range to 1 mW, to calibrate, and polarity to normal. On the Measuring Receiver, press RF POWER.

2.

Connect a high-impedance, dc coupled oscilloscope to A53TP3 (FLTR). The waveform should be

at

a

dc

Hint:

3. Key in 0.21A SPCL to enable the RF Power Readback Switch. Key in 49.F SPCL to read back the output

Hint:

4. Key in 0.219 SPCL to enable the Sensor-Type Readback Switch. Key in 49.F SPCL. The display should read between -0.01 and +0.01. (The sensor-type resistor in the range calibrator circuit.)

level between

If

the waveform

of

the switch. The display should read between

9 of U8C should be a TTL low. Pin 16 of

to

A53TP3 (FLTR). Key in 0.231 SPCL to set the Noise

at

a

700

and

900

is

faulty, perform

level between

mV.

700

and 900 mV.

above.

U8D

0.7

and 0.9.

should be a

TTL

high.

Filters

is

to

wide.

700

function

a short

and

Hint:

Pin 9 of U8C should be a TTL high. Pin 16 of U8D should be a TTL low.

@

Power Reference Oscillator Control Check

1.

Connect a high-impedance, dc coupled oscilloscope

2. Key in 0.21E SPCL to switch Q2 on. The dc waveform should be between

Hint:

Pin 10 of U6 should be a TTL high.

3. Key in 0.21A SPCL to switch

Hint:

Pin 10 of U6 should be a TTL low.

(J4)

Sensor Module Switch Control Check

1.

Disconnect any connection to the SENSOR input.

2.

Connect a high-impedance, dc coupled oscilloscope to pin 6 of U16.

to

3. Key in 0.24 SPCL

be a square wave with a period of approximately 60 ms and a level alternating between a TTL high and a TTL low.

Hint:

Pin 1 of U16 should be low-going TTL pulses with a width of approximately 30 ms and a

period of approximately 60 ms.

4.

Connect the oscilloscope to pin 14 of K1. Connect a 10 kR resistor between pin 14 of K1 and ground. The waveform should be a square wave with a period of approximately 60 ms and a level

alternating between approximately

trigger the Switch Drive One-Shot. The waveform on the oscilloscope should

Q2

off.

-

to

the collector of Q2.

The dc waveform should be between

15 and

OV.

-15

and -14 Vdc.

+1

and

+2

Vdc.

5.

Move the oscilloscope and resistor to pin 8 of the relay indicated in Table 8F-3. Key in the

Direct Control Special Functions indicated in the table. For each step, the waveform should be as described.

8F-12 Service Sheet

If

2

faulty,

also

check the logic level

on

the pin on U14 indicated.

Model 8901B Service

@

Zeroing Control Check

1.

Connect the range calibrator to the

2.

On the Measuring Receiver, press RF POWER.

3.

Connect a high-impedance, dc coupled oscilloscope

voltage should be between +6.0 and +6.4 Vdc. (The two voltages may differ from each other.)

Hint:

If

the voltage at the collector of Q15

OV, there may be

5.

Connect the oscilloscope to pin Functions to clear the latches of U11: 0.220 SPCL, 0.222 SPCL, 0.224 SPCL, 0.226 SPCL,

0.228 SPCL, 0.22A SPCL, 0.22C SPCL, and 0.22E SPCL. (Note that each suffix oscilloscope should read approximately 15 mVdc.

Hint:

Pins 4,

Direct Control

Relay

K1 K1

K2 K2

a

fault in the Ground Regulator. (See Service Sheet

5,

6,

7,

9, 10,

Special Waveform

Functions Pin 2 Pin

0.212, 0.24

0.21A, 0.24

0.212, 0.24

SENSOR

4

of

U10. Successively key in the following Direct Control Special

11,

and

12

as

in

step

4

0

Vdc

as

in step

0

4

Vdc

input. Set the calibrator’s function to standby.

to

the collectors of Q14 then Q15. The dc

is

faulty, check the anode of VR5;

of U11 should be TTL low.

Level

L

H H

L

(TTL)

at U14

7

H L

L

H

1.)

if

the voltage

is

not

even.) The

6. Successively key in 0.221 SPCL, 0.223 SPCL, 0.225 SPCL, 0.227 SPCL, 0.229 SPCL, 0.22B SPCL, 0.22D SPCL, and 0.22F SPCL. Special Function

is

entered, the voltage should drop

is approximately -15 mVdc.

Hint:

As each Special Function is entered, the pins of U11 mentioned in the previous hint should

successively go to a TTL high.

@

Select Decoder and Data Latches Check

1.

Key in the Direct Control Special Functions indicated in Table 8F-4. For each setting, check the

pins on U12 indicated.

Direct Control

Special

Function

0.200

0.21

0

0.220

0.230

0.240

(Note

that each suffix

is

successively larger

Level (TTL) at U12 Pin

11 12 13 14 15

H

H H H H

H H

H H H

is

odd.) As each Direct Control

H

H H H H H H

steps

until the voltage

Service Sheet

2

8F-13

Service Model

8901B

Table

Direct Control

Special

Function

0.230

0.23E

0.232

Direct Control

Function

4.

Key in the Direct Control Special finctions indicated pins on

U6

indicated.

Direct Control

Function

2

L

H

L

lbble

Special

0.200

0.20F

lbble

Special

0.21

0

0.21

F

8F-5.

Levels at

Level (TTL) at U9 Pin

7

L

H H

8F-6.

8F-7.

Levels at

H

Levels at

U9

10

L

H

L

Level (TTL) at U5 Pin

L

Level (TTL) at U6 Pin

and

US,

U15,

15

L

H

L

@

L

in

@J

@

Step

Level at U15 Pin

3

TTL

L

7TL

H

2.6

to

3.2Vdc

Step

3

L

Table 8F-7.

Step

4

2

5

rrL

L

lTL

H

lTL

L

For

each setting, check the

5.

Key in

1

of

0.0

SPCL

U9

to

reset the latches. Measure all the

should be the same

0.200

in step

3,

to

disable the current Direct Control Special Function. Momentarily ground pin

IC

and

as

those given

0.210

in step

pins in steps

for

the Direct Control Special Function code

4.

2,

3,

and

4.

For

each pin, the level

0.230

in step

2,

8F-14 Service Sheet

2

Model 8901B

Service

ASSEMBLY

0

A32

PRINCIPLES

General

The Power Reference Oscillator generates a 50 over a wide range of environmental conditions. The oscillator

500

a

50

MHz Oscillator

The tank circuit of the combination of C13 and C14. (Since C13 has much less capacitance than C14, C14 in determining the frequency of oscillation.) At

shift. Another tank circuit is fed to the base of Q1 through a capacitive voltage divider-C4 and varactor diode CR3. Thus,

Service

Power Reference

OF

OPERATION

load.

180"

phase shift

at

50

MHz, an in-phase signal fed back to the base of Q1 re-enforces the oscillation.

Oscillator

50

MHz Oscillator

is

generated between the base and collector of Q1. The output of the

Sheet

MHz signal which maintains a constant output level

is

a pi-network consisting of C11, L1, and the series

3

is

adjusted to deliver 1 mW

50

MHz, the tank circuit produces 180" phase

(0

&m) into

it

predominates over

Voltage divider R12 and R13 sets the bias voltage establish the quiescent emitter current. The frequency of oscillation

is

output of the oscillator which sets the dc collector voltage of Q1 at ground potential.

taken from the tap of capacitive divider C13 and C14. L2

at

the base of Q1. Emitter resistors R14 and R15

is

adjusted by L1 (FREQ). The

is

an

ALC Loop

The Automatic Leveling Control (ALC) Loop is a negative-feedback loop which assures that the

oscillator output level remains constant. CR2 detects the positive peak of the signal at the output

is

of the tank circuit. The detected peak voltage by comparator U2. If the detected signal level differs from the reference, varactor diode CR3 which changes the junction capacitance of the diode and thus the division ratio of the capacitive divider bias), the positive feedback to the base of Q1 is increased and the output level of the oscillator increased.

C9

and

CR3.

If

the capacitance of CR3 decreases (due

stored in C7 and is compared

U2

to

a

dc reference voltage

alters

the reverse bias on

to

an increase

DC Reference and Level Adjust

The reference to which the detected oscillator signal voltage reference diode VR1. VR1, when biased with a specified current, has a breakdown voltage that is constant with temperature. Q2 supplies

Q2

and has a temperature coefficient that tracks the base-emitter junction of Q2.

U1

inverts and slightly attenuates the reference voltage from VR1. R4 (LEVEL adjustment of the reference and hence the output power of the oscillator. CR1 adds a temperature coefficient to the reference input of U2 which matches the temperature coefficient CR2. The Power Reference Oscillator REF OSC ON/OFF -15V line.

a

constant current

is

switched

is

compared in the ALC Loop originates with

to

VR1. VR2 sets the emitter current of

ADJ)

permits fine

of

the detector diode

off

by interrupting the -15V supply via the PWR

RF choke

of

reverse

is

Service Sheet

3

8F-15

Service Model 8901B

TROUBLESHOOTING

General

Procedures for checking the Power Reference Oscillator Assembly are given below. The circuits to check are marked on the schematic diagram by a hexagon with a check mark and a number inside, for example,

@

.

Fixed signals are also shown on the schematic inside a hexagon, for example,

Remove the assembly, the assembly cover, and RF cables where necessary

to

(+I

.9

TO

f2.1

VDC)

make measurements.

Tc....;;7

.

When removing the

supply terminals do not short against the metal

Tighten

tors is insufficient. Hand-tightened connectors can work loose and cause

reduced performance

If

the correct output level

measurement system.

19-Power Reference

SMC

connectors to

a fault in the Power Reference Oscillator

Equipment

Oscilloscope

.

. . . .

. .

.

. . .

.

. . . . . . . . . . .

Power Reference Oscillator Check

1.

Connect a high-impedance, dc coupled oscilloscope to

RF POWER, and switch CALIBRATE on and

+2

Vdc when

Hint:

If

2. Switch CALIBRATE on. Connect the oscilloscope to A32TP1. The voltage should read between +3.5 and +5.5 Vdc.

off

and between

faulty, see Service Sheet 2 and check the Power Reference Oscillator Control.

RF

power calibrator assembly, take care that the power

0.6

N.

m

(5

in. lb). Hand tightening of connec-

or

malfunctions.

(1

mW)

must

be set

To

see what this entails, review

in

Section

. .

5.

. . . . . .

. . .

. . . . . . . .

C3

off.

The dc waveform should read between

-15

and -14 Vdc when on.

chassis

is

by

. .

. . . . . . . . . . .

parts.

isolated and repaired,

a very accurate power

Adjustment

.

. . . . .

(where the violet wire connects). Press

18

. . . .

OT

. . .

.

HP

1740A

+1

and

Hint:

The voltage at the collector of Q2 should be between

3.

Connect the oscilloscope

Hint:

If the oscillator does not oscillate and the voltage U2 is working properly. positive than

Hint:

Modulation

R10, R11,

8F-16 Service Sheet

or

3

to

A32TP2. The voltage should read between

If

the oscillator output

-1

Vdc, U2 is working properly.

or

spurious signals on the oscillator output may be caused by a fault in R9,

C8.

-6.4

and

-6.0

at

A23TP2 is more negative than

is

very large and the voltage

-5

Vdc.

and

at

-1

Vdc.

A23TP2

-5

is

Vdc,

more

Model 8901B Service

ASSEMBLIES

RF

Input (A15)

PRINCIPLES

General.

The RF Input Assembly contains the Input Attenuator, Overpower Protection, RF Level and Overpower Detector, and 5.25 MHz High-Pass Filter. Together, these circuits provide a suitable input signal for the Input Mixer (see Service Sheet

5.25

MHz High-Pass Filter.

The 5.25 MHz High-Pass filter must be switched in by entering user Special Function 3.3 Its function is present along with a higher frequency input signal. The filter termination An example of such a signal Input Mixer over the wide range of input frequencies. The filter transistor Q2.

OF

OPERATION

to

all frequencies present at

prevent the

Service

5).

IF

from responding

its

is

the IF itself. The

Sheet

output (whether above

4

to

low-frequency, spurious signals which may be

is

a diplexer type which presents a

500

termination improves the RF flatness of the

is

switched in by relay K2 via driver

or

3.4 SPCL.

or

below the cutoff frequency).

500

Input Attenuator.

The Input Attenuator is composed of

10

dB

steps. Each pad

(R15 and R19) in parallel to handle the brunt of high-level RF power. The pads are switched in by

relays K3, K4, and K5 driven by transistors Q6, Q7, and Q8 respectively.

RF

Level Detector.

The

RF

Level Detector (CR1 and CR2) senses the positive peak of the input signal. The detected dc

voltage

LEVEL measurement mode is selected, and to de-activate the Overpower Protection relay. Because the detector can introduce a slight amount of clipping on the input signal, it is switched slightly off the instrument when QlO is on.

is

used to initially set the Input Attenuator,

is

tuned

is

a resistive pi network. The

to

the input signal except when measuring Rf level. The detector

two

20

dB

pads and one 10

first

to

shunt

give

dT3

arm

an

indication

pad for a range of 0 to

of 20

dB

No. 1 has two resistors

of

RF level when the RF

Detector Amplifier.

U1 and U2 from a unity-gain amplifier and peak detector with offset. U2 detects the peaks of the signal from the RF Level Detector when AM is present on the signal. Whenever the voltage at the

(+)

non-inverting Note 2 on the schematic) turns on and charges C22 from the input voltage at the inverting input plus the constant drop across CR7, R34, CR8, and R42. U1 is

a

simply remains charged to its previous level. R39 and R41 slowly discharge C22 when the input signal level is lowered CR8 are hot carrier diodes whose offset voltage tracks that of CR1 and CR3 with temperature. Fine adjustment of the offset is made with R42 which is present.

unity-gain buffer amplifier. When the input voltage drops the output of U2 shuts off, and C22

or

input of U2 exceeds that

removed. CR7 and CR8 are biased on by R26 which acts as a current source. CR7 and

of

the inverting input

its

is

set for zero output from U1 when no input signal

(-),

the output transistor of U2 (see

emitter until the voltage across C22 equals

50

is

shut off

dT3

in

after

Service Sheet 4 8F-17

Service Model 8901B

Overpower Detector.

The Overpower Detector amplifier U3 senses when the output from the RF Level Detector and voltage

R54,

divider R36, corresponds to Protection relay K1 via the LO Control circuits (see Service Sheet reset by the operator pressing any front-panel key.

and R37 exceeds +2.7V (set by

1W

of input power. The output of U3A then goes low and deactivates the Overpower

R43,

R44,

and hysteresis resistor R56) which

21.)

K1 remains de-activated until

The OVERPOWER(L) output line from U3A

perfroms two other functions. First the line is used to discharge the storage capacitor

Amplifier between

RF

when

a qausi-low is put on the line by the LO Control circuits. The low does not trip the overpower circuit

but

It

also turns

Detector can still sense

LEVEL is not being measured after the instrument

is

low enough

off

RF

LEVEL measurements. Second, the line

to

set the Detector Amplifier Discharge comparator

the

RF

Level Detector by turning on Q11, Q9, and QlO. In this

an

overpower condition and trip the Overpower Protection.

is

also

an input line from the LO Control circuit which

C22

of

is

used to turn off the RF Level Detector

is

tuned.

To

accomplish these

U3B

low which discharges C22.

state

the

Relay Drivers.

The drivers for the five relays are similar.

or

Q8)

turns the transistor on and energizes the relay. The relay contacts move in the direction of the

arrow.

and improve switching speed. Control

The capacitors across the relay coils suppress the flyback voltage when the coil

A

of

the relays

TTL

low at the base of a driver transistor (Ql, Q2, Q6, Q7,

is

de-energized

is

via the LO Control circuits (see Service Sheet 21).

the Detctor

two

tasks,

RF

Level

8F-18

Service Sheet

4

Model 8901B

TROUBLESHOOTING

General

Service

Procedures for checking the schematic diagram by a hexagon with a check mark and a number inside, e.g. any points outside the labeled area that must be checked are on the schematic inside a hexagon, e.g. and output cables where necessary to make measurements.

Tighten connectors came reduced performance, malfunctions,

he RF Input Assembly are given below. The circuits to check are marked on

also

identified. Fixed signals are shown

(+1.9

to

+2.1

Vdc)

.

Extend the board assembly

SMC

connectors to 0.6 N-m

is

insufficient. Hand tightened connectors can

(5

in.

lb).

Hand tightening

or

damage to the instrument.

Equipment

Oscilloscope Power Supply.. Signal Generator. Voltmeter

(J1)

Input Attenuator Check

1.

Set the signal generator to ac coupled oscilloscope. Switch the input impedance of the oscilloscope to 500 input in 50R using a tee.

......................................................................

...................................................................

.................................................................

........................................................................

11

MHz CW at +13 dBm. Connect int Rf output to the input of an

work

@

of

loose and

or

.

In addition,

and

its input

HP 1740A

HP

6215A HP 8640B HP 3455A

terminate the

2.

Fine adjust the signal generator's level for

3.

Reconnect the signal generator's output to the Modulation Analyzer's INPUT. (The input cable, W1

or

W3, should be connected

A15J2 (RF OUT).

4.

Key in 41.0 check the signals indicated in Table 8F-8.

Hint: If the oscilloscope display reads low for all above conditions, check the 5.25 MHz High-Pass Filter, Overpower Protection, and input cable (W1

I

Check

Thru

SPCL

Table

Path

to

initialize the instrument. Key in the Direct Control Special Functions and

8F-8.

I

Direct

0.047

to

Levels at

Control

Function

A15J2 with an extender cable.) Reconnect the oscilloscope to

I

an

oscilloscope display of 3 Vpp.

or

XA15,

18

QSc, Q7c, and Q~c,

A28XA15

I

19 20

L I L

W36).

.

-a.

Level

I

L)

.~

Pin Trai

Q6-c

L

H

-a

ar

nsistor

c,

H I H

(J1)

_,

__

-

Step

4

I

Oscilloscope

I

2.75

to

3.00

I

Service Sheet

4

8F-19

Service

@

Model 8901B

5.25

MHz

High-Pass

1.

Set the signal generator to ac coupled oscilloscope. Switch the input impedance of the oscilloscope to

Filter Check

5.25

MHz CW

at

+3

am. Connect

its

RF output

50R

to

the input

or

terminate the

input in 50R using a tee. Fine adjust the signal generator’s level for an oscilloscope display of 1 Vpp.

2.

Reconnect the signal generator’s output to the Modulation Analyzer’s INPUT. (Connect the input

3.

cable,

W1

or

W36,

to

A15J1 with an extender cable.) Reconnect the oscilloscope

to

A15J2

OUT).

of

(RF

an

Key in 41.0 SPCL and 0.047 SPCL

4. path. Key in the Direct Control Special Functions and check the signals indicated in Table 8F-9.

Hint:

Table

Check

Thru

Path

5.25

MHz

HPF

If

the oscilloscope display reads low for both above conditions, check the Input Attenuator,

8F-9.

Direct Control Level (TTL) at Oscilloscope

Special

Overpower Protection, and input cable (Wl

(J3)

Overpower Protection Check

1.

Set the signal generator to

11

Analyzer’s INPUT.

2.

Connect an ac coupled oscilloscope

oscilloscope to 500

3.

Key in 41.0 SPCL to initialize the instrument. Key in

0

dB.

Check the signals indicated in Table 8F-10 for the thru path only.

or

terminate the input in

Table

~~ ~

Check

Thru

8F-10.

Path

Overeower

to

initialize the instrument and set the attenuator to the thru

Levels at

Function

0.024

0.02c

or

W36).

MHz CW at

to

A15J2 (RF OUT). Switch the input impedance of the

Levels at

Level

A28XA15

L

H

XA15,

‘A28XA15 Pin 28 02-c Display (Vpp)

and

Q2c

@

Step

4

L

H

+13

am. Connect its RF output to the Modulation

H

L

0.76

0.59

to to

1.00

0.73

50 R using a tee.

1.1

SPCL

to

set the input attenuation to

XA15

and

Qlc

(J3)

Step

3

(TTL)

Pin 17

at Oscilloscope

-

01-c

~ Display (Vpp)

H

L

2.75

to

0

3.00

Hint: If the oscilloscope display reads low, check the Input attenuator,

input cable (Wl

4. Remove signal generator from INPUT. Set power supply to Modualtion Analyzer’s INPUT (the minus side should be at ground).

5.

Reconnect the signal generator. Check the signals indicated in the table under step 3 for the condition

6. Repeat step

8F-20 Service Sheet 4

or

W36).

of

overpower. The display should also show

3

to check the recovery from the overpower condition.

E06.

5.25

MHz High-Pass Filter, and

20

Vdc. Touch the +20V lead to the

Model 8901B

(J4)

Overpower

NOTE

If step 4 is repeated,

dc blocking capacitor

Discharge

it

also after completing this check.

it

is usually necessary to first discharge the input

by

connecting a

Detector Check

1.

Key in 41.0 SPCL to initialize the instrument.

2.

Connect a high-impedance, dc coupled oscilloscope node should be a TTL high.

5Ofl

termination to

or

a dc voltmeter to A28XA15 pin

the

INPUT.

Service

21.

The

(ZJ

3. Induce an overpower transient by touching the +20V lead (the minus side should be at ground). The node should show

to

the Modulation Analyzer’s INPUT

a

momentary low. The display should

also show E06.

NOTE

If

steps 1 to 3 are to be repeated, it is necessary to first discharge the input

50

R

dc blocking capacitor by connecting a

termination to the INPUT.

Discharge it also after completing this check.

Detector

1.

Set the signal generator to

Analyzer’s INPUT. (Connect the input cable,

2.

Key in 41.0 SPCL to initialize the instrument. Press RF LEVEL.

Amplifier

Check

11

MHz CW at +13 dBm. connect its

Wl

or

W36,

RF

OUTPUT

to

A15J1 with an extender cable.)

to

the Modualtion

3. Key in 0.024 SPCL and 49.31 SPCL to turn the detector on and to connect the internal voltmeter

to the output of the Detector Amplifier. Change the level Table

8F-11

and note the display. Alternatively, measure A15TP1 (RF DET) with a dc voltmeter.

%ble

RF

Level

8F-11.

1.05

0.27

Detector Amplifier Limits

Display

Limits

to

1.25

to

0.33

Voltage

at

A15TP1

1.05

0.27

of

the signal generator as indicated in

Limits

(Vdc)

to

1.25

to

0.33

(J6)

Hint:

If

the

off

condition above is slightly out of limit, perform the

RF

Level

1.

Remove the cable (Wl

2.

Measure the dc voltage at the junction

Detector

Offset

Check

or

W36) from A15J1. Key in 0.024 SPCL to turn the detector on.

of

CR4 and C13.

(The input impedance of the voltmeter must be at least 10 MR.)

Measure the dc voltage at pin

3.

read in step

4.

Key in 0.020 SPCL to turn the detector Measure the dc voltage at the junction of CR4 and CR13.

5.

2.

2

of

U2.

It

should be 50 to

off.

$10.0 Vdc. Measure the dc voltage at pin

6.

2

of U2.

It

should be between +13.0 and +14.5 Vdc.

RF

Detector Offset Adjustment.

It

should be between -0.5 and -0.2 Vdc.

70

mV more negative than the voltage

It

should be between +8.5 and

Service Sheet

4

8F-21

Service Model 8901B

(J7)

Detector Amplifier Discharge Check

1.

Set the signal generator to

Analyzer’s INPUT. (Connect the input cable, W1

2.

Key in 41.0 SPCL to initialize the instrument. Press RF LEVEL.

11

MHz CW at +13 dJ3m. Connect its RF output

or

W36, to A15J1 with

to

the Modulation

an

extender cable.

3. Key in

4.

5.

6.

@

SWRCheck

1.

0.020

SPCL to turn the detector

to the output of the Detector Amplifier. The display should read between

Key in

0.024

SPCL to turn the detector on. Key in 49.31 SPCL. The display should read between

off.

Key in 49.31 SPCL to connect the internal voltmeter

-0.0200

1.0000 and 1.3000.

Set

the signal generator for 50% AM at a

20

Hz rate. The display should vary no more than

fO.lV from its average value. Press RF LEVEL. Switch the signal generator’s AM off, then turn the RF

as

Modualtion Analyzer’s display

0.010 -03 watts by the second reading after the RF

the reading decreases. The reading should decrease to less than

is

switched

off.

Perform the SWR portion of the RF Level Performance Test.

and

+0.0200.

off

and note the

8F-22

Service Sheet

4

Model 8901B

Service

ASSEMBLIES

0

A17 Input Mixer

0

A16 Buffer Amplifier

0

A18

IF

Amplifier

0

52

LO

Input Switch (Option Series

PRINCIPLES

OF

OPERATION

General-A17 Input Mixer Assembly

The Input Mixer Assembly down-converts the input signal to an intermediate frequency

2.5

input signals above is

normally MHz. Below 2.5 MHz the input signal passes directly through the Mixer into the down-conversion.

The Input Mixer Assembly contains the Mixer, LO Amplifier, and two Filter and a Filter in the AM Demodulator Assembly which determines the frequency response of the (see Service Sheet

1.5

MHz for frequencies above

4

MHz Low-Pass Filter). The 4 MHz Low-Pass Filter

MHz, the

8).

Service

030)

IF

is equal

10

Sheet 5

to

the LO frequency minus the signal frequency. The

MHz

and

455

kHz for frequencies between

IF

Amplifier without

IF

filters (a

is

followed by a

455

2.5

kHz Bandpass

MHz Low-Pass

1.5

(IF).

and 10

MHz

For

IF

LO

Amplifier

The input Assembly (see Service Sheet 17). The amplifier has a gain of approximately 10

port of the Mixer (Ul) at about

Q6,

which are actively biased by notice that choke.) The base of

Q5

is normally a junction drop above this. The collector of Changes in the collector voltage of voltage

The gain of each stage

to the collector load. C3 increases the gain slightly at high frequencies.

of

to

the

LO

Amplifier

for

dc levels the emitter of

Q5

is

fixed at the voltage determined by voltage divider

Q4.

is

inversely proportional

is

a

1.25

to

1301.5 MHz signal which comes from the LO Divider

+10

am. The amplifier has

Q5

and

Q7

respectively. Using

Q5

is

connected directly to the collector of

Q4

alter the collector current of

to

the total emitter resistance and directly proportional

dB

two

stages, stripline transistors

Q4

and

Q5

to

illustrate the biasing,

Q4.

R1

and

R2.

Q5

is

the source of dc base current for

Q5,

which regulates the collector

and drives the L

(L3 is an RF

The emitter of

Mixer

Mixer U1

but signals at the pass into the coupled out from the center tap of the same transformer. UlCl that follow. UlTl optimizes the impedance seen by the Mixer’s R port improves the flatness over the wide range of input frequencies by presenting a constant impedance to the

is

a single-balanced type (that is, signals at the L port are balanced out at the R and I ports,

R

port are not balanced at the I port). This permits low-frequency input signals to

IF

without down-conversion. The LO signal

IF

at the R port. The Limiter adds protection to the Mixer.

is

coupled into the Mixer by UlT2.

is

the first element of the

IF

Amplifier. The Input Pad ahead

IF

Q4

IF

filters

of

and

Q4.

is

the

Service Sheet

5

8F-23

Service Model 8901B

IF Filters

IF

Filters

path. When Q12B goes on, Q12C goes on and activates Q9 and

The seven-pole, passband flatness to minimize incidental AM (AM generated in the

(23144

The 455 kHz Wide Bandpass Filter has seven poles and a 3 for best passband flatness to minimize incidental L11 is adjusted primarily for best phase linearity vs. frequency to minimize FM distortion generated in the IF. The filter

of U2B goes low. This also turns on DS1.

The 4

MHz

is switched in by via the LO Control Assembly (see Service Sheet 21).

The

IF

is routed in one of Option 030, the IF is routed directly to the A18 030 installed, the

(2642A

The down-converted

1.

Filter is selected, C32

of

The amplifier has

2.3 to the input of Q8 (the through-path). C18, R13, and response to compensate for slope in the

Transistor Q12B controls the routing of the

Q8 go off and switch the through-path out. This also turns on Control Assembly (see Service Sheet 21).

adjusted primarily for best phase linearity vs. frequency to minimize FM distortion generated in the

(UlC2

the Input Mixer for low-frequency input signals. The

to

2636~)

AM (AM

is

switched in by Q3 and Q1 which forward-bias CR3 and CR6 when the output

Low-Pass Filter has three poles

Q2

which forward-biases CR4 and CR5 when U2A goes low. Control of the filters

two

ways depending upon the option installed. For instruments without

IF

is

routed

and

Above)

(IF)

in

the Input Mixer

is

switched in (by Q13 turning on CR8 and CR9)

a

gain

Q1,

and switches the 455

455

kHz

to

the A16 Buffer Amplifier Assembly.

signal from the Input Mixer is filtered by the three-pole, 4 MHz

is

the first reactive component of the filter.) When the 455

of

5

to

the input

Wide Bandpass Filter has

(23144

IF

Amplifier Assembly. For instruments with Option

of

Q9 (the input

4

MHz Filters 1 and

IF

to

the 455 kHz Wide Bandpass Filter

Ql2D

kHz

Wide Bandpass Filter in.

3

dB

bandwidth of 200 kHz.

generated in the

to

2332A)

IF

is then amplified by the First

to

goes

or

five poles

to

improve the conversion efficiency

the 455 kHz Wide Bandpass Filter) and

L7

add a slight slope

2.

off.

Ql2C forward-biases CR3 and CR4,

At

DS1.

Control of the filters

dB

bandwidth of 200

IF

kHz.

as

L8

IF

as the result of

(23334

to

IF

to

the

IF

or

the through

the same time CR5 and

is

L8

is

adjusted for best

the result of FM). L11

is

adjusted

FM).

2636A).

Low-Pass

kHz

Amplifier.

frequency

via the LO

IF.

It

is

IF

is

NOTE

In Selective Power (Option Series

kHz

IF

bandpass measurements, the filter bandwidth depends mode and option installed.

The IF gain of 2.8 at the output

Low-Pass Filter

General

The signal from the Input Mixer is split and amplified by amplifiers. One

the Opt. 030 circuitry.

IF

Buffer Amplifier

Transitors Q3, Q2, and The non-inverting input divider formed by R10 and R9 supplies base bias

l+(R14/R12). The output from the emitter of

by

is

routed to the A72

to

2

on to the

-

A16

IF

Buffer Amplifier Assembly (Opt.

is

a

0

dB

Q1

R17 and the input impedance of the following circuitry. This results in a overall gain

filter

is inserted into the

IF

Channel Filter Assembly through the Second IF Amplifier, which has a

54 and unity gain at the output

A18

IF

Amplifier Assembly. The 4 MHz Low-Pass Filter 2 has three poles.

gain buffer

form a non-inverting operational amplifier with an ac gain

is

the base

for

the A18

of

Q3 and the inverting input is the emitter of Q3. The voltage

030)

Q1

measurement modes, a second

IF

path.

For

Selective Power

on

the particular measurement

to

81.

The

IF

is also routed through 4 MHz

030

only)

two

IF

Amplifier and the other a 9

for

both Q3 and Q6. The gain of the amplifier is

is

divided by

2

(23144

descrete non-inverting operational

(6

dB)

by the voltage divider formed

455

to

2636A)

dB

gain amplifier for

of

2

(6

dB).

1

(0

dB).

83-24 Service Sheet

5

Model

8901B

IF

Amplifier

Service

Transistors

5.6

(15

determining resistors are the following circuitry, which also divides the output from the emitter of in a overall gain of 2.8

General-AI 8 IF

The signal from the Input Mixer, whether down-converted The amplifier is a low-noise type with 33 distortion. The IF Amplifier has three stages.

IF

Input Amplifier

The first stage, of feeding signal back to the input through R6, generates by

a

strictly passive resistance. The input impedance

gain. The gain is approximately

Q6,

Q5,

and

Q4

form a non-inverting operational amplifier with

dB)

.

The operation of the amplifier

R5

and R3. Resistor R8 forms a voltage divider with the input impedance of

(9

&).

Amplifier Assembly

Q7

and

Q5,

is low noise and has 20

R9

divided by

is

identical to that of the

or

dB

of gain and a phase compensation network

dB

of gain.

a

lower source noise than would be generated

is

essentially equal to

R7.

Inverting Amplifier

The second stage compensate for phase shifts generated in the distortion. The IF shape can also be adjusted to minimize incidental AM.

A

simplified diagram

-1,

Q2

with a gain of

is

a unity-gain amplifier with a phase-shift characteristic that can be adjusted to

1.5

MHz

IF

system. This compensation improves FM

of

this stage is shown in Figure

+l.

The voltage gain

for

8F-8.

the circuit is

Q1

an

ac gain of approximately

IF

Buffer Amplifier. The gain

Q4

by 2

(6dB).

not,

is

amplified by the

An

active input impedance, the result

R6

divided by the amplifier

is

shown as

an

amplifier with a gain of

This results

IF

Amplifier.

to

reduce FM

V,

R-

_-

-

VI

which has a constant magnitude

C15,

and

C16.

R

is

L2, optimum phase shift (minimum FM distortion) at flatness (minimum incidental AM) at

formed by the combination of

v1

(1-1)

and a variable phase shift. The impedance

1.5

MHz.

jX

R+jX'

R17,

1.5

R23, and

MHz.

R24.

R

is

fine adjusted by

R19

fine adjusts the gain of

v2

jX

is

formed by L1,

Q1

R23

for

for best

Figure

8F-8.

Simplified Diagram

of

Phase Compensation Amplifier

Service Sheet

5

8F-25

Service Model

IF

Output

Amplifier

8901B

The third stage plus R29 divided

is

by

a

13

dB

amplifier which drives the

R27.

AM

Demodulator.

Its

gain is approximately one

8F-26

Service Sheet

5

Model 8901B Service

TROUBLESHOOTING

General

Procedures for checking the Input Mixer and check are marked on the schematic diagram by a hexagon with a check mark and a number inside, for example, Fixed signals are also shown on the schematic inside a hexagon, for example, Extend the board assemblies and their input and output cables where necessary

@

.

In addition, any points outside the labeled area

Tighten tors is insufficient. Hand-tightened connectors can work loose and reduced performance, malfunctions,

SMC

connectors to

0.6

IF

Amplifier Assemblies are given below. The circuits to

that

must be checked are also identified.

(+I

.9

TO

to

make measurements.

N.

m

(5

in. lb). Hand tightening of connec-

cause

or

damage to the instrument.

Equipment

Oscilloscope Signal Generator. Spectrum Analyze Test Probe Voltmeter

(J1)

LO

Amplifier General Check

......................................................................

.................................................................

..........................................................

...................................................................

........................................................................

NOTE

HP 8559A/182T

HP 1250-1598

+2.1

VDC)

HP 1740A

HP 8640B

HP 3455A

.

This test checks only the localize a catastrophic failure. and will detect more subtle failures; however, more time and equipment are required,

1.

Key in 5 and press MHz

2.

Connect a high-impedance oscilloscope to the base of A17Q4. The waveform should be a square wave with a period of approximately 180 ns and an amplitude of ringing.

Hint:

If the signal

Sheet 17).

3. Connect the oscilloscope to the collector of A17Q4. The waveform should be a square wave of

1.2

Vpp

or

greater excluding ringing.

4.

Connect the oscilloscope to the collector of A17Q6. The waveform should be a square wave of

1

Vpp

or

greater excluding ringing overshoot on the falling edge.

to

is

faulty, check the output from the A19

set

LO

Amplifier at a low frequency but will easily

@)

LO

the

LO

to

5.455 MHz.

Amplifier Check

is

more thorough

0.5

LO

Divider Assembly (see Service

Vpp

or

greater excluding

Service Sheet

5

8F-27

Service Model 8901B

(./2)

LO

Amplifier Check

NOTE

To check for a catastrophic failure

Amplifier General Check

1.

Unplug A17U1 Mixer. Gently pry

2. Set the spectrum analyzer to measure a +20 dBm,

8

pins

3.

Key in 57.0 SPCL to cause the LO to sweep sequentially across bands DBLR through

signal should sweep slowly from above 1300 MHz five bands. As the low end of a band then continue to sweep. Throughout the sweep, the fundamental of the and +15 dBm.

Hint: Hint:

LO frequency.

4. Set the spectrum analyzer to view a 0 to 40 MHz signal.

5. Key in 56.0 SPCL to cause the LO sweep slowly

and 9 of the Mixer socket using the test probe. The probe center goes on pin 9.

A

faulty level may also be the result of a faulty output from the A19 LO Divider Assembly.

The sweep can be halted by pressing the SPCL key. Use manual tune to manually set the

from

above 50 to below 1.25 MHz in the manner described in step 3 above.

The test probe will cause a low-frequency

1.25

MHz.

above.

it

from

is

to

sweep sequentially across bands 4 through

of

the

LO

Amplifier, use the

its

socket with a screwdriver blade.

0

to

1400

MHz signal. Connect

to

below

40

MHz. The sweep will occur over

reached, the sweep will stop, jump up slightly in frequency,

NOTE

rolloff

to about

a

LO

should be between +7

+4

dBm at

LO

its

input to

3.

The

8.

The LO should

LO

@)

The low-frequency bands can

oscilloscope should have a

wave with an amplitude

rolloff

due to the probe.

Input

and

Mixer Check

1.

Set the signal generator to 18 MHz CW

ac coupled oscilloscope. Switch the input impedance input in 500 using a tee.

2.

Fine adjust the signal generator’s level

3.

Reconnect the signal generator’s output to A17J2 (RF IN). Reconnect the oscilloscope to A17J1

(IF

OUT).

4.

Press the blue key, then press INSTR the instrument. Key in a sine wave with an amplitude fuzziness on the waveform is normal; annunciator (A17DS1) should be

18

of

and press MHz to set the LO to 19.5 MHz. The waveform should be

of

70 to 110 mVpp and a period of approximately 670 ns. A slight

off.

also

be viewed on an oscilloscope.

500

termination.

approximately 2 Vpp excluding ringing and the

at

0

for

an oscilloscope display of

PRESET

it

is the partially filtered sum frequency. The 455 kHz

The

signal should be a square

dBm. Connect

of

the oscilloscope to 500

(the AUTOMATIC OPERATION key) to preset

its

RF output to the input of an

800

The

or

mVpp.

terminate the

IF

8F-28 Service Sheet

5

Model 8901B Service

Filter Switching Check

Filter frequency response is tested along with the

Filter Check.

1.

Disconnect any signal at the Measuring Receiver’s INPUT connector. Key in the Direct Control Special Functions indicated in Table 8F-12a. For each setting note the reading on the dc voltmeter

connected to the points indicated. Also observe the

Direct Control

Special Function

0.030

0.031

@

Filter Switching, First

Filter frequency response is tested along with the

Filter Check.

(23144

Table 8F-12a.

U2A-1 U2B-7 Q1-c

0

to

+1

+12

to

+15

and

Second IF

to

2636A)

NOTE

Levels at A1

+lo

7U2,

81,

Voltage Limits (Vdc) at A17

to

0

to

+15

+l

-5.4

Amplifiers

NOTE

455

82, and

and

+0.5

IF

kHz

03-c

to

-4.5

to

+1

Check

IF

Amplifier in

IF

annunciator (A17DS1).

43,

(J4)

+1

-5.4

(2642A

Amplifier in

@

Step 1

02-c A17DS1

to

+2

to

-4.5

and

Aboue)

@

IF

State

Off

On

IF

of

SDecial Function

0.030

I

0.031 300 to

1.

Set the signal generator to

(The internal

On the Measuring Receiver, key in 1300 MHz to manually tune the

2. present at the mixer even though no down-conversion will be used.)

3.

Connect a high-impedance, ac coupled oscilloscope

have a low-capacitance between 200 and of the oscilloscope, the

Hint:

If

4.

Set the signal generator level for a waveform of 300 mVpp. Connect the oscilloscope to the collector of A17Q10. The waveform should have an amplitude of 1.2 to

Connect the oscilloscope to the base of A17Q8. The waveform should have an amplitude of

5.

to 800 mVpp. Connect the oscilloscope to the emitter of A17Q1 and Q3 as indicated in Table 8F-12b. Key in

6.

the Direct Control Special Functions indicated in the table. oscilloscope should be as indicated. If faulty,

455

kHz

Table 8F-12b.

Voltage Limits (mVpp) at A171

LO

should be connected

500

mVpp and a period of approximately 2.2

the waveform

IF

annunciator (A17DSl).

Levels at A1

Q3-e

I

600to700 I +12to+15

455

kHz CW at 0 dl3m. Connect its RF output to A17J2 (RF IN).

to

A17J3

1O:l

divider probe. The waveform should be a sine wave with an amplitude

LO

signal

may also be visible in the form of fuzz.)

is

faulty, perform

7Q3,

08-e

I

400

0

(J3)

68,

812, and Q13,

Q12B-7

to

+0.2

(LO

IN).)

LO.

(LO

signal must be

to

the base of A17Qll. The oscilloscope should

ps.

(Depending upon the bandwidth

Input Mixer Check.

1.6

Vpp.

For

each setting, the reading on the

also

check the voltages indicated and observe the

(J4)

Step

6

Voltage Limits (Vdc) at A17

I

Q12C-8

1

0

4-8

to

+0.2

+10

I

Q12D-13

1

+9

0

to

+0.1

+11

I

+9

0

to

f0.2

+11

I

On

500

7. Key in not be connected.) The waveform should have an amplitude of

0.030

SPCL.

Connect the oscilloscope to A17J1

(IF

OUT). (The cable to A17J1 should

600

to

800 mVpp.

Service Sheet

5

8F-29

Service Model 8901B

8.

@

Key in 0.031 SPCL. Connect the oscilloscope to A17J4. (The cable connected.) The waveform should have an amplitude of 1.4 to 1.6 Vpp.

IF

Amplifier Check

1.

Set the signal generator to

2. Connect a high-impedance, ac coupled oscilloscope to the base have a low-capacitance

3. Fine adjust the signal generator's level for an oscilloscope display of 100 mVpp.

4. Connect the oscilloscope to the emitter of A18Q5. The waveform of the 1.5 MHz signal should be sinusoidal with an amplitude of 0.9

5.

If necessary, readjust the signal generator's level for an oscilloscope display of 1.0 Vpp.

6. Connect the oscilloscope to the collector of A18Q4. The waveform should be sinusoidal and have an amplitude of 4.6 to

Hint:

The gain of the

of

1,

has a gain

7.

Vary the signal generator frequency from remain constant within

but capacitive loading of the oscilloscope prevents measuring the gain separately.

1.5

MHz CW at -23

1O:l

divider probe.

5.0

Vpp.

IF

Output Amplifier

200

mV.

dBm.

Connect its RF output to A18J2

of

A18Q7. The oscilloscope should

to

1.1

Vpp.

is

4.8 open circuit. The Phase Compensation Amplifier

0.15

to 2.5 MHz. The amplitude

to

A17J4 should not be

(IF

of

the waveform should

IN).

(J6)

Hint:

The collectors of A18Q6 and Q1 should be flat with frequency

between the emitter of A18Q5 and collector of A18Q4 should be 180" at 4.4 MHz and 1.03 MHz

0"

and generator frequency does not extend to 70 kHz, use an audio source.

IF

Filters Check

1.

Set the signal generator to 18.00 MHz CW at -27 dBm. Connect its RF output Receiver's INPUT.

2.

Connect an ac coupled oscilloscope to oscilloscope to 500

3.

Press the blue key, then press INSTR PRESET (the AUTOMATIC OPERATION key)

the instrument. Key in

IF. The waveform should be a sinusoidal signal with a period of approximately 670 ns and an amplitude between 200 and 300 mVpp.

Hint:

4.

Fine adjust the signal generator's level

press MHz to generate a

drop to between 120 and 160 mVpp.

at a frequency between 2.0 and

(2314~

This check assumes that

If the signal is faulty, perform the checks above.

to

2636A)

@

or

terminate the input in

18

and press MHz to set the

4

MHz IF. The waveform frequency should increase, and its amplitude

2.5

MHz and between 70 and 130 kHz. If the signal

NOTE

IF Amplifier Check

A18J1

for

(IF

OUT). Switch the input impedance of the

500

using a tee.

an oscilloscope display of 200 mVpp. Key in 20.5 and

gives positive results.

LO

to 19.5 MHz and generate a 1.5 MHz

also.

The phase difference

to

the Measuring

to

preset

8F-30 Service Sheet

5

Model 8901B Service

NOTE

The partially filtered sum signal may cause the waveform to appear slightly

fuzzy.

(J6)

5. Key in a sinusoidal signal with a period of approximately

mVPP.

6.

If

in 18.1 and press 120 and 160 mVpp.

7.

Key in 17.9 and press MHz to generate a 555 kHz

between 120 and 160 mVpp.

Hint:

18

and press MHz. Key in

necessary, fine adjust the signal generator’s level for an oscilloscope display

MHz

to generate a 355 kHz

If

the amplitude in steps 6

3.1

SPCL to set the

or

7 is slightly out of limit, perform the

Distortion and Incidental AM-455 kHz

IF

Filters

1.

Set the signal generator Receiver’s INPUT.

2.

Connect an ac coupled oscilloscope to oscilloscope to 500

Check (2642A

and

Above)

This check assumes that

to

18.00 MHz CW at -27 am. Connect

or

terminate the input in 50R using a tee.

(J5)

IF

A18J1

IF

to 455 kHz. The waveform should be

2.2

ps

and an amplitude between 150 and 190

of

200 mVpp. Key

IF.

The waveform should have an amplitude between

IF.

The waveform should have an amplitude

Adjustment

IF.

NOTE

Amplifier Check

(IF OUT). Switch the input impedance of the

gives positive results.

its

RF output to the Measuring

16-FM

3.

Press the blue key, then press INSTR the instrument. Key in 18 and press MHz to set the LO to 19.5 MHz and generate

IF.

The waveform should be a sinusoidal signal with a period of approximately 670 ns and an

amplitude between 200 and 300 mVpp.

Hint:

If

the signal

4.

Fine adjust the signal generator’s level for an oscilloscope display of press MHz drop to between 140 and 180 mVpp.

5. Key in be a sinusoidal signal with a period of approximately

210 mVpp.

6.

If necessary, fine adjust the signal generator’s level for an oscilloscope display of 200 mVpp. Key

in 18.1 and press MHz to generate a 355

130 and 170 mVpp.

7. Key in 17.9 and press MHz to generate a 555 kHz between 120 and 150 mVpp.

Hint:

to

18

and press MHz. Key in

If

the amplitude in steps 6

is

faulty, perform the checks above.

generate a 4 MHz

PRESET

IF.

The waveform frequency should increase, and

3.1

SPCL to set the

kHz

or

7

is

slightly out of limit, perform the

(the AUTOMATIC OPERATION key)

200

mVpp. Key in 20.5 and

IF

to

455

kHz. The waveform should

2.2

ps

and

an

amplitude between 170 and

IF.

The waveform should have an amplitude between

IF.

The waveform should have an amplitude

a

its

amplitude

Adjustment

to

1.5 MHz

16-FM

Distortion and Incidental AM-455 kHz IF.

preset

Service Sheet

5

8F-31

Service

LO

Switch (Option Series

1.

Set the signal generator to Receiver’s rear-panel

2.

Connect an ac coupled oscilloscope to the rear-panel

the input impedance

3.

On the Measuring Receiver, key in

be a sinusoidal signal with a period

630

mVpp.

Hint:

Terminal C+ (red wire) on the

W

See

4.

Connect the oscilloscope to the end should be present.

5.

On the Measuring Receiver, key in is entered, an audible click should be heard. The waveform should be approximately

Hint:

6.

On

should be heard as in step

Switch

The click indicates that the switch drive circuitry is probably good and

the Measuring Receiver, key in

Control

030)

Check

10

MHz

LO

INPUT (chassis part

of

the oscilloscope to

23.0

LO

Check

on Service Sheet

of

23.1

23.0

5.

CW at 0 am. Connect its RF output to the Measuring

514).

LO

OUTPUT (chassis part

500

or

terminate the input in

SPCL to set the LO to internal. The waveform should

of

approximately

Input Switch

33.

cable

W55

SPCL to set the

100

11s

and an amplitude approximately

(S2)

should be between

which connects

LO

to external.

LO

back to internal.

to

50n

A17J3

As

Model

using a tee.

+4.8

and

(LO

IN). No signal

the special function

S2

probably faulty.

An

8901B

513).

Switch

+5.2

Vdc.

630

mVpp.

audible click

8F-32

Service Sheet

5

rev.03A

UG89

Model

8901B

Service

ASSEMBLY

0

A55

IF

Channel Filter Assembly

PRINCIPLES OF OPERATION

General

The channel filters determine the passband characteristics of the IF for the high-selectivity measurement mode. The shape of the 032, 033, 035, and 037) installed.

Channel Filters

The A55 Channel Filter Assembly contains two selectable IF Channel Filters, associated buffer amplifiers, a programmable 20

IF

level 12 The FETs are controlled by the output of U5. For example, on and CR2 end, and the R5 and R9 present the proper impedance

vary to match the specific requirements of the Channel Filters.)

dB.

FETs Q1 and Q2 select the IF path through the

0%

FET

Q2

IF

signal appearing

is

off and

Sheet

IF

passband is dependent

dB

Amplifier, and associated switches. Transformer

Q1

is

at

the upper end couples into FL1 via emitter follower Q6. Resistors

6

(Option

(23144

Series

to

2636A)

030)

on

the specific option pair (any

two

T1

two

Channel Filters (FL1 and FL2).

if

U5

is

low (-15V), diode CR1 switches

on. Thus, the secondary winding

to

drive and terminate the crystal filters. (The resistor values

of

T1

is

grounded on the low

of Options

steps up the

The output of the selected Channel Filter

Diodes CR3 and CR4 steer the signal from the selected channel

dB

R25, and U1) and into the 20

output amplifier.

is

amplified approximately 6

Digital Circuits

Transistors Q!3 and Q4 drive coaxial RF switch S2 which switches the

to

(Refer control, see

Service Sheet 5 for serial prefixes 2642A and above.) For a general discussion of instrument

Instrument

Bus

in Service Sheet BD5.

dB

to

the switchable

LO

to either internal

depending on filter loss.

20

dB

pad (R24,

or

external.

Service Sheet

6

(2314A

to

2636A)

8F-33

Service Model

TROUBLESHOOTING

General

8901B

Procedures for checking the on the schematic diagram by a hexagon with a check mark and a number inside, for example,

In addition, signals are also shown on the schematic inside a hexagon, for example, board assembly where necessary

any

points outside the labeled circuit area that must be checked are also identified. Fixed

Tighten

is

tors reduced performance or malfunctions.

insufficient. Hand-tightened connectors can

IF

SMC

connectors to

Channel Filter Assembly

to

make measurements.

0.6

N.

rn

(5

is

given below. The circuits to check are marked

(+I

.9

TO

+2.1

in.

lb). Hand tightening

work

of

connec-

loose and came

Equipment

Oscilloscope Signal Generator.

(J1)

First

1.

Set the signal generator to between 454 and 456 kHz CW at -10 Connect

2.

Press the blue key, then press INSTR PRESET (the AUTOMATIC OPERATION key) to preset the instrument.

.....................................................................

..................................................................

Channel 1 Filter Check

dl3m

its

RF output to A5552

(IF

IN)

on

the Measuring Receiver.

(70.7 mVrms into 500).

vDC)

.

Extend the

HP 1740A HP 8640B

.

3.

Connect a high-impedance, ac coupled oscilloscope to the emitter of

should have an amplitude between

Hint:

The gate

4.

Set the oscilloscope gain for a display of 6 divisions peak-to-peak.

5. Connect the oscilloscope to the base of Q11. Fine tune the signal generator for The amplitude should be between 1.5 and

6.

Set the oscilloscope gain for a display and down and note the frequencies at which the waveform drops to 3 divisions. The difference between the highest and lowest frequencies should be within the limits listed in Table 8F-13.

Hint:

R5 and R9 are supplied with FL1 when FL1 is replaced.

of

Q2

should be approximately -9 Vdc. Pin 7 of U4 should be a TTL low.

L

Option Combination Minimum Maximum

032 and 035 25.0 35.0 033 and 035

035 and 037

032 and 033 12.4 16.9

1.0

and

1.5

Vpp.

2.5

divisions peak-to-peak.

of

6 divisions peak-to-peak. The the signal generator

Frequency Difference Limits

(kHz)

Q6.

The 455 kHz signal

an

amplitude peak.

up

8F-34 Service Sheet 6

I

(23144

033and037

032 and 037

to

2636A)

6.4 10.4

I

Model

8901B

7.

Tune the signal generator back to the amplitude peak. Adjust the oscilloscope gain 2 divisions peak-to-peak. Connect the oscilloscope to the collector of Ql2. The waveform should

an

have

8.

Connect the oscilloscope to pin 8 of U1A. The waveform should have the same amplitude as in step

@

First Channel 2 Filter Check

1.

Set the signal generator to between Connect

Press the blue key, then press INSTR PRESET (the AUTOMATIC OPERATION key) to preset

2. the instrument.

Connect a high-impedance, ac coupled oscilloscope to the emitter

3.

select channel 2. The 455

Hint:

4.

Set the oscilloscope gain for

amplitude between 5 and 6 divisions peak-to-peak.

7.

its

RF output to A5552

The gate

of

Q1 should be approximately +9 Vdc. Pin 7 of U4 should be a TTL high.

454

and 456 kHz CW at

(IF

IN) on the Measuring Receiver.

kHz

signal should have an amplitude between

a

display of 6 divisions peak-to-peak.

-10

dBm

(70.7

of

Q5. Key in

1.0

for

mVrms into

0.3D3

and

1.5

Vpp.

Service

a display

50R).

SPCL to

of

Connect the oscilloscope to the base of Q9. Fine tune the signal generator for

5.

The amplitude should be between Set the oscilloscope gain for a display of 4 divisions peak-to-peak. Tune the signal generator up

6. and down and note the frequencies at which the waveform drops between the highest and lowest frequencies should be within the limits listed in Table 8F-14.

Hint:

R6 and R10 are supplied with FL2 when FL2

Table

Tune the signal generator back to the amplitude peak. Adjust the oscilloscope gain

7.

2

divisions peak-to-peak. Connect the oscilloscope to the collector of QlO. The waveform should

have an amplitude between 6 and 9 divisions peak-to-peak.

8F-14.

Option Combination

032

and

033

and

035

and

032

and

032

and

I

033

and

1.0

and 1.6 divisions peak-to-peak.

Bandwidth

037 037 037

033 035

035

I

to

2 divisions. The difference

is

replaced.

of

First Channel 2 Filter,

Frequency Difference Limits (kHz)

Minimum Maximum

3.0 7.0

6.4 10.4

12.4

I

@

16.9

Step

I

an

amplitude peak.

6

for

a display of

Connect the oscilloscope to pin 8 of U1A. The waveform should have the same amplitude as in

8.

7.

step

Channel Output Circuit Check

1.

Set the signal generator to between 454 and 456 kHz CW at -10

Connect its

2.

Press the blue key, then press INSTR PRESET (the AUTOMATIC OPERATION key)

the instrument.

3. Connect a high-impedance, ac coupled oscilloscope to pin 8 of U1A. Fine tune the signal generator

for

an amplitude peak. The 455 kHz signal should have an amplitude between

RF

output to A5552

(IF

IN) on the Measuring Receiver.

Service Sheet

dBm

6

(2314A

(70.7

to

2636A)

mVrms into

to

1.0

and 1.2 Vpp.

50R).

preset

8F-35

Service Model

Hint:

If

(J4)

the signal is faulty, perform

4.

Set the oscilloscope gain for a display of 6 divisions peak-to-peak. Connect the oscilloscope to

9

of

U1A.

Key in

0.3D1

SPCL to switch out the Channel Output Attenuator. The waveform

should have the same amplitude as in

Hint:

Pin 1 of

5.

Key in

0.3DO

amplitude between

Hint:

Pin 2 of

6.

Connect the oscilloscope to the collector

6

and 7 divisions peak-to-peak.

LO

Input

1.

Check that

2.

Key in the Direct Control Special knctions listed in Table

Switch Control Check

UlA

should be a TTL low, pin 2 of

SPCL to switch in the Channel Output Attenuator. The waveform should have

0.5

and

0.7

divisions peak-to-peak.

U1B

should be a TTL low, pin 1 of

W55

is connected to

A5553.

First Channel 1 Filter Check.

step

3. U1B

a TTL high.

U1A a TTL high.

of

Q7.

The waveform should have an amplitude between

8F-15.

For

each setting, connect a high-impedance, dc coupled oscilloscope to the points listed in the table. The voltages should be within the limits indicated.

Table

8F-15.

LO Input Switch Control Levels,

(J4)

Step

2

8901B

an

Level

Direct Control

Special Function

0.3DO

0.3D4

@

Select Decoder and Data Latch Check

1.

Key in the Direct Control Special Functions listed in Table pins

on

U3

indicated.

Special Function

2.

Key in the Direct Control Special Functions listed in Table pins on

U4

indicated.

(TTL)

6

H

L

%ble

Direct Control

8F-16.

0.390

0.300

0.3EO

0.3FO

on U2 Pin Level (Vdc) on Collector

2

L

H

Levels at

Level WL) at

14

H H

H

U3,

10

H

*

H

Q3

L

H

(J5)

8F-16.

Step

1

U3

9

H H

H

7

H

8F-17.

Q4

H

L

For

of

DS1

Off

On

each setting, check the

8F-36

Service Sheet

I

6

(23148

%ble

Direct Control

Special Function

0.3DO

0.3DF IHI

to

2636A)

8F-17.

I

2

ILI

Levels at

I

U4,

Level (TTL) at U4 Pin

31

HI

L

(J5)

Step

2

71 15

Ll

H

I

Ll

HI

I

14

H

L

Model

8901B

Service

ASSEMBLY

0

A54

PRINCIPLES

General

The attenuation, steps over a range

IF

Amplifiers and Attenuators

IF

Amplifiers has 33 the gain is l+(R7/R6). Schottky diodes CR1 through CR4 prevent saturation of Q3, respectively during overloads to speed up recovery time.

Switches U2, U1, and U3 select three, of a 20 prevents the bandpass filters from loading

Service

IF

Amplifier/Detector (Option Series

OF

OPERATION

IF

AmplifierDetector Assembly

two

selectable bandpass filters, and an

of

0

to 60

1,

2, and 3 are nearly identical and have between 21 and 24

dl3

gain. Gain stability

Sheet

(A54)

7

(23144

030)

contains three stages of

IF

to

2636A)

rms

detector. The

dB.

is

more critical than the accuracy. Using

IF

amplification, four stages of

IF

gain is selectable in

dB

gain each.

IF

Amplifier 1 as an example,

IF

Q1, Q6,

20

dl3

voltage dividers. Switch U4 select one

dB

voltage divider. The divider resistors are high-precision, low-drift types. Voltage follower Q7

IF

Attenuator

3.

of

four,

5

dl3

Amplifier 4

and

Q8

5

dB

taps

IF

Filters and RMS Detector

FL1

and FL2 are crystal-type, bandpass filters. They are switched in by

of

by switch U5. The filters have a passband loss The amplified and filtered

is

a true-rms detector which produces a dc output equal

of U6 goes to the Voltmeter.

The output of

IF

Amplifier

IF

signal at the output of

4

is

also

made available at

approximately 14

$8

Digital Circuits

Transistor Q14 provides a means of identifying the installation discussion of instrument control, see

Instrument

Bus

dB.

is

detected by the

to

the

rms

level of the

J1

for

testing and troubleshooting purposes.

of

Option Series 030.

in Service Sheet

Q11

and Q12 which are driven

IF

RMS Detector (U6). U6

IF

signal. The output

For

BD5.

a general

Service Sheet

7

(2314A

to

2636A)

8F-37

Service Model 8901B

TROUBLESHOOTING

General

Procedures for checking the IF Amplifier/Detector Assembly is given below. The circuits marked on the schematic diagram by a hexagon with a check mark and a number inside, for example,

.

In addition, any points outside the labeled circuit area that must be checked are

a

Fixed signals are also shown on the schematic inside Extend the board assembly where necessary to make measurements.

Tighten tors reduced performance or malfunctions.

SMC

connectors to

is

insufficient. Hand-tightened connectors can

0.6

N.

m

(5

hexagon, for example,

in.

lb).

Hand tightening

work

of

connec-

loose and cause

(+1.9

also

TO

Equipment

Oscilloscope Signal Generator.

(J1)

Programmable

1.

Set the signal generator to between 454 and 456 kHz CW at

Connect its RF output to A5452

2. Press the blue key, then press INSTR PRESET (the AUTOMATIC OPERATION key) to preset the instrument. Connect a high-impedance, ac coupled oscilloscope oscilloscope gain for a display of 6 divisions peak-to-peak.

......................................................................

.................................................................

IF

Amplifier Check

-7

dBm (100 mVrms into 500).

(IF

IN)

on the Measuring Receiver.

to

pin 5 of U2B. Set the

to

check are

identified.

+2.1 VDC) .

HP

1740A

HP 8640B

3. Key in 0.391 SPCL to set Attenuator 1 to 0 dE3 SPCL to set Attenuator 4 to 15 should have the same amplitude as in step 2.

Hint:

Pin 2 of U2B should be a TTL low, pin 1 of U2A a TTL high.

4. Key in 0.390 SPCL to set Attenuators 1, 2, and 3 to 20 amplitude between 0.5 and 0.7 divisions peak-to-peak.

Hint:

Pin 2 of U2B should be a TTL high, pin 1 of U2A a TTL low.

5. Connect the oscilloscope to pin 5 of U1B. The waveform should have an amplitude between 6.0 and 7.2 divisions peak-to-peak.

6. Adjust the signal generator level for a display of 6 divisions peak-to-peak. Key in 0.392 SPCL to set Attenuator U1B. The waveform should have the same amplitude as in step 5.

Hint:

Pin 2 of U1B should be a TTL low, pin 1 of U1A a TTL high.

7. Key in 0.390 SPCL. The waveform should have an amplitude between 0.5 and 0.7 divisions peak-to-peak.

Hint:

8. Connect the oscilloscope to pin 9 of and

7.2

divisions peak-to-peak.

9.

Adjust the signal generator level for a display set Attenuator 3 to U3B. The waveform should have the same amplitude as in step

2

to

0

dB

and Attenuators 1 and

2 of

U1B should be a TTL high, pin 1 of U1A a TTL low.

0

dB

and Attenuators 1 and 2 to 20

dB.

Connect the oscilloscope to pin 4 of U2B. The waveform

U3A. The waveform should have an amplitude between 6.0

and Attenuators 2 and 3 to

dB.

The waveform should have an

3

to

20

dB.

Connect the oscilloscope to pin 4 of

of

6

divisions peak-to-peak. Key in 0.394 SPCL to

dB.

Connect the oscilloscope to pin

8.

20

dB.

Key in 0.3EE

8

of

8F-38

Service Sheet

7

(2314A

to

2636A)

Model 8901B Service

Hint:

Pin 1 of U3A should be a TTL low, pin 2 of U3B a TTL high.

10.

Key in 0.390 SPCL. The waveform should have an amplitude between 0.5 and 0.7 divisions

peak-to-peak.

Hint:

Pin 1 of U3A should be a TTL high, pin 2 of U3B a TTL low.

11.

Connect the oscilloscope to pin 2 of U4. Decrease the oscilloscope gain by a factor of

5.0

waveform should have an amplitude between 4.4 and

12.

Adjust the signal generator level for a display of 6 divisions peak-to-peak. Key in the Direct

divisions peak-to-peak.

2.

The

Control Special Functions listed in Table 8F-18. For each setting, the waveform amplitude should

If

be within the limits indicated.

Table

Direct Control

Special Function

0.3E7

0.3EB

0.3ED

0.3EE

Waveform Amplitude

faulty, also check the logic level of the pins on

8F-18.

Levels on

(div pk-pk)

5.9

to

6.0

3.3

to

3.5

1.8

to

2.0

1.0 to

1.2

U4,

1

L

H H

H

Step

Level

12

(lTL)

8

H

L

H H

at

U4

9

H

H H L

H

16

H

L

U4

indicated.

13. Key in 0.3E7 SPCL. Connect the oscilloscope to

5.4 to 6.0 divisions peak-to-peak.

(J2)

Channel Filters, Output Amplifier, and

1.

Set the signal generator to between 454 and 456 kHz CW at

RF

Connect its

2.

Press the blue key, then press INSTR PRESET (the AUTOMATIC OPERATION key)

output

to

A71J2 (IF IN) on the Measuring Receiver.

the instrument. Connect a high-impedance, ac coupled oscilloscope

3. Key in 0.390 SPCL to set Attenuators

4

to 15

SPCL to set Attenuator

dB.

400 mVpp.

Hint:

If

the signal is faulty, perform

4.

Set

the oscilloscope gain for a display of 6 divisions peak-to-peak. Connect the oscilloscope

QlO.

base of should be between

Hint:

Fine tune the signal generator to peak the display

1

and 2 divisions peak-to-peak.

The amplitude at this point is quite sensitive to the capacitive loading of the oscilloscope. This step is mainly a check of continuity. Pin TTL high.

Q11

should be on, Q12

off.

5. Key in 0.398 SPCL to switch in FL2. Fine tune the signal generator to peak the display on the oscilloscope. The waveform should be between

1,

IF

RMS

2,

and 3 to

A71TP1.

The waveform amplitude should be

Detector Check

-7

dBm (100 mVrms into 500).

to

A54TP1.

20

dB

and switch in FL1. Key in 0.3EE

to

preset

The waveform should have an amplitude between 300 and

Programmable

2

of U5B should be a TTL low, pin 1 of U5A a

1

and 2 divisions peak-to-peak.

IF

Amplifier Check.

on

the oscilloscope. The waveform

to

the

Hint:

Pin 2 of U5B should be a TTL high, pin 1 of U5A a TTL low. Q11 should be

off,

Q12 on.

6. Set the oscilloscope gain for a display of 1 division peak-to-peak. Connect the oscilloscope to the A71TP2. Decrease the oscilloscope gain by between

Hint:

6.

Set the oscilloscope

display of

3

and 8 divisions peak-to-peak.

The change in loading on the base of

for

a

calibrated level measurement. Adjust the

2

Vpp. Connect the oscilloscope to pin 9 of U6. Set the oscilloscope to read dc. The

a

factor of 10. The waveform should have

QlO

makes this an inexact measurement.

signal

generator level for a

an

amplitude

oscilloscope should read between 0.69 and 0.73 Vdc.

Service Sheet 7

(23144

to

2636A)

8F-39

Service

@)

7.

Key in 49.C SPCL to measure the should display between

Hint:

If

the reading

8.

Adjust the signal generator level for a Measuring Receiver display of

0.69

and

is

faulty, see Service Sheet

IF

level with the

0.73.

15.

IF

RMS Detector. The Measuring Receiver

generator up and down and note the frequencies at which the level drops

between the highest and lowest frequencies should be between

9.

Key in

0.390

SPCL

to

switch

in

FL1.

Key in

49.C

SPCL. Fine tune the signal generator peak the Measuring Receiver’s display. Adjust the signal generator level display of level drops

33

and

Data Latches and Option Series

1.

Key in the Direct Control Special F’unctions listed in Table

pins on

0.60,

to

55

kHz.

U8

indicated.

then tune the signal generator up and down and note the frequencies at which the

0.30.

The difference between the highest and lowest frequencies should be between

030

Indicator Check

8F-19.

3

and 7 kHz.

For

Model

0.60,

then tune the signal

to

0.30.

The difference

8901B

for a Measuring Receiver

each setting, check the

to

Direct Control

Special Function

0.390

0.39F

2.

Key in the Direct Control Special Functions listed in Table pins on

3.

Key

in

U7

indicated.

0.3FO

SPCL to read back the Option Series

2

L

H

lllable

Direct Control

Special Function

0.3EO

0.3EF

3

H

L

8F-20.

Level (TTL) at

7

L

H

Levels at

Level (TTL) at

2

L

H

6

H

L

U7,

7

L

H H

Receiver should display 000001.0000.

Hint:

The waveform

a period of approximately

at

the collector and the emitter of Q14 should be low-going TTL pulses with

60

ms.

U8

10

L

H

@

U7

10

L

8F-20.

Step

11

H

L

15

L

H

14

H

L

For each setting, check the

2

15

L

H

030

Installed Indicator. The Measuring

8F-40 Service Sheet

7

(2314A

to

2636A)

Model 8901B Service

Service

ASSEMBLY

e

A6

AM

Demodulator

PRINCIPLES

OF

OPERATION

General

AM is demodulated by rectifying the

constant level using an automatic level control (ALC) loop. The rectified IF filtered) accurately represents the carrier average plus its AM envelope. In fact, the level of the ac component divided by the level carrier level is forced to be constant, the The demodulation process is illustrated in Figure

2.5 MHz Low-Pass Filter and AM IF Buffer

The

2.5

MHz Low-Pass Filter determines the when the input signal up

to

2.5

MHz.

At

2.5

incidental AM. After passing through the AM

IF

is

the filtered

OUTPUT

routed to the FM Demodulator,

IF

connector.

(ALC

Loop)

is

not down-converted. The filter has six poles and is designed for best flatness

MHz

the flatness can be fine adjusted with C8

Sheet

IF

signal and by forcing the average of the

of

5%

AM

is

IF

8

the dc component times 100%. Since the average proportional 8F-11.

frequency response when using the

Buffer and

Level and

to

the level of the ac component alone.

(IF

FLATNESS)

an

FM

IF

Buffer (see Service Sheet 9),

IF

Present Detectors,

IF

signal to be a

(after

the IF carrier is

%

AM equals the

1.5

for

and

the rear-panel

MHz

IF

minimum

or

Current-Variable Amplifier

The Current-Variable Amplifier adjusts its gain in response to the dc output from the AM and Average Detector. The amplifier is then the “leveler” is an ac coupled, variable-gain, non-inverting operational amplifier.

IF

INPUT

Figure

The gain of the Current-Variable Amplifier is

8F-10.

Simplified Diagram

of

the ALC loop and, as shown in Figure 8F-10,

.AMPLIFIEO

OUTPUT

of

the

Current-

Variable Amplifier

IF

Service Sheet 8

8F-41

Service

I

'

LARGE SIGNAL WITH

500?

AM

7-

Model

8901B

I

OV

SIGNAL AFTER HEAVY LOW-PASS FILTERING

Figure

SIGNAL AFTER LEVELING

SIGNAL AFTER R ECTl F ICATl

8F-11.

I

AND

AM

Demodulation

I

ON

SIGNAL AFTER CARRIER FILTERING

AND AC COUPLING

Process

8F-42

Service

Sheet

8

Model 8901B Service

R,

is R10. predominates. which predominates.

Rb

is the parallel combination of R16 and the resistance of the channel of FET Q7, which

Rd

is

R34.

R,

is the parallel combination

of

R37, R22,

R21,

and the resistance of Q6,

The R-Setting (that ratio of the Current-Variable Amplifier in proportion to the output voltage of U2. The output of U2, in turn,

The variable resistors (FETs Q6 and Q7), which set the gain of the Current-Variable Amplifier, are controlled by two matched current sources Q2C U4B. U4A drives n-channel FET Q6 in such a way potential as the reference voltage at the inverting input of U4A. The reference voltage, determined by the voltage divider R23 and R25, is approximately changes, the voltage at the drain of Q6 changes proportionally. The change drives Q6 to change the channel resistance and bring the drain voltage back to of Q2C, Q7, and U4B is similar U4A is referenced to

FETs

in gain of the Cunent-Variable Amplifier).

The following example should clarify the action of the R-Setting Circuit: suppose that a change in

IF

bases of transistors Q2C and Q2D causes an increase in their collector currents.

of Q6 rises, U4A responds by increasing the gate voltage of Q6 (that is, making reduces the resistance of the FET’s channel and brings the drain voltage back to a nominal At the same time, as the drain voltage of Q7 rises (that is, becomes less negative), U4B responds by increasing the gate voltage of Q7 (making channel and brings the drain voltage back

is

proportional to the amplitude error of the

work in opposition-the resistance of Q6 decreases when Q7 increases (resulting in an increase

level (in this case a decrease) causes the output of U2

is,

Resistance-Setting) Circuit adjusts the input attenuation and feedback division

IF

signal.

and

Q2D and two local-feedback amplifiers U4A and

as

to hold the FET’s dc drain voltage at the same

+50

mV.

If

the current from the collector of Q2D

is

sensed by U4A. U4A then

+50

mV. The operation

to

that of Q2D, Q6, and U4A except:

-50

mV, and (3) Q2C must supply the current to R13 as well as to Q7. Thus the

to

decrease. The reduction in voltage

it

more positive) which increases the resistance of the FET’s

to

a nominal

-50

mV.

(1)

Q7

is

a p-channel FET,

As

the drain voltage

it

less negative) which

+50

at

(2)

the

mV.

The reduction in channel resistance of Q6 reduces the negative feedback around the amplifier formed by

its

Q4 and Q5 and increases of the voltage divider between the output of Current-Variable Amplifier is increased which was too low.

The Current-Variable Amplifier

a).

16 (24 MHz. Two RC networks, R14 and C16 and R28 and C23, aid in canceling distortion created in the FET channels by the the FETs. C17 and C21 set the response time of the local feedback amplifiers U4B and U4A.

Q2l and Q20 form a unity-gain, Q31 improves the symmetry of the overdrive characteristics of the buffer amplifier. This is necessary since the ALC loop initially receives signals when its ALC gain

AM and

The AM and components form a precision, active, half-wave rectifier. in Figure paths which each conduct current in a different direction as determined by CR9 and CR10. The path through CR9 can produce only negative voltages This feedback path, which contains the network R73, R74, C43, and L8, acts as a constant resistance

(equal to R73) between CR9 and the amplifier’s inverting

to the AM Output Buffer.

Q4 and Q5 provide the forward gain

IF

Average Detector

IF

Average Detector rectifies the

8F-12.

The circuit is essentially an inverting operational amplifier with two parallel feedback

gain. The increase in channel resistance of Q7 decreases the attenuation

Q8

and the base of Q5. Thus the gain of the overall

is

the desired effect since in this example, the

is

designed to operate over a gain ranging from unity

of

the amplifier with well-defined performance at 1.5

frequency. The networks inject a small amount of

IF

buffer amplifier which drives the AM and

is

maximum (the no-signal condition).

IF

carrier. Q13 to Q16, CR9 and CR10, and associated

A

simplified diagram of the rectifier

at

the output to the Level Amplifier and Carrier Filter.

(-)

input, and low-pass filters the

IF

(0

dB)

signal into the gates of

IF

Average Detector.

IF

level

to at least

is

shown

IF

going

Service Sheet

8

8F-43

Service

Model 8901B

TO AM

I-’

TO LEVEL AMPLIFIER

AND

OUTPUT

BUFF E

R

CARRIER FILTER

Figzwe

The emitter of Q13 non-inverting input of the amplifier. driving a common-base transistor) Q15 and Q14. R58 and C40 frequency compensate the amplifier. Q16 is a +13.8V regulator and

of

unusual conditions at the input.

8F-12.

is

the amplifier’s common-base inverting input. The base of Q13

Simplified Diagram

Q13

is

RF

decoupling circuit. CR6 and CR7 protect the amplifier in the event

of

the AM and Auerage

followed by a cascode stage (a common-emitter transistor

IF

Level Detector

is

the ac grounded,

AM Output Buffer

Q17, Q18, and Q19 form a unity-gain buffer amplifier which interfaces the demodulated rear-panel AM OUTPUT connector and the audio circuits. R87 and C50 further filter the R88 and C51 form the first two elements of a complex 260

kHz

Low-Pass Filter (see Service Sheet

AM

Level Amplifier and Carrier Filter

U3

and associated components form an inverting amplifier and

(+)

that the non-inverting emitter of Q13) of the AM and Level Detector which is have a common signal-ground reference.

BW

Control and Level Comparison Amplifier

input of U3 connects through R75

its

IF

carrier and AM ripple filter. Note

to

the inverting input (namely, the

“virtual” ground. Thus the two amplifiers

with the

IF

carrier.

12).

The dc output of U3 represents the reference voltage. Differences between the two voltages are amplified by U1 to alter the drive voltage

(via U2) to the bases of Q2C and Q2D of the R-Setting Circuit.

IF

and determines the response time of the ALC loop to variations in

the ALC bandwidth). U5B permits selection of the 0.1

200

Hz

when closed. When U5B and C31. When U5B is open, the time constant even more filtering.

8F-44 Service Sheet 8

IF

carrier’s average level. This output is compared against a stable

U1

adds more filtering to the detected

IF

level (that

dB

bandwidth of either 20

is

closed, the time constant of the integrator U1 is the product of R55

is

the product of C31 and R51+R54+R55; C36 adds

is,

it

determines

Hz

when open or

Model 8901B Service

ALC Reference

The very stable voltage reference for the ALC loop VR3 is biased on by a regulated current source formed by reference output

is

divided by the combined value of R69, R65, and R66. Fine adjustment

is

supplied by the voltage-reference diode

Q1,

VR4, and associated components. The

Reference is via R65 (ALC REF).

Resistor Drive Amplifier

U2 amplifies (with a gain U5C

is

normally open. U2 then normally drives the bases of Q2C and Q2D of the R-Setting Circuit.

of

U2

The output

works against the

a diode to temperature compensate the base-emitter voltages Q2B produces a voltage at its collector

This voltage

is

monitored by the Voltmeter to check that the ALC loop range. The automatic leveling can be defeated, if desired, by opening U5A and closing U5C (user Special Function 6.2). The bases of Q2C and Q2D are then biased by voltage divider R26, Q2A, and R27.

of

1.1)

and inverts the output of U1. Switch U5A

+15V

supply through R26, R31, R32, and Q2A, which

of

Q2C and Q2D.

that

is

proportional

to

the control currents of Q2C and Q2D.

is

normally closed, and

is

operating within its proper

of

the ALC

is

wired as

VR3.

Service Sheet

8

8F-45

Service Model 8901B

TROUBLESHOOTING

General

Procedures for checking the AM Demodulator Assembly are given below. The circuits marked on the schematic diagram by a hexagon with

@

.

In addition, any points outside the labeled circuit area that must be checked are Fixed signals are also shown on the schematic inside a hexagon, for example, Extend the board assembly where necessary

Tighten tors reduced performance or malfunctions.

SMC

connectors to

is

insufficient. Hand-tightened connectors can

0.6

to

N.

a

check mark and a number inside, for example,

make measurements.

m

(5

in.

lb). Hand tightening of connec-

work

loose and cause

Equipment

Oscilloscope Signal Generator. Voltmeter

(J1)

2.5

MHz Low-Pass Filter and AM

1.

Set the signal generator to 1.5 MHz CW at -7 am. Connect

2. Connect an ac coupled oscilloscope to A6J3 the input impedance of the oscilloscope to waveform of the 1.5 MHz signal should be sinusoidal with

......................................................................

.................................................................

........................................................................

IF

Buffer Amplifiers Check

its

RF output to A6J2

(IF

OUT). (A6J3

50R

or

terminate the input in

is

shown on Service Sheet

an

amplitude of 300

to

also

(+1.9

TO

+2.1

HP 1740A

HP 8640B

HP

(IF

50R

using a tee. The

to

360 mVpp.

check are

identified.

VDC)

3455A

IN).

9.)

Switch

.

Hint:

If the signal

schematic.)

3.

Connect the oscilloscope to A6J4 should be sinusoidal with an amplitude of

Hint:

If

the signal

4. Connect a high-impedance, ac coupled oscilloscope to the emitter of have a low-capacitance of 180 to 200 mVpp.

5.

If

necessary, fine adjust the signal generator level for

6. Set the signal generator to

Hint:

The

3

(J2)

Current-Variable Amplifier Check

1.

Set the signal generator to 1.5 MHz CW at -7 dBm. Connect

2. Connect a high-impedance, ac coupled oscilloscope to the emitter of Q8. The oscilloscope should have a low-capacitance

200 mVpp.

3.

Key in

4. Measure pin

O.ODO

is

faulty, trace the signal from A6Jl through Q9. (See Service Sheet 9 for the

is

faulty, check QlO. (See Service Sheet 9 for the schematic.)

1O:l

dl3

frequency of the 2.5 MHz Low-Pass Filter is approximately 3

1O:l

SPCL to switch the ALC

11

of U5C with a dc voltmeter. The voltage should be between

(IF

OUT). (A6J4 is shown on Service Sheet 9.) The waveform

50

to

60

mVpp.

Q8.

The oscilloscope should

divider probe. The waveform should

an

oscilloscope display of 200 mVpp.

3

MHz. The waveform should have

be

sinusoidal with an amplitude

an

amplitude of 120 to 160 mVpp.

MHz.

its

RF output to A6J2

divider probe. Adjust the signal generator level for a waveform of

off.

-15

(IF

IN).

and -13 Vdc.

Hint:

U5C should be on. U5A should be

8F-46 Service Sheet

8

off.

Pin 9 of U5C should be

a

TTL

low.

Model 8901B Service

5. Measure pin 7 (the collector) of Q2B with a dc voltmeter. The voltage should be between +1.66 and +1.69 Vdc.

6.

Connect the oscilloscope (with divider probe) to the collector of Q4. The waveform of the 1.5 signal should be sinusoidal with an amplitude between

Hint:

If

this step fails, check the R-Setting Circuits

as

400

and 600 mVpp.

follows:

MHz

a. Measure the drains of Q6 and Q7 with a dc voltmeter. The voltages should be within the

limits shown in the schematic.

Hint:

The voltage at pins 2 and 6 of U4 should be within the limits shown in the schematic. The polarity at the output of U4A (pin inputs.

(For

example,

if

pin 3 is more positive than pin 2, pin 1 should be positive and may

1)

should conform

to

the polarity of

its

differential

be as high as +15V.) Similarly for U4B.

b. Connect the oscilloscope (with divider probe)

on

the oscilloscope. Momentarily ground pin 8 (the collector) of Q2C and observe the waveform. Then momentarily place a waveform. The amplitude of the waveform should be

Table

8F-21.

Condition

Amplitude Limits on the base

to

the base of Q5 and observe the ac waveform

1

kR

resistor in parallel with

as

shown in Table 8F-21.

of

Q5,

@

Step 6b

Waveform Amplitude Limits (mVpp)

Minimum Maximum

R8

and observe the

Unmodified circuit

8

of

Q2C

grounded

1

kR

resistor

c.

Connect the oscilloscope to the collector of Q4 and observe the ac waveform on the oscilloscope. Momentarily ground pin 14 (the collector) of Q2D on the oscilloscope. Momentarily place a waveform. The amplitude of the waveform should be

%ble

Unmodified circuit

14

1

kR

resistor

in

8F-22.

Condition

of

Q2D

grounded

in

parallel

with

R8

Amplitude Limits on

Waveform Amplitude Limits (mVpp)

-

parallel

with

R20

150

1

kR

resistor in parallel with R20 and observe the

as

shown in Table 8F-22.

the

collector

Minimum Maximum

200

30

2000

of

Q4,

200

and

observe the ac waveform

(J2)

Step 6c

400

70

3000

@

Hint:

Check the bias of Q4 and Q5.

7.

If

necessary, fine adjust the signal generator level for a waveform of

8.

Connect the oscilloscope to the collector of Q20. The waveform should be sinusoidal with an

500

mVpp.

amplitude between 450 and 550 mVpp.

AM

and

IF

Average

1.

Set the signal generator to 1.5 MHz CW at 0 am. Connect its RF input

2.

Key in O.ODO SPCL to switch the ALC

3.

Connect a high-impedance, ac coupled oscilloscope to the collector have a low-capacitance

1

VPP.

Hint:

If

the level is unadjustable, see

Detector

1O:l

divider probe. Adjust the signal generator level for a waveform

and

Level

Amplifier

and Carrier

off.

of

@

Current- Variable Amplifier Check.

Filter

to

Check

A6J2

(IF

Q20. The oscilloscope should

Service Sheet

8

IN).

of

8F-47

Service Model 8901B

4.

Connect the oscilloscope to the anode of CR9. The waveform should be a negative, half-wave rectified sine wave with an amplitude of 2.3 to 2.7 Vpp. Some distortion of the waveform and

of

droop

5.

Connect the oscilloscope to the cathode of CR10. The waveform should be a positive, half-wave rectified sine wave with an amplitude of 2.3 to 2.7 Vpp. Some distortion of the waveform

the no-conduction voltage is normal.

is

normal.

6. Measure the dc voltage between the emitter

2.63. Now measure the dc voltage at A6TP2 (DEMOD CARR LVL) which should be within of the calculated voltage (ignoring the polarity).

0

ALC Reference,

Amplifier, and Resistor Drive Amplifier Check

1.

Measure pin 3 of U1 with a dc voltmeter. The voltage should be between 2.095 and 2.105 Vdc. Record the voltage

Hint:

error, perform

2.

Set the signal generator for 1.5 MHz CW at 0 dJ3m. Connect its RF output to A6J2 (IF IN).

3. Key in 0.OD2 SPCL to switch the ALC off and set the response time

4.

Connect a high-impedance, dc coupled oscilloscope to pin 6 of U1.

5.

Connect the dc voltmeter to A6TP2 (DEMOD CARR LVL).

6.

Slowly +2.2 Vdc. When the voltage at A6TP2 approaches +2.2 Vdc, the voltage rapidly drift to a level that is between +2.0 Vdc, the voltage

Vdc.

of

Q13 and the gate

BW

Control and Level Comparison Amplifier, Inverting

NOTE

This test assumes that the

and Carrier Filter Check

for

future reference.

If

the voltage

vary

the signal generator level such that the voltage at A6TP2 varies between

is

only slightly out of limits and

Adjustment 8-AU: Reference.

at

pin 6 of U1 should rapidly drift to a level that

@

AM and Level Detector and Level Amplifier

gives positive results.

if

-15

and -12 Vdc. When the voltage at A6TP2 approaches

the AM Demodulator is only slightly in

of

Q17. Multiply that voltage by

to

fast (200 Hz bandwidth).

is

+2.0

at

pin 6 of U1 should

between +9 and

+7%

and

+I1

8F-48

7.

Adjust the signal generator level until the voltage at pin 6 of at A6TP2 should be within +20 mV of the voltage measured in step

8. Key in step 6. The level at A6TP2 to drift from the negative to the positive extreme when the signal level is rapidly switched from

Hint:

9.

Set the oscilloscope to view two channels. Connect the second channel of the oscilloscope (dc coupled with a divider probe) to pin 6 of U2. Set

to the same range. Check that the verify that the two channels track. The voltage at pin 6 of U2 should be larger in magnitude by about

10.

Key in O.OD1 SPCL to close the ALC loop with slow ALC response time. Set the signal generator level to

11.

Measure the dc voltage at pin

Hint:

12.

Measure the dc voltage at A6TP2 with a dc voltmeter. The voltage should equal the voltage measured in step 1 within +20 mV.

Service Sheet

O.ODO

U5B should be

10%

U5A should be on with a TTL low at pin

SPCL to set the ALC response time to slow. Vary the signal generator level as in

drift

rate should be about ten times slower. It should take about 8 seconds for the

-3

to

-1

Vdc at pin 6 of U1.

off.

Pin 8 of U5B should be a TTL high.

OV

reference is the

as the signals drift.

0

dBm.

3

of

U5A. The voltage should be greater than

8

its

input to invert the signal. Set both channels

1.

U5C should be

U1

holds steady at 0 Vdc. The voltage

1.

same

for both channels. Repeat step 6 and

+12

Vdc.

off.

Model

8901B

@

Hint:

Checks to

demodulate the AM without the ALC loop being closed. Step

is

working properly, the voltage at A6TP2 should equal the ALC Reference present on pin 3 of

U1. The

13.

Set the signal generator level should equal the voltage

Hint:

probably

AM

Output

1.

Set the signal generator to output

2.

Press the blue key, then press INSTR PRESET (the AUTOMATIC OPERATION key) to preset the instrument.

1.5

MHz signal at the collector

This verifies the dynamic range of the ALC loop.

is

with the R-Setting Circuit.

Buffer

This

check assumes that all checks above give positive results

words, the

to

A6J2

(IF

@

above

and

this check up

of

Q4

to

-17 dBm. Measure A6TP2 with a dc voltmeter. The voltage

of

step

1

within f20 mV.

Check

NOTE

AM

Demodulator is known to work).

1.5

MHz

at

0

am. Set up

IN).

to

step 9 verify all the circuits which

10

should be between

If

the range

50%

AM at

above closes the loop. If the loop

900

and

1100

mVpp.

is

inadequate, the fault

(in

other

a

1

kHz rate. Connect

Service

its

RF

3.

Connect a high-impedance, ac coupled oscilloscope half-wave rectified signal.

4. Connect the oscilloscope

to

the collector

of

Q19.

to

the gate of Q17. Note the amplitude

The amplitude should be the same within

of

the

&5%.

Service Sheet 8 8F-49

Model

8901B

Service

ASSEMBLY

A6

PRINCIPLES

General

The filtered Detector for Special Function 36, Peak Tuned RF Level. The output of the IF Present Detector is used in the automatic tuning mode to sense the presence of an output stops the LO sweep, bypassing the Controller, but can also be read by the Controller as needed.

FM

IF

Buffer

Q9

is

Amplifier.

QlO

IF

Detector Buffer

Q11 and Q12 and associated components form an active

d.l3

16

LO

sweep even when no input signal

Service

AM

Demodulator (Control Circuits)

OF

OPERATION

IF

signal is buffered and detected by

is

measured by the Voltmeter

an emitter-follower amplifier which drives the input to the

QlO

is an emitter-follower amplifier which drives the rear-panel

receives its input from the output of Q9 which

of passband gain.

It

suppresses a phantom signal that can appear in the

for

is

present.

Sheet

use in determining the setting of the input attenuation and

9

two

peak detectors. The output of the

IF

signal

is

divided down by R92 and R93.

50

IF

Level

as

the LO

FM

kHz high-pass filter with approximately

is

swept through its ranges.

Demodulator and the

IF

OUTPUT connector.

IF

as the result of the

IF

Detector

Its

IF

Level Detector

CR15 detects the positive peaks of the

momentary switch to quickly discharge

slightly negative value after being discharged by Q29. U6 and associated components form a unity-gain amplifier. by R117 and R118 to make

IF

Present Detector

CR14 detects the negative peaks of the C63 at its inverting

R109, and CR13 which thermally compensates CR14. When an IF signal is sensed, the output of U7 goes to a TTL low. R112 provides hysteresis.

IF

Present Latch

UlOC and UlOD form a set-reset flip-flop. When the flip-flop is set; that is, the output of UlOC goes low and UlOD goes high. This condition remains until the Controller resets the flip-flop by momentarily causing a low on pin

Present Latch is via Q30. Q30 is enabled when the Controller, via U9, places a low on the emitter. CR17 prevents Q30 from becoming an active transistor in the inverted mode (that is, the roles and emitter are reversed) when the emitter readback operation, see

A

dc offset is generated by CR16 that thermally compensates CR15. The output is attenuated

it

compatible with the Voltmeter.

is

small enough to allow rapid charging. U7 compares the output of the detector with a reference

(-)

input. The reference is established by the +15V and -15V supplies, R104, R105,

Direct Control

IF

signal. The detected peak is stored on C65. Q29

C65

upon request from the Controller. C70 charges C65 to a

IF

signal. The detected peak

IF

is

high and the collector

Special

Functions,

paragraph 8-7.)

Present Detector senses an

is

stored on C63. The value of

IF

9

of U8. Readback of the

is

low. (For a discussion of the

is

signal, the

IF

of

collector

a

Select Decoder and Data Latch

See the general discussion under

Instrument

Bus

in Service Sheet BD5.

Service Sheet 9 8F-51

Service Model 8901B

TROUBLESHOOTING

General

Procedures for checking the AM Demodulator Assembly are given below. The circuits to check are marked on the schematic diagram by a hexagon with a check mark and a number inside, for example,

@)

.

In addition, any points outside the labeled circuit area that must be checked are also identified. Fixed signals also are shown on the schematic inside a hexagon, for example, Extend the board assembly and its input and output cables where necessary to make measurements.

(+1.9

TO

+2.1

VDC)

.

Equipment

Oscilloscope

Signal Generator.

Voltmeter

FM

IF

1.

See

(J2)

IF

Detectors and

1.

Set the signal generator to

is shown on Service Sheet 8.)

2.

Press the blue key, then press INSTR PRESET (the AUTOMATIC OPERATION key) to preset

the instrument. Press RF POWER to halt automatic tuning.

3.

Connect an ac coupled, high-impedance oscilloscope to the emitter

have a low-capacitance

1

VPP.

Hint:

on Service Sheet

Tighten SMC connectors tors

is

insufficient. Hand-tightened connectors can work loose and caue

reduced performance

to

0.6

N.

or

malfunctions.

m

(5

in.

lb).

Hand tightening of connec-

......................................................................

.................................................................

........................................................................

Buffer Check

2.5

MHz

If

the level

Low-Pass

is

Filter and

IF

Present Latch Check

1.5

1O:l

unadjustable, see the

8.

IF

Buffer Amplifiers Check

MHz CW at 0 dBm. Connect

divider probe. Adjust the signal generator level for a waveform of

2.5

MHz

Low-Pass

on Service Sheet 8.

its

RF

output

of

Filter and IF Buffer Amplifiers Check

to

Q9.

The oscilloscope should

A6J2

HP 1740A

HP

(IF

IN).

8640B

3455A

(AM2

4.

Connect the oscilloscope to the collector of

with an amplitude between

5.

If

necessary, adjust the signal generator level for a waveform

2

of

A25XA6 with a dc voltmeter. The voltage should be between

6.

Connect the voltmeter to pin 7 of U7. The voltmeter should read a

7.

Slowly decrease the signal generator level until the voltmeter reading jumps to a TTL high. The amplitude of the waveform should be between switches.

8.

Slowly increase the signal generator level until the voltmeter reading jumps to a TTL low. The amplitude of the waveform should be between

9.

Key in

of

10.

Reduce the signal generator level until the voltmeter reads a TTL high. The display should read

000000.0000.

8F-52 Service Sheet

O.OFO

it.

The display should read

Q11.

The

6.0

and 7.2 Vpp. A small amount of distortion is normal.

800

1000

SPCL and O.OEO SPCL to disable resetting the

000001.0000.

9

1.5

MHz waveform should be sinusoidal

of

6 Vpp. Measure the voltage at pin

+1.1

and

1000

mVpp when the voltmeter level

and 1200 mVpp.

IF

Present Latch to enable readback

TTL

and

low.

+1.3

Vdc.

Model 8901B Service

11.

Key in The display should read

12.

Increase the signal generator level until the voltmeter reads a TTL high. The display should

remain

O.OF1

SPCL and

000001.0000.

O.OEO

SPCL to reset the

000000.0000.

IF

Present Latch and enable readback

of

it.

13. Reduce the signal generator level until the voltmeter reads a TTL high. The display should remain

000001.0000.

14. Connect the oscilloscope to the collector +2 Vdc on the oscilloscope display.

15.

Key in discharge to

@

Select Decoder and Date Latch Check

1.

Key in the Direct Control Special hnctions indicated in Table 8F-23.

O.OFO

to momentarily activate Q29. The voltage on the oscilloscope should momentarily

OV

then recharge to its previous level within a few milliseconds.

the pins indicated on U9 with a high-impedance, dc coupled oscilloscope.

lbble

8F-23.

Special Function

O.ODO

O.OEO

O.OF0

I

*Low-going TTL

2.

Key in the Direct Control Special Functions indicated in Table 8F-24. For each setting, check the pins indicated on U8.

lbble

8F-24.

of

Q29. Adjust the signal generator level

Levels at

pulses,

Levels at

US,

x60

U8,

@

H

ms

@

Step

H

period.

Step

1

I

2

for

approximately

For

each setting, check

Direct Control

Special Function

O.ODO

0.OD3

3.

Key in the Direct Control Special Functions indicated in Table 8F-25. For each setting, check the pins indicated on

U8.

Table

8F-25.

Direct Control

Special Function

O.OF0

O.OF3

Level (TTL) at

Levels at

Level (TTL) at

8

H

L

U8,

@

U8

Step

U8

9

L

H

3

Service Sheet

9

8F-53

Model

8901B

Service

ASSEMBLY

0

A4

PRINCIPLES

General

The

amplitude fluctuations.

demodulator from the digital noise on the line to the Counter.

Limiters

The three limiter stages are nearly identical, non-saturating differential amplifiers. Stage here in resistors small-signal delay high-signal, output level and forth between differential transistors across load resistors drives the FM discriminator with its differential outputs and the Counter emitters.

FM

Demodulator

OF

OPERATION

IF

signal to be FM demodulated

detail.

The low-level differential gain

R14

and

R22.

is

(Limiters)

A

buffer amplifier

The feedback resistors also extend the small-signal bandwidth

equal to the large-signal delay.

is

determined by the current from current source

R19

and

Service

is

first passed through three amplifierflimiter stages to remove

R21.

Emitter followers

Sheet

is

also provided to drive the Counter and to isolate the

is

about

Q19A

and

10

2

is

22

dI3

and

is

stabilized by the negative-feedback

so

C10

compensates for phase changes with level. The

Q19E

being switched back

Q19B.

This switching develops

Q19D

and

Q19C

drive the next stage. Stage

an

output voltage

IF

Buffer with one of

discussed

that the

3

its

Counter

Transistors

R39

IF

Buffer

Q2

and

Q1

amplify and limit the

sets the operating point. This amplifier also performs an isolating function.

IF

signal to TTL levels.

DC

feedback through

R40

and

Service Sheet

10

8F-55

Service Model 8901B

TROUBLESHOOTING

General

Procedures for checking the FM Demodulator Assembly are given below. The circuits to check are marked on the schematic diagram by a hexagon with a check mark and a number inside, for example,

(J3>

.

In addition, any points outside the labeled circuit area that must be checked

Fixed signals are also shown on the schematic inside a hexagon, for example, Extend the board assembly and its input and output cables where necessary

to

are

also

identified.

(+i.9 TO

make measurements.

+2.1

VDC)

.

Equipment

Oscilloscope Signal Generator. Voltmeter

a

IF

Limiters and Counter

1.

Set the signal generator to 1.5 MHz CW at -60 dBm. Connect with a

2.

Connect oscilloscope to A4TP2 (DISC IN). The oscilloscope input should have a low-capacitance

1O:l

of 0.17

Hint:

3. Increase the signal generator level to 0 dBm. The waveform should be a square wave with an amplitude of 0.9 to

4. Check amplitude of 3 to 4 Vpp.

Tighten tors reduced performance

......................................................................

........................................................................

50R

divider probe. The waveform of the 1.5 MHz signal should be sinusoidal with an amplitude

to

0.34 Vpp and an offset of +9.6 to +10.0 Vdc.

Each limiter has a gain

A4J2

SMC

connectors to

is

insufficient. Hand-tightened connectors can work loose and cause

0.6

or

malfunctions.

N.

m

(5

in.

Ib).

Hand tightening of connec-

.................................................................

IF

Buffer Check

its

RF output to

termination in parallel with

of

22

1.1

Vpp and an offset of +9.6 to +10.0 Vdc.

(IF

OUT). The waveform should be slightly asymmetrical “square wave” with an

it.

dB.

A4J1

HP 1740A HP 8640B HP 3455A

(IF

IN)

8F-56 Service Sheet 10

Model 8901B

Service

ASSEMBLY

0

A4

PRINCIPLES

General

The IF signal is FM demodulated by a “charge-count” discriminator. Operation

count” discriminator except that pulses of constant charge are formed directly and averaged instead of voltage a large, amplitude-stable square wave charges and discharges a small capacitor. Steering diodes on the other side of the capacitor direct the negative discharge pulses to the inverting input of an operational amplifier which also partially smooths the charge pulses. In actual operation, and discharged on opposite phases and doubles the frequency of the charge pulses.

The discriminator output

the rear-panel FM OUTPUT connector. Another dc coupled signal

form an automatic frequency control loop when in the track-tune mode. The main, ac coupled signal

goes to the FM Output Amplifier and input to the FM Output Amplser cuts off the FM output when the noise performance.

Service

FM

Demodulator (Discriminator)

OF

OPERATION

or

current pulses of constant amplitude and width (that is, duration).

of

the

is

lightly filtered and is utilized in three places. A dc coupled signal goes

is

Sheet

IF

signal. This doubles the sensitivity of the discriminator

then processed by the audio circuits. A Squelch Switch at the

11

is

fed back

IF

signal level is

is

similar to a “pulse-

For

each cycle of

two

capacitors are charged

to

the LO tune input

too

low for good

IF

signal,

to

FM Discriminator (Simplified)

Figure 8F-13 shows a simplified schematic of the FM discriminator. The differential the

IF

Limiters alternately cause the collectors of +6V reference and one diode drop below a each other. Thus the left end of C27 swings 16 Vpp plus clamp the right end of C27 to within one diode drop of

OV.

A

and discharged to the operational amplifier each time the collector of Q12 drops from +6V cycle of the IF signal. The value of the charge is CV, where average current flowing through CR12 is CVf, where

amplifier forces this current to flow through R69 and R71, thus producing a voltage which is directly proportional to capacitance, voltage, resistance, and frequency. Since the first three quantities are held constant, the discriminator output is a linear function of frequency.

Exactly the same behavior happens in connection with C28, but 180” out of phase, with the result the discriminator output voltage is doubled and the ripple frequency is doubled (twice the and C33 smooth the ripple as do R85, R87, and C42. The high-frequency response of the entire FM

system

is

adjusted with R85.

fixed amount of charge flows through CR12 from the inverting

-lOV

Q12

and Q13 to clamp to one diode drop above a

reference. The

two

-lOV.

Thus C27 is alternately charged

C

f

is

the

two

collectors move out of phase with

diode drops. Diodes CRlO and CR12

to

-1OV, namely, once per

is

the value of C27 and V=16V. The

IF

signal frequency. The operational

IF

inputs from

(-)

Upper Clamp, Lower Clamp Regulator, and Upper Clamp Buffer

Refer now to the schematic diagram of Service Sheet

(nominally +6V and

sensitivity and noise. The basic reference is a temperature-stable reference diode VR1. The reference is fed from current source its reference (LED DSl) have similar thermal behavior. The Upper Clamp voltage is taken directly from VR1 through emitter-followers Q9 and QlO whose thermal variations cancel. The Lower Clamp voltage and the demodulator and

is

referenced to VR1 with the Lower Clamp Regulator composed of comparison transistors

Q3

and

pass

-lOV)

transistor Q5, and is adjustable with

is

must be very stable and quiet since they directly affect FM demodulator

Q8,

which itself is temperature stable because its base-emitter junction and

used to calibrate the FM system. C24 and C25 reduce noise.

11.

The Upper and Lower Clamp voltages

R50.

This adjustment changes the sensitivity

to

16V

input of

that

IF).

C31

Q4

of

Service Sheet

11

8F-57

Service Model 8901B

+IF INPUT

~ ~~

7

PRECISION LIMITER

CR6 . CR8

1'

CR7

1

-15V

Figure

+15V

+6V C27 CR12

1

T

CR9

*'

-15V

8F-13.

-IF

INPUT

11

-

I\

CRlO OUTPUT

4--10v -1OV

Simplified Schematic Diagram

R

4-

69 R71

-

-1

$.'.

c39.C40

of

FM

R85

FM

Discriminator

FM

DISCRIMINATOR

Precision Limiter and Charge-Count Discriminator

Figure schematic diagram, Service Sheet voltage references (LEDs) DS1 and DS2. Q7 and C26 filter the -15V supply. RL networks R64 and L1 and R65 and L2 speed up shut-off of charge steering diodes CRlO and CR11 by means of a controlled amount a small frequency-dependent voltage in series with charge steering diodes CRlO and CR11.

The discriminator amplifier, a discrete operational amplifier, consists of amplifier transistors Q18, Q17, and Q28 and current-source transistors Q29, Q34, and Q33. Q34 and Q33 comprise a conventional

two-transistor current source in which negative feedback causes the voltage drop across the emitter resistor (R81) of Q33 at the base of Q33

other current source transistors (Q29, Q27, and Q26). R75 is added to reduce the sensitivity of the

latter three current sources to power supply ripple.

R69

a bridged-T network in the feedback path of the discriminator operational amplifier, producing the

complex pole pair

(see Service Sheet 13). The bridged-?' network also produces a real-axis zero which pole introduced by R85, R87, and C42. C35 and RC network R68 and C32 frequency-compensate the amplifier.

8F-13

shows the three temperature-compensated current sources, Q6, Q14, and Q15. On the

11,

these current sources consist of transistors Q6, Q14, Q15, and

of

overshoot to improve linearity. R66 and C29 improve linearity by introducing

to

equal the base-emitter voltage of Q34. The voltage that

(two

junction drops above the -15V supply) is also used as the reference for three

is

thus established

and R71 are feedback resistors mentioned above and, in combination with C31 and C33, form

of

a three-pole, low-pass filter. The third pole

is

produced later

in

the signal chain

is

cancelled by the

8F-58 Service Sheet

11

Model

8901B

Output Amplifier

FM

Service

The FM Output Amplifier determined by feedback resistors establish the output impedance of the amplifier in order

which is

at

the amplifier’s output (see Service Sheet

is

an FET input, non-inverting amplifier with a voltage gain of

R95

and

R93.

C43

and C44 are compensation elements.

to

properly drive the

12).

C45

is the first element

260

Squelch Circuits

The squelch circuits short the signal path to ground by means

is

too weak for proper operation of the instrument.

output of the IF Limiters and by the Controller through Squelch Switch Drive transistors

Q31. Q21

is a low-impedance short when

its

gate-to-source voltage

Q21

of

FET switch

is controlled by the Squelch Detector at the

is

zero

Q21

(Q32

3.3

that is

R97

and

R99

kHz Low-Pass Filter

of

that filter.

when the IF signal

Q32

and

Q31

off).

Service Sheet

11

8F-59

Service Model 8901B

TROUBLESHOOTING

General

Procedures marked on the schematic diagram by

@

.

Fixed signals are Extend the board assembly and its input and output cables where necessary

for

checking the

In addition, any points outside the labeled circuit area that must be checked are also identified.

also

Tighten tors reduced performance

SMC

is

insufficient. Hand-tightened connectors can

FM

Demodulator Assembly are given below. The circuits

a

hexagon with a check mark

shown on the schematic inside a hexagon,

connectors to

or

0.6

N.

m

malfunctions.

(5

in.

lb).

Hand tightening

Equipment

Oscilloscope

Signal

Voltmeter

(J1)

Squelch Detector Check

......................................................................

Generator.

.................................................................

........................................................................

NOTE

This check assumes that the

10

Service Sheet

gives positive results.

IF

Limiters and Counter

and

a number inside, for example,

for

example,

work

loose and cause

IF

Buffer Check on

(+1.9

TO

to

make measurements.

of

connec-

to

check are

+2.1

VDC) .

HP 1740A

HP

8640B

HP 3455A

1.

Set the signal generator with a 500 termination in parallel with

2. Check the gate (can) of Q21 with a dc voltmeter. The voltage should be -0.1 to +0.1 Vdc (that is, squelched).

3.

Key in 0.152 SPCL to unsquelch. The voltage should not change.

of

adequate signal.)

4. Increase the signal generator’s level to -45 dBm. The gate of Q21 should be (that is, unsquelched)

5. Key in 0.150 SPCL to squelch. The gate of Q21 should be -0.1

@

Precision Limiter Check

This check assumes that the IF Limiters and Counter Service Sheet

1.

Set the signal generator to 1.5

a 50R termination in parallel with

2. Check the collectors (cans) of Q12, Q13, Q14, and Q15 with an oscilloscope. The oscilloscope input should have a low-capacitance wave with an amplitude of 15 to

to

1.5 MHz CW at -51 am. Connect

it.

(A4J1

is

.

NOTE

10

gives positive results.

MHz

CW at 0 dBm. Connect

it.

(A4J1

is

shown on Service Sheet 10.)

1O:l

divider probe. The 1.5 MHz waveform should be a trapezoidal

19

Vpp.

its

RF output to AW1

shown on Service Sheet 10.)

(It

is

still squelched by the lack

to

+0.1 Vdc.

IF

Buffer Check on

its

RF output to A4J1

-15

to -14 Vdc

(IF

IN)

IN) with

8F-60 Service Sheet

11

Model 8901B

(J3)

Charge-Count Discriminator Check

Service

NOTE

@

This check assumes that the

results.

1.

Set the signal generator to 1.5 MHz CW at 0 am. Connect its

50R

termination in parallel with it. (A4J1

a

2.

Check A4TP3 (DISC OUT) with an oscilloscope. The oscilloscope input should have a low-

1O:l

capacitance triangle wave with an amplitude of 3 to 4 Vpp and an offset of be slightly asymmetrical and adjacent cycles may be uneven.

3. Check A4TP4 should be the same within “square wave” with an amplitude of 25 to 40 mVpp. The square wave may be asymmetrical and adjacent cycles may be uneven.

4.

Decrease the signal generator frequency be

-7

to

-5

FM

Output Amplifier Check

This check assumes that the

positive results.

divider probe. The waveform should be a 3

(+

INPUT) and A4TP6

&lo

Vdc.

@

Precision Limiter Check

is

shown on Service Sheet 10.)

MHz

(-

INPUT) with an oscilloscope. The offset voltages

mVdc. In addition, A4TP6 will have a superimposed 3 MHz

to

500

kHz. Check A4TP3 again. The offset level should

NOTE

@

Charge-Count Discriminator Check

gives positive

RF

output

(that is, a doubled 1.5 MHz)

-1

to

A4Jl

(IF

+1

Vdc. The triangle may

gives

IN) with

1.

Set the signal generator to 1.5 MHz CW at 0 dBm. Connect

(AU1

a 50R termination in parallel with it.

2.

Key in 0.152 SPCL to unsquelch. Check A4TP5 (FM OUT) with an oscilloscope. The waveform should be a 3 MHz (that is, a doubled 1.5 MHz) sine wave with an amplitude of 0.4 and an offset of -1.9 to -1.3 Vdc. The waveform will be distorted

be even.

3. Key in

Hint:

0.150

SPCL to squelch. The ac component of the signal should decrease markedly.

Pin 10 of A25XA4 should be a TTL low.

is shown on Service Sheet 10.)

its

RF output to

and

A4J1

(IF IN) with

to

0.8 Vpp

adjacent cycles may not

Service Sheet

11

8F-61

Model 8901B Service

ASSEMBLY

0

A2

Audio

Filters

PRINCIPLES OF OPERATION

General

The Audio Filter Assembly contains some of the circuits that process the audio attenuators, and amplifiers. The inductors of all filters are carefully oriented and shielded mutual coupling and pickup of stray powerline fields.

260

kHz Low-Pass Filters and

The

two

260 kHz Low-Pass Filters remove any Both are seven-pole, Butterworth determine the high-frequency response of the audio system when LP FILTER each filter the first shunt capacitor is on the previous assembly (see Service Sheets switching is via U1. An additional range of FM is provided by 20 output of its 260 kHz Low-Pass Filter. found later in the audio chain (see Service Sheet 13) when in AM only. In FM the pole determining the overall frequency response. C11 is a dc blocking capacitor. R6 permits adjustment of the AM sensitivity.

Service Sheet

20

dB Attenuator

IF

carrier remaining on the demodulated AM

filters

with a nominal

R5

and C12 form a real-axis zero

12

signal:

1

3

dB

cutoff frequency of 260 kHz. The filters

is

dB

Attenuator

to

equalize for a real-axis pole

low-pass filters,

set to ALL

8

and

1

(R8

and

to

minimize

or

OFF.

11).

R9)

is

utilized in

FM.

For

Filter

at the

Amplifier

Amplifier 200 kHz signals with minimum loss of fidelity. Amplifier transistors Q1, Q3, Q6, and Q7 and current source transistors Q2, Q5, and Q4 form a discrete operational amplifier. The overall amplifier gain is determined by feedback resistors and is equal to l+(R27/R22). The bases of differential pair Q1A and Q1B are respectively the non-inverting and inverting inputs of the amplifier. Q4 and Q5 comprise a conventional two-transistor current source in which negative feedback causes the voltage drop across the emitter resistor (R24) of Q4 to equal the base-emitter voltage of established at the base of Q4

for

to drive the output load at high modulation rates

amplifier.

15

kHz and

The 15 kHz Low-Pass Filter is selected when LP FILTER

being used (unless overridden).

Sheet 13) is selected to improve stopband rejection. The filter

3

The >20 kHz Low-Pass Filter has nine poles and approximates a Bessel response for minimize overshoot. The

The filters are switched by U2 and U4D. Since each filter has a 6 Attenuator is inserted into the through path. Thermistors RT2 and RT3 compensate for thermal changes in the resistance the filters is adjusted by means outputs of the 6 the output switches.

1

is

a low-noise, high slew-rate, non-inverting amplifier with a gain of 2.8.

(two

junction drops above the -15V supply) is also used as a reference

current-source transistor Q2. Complementary transistors Q6 and

or

levels. R11 and C14 frequency compensate the

>20

kHz Low-Pass Filters

is

set to 15 kHz

It

is

also switched in whenever the 3 kHz Low-Pass Filter (see Service

is

dB

frequency of 15 kHz.

3

dB

frequency is approximately 110 kHz.

of

the filter inductors (and hence the insertion loss). The passband gain of

of

R40 and R44. When the 15 kHz Low-Pass Filter is selected, the

dB

Attenuator and

>20

kHz Low-Pass Filter are grounded

It

Q5.

The voltage that is thus

Q7

provide the current necessary

or

when the

a five-pole, Butterworth type with a

dB

loss in the passband, the 6

to

minimize leakage through

455

must pass

kHz

IF

is

dB

Service Sheet

12

8F-63

Service Model

8901B

Amplifiers 2 and 3 and

Amplifier 2 is non-inverting and has a gain in the resistance

Two

of

the audio gain ranges are determined by

the Audio Gain Selectors Amplifier 3 is non-inverting and has a gain

R47).

R47,

the effect

of

R48,

and the amplifier load (on Service Sheet

ground loops.

20

dB Attenuator

the filter inductors

U4C

and

of

U4B.

of

the

2

4.84.

Thermistor

260

kHz

Low-Pass Filters.

20

dI3

Attenuator 2 and the through path

of

10

overall (including the attenuation due to

13)

m1

compensates

are grounded in such a way

for

thermal changes

as

R46

as

to minimize

set by

and

83-64

Service Sheet

12

Model 8901B

TROUBLESHOOTING

General

Service

Procedures on the schematic diagram by a hexagon with a check mark and a number inside, In addition, any points outside the labeled circuit area that must be checked are signals are also shown on the schematic inside board assembly and its input cables where necessary to make measurements.

for

checking the Audio Filter Assembly are given below. The circuits to check are marked

a

hexagon, for example,

Tighten SMC connectors to tors is insufficient. Hand-tightened connectors can reduced performance

If the Measuring Receiver synthesizer first to prevent damage to the

present.

or

0.6

N.

m

(5

malfunctions.

is

to be turned

in. lb). Hand tightening of connec-

work

off,

disconnect the audio

FET

switches

by

Equipment

Audio Synthesizer. Capacitor, 620 pF Oscilloscope Resistor,909 Resistor,1210R Resistor, 2150R Resistor, 46400. Voltmeter

R

........................................................................

................................................................

.............................................................

......................................................................

................................................................

...............................................................

..............................................................

for

also

(+I

.9

TO

+2.1

VDC) .

loose and cause

the large signal

example,

identified. Fixed

HP

HP 0757-0422 HP 0757-0274

HP

a.

Extend the

HP 3336C

0160-3536

HP 1740A

0698-0084

0698-3155

HP 3455A

(7~

260

kHz Low-Pass Filters and Modulation Selectors Check

1.

Disconnect the cables from A2J1 (AM IN) and A2J2 (FM IN). Extend the

Assembly. Jumper a lead between chassis ground and the cover

2.

Construct the input load

constructed from a

3. Set the audio synthesizer to 1 kHz at Connect the output capacitance to the load.

4. Key in 0.120 SPCL and 0.111 SPCL to select low audio gain and AM.

for

the AM input'as shown in Figure 8F-14. The 7750 resistor can be

21500

resistor in parallel with a 12100 resistor.

Figure

of

the load directly to

8F-14.

Filter for

+13

am. Connect

A2J1

(J1)

(AM

IN). An intervening cable will add too much

of

the A2 assembly.

Step

2

its

500 output to the input

A2

Audio Filter

of

the load.

Service Sheet 12 8F-65

Service

Model 8901B

5.

Connect a high-impedance, ac coupled oscilloscope to the input of the load. The oscilloscope

10:l

should have a low-capacitance 5 VPP.

6. Connect the oscilloscope to pin 3 of U1A. The 1 kHz

500

to

mVpp.

50

kHz.

The

50

kHz

450 and

Hint:

Pin 1 of U1A should be a TTL low.

Detector is too high, the Modulation Selectors will be latched open (see Service Sheet

7.

If

necessary, adjust the synthesizer level for a waveform of

frequency

8.

Increase the synthesizer frequency until the waveform amplitude frequency should be between 240

divider probe. Adjust the synthesizer lever for a waveform of

waveform should have an amplitude between

If

for any reason the signal into the Audio Overvoltage

13).

500

mVpp. Increase the synthesizer

waveform should have an amplitude between

is

355

and

280

kHz.

500

and

530

mVpp. The synthesizer

mVpp.

9. Increase the synthesizer frequency to 1.5

10.

Construct the input load for the FM input as shown in Figure 8F-15. The 760R resistor can be constructed from a 9090 resistor in parallel with a 4640R resistor.

Figure

11.

Set the synthesizer to 1 kHz. of the load directly to

12. Key in 0.118 SPCL to select high-gain FM.

13.

Connect the oscilloscope to the input of the load. Adjust the sythesizer for a waveform of 5 Vpp.

14.

Connect the oscilloscope to pin

1.8

and

2.0

Vpp.

Hint:

Pin 16 of U1D should be low.

A2J2

8F-15.

Connect its 50R output to the input of the load. Connect the output

(FM

IN).

14

of

U1D.

MHz.

The waveform should drop into the noise.

Filter for

The 1 kHz

a

Step

10

waveform should have an amplitude between

15. Adjust the level for a waveform of 2 Vpp. Increase the synthesizer frequency to

kHz

waveform should have an amplitude between 1.95 and 2.05 Vpp.

16. Increase the synthesizer frequency until the waveform amplitude frequency should be between 240 and

17.

Increase the synthesizer frequency to 1.5

18. Set the synthesizer frequency to 1 kHz.

19. Key in 0.112 SPCL to select low-gain FM. The waveform should have an amplitude between 195 and 205 mVpp.

Hint:

Pin 9 of U1C should be a TTL low.

8F-66 Service Sheet

12

280

is

1.4 Vpp. The synthesizer

kHz.

MHz.

The waveform should drop into the noise.

150

kHz.

The

150

Model 8901B Service

@

Amplifiers

2.

1,

2,

and

3,

15

kHz

and

>20

kHz

LPFs,

NOTE

This

check assumes that the

tion Selectors Check

1.

Disconnect the cables from A2J1 Assembly. Jumper a lead between chassis ground and the cover of the A2 assembly.

Construct the input load for the FM input as described in step

Filters and Modulation Selectors Check

above gives positive results.

@)

260

(AM

IN) and A2J2 (FM IN). Extend the A2 Audio Filter

above.

and Audio Gain Selectors

kHz

Low-Pass Filters and Modula-

10

of the

a

260

Check

kHz

Low-Pass

3. Set the audio synthesizer Connect the output of the load directly capacitance to the load.

4. Key in 0.120 SPCL and 0.118 SPCL to select low audio gain and high-gain FM.

5. Connect a high-impedance, ac coupled oscilloscope to the base of Q1A. Adjust the synthesizer level for a waveform of 1.5 Vpp.

Hint:

If

for

any reason the signal into the Audio Overvoltage Detector is too high, the Modulation

Selectors will latch open (see Service Sheet 13).

6.

Connect the oscilloscope amplitude between 4.1 and 4.3 Vpp.

7.

Adjust the synthesizer level for a waveform of 4 Vpp.

8.

Key in 0.139 SPCL to select the 6 The 1 kHz

Hint:

9. Key in 0.13C SPCL to select the 15 between 1.9 and 2.1 Vpp.

Hint:

10. Increase the synthesizer frequency to

1.9 and 2.1 Vpp.

waveform should have an amplitude between 1.9 and 2.1 Vpp.

Pin 1 of U2A should be a TTL low.

Pin 16 of

U4D

to

1

kHz

at

to

A2TP2 (AMPL 1 OUT). The 1 kHz

kHz

and pins 8 and

+10

dBm. Connect

to

A2J2

(FM

dB

Attenuator. Connect the oscilloscope to pin 14 of U4D.

hw-Pass Filter. The waveform should have an amplitude

16

of U2 should be a TTL

10

kHz.

The waveform should have an amplitude between

its

50R

output to the input of the load.

IN). An intervening cable will add too much

waveform should have an

low.

11.

Increase the synthesizer frequency until the waveform amplitude frequency should be between 14 and 16

12.

Increase the synthesizer frequency to 150

13. Set the synthesizer frequency to 1 kHz. Filter. The 1 kHz

Hint:

Pin 9 of U2C should be a TTL low.

14. Increase the synthesizer frequency to 10

1.9 and

15. Increase the synthesizer frequency until the waveform amplitude

frequency should be between 100 and 120

16. Increase the synthesizer frequency to 450

17. Key in 0.139 SPCL to set all filters

adjust the level for a waveform amplitude of 2 Vpp.

18. Connect the oscilloscope to A2TP3 (AMPL

amplitude between

2.1

Vpp.

waveform should have an amplitude between 1.9 and

9.5

and

9.9

Vpp.

kHz.

The waveform should drop into the noise.

Key in 0.13A SPCL to select the >20

kHz.

The waveform should have an amplitude between

kHz.

The waveform should drop into the noise.

off.

Set the synthesizer frequency to

2

OUT).

The 1 kHz waveform should have an

is

1.4 Vpp. The synthesizer

kHz

Low-Pass

2.1

Vpp.

is

1.4 Vpp. The synthesizer

1

kHz.

If

necessary,

Service Sheet 12 8F-67

Service

19.

Adjust the synthesizer level for a waveform

of

10

Model 8901B

Vpp.

20. Connect the oscilloscope amplitude between

Hint:

8

of

21.

Reduce the synthesizer level by exactly 20

22. Key in 0.121 SPCL to set audio gain

9.9

and 10.1 Vpp.

Hint:

Pin 9 of

23. Increase the synthesizer frequency until the waveform amplitude frequency should be between 240 and 280 kHz.

9.9

U4B should be a TTL low.

U4C should be a TTL low.

to

A2TP4 (AMPL 3 OUT). The 1 kHz waveform should have an

and 10.1 Vpp.

dB.

to

high. The waveform should have an amplitude between

is

7.1

Vpp. The synthesizer

8F-68

Service Sheet

12

Model 8901B Service

ASSEMBLY

0

A3 Audio De-emphasis

PRINCIPLES OF OPERATION

General

The Audio De-emphasis and Output Assembly contain some of the circuits that process the audio signal: high- and low-pass filters, amplifiers, and an integrator for phase demodulation. the Instrument Bus decoding logic for itself, the Audio Filter Assembly, and the FM Demodulator

Assembly.

300

Hz and

The 300 gain. Selection of the filter outputs

3

kHz Low-Pass Filter, Low-Pass Filter Switching, and

The is

a unity-gain input buffer to the filter; R7 and C24 C25, C26 and U4D form a pair of complex poles, and R11, R12, C33, C34, and U4C form another pair. Selection of the filter output of the through line

pole at 300

(see Service Sheet

3

kHz

50

Hz High-Pass Filters and High-Pass Filter Switching

Hz

and

50

Hz

High-Pass Filters are active, two-pole, Butterworth filters with unity passband

Low-Pass

kHz

Filter

that completes the filter for the Charge-Count Discriminator in the FM Demodulator

11).

U3

Service

and

Output

or

the through line

is

an active, five-pole, Butterworth filter with unity passband gain. U4A

is

a

unity-gain buffer amplifier.

Sheet

is

13

It

also contains

is

via U12A, U12B, and U12C.

300

kHz Pole

at

its

output form a real-axis pole. The R8,

via U13A and U12D. R18 and C42 form a real-axis

R9,

De-emphasis Networks and Phase Modulation Integrator

The de-emphasis networks can be selected only in FM. They are simple single-pole, low-pass filters with

3

dB

frequencies as shown in Table 8F-26.

Table

The

750

ps

de-emphasis network is followed by an amplifier (U9A, R32, and R34) with a gain of 10. The gain is needed because is desired because of low deviation and noise.

The Phase Modulation Integrator, U9B, converts the voltage from the FM Demodulator, which is proportional the instantaneous phase deviation is equal to the time integral of the instantaneous frequency deviation (see

Modulation Basics

output

to

frequency deviation, into a voltage proportional

for

large inputs and low frequencies. The integrator sensitivity

750

ps

in the

8F-26.

I

FM de-emphasis

Operation and Calibration Manual).

De-Emphasis Network

Time Constant

I

is

normally used in situations where more resolution

3

dB

3

dB

Frequency

Fkequencies

I

to

phase deviation. Mathematically,

VR2 and VR3 limit the integrator

is

adjusted using R27.

Service Sheet 13

8F-69

Service Model 8901B

Switching of the de-emphasis networks and Phase Modulation Integrator

is

via the switches at their outputs. U14A and U14B select the input to the amplifiers that drive the Voltmeter, whether the input is before

the de-emphasis. When de-emphasis is used, the de-emphasized signal

is

or

after

the MODULATION OUTPUTjAUDIO INPUT connector when the Modulation Output function has been selected.

Output Amplifiers

U10, U8, and associated resistors form the output

of

U10 and drives the MODULATION OUTPUT/AUDIO INPUT connector through 6000 impedance (R54 and A25R1) when the Modulation Output function has been selected. U7 either inverts or

does not invert the output of U8 depending on

and U14D. When U14C

is

active, the amplifier

is inverting.

two,

closely matched amplifiers with a gain of

its

configuration determined by the

is

non-inverting. When U14D is active, the amplifier

two.

states

Absolute Peak Detector

The input level to the assembly

is

necessary. Range sensing

large signals

of

stopband frequency at the input to an active filter may Detector and overdrive the filter. The Absolute Peak Detector and the Peak Detector are both read by the Voltmeter to determine the proper setting of audio gain.

The Absolute Peak Detector consists positive-peak detector (U5) driving never negative. When the input voltage and reverse bias CR6 because the voltage across C44

junction drop more negative than the negative input voltage. Ignoring those components

effect, the detector can be simplified inverting, negative-peak detector.

is

sensed by the Absolute Peak Detector

is

normally done by the Peak Detector (see Service Sheet 14). However,

of

an

inverting, negative-peak detector (U6) and a non-inverting,

a

common hold capacitor C44. The voltage across C44, then,

is

negative, CR4

is

off.

The action

is

positive and the output

to

determine if audio ranging

go

undetected by the Peak

of

U5 is

to

turn on CR2

of

U5

is

that

as

shown in Figure 8F-16. The circuit shown

is

a conventional

present at

U11 inverts

of U14C

is

at least one

have no

When the input voltage is positive, CR2 CR5 because the voltage across C44 Ignoring those components that have no effect, the detector can be simplified as shown

is

off.

The action

is

positive and the output

of

U6

is

to turn on CR4 and reverse bias

U6

is

one junction drop below ground.

in

Figure 8F-17.

The circuit shown is a conventional, non-inverting, positive-peak detector. CR1 and CR7 are protection diodes. The hold capacitor can be discharged by switching on Q1 via

U15D at the request of the Controller. The detector's output goes to the Voltmeter.

CR4

(OFF)

CR4

(OFF)

d

v

R13

Figure

INPUT-

8F-16.

R13

G

The Absolute Peak Detector Shown

'

5

OUTPUT

as

an Inverting, Negative-Peak Detector

as

an Inverting, Negative-Peak Detector

8F-70 Service Sheet

13

Model

1

8901B

Service

INPUT

OUTPUT

Figure

Audio

8F-17.

The Absolute Peak Detector Shown

as

a Non-Inverting, Positive-Peak Detector

Overvoltage Detector

The Audio Overvoltage Detector is a positive-peak detector followed by a comparator. level should exceed

260

the detector

kHz

is

read by the Controller via gates

+3.6V,

Low-Pass Filters via the Modulation Selectors (see Service Sheet

U9D

goes low and resets register

U21D

and

U21C.

U19.

This opens up the audio path from

Digital Circuits

Some

of

the digital circuits on this assembly also control circuits on the FM Demodulator and Audio

11

and

12).

Filter Assemblies (see Service Sheet

Instrument

The FM SQUELCH

is

squelched when either the Squelch Detector (see Service Sheet

Controller requests squelch. In the former case the line goes low and resets flip-flop

of

squelch can then be read by the Controller via gates

squelch by clocking a low into

the readback operation, see

Bus

in Service Sheet

(L)

BD5.

line going to the FM Demodulator is both an input and an output line. FM

U22B

which pulls the FM SQUELCH (L) line low. (For a discussion of

Direct Control Special finctions

For a general discussion of instrument control, see

11)

senses a low

U21B

and

U21C.

in paragraph 8-7.)

If

the peak input

12).

The status of the

IF

level

or

when the

U22B.

The Controller can reset

The status

Service Sheet

13

8F-71

Service Model

TROUBLESHOOTING

General

Procedures for checking the Audio De-emphasis and Output Assembly are given below. The circuits to check are marked on the schematic diagram by

0.

for example, are

also

identified. Fixed

(+1.9

TO

f2.1

VDC)

If

systhesizer first to prevent damage to the

present.

In addition, any points outside the labeled circuit area that must be checked

signals

.

Extend the board assembly where necessary to make measurements.

the Measuring Receiver

are also shown on the schematic inside a hexagon, for example,

is

a

hexagon with a check mark and a number inside,

to be turned

FET

off,

disconnect the audio

switches

by

the large signal

Equipment

8901B

Audio Synthesizer. Oscilloscope

@)

High-Pass and Low-Pass Filters and Filter Switching Check

1.

Unplug the

2.

Set the audio synthesizer to 1 kHz

3. Connect a high-impedance, dc coupled oscilloscope to pin 2 of A25XA3. Adjust the synthesizer level for a waveform of 2 Vpp.

4.

Key in 0.141 SPCL to select no high-pass filter.

5.

Connect the oscilloscope to pin 2 of U12A. The 1 kHz waveform should be between 1.95 and

2.05 Vpp.

Hint:

Pin 8 of U12B should be a TTL low.

6. Key in 0.144 SPCL to select the 300 and 2.05 Vpp.

Hint:

Pin 9 of U12C should be a TTL low.

7.

Decrease the synthesizer frequency to 300 Hz. The waveform should be between 1.3 and 1.5 Vpp.

................................................................

......................................................................

A2

Audio Filter Assembly.

at

+4 dBm. Connect

Hz

High-Pass Filter. The waveform should be between 1.95

its

50R

output to pin 2 of A25XA3.

HP 3336C

HP 1740A

8.

Increase the synthesizer frequency to 1 kHz. Key in 0.142 SPCL Filter. The waveform should be between 1.95 and 2.05 Vpp.

Hint:

Pin 1 of U12A should be a TTL low.

9. Decrease the synthesizer frequency to

10. Key in 0.141 SPCL and 0.139 SPCL to select no high-pass

11.

Increase the synthesizer frequency

The waveform should be between 1.95 and 2.05 Vpp.

Hint:

Pin 16 of U12D should be a

8F-72 Service Sheet 13

to

50

Hz.

The waveform should be between 1.3 and 1.5 Vpp.

or

low-pass filters.

to 1 kHz. Connect the oscilloscope

TTL

low.

select the

to

A3TP4 (FLTR

50

Hz High-Pass

OUT).

Model 8901B Service

12.

Key in 0.130 SPCL

and

2.05

Vpp.

Hint:

1

of

to

select the 3 kHz Low-Pass Filter. The waveform should be between 1.95

U13A should be a TTL low.

13. Increase the synthesizer frequency to 3 kHz. The waveform should be between

(J2)

De-Emphasis

1.

Unplug the A2 Audio Filter Assembly.

2.

Set the audio synthesizer to 1 kHz at +4 am. Connect

and

Output Amplifiers Check

its

50R output to pin 2 of A25XA3.

3. Key in 0.139 SPCL, 0.149 SPCL, and 0.100 SPCL to select no high-pass FM de-emphasis.

4.

Connect a high-impedance,

dc coupled oscilloscope to A3TP4 (FLTR OUT). Adjust the

synthesizer level for a waveform of 2 Vpp.

Hint:

If the level

is

faulty, see High-Pass and Low-Pass Filters and Filter Switching Check.

5. Connect the oscilloscope to A3TP2 (MOD OUT). The waveform should be between 3.9 and

4.1 Vpp.

Hint:

Pin 1 of U15A should be a TTL low. The gain of the Output Amplifier should be +2 followed

by

-1.

6.

Key

in

the Direct Control Special Functions indicated in Table 83-27. For each setting, set the

synthesizer frequency

as

indicated. The waveform amplitude at

A3TP2

1.3

or

low-pass filters

should be

and 1.5 Vpp.

as

indicated.

or

Table 8F-27.

Direct Control

Special Function

0.101

04

0.1

0.102

Synthesizer

Frequency (Hz) Amplitude (Vpp) U13-16 Ul3-9 U15-9

6366

31

21 22

7. Set the synthesizer frequency to 212.2 Hz and reduce

8. Key in 0.103 SPCL to select 750

Hint:

Pin 8

of

U13B should be a TTL low. The in-band gain of the 750

Levels

83 2.6

ps

de-emphasis. The waveform should be between

at

A3TP2,

Waveform

2.6

to

2.6

to

@J

3.0

its

level exactly

Step

6

Level (TTL) at

H

L

9. Key in 0.105 SPCL to select QM.

10. Set the synthesizer frequency to 1 kHz and increase its level exactly 20 be between 3.8 and 4.2 Vpp.

11.

Increase the synthesizer frequency to 10 kHz and increase

its

level exactly 20

should be between 380 and 420 mVpp.

12. Key in

0.100

SPCL.

H

L

H H

20

dB.

ps

dB.

L

H

2.6

and 3.0 Vpp.

amplifier is 10.

The waveform should

clB.

The waveform

Service Sheet

13

8F-73

Service

Model 8901B

13.

Decrease the synthesizer frequency to 2122 Hz. Connect the oscilloscope to A3TP3 (DE-EM

OUT). Set the oscilloscope to trigger on the synthesizer output. The waveform should be between

3.9 and 4.1 Vpp.

Hint:

Pin 8 of U14B and pin 16 of U14D should be a TTL low.

14. Key in 0.108 SPCL to select a non-inverting output. The waveform should invert and have an amplitude between 3.9 and 4.1 Vpp.

Hint:

Pin 9 of U14C should be a TTL low.

15. Key in 0.102 SPCL and 0.141 SPCL to select

waveform should be between 2.6 and 3.0 Vpp.

Hint:

Pin 1 of U14A should be a TTL low.

16. Key in 0.100 SPCL. Increase the synthesizer frequency to 311 kHz. The waveform should be

between

Hint:

@

Detectors Check

1.

Unplug the A2 Audio Filter Assembly.

2. Set the audio synthesizer to 1 kHz at +4 am. Connect its 500 output to pin 2 of A25XA3.

3.

Key in 0.141 SPCL to select no high-pass filters and to assure that Q1

4. Connect a high-impedance, dc coupled oscilloscope to pin 2 synthesizer for a waveform

5. Connect the oscilloscope to A3TP5 (AUDIO RANGE). The voltage should be between +0.9 and

+1.1

2.5

and

3.1

Vpp.

This rolloff is due to R18 and C42.

of

2 Vpp.

Vdc.

No

75

ps

de-emphasis with pre-display on. The

other device should contribute to the rolloff.

is

off.

of

A25XA3 also. Adjust the

8F-74

6. Reduce the synthesizer level by 10

7.

Key in

8. Increase then decrease the synthesizer level by 10

0.3V in about 0.5s.

Hint:

9. Key in 0.111 SPCL and 0.150 SPCL to select AM and reset the Audio Overvoltage Detector and to enable readback of the audio overvoltage.

10.

Connect the oscilloscope to pin 3 of U19.

000000.0000.

Hint:

high. Pin 10 of U21C should be a TTL high.

Service Sheet 13

0.160

SPCL to enable the discharge of the Absolute Peak Detector.

Low-going TTL pulses should appear at pin 16 of U15D.

Low-going TTL pulses should appear at

dB.

The voltage at A3TP5 should discharge

dB.

The voltage at A3TP5 should discharge to

It

should be a TTL low. The display should show

12 of

U21D.

11

to

0.3V in about 2s.

of

U21D should be a TTL

Model

8901B

Service

11. Set the synthesizer to +24 and connect its output to the anode The display should show 000001.0000.

Hint:

11

u21c.

12.

Reduce the synthesizer level by 10 unchanged.

13. Connect the oscilloscope

(J4)

Select

1.

Decoder,

Key in the Direct Control Special Functions indicated in Table 8F-28. For each setting, check

the pins on U20 indicated.

dBm or,

if

the synthesizer cannot deliver +24

of

CR3. The voltage at pin 3 of

dBm,

set

it

to +19

dBm

U19 should be a TTL high.

of U21D should be a TTL low. Low-going TTL pulses should appear at pin 10

dB.

to

Data Latches,

Direct Control

SpecialFunction

0.100

0.1 10

0.1

20

0.1 30

0.1

40

0.1

50

0.1

60

0.170

The voltage at pin 3

12

of U9D. The voltage should be between +3.4 and

and

FM

Squelch

Level (lTL) at

7

9

10 11 12 13 14 15

HHHHHHH' HHHHHH'H

HHHHH*HH

HHHH'HHH

HHH'HHHH

HH'HHHHH H'HHHHHH

'HHHHHHH

of

U19 and the display should remain

Checks

U20

+3.8

Vdc.

of

2.

Key in the Direct Control Special Functions indicated in Table 8F-29. For each setting, check the indicated pins.

Table

8F-29.

Direct Control

SpecialFunction 2 7 10 14 15

0.100

0.1

01

0.1

02

0.103

0.1

04

0.1

05

0.1 08

Level (TTL) at U18 Pin

LLLHLLHHHHH

HLLHLHLHHHH

LHLHLHHLHHH

HHLHLHHHLHH

LLHHLHHHHLH

HLHHLHHHHHL

LLLLHHHHHHH

Levels at

U18

and

U17,

@

Step

Level (TTL) at U17 Pin

1

2

3

2

4

5

6

Service Sheet 13 8F-75

Service

3.

Key in the Direct Control Special Function indicated in Table 8F-30. pins indicated on U19.

Level

(lTL)

H

L

H

at U19 Pin

H

H H H

1

Direct Control

Special Function

0.1 11

0.1 12

0.1 14

0.118

3 6 11

L

H H

15

H H

H

Model 8901B

For

each setting, check the

Direct Control

Special Function

0.1

20

0.1 21

5.

Key in the Direc Control Special Functions indicated in Table 8F-32.

Level (lTL) at U22A Pin

5

L

H

6

H

1

the pins indicated on U23.

lbble

Direct Control

Special Function

0.131

0.132

0.1 34

0.1

38

8F-32.

Levels at

Level (TTL)

3

L

H

H H

U23,

6 11 15

H

L

H

at

U23 Pin

H

1

Step

H H

5

H H

H

1

6. Key in the Direct Control Special Functions indicated in Table 8F-33. the pins indicated on U16.

For

each sett.-ig, check

For

each setting, check

8F-76

7.

Unplug the

Service Sheet

lbble

Direct

Special Function

0.141

0.142

0.144

0.148

A4

FM Demodulator Assembly.

8F-33.

Control

13

Levels at

H

Level

H

Ul6,

(TTL)

@

Step

at U16 Pin

L

H

6

1

H

Model 8901B Service

8.

Key in 0.152 SPCL and 0.170 SPCL

000000.0000.

Hint:

Pin 9

of

U22B should be a TTL high. Pin 4 of

should be a TTL high.

to

unsquelch then read squelch. The display should read

U21B should be a TTL low. Pin 10

of

U21C

9. Key in 0.150 SPCL to

00000

1

.oooo.

Hint:

Pin 9

of

U22B should be a TTL low. Pin

of

U21C should be low-going TTL pulses.

10

10. Key in 0.152 SPCL and 0.170 SPCL, then momentarily ground pin should go

from

000000.0000

0.170

SPCL to squelch then read squelch. The display should read

4

of

U21B should be high-going

to

000001.0000.

TTL

13

of

U22B. The display

pulses. Pin

Service Sheet 13

8F-77

Model 8901B

Service

ASSEMBLY

0

A5

PRINCIPLES

General

The Voltmeter Assembly contains Average Detector. The input proportional

MODULATION OUTPUT/AUDIO INPUT connector cannot be measured by these detectors.)

Audio

Peak

The peak-detecting circuitry consists Buffer Amplifier. U4 and Q2 comprise U4 is the non-inverting input positive than the voltage at the non-inverting

the inverting input the output its previous potential, which was the peak value of the input voltage.

Voltmeter

OF

OPERATION

(Audio

to

AM depth, frequency deviation,

Detector Circuits

of

U4. In doing this, Q2 must charge C18. When the inverting input of U4 lowers,

of

U4 goes high and shuts

Service

Detectors)

two

ac-to-dc converters: the Audio Peak Detector and the Audio

to

the detectors is the output of the audio system and

of

the Peak Detector, the Sample-and-Hold Switch, and the

a

high-gain comparison amplifier. The inverting

of

the overall comparator.

off

Q2. Since C18 has no path to rapidly discharge,

Sheet

or

(+)

14

phase deviation.

If

the inverting input of U4

input, the output drives the collector

(An

audio signal applied

is

equal

of

is

a voltage

to

the

(-)

input of

to

or

more

Q2 to follow

it

remains at

FET

Q5

is a Sample-and-Hold Switch which is periodically (every 100 ms) switched on

voltage on C18

of

C19 when Q5 is is switched on by by R19 and C8. The transfer time parallel with R14 (when discharge C18. charge- transfer cycle.

The result of the sample-and-hold sequence is to control the response time of the peak-detector circuit and to make Figure 8F-18 where the response to a step increase and decrease in input level is shown.

Normally, Q7 is off, and the charge-transfer time This gives the fastest response time. To slow down the peak-detector response, Q7 issuing 5.1 SPCL). R14 then is switched in parallel with R17, which shortens the time U9 (See schematic Note 3 for timing information.) one sample period. This slows down the response time and smooths the output When DETECTOR is set to PEAK HOLD, U9 is reset to switch mode. The voltage across C19 digitally holds the peak

Offset resistor typical peak-detected noise level.

to

C19. U8 is a high-impedance, unity-gain buffer amplifier which minimizes bleeding

off

(in its hold mode). Astable multivibrator U9 controls the switching of Q5. Q5

Q6

when the output of U9 goes low. The transfer frequency is determined primarily

is

determined by C8 and either R17 (when Q7 is off)

Q7

is

on). Also,

(At

this time Q5 is off.) Thus, C18 must be recharged by the Peak Detector after each

it

respond equally well to an increasing

is

then equal to the peak

of

the peaks read by the Voltmeter.)

R38

for

U8

is

adjusted under a no-signal condition to produce an output equal to the

when

U9

R36

goes

high, Q3

or

decreasing input level. This

is

long enough for C19

now prevents C19 from charging completely in

of

the peaks. (In this mode the Controller

is

momentarily turned on

to

be charged completely.

Q5

into a permanent sample (on)

to

transfer the

or

R17 in

to

rapidly

is

illustrated in

is

switched on

is

if

the signal is noisy.

(by

low.

also

Service Sheet

14

8F-79

Service

ov

INPUT

TO PEAK DETECTOR

SI

QNAL

AT

TP6

Model 8901B

Figure

Audio

Average Detector

The Audio Average Detector consists of the Half-Wave Rectifier followed by the Summer and Filter.

The voltages and currents in the detector, for a sine wave input, are shown in Figure 8F-19. The input voltage produces a current in R5. This current is summed with the current in the input voltage, which has been half-wave rectified and inverted. Since R8

of

value summed. The sum current, then, the sum current produces a dc voltage equal “actual” average of a sine wave is, of course, always zero.)

U3 is an inverting amplifier with

positive input voltage, current flows through

the output from R6 flows through R3 and CR8. Since no current flows through R6 (because from R6

U1

R23 and filter capacitor C12 C14, R26, and C15 add further filtering. The Audio Average Detector has R18 Rectifier R2 adjusted

least-significant digit normally displayed. (This compensates for the fact that this undisplayed digit is dropped and not rounded

R5 (and has a very stable resistance), the half-wave current

is

zero.

sums the currents in

is

adjusted under a no-signal condition

8F-18.

Action

is

two

is

opposite and equal

R5

and R8. The sum current flows through the feedback resistors R22 and

to

produce a negative dc voltage proportional

to

shut

it

off.

off.)

of

the Peak Detector Sample-and-Hold Filter

R8,

also produced by

is

approximately half the

is

weighted by a factor of

proportional

feedback paths (one for each direction of current flow). For a

to

R2

is

to

the full-wave-rectified input voltage. After filtering,

to

the “absolute” average value

R3,

R6, and CR5. Since the values of R3 and R6 are equal,

the input voltage. For a negative input voltage, the current

so

that the detector output

then adjusted for a detector output equal

of

the input voltage. (The

CR5

is

shut

off),

to

the

sum

current. R24,

two

offset adjustments.

is

zero with the Half-Wave

to

one

two

when

the output

half

of the

8F-80 Service Sheet 14

Model

8901B

Service

INPUT VOLTAGE

"t

21

+

1

CURRENT THROUGH

SUM CURRENT

R22

R23

Figure

8F-19.

OUTPUT VOLTAGE AT TP4

Waveforms

in

the Audio Average Detector

Service

Sheet

14

8F-81

Service Model 8901B

TROUBLESHOOTING

General

Procedures for checking the Voltmeter Assembly are given below. The circuits to check are marked on

(J3)

.

the schematic diagram by a hexagon with a check mark and a number inside, for example,

addition, any points outside the labeled circuit area that must be checked are also identified. Fixed signals are also shown on the schematic inside a hexagon, for example,

board assembly where necessary

to

make measurements.

(+I

.9

TO

f2.1

vDC) .

Extend the

In

CMOS

Do

Discharge the board, replacement device, and soldering iron to the same

potential. (Use the conductive foam pad provided

Kit

Equipment

Audio Source Oscilloscope

Voltmeter

(./1>

Sample

1.

Key in 49.0 SPCL to set up the Voltmeter to measure ground.

2.

Key in the Direct Control Special hnctions indicated in Table 8F-34. For each setting, check the points indicated with a high-impedance, dc coupled oscilloscope. For each setting, the oscilloscope should read as indicated.

(J2)

Peak Detector Check

1.

Unplug the A3 Audio De-Emphasis and Output Assembly.

2.

Set the audio source to 1 kHz at

......................................................................

and

circuits can be damaged

by

static charges and circuit transients.

not remove this assembly from the instrument while power is applied.

in

the Service Accessory

HP

08901

-60287.)

..................................................................

....................................................................

Hold

Drive Check

0.7

Vrms. Connect

its

output to pin 9 of A25XA5.

HP 8903B

HP 1740A HP 3455A

3. Connect

4.

Key in 0.1EO SPCL to set the peak detector discharge mode to hold.

5.

Connect the voltmeter to A5TP7 (PK DET CAP). Set the voltmeter to measure dc. The voltmeter should read between +990 and +lo10 mVdc

6. Connect the voltmeter to A5TP6 (PK DET OUT). The voltmeter should read within reading in step

Hint:

The collector of Q6 should be between +14 and +15 Vdc. is only slightly in error, perform the Voltmeter Offset and Sensitivity Adjustment. In normal operation the Peak Detector should be accurate to

4

Vpk. When testing the detector, the distortion of the source must be less than -70

7.

Key in 0.1E1 SPCL to set the peak detector discharge mode to fast.

8F-82 Service Sheet

an

ac voltmeter

5.

14

also

to pin 9 of A26XA5. Adjust the level of the source to 707.1 mVrms.

or

if

+1%.

the level of setup 3 could not be

Q5

should be on.

10.1%

fl

mV from

20

Hz to

set

fl%

If

the reading

200

kHz and to

dB.

exactly,

of the

Model

8901B

0.1

E3

EO

See

Service

(2).

4

4k2.5

4

90

to

110

3.5

ma

)c-

+

4-14

-0

to

15V

1v

Service

Sheet

14

8F-83

Service

Model 8901B

8.

Connect a high-impedance, dc coupled oscilloscope to A5TP7. The waveform should be as in

Figure 8F-20.

Hint:

If

the waveform

is

faulty, see

(J1)

Sample and Hold Drive Check.

4

Figure

93

to

8F-20.

113

ms

Waveform for

+

@

Step

4-to.9

4-Z-1.2V

8

to

+1.1v

(L/3)

Average Detector Check

1.

Unplug the A3 Audio De-emphasis and Output Assembly.

2. Set the audio source to

3.

Connect an ac voltmeter also to pin 9 of A25XA5. Adjust the level of the source to 707.1 mVrms

as read by the voltmeter.

4. Connect a high-impedance, dc coupled oscilloscope to A5TP5 (RECT OUT). The waveform should be as in Figure 8F-21.

5. Increase the source frequency to 100 The waveform should appear as in step 4 except for the increase in frequency, and the level of the negative peak should be unchanged.

6. Decrease the source frequency to

7.

Connect a dc voltmeter to A5TP4 (AVG OUT). The voltage should be between

mVdc.

Hint:

If

the reading at low levels, perform the Voltmeter Offset and Sensitivity Adjustment. In normal operation the Average Detector should be accurate to f0.ltesting the detector, the distortion of the source must be less than -70

1

kHz

at 0.7 Vrms. Connect

is

only slightly in error

dB.

1

kHz.

kHz

its

output to pin 9 of A26XA5.

(or

preferably 150

or

if the Average Detector

kHz)

without altering the amplitude.

+700

is

known to be inaccurate

and +714

8F-84 Service Sheet 14

Model

8901B

Service

1

ov

Figure

8F-21.

Waveform

for

(J3)

Step

4

Service Sheet

14

8F-85

Model 8901B Service

ASSEMBLY

0

A5

PRINCIPLES

General

The Voltmeter Assembly contains the Input Selectors and the Voltage-to-Time Converter portion of a digital dc voltmeter. Level measurement mode, and a Parity Check circuit.

Input Selectors

Multiplexers U10, U11, and U12 form a 24 pole, single-throw switch. The individual multiplexers are enabled by a low on the G8 input. The selecting of U11 exclusive-OR gate U14D. U10 or U11 Bus. (Note that d2 issued when the code esd given input line (d3 Instrument Bus codes, see

Voltmeter (Voltmeter

OF

OPERATION

It

also contains a true RMS to DC Converter, which is utilized in the Tuned RF

=

0.

The D2 input

to

select a given input line.

=

1C4

is

=

0

is

not allowed here, for

Instrument

Service

Sheet

15

Circuits)

or

U10 and U12

is

enabled when the code esd

to

U15B

If

d3 = 1, U11

issued. After that, a code of the form esd = 1Fd

Bus

is

low.) After that, a code of the form esd = 1Fd

is

enabled.

it

would

in Service Sheet BD5.

also

=

If

d3

=

0,

enable Ull). On the significance of the

is

via register U15B and

1CO

is issued on the Instrument

U10

is

enabled. U12 is enabled

is

issued

to

select a

is

Voltage-to-Time Converter

The dc voltage at the output of the Input Selectors

to the magnitude of the voltage, by the Voltage-to-Time Converter. The pulse length is then measured by the Counter (see Service Sheet 231, digitally processed by the Controller, and displayed. The converter consists of the Comparator, Ramp Generator, and Voltage Reference.

The Voltage Reference supplies a voltage of known temperature stability

Generator. The basic reference is a temperature-stable reference diode VR4. The reference is fed

is

from current source Q1, which itself reference (VR3) have matching thermal behavior. The negative Voltage Reference supplies current to

(-)

the inverting coefficient C31. The Voltmeter sensitivity

U6 (with C31) integrates the negative input current to produce an increasing voltage ramp. The ramp

is

generated only when Q4

the ramp. When on, Q4 supplies a positive current

current from the reference and turns on CR15. Thus the output of U6

below ground. Since the ramp begins at

a measurement of ground which the Controller subtracts from the voltage measurement. The

is

low because the positive non-inverting input

the Counter. R77 and R79 add a small amount of hysteresis to the Comparator to assure a complete transition

U17 is a unity-gain, non-inverting buffer amplifier, which drives the rear-panel RECORDER OUTPUT connector. This feature permits continuous monitoring of the voltmeter input. (See

finctions

to

ramp

begins when the RAMP GATE(H) line goes high. The output of comparator U5 at this time

of

U5 reaches the voltage at the inverting input, the output goes high to inhibit the clocking of

of

49

input of U6 through R73 and R74.

the current to cancel the effect of the temperature coefficient of integrating capacitor

is

off

(or

zero) voltage

(+)

input. The Counter now begins clocking the duration of the ramp. When the ramp

the output once

and

50,

in paragraph 8-7, for information on the practical uses of this output.)

it

begins to change.

temperature stable because

adjusted by means of R73.

(when the RAMP GATE(H) line is high). The Controller initiates

a

rather imprecise voltage, each voltage measurement includes

at

is

its

inverting

converted

CR13,

to

the inverting input

to

a pulse, with a duration proportional

R69 and R70 add a slight temperature

(-)

input

to

the input

its

base-emitter junction and

of

U6,

is

clamped one PN junction drop

is

higher than the voltage at

to

which overrides the

Service

the Ramp

its

Special

Service Sheet 15 8F-87

Service Model 8901B

Parity Check

The Parity Check circuit allows the Controller

Bus.

To

check parity, the Controller sends out the sixteen codes

code, the output

do + dl

when

codes, see Instrument (see Power-

of

exclusive-OR gate U14C

+

d2

+

d3

Bus

Up

Checks, paragraph

is

even,

or

in Service Sheet BD5.. Parity

8-9).

Digital Circuits

For

a general discussion

of

the readback operation, see Direct Control Special finctions in paragraph

of

instrument control, see Instrument

to

test

the integrity

is

read back by the Controller. The output of U14C

high when it is odd. On the significance

is

checked only during instrument power up

of

the

data

esd

=

1FO

Bus

Service Sheet BD5. For a discussion

lines

of

the Instrument

to

esd

=

1FF.

of

the Instrument Bus

8-7.

For each

is

low

8F-88 Service Sheet 15

Model 8901B

TROUBLESHOOTING

General

Procedures for checking the Voltmeter Assembly are given below. The circuits to check are marked on the schematic diagram by a hexagon with a checkmark and a number inside, In addition, any points outside the labeled circuit area that must be checked are

also

signals are board assembly where necessary

shown on the schematic inside a hexagon, for example,

to

make measurements.

(+I

.9

TO

for

example,

also

identified. Fixed

+2.1

VDC)

Service

@.

.

Extend the

CMOS

Do Discharge

potential. (Use the conductive foam pad provided in the Service

Kit

Equipment

Oscilloscope. Voltmeter.

.....................................................................

Input Selectors Check

1.

Key in 0.1CO

.2.

Key in the Direct Control Special Functions indicated in Table 8F-35.

the dc voltage at A5TP1 be the same to within the repeatability of the voltmeter. pins indicated.

circuits can be damaged

not remove this

the board, replacement device, and soldering iron to the same

HP

08901-60287.)

assembly

by

static charges and circuit transients.

from the instrument while power

is

applied.

Accessory

...................................................................

SPCL

to

enable U10

Tnble

or

U11.

(SW

OUT) to the pin on U11

8F-35.

Levels on

UlO

and

or

U10

If

Ull,

indicated. The

faulty,

also

a

Step

For

each setting, compare

two

check the logic level of the

2

HP 1740A

HP 3455A

voltages should

Hint:

as pin

2

of U11.

10

of U15B should be a TTL

low.

The logic

state

of pin

13

of U14D should be the same

Service Sheet

15

8F-89

Service Model 8901B

Hint:

If

a selector switch of U10, U11,

Try

multiplexer. vary each of the input lines and see in the schematic diagram indicate what each input

the edge connector;

selecting the inputs of U12.)

3. Key in 0.1C4 SPCL to enable U12.

4. Key in the Direct Control Special finctions indicated in Table 8F-36. For each setting, compare the dc voltage at A5TP1 to the pin on U12 indicated. The the repeatability of the voltmeter.

selecting a switch position which gives a non-zero voltage reading at A5TP1 then

if

that input is causing the fault, the fault will go away. (See steps 3 and 4 for

or

U12

is

stuck shut,

if

the measured level follows

is.)

Also try taping over a suspected input on

If

faulty,

also

check the logic level

it

may be difficult to isolate the faulty

it.

(The labels on the input lines

two

voltages should be the same within

of

the pins indicated.

Table

I

Special Function

0.1

F8

0.1

F9

0.1

FA

0.1

FB

0.1

FC

FD

0.1

FE

0.1

FF

Hint:

Pin 10 of U15B should be a TTL high. Pin

(J2)

Voltage-to-Time Converter Check

1.

Measure A5TP2 (REF) with a dc voltmeter. The voltage should be between -6.5 and -5.9 Vdc.

2. Key in

3.

Connect a high-impedance, dc coupled oscilloscope to A5TP3 (RAMP). The waveform should be as in Figure 8F-22.

Hint:

except for a pair of pulses which raise

50.4

SPCL

Pin 2 of U6 should be between ltl0 mV. The base of

to

set the instrument to measure the +15V Supply.

8F-36.

at U12 Pin

I

Levels

4

5

6

7

12 11 10

9

it

on

U12,

a

Step

Level (lTL

1

L

H

L

I

H

11

to

+5V approximately each 20 ms.

16

L

H H

of

U14D should be a TTL low.

4

at U12 Pin

?f=F

y

H

Q4

should be approximately +4V

H

8F-90

4. Connect the oscilloscope to A11TP6 (VM GATE). (AllTP6 waveform should be as in Figure 8F-23.

Hint:

Step 4 assumes that the Input Selectors are able to select the input for the +15V Check.

Service Sheet 15

is

shown on Service Sheet 23.) The

Model

8901B

=5

ms

~5

Service

~

ms

=+5v

z-0.7V-

+

Figure 8F-22.

Waveform for

@

ov

(DELAY TO NEXT PAIR

TRIANGLES

Step

3

=

200

OF

ms)

TTL HIGH

TTL

LOW

Figure 8F-23.

Waveform for

@

Step

ov

(DELAY

OF

PUL

4

TO NEXT PAIR

SES

Z200

ms)

Service

Sheet

15

8F-91

Service Model

(ZJ

Parity Check

1.

Key in the Direct Control Special Functions indicated in Table to enable parity readback. The display should be as indicated. of

the pins indicated.

Table

8F-37.

Levels

on

U14

and

U16,

@

8F-37,

If

faulty,

Step

then key in

also

check the logic level

0.1DO

1

8901B

SPCL

Direct Control

Special Function

0.1

FO

0.1

F1

0.1

F2

0.1

F3

0.1

F4

0.1 F5

0.1

F6

0.1

F7

0.1

F8

0.1

F9

0.1

FA

0.1

FB

0.1

FC

0.1

FD

0.1

FE

0.1

FF

Low-going

(J4)

Select Decoder and Data Latch Check

1.

Key in the Direct Control Special Functions indicated in Table

Display

000000.0000

000001 000001

000000.0000 000001

000000.0000

000000.0000 000001

000001

000000.0000

000001

000000.0000

000001

000000.0000

the pins indicated.

U14A-3

L

.oooo .oooo

.oooo

TTL

pulses, approximately

H

L

L H H

L L

H

L

H H

L

Level

U14B-6

L L L L

H H H H H H H H

L

L L

60

TL) at

U14C-8

~

L

H H

L

H

L

H H

L L

H

L

H

L

ms period.

8F-38.

~-

U16D-11

H

*

H

t

H H

H

*

H

For each setting, check

8F-92

Direct Control

Special Function

0.1

co

0.1

DO

0.1

EO

0.1

FO

2.

Key in the Direct Control Special Functions indicated Table

pins

on

U13

indicated.

Special Function

Service Sheet

15

U18-11 U18-10 U18-9 U18-7 U16B-6 U16C-8

*

H H H H H H

H

Direct Control

0.1

FO

0.1

FF

H H H

H H

2

L

H

Level (TTL) at

Level (TTL) at U13 Pin

3

H

L

**

L

8F-39.

7 10 15

L

H H

For each setting, check the

L

H

L

**

L

>

Model 8901B

Service

ASSEMBLY

0

A52 Audio Counter

PRINCIPLES

General

The Audio Counter and Distortion Analyzer Assembly makes measurements on internal audio signals. The signal comes internally from the Audio De-emphasis and Output Assembly (A3) externally from the MODULATION OUTPUT/AUDIO INPUT connector. The measurements on the signal include ac voltage (true RMS), distortion The measuring circuits include audio amplifiers, an RMS-to-DC converter, a notch filter, an audio counter, and control circuits.

OF

OPERATION

The following discussions require an understanding Instrument ment

and

Bus

readback (see

Service

Sheet

Distortion Analyzer

NOTE

(see

Instrument Bus

Direct Control Special Functions,

(or

16

of

the operation

in Service Sheet

the related measurement SINAD), and frequency.

BD5)

and the Instru-

paragraph

of

8-

the

7).

or

external

or

Internal/External Source Switch and Audio Input Buffer

The four bi-directional switches of U19 determine whether the audio input signal into the Audio Counter and Distortion Analyzer circuits

or

Service Sheet 13) input). When switches U19A, U19B, and U19C are closed and U19D is open, the signal from the Audio De-emphasis and Output Assembly the MODULATION OUTPUT/AUDIO INPUT connector. With the switches of U19 in the opposite configuration, the signal from MODULATION OUTPUT/AUDIO INPUT connector is routed into U3D.

Amplifier U3D buffers the audio input amplifier. Diodes VR1 and VR2 offer some degree of input-overload protection. The output of U3D goes to the RMS-to-DC Converter (via Amplifier l), the Notch Filter, and the Audio Counter (via Schmitt Trigger U3A and U13B).

Amplifier

Amplifier 1 has output of the Notch Filter via Amplifier non-inverting, unity-gain input stage of Amplifier

U4B is configured as a non-inverting amplifier with a gain of 10

0

is

sensitivity

1

or

20

dB

attenuator. The overall gain of Amplifier

the input to the RMS-to-DC Converter (Ul). The input

of

the RMS-to-DC Converter is set by R38 (RMS SENS) at the output of U4B.

from the MODULATION OUTPUT/AUDIO INPUT connector (used as an

two

switched inputs: one from the Audio Input Buffer (U3D) and one from the

is

from the Audio De-emphasis and Output Assembly (see

is

routed into the Audio Input Buffer (U3D) and out

signal.

2.

The amplifier

U2A and U2B are the respective input switches. U4A is a

1.

1

is

an ac coupled, inverting, unity-gain

(20

dB).

At

thus

0

or

20

dB.

The output of Amplifier

is

limited to approximately 4

its

input is a switched

Vrms.

to

1

The

Service Sheet 16 8F-93

Service Model 8901B

RMS-to-DC Converter

The RMS-to-DC Converter converts the ac inputs signal into a dc voltage equal to the the input. The conversion is accomplished by U1. U1 converts the ac signal

rms

method called implicit conversion. The implicit equation for

square of input voltage

Vrms

Note that

V,,,

=

avg of

V,,,

appears on both sides of the equation.

value

is

to

its

rms

level of

dc equivalent by a

The Absolute Value Detector of U1 converts the input to a full-wave rectified current. The rectified current from the Current Mirror (a device that produces The current into the Current Mirror is filtered (that is, averaged) by C34. The current

is

squared and then divided by the current at the Squarer/Divider’s other input which comes

two

output currents equal to the input current).

I

from the

SquarerDivider is

square of current from Absolute Value Detector

I=

square

I=

IOUT

from the Current Mirror also equals the average value of

current from Current Mirror

of

current from Absolute Value Detector

avg of

IOUT

=

avg of

I

I,

?

so

square

square of current from Absolute Value Detector

This

IOUT

=

avg of

IOUT

=

avg of

is

the implicit definition of the rms value of the input current.

produces a voltage which is buffered. R38

rms

value of the voltage at the input

OV

Converter to

when there

is

of

current from Absolute Value Detector

(RMS

of

U3D. R47 (RMS

no input signal.

avg of

IOUT

SENS)

I

>

IOUT

flows through UlRL and

adjusts this buffered voltage equal to the

OFS)

adjusts the output of the RMS-to-DC

Ripple Filter

The dc output of the RMS-to-DC Converter is low-pass filtered, to remove ripple and noise, before being read by the Voltmeter. This smooths the displayed readings for audio distortion or SINAD. The Ripple Filter, consisting of U17A and associated components, generates a complex impedance across the line from the RMS-to-DC Converter and gives three poles

of

rolloff. The output is buffered by

U17B.

Notch Filter

The Notch Filter has three active stages with stage itself has

a

notch-filter frequency response. Jumpers

stages individually. The composite notch filter must have

43%.

nominal center frequency

1000

Hz

by switches U5A, U5B, U5C, U5D, U6C, and U6D. The switches are closed when the notch

400

center frequency is

Hz.

The center frequency of the notch can be switched

two

poles and

two

zeros generated by each stage. Each

W1

and

W2

permit testing of the notch

a

notch depth of at least

50

to

either

dB

over its

400

or

8F-94

Service Sheet

16

Model 8901B Service

Amplifier

Amplifier amplifies the output from the Notch Filter. R44 (NOTCH FLTR GAIN) stopband gain errors in the Notch Filter.

2

is a 0

or

20

dB,

switched attenuator followed by a 20

dF3

amplifier (U4D). Amplifier

is

adjusted

to

Schmitt Trigger and Audio Counter

The audio signal Schmitt Trigger the trigger reference voltage.

The output of U13B goes to three places: through UlOC and on to an input of the input selector of the Counter (All), through U9B and U9A and on

U12B to initiate the count after the flip-flop has been armed. (The output used in normal instrument operation but the function Trigger. See

The count sequence is as follows: When the frequency of the audio signal Controller resets all counter stages by placing a low on RDY(H)-and thus a high on RDY(L)-and then releasing not actually begin at this time.

To initiate the count, the Controller sets GET SET(H) high and thus The first low-to-high transition from the Schmitt Trigger clocks the high at the D1 input of U12B its output which enables U9B to pass the audio signal count, PLS LSB (pulse least-significant byte), PLS MSB (pulse most-significant byte), and CARRY ON(L) are all low. The transition of the output of U12B also sets STOP COUNT(H) low which enables

the 10 MHz Selected Time Base Reference Oscillator

Sheet 23).

During the count, the Controller continues to participate by counting the overflows of U16B gate UlOD, which has been enabled by overflows from the Counter

To terminate the count, the Controller puts a low on GET SET(H). On the next low-to-high transition from the Schmitt Trigger, the output of U12B changes state which inhibits the count Counter via U9B and stops the count of the Time Base Reference via U13A. If no transition of the

Schmitt Trigger occurs, the Controller stops the the count by setting RDY(H) low to reset U12B and

abort the count. To read the count accumulated in counter U16, the Controller sets CARRY ON(L) high. This enables

U9D regardless of the state of the the PLS MSB line while via UlOD which has been enabled (READBACK When the transition occurs, the Controller, which has kept track of the pulses ceases pulsing PLS MSB.

The Controller next sends 255 pulses on the PLS MSB line to fill counter U16 (which

to

its

maximum count then sets PLS MSB low. The count accumulated in U8 can now be read back. The Controller rapidly pulses the PLS LSB line while as before. When the transition occurs, the Controller, which has again kept track of the pulses, ceases pulsing PLS

The Controller now processes the count information (including the count counter) and displays the audio frequency. The information included in the frequency calculation

includes the accumulated count in U8 and U16, the number of carries from U16B during the count

sequence, the number of

base (10 MHz).

to

be counted

is

provided by positive-feedback resistors R59 and R60 which cause the output to set

Service

Special

it.

Counters U8 and U16 are thus reset and readied to count, although the count does

is

conditioned by Schmitt Trigger U13A and U13B. Hysteresis in the

to

the first stage (U8A) of the Audio Counter, and to

is

useful for checking operation of the Schmitt

finction

(All).)

it

looks for a high-to-low transition from the

46.B,

paragraph 8-7.)

to

the counter stages (U8 and Ul6). During the

to

be counted by the Counter

a

high on the READBACK line. (The Controller also counts

After 100 ms, the Controller terminates the count.

FF(8)

output

of

counter U8B. The Controller then rapidly pulses

is

high). The readback line

it

looks for a high-to-low transition from U16B

to

the Counter (All)

puts

a high on input

FF(8)

to

it

is

to be measured, the

D1

(All,

to

output of counter U16B

the Controller

sent out, momentarily

was

LSB.

it

reads back from the main

10

MHz pulses counted by the main counter, and the frequency of the time

see Service

at count

correct for

is

not

of U12B.

into

via

NAND

the Audio

is

dO(L).

0)

2

Select Decoder and

See the general discussion under

Data

Latches

Instrument

Bus

in

Service Sheet

BD5.

Service Sheet

16

8F-95

Service Model 8901B

TROUBLESHOOTING

General

Procedures for checking the Audio CounterIDistortion Analyzer Assembly are given below. The circuits to check are marked on the schematic diagram by a hexagon with a check mark and for example,

(+1.9 TO

f2.1

@

.

Fixed signals are also shown on the schematic inside a hexagon,

VDC)

.

Extend the board assembly where necessary

to

make measurements.

a

number inside,

for

example,

Tighten tors

reduced performance

SMC

connectors to

is

insufficient. Hand-tightened connectors can

or

Equipment

Audio Source Oscilloscope.

a

Internal/External Source Switch Check

1.

Set the audio source

2.

Connect a high-impedance, ac coupled oscilloscope to pin 3 of U18 should show the 1 kHz sinusoidal waveform with an amplitude between 2.7

3. Adjust the audio source level

4.

Key in the Direct Control Special finctions indicated in Table 8F-40.

the oscilloscope as shown. The waveform should be within the limits indicated. If faulty, also

check the logic level at the pins indicated.

..................................................................

...................................................................

to 1 kHz at 1 Vrms. Connect its output

for

0.6

N.

m (5 in.

malfunctions.

an amplitude of 3 Vpp

lb).

Hand tightening

work

to

A52J1 (AUDIO IN).

(or

as

observed on the oscilloscope.

of

connec-

loose and cause

to A52J1). The oscilloscope

and

For

each setting, connect

HP 3336C HP 1740A

2.9 Vpp

5.

Connect the audio source to A5252 (AUDIO OUT) and repeat step 4 using Table 8F-41.

8F-96 Service Sheet 16

lbble

Direct Control Waveform Amplitude (Vpp)

Special Function

Direct Control Waveform Amplitude (Vpp)

Special Function

8F-40.

0.280 2.9

0.281 ~0.03

nble

0.2BO ~0.03

0.281 2.9

Levels on A52TP4 and A52J2, Step

at A52TP4 and A52J2

to

3.1

8F-41.

Levels on A52TP4,

at A52TP4 and A52J2

to

3.1

4

Level

WL)

at U19 Pin

1,8,

and 9 16

L

H

a

Step 5

Level (TTL) at U19 Pin

1,8,

and 9 16

L

H

L

H

L

Model 8901B Service

(J2)

Notch Filter Check

1.

Set the audio source to

1

kHz

at 1 Vrms. Connect

its

output

to

A52J1 (AUDIO

IN).

2. Connect a high-impedance, ac coupled oscilloscope to A52TP4 (BUF OUT).

3.

Key in 0.2BO SPCL to route the signal to A54TP4. The oscilloscope should show the 1 kHz waveform with an amplitude between

Hint:

If the waveform

is

faulty, see

2.7

and 2.9 Vpp.

a

Internal/External Source Switch Check.

4. Adjust the audio source level for

5.

Key in 0.2A4 SPCL

to

switch in the 1 kHz notch filter. Connect the oscilloscope

an

amplitude of 3 Vpp as observed on the oscilloscope.

as

shown

in

Table 8F-42. The amplitude should be as indicated. In addition, for each display, momentarily

1.1

increase the frequency of the signal to

Hint:

Pins

Table

1,

8,9, and 16 of U5 and pins 9 and 16 of U6 should be TTL high.

8F-42.

I

Pin to Check I AmDlitude Limits (mVDD)

U3C

U3B

U4C

Levels on

8

7

8

kHz. In each case the signal level should increase.

U3

and

U4,

@)

Step

5

I

<300

<30

<10

I

6. Key in 0.2AC SPCL to switch in the 400 Hz notch filter. Set the frequency of the audio source

to

400

Hz.

Repeat step 5 using Table 8F-43 and increasing the frequency

able

8F-43.

I

Pin to Check 1 AmDlitude Limits (mvDD)

U3C U3B U4C

Levels on

8

7

8

U3

and

<300

<30

<10

U4,

@

Step

1

to

440

Hz.

6

Hint:

Pins 1, 8,9, and 16 of U5 and pins 9 and 16 of U6 should be TTL low.

7.

Increase the audio source frequency slowly until the amplitude observed on the oscilloscope at

8

of U4C

8.

Connect the oscilloscope to A52TP3 (NOTCH FLTR OUT). The amplitude should be between

is

100 mVpp.

3.3 and 4.6 Vpp.

Hint:

The gain of Amplifier 2 has a wide range of adjustment. The adjustment potentiometer (R44)

If

will normally be near its center. problem, perform

Hint:

Pin 16 of U2D should be a TTL low. Pin 9 of U2C should be a TTL high.

9. Key in 0.2A8 SPCL noted in step

Hint:

Pin 16

10.

Key in 0.2A9 SPCL to switch the notch input into Amplifier

Adjustment

to

set Amplifier 2 to low gain. The amplitude should be be 0.1 times the level

8.

of

U2D should be a TTL high. Pin 9 of U2C should be a TTL low.

3 of U4A. The amplitude should be the same

Hint;

8

of

U2B

should be a TTL low. Pin 1 of U2A should be a TTL high.

adjustment is needed

21

-Audio True

RMS

as

in step 9.

to

correct a small distortion accuracy

Detector and Notch Filter Gain

1.

Connect the oscilloscope

in Section

Service Sheet 16 8F-97

to

5.

Service Model 8901B

(J3)

Amplifier

1.

Set the audio source to 1 kHz

1,

RMS-to-DC Converter, and Ripple Filter Check

at 100 Vrms. Connect

its

output

to

A52J1 (AUDIO

IN).

2. Connect a high-impedance7 ac coupled oscilloscope to A52TP4

3. Key in 0.2BO SPCL to route the signal to A54TP4. The oscilloscope should show the waveform with an amplitude between 270 and 290 mVpp.

is

Hint: If the waveform

4. Adjust the audio source level for an amplitude of 300 mVpp

5.

Key in 0.2AO SPCL to switch the signal the oscilloscope between 290 and 310 mVpp.

Hint: Pin 1 of U2A should be a TTL low. Pin 8 of U2B should be a TTL high.

6. Connect the oscilloscope to A52TP2 (AMPL 1 OUT). The amplitude should be between 290 and 310 mVpp.

Hint: Pin

7.

Key in 0.2A2 SPCL and

3.1

Vpp.

Hint: Pin

8. DC couple the oscilloscope and connect

1.2

Vdc and should contain no ripple.

Hint: If the level and Notch Filter Gain in Section

to

1

of U6A should be a TTL high. Pin 8 of U6B should be a TTL low.

1

of U6A should be a TTL low. Pin 8 of U6B should be a TTL high.

is

faulty, see

pin 1 of U4A. The signal displayed on the oscilloscope should have an amplitude

to

set

the gain of Amplifier 1 to 10. The amplitude should be between 2.9

only slightly out of limits, perform Adjustment

5.

@J

Internal/External Source Switch Check.

into

Amplifier 1 and

it

to pin 6 of U1. The voltage should be between 1.0 and

(BUF

OUT).

as

observed on the oscilloscope.

to

set

it

to

minimum gain. Connect

21

-Audio Due

RMS

1

kHz

Detector

9.

Connect the oscilloscope to A52TP1 (RMS OUT). The voltage should be between 1.0 and

10. Change the source frequency to 20 The ac ripple should be between 20 and

@

Audio Counter Check

1.

Set the audio source to

2.

Connect a high-impedance, ac coupled oscilloscope to A52TP4 (BUF OUT).

3. Key in 0.2BO SPCL waveform with an amplitude between

Hint:

If

the waveform is faulty, see

4. DC couple the oscilloscope and connect oscilloscope should be a TTL squarewave.

Hint: The signal at pin and 700 mVpp.

5.

Follow the instructions in the steps below and observe the results listed are TTL.)

a. Key in 0.296 SPCL and 0.282 SPCL to reset the counter.

b. Key in 0.28A SPCL to release the counter reset.

c. Remove (momentarily) the signal from A52J1. Key in 0.28E SPCL

to

1.2

Hz

without changing the level. AC couple the oscilloscope.

100

mVpp.

100

kHz

at 20 Vrms. Connect

route the signal to A54TP4. The oscilloscope should show the 100

55

and 58 mVpp.

@J

Internal/External Source Switch Check.

it

to pin 6 of U13B. The 100

1

of U3A should be a rounded squarewave with

its

output to A52J1 (AUDIO IN).

kHz

signal displayed on the

an

amplitude between

listed

in Table 8F-44. (All levels

to

ready the counter.

Vdc.

kHz

500

d.

Reconnect the signal to A52J1 to initiate the count.

e. Remove (momentarily) the signal from A52J1. Key in 0.28A SPCL to ready the count stop.

8F-98 Service Sheet 16

Model 8901B Service

f,

Reconnect the signal to A52J1 to initiate the count stop.

to

g. Key in 0.288 SPCL

enable pulsing

of

counter U16.

h. Key in 0.292 SPCL

i.

Key in 0.28C SPCL and 0.294 SPCL to disable U9A and pulse

lbble

-

Step

a

b

C

d

e

f

9

h

i

-

*

Indicates a squarewave sigr

U8

and

3)

should

divided

-

Indicates a don’t care situation. (It may be state of

-

2

3

-

H

L

H

L

H

L

H

L

H

L

H

L

H H

L

H

L

-

U16.

The output of

be

50

by

65536).

the

counter at the moment

to

disable U9D.

8F-44.

U11 Pin

-

5

10

-

L

H

L

H

L

H

-

kHz;

etc.; the output of

Levels

-

14

-

L L

L

H

L

-

.

The

U9A

(pin

on

Various

U12 Pin

-

6

-

L

L L

L

H

-

frequency

1)

should

FF(8)

the

count was stopped.

-

8

-

H

L L

H

L

-

either

-

is=

be

of

ICs

4

L

L L

*

U16B

100

high

on

U9 Pin

-

1

-

H

L

-

cHz

kHz;

(pin

or

A52,

it

(to verify that it

@

Step

-

10

13

-

H

L

H

L

H

t

H

L

H

L

-

7

)y

2

FF(1)

for

output of

{ides

the

8)

should be

low.) The logic

is

5

U8 and U16 Pins

3,

4,

5,

6, 8,

9,10, and 11

L

each counter

1.5

Hz

(100

level

will

U8A

be

in

(pin

kHz

the

disabled).

6. Key in 0.314 SPCL to inhibit the ramp gate (see Service Sheet 23). Key in 0.280 SPCL to input

1

of

a high into U13A. Pin

Hint:

The Stop Count line (pin 1 of

U13A should be a TTL high.

U13A)

is

shared by the Comparator

of

the Voltmeter (see

Service Sheet 15).

7.

Key in 0.282 SPCL

8.

Connect the oscilloscope to pin

to

input a low into U13A. Pin 1 of U13A should be a TTL low.

11

of

UlOD. Key in 0.28E SPCL and 0.296 SPCL to initiate the count and enable readback of the audio count. The waveform should alternate sporadically between a TTL high and a TTL low. (The waveform output approximately 60

of

U16B. ,The Audio Count should be narrow, high-going TTL pulses with a period

ms.)

is

the Audio Count

as

gated by the

FF(8)

of

Service Sheet 16 8F-99

Service Model

(J5)

Select Decoder and Data Latches Check

NOTE

U11

is

checked

1.

Key in the Direct Control Special Functions indicated in Table 8F-45. For each setting, check

by

the

(J4)

Audio Counter Check.

the pins on U7 indicated.

8901B

2.

Key

Table

I

Direct Control

Special Function

in

the Direct Control Special Functions indicated

8F-45.

0.280

*

Low-going

Levels

TTL

on

Level (TTL) at

pulses,

the pins on U14 indicated.

3

L

Level (TTL) at

7

L

H

Direct Control

Special Function

0.2AO

0.2AF

3.

Key in the Direct Control Special Functions indicated

2

L

H

the pins on U15 indicated.

U7,

14

x60

(J5)

Step

1

U7

I

13

I

12

HI'

ms

period.

in

Table

8F-46.

U14

6

H

L

10

L

H

in

Table 8F-47. For each setting, check

For

each setting, check

11

H H

L

>

14

L

Table

8F-47.

Direct Control

Special Function

0.280

0.281

Levels

Level (TTL) at

on

H

U15,

(J5)

Step

U15

L

3

8F-100 Service Sheet

16

Model 8901B

Service

ASSEMBLY

0

A19 LO

PRINCIPLES

General

The

LO

to

the appropriate range required to down-convert an RF input signal to the

consist of one frequency doubler, one through path, and eight binary dividers (that is, divide-by-twos)

for

a total of ten ranges. The first

provide a 40 to 81.25 MHz signal

Input Buffer

U2

is

dividers and Frequency Doubler. The non-inverted output drives the first divider (U8). When in Band

0,

the inverted output (the DIV 0 line) drives the

The inverted output also drives the Frequency Doubler through the Doubler Input Filter.

Service

Sheet

17

Divider

OF

OPERATION

Divider Assembly converts the nominal 320 to 650 MHz signal from the High Frequency VCO

IF

frequency. The circuits

two

dividers and a separate third divider are always enabled to

for

the Counter. Figure 8F-24 shows the divider scheme.

and

Doubler Circuits

a non-saturating, high-frequency limiter which interfaces the High-Frequency VCO with the

LO

output connector (53) via U10, U5, and CR9.

The Doubler Input Filter

harmonics of the High Frequency VCO input to maximize the signal output and minimize subharmonics which could cause spurious IF responses. The filter driven by the same voltage that tunes the High Frequency is filtered by R1 and C1, attenuated by R1, R20, R22, and R23, then offset and buffered by U3.

The Requency Doubler (U4) two out-of-phase signals in

(U4Q1 and Q2). The two differential output amplifiers (U4Q3 and Q4) conduct current flowing only in one direction; their outputs are wired-OR and produce

R41 can be adjusted to improve the balance (that is, minimize the fundamental and odd-harmonic feed-through) and minimize the possibility of the

IF

response.

an The Doubler Output Gate and High-Pass Filter aids in further eliminating the

doubled signal. PIN diodes CR7, CR8, and CR9 switch the signal either from the doubler

LO

to the

output connector. For the Band Doubler, CR7 and CR8 are on and CR9 is

is

a five-pole, tuneable, low-pass filter which removes the odd-ordered

is

tuned by varactor diodes CR2 to CR5 which are

VCO

(see Service Sheet

is

an active, full-wave rectifier. The input transformer (U4T1) produces

its

secondary windings which drive the

a

train

1/~

and

3/2

two

inputs of differential amplifier

of

negative, full-wave rectified pulses.

harmonics

of

18).

The tune voltage

the doubled

1/2

harmonic of the

signal

or

off.

Divider Circuits

The first two dividers (U8 and U7) are EECL devices; all others are ECL. Signal routing is done via gates, switchable limiters (for example, U10 and Ull), and PIN diodes. Except for Bands Doubler

0,

and

1,

(Dblr), would be generated by leaving all dividers on. In the case of Band 2, U1A only apparent in Figure 8F-24. Figure 8F-24 does show that on Band

taken from Divider

setting

and CR9.

it).

the divider following the output divider

5,

U6B), U8,

The output of U6B is routed to the

U7,

UlA, U6A, and U6B are all enabled and U12A is disabled (by

LO

is

turned off to eliminate subharmonics which

is

disabled. This is not

5,

for example (where the output

output connector via U13A, U14B, U9B, U11, U5,

causing

the dividers

is

Service Sheet

17

8F-101

Service

Model 8901B

HF

vco

IN

I

U68

7-

OIV

2

5

DOUBLER

INPUT

FILTER

0

U13A

U14B

x2

u4

J

DOUBLER

FILTER

TUNE VOLTAGE

U9A

DOUBLER

~

FILTER

HP

OIV 7

Divider and Gate

UlZB

OIV

U17B U13C

Figure

Decoders

U130

8

8F-24.

Band enabling and signal routing

UlS). The decoder simply demultiplexes the

LO

latched by the

decoding

by

discussion

for

the Gate-Enable Decoders and Divider Output and Doubler Gate Drive circuits.

of

Control circuitry (see Service Sheet 21). The d is unique

the added switching complexity that arises on the higher-frequency bands

instrument control, see

LO

Divider Scheme

is

controlled

Instrument

by

esd

(Shown

the

Divider-Disable/Gate-Enable

=

OOd

Bus

in Service Sheet BD5.

for

Band

code generated

5)

by

the Instrument Bus and

for

each band. F'urther

Decoder

is

accomplished

For

(U15

and

a general

8F-102

Service Sheet

17

Model 8901B Service

TROUBLESHOOTING

General

Procedures for checking the on the schematic diagram by a hexagon with a check mark and a number inside, In addition, any points outside the labeled circuit area that must be checked are signals are also shown on the schematic inside a hexagon, for example,

board assembly where necessary to make measurements.

Tighten tors

reduced performance

SMC

is

insufficient. Hand-tightened connectors can work loose and cause

LO

Divider Assembly are given below. The circuits to check are marked

connectors

to

0.6

N.

or

malfunctions.

m

(5

in.

lb). Hand tightening of connec-

Equipment

Oscilloscope

Signal Generator.. Spectrum Analyzer Test Probe Voltmeter

LO

Divider and Control Check

1.

Set the signal generator to 512

......................................................................

........................................................

..........................................................

..................................................................

........................................................................

MHz

CW at

0

dBm.

Connect

its

RF output to A19J2

(+I

.9

for

also

TO

+2.1

VDC)

HP 8640B Opt

example,

identified. Fixed

.

HP 8559A/182T

HP

(HF

@)

Extend the

HP 1740A

002

1250-15988

HP

3455A

VCO IN).

.

2.

Set the signal generator’s counter

3.

Key in the Direct Control Special Functions indicated in Table 8F-48. For each setting, check the

LO

frequency on the signal generator’s counter. If a fault

lines indicated in the table. (All logic levels are

Hint:

If

only one of the bands 1 through 8 has a failure, check the last divider

that separate outputs drive the output gates and the next divider.

Table

8F-48.

to

external. Connect

LO

R-equency,

ECL.)

(r/l)

Step

its

counter input to A19J3

is

detected, also check the logic control

3

(1

of

2)

(LO

of

that band noting

OUT).

Service Sheet 17

8F-103

Agilent 8901B Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual