AGERE BRT1A16P, BRT1A16NB, BRT1A16G, BRT1A16E, BRR1A16P Datasheet

Data Sheet

April 2001

Quad Differential Receivers

BRF1A, BRF2A, BRS2B, BRR1A, and BRT1A

Features

■Pin equivalent to the general-trade 26LS32 device, with improved speed, reduced power consumption, and significantly lower levels of EMI

■High input impedance approximately 8 kΩ

■Four line receivers per package

■400 Mbits/s maximum data rate when used with Agere Systems Inc. data transmission drivers

■Meets enhanced small device interface (ESDI) standards

■4.0 ns maximum propagation delay

■<0.20 V input sensitivity

■−1.2 V to +7.2 V common-mode range

■−40 °C to +125 °C ambient operating temperature range (wider than the 41 Series)

■Single 5.0 V ± 10% supply

■Output defaults to logic 1 when inputs are left open*

■Available in four package types

■Lower power requirement than the 41 Series

Description

These quad differential receivers accept digital data over balanced transmission lines. They translate differential input logic levels to TTL output logic levels. All devices in this family have four receivers with a common enable control. These receivers are pin equivalent to the general-trade 26LS32, but offer increased speed and decreased power consumption. They replace the Agere 41 Series receivers.

* This feature is available on BRF1A and BRF2A.

The BRF1A device is the generic receiver in this family and requires the user to supply external resistors on the circuit board for impedance matching.

The BRF2A is identical to the BRF1A, but has an electrostatic discharge (ESD) protection circuit added to significantly improve the ESD human-body model (HBM) characteristics on the differential input terminals.

The BRS2B is identical to the BRF2A, but has a preferred state feature that places the output in the high state when the inputs are open, shorted to ground, or shorted to the power supply.

The BRR1A is equivalent to the BRF1A, but has a 110 Ω resistor connected across the differential inputs. This eliminates the need for an external resistor when terminating a 100 Ω impedance line. This device is designed to work with the DP1A or PNPA in point-to-point applications.

The BRT1A is equivalent to the BRF1A; however, it is provided with a Y-type resistor network across the differential inputs and terminated to ground. The Y-type termination provides the best EMI results. This device is not recommended for applications where the differences in ground voltage between the driver and the receiver exceed 1 V. This device is designed to work with the DG1A or PNGA in point-to- point applications.

The powerdown loading characteristics of the receiver input circuit are approximately 8 kΩ relative to the power supplies; hence, they will not load the transmission line when the circuit is powered down. For those circuits with termination resistors, the line will remain impedance matched when the circuit is powered down.

The packaging options that are available for these quad differential line drivers include a 16-pin DIP; a 16-pin, J-lead SOJ; a 16-pin, gull-wing small-outline integrated circuit (SOIC); and a 16-pin, narrow-body, gull-wing SOIC.

Quad Differential Receivers	Data Sheet
BRF1A, BRF2A, BRS2B, BRR1A, and BRT1A	April 2001

Pin Information

AI	1			16	VCC
AI	2	A		15	DI
AO	3		D	14	DI
E1	4			13	DO
BO	5			12	E2
BI	6	B		11	CO
BI	7		C	10	CI
GND	8			9	CI
			BRF1A
			BRF2A
			BRS2B

AI	1			16	VCC
AI	2	A		15	DI
AO	3		D	14	DI
E1	4			13	DO
BO	5			12	E2
BI	6	B		11	CO
BI	7		C	10	CI
GND	8			9	CI
			BRR1A

AI	1		16	VCC
AI	2	A	15	DI
AO	3	D	14	DI
E1	4		13	DO
BO	5		12	E2
BI	6	B	11	CO
BI	7	C	10	CI
GND	8		9	CI
		BRT1A
			12-2281.a(F)

Figure 1. Quad Differential Receiver Logic Diagrams

Table 1. Enable Truth Table

E1	E2	Condition
0	0	Active
1	0	Active
0	1	Disabled
1	1	Active

Absolute Maximum Ratings

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.

Parameter	Symbol	Min	Max	Unit
Power Supply Voltage	VCC	—	6.5	V
Ambient Operating Temperature	TA	-40	125	°C
Storage Temperature	Tstg	-40	150	°C

Electrical Characteristics

For electrical characteristics over the temperature range, see Figure 7 through Figure 10.

Table 2. Power Supply Current Characteristics

See Figure 7 for variation in ICC over the temperature range. TA = –40 °C to +125 °C, V CC = 5 V ± 0.5 V.

Parameter	Symbol	Min	Typ	Max	Unit
Power Supply Current (VCC = 5.5 V):		¾
All Outputs Disabled	ICC		30	45	mA
All Outputs Enabled	ICC	¾	20	32	mA

2	Agere Systems Inc.

Data Sheet	Quad Differential Receivers
April 2001	BRF1A, BRF2A, BRS2B, BRR1A, and BRT1A

Electrical Characteristics (continued)

Table 3. Voltage and Current Characteristics

For variation in minimum VOH and maximum VOL over the temperature range, see Figure 8. TA = –40 °C to +125 °C.

Parameter			Sym	Min	Typ	Max	Unit
Output Voltages, VCC = 4.5 V:
Low, IOL = 8.0 mA			VOL	—	—	0.5	V
High, IOH = -400 µA			VOH	2.4	—	—	V
Enable Input Voltages:
Low, VCC = 5.5 V			VIL1	—	—	0.7	V
High, VCC = 5.5 V			VIH1	2.0	—	—	V
Clamp, VCC = 4.5 V, II = –5.0 mA			VIK	—	—	–1.0	V
Differential Input Voltages, VIH – VIL:2
-0.80 V < VIH < 7.2 V, -1.2 V < VIL < 6.8 V			VTH1	—	0.1	0.20	V
Input Offset Voltage			VOFF	¾	0.02	0.05	V
Input Offset Voltage BRS2B			VOFF	¾	0.1	0.15	V
Output Currents, VCC = 5.5 V:
Off-state (high Z), VO = 0.4 V			IOZL	—	—	–20	µA
Off-state (high Z), VO = 2.4 V			IOZH	—	—	20	µA
Short Circuit			IOS3	–25	—	–100	mA
Enable Currents, VCC = 5.5 V:
Low, VIN = 0.4 V			IIL	—	—	–400	µA
High, VIN = 2.7 V			IIH	—	—	20	µA
Reverse, VIN = 5.5 V			IIH	—	—	100	µA
Differential Input Currents, VCC = 5.5 V:
Low, VIN = –1.2 V			IIL	—	—	-1.0	mA
High, VIN = 7.2 V			IIH	—	—	1.0	mA
Differential Input Impedance (BRR1A):
							W
Connected Between RI and	RI		RO	—	110	—
Differential Input Impedance (BRT1A)4			R1	—	60	—	W
			R2	—	90	—	W

1.The input levels and difference voltage provide zero noise immunity and should be tested only in a static, noise-free environment.

2.Outputs of unused receivers assume a logic 1 level when the inputs are left open. (It is recommended that all unused positive inputs be tied to the positive power supply. No external series resistor is required.)

3.Test must be performed one lead at a time to prevent damage to the device.

4.See Figure 2.

R1 R1

RI RI

R2

12-2819.a(F)

Figure 2. BRT1A Terminating Resistor Configuration

Agere Systems Inc.

3

Quad Differential Receivers	Data Sheet
BRF1A, BRF2A, BRS2B, BRR1A, and BRT1A	April 2001

Timing Characteristics

Table 4. Timing Characteristics (See Figure 4 and Figure 5.)

For propagation delays (tPLH and tPHL) over the temperature range, see Figure 9 and Figure 10. Propagation delay test circuit connected to output is shown in Figure 6.

TA = –40 °C to +125 °C, V CC = 5 V ± 0.5 V.

Parameter	Symbol	Min	Typ	Max	Unit
Propagation Delay:
Input to Output High	tPLH	1.5	2.5	4.0	ns
Input to Output Low	tPHL	1.5	2.5	4.0	ns
Disable Time, CL = 5 pF:
High-to-high Impedance	tPHZ	—	5	12	ns
Low-to-high Impedance	tPLZ	—	5	12	ns
Pulse Width Distortion, ltpHL − tpLHI:
Load Capacitance (CL) = 15 pF	tskew1	—	—	0.7	ns
Load Capacitance (CL) = 150 pF	tskew1	—	—	4.0	ns
Output Waveform Skews:
Part-to-Part Skew, TA = 75 °C	tskew1p-p	—	0.8	1.4	ns
Part-to-Part Skew, TA = –40 °C to +125 °C	tskew1p-p	—	—	1.5	ns
Same Part Skew	tskew	—	—	0.3	ns
Enable Time:
High Impedance to High	tPZH	—	8	12	ns
High Impedance to Low	tPZL	—	8	12	ns
Rise Time (20%—80%)	t tLH	—	—	3.0	ns
Fall Time (80%—20%)	t tHL	—	—	3.0	ns

	(ns)	7
	tP
	DELAY,	6
		5
	PROPAGATION	4		tPLH (TYP)
		3
		2
	EXTRINSIC						tPHL (TYP)
		1
		0
		0	25	50	75	100	125	150	175	200

LOAD CAPACITANCE, CL (pF)

12-3462(F)

Note: This graph is included as an aid to the system designers. Total circuit delay varies with load capacitance. The total delay is the sum of the delay due to the external capacitance and the intrinsic delay of the device.

Figure 3. Typical Extrinsic Propagation Delay vs. Load Capacitance at 25 °C

4	Agere Systems Inc.