ADLINK PXIe-3985 User Manual

PXIe-3985

PXI Express Embedded

Controller

User’s Manual

Manual Rev.: 2.00

Revision Date: Feb. 4, 2015

Part No: 50-17048-1000

Advance Technologies; Automate the World.

Revision History

Revision Release Date Description of Change(s)

2.00 2015/2/4 Initial Release

ii

PXIe-3985

Preface

Copyright 2015 ADLINK TECHNOLOGY, INC.

This document contains proprietary information protected by copy­right. All rights are reserved. No part of this manual may be repro­duced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.

Disclaimer

The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect,
special, incidental, or consequential damages arising out of the
use or inability to use the product or documentation, even if
advised of the possibility of such damages.

Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global
environmental preservation through compliance with the Euro­pean Union's Restriction of Hazardous Substances (RoHS) direc­tive and Waste Electrical and Electronic Equipment (WEEE)
directive. Environmental protection is a top priority for ADLINK.
We have enforced measures to ensure that our products, manu­facturing processes, components, and raw materials have as little
impact on the environment as possible. When products are at their
end of life, our customers are encouraged to dispose of them in
accordance with the product disposal and/or recovery programs
prescribed by their nation or company.

Trademarks

PC, PS/2, and VGA are registered trademarks of International
Business Machines Corp. Borland®, Borland® C, C++ Builder®,
and Delphi® are registered trademarks of the Borland Software
Corporation. LabVIEW™ is a trademark of National Instruments
Corporation. Microsoft®, Visual Basic®, Visual C++®, Windows

Preface iii

®

98, Windows® NT, Windows® 2000, Windows® XP, and
Windows® Vista® are registered trademarks of Microsoft
Corporation. PCI™, is a registered trademark of the Peripheral
Component Interconnect Special Interest Group (PCI-SIG).

Product names mentioned herein are used for identification pur­poses only and may be trademarks and/or registered trademarks
of their respective companies.

Conventions

Take note of the following conventions used throughout this
manual to make sure that users perform certain tasks and
instructions properly.

Additional information, aids, and tips that help users per­form tasks.

NOTE:

NOTE:

Information to prevent minor physical injury, component
damage, data loss, and/or program corruption when try-

CAUTION:

ing to complete a task.

®

Information to prevent serious physical injury, compo­nent damage, data loss, and/or program corruption

WARNING:

iv Preface

when trying to complete a specific task.

PXIe-3985

Table of Contents

Revision History...................................................................... ii

Preface .................................................................................... iii

List of Figures ........................................................................ ix

List of Tables.......................................................................... xi

1 Introduction ........................................................................ 1

1.1 Features............................................................................... 2

1.2 Specifications....................................................................... 3

1.3 I/O and Indicators ................................................................ 7

1.3.1 Front Panel ................................................................. 7

1.3.2 GPIB Connector ....................................................... 10

1.3.3 Reset Button............................................................. 11

1.3.4 LED Indicators .......................................................... 11

1.3.5 USB 2.0 Ports........................................................... 11

1.3.6 Gigabit Ethernet Ports .............................................. 12

1.3.7 USB 3.0 Ports........................................................... 13

1.3.8 COM Port.................................................................. 14

1.3.9 Onboard Connections and Settings.......................... 15

2 Getting Started ................................................................. 17

2.1 Package Contents ............................................................. 17

2.2 Operating System Installation............................................ 18

2.2.1 Installation Environment ........................................... 19

2.2.2 Installing the PXIe-3985 ........................................... 20

2.2.3 Replacing the Hard Drive or Solid State Drive ......... 21

2.2.4 Replacing the Battery Backup .................................. 22

2.2.5 Clearing CMOS ........................................................ 22

v

3 Driver Installation............................................................. 25

3.1 Installing Windows Drivers................................................. 25

3.2 Installing the Chipset Driver ............................................... 25

3.3 Installing the Graphics Driver............................................. 26

3.4 Installing the Ethernet Driver.............................................. 26

3.5 Installing the GPIB Driver................................................... 27

3.6 Installing the Management Engine Driver .......................... 27

3.7 Installing the PXI Trigger Driver ......................................... 28

3.8 Installing the USB 3.0 Driver.............................................. 29

3.9 Installing the SMBus Driver................................................ 29

3.10 Installing the RST Driver .................................................... 30

A Appendix: PXI Trigger I/O Function Reference.............. 31

A.1 Data Types......................................................................... 31

A.2 Function Library ................................................................. 32

A.2.1 TRIG_Init ..................................................................32

A.2.2 TRIG_Close .............................................................. 33

A.2.3 TRIG_SetSoftTrg ...................................................... 33

A.2.4 TRIG_Trigger_Route ................................................ 34

A.2.5 TRIG_Trigger_Clear ................................................. 36

A.2.6 TRIG_GetSoftTrg...................................................... 36

A.2.7 TRIG_Trigger_Route_Query ....................................37

A.2.8 TRIG_GetDriverRevision .......................................... 39

B Appendix: BIOS Setup...................................................... 41

B.1 Starting the BIOS............................................................... 41

B.2 Main Setup......................................................................... 43

B.3 Advanced Setup................................................................. 44

B.4 Boot Setup ......................................................................... 45

B.5 Security Setup.................................................................... 45

B.6 Save & Exit Setup.............................................................. 46

Important Safety Instructions.............................................. 47

vi

PXIe-3985

Getting Service...................................................................... 49

vii

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viii

PXIe-3985

List of Figures

Figure 1-1: PXIe-3985 Functional Block Diagram.............................. 3

Figure 1-2: PXIe-3985 Front Panel .................................................... 7

Figure 1-3: PXI Trigger SMB Jack ..................................................... 8

Figure 1-4: DisplayPort Connector..................................................... 9

Figure 1-5: PXIe-3985 LED Indicators ............................................. 11

Figure 1-6: COM Port....................................................................... 14

Figure 1-7: PXIe-3985 Onboard Configuration ................................ 15

Figure B-1: BIOS Setup Navigation.................................................. 42

List of Figures ix

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x List of Figures

PXIe-3985

List of Tables

Table 1-1: Front Panel Legend ......................................................... 7

Table 1-2: DisplayPort Pin Assignment ............................................9

Table 1-3: GPIB Pin Description ..................................................... 10

Table 1-4: LED Indicator Legend.................................................... 11

Table 1-5: USB 2.0 Port Pin Assignment........................................ 12

Table 1-6: PXIe-3985 Ethernet Port Pin Assignments.................... 12

Table 1-7: D-Sub 9p COM Port Signal Functions ........................... 14

Table 1-8: Onboard Configuration Legend .....................................15

Table B-1: BIOS Hot Key Functions ................................................ 42

Table B-2: BIOS Main Setup Menu ................................................. 44

Table B-3: BIOS Advanced Setup Menu......................................... 45

Table B-4: BIOS Boot Setup Menu ................................................. 45

Table B-5: BIOS Security Setup Menu ............................................ 46

List of Tables xi

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xii List of Tables

1 Introduction

The ADLINK PXIe-3985 PXI Express™ embedded controller is
based on the fourth generation Intel® Core™ i7 processor specifi­cally designed for PXI Express-based testing systems. A rugged
and stable operating environment is provided for a variety of test­ing and measurement applications.

Combining state-of-the-art Intel® Core™ i7-4700EQ 2.4 GHz pro­cessors and up to 16 GB of 1600 MHz DDR3L memory, the
PXIe-3985 utilizes four separate computing engines on a single
processor, enabling execution of four independent tasks simulta­neously. With a configurable PCIe switch, the PXIe-3985 can sup­port four links x4 or two links x16 x8 PXI Express link capability,
with maximum system throughput of up to 8 GB/s.

PXI Express-based testing systems typically make up a PXI
Express platform and diversified standalone instruments for com­plex testing tasks. The PXIe-3985 series provides ample inter­faces, including two DisplayPort connectors, allowing connection
to two monitors, dual USB 3.0 connections for high speed periph­eral devices, dual Gigabit Ethernet ports, one for LAN connection
and the other for controlling LXI instruments, four USB 2.0 ports
for peripheral devices and USB instrument control, and a Micro-D
GPIB connector for GPIB instrument connection, for hybrid
PXI-based testing systems control.

PXIe-3985

Memory addressing over 4GB is OS-dependent, such that a
32-bit operating system may be unable to address memory

NOTE:

NOTE:

Introduction 1

space over 4GB. To fully utilize memory, 64-bit operating sys­tems are required.

1.1 Features

X PXI

X Intel

X Dual Channel DDR3L SODIMM

X Maximum System Throughput 8 GB/s

X PXI Express Link Capability

X Pre-integrated SATA hard drive at 500GB,

X Integrated I/O

TM

-5 PXI Express Hardware Specification Rev.1.0

®

Core™ i7-4700EQ 2.4 GHz processor for maximum
computing power, 3.4GHz maximum in single-core, Turbo
Boost mode.

Z Up to 16 GB 1600 MHz

Z 4 Four Links Configuration: x4 x4 x4 x4

Z 2 Two Links Configuration: x16 x8

Z Supports 2.5” HDD or SSD

Z SATA 6.0 Gb/s

Z Supports AHCI

Z Dual Gigabit Ethernet ports

Z Two USB3.0 Ports

Z Four USB 2.0 Ports

Z Built-in GPIB (IEEE488) controller

Z Dual DisplayPort connector

Z One COM port (D-sub9 serial)

Z Trigger I/O for advanced PXITM trigger functions

2 Introduction

1.2 Specifications

PXIe-3985

Front Panel
Connectors

GPIB

connector

USB2,0

connector x4

GbE

connector

GbE

connector

DisplayPort

connector x2

USB3.0

connector x2

COM Port
connector

SMB

Connector

GPIB

GbE I/F

GbE I/F

Channel A

204 pin SODIMM

Channel B

204 pin SODIMM

GPIB controller

USB 2.0

GbE PHY

82579

GbE controller

I210

Digital

Display I/F

USB 3.0

2.5" SATA
Interposer

Board

LPC- COM Port

Trigger Signal

SATA

DDR3

1600MHz

DDR3

1600MHz

PCIe

PCIe x1

PCIe x1

Haswell

Intel® Core™

i7 Quad Core

Processor

Intel FDI DMI

Intel® Lynx Point

Chipset

LPC

Trigger Bus

Controller

PCIe Gen2 x16

PCIe Gen2.0

48 lanes

swtich

Trigger Bus

Gen2 4Links x4

or

Gen2 2Links x8 +

x16

PXIe Connector

Figure 1-1: PXIe-3985 Functional Block Diagram

Processor

X Intel

X DMI (Direct Media Interface) with 5 GT/s bandwidth in each

®

Core™ i7-4700EQ 2.4GHz processor

direction

Chipset

Mobile Intel® QM87 Express

Introduction 3

Memory

X Two standard 204-pin DDR3L SODIMM sockets

X Supports 1333/1600MHz RAM up to 16 GB total

X Supports non-ECC, unbuffered memory

The externally accessible SODIMM socket can accept replace­ment DDR3L DRAM DIMM modules.

NOTE:

NOTE:

PXIe-3985 specifications and stability guarantees are only sup­ported when ADLINK-provided DDR3L DRAM DIMM modules
are used.

Video

X DisplayPort supports up to 3840x 2160 @ 60 Hz resolution

X DVI (with passive DisplayPort-to-DVI adapter) supports res-

olution up to 1920 x 1200 @ 60 Hz

DisplayPort adapters for other standards are available, with
maximum available resolution dependent on the adapter cho-

NOTE:

NOTE:

sen

Hard Drive

Built-in 2.5” 500GB SATA hard drive or 240GB SATA solid state
hard drive.

I/O Connectivity

Dual Gigabit Ethernet controllers through two RJ-45 connectors
with speed/link/active LED on the faceplate, with both supporting
Wake on LAN.

4 Introduction

PXIe-3985

USB

Four USB 2.0 and two USB 3.0 ports on the faceplate.

GPIB

Onboard IEEE488 GPIB controller through Micro-D 25-pin con­nector on the faceplate.

Trigger I/O

One SMB connector on the faceplate to route an external trigger
signal to/from PXI trigger bus

Dimensions (3U PXI module)

3U/4-slot PXI standard

Weight

1.0 kg (exclusive of packaging)

Environmental

Operating temperature with SSD 0 to 55°C

Operating temperature with HDD 0 to 50°C

Storage temperature -20 to 70°C

Relative humidity , non-condensing 5 to 95%

Shock and Vibration

Functional shock 30 G, half-sine, 11 ms pulse duration

Random vibration:

X Operating 5 to 500 Hz, 0.21 Grms, 3 axes

X Non-operating 5 to 500 Hz, 2.46 Grms, 3 axes

Introduction 5

Environmental & Shock and Vibration values are only guaran­teed with use of an ADLINK-provided SSD/HDD

NOTE:

NOTE:

Certification

Electromagnetic compatibility:

X EMC/EMI: CE, FCC Class A

X CE Compliance EN 61326-1

The PXIe-3985 meets the essential requirements of applicable
European Directives.

Power Requirements

Voltage Rail 5V standby 3.3V 5V 12V

Maximum power
consumption

Typical power
consumption

0.13A 3.0A 3.9A 5.3A

0.13A 3.0A 2.1A 1.6A

6 Introduction

1.3 I/O and Indicators

1.3.1 Front Panel

PXIe-3985

G

E

A

D

B

H

F

I

C

Figure 1-2: PXIe-3985 Front Panel

PXI Trigger Connector

A

(SMB jack)

B 2X DisplayPort Connectors G 2X Gigabit Ethernet

GPIB Connector

C

(Micro D-Sub 25P)

D Reset Button

E LED indicators

Table 1-1: Front Panel Legend

Introduction 7

4X Type-A USB 2.0

F

connectors

H 2X USB 3.0

1X COM port (D-sub9

I

serial)

PXI Trigger Connector

Ground

Trigger

Figure 1-3: PXI Trigger SMB Jack

The PXI trigger connector is a SMB jack, used to route external
trigger signals to or from the PXI backplane. Trigger signals are
TTL-compatible and edge sensitive. The PXIe-3985 provides four
trigger routing modes from/to the PXI trigger connector to synchro­nize PXI modules, including

X From a selected trigger bus line to PXI trigger connector

X From the PXI trigger connector to a selected trigger bus line

X From software trigger to a selected trigger bus line

X From software trigger to PXI trigger connector

All trigger modes are programmable by the provided driver. Please
refer to Section A: PXI Trigger I/O Function Reference for further
information.

DisplayPort Connectors

Provide monitor connection, with, if connecting to VGA/DVI/HDMI
monitors, installation of requisite adapters required. Dual display
function is also supported.

8 Introduction

PXIe-3985

19

20

Figure 1-4: DisplayPort Connector

Pin Signal Pin Signal

1 CN_DDPx0+ 11 GND

2 GND 12 CN_DDPx3-

3 CN_DDPx0- 13 CN_DDPx_AUX_SEL

1

2

4 CN_DDPx1+ 14 CN_DDPx_CONFIG2

5 GND 15 CN_DDPx_AUX+

6 CN_DDPx1- 16 GND

7 CN_DDPx2+ 17 CN_DDPx_AUX-

8 GND 18 CN_DDPx_HPD

9 CN_DDPx2- 19 GND

10 CN_DDPx3+ 20 +V3.3_DDPx_PWR

Table 1-2: DisplayPort Pin Assignment

Introduction 9

1.3.2 GPIB Connector

The GPIB connector on PXIe-3985 is a micro D-sub 25P connec­tor, controlling external bench-top instruments. Connection to
other instruments requires the optional ACL-IEEE488-MD1-A
cable. The on-board GPIB controller provides:

X Full compatibility with IEEE 488 standard

X Up to 1.5MB/s data transfer rates

X Onboard 2 KB FIFO for read/write operations

X Driver APIs are compatible with NI-488.2 driver software

X Connection with up to 14 instruments

1 13

14 25

Pin Signal Description Pin Signal Description

1 DIO1# GPIB Data 1 14 DIO5# GPIB Data 5

2 DIO2# GPIB Data 2 15 DIO6# GPIB Data 6

3 DIO3# GPIB Data 3 16 DIO7# GPIB Data 7

4 DIO4# GPIB Data 4 17 DIO8# GPIB Data 8

5 EOI End Or Identify 18 REN Remote Enable

6 DAV Data Valid 19 Ground Signal Ground

7 NRFD

8 NDAC No Data Accepted 21 Ground Signal Ground

9 IFC Interface Clear 22 Ground Signal Ground

10 SRQ Service Request 23 Ground Signal Ground

11 ATN Attention 24 Ground Signal Ground

Chassis

12

Ground

13 Ground Signal Ground

Not Ready For

Data

20 Ground Signal Ground

Chassis Ground 25 Ground Signal Ground

Table 1-3: GPIB Pin Description

10 Introduction

PXIe-3985

1.3.3 Reset Button

The reset button, activated by insertion of any pin-like implement,
executes a hard reset for the PXIe-3985.

1.3.4 LED Indicators

Four LED indicators on the faceplate indicate operational status of
the PXIe-3985, as follows.

Figure 1-5: PXIe-3985 LED Indicators

LED Color Description

Indicates system power, remaining lit when the

PW Green

HD Yellow

USR Blue User-programmable LED indicator

system boots normally and main power supply is
functioning

Indicates operating state of the HDD or SSD,
flashing during access to or activity on the SATA
HDD.

Table 1-4: LED Indicator Legend

1.3.5 USB 2.0 Ports

The PXIe-3985 provides four USB 2.0 ports via USB Type A con­nectors on the faceplate, all compatible with hi-speed, full-speed
and low-speed USB devices. Supported boot devices include USB
flash drive, USB floppy, USB CD-ROM, and others, with boot pri-

Introduction 11

ority and device settings configurable configured in BIOS. Please
see Section B.4: Boot Setup for more information.

Pin Signal

1/5 Power 5V

2/6 USB Data-

3/7 USB Data +

4/8 Ground

Table 1-5: USB 2.0 Port Pin Assignment

1.3.6 Gigabit Ethernet Ports

Dual Gigabit Ethernet connection is provided on the PXIe-3985
front panel.

Pin 1000Base-T Signal 100/10Base-T Signal

1 MDI0+ TX+

2 MDI0- TX-

3 MDI1+ RX+

4 MDI2+ Reserved

5 MDI2- Reserved

6 MDI1- RX-

7 MDI3+ Reserved

8 MDI3- Reserved

Table 1-6: PXIe-3985 Ethernet Port Pin Assignments

12 Introduction

PXIe-3985

The Ethernet ports each include two LED indicators, one
Active/Link indicator and one Speed indicator, functioning as fol­lows.

LED Status Description

Off Ethernet port is disconnected

Active/Link
(Yellow)

Speed
(Green/Or
ange)

On

Flashing

Off 10 Mbps

Green 100 Mbps

Orange 1000 Mbps

Ethernet port is connected with no
data transmission

Ethernet port is connected with
data transmitted/received

1.3.7 USB 3.0 Ports

The PXIe-3985 provides two Type A USB 3.0 ports on the front
panel, supporting SuperSpeed, Hi-Speed, full-speed, and
low-speed transmission for downstream. Multiple boot devices,
including USB flash, USB external HD, and USB CD-ROM drives
are supported, with boot priority configured in BIOS.

While the USB 3.0 ports allow boot from CD-ROM, OS installa­tion via CD-ROM is not supported

NOTE:

NOTE:

Introduction 13

1.3.8 COM Port

A COM port on the front panel with D-sub 9P connectors supports
RS-232/RS-422/RS-485 by BIOS selection.

1 5

6

Figure 1-6: COM Port

Signal Name

Pin

RS-232 RS-422 RS-485

1 DCD# TXD422- 485DATA-

2 RXD TXD422+ 485DATA+

3 TXD RXD422+ N/S

4 DTR# RXD422- N/S

5 GND N/S N/S

6 DSR# N/S N/S

7 RTS# N/S N/S

8 CTS# N/S N/S

9 RI# N/S N/S

Table 1-7: D-Sub 9p COM Port Signal Functions

9

14 Introduction

1.3.9 Onboard Connections and Settings

PXIe-3985

B

A

Figure 1-7: PXIe-3985 Onboard Configuration

A SATA Connector

B Clear CMOS switch

C System Battery

Table 1-8: Onboard Configuration Legend

C

Introduction 15

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16 Introduction

2 Getting Started

This chapter describes procedures for installing the PXIe-3985
and making preparations for its operation, including hardware and
software setup. Please note that the PXIe-3985 is shipped with
RAM and HDD or SSD preinstalled. Please contact ADLINK or
authorized dealer if there are any problems during the installation.

Diagrams and illustrated equipment are for reference only.
Actual system configuration and specifications may vary.

NOTE:

NOTE:

2.1 Package Contents

Before beginning, check the package contents for any damage
and ensure that the following items are included:

X PXIe-3985 Controller (equipped with RAM and HDD or

SSD)

X DisplayPort-to-VGA adapter

X PXIe-3985 Quick Start Guide

X ADLINK All-In-One CD

If any of these items are missing or damaged, contact the dealer
from whom you purchased the product. Save the shipping materi­als and carton in case you want to ship or store the product in the
future.

PXIe-3985

Do not install or apply power to equipment that is damaged or
missing components. Retain the shipping carton and packing

WARNING:

Getting Started 17

materials for inspection. Please contact your ADLINK
dealer/vendor immediately for assistance and obtain authoriza­tion before returning any product.

2.2 Operating System Installation

For more detailed information about the operating system, refer to
the documentation provided by the operating system manufac­turer. Preferred/supported operating systems for PXIe-3985 are:

X Windows 7 32/64-bit

X For other OS support, please contact ADLINK

Most operating systems require initial installation from a hard
drive, floppy drive, or CD-ROM drive. The PXIe-3985 controller
supports USB CD-ROM drive, USB flash disk, USB external hard
drive, or a USB floppy drive as the first boot device. Please see
Section B.4: Boot Setup for information about setting the boot
devices. These devices should be configured, installed, and tested
with the supplied drivers before attempting to load the new operat­ing system.

Read the release notes and installation documentation
provided by the operating system vendor. Be sure to

NOTE:

NOTE:

read all the README files or documents provided on the
distribution disks, as these typically note documentation
discrepancies or compatibility problems.

1. Select the appropriate boot device order from the BIOS
Boot Setup Menu based on the OS installation media
used. For example, if the OS is distributed on a bootable
installation CD, select USB CD-ROM as the first boot
device and reboot the system with the installation CD in
the USB CD-ROM drive

2. Proceed with the OS installation as directed and be sure
to select appropriate device types if prompted. Refer to
the appropriate hardware manuals for specific device
types and compatibility modes of ADLINK PXI products.

3. When installation is complete, reboot the system and set
the boot device order in the SETUP boot menu accord­ingly.

18 Getting Started

2.2.1 Installation Environment

When preparing to install any equipment described in this man­ual, please refer to Chapter C: Important Safety Instructions.

Only install equipment in well lit areas on flat, sturdy surfaces
with access to basic tools such as flat- and cross-head screw­drivers, preferably with magnetic heads as screws and stand­offs are small and easily misplaced.

Recommended Installation Tools

Phillips (cross-head) screwdriver

Flat-head screwdriver

Anti-static wrist strap

Anti-static mat

ADLINK PXIe-3985 system controllers are electrostatically

sensitive and can be easily damaged by static electricity. The
equipment must be handled on a grounded anti-static mat, and
operators must wear an anti-static wristband, grounded at the
same point as the anti-static mat.

Inspect the carton and packaging for damage. Shipping and
handling may cause damage to the contents. Ensure that all
contents are undamaged before installing.

PXIe-3985

All equipment must be protected from static discharge
and physical shock. Never remove any of the socketed

CAUTION:

parts except at a static-free workstation. Use the
anti-static bag shipped with the product to handle the
equipment and wear a grounded wrist strap when servic­ing or installing.

Getting Started 19

2.2.2 Installing the PXIe-3985

1. Locate the system controller slot (Slot 1)

2. Depress the red locking lever and release the latch

3. Align the controller’s top and bottom edges with the card
guides, and carefully slide the PXIe-3985 into the chas­sis, as shown

4. Elevate the latch until the PXIe-3985 is fully seated in the
chassis backplane. The alignment pin on the rear of the
latch can be threaded into the best fit alignment port in
the chassis rail.

5. Fasten the four mounting screws on the faceplate of
PXIe-3985, and connect all peripheral devices.

20 Getting Started

PXIe-3985

2.2.3 Replacing the Hard Drive or Solid State Drive

The PXIe-3985 provides a SATA 3.0 port with a pre-installed 2.5"
SATA hard drive or solid state drive. Replacing the HDD or SSD is
accomplished as follows.

1. Locate the five screws attaching the hard drive hous-

ing to the PXIe-3985 controller, as shown.

2. Remove the screws.

3. Gently lift and remove the housing with the installed

HDD or SSD.

4. Locate the four screws (two on each side, as shown)

fixing the hard drive, and remove.

5. To install a HDD or SSD or other compatible SATA hard

drive, reverse the steps and reinstall the PXIe-3985 into
the PXI system.

Getting Started 21

2.2.4 Replacing the Battery Backup

The PXIe-3985 is provided with a 3.0 V “coin cell” lithium battery,
replacement of which is as follows.

1. Turn off the PXI chassis.

2. Remove the PXIe-3985 embedded controller from
the chassis. Observe all anti-static precautions.

3. To remove the battery, gently insert a small (approx. 5
mm) flathead screwdriver under the battery at the nega­tive retaining clip. Gently pry up and the battery should
easily pop out.

4. Place a fresh identical battery (CR2032 or equivalent) in
the socket, ensuring that the positive pole (+) is facing
upwards. The battery is most easily seated by first being
inserted under the positive retaining clip, and then
pushed downward at the negative retaining clip. The bat­tery should easily snap into position.

5. Reinstall the embedded controller into the PXI chassis
and restore power.

2.2.5 Clearing CMOS

In the event of a system malfunction causing the PXIe-3985 to halt
or fail to boot, clear the CMOS and restore the controller BIOS to
its default settings. To clear the CMOS:

1. Shut down the controller operating system and turn off
the PXI Chassis.

2. Remove the PXIe-3985 from the chassis. Observe
all anti-static precautions.

3. Locate the CMOS clear switch (SW1) on the board (see
Section 1.3.9: Onboard Connections and Settings).
Move the switch from Normal position

2
B

22 Getting Started

PXIe-3985

to Clear position

2
B

and wait for 5 seconds, then return the switch to Normal
position.

4. Remount the controller into the PXI chassis.

5. Press "Delete" or "F2" to enter the BIOS setup when the

splash logo appears.

6. Press "F3" to load Optimized defaults in BIOS setup

7. Modify the system date and time

8. Press "F4" to save configuration and exit

Getting Started 23

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24 Getting Started

3 Driver Installation

After installing the operating system, all related drivers must be
installed for correct system operation. This section describes driv­ers needed for Windows operating systems and the procedures to
install them. For other OS support, please contact ADLINK.

3.1 Installing Windows Drivers

1. Fully install Windows, which contains most standard I/O

device drivers

2. Install the chipset driver

3. Install the graphic driver

4. Install the Ethernet driver

5. Install the GPIB driver

6. Install the management engine driver

7. Install the PXI trigger driver

8. Install the USB 3.0 driver

9. Install the SMBus driver

10.Install the RST driver

PXIe-3985

3.2 Installing the Chipset Driver

This section describes installation of the chipset driver for
PXIe-3985. The chipset driver directs the operating system to con­figure the Intel® QM87 chipset components.

To install the chipset driver:

1. Close any running applications

2. Insert the ADLINK All-in-One CD (x: denotes the

CD-ROM drive)

Z The Win7 32-bit chipset driver is located in the directory:

x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_32bit\Chipset\

Driver Installation 25

Z The Win7 64-bit chipset driver is located in the directory:

x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_64bit\Chipset\

3. Execute setup.exe and follow on-screen instructions to
complete the setup

4. Reboot the system

3.3 Installing the Graphics Driver

To install the graphics driver:

1. Close any running applications

2. Insert the ADLINK All-in-One CD (x: denotes the
CD-ROM drive)

Z The Win7 32-bit graphics driver is located in the direc-

tory:
x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_32bit\Graphics\

Z The Win7 64-bit graphics driver is located in the direc-

tory:
x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_64bit\Graphics\

3. Execute setup.exe and follow on-screen instructions to
complete the setup

4. Reboot the system

3.4 Installing the Ethernet Driver

To install the Ethernet driver:

1. Close any running applications.

2. Insert the ADLINK All-in-One CD (x: denotes the
CD-ROM drive)

Z The Win7 32-bit Ethernet driver is located in the direc-

tory:
x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_32bit\LAN\

Z The Win7 64-bit Ethernet driver is located in the direc-

tory:

26 Driver Installation

PXIe-3985

x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_64bit\LAN\

3. Execute PROWin32.exe or PROWin64x.exe and follow

on-screen instructions to complete the setup.

4. Reboot the system

3.5 Installing the GPIB Driver

The PXIe-3985 controller features an onboard GPIB controller,
providing connectivity between PXI and GPIB instruments. The
GPIB driver package also contains function libraries and a utility to
interact with GPIB instruments.

To install the GPIB driver:

1. Close any running applications.

2. Insert the ADLINK All-in-One CD (x: denotes the CD-

ROM drive)

Z The Win7 32-bit GPIB driver is located in the directory:

x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_32bit\GPIB\

Z The Win7 64-bit GPIB driver is located in the directory:

x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_64bit\GPIB\

3. Execute setup.exe and follow on-screen instructions to

complete the setup

4. Reboot the system

3.6 Installing the Management Engine Driver

To install the management engine driver:

1. Close any running applications.

2. Insert the ADLINK All-in-One CD (x: denotes the

CD-ROM drive)

Z The Win7 32-bit management engine driver is located in

the directory:

Driver Installation 27

x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_32bit\ME\

Z The Win7 64-bit management engine driver is located in

the directory:
x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_64bit\ME\

3. Execute MEI_ALLOS_6.1.0.1042_PV.exe or setup.exe
and follow on-screen instructions to complete the setup.

4. Reboot the system

3.7 Installing the PXI Trigger Driver

The PXIe-3985 controller provides a trigger I/O on the faceplate to
route the trigger signal to and from the PXI trigger bus. Please see
Appendix A: PXI Trigger I/O Function Reference for programming
information.

To install the PXI trigger driver:

1. Close any running applications.

2. Insert the ADLINK All-in-One CD (x: denotes the CD­ROM drive)

Z The Win7 32-bit PXI trigger driver is located in the direc-

tory:
x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_32bit\TriggerIO\

Z The Win7 64-bit PXI trigger driver is located in the direc-

tory:
x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_64bit\TriggerIO\

3. Execute PXI Trigger IO setup v330.exe and follow
on-screen instructions to complete the setup

4. Reboot the system

28 Driver Installation

PXIe-3985

3.8 Installing the USB 3.0 Driver

The PXIe-3985 controller provides two USB 3.0 ports on the face­plate. To install the USB 3.0 drivers:

1. Close any running applications.

2. Insert the ADLINK All-in-One CD (x: denotes the

CD- ROM drive)

Z The Win7 32-bit USB 3.0 driver is located in the direc-

tory:
x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_32bit\USB30\

Z The Win7 64-bit USB 3.0 driver is located in the direc-

tory:
x:\Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\Win7_64bit\USB30\

3. Execute setup.exe and follow on- screen instructions to

complete the setup

4. Reboot the system

3.9 Installing the SMBus Driver

To install the SMBus driver:

1. Close any running applications.

2. Insert the ADLINK All-in-One CD (x: denotes the

CD- ROM drive)

Z The 32bit Win7 SMBus driver is located in the directory

x:\ Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\SMBus\Win7\32Bits\

Z The 64bit Win7 SMBus driver is located in the directory

x:\ Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\SMBus\Win7\64Bits\

3. Execute setup.exe and follow on- screen instructions to

complete the setup

4. Reboot the system

Driver Installation 29

3.10 Installing the RST Driver

To install the RST driver:

1. Close any running applications.

2. Insert the ADLINK All-in-One CD (x: denotes the
CD- ROM drive)

Z The 32bit Win7 RST driver is located in the directory x:\

Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\RST\Win7\32Bits\

Z The 64bit Win7 RST driver is located in the directory x:\

Driver Installation\PXI Platform\PXI control­ler\PXIe-3985\RST\Win7\64Bits\

3. Execute setup.exe and follow on- screen instructions to
complete the setup

4. Reboot the system

30 Driver Installation

PXIe-3985

Appendix A - PXI Trigger I/O Function Ref-

erence

This appendix describes use of the PXI trigger I/O function library
for the PXIe-3985 controller, to program routing of trigger signals
between the trigger I/O SMB connector on the faceplate and the
PXI trigger bus on the backplane. API files are located in the
installation directory of the PXI Trigger I/O driver.

A.1 Data Types

The PXIe-3985 library uses these data types in pxitrigio.h in the
directory X:\ADLINK\PXI Trigger IO\Include. It is recommended
that you use these data types in your application programs. The
table shows the data type names, ranges, and corresponding data
types in C/C++, Visual Basic, and Delphi for reference.

Type

Type Description Range

U8

I16

U16

I32

U32

PXI Trigger I/O Function Reference 31

8-bit ASCII

character

16-bit signed

integer

16-bit unsigned

integer

32-bit signed

integer

32-bit unsigned

integer

0 to 255

-32768 to
32767

0 to 65535

-2147483648
to

2147483647

0 to

4294967295

C/C++

(for 32-bit
compiler)

unsigned

char

short Integer SmallInt

unsigned

short

long Long LongInt

unsigned

long

Visual Basic

Byte Byte

Not supported

by BASIC,

use the

signed integer

(I16) instead

Not supported

by BASIC,

use the

signed long

integer (I32)

instead

Pascal

(Delphi)

Word

Cardinal

Type

Type Description Range

F32

n floating-point

F64

double-precisio

n floating-point

32-bit

single-precisio

64-bit

-3.402823E38

3.402823E38

1.7976831348
62315E308 to

1.7976831348

62315E309

to

C/C++

(for 32-bit
compiler)

float Single Single

double Double Double

Visual Basic

A.2 Function Library

This section provides detailed definitions of the functions available
in the PXIe-3985 function library. Each function includes a descrip­tion, list of supported cards, syntax, parameter list and Return
Code information.

A.2.1 TRIG_Init

Description

Initializes trigger I/O function of PXIe-3985 controller.
TRIG_Init must be called before the invocation of any other
trigger I/O function.

Syntax

C/C++

I16 TRIG_Init()

Visual Basic

TRIG_Init As Integer

Parameter

None

Return Code

ERR_NoError
ERR_BoardBusy
ERR_OpenDriverFail
ERR_GetGPIOAddress

Pascal

(Delphi)

32 PXI Trigger I/O Function Reference

A.2.2 TRIG_Close

Description

Closes trigger I/O function of PXIe-3985 controller, releas­ing resources allocated for the trigger I/O function. Users
must invoke TRIG_Close before exiting the application.

Syntax

C/C++

I16 TRIG_Close()

Visual Basic

TRIG_Close() As Integer

Parameter

None

Return Code

ERR_NoError
ERR_BoardNoInit

A.2.3 TRIG_SetSoftTrg

Description

Generates a TTL trigger signal to the trigger I/O SMB con­nector on the faceplate or the PXI trigger bus on the back­plane by software command

Syntax

C/C++

I16 TRIG_SetSoftTrg(U8 Status)

Visual Basic

TRIG_SetSoftTrg (ByVal status As Byte) As
Integer

Parameters

Status

Logic level of trigger signal.

Available value description:

0: Logic low

PXIe-3985

PXI Trigger I/O Function Reference 33

1: Logic high

Return Code

ERR_NoError
ERR_BoardNoInit

A.2.4 TRIG_Trigger_Route

Description

Routes the trigger signal between the trigger I/O SMB con­nector on the faceplate and the PXI trigger bus on the back­plane. This function also allows routing of the
software-generated trigger signal to SMB connector or trig­ger bus.

Syntax

C/C++

I16 TRIG_Trigger_Route (U32 source, U32 dest,
U32 halfway)

Visual Basic

TRIG_Trigger_Route (ByVal source As Long,
ByVal dest As Long, ByVal halfway As Long) As
Integer

Parameters

source

Source of trigger routing. It can be one of the following val­ues.

Available value Description

PXI_TRIG_VAL_SMB SMB connector on the faceplate

PXI_TRIG_VAL_SOFT Software-generated trigger signal

PXI_TRIG_VAL_TRIG0 PXI trigger bus #0

PXI_TRIG_VAL_TRIG1 PXI trigger bus #1

PXI_TRIG_VAL_TRIG2 PXI trigger bus #2

PXI_TRIG_VAL_TRIG3 PXI trigger bus #3

PXI_TRIG_VAL_TRIG4 PXI trigger bus #4

PXI_TRIG_VAL_TRIG5 PXI trigger bus #5

34 PXI Trigger I/O Function Reference

Available value Description

PXI_TRIG_VAL_TRIG6 PXI trigger bus #6

PXI_TRIG_VAL_TRIG7 PXI trigger bus #7

dest

Destination of trigger routing. It can be one of the following
values.

Available value Description

PXI_TRIG_VAL_SMB SMB connector on the faceplate

PXI_TRIG_VAL_TRIG0 PXI trigger bus #0

PXI_TRIG_VAL_TRIG1 PXI trigger bus #1

PXI_TRIG_VAL_TRIG2 PXI trigger bus #2

PXI_TRIG_VAL_TRIG3 PXI trigger bus #3

PXI_TRIG_VAL_TRIG4 PXI trigger bus #4

PXI_TRIG_VAL_TRIG5 PXI trigger bus #5

PXI_TRIG_VAL_TRIG6 PXI trigger bus #6

PXI_TRIG_VAL_TRIG7 PXI trigger bus #7

halfway

Halfway point of trigger routing. This parameter is used only
to route the software-generated trigger signal to the SMB
connector on the faceplate. In this case, the halfway should
be set as one of the trigger bus lines, otherwise as
PXI_TRIG_VAL_NONE.

PXIe-3985

Available value Description

PXI_TRIG_VAL_NONE No halfway point

PXI_TRIG_VAL_TRIG0 PXI trigger bus #0

PXI_TRIG_VAL_TRIG1 PXI trigger bus #1

PXI_TRIG_VAL_TRIG2 PXI trigger bus #2

PXI_TRIG_VAL_TRIG3 PXI trigger bus #3

PXI_TRIG_VAL_TRIG4 PXI trigger bus #4

PXI_TRIG_VAL_TRIG5 PXI trigger bus #5

PXI_TRIG_VAL_TRIG6 PXI trigger bus #6

PXI Trigger I/O Function Reference 35

Available value Description

PXI_TRIG_VAL_TRIG7 PXI trigger bus #7

Return Code

ERR_NoError
ERR_BoardNoInit
ERR_Set_Path

A.2.5 TRIG_Trigger_Clear

Description

Clears the trigger routing setting

Syntax

C/C++

I16 TRIG_Trigger_Clear()

Visual Basic

TRIG_Trigger_Clear() As Integer

Parameters

None

Return Code

ERR_NoError
ERR_BoardNoInit
ERR_Trigger_Clr

A.2.6 TRIG_GetSoftTrg

Description

Acquires the current software trigger state, with default

state after system boot of Logic Low

Syntax

C/C++

I16 TRIG_GetSoftTrg(U8 *Status)

Visual Basic

TRIG_GetSoftTrg (status As Byte) As Integer

36 PXI Trigger I/O Function Reference

Parameters

Status

Returns the logic level of software trigger signal

Returned value:

0: Logic low

1: Logic high

Return Code

ERR_NoError
ERR_BoardNoInit
ERR_Query_Status

A.2.7 TRIG_Trigger_Route_Query

Description

Acquires the current trigger signal routing path

Syntax

C/C++

I16 TRIG_Trigger_Route_Query (U32* source,
U32* dest, U32* halfway)

Visual Basic

TRIG_Trigger_Route_Query (source As Long, dest
As Long, halfway As Long) As Integer

Parameters

source

Returns to the current source of trigger routing, with possi­ble values including:

PXIe-3985

Available Definition Defined Value

PXI_TRIG_VAL_NONE 0

PXI_TRIG_VAL_SMB 2

PXI_TRIG_VAL_SOFT 3

PXI_TRIG_VAL_TRIG0 111

PXI_TRIG_VAL_TRIG1 112

PXI Trigger I/O Function Reference 37

Available Definition Defined Value

PXI_TRIG_VAL_TRIG2 113

PXI_TRIG_VAL_TRIG3 114

PXI_TRIG_VAL_TRIG4 115

PXI_TRIG_VAL_TRIG5 116

PXI_TRIG_VAL_TRIG6 117

PXI_TRIG_VAL_TRIG7 118

dest

Returns to the current destination of trigger routing, with
possible values including:

Available Definition Defined Value

PXI_TRIG_VAL_NONE 0

PXI_TRIG_VAL_SMB 2

PXI_TRIG_VAL_TRIG0 111

PXI_TRIG_VAL_TRIG1 112

PXI_TRIG_VAL_TRIG2 113

PXI_TRIG_VAL_TRIG3 114

PXI_TRIG_VAL_TRIG4 115

PXI_TRIG_VAL_TRIG5 116

PXI_TRIG_VAL_TRIG6 117

PXI_TRIG_VAL_TRIG7 118

halfway

Returns to the current halfway point of trigger routing, with
possible values including:

Available Value Description

PXI_TRIG_VAL_NONE 0

PXI_TRIG_VAL_TRIG0 111

PXI_TRIG_VAL_TRIG1 112

PXI_TRIG_VAL_TRIG2 113

PXI_TRIG_VAL_TRIG3 114

PXI_TRIG_VAL_TRIG4 115

38 PXI Trigger I/O Function Reference

Available Value Description

PXI_TRIG_VAL_TRIG5 116

PXI_TRIG_VAL_TRIG6 117

PXI_TRIG_VAL_TRIG7 118

Return Code

ERR_NoError
ERR_BoardNoInit
ERR_Query_Status

A.2.8 TRIG_GetDriverRevision

Description

Acquires the PXI Trigger software driver version; format of the

version number is major.minor1.minor2

Syntax

C/C++

I16 TRIG_GetDriverRevision(unsigned short
*major, unsigned short *minor1, unsigned short
*minor2)

Visual Basic

TRIG_GetDriverRevision (major As Integer,
minor1 As Integer, minor2 As Integer) As Inte­ger

Parameters

major

Returns the major version number of the pxi trigger software
driver

minor1

Returns the first minor version number of the pxi trigger
software driver

minor2

Returns the second minor version number of the pxi trigger
software driver

PXIe-3985

PXI Trigger I/O Function Reference 39

Return Code

ERR_NoError
ERR_Query_Revision

40 PXI Trigger I/O Function Reference

Appendix B BIOS Setup

The Basic Input/Output System (BIOS) provides a basic level of
communication between the processor and peripherals. In
addition, the BIOS also contains code for various advanced
features applied to the PXIe-3985 controller. The BIOS setup
program includes menus for configuring settings and enabling
PXIe-3985 controller features.

Changing BIOS settings may result in incorrect operation and
possibly an inability to boot. If this occurs, follow the instruc-

CAUTION:

B.1 Starting the BIOS

tions in Section 2.2.5: Clearing CMOS to clear CMOS and
restore default settings. In general, do not change a BIOS set­ting unless you are absolutely certain of the consequences.

1. Power on or reboot the PXIe-3985 controller.

2. Press the <Delete> key when the controller beeps. This
should be concurrent with the main startup screen. The
BIOS setup program loads after a short delay.

3. The Main menu is displayed when you first enter the
BIOS setup program.

PXIe-3985

In most cases, the < Delete > key is used to invoke the setup
screen. There are several cases that use other keys, such as <

NOTE:

NOTE:

F1 >, < F2 >, and so on.

The main BIOS setup menu is the first screen that you can navi­gate. Each main BIOS setup menu option is described in this
user’s guide.

The Main BIOS setup menu screen has two main frames. The left
frame displays all the options that can be configured. “Grayed”
options cannot be configured, “Blue” options can be.

The right frame displays the key legend. Above the key legend is
an area reserved for a text message. When an option is selected
in the left frame, it is highlighted in white. Often a text message will
accompany it.

BIOS Setup 41

Navigation

The BIOS setup/utility uses a key-based navigation system called
hot keys. Most BIOS setup utility hot keys can be used at any time
during setup navigation, as follows.

Key(s) Function

Right Arrow, Left Arrow Moves between different setup menus

Up Arrow, Down Arrow Moves between options within a setup menu

<Enter>

<Esc>

<+> and <–> Cycles between all available settings

<Tab> Selects time and date fields

<F1> Opens the general help window for the BIOS

<F2> Loads previous values into the BIOS

<F3> Restores optimal default values into the BIOS

<F4>

Opens a submenu or displays all available settings
for a highlighted configuration option

Returns to the previous menu and shortcuts to the
Exit menu from top-level menus

Saves the current configuration and exits BIOS
setup

Table B-1: BIOS Hot Key Functions

Figure B-1: BIOS Setup Navigation

42 BIOS Setup

PXIe-3985

A hot key legend is located in the right frame on most setup
screens.

NOTE:

NOTE:

The < F8 > key on your keyboard is the Fail-Safe key. It is not dis­played on the key legend by default. To set the Fail-Safe settings
of the BIOS, press the < F8 > key on your keyboard. It is located
on the upper row of a standard 101 keyboard. The Fail-Safe set­tings allow the motherboard to boot up with the least amount of
options set. This can lessen the probability of conflicting settings.

B.2 Main Setup

When you first enter the Setup Utility, you will enter the Main setup
screen. You can always return to the Main setup screen by select­ing the Main tab.

The Main Setup menu provides basic controller information and
allows the system time and date to be set, as follows.

Item Detail

BIOS Information

System Date & Time

System Date

System Time

MAC Address The MAC address of Ethernet ports

Access Level

LINK CAP The PXI express link capability

Processor
Information

PCH Information Includes chipset information

BIOS Setup 43

Includes BIOS version and the date on which the
BIOS was built

Changes system date, date must be entered in
MM/DD/YY format

Changes system time, time must be entered in
HH:MM:SS format.

Displays current access level, default is

Administrator

Includes detail CPU information.

Item Detail

System
Management

Includes manufacturing information and runtime
statistics

Table B-2: BIOS Main Setup Menu

B.3 Advanced Setup

Select the Advanced tab from the setup screen to enter the
Advanced BIOS Setup screen. You can select any of the items in
the left frame of the screen, such as SuperIO Configuration, to go
to the submenu for that item. Display an Advanced BIOS Setup
option by highlighting it using the < Arrow > keys. The Advanced
BIOS Setup options are as follows.

Item Detail

Holdoff Timer Delay setting for PCIe discovery in seconds

Launch PXE
OpROM

Launch Storage
OpROM

PCIe Performance

CPU Displays processor type, speed, system bus speed, etc.

Memory Displays memory type, speed, voltage rail, etc.

Graphics Displays VBIOS version, and graphic memory setting

SATA Configuration Sets SATA mode and enables/disables SATA controller

USB Configuration

PCI and PCIe

Hardware Health
Configuration

ACPI and Power
Management

Clock

Thermal Controller thermal protection setting.

Enables or disables legacy network device (default is
Disabled)

Enables/disables the option for Legacy Mass Storage
Devices with option ROM (default is Enabled)

Enable or disable the EIST/Turbo/C-state (default is
disabled)

Provides USB support and lists the devices attached to
the USB port (keyboard, mouse, and one hub)

PCI and PCIe related setting, including enable the 4G
memory space supporting for peripheral module

Displays voltages and temperatures on the controller

Power management related setting, including ACPI
mode and power-up mode

Enable or disable spread spectrum clock for PCIe
reference clock (default is disabled)

44 BIOS Setup

Item Detail

Serial Port
Configuration

Miscellaneous Includes precision timer and security setting

Set COM port mode between RS232/422/485

Table B-3: BIOS Advanced Setup Menu

B.4 Boot Setup

Item Detail

Boot Configuration

Quiet Boot

Bootup NumLock
State

CSM16 Module
Version

Gate A20 Active Allows GA20 to be disabled by BIOS

Option ROM
Messages

Interrupt 19 Capture Allows Option ROMs to trap Int 19

Set Boot Priority

1st Boot

2nd Boot

Hard Drive BBS
Priorities

When disabled, allows POST messages to be
viewed (default is Enabled).

Selects default keyboard number lock setting

Displays the version of the CSM16 module, e.g.

07.64

Sets display mode for Option ROM

Allows selection of the primary boot source (default
is the SATA HDD)

Allows selection of the secondary boot source
(default is Disabled)

Sets the order of legacy devices in this group

Table B-4: BIOS Boot Setup Menu

PXIe-3985

B.5 Security Setup

The system can be configured to require all users to enter a pass­word (either Administrator or User) every time the system boots or
when Setup is executed. Administrators and User passwords acti­vate different levels of security.

BIOS Setup 45

If passwords are used, the system prompts for a three- to twenty­character password. Typed passwords are not displayed.

Item Details

Administrator
Password

Sets an administrative level password for the BIOS.

User Password Sets user level passwords for the BIOS.

Table B-5: BIOS Security Setup Menu

Passwords are not recoverable. Please ensure that all pass­words are recorded elsewhere. If your passwords are lost,

CAUTION:

NVRAM must be erased and reconfigured.

B.6 Save & Exit Setup

The following options for saving and exiting can be chosen in this
menu.

Save Changes and Exit

X Discard Changes and Reset

X Save Changes and Reset

Save Option

X Save Changes

X Discard Changes

X Restore Defaults

X Save as User Defaults

X Restore User Defaults

The "Restore the default values for all setup options” selection
does not restore the original boot priority sequence. You must

NOTE:

NOTE:

46 BIOS Setup

use the Boot Setup Menu (see Section B.4: Boot Setup) to
manually restore the boot priority sequence.

PXIe-3985

Important Safety Instructions

For user safety, please read and follow all instructions,
WARNINGS, CAUTIONS, and NOTES marked in this manual and

on the associated equipment before handling/operating the
equipment.

X Read these safety instructions carefully.

X Keep this user’s manual for future reference.

X Read the specifications section of this manual for detailed

information on the operating environment of this equipment.

X When installing/mounting or uninstalling/removing

equipment:

Z Turn off power and unplug any power cords/cables.

X To avoid electrical shock and/or damage to equipment:

Z Keep equipment away from water or liquid sources;

Z Keep equipment away from high heat or high humidity;

Z Keep equipment properly ventilated (do not block or

cover ventilation openings);

Z Make sure to use recommended voltage and power

source settings;

Z Always install and operate equipment near an easily

accessible electrical socket-outlet;

Z Secure the power cord (do not place any object on/over

the power cord);

Z Only install/attach and operate equipment on stable

surfaces and/or recommended mountings; and,

Z If the equipment will not be used for long periods of time,

turn off and unplug the equipment from its power source.

Important Safety Instructions 47

X Never attempt to fix the equipment. Equipment should only

be serviced by qualified personnel.

X A Lithium-type battery may be provided for uninterrupted,

backup or emergency power.

Risk of explosion if battery is replaced with an incorrect type;
please dispose of used batteries appropriately.

WARNING:

X Equipment must be serviced by authorized technicians

when:

Z The power cord or plug is damaged;

Z Liquid has penetrated the equipment;

Z It has been exposed to high humidity/moisture;

Z It is not functioning or does not function according to the

user’s manual;

Z It has been dropped and/or damaged; and/or,

Z It has an obvious sign of breakage.

48 Important Safety Instructions

Getting Service

Contact us should you require any service or assistance.

ADLINK Technology, Inc.

Address: 9F, No.166 Jian Yi Road, Zhonghe District
New Taipei City 235, Taiwan

ᄅקؑխࡉ೴৬ԫሁ 166 ᇆ 9 ᑔ

Tel: [phone]
Fax: [phone]
Email: [e-mail]

Ampro ADLINK Technology, Inc.

Address: 5215 Hellyer Avenue, #110
San Jose, CA 95138, USA
Tel: [phone]
Toll Free: [phone] (USA only)
Fax: [phone]
Email: [e-mail]

ADLINK Technology (China) Co., Ltd.

Address: Ϟ⍋Ꮦ⌺ϰᮄᓴ∳催⾥ᡔು㢇᯹䏃 300 ো(201203)
300 Fang Chun Rd., Zhangjiang Hi-Tech Park

Pudong New Area, Shanghai, 201203 China
Tel: [phone]
Fax: [phone]
Email: [e-mail]

PXIe-3985

ADLINK Technology Beijing

Address: ࣫ҀᏖ⍋⎔Ϟഄϰ䏃 1 োⲜ߯ࡼ࡯໻ E ᑻ 801 ᅸ(100085)

Beijing, 100085 China
Tel: [phone]
Fax: [phone]
Email: [e-mail]

ADLINK Technology Shenzhen

Address: ⏅ഇᏖቅ⾥ᡔು催ᮄϗ䘧᭄ᄫᡔᴃು

Tel: [phone]
Fax: [phone]
Email: [e-mail]

LiPPERT ADLINK Technology GmbH

Address: Hans-Thoma-Strasse 11, D-68163
Mannheim, Germany
Tel: [phone]
Fax: [phone]
Email: [e-mail]

Rm. 801, Power Creative E, No. 1 Shang Di East Rd.

A1 󰶀 2 ὐ C  (518057)
2F, C Block, Bldg. A1, Cyber-Tech Zone, Gao Xin Ave. Sec. 7
High-Tech Industrial Park S., Shenzhen, 518054 China

Getting Service 49

ADLINK Technology, Inc. (French Liaison Office)

Address: 6 allée de Londres, Immeuble Ceylan
91940 Les Ulis, France
Tel: [phone]
Fax: [phone]
Email: [e-mail]

ADLINK Technology Japan Corporation

Address: ͱ101-0045 ᵅҀ䛑ҷ⬄⼲⬄䤯ފ⬎ 3-7-4

Tel: [phone]
Fax: [phone]
Email: [e-mail]

ADLINK Technology, Inc. (Korean Liaison Office)

Address: 137-881 昢殾柢 昢爎割 昢爎堆嵢 326, 802 (昢爎壟, 微汾瘶捒娯)

Tel: [phone]
Fax: [phone]
Email: [e-mail]

ADLINK Technology Singapore Pte. Ltd.

Address: 84 Genting Lane #07-02A, Cityneon Design Centre

Tel: [phone]
Fax: [phone]
Email: [e-mail]

ADLINK Technology Singapore Pte. Ltd. (Indian Liaison Office)

Address: #50-56, First Floor, Spearhead Towers

Malleswaram, Bangalore - 560 055, India
Tel: [phone]
Fax: [phone]
Email: [e-mail]

⼲⬄ 374 ɛɳ 4F
KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho,
Chiyoda-ku, Tokyo 101-0045, Japan

802, Mointer B/D, 326 Seocho-daero, Seocho-Gu,
Seoul 137-881, Korea

Singapore 349584

Margosa Main Road (between 16th/17th Cross)

ADLINK Technology, Inc. (Israeli Liaison Office)

Address: 27 Maskit St., Corex Building
PO Box 12777
Herzliya 4673300, Israel
Tel: [phone]
Fax: [phone]
Email: [e-mail]

ADLINK Technology, Inc. (UK Liaison Office)

Tel: [phone]
Email: [e-mail]

50 Getting Service