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Preface iii
Conventions
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NOTE:
NOTE:
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iv Preface
PXES-2590
Table of Contents
Revision History...................................................................... ii
Preface .................................................................................... iii
List of Figures ....................................................................... vii
List of Tables.......................................................................... ix
The ADLINK PXES-2590 is a 9-slot PXI Express chassis with
advanced features and functions. Compliant with PXI Express and
cPCI Express specifications, the PXES-2590 offers one system
slot, one system timing slot, and seven hybrid peripheral slots for
versatile testing and measurement applications requiring
enhanced bandwidth. The hybrid-slot design accepts installation
of CompactPCI, PXI, CompactPCI Express, and PXI Express
modules into any peripheral slot, maximizing flexibility. The PXES2590 is built on a four-link PXI express chassis with up to 8 GB/s
system bandwidth, and 1 GB/s slot bandwidth for all peripheral
slots.
The PXES-2590 implements a smart system monitoring controller,
reporting full chassis status, including fan speed, system voltages,
and internal temperature.
Equipped with an industrial grade AC power supply, the PXES2590 can provide 400 W in environments from 0°C to 55°C, and
features an innovative cooling scheme providing superior heat dissipation. Two 185.9CFM fans in the rear section of the chassis
draw cool air from apertures on the bottom and front of the chassis, over the PXI modules, and exhausted to the rear. This innovative cooling design provides, not only exceptional efficiency of heat
dissipation, but also superior uniformity for each PXI slot. BNC
connectors for 10 MHz clock input/output on the rear panel
increase chassis flexibility, enabling synchronization with supplementary devices.
PXES-2590
Introduction 1
1.1Features
X PXI
X 9-slot PXI Express chassis with one system slot, one sys-
X Four-link PXI Express chassis
X Up to 8 GB/s system bandwidth
X Up to 1 GB/s peripheral bandwidth for all slots
X 0°C to 55°C extended operating temperature range
tem timing slot, and seven hybrid peripheral slots
Z Automatic fan speed control
Z Chassis status monitoring and reporting
Z Remote chassis power on/off control
2 Introduction
PXES-2590
1.2Specifications
The PXES-2590 complies with the PXITM-5 Specification Rev.1.0
and accepts all modules compliant with the PXITM-5 and Compact
PCI specification.
General Specifications
Power Supply
AC Input (*guaranteed by power supply design)
Input voltage range100 to 240 VAC
Operating voltage range*85 to 264 VAC
Input voltage frequency50 to 60 Hz
Operating voltage frequency*47 to 63 Hz
Input current rating
115 VAC13 A
230 VAC10 A
DC Output
Maximum total usable power400 W
VDCMaximumLoad Regulation Maximum Ripple &
Noise
+5V23.0 A±3%50 mV
+12V system slot15.0 A±3%50 mV
+12V peripheral
slots
+3.3V33.0 A±3%50 mV
-12V1.75 A±3%50 mV
10 MHz System Reference Clock (10 MHz REF)
Maximum clock skew between slots300 ps
Built-in 10 MHz clock Accuracy±50 ppm
BNC Output amplitude1 Vpk-pk ±20% square-wave
BNC Output impedance50 Ω ±5 Ω
External 10 MHz clock source input requirements
Frequency input10 MHz ±100 PPM
16.0 A±3%50 mV
into
50 Ω
2 Vpk-pk unloaded
Introduction 3
General Specifications
Input signal (10MHz REF In BNC)100 mVPP to 5 VPP(square
or sine)
Input impedance (10MHz REF In BNC)50 Ω ±5 Ω
Input signal (PXI_CLK10_IN on fifth slot)5 V or 3.3 V TTL signal
100 MHz System Reference Clock: PXIe_CLK100
Maximum slot-to-slot skew100 ps
Accuracy±25 ppm
Cooling
Fans2 sets of 185.9 CFM fans
Per-slot cooling capacity30 W (verified by 55°C
chamber test)
Physical
Slots9
(1 x system slot, 1 x system
timing slot, 7 x hybrid
peripheral slots)
Dimensions321.9 (W) x 191.4 (H) x 465.3
(D) mm (12.7 x 7.5 x 18 in.)
Weight8.8 kg (19.4 lb)
Environmental
StorageAmbient temperature: -20 to
70°C
Relative humidity: 10 to 90%,
noncondensing
OperatingAmbient temperature: 0 to
55°C
Relative humidity10 to 90%,
noncondensing
Functional shock30 G, half-sine, 11 ms pulse
duration
Random VibrationOperating: 5 to 500 Hz, 0.31
Grms, 3 axes
Nonoperating: 5 to 500 Hz,
2.46 Grms, 3 axes
Certification
SafetyEN 61010-1
Electromagnetic CompatibilityEmissions: EN 55011 Class A
Immunity: EN 61326-1
4 Introduction
PXES-2590
General Specifications
CE ComplianceMeets essential requirements
of applicable European
Directives, as amended for
CE Marking:
Low-Voltage Directive
(safety): 73/23/EEC
Electromagnetic Compatibility
Directive (EMC): 9/336/EEC
Introduction 5
1.3Schematics
Please note that all dimensions are shown in mm (millimeters)
177.8
191.4.
302.1
321.9
Figure 1-1: Front View
465.3
Figure 1-2: Right Side View
6 Introduction
Figure 1-3: Left Side View
PXES-2590
Figure 1-4: Top View
Introduction 7
Figure 1-5: Underside View
8 Introduction
1.4Connectors, I/O, and Controls
1.4.1Front Panel
PXES-2590
B
Figure 1-6: PXES-2590 Front Panel
FeatureDetails
APowerPowers the chassis on/off (when
INHIBIT on rear panel (not
shown) is set to “DEF”)
BChassis StatusTemperature, Fan, and Power (L
to R), functions as follows
Table 1-1: Front Panel Legend
Introduction 9
StatusTemperature (Amber)Fan (Green)Power (Blue)
On (Lit)N/AFans operating
normally
OffTemperature is normalChassis is
powered down
BlinkingOne or more
temperature sensors
exceeds threshold
temperature (default
70°C)
One or more
fans falls below
threshold
speed (default
is 800RPM)
DC voltage supply
is normal
Chassis is powered
down
One or more power
rails exceeds
threshold settings
(defaults are ±5%
for 5V, 3.3V, +12V,
and -12V)
Table 1-2: Front Panel Indicators
1.4.2Rear Panel
A
F
G
D
E
C
B
Figure 1-7: PXES-2590 Rear Panel
10 Introduction
PXES-2590
FeatureDetails
A10MHz Reference
Clock Input
The BNC connector acts as a 10MHz reference
clock input, whereby the backplane 10MHz
clock is overridden in the presence of an
external 10MHz clock
B10MHz Reference
Clock Output
CInhibit/Voltage
Monitoring DB-9
Connector
The BNC connector acts as 10MHz reference
clock output
The DB-9 connector monitors the four main
voltage rails via digital multimeter
X voltage rail pin assignments
shown in Figure 1-8
X current limiting resistors on each
voltage rail prevent accidental
overload
X one Inhibit (active low) pin is pro-
vided to power the chassis on/off
when the Inhibit Switch is in the
MAN (manual) position, such that
chassis is powered on when
Inhibit pin is logic high or open,
and off when Inhibit pin is
grounded
DInhibit SwitchIn the DEF (default) position, the front panel
power button turns the power supply on/off, and
in the MAN (manual) position, the INHIBIT pin
on the DB-9 connector turns the power supply
on/off
EFan SwitchIn the HIGH position, fans operate at maximum
speed, and in AUTO, the fans run based on the
monitored chassis temperature
FUniversal Power Inlet Accepts C13 power outlet-equipped connection
GChassis Ground LugThe ground wire can be crimped to the ground
lug, using a crimp tool of the appropriate size,
with the other end connected to ground
Table 1-3: Rear Panel Legend
Introduction 11
Figure 1-8: Inhibit/ Voltage Monitoring Connector
1.4.3Backplane
Figure 1-9: PXES-2590 Backplane
PXI Express System Controller Slot
The System Controller slot is Slot 1 of the chassis as defined
by the PXI specification. The PXES-2590 chassis can accommodate a PXI Express system controller that occupies width up
to 4 slots. As defined in the PXI specification, three controller
expansion slots allow the controller to expand to the left to pre-
12 Introduction
PXES-2590
vent the controller from using up peripheral slots.
PXI Express System Timing Slot
The System Timing (ST) slot is Slot 5, providing one dedicated
single-ended star trigger and 3 pairs of differential star trigger
lines to each peripheral slot. Routing of single ended star trigger signals (PXI_STAR) is as follows
Figure 1-10: Single-ended Star Trigger Routing
Routing of differential star trigger signals (PXIe_DSTAR) is as
follows.
Introduction 13
Figure 1-11: Differential Star Trigger Routing
Star trigger functionality provides a precise trigger signal to the
peripheral modules by installation of a specific star trigger controller module in the ST slot. The star trigger slot can also be
used as a general PXI Express peripheral slot if star trigger
functionality is not required.
PXI Express Hybrid Slots
7 peripheral slots are provided in the PXES-2590, all of which
are PXI Express hybrid slots. Each can accommodate a 3U
PXI Express/CompactPCI Express/ hybrid slot compatible PXI1/CompactPCI peripheral module.
The local bus on a PXI backplane is a daisy-chained bus that
connects each peripheral slot with adjacent peripheral slots to
the left and right. The quantity of local bus lines is decreased
from thirteen to one on a PXI Express backplane. The remain-
Introduction 15
ing local bus line can transmit analog or digital signals between
modules.
Trigger Bus
The trigger bus is an 8-line bus that connects all slots on the
PXES-2590, providing inter-module synchronization. PXI and
PXI Express modules can exchange trigger or clock signals
through the trigger bus, allowing precisely timed response to
asynchronous external events the system is monitoring or controlling.
Reference Clock
The PXES-2590 backplane supplies single-ended 10MHz reference clock (PXI_CLK10) and differential 100MHz clock
(PXIe_CLK100) to each peripheral slot for inter-module synchronization. The independent buffers drive the clock signal to
each peripheral slot.
These common reference clock signals can synchronize multiple modules in a PXI Express chassis. PXI modules with
phase-lock loop circuits can lock reference clocks to generate
an in-phase timebase.
The PXI_CLK10 and PXIe_CLK100 clocks are in-phase
according to the PXI-5 specification. Since the external 10MHz
clock input can override the onboard 10MHz clock source, a
phase-lock loop (PLL) circuit on the backplane synchronizes
the PXIe_CLK100 and external 10MHz clock. Three LED indicators on the left side of the system controller slot indicate status as follows.
16 Introduction
Figure 1-14: PXES-2590 Backplane Indicators
PXES-2590
Left LED (LED 1),
VCXO present
Lights when the
onboard VCXO is
operating, should be
lit at all times
Table 1-4: Backplane Indicator Legend
Middle LED (LED 2),
external clock
present
Lights when external
10MHz clock is
present, including
from BCN connector
on rear panel and
from system timing
slot
Right LED (LED 3),
phase-lock complete
Lights when the
external 10MHz clock
is phase locked by
PLL circuit
The PXES-2590 PXI chassis automatically selects the 10 MHz
reference clock source from
Z Built-in accurate 10 MHz clock source
Z External 10 MHz clock through a BNC connector
Z PXI_CLK10_IN pin on the system timing slot
Priority of 10MHz reference clock is as follows
Introduction 17
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