ADLINK PCIe-9814 User Manual
PCIe-9814
4-CH 12-Bit 80MS/s Digitizer
PCIe-9814/PCIe-9814P
User’s Manual
Manual Rev.: 2.00
Revision Date: Feb. 13, 2015
Part No: 50-11256-1000
Advance Technologies; Automate the World.
Revision History
Revision Release Date Description of Change(s)
2.00 2015/02/13 Initial Release
ii
PCIe-9814
Preface
Copyright 2015 ADLINK Technology, Inc.
This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Disclaimer
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect,
special, incidental, or consequential damages arising out of the
use or inability to use the product or documentation, even if
advised of the possibility of such damages.
Environmental Responsibility
ADLINK is committed to fulfill its social responsibility to global
environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE)
directive. Environmental protection is a top priority for ADLINK.
We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little
impact on the environment as possible. When products are at their
end of life, our customers are encouraged to dispose of them in
accordance with the product disposal and/or recovery programs
prescribed by their nation or company.
Conventions
Take note of the following conventions used throughout this
manual to make sure that users perform certain tasks and
instructions properly.
Preface iii
NOTE:
NOTE:
CAUTION:
Additional information, aids, and tips that help users perform
tasks.
Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.
Information to prevent serious physical injury, component
damage, data loss, and/or program corruption when trying to
complete a specific task.
iv Preface
PCIe-9814
Table of Contents
Preface .................................................................................... iii
List of Figures ....................................................................... vii
List of Tables.......................................................................... ix
1 Introduction ........................................................................ 1
1.1 Features............................................................................... 1
1.2 Applications ......................................................................... 2
1.3 Specifications....................................................................... 2
1.3.1 Analog Input ............................................................... 2
1.3.2 Timebase....................................................................4
1.3.3 Triggers ...................................................................... 5
1.3.4 General Specifications................................................ 6
1.4 Software Support ................................................................. 6
1.4.1 WD-DASK................................................................... 7
1.4.2 LabVIEW Support.......................................................7
1.5 Device Layout and I/O Array................................................ 8
2 Getting Started ................................................................. 11
2.1 Installation Environment .................................................... 11
2.2 Installing the Module.......................................................... 12
3 Operations ........................................................................ 13
3.1 Functional Block Diagram.................................................. 13
3.2 Analog Input Channel ........................................................ 13
3.2.1 Analog Input Front-End Configuration ...................... 13
3.2.2 Input Range and Data Format .................................. 14
3.2.3 DMA Data Transfer................................................... 15
3.2.4 Synchronous Digital Input......................................... 16
3.3 Trigger Source and Trigger Modes.................................... 17
Table of Contents v
3.3.1 Software Trigger ....................................................... 18
3.3.2 External Digital Trigger ............................................. 18
3.3.3 Analog Trigger .......................................................... 18
3.4 Trigger Modes.................................................................... 19
3.4.1 Post Trigger Mode .................................................... 19
3.4.2 Delayed Trigger Mode .............................................. 19
3.4.3 Pre-Trigger Mode...................................................... 20
3.4.4 Middle Trigger Mode................................................. 20
3.4.5 Acquisition with Re-Triggering ..................................21
3.5 Timebase ........................................................................... 22
3.5.1 Internal Sampling Clock............................................ 22
3.5.2 External Reference Clock (PCIe-9814P only) ..........22
3.5.3 External Sampling Clock........................................... 22
3.6 ADC Timing Control ........................................................... 23
3.6.1 Timebase Architecture.............................................. 23
3.6.2 Basic Acquisition Timing........................................... 23
3.7 Synchronizing Multiple Modules ........................................ 25
3.7.2 SSI_TRIG .................................................................28
3.8 SDI..................................................................................... 28
3.9 Multi-boot ........................................................................... 29
A Appendix: Calibration....................................................... 31
A.1 Calibration Constant .......................................................... 31
A.2 Auto-Calibration ................................................................. 31
Important Safety Instructions.............................................. 33
Getting Service ..................................................................... 35
vi Table of Contents
PCIe-9814
List of Figures
Figure 1-1: Analog Input Channel Bandwidth, ±0.2 Vpp............... 4
Figure 1-2: PCIe-9814 Schematic................................................. 8
Figure 1-3: PCIe-9814 I/O Array ................................................... 9
Figure 3-1: Analog Input Architecture ......................................... 13
Figure 3-2: Linked List of PCI Address DMA Descriptors ........... 16
Figure 3-3: Synchronous Digital Input Operations ...................... 17
Figure 3-4: Trigger Architecture .................................................. 17
Figure 3-5: External Digital Trigger ............................................. 18
Figure 3-6: Post-Trigger Acquisition ...........................................19
Figure 3-7: Delayed Trigger Mode Acquisition............................ 20
Figure 3-8: Pre-Trigger Mode Acquisition ................................... 20
Figure 3-9: Middle Trigger Mode Acquisition .............................. 21
Figure 3-10: Re-Trigger Mode Acquisition .................................... 21
Figure 3-11: PCIe-9814 Clock Architecture .................................. 22
Figure 3-12: PCIe-9814 Timebase Architecture ........................... 23
Figure 3-13: Basic Digitizer Acquisition Timing............................. 24
Figure 3-14: Varying Sampling Rates by Adjusting
Scan Interval Counter............................................... 24
Figure 3-15: Card Number Configuration Switch .......................... 27
Figure 3-16: Flash Memory Configuration Switch......................... 29
List of Figures vii
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viii List of Figures
PCIe-9814
List of Tables
Table 1-1: Channel Characteristics................................................... 3
Table 1-2: PCIe-9814 I/O Array Legend ......................................... 10
Table 3-1: Input Range and Data Format ....................................... 14
Table 3-2: Input Range FSR and –FSR Values.............................. 14
Table 3-3: Input Range Midscale Values........................................ 15
Table 3-4: Counter Parameters and Description ............................25
Table 3-5: SSI Signal Location and Pin Definition .......................... 26
Table 3-6: Card Number Configuration Settings............................. 28
Table 3-7: SDI Input vs. Data.......................................................... 28
List of Tables ix
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x List of Tables
1 Introduction
The ADLINK PCIe-9814 is a 4-channel, 12-bit, 80MS/s PCI
Express digitizer providing speedy, high quality data acquisition.
Each of the four input channels supports up to 80MS/s sampling,
with12-bit resolution A/D converter. 40MHz bandwidth analog
input with 50Ω impedance receives ±0.5V, ±1V, ±5V, and ±10V
high speed signals, and a simplified front end and highly stable
onboard reference provide both highly accurate measurement
results and high dynamic performance.
The PCIe-9814, based on x4 lane slot PCI Express technology,
can be used in any standard PCI Express slot, x4, x8, or x16. With
a PCI Express bus interface and extremely large onboard memory
(up to 1GB), the PCIe-9814 easily manages simultaneous 4-CH
data streaming even at the highest sampling rates.
The PCIe-9814 is auto-calibrated with an onboard reference circuit calibrating offset and acquiring analog input errors. Following
auto-calibration, the calibration constant is stored in EEPROM,
such that these values can be loaded and used as needed by the
board. There is no requirement to calibrate the module manually.
PCIe-9814
1.1 Features
X Up to 80MS/s sampling
X 4 simultaneous analog inputs
X High resolution 12-bit ADC
X Up to 40 MHz bandwidth for analog input
X 1GB onboard storage
X Programmable input voltage of ±0.5V, ±1V, ±5V, or ±10V
X Scatter/gather DMA data transfer for high speed streaming
X 10 or 20MHz digital onboard filter (FPGA)
X PLL module provides precise synch (PCIe-9814P only)
X Supports:
Z One external digital trigger input
Z One external clock input
Z Three SDI inputs
X Full auto-calibration
Introduction 1
1.2 Applications
X Testing/monitoring for Energy Management applications,
including:
Z Partial discharge
Z Power line/device monitoring
X Non-destructive testing
X Radar acquisition
X LiDAR
1.3 Specifications
1.3.1 Analog Input
Item Detail Comments
Channels 4 single-ended
Connector type SMB
input coupling DC
ADC resolution 12-Bit
input signal range ±0.5 V, ±1 V, ± 5V, or ± 10V
Bandwidth(-3dB) 40MHz
±10V sine wave / 7 Vrms 50Ω, all ranges
Overvoltage
input impedance
Offset error
Gain error
±10V 1M Ω, ±0.5V or ±1V
±30V 1M Ω, ±5V or ±10V
50 Ω or 1M Ω, software
selectable
±0.5 mV ±0.5V, ±1V
±4 mV ±5V
±10 mV ±10V
50Ω
±1% for all ranges
1MΩ
±0.5% for other ranges
±1% ±10V
2 Introduction
PCIe-9814
Item Detail Comments
150 μV ±0.5V
System Noise
(RMS)
AC Dynamic Performance (10MHz, -1dBFS input signal)
50Ω with filter OFF
SNR 64dB ±0.5V, ±1V, ±5V
THD -74dB ±0.5V, ±1V, ±5V
SFDR 76dB ±0.5V, ±1V, ±5V
1MΩ with filter OFF
SNR 64dB ±0.5V, ±1V, ±5V, ±10V
THD
SFDR
50Ω with filter ON
SNR 65dB ±0.5V, ±1V, ±5V
THD -93dB ±0.5V, ±1V, ±5V
SFDR 78dB ±0.5V, ±1V, ±5V
1MΩ with filter ON
SNR 65dB ±0.5V, ±1V, ±5V, ±10V
THD -93dB
SFDR 78dB
Crosstalk
300 μV ±1.0V
1.5 mV ±5V
2.5 mV ±10V
-71dB ±10V
-73dB ±5V
-75dB ±0.5V, ±1V
72dB ±10V
74dB ±5V
76dB ±0.5V, ±1V
±10V
±5V
±0.5V, ±1V
±10V
±5V
±0.5V, ±1V
-80dB ±0.5V
-90dB ±1V, ±5V, ±10V
Table 1-1: Channel Characteristics
Introduction 3
0
-1
-2
-3
dB
-4
-5
-6
-7
3
10
Figure 1-1: Analog Input Channel Bandwidth, ±0.2 Vpp
1.3.2 Timebase
±5V
±1V
±0.5V
10
&+%DQGZLGWKȍ
4
10
5
Hz
10
6
10
7
10
8
Sample Clock Detail Comment
Timebase options
Internal : onboard crystal
oscillator
External : CLK IN (front panel)
1.22kS/s to
80MS/s
Sampling clock
frequency
Internal : 80MHz
External : 20MHz to 80MHz (CLK
IN)
Timebase accuracy < ± 25ppm
4 Introduction
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