This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Disclaimer
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect,
special, incidental, or consequential damages arising out of the
use or inability to use the product or documentation, even if
advised of the possibility of such damages.
Environmental Responsibility
ADLINK is committed to fulfill its social responsibility to global
environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE)
directive. Environmental protection is a top priority for ADLINK.
We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little
impact on the environment as possible. When products are at their
end of life, our customers are encouraged to dispose of them in
accordance with the product disposal and/or recovery programs
prescribed by their nation or company.
Trademarks
PC, PS/2, and VGA are registered trademarks of International
Business Machines Corp. Borland
and Delphi
Corporation. LabVIEW™ is a trademark of National Instruments
Corporation. Microsoft
Preface iii
®
are registered trademarks of the Borland Software
®
, Visual Basic®, Visual C++®, Windows
®
, Borland® C, C++ Builder®,
®
PCI-9527ADLINK Technology Inc.
NOTE:
NOTE:
CAUTION:
WARNING:
User’s ManualCopyright 2010
98, Windows® NT, Windows® 2000, Windows® XP, and Windows
®
Vista® are registered trademarks of Microsoft® Corporation.
PCI™, is a registered trademark of the Peripheral Component
Interconnect Special Interest Group (PCI-SIG).
Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks
of their respective companies.
Conventions
Take note of the following conventions used throughout this
manual to make sure that users perform certain tasks and
instructions properly.
Additional information, aids, and tips that help users perform tasks.
Information to prevent minor physical injury, component
damage, data loss, and/or program corruption when trying to complete a task.
Information to prevent serious physical injury, compo-
nent damage, data loss, and/or program corruption
when trying to complete a specific task.
ivPreface
ADLINK Technology Inc.PCI-9527
Contact us should you require any service or assistance.
The PCI-9527 is a high-performance, 2-CH analog input and 2-CH
analog output dynamic signal acquisition board. This board is specifically designed for use in audio testing, acoustic measurement,
and vibration analysis applications.
The PCI-9527 features two 24-bit simultaneous sampling analog
input channels. The 24-bit sigma-delta ADC provides a sampling
rate up to 432 KS/s at high resolutions, making it idea for higher
bandwidth dynamic signal measurements. The sampling rate can
be adjusted by setting the onboard DDS clock source to an appropriate frequency. All channels are sampled simultaneously and
accept an input range from ±40 V to ±0.316 V. The PCI-9527 analog input supports software selectable AC or DC coupling and 4
mA bias current for integrated electronic piezoelectric (IEPE) sensors.
The PCI-9527 also has two channels of 24-bit resolution, high
fidelity analog output. The outputs occur simultaneously at software programmable rates up to 216 KS/s. A software programmable output range of 0.1 V, 1 V, and 10 V is available on the output
channels.
Figure 1-1: PCI-9527 Product Image
Introduction 1
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2010
1.1Features
24-Bit Sigma-Delta ADC and DAC
2-CH simultaneous sampling analog inputs
2-CH simultaneous updated analog outputs
432 KS/s maximum ADC sampling rate with software pro-
grammable rate
216 KS/s maximum DAC sampling rate with software pro-
ADLINK provides versatile software drivers and packages to suit
various user approaches to building a system. Aside from program-ming libraries, such as DLLs, for most Windows-based systems, ADLINK also provides drivers for other application
environment such as LabVIEW®.
All software options are included in the ADLINK All-in-One CD.
Commercial software drivers are protected with licensing codes.
Without the code, you may install and run the demo version for
trial/demonstration purposes only up to two hours. Contact your
ADLINK dealers if you want to purchase the software license.
1.4.2Programming Library
For customers who want to write their own programs, ADLINK provides the DSA-DASK function library that is compatible with various operating systems.
1.4.3DSA-DASK
The DSA-DASK includes device drivers and DLL for Windows 98/
NT/2000/XP/Vista/Win7. DLL is binary compatible across Windows 98/ NT/2000/XP/Vista/Win. This means all applications
developed with DSA-DASK are compatible with these Windows
operating systems. The developing environment may be VB,
VC++, Delphi, BC5, or any Windows programming language that
allows calls to a DLL. The DSA-DASK user's and function reference manuals are in the ADLINK All-in-One CD. (\\Manual\Software Package\DSA-DASK).
Introduction 11
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2010
Supported Operating System
Windows 7/ Vista/XP
Linux
Recommended Application Environments
VB.NET/VC.NET/VB/VC++/BCB/Delphi
Driver Support
DAQPilot for Windows
DAQPilot for LabVIEW
DASK for Windows
DASK/X for Linux
Toolbox adapter for MATLAB
Application Software
Dynamic Signal Assistant
ADLINK’s Dynamic Signal Assistant is a ready-to-run
software utility designed for dynamic signal acquisition
modules, such as the PCI-9527. This software provides
a windows-based configuration interface for setting
parameters, in addition to a real-time visualized data display on the screen. An instrument-like user interface is
also provided for basic waveform generation. The
Dynamic Signal Assistant can also log data acquired
from hardware modules. With the Dynamic Signal Assistant, signal acquisition and generation can be performed
in just a few minutes without any programming effort.
12Introduction
ADLINK Technology Inc.PCI-9527
NOTE:
Copyright 2008User’s Manual
2Getting Started
This chapter further describes the proper installation environment,
installation procedures, its package contents and basic information
users should be aware of.
Diagrams and images of equipment illustrated are used
for reference only. Actual system configuration and specs
may very.
2.1Installation Environment
Whenever unpacking and preparing to install any equipment
described in this manual, please refer to the Important SafetyInstructions chapter of this manual.
Only install equipment in well lit areas on flat, sturdy surfaces with
access to basic tools such as flat and cross head screwdrivers,
preferably with magnetic heads as screws and standoffs are small
and easily misplaced.
Recommended Installation Tools
Phillips (cross-head) screwdriver
Flat-head screwdriver
Anti-static Wrist Strap
Anti-static mat
ADLINK PCI-9527 DAQ cards are electro-static sensitive equipment that can be easily damaged by static electricity. The equipment must be handled on a grounded anti-static mat. The operator
must wear an anti-static wristband, grounded at the same point as
the anti-static mat.
Getting Started 13
PCI-9527ADLINK Technology Inc.
CAUTION:
User’s ManualCopyright 2008
Inspect the carton and packaging for damage. Shipping and handling could cause damage to the equipment inside. Make sure that
the equipment and its associated components have no damage
before installing.
The equipment must be protected from static discharge
and physical shock. Never remove any of the socketed
parts except at a static-free workstation. Use the antistatic bag shipped with the product to handle the
equipment and wear a grounded wrist strap when
servicing.
14Getting Started
ADLINK Technology Inc.PCI-9527
WARNING:
Copyright 2008User’s Manual
2.2Package Contents
Before continuing, check the package contents for any damage
and check if the following items are included in the packaging:
PCI-9524 Multi-function Data Acquisition Card
ADLINK All-in-one Compact Disc
Software Installation Guide
PCI-9524 User’s Manual
If any of these items are missing or damaged, contact the dealer
from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the
future.
WARNING: DO NOT install or apply power to equipment
that is dam-aged or if there is missing/incomplete
equipment. Retain the shipping carton and packing
materials for inspection. Please contact your ADLINK
dealer/vendor immediately for assistance. Obtain
authorization from your dealer before returning any
product to ADLINK.
1. Turn off the system/chassis and disconnect the power
plug from the power source.
2. Remove the system/chassis cover.
3. Select the PCI slot that you intend to use, then remove
the bracket opposite the slot, if any.
4. Align the card connectors (golden fingers) with the slot,
then press the card firmly until the card is completely
seated on the slot.
5. Secure the card to the chassis with a screw.
6. Replace the system/chassis cover.
7. Connect the power plug to a power source, then turn on
the system/chassis.
Getting Started 17
PCI-9527ADLINK Technology Inc.
Positive (+)
Negative (-)
User’s ManualCopyright 2008
2.5Signal Connection
2.5.1BNC Connector Polarity
The following figure shows the polarity of the BNC connector:
2.5.2Analog Input Connection
The PCI-9527 input channels can be configured as pseudo-differential or differential. For ground-reference signal source, user
should configure analog input as differential. For floating signal
sources, the analog input should be configured as a pseudo-differential input in order to provide a reference. In pseudodifferential
configuration, the (-) port of AI is connected to ground through a
50 Ω resistor.
If the DUT inputs are ground-referenced, the differential output
mode can be used for the elimination of measuring errors which
caused by ground loops.
If the DUT inputs are in a floating system (ex. a floating earphone),
setting to pseudo-differential output mode will provide a reference
ground connected to the positive output of the BNC through a 50
Ω resistor.
DUT Input Reference Type AO Channel Configuration
Floating Pseudo Differential
Ground-ReferenceDifferential
Table 2-2: Analog Output Connection
Getting Started 19
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2008
20Getting Started
ADLINK Technology Inc.PCI-9527
AI Channel 0
Front End
Circuit
AI Channel 1
Front End
Circuit
AO Channel 0
Front End
Circuit
AO Channel 1
Front End
Circuit
ADC
Interface
DAC
Interface
Offset/Gain
Correction
Offset/Gain
Correction
Local
FIFO
FP
FIFO
PF
FIFO
PCI Interface
DDS
Timing Control
and Trigger In
Calibration
Mux and
Reference Src
PCI Bus
Copyright 2010User’s Manual
3Operation Theory
This chapter contains information about the PCI-9527 operating
concepts, including analog input, analog output, triggering and
timing.
3.1Functional Block Diagram
Operation Theory 21
PCI-9527ADLINK Technology Inc.
ADC
AI+
AI-
Calibratio n
Source
IEPE
x1 or x1/4
+2.5V
10~24V @ 4mA (adjustable)
x1
x3.16
x10
x31.6
User’s ManualCopyright 2010
3.2Analog Input Channel
3.2.1Analog Input Front-End Configuration
Input Configuration, Differential or Pseudo Differential
The differential input mode provides the anode and cathode inputs
of the BNC connector that respond to signal voltage difference
between them. If the signal source is ground-referenced, the differential input mode can be used for the common-mode noise
rejection.
If the signal source is a floating signal, setting to pseudo-differential input mode will provide a reference ground connected to the
cathode input of the BNC through a 50ohm resistor. This will prevent the floating source from drifting over the input common-mode
range.
The recommended configurations for the signal sources are as followes.
The input coupling can be AC or DC. When you select DC coupling, the DC offset present in the input signal is pass to ADC. Use
the DC coupling configuration if the signal source has a small
amount of offset voltage or if the DC content of the signal is important.
When you select AC coupling, the DC offset present in the input
signal is removed. Use the AC coupling configuration if the DC
content of the input signals that you want to reject.
AC coupling enable a high pass R-C filter through the input signal
path. The corner frequency (-3dB) is about 3Hz.
Input for IEPE
For applications that require sensors such as accelerometer or
microphone, PCI-9527 provides an excitation current source.
The common excitation current is usually between 4mA for these
IEPE sensors. A DC voltage offset is generated because of the
excitation current and sensor impedance. When enable the IEPE
current sources, the PCI-9527 will set input configuration to AC
coupling automatically.
Operation Theory 23
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2010
3.2.2Input Range and Data Format
When using an A/D converter, users should first know about the
properties of the signal to be measured. Users can decide which
channel to use and how to connect the signals to the card. Please
refer to section 2.5 for signal connections.
The A/D acquisition is initiated by a trigger source; users must
decide how to trigger the A/D conversion. The data acquisition will
start once a trigger condition is matched. After the end of an A/D
conversion, the A/D data is buffered in a Data FIFO. The A/D data
can now be transferred into the PC's memory for further processing.
The following table illustrates the idea transfer characteristics of
various input ranges of the PCI-9527. The data format of the PCI9527 is 2’s complement.
DescriptionBipolar Analog Input RangeDigital Code
Full-scale Range±40V±10V±3.1622776V ±1V±0.316227V
Least significant bit 4.76uV1.19uV0.37uV0.119uV0.037uV
The ADCs on PCI-9527 are sigma-delta ADC which is very suitable for vibration, audio and acoustic measurement. The analog
side of sigma-delta ADC is a 1-bit ADC. On digital side, it performs
oversampling, noise shaping and digital filtering. For example, if
desired sampling rate is 108KS/s, each ADC samples input signal
at 6.912MS/s, 64 times the sampling rate. The 1-bit 6.912MS/s
data streams from 1-bit ADC to its internal digital filter circuit to
produce 24-bit data at 108KS/s. The noise shaping removes quantization noise from low frequency to high frequency. With the digital filter at the last stage, the digital filter improves the ADC
resolution and removes high frequency quantization noise.
The relationship between ADC sample rate and DDS output clock
is as followed
Sampling Rate2 K - 54 KHz54 K - 108 KHz108 K-216 KHz216 K - 432 KHz
DDS CLK512 K - 13.824 MHz 6.912 M-13.824 MHz 6.912 M-13.824 MHz 13.824 M - 27.648 MHz
Table 3-3: ADC Sample Rates VS DSS Outpu Clock
Filter
Each channel has a two-pole low pass filters. The filters limit the
bandwidth of the signal path and is useful for rejecting out of band
noise.
Operation Theory 25
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2010
3.2.4FIFO and DMA Transfer For Analog Input
FIFO
There is only one FIFO implemented on PCI-9527 for analog input
data storage. The FIFO depth is 4096 samples. The 4096 samples
are shared for both AI channels. When user enables only one AI
channel, the 4096-sample-FIFO is used for one channel data storage. When user enables two AI channels, the 4096-sample-FIFO
shares for both channel.
Bus-mastering DMA Data Transfer
PCI bus-mastering DMA is essential for continuous data streaming, as it helps to achieve full potential PCI bus bandwidth, and
also to improve bus efficiency. The bus-mastering controller controls the PCI bus when it becomes the master of which, and the
host CPU is free of burden since data are directly transferred to
the host memory without intervention. Once analog input operation begins, the DMA returns control of the program. During DMA
transfer, the hardware temporarily stores acquired data in the onboard AD Data FIFO, and then transfers the data to a user-defined
DMA buffer in the computer.
By using a high-level programming library for high speed DMA
data acquisition, users simply need to assign the sampling period
and the number of conversions into their specified counters. After
the AD trigger condition is met, the data will be transferred to the
system memory by the bus-mastering DMA.
In a multi-user or multi-tasking OS, such as Microsoft Windows,
Linux, and so on, it is difficult to allocate a large continuous memory block. Therefore, the PCI controller provides DMA transfer with
scatter-gather function to link non-continuous memory blocks into
a linked list so users can transfer large amounts of data without
being limited by memory limitations. In non-scatter-gather mode,
the maximum DMA data transfer size is 2 MB double words (8 MB
bytes); in scatter-gather mode, there is no limitation on DMA data
transfer size except the physical storage capacity of your system.
Users can also link descriptor nodes circularly to achieve a multibuffered DMA. Figure 4-6 illustrates a linked list that is comprised
of three DMA descriptors. Each descriptor contains a PCI address,
26Operation Theory
ADLINK Technology Inc.PCI-9527
Local Memory
(FIFO )
PCI Bus
r
Copyright 2010User’s Manual
PCI dual address, a transfer size, and the pointer to the next
descriptor. PCI address and PCI dual address support 64-bit
addresses which can be mapped into more than 4 GB of address
space.
First PCI Address
First Dual Address
Trnfr iz
Next Descripto
PCI Addr ess
Dual Address
Trnfr iz
Next Descriptor
Figure 3-1: Linked List of PCI Address DMA Descriptors
The differential output mode provides the anode and cathode outputs of the BNC connector that respond to the DAC outputs voltage difference between them. If the DUT inputs are groundreferenced, the differential output mode can be used for the elimination of measuring errors which caused by ground loops.
If the DUT inputs are in a floating system (ex. a floating earphone),
setting to pseudo-differential output mode will provide a reference
ground connected to the cathode output of the BNC through a
50ohm resistor. This will prevent the floating system from drifting
over its input common-mode range.
The recommended configurations respect to the input reference
types of DUT are as followed.
The following table illustrates the PCI-9527 idea transfer characteristics of various input codes versus output voltages. The data
format of the PCI-9527 is two’s-complement.
DescriptionDigital Input CodeBipolar Analog Output
Table 3-5: Digital Input Code and An a log Output Range
3.3.3DAC and Analog Output Filter
DAC (Digital-to-Analog Converter)
The DACs on PCI-9527 are two 24-bit delta-sigma DACs. It separates the sample rates into four regions between 1KS/s to
216KSps (table 3.3.1). Each region has different bandwidth of
internal digital filter, this will optimize the DA dynamic performance
over all sample rate region. For example, when setting at lower
sample rate, the digital filter bandwidth is lower too. It improves
SNR of output current and release the need for external analog
low pass filter.
The relationship between DAC sample rate and DDS output clock
is as followed
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2010
Analog Front-End Filter
Each channel has a 3-pole low pass filter. The cutoff frequency is
set at 110 KHz to limit the bandwidth of the signal path. This will
mostly reject out of band images and noise.
3.3.4FIFO and DMA Transfer For Analog Output
FIFO
There are two FIFOs implemented on PCI-9527 for the analog
output function. Each FIFO depth is 2048 samples.
Bus-mastering DMA Data Transfer
For analog output operation, the data will be transferred from host
PC memory to onboard FIFO by DMA transfer. Please refer to
section 3.2.4 for detail description.
30Operation Theory
ADLINK Technology Inc.PCI-9527
Trigger Source Mux
Software Trigger
TRG Input
SMB Connector
Digital Trigger Input
Trigger
Decision
To Internal
FPGA Circuit
AI CH0 Analog
Trigger
AI CH1 Analog
Trigger
Copyright 2010User’s Manual
3.4Trigger Source and Trigger Mode
This section describes information about triggering theory of operation. In PCI-9527, the operation of AI and AO share the same
trigger source. Therefore, when user enables AI and AO operation
simultaneously, the trigger signal is valid only when AI and AO are
ready to receive trigger signal. For more detail in programming the
PCI-9527, please refer to software operation manual.
3.4.1Trigger Sources
Figure 3-2: Trigger Architecture of the PCI-9527
Within the PCI-9527, a trigger is a signal that starts the acquisition
of data. When configuring the triggers, you have to decide where
the trigger comes from. PCI-9527 supports internal software trigger, external digital trigger, as well as analog trigger.
Software Trigger
The software trigger is generated by software command. The trigger asserts right after executing specified function calls to begin
the operation.
Operation Theory 31
PCI-9527ADLINK Technology Inc.
Trigger Level
Positive-Slope Trigger Event
Occurs
Negative-Slope Trigger
Event Occurs
Analog
Signal
User’s ManualCopyright 2010
External Digital Trigger
An external digital trigger occurs when a TTL rising edge or a falling edge is detected at the SMB connector on the front panel. As
illustrated in Figure x-x, the trigger polarity can be selected by software. Note that the signal level of the external digital trigger signal
should be TTL compatible, and the minimum pulse width is 25 ns.
Analog Trigger
User can configure the PCI-9527 analog trigger circuitry to monitor
one of analog input channels from which you acquire data. Selecting an analog input channel as the analog trigger channel does not
influence the input channel acquisition operation. The analog trigger circuit generates an internal digital trigger signal based on the
condition between analog signal and the trigger level you defined.
The trigger conditions for analog triggers is described as follows:
Positive-slope trigger: The trigger event occurs when the
analog input signal changes from a voltage that is lower
than the specified trigger level to a voltage that is higher
than the specified trigger level.
Negative-slope trigger: The trigger event occurs when the
analog input signal changes from a voltage that is higher
than the specified trigger level to a voltage that is lower than
the specified trigger level.
32Operation Theory
Figure 3-3: Analog Trigger Conditions
ADLINK Technology Inc.PCI-9527
Time
Operation
start
Trigger
N sampled data
Analog
Input
Trigger Event Occurs
Acquisition or waveform
generation start
Acquisition or waveform generation
stop
Analog
Output
Copyright 2010User’s Manual
3.4.2Trigger Mode
There are two trigger modes working with trigger sources to initiate different data acquisition timing when a trigger event occurs.
The following trigger mode descriptions are applied to analog input
and analog output functions.
Post trigger mode acquisition/generation
Delay trigger mode acquisition/generation
Post Trigger Mode
If user configures the trigger mode as post trigger, following action
begins right after the trigger conditions are met:
The analog input channel acquires a programmed number
of samples at a specified sampling rate.
The analog output channel output pre-defined voltage at a
If user configures the trigger mode as delay trigger, user can specify a delay time from when the trigger event asserts to the beginning of the acquisition and waveform generation. The operation is
illustrated below. The delay time is specified by a 32-bit counter
value and the counter is clocking based on the PCI clock. So the
maximum delay time is the period of PCI_CLK X (232 - 1) while
the minimum delay is the period of PCI_CLK.
To drive the sigma-delta ADC and DAC, an onboard timebase
clock is applied. The timebase clock frequency is much higher
than the sample rate and is produced from a DDS chip. The output
frequency of DDS chip is programmable with excellent resolution.
3.5.2DDS Timing VS ADC/DAC Relationship
Sampling Rate2 K - 54 KHz54 K - 108 KHz108 K - 216 KHz216 K - 432 KHz
Table 3-7: Timing Relationship of the ADC, DAC and DDS Clock
Operation Theory 35
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2010
3.5.3Timing Constraint When AI a nd AO Enabled Simultaneously
As users can see in the section 3.5.1, the ADC and DAC shares
the same Timebase source, i.e. the output of DDS clock. When
users enable the operation of ADC and DAC at the same time,
there are constraints that should be kept in mind:
1. The sampling rate of ADC and the update rate of DAC
are related. When you set the sampling rate of ADC to
certain value before configure DAC, the update rate of
DAC will be limited and fixed corresponding to the sample rate of ADC. When you set the update rate of DAC to
certain value before configure ADC, the sampling rate of
DAC will be limited and fixed corresponding to the
update rate of DAC. Please refer to following table for
detail.
2. Because the ADC and DAC share the same trigger
source, users have to configure both AI and AO operation before trigger event occurs. On the other words, trigger event cannot occur before AI & AO configuration
complete.
The filter delay indicates the time required fro data to propagate
through a converter. Both AI and AO channels have filter delay
due to the filter circuitry and the architecture of the converter. Following tables show the filter delay in ADC and DAC.
ADC Filter Delay
Update Rate (kS/s)Filter Delay (Samples)
2K - 54KSps12
54K-108KSps7
108K-216KSps5
216K-432KSps5
Table 3-8: ADC Filter Delay
DAC Filter Delay
Update Rate (kS/s)Filter Delay (Samples)
2K - 54KSps43.4
54K-108KSps87.5
108K-216KSps176.8
Table 3-9: DAC Filter Delay
Operation Theory 37
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2010
This chapter introduces the calibration process to minimize analog
input measurement errors and analog output errors.
4.1Calibration Constant
The PCI-9527 is factory calibrated before shipment by writing the
associated calibration constants to the onboard EEPROM. Every
time the system boot up, the PCI-9527 driver will load these calibration constants that minimize the error in analog input path and
analog output circuit. ADLINK provides a software API for calibrating the PCI-9527 whenever users want to calibrate the module.
The onboard EEPROM provides three banks for calibration constant storage in PCI-9527. The bank 0, which is the default bank,
records the factory calibrated constants. Bank 0 is written protection that prevents any abnormal auto-calibration process occurred
in user’s environment. The banks 1 and 2, which are user-defined
space, provided for user’s self-calibration constants. When user
execute the auto-calibration process, the calibration constants will
be recorded to bank 1 or 2 based on user assignment.
When PCI-9527 boot up, the driver will access the calibration constants and set to hardware automatically. Without user’s assignment, the driver will load constants stored in bank 0. If user wants
to load constants from bank 1 or 2, user can assign the bank 1 or 2
as the boot up bank through software. Once user re-assign the
bank, driver will load the constants when user re-boot the system.
This setting will be recorded to EEPROM and maintains no
change until user modify it.
Calibration 39
PCI-9527ADLINK Technology Inc.
User’s ManualCopyright 2010
4.2Auto-Calibration
Because errors in measurement and outputs will vary with time
and temperature, it is recommended to re-calibration when the
card is installed in the user’s environment. The auto-calibration
can measure and minimize errors without external signal connections, reference voltages, or measurement devices.
The PCI-9527 has an on-board calibration reference to ensure the
accuracy of auto-calibration. The reference voltage is measured
on the production line and recorded in the on-board EEPROM.
Before begining the auto-calibration procedure, it is recommended
to warm up the PCI-9527 for at least 20 minutes. Please remove
cables before an auto-calibration procedure is initiated.
4.3Offset Error Compensation During AI Sampling
Rate Change
To provide better measurement results, PCI-9527 has an internal
offset error compensation mechanism whenever user changes the
AI sampling rate. Following table shows the compensation time
required when setting different sampling rate. For example, when
changing the sampling rate from 432 KS/s to 2 KS/s, 6.2 sec is
required for offset compensation. Next time when the sampling
rate is set between 2 KS/s and 53.999 KS/s, it is not necessary to
have 6.2 sec for the offset compensation. Only the sampling rate
set to different ranges will cause a compensation time.
Note that it is not necessary to add delay in you application. The
PCI-9527 driver will automatically add the compensation time.
Sampling Rate
Offset Compensation Time
Table 4-1: Offset Compensation Time Required for Different Sampling
This chapter introduces the calibration process to minimize AD
measurement errors and DA output errors.
5.1Loading Calibration Constants
The PCI-9524 is factory calibrated before shipment by writing the
associated calibration constants of TrimDACs firmware to the onboard EEPROM. TrimDACs firmware is the algorithm in the
FPGA. Loading calibration constants is the process of loading the
values of TrimDACs firmware stored in the on-board EEPROM.
ADKLINK provides a software utility for reading the calibration
constants automatically if necessary.
There is a dedicated space for storing calibration constants in the
EEPROM. In addition to the default bank of factory calibration constants, there are three more user-utilization banks. That means
users can load TrimDAC firmware values either from the original
factory calibration or from a calibration that is subsequently performed.
Because errors in measurements and outputs will vary with time
and temperature, it is recommended to re-calibrate when the card
is installed in the user's environment. The auto-calibration function
used to minimize errors will be introduced in the next sub-section.
Calibration 73
PCI-9527ADLINK Technology Inc.
NOTE:
NOTE:
User’s ManualCopyright 2008
5.2Auto-calibration
By using the auto-calibration feature of PCI-9524, the calibration
software can measure and minimize measurement errors without
external signal connections, reference voltages, or measurement
devices.
PCI-9524 has an on-board calibration reference to ensure the
accuracy of auto-calibration. The reference voltage is measured
on the production line through a digital potentiometer and compensated in the software. The calibration constant is memorized after
this measurement.
5.3Saving Calibration Constants
Factory calibrated constants are permanently stored in a onboard
EEPROM data bank and cannot be modified. When you re-calibrate the device, software stores new constants in a user-modifiable section of the EEPROM. To return a device to its initial factory
calibration settings, software copies the factory calibrated constants to the user-modifiable section of the EEPROM. After an
auto-calibration is completed, users can save the new calibration
constants into the user-modifiable banks in the EEPROM. The
date, temperature and calibration constants of the auto-calibration
will be saved. Therefore users can store three sets of calibration
constants according to three different environments and re-load
the calibration constants later.
1) Before auto-calibration starts, it is recommended to warm up
the card for at least 25 minutes.
2) Please remove cables before an auto-calibration procedure
is initiated because the DA outputs will change in the calibration process.