ADLINK PCI-7442 User Manual

NuDAQ

®

PCI-7442/7443/7444

128-CH/64-CH Isolated Digital I/O Cards

User’s Manual

Manual Rev. 2.50
Revision Date: May 7, 2013
Part No: 50-11218-2010

Advance Technologies; Automate the World.

Revision History

Revision Release Date Description of Change(s)

2.01 2007/03/12 Initial Release

2.50 2013/05/07 Updated Package Contents

Copyright 2013 ADLINK TECHNOLOGY INC.
All Rights Reserved.

The information in this document is subject to change without prior
notice in order to improve reliability , design, and function and does
not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, spe­cial, incidental, or consequential damages arising out of the use or
inability to use the product or documentation, even if advised of
the possibility of such damages.

This document contains proprietary information protected by copy­right. All rights are reserved. No part of this manual may be repro­duced by any mechanical, elec tronic, or other means in a ny form
without prior written permission of the manufacturer.

Trademarks
NuDAQ, NuIPC, DAQBench are registered trademarks of ADLINK

TECHNOLOGY INC.
Product names mentioned herein are used for identification pur-

poses only and may be trademarks and/or registered trademarks
of their respective companies.

Getting service

Customer satisfaction is our top priority. Contact us should you
require any service or assistance.

ADLINK TECHNOLOGY INC.

Web Site http://www.adlinktech.com
Sales & Service [e-mail]
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Fax No. [phone]
Mailing Address 9F No. 166 Jian Yi Road, Chungho City,

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Using this manual

1.1 Audience and scope

This manual guides you when using ADLINK NuDAQ® digital
input/output PCI cards. The card’s hardware and register informa­tion are provided for faster application building. This manual is
intended for computer programmers and hardware engineers with
advanced knowledge of data acquisition and high-level program­ming.

1.2 How this manual is organized

This manual is organized as follows:

Chapter 1 Introduction: This chapter intoduces the NuDAQ
digital input/output PCI cards including the card features, spec­ifications, software support information, and package contents.

Chapter 2 Hardware Information: This chapter presents the
cards’ layout and pin definitions for internal and external con­nectors.

Chapter 3 Operation Theory: This section illustrates the tech­nology, features, and functions of the cards.

Chapter 4 Register Format: This chapter provides detailed
descriptions of the register formats that are necessary to oper­ate the cards.

War rant y Pol icy : This presents the ADLINK Warranty Policy
terms and coverages.

®

1.3 Conventions

Take note of the following conventions used throughout the man­ual to make sure that you perform certain tasks and instructions
properly.

NOTE Additional information, aids, and tips that help you per-

form particular tasks.

IMPORTANTCritical information and instructions that you MUST perform to

WARNING Information that prevents physical injury, data loss, mod-

complete a task.

ule damage, program corruption etc. when trying to com­plete a particular task.

List of Tables.......................................................................... iii

List of Figures........................................................................ iv

1 Introduction ........................................................................ 1

1.1 Features............................................................................... 2

1.2 Applications ......................................................................... 2

1.3 Specifications....................................................................... 3

1.4 Unpacking Checklist .................. ... ... .... ... ... ... ... .... ... ... ... .... ... 5

1.5 Software Support................................................................. 6

Programming library .................. .... ... ... ........................... 6

DAQ-LVIEW PnP: LabVIEW® Driver .............................6

DAQBenchTM: ActiveX Controls .................................... 7

2 Hardware Information........................................................ 9

2.1 Card Layout........................ .... ... ... ... .... ................................ 9

Bracket Layout ........ ... ... .... ... ... ...................................... 12

2.2 PCI-7442 Pin Assignments................................................ 13

CN2 Connector .............................................................13

CN1 Connector .............................................................15

2.3 PCI-7443 Pin Assignments................................................ 17

CN2 Connector .............................................................17

CN1 Connector .............................................................19

2.4 PCI-7444 Pin Assignments................................................ 21

CN2 Connector .............................................................21

CN1 Connector .............................................................23

2.5 TTL I/O Connector Pin Assignments ................................. 25

JP3 ............................................................................... 25

JP4 ............................................................................... 25

2.6 Board ID (S1)..................................................................... 26

3 Operation theory .............................................................. 27

3.1 Isolated digital input........................................................... 27

3.2 Change of State (COS) interrupt ....................................... 28

Overview ................................. ............................. .........28

COS detection ..............................................................28

COS detection architecture ...........................................29

3.3 Isolated digital output channels ......................................... 30

3.4 Watchdog timer (WDT)...................................................... 31

3.5 Programmable TTL Input/Output....................................... 31

i

4 Register Format ................................................................ 33

4.1 PCI-7442 I/O Registers...................................................... 33

Isolated Digital Input Register .......................................33

COS Interrupt Control Registers ............................ ... ... .34

Interrupt Status, COS INT Control Read Back Registers 36

COS Setup/Latch Registers ................... ... ... ... .... ... ... ... .37

TTL IO Setup, Status, DO and DI Registers .................38

Isolated Digital Output and Read Back Registers .........40

Power-up DO Setup/Read Register ..............................42

Watchdog Timer Load, Safety DO Setup/Read Back Regis-

ters .................................. .......... ............ ............. .43

WDT INT Control, Hot-Reset, and Hold Control Register 45

4.2 PCI-7443 I/O Registers...................................................... 47

Isolated Digital Input Registers .....................................47

COS Interrupt Control Registers ............................ ... ... .48

Interrupt Status, COS INT Control Read Back Registers 51

COS Setup/Latch Registers ................... ... ... ... .... ... ... ... .53

TTL IO Setup, Status, DO and DI Register ...................55

4.3 PCI-7444 I/O Registers...................................................... 57

Isolated Digital Output/Read Back Registers ................57

Power-up DO Setup/Read Back Register ................. ... .59

WDT Load Config, Safety DO Setup/Read Back Registers

61

WDT INT Control / Hot-Reset Hold Control Register ....63

TTL IO Setup, Status, DO and DI Registers .................65

4.4 Handling PCI Controller Registers........ .... ...... ... ... .... ... ... ... 67

Warranty Policy ..................................................................... 69

ii

List of Tables

Table 2-1: TTL/IO (JP3) Connector Pin Assignments ............. 25

Table 2-2: TTL/IO (JP4) Connector Pin Assignments ............. 25

Table 2-3: Board ID Settings ................................................... 26

List of Tables iii

iv List of Tables

List of Figures

Figure 2-1: PCI-7442 Layout........................................................ 9

Figure 2-2: PCI-7443 Layout...................................................... 10

Figure 2-3: PCI-7444 Layout...................................................... 11

Figure 2-4: PCI-7440 Series Card Bracket ................................ 12

Figure 2-5: PCI-7440 Series Connector Pin Reference............. 12

Figure 3-1: Photo Coupler.......................................................... 27

Figure 3-2: COS Timing ............................................................. 28

Figure 3-3: COS Detection Architecture..................................... 29

Figure 3-4: Common Ground Connection of

Isolated Digital Output ............................................. 30

iv List of Figures

vList of Figures

1 Introduction

The ADLINK PCI-7442, PCI-7443, and PCI-7444 cards are high­density isolated digital I/O cards featuring 128 or 64 channels of
digital input, 128 or 64 channels of digit al output, an d up to 32 TTL
channels for a wide range of PCI bus-based industrial applica­tions.

X PCI-7442: Isolated 64-CH DI and 64-CH DO card
X PCI-7443: Isolated 128-CH DI card
X PCI-7444: Isolated 128-CH DO card

The card series provide a robust 1,250 V
which is suitable for most industrial applications. For PCI chassis
with multiple PCI-7442/7443/7444 installed, the board ID design
feature enables convenient identification of the cards through a
switch jumper, allowing quick troubleshooting and maintenance.

isolation protection

RMS

Introduction 1

1.1 Features

Refer to the comparison table belo w for the card series features.

Features PCI-7442 PCI-7443 PCI-7444

32-bit 3.3 V/ 5 V PCI bus, PnP Yes Yes Yes
Isolated digital input channels 64 128 —
Isolated digital output channels 64 — 128
Change-of-state (COS) detection 64 128 —
Channels with 28 V voltage protection 64 128 —
Channels with 250 mA sink current 64 — 128
Channels with digital output status read

back
DO value retained after hot system reset Yes — Yes
Programmable power-up DO status Yes — Yes
Programmable safety DO status

function when WDT interruption occurs
Watchdog timer Yes — Yes
TTL I/O channels 32 32 32
1250 V

Board ID feature Yes Yes Yes

RMS

isolation

64 — 128

Yes—Yes

Yes Yes Yes

1.2 Applications

The PCI-7442/7443/7444 is suitable for these applications:

X Machine automation
X Industrial ON/OFF control
X External relay driving
X Signal switching
X Laboratory automation

2Introduction

1.3 Specifications

Optical isolated digital input (PCI-7442/PCI-7443 only)

Input channels 64 (PCI-7442)

128 (PCI-7443)

(Note: Use an efficient cooling system and pay particular
attention to the card and chassis temperature when using
the digital input channels.)

Input voltage High: 5 V – 28 V, non-polarity

Low: 0 V – 1.5 V, non-polarity

Input resistance
Isolated voltage 1250 V
Interrupt source Change of State (COS)
Optical isolated digital output (PCI-7442/PCI-7444 only)
Output channels 64 (PCI-7442)

Output type Open drain power MOSFET driver
Output device TPC8206
Output range 5 V – 40 V
Sink current 250 mA for all channel @ 60°C, 100% duty

Isolation voltage 1250 V
Data transfer Programmed I/O
Isolated +5V power supply (PCI-7442/PCI-7444 only)
Output voltage +5 V

Output current 100 mA maximum at 40°C

Programmable TTL I/O

Number of I/O channels 32
Digital logic level TTL / 3.3 V TTL
Current rating 4 mA (max) per channel
Data transfer Programmed I/O

Watchdog timer (PCI-7442/PCI-7444 only)
Base clock available 10 MHz (fixed)

Counter-width 32-bit

Continued on next page.

4.7 k

Ω

RMS

128 (PCI-7444)

(300 mA max.)

RMS

Introduction 3

Safety functions (PCI-7442/PCI-7444 only)

• Programmable power-up DO initial status

• Programmable safety DO status function even during WDT interruption

• Digital output value retention after hot system reset

General specifications

Dimensions 174.7 mm (L) x 106.7 mm (W), standard PCI
Bus 32-bit PCI bus
Operating temperature

Storage temperature

0°C – 60°C

-40°C – 80°C

Humidity 5% to 85% non-condensing

Power

Power consumption PCI-7442: +5 V at 800 mA (typical)

PCI-7443: +5 V at 550 mA (typical)
PCI-7444: +5 V at 800 mA (typical)

Specifications are subject to change without notice.

4Introduction

1.4 Unpacking Checklist

Before unpacking, check the shipping carton for any damage. If
the shipping carton and/or contents are damaged, inform your
dealer immediately. Retain the shipping carton and packing mate­rials for inspection. Obtain authorization from your dealer before
returning any product to ADLINK.

Check if the following items are included in the package.

X PCI-7442/PCI-7443/PCI-7444 card
X ADLINK All-in-One CD
X User’s manual

If any of the items is damaged or missing, contact your dealer
immediately.

NOTE The packaging of OEM versions with non-standard con-

figuration, functionality, or package may vary according

to different configuration requests.

CAUTION The boards must be protecte d from static discharg e and

physical shock. Never remove any of the socketed parts

except at a static-free workstation. Use the anti-static bag

shipped with the product to handle the board. Wear a

grounded wrist strap when servicing.

Introduction 5

1.5 Software Support

ADLINK provides versatile software drivers and packages to
address different approaches in building a system. Aside fr om pro­gramming libraries such as DLLs for many Windows
tems, ADLINK also provides drivers for other software packages
including LabVIEW

®

. All software options may be found in the

ADLINK All-in-One CD.

Programming library

If you are writing you own programs, the following function librar­ies are available:

DOS Library

For Borland C/C++, and Visual C++, the functions descriptions
are included in this user’s guide.

PCIS-DASK

Included device drivers and DLL for Windows
A DLL is a binary compatible across Windows
XP. That means all applications developed with PCIS-DASK
are compatible across Windows
oping environment can be VB, VC++, Delphi, BC5, or any Win-

®

dows

programming language that allows calls to a DLL. The
user’s guide and function reference manual of PCIS-DASK are
in the CD. Refer to the manual files in the All-in-One CD
(\\Manual_PDF\Software\PCIS-DASK).

These software drivers are shipped with the board. Refer to the
Software Installation Guide for installation procedures.

®

98/NT/2000/XP. The devel-

®

-based sys-

®

98/NT/2000/XP.

®

98/NT/2000/

DAQ-LVIEW PnP: LabVIEW® Driver

DAQ-LVIEW PnP contains VIs that are used to interface with the
LabVIEW
dows
free with the board. You can install and use them without a license.
For more information about DAQ-LVIEW PnP, refer to the user’s
guide in the All-in-One CD.

6Introduction

®

software package. DAQ-LVIEW PnP supports Win-

®

95/98/NT/2000/XP. The LabVIEW® drivers are shipped

DAQBenchTM: ActiveX Controls

It is recommended for programmers familiar with ActiveX controls
and VB/VC++ programming to use the DAQBench
trol component library for developing applications. The
DAQBench
For more information about DAQBench

™

is designed under Windows® NT/98 environment.

™

, refer to the user’s guide

™

ActiveX Con-

in the All-in-One CD.

Introduction 7

8Introduction

2 Hardware Information

This chapter provides information on the PCI-7442/7443/7444
card layout, connectors, and pin assignments.

2.1 Card Layout

Figure 2-1 shows the location of the PCI-7442 connectors, switch,
and jumpers.

1

Hardware Information 9

2

Figure 2-1: PCI-7442 Layout

1 CN2 64-CH isolated digital output connector
2 CN1 64-CH isolated digital input connector
3 S1 Board ID DIP switch
4 JP3 16-CH (TTL0~15) TTL I/O connector
5 JP4 16-CH (TTL15~31) TTL I/O connector

3

4

5

Figure 2-2 shows the location of the PCI-7443 connectors and DIP
switch.

1

10 Hardware Information

2

Figure 2-2: PCI-7443 Layout

1 CN2 64-CH isolated digital input connector (IDI 64~127)
2 CN1 64-CH isolated digital input connector (IDI 0~63)
3 S1 Board ID DIP switch
4 JP3 1 6-CH (TT L0~16) TTL I/O connector
5 JP4 16-CH (TTL16~31) TTL I/O connector

3

4

5

Figure 2-3 shows the location of the PCI-7444 connectors and DIP
switch.

1

Hardware Information 11

2

Figure 2-3: PCI-7444 Layout

1 CN2 64-CH isolated digital output connector (IDO 64~127)
2 CN1 64-CH isolated digital output connector (IDO 0~63)
3 S1 Board ID DIP switch
4 JP3 16-CH (TTL0~15) TTL I/O connector
5 JP4 16-CH (TTL15~31) TTL I/O connector

3

4

5

Bracket Layout

CN2B

CN1B

Figure 2-4: PCI-7440 Series Card Bracket

Connector Pin Reference

Terminal B68 Terminal B34

Terminal A1 Terminal A35

CN2B CN2A

CN2A

CN1A

Terminal B68 Terminal B34

Terminal A35 Terminal A1

CN1B CN1A

Terminal B35 Terminal B1

Terminal A68

Terminal A34

Terminal B1 Terminal B35

Terminal A68

Terminal A34

Figure 2-5: PCI-7440 Series Connector Pin Reference

12 Hardware Information

2.2 PCI-7442 Pin Assignments

CN2 Connector

CN2B CN2A

V5V B68 B34 V5V IDO_0 A1 A35 IDO_8

IGND

B67 B33 IGND IDO_1 A2 A36 IDO_9

IGND

B66 B32 IGND IDO_2 A3 A37 IDO_10

IGND

B65 B31 IGND IDO_3 A4 A38 IDO_11

IGND

B64 B30 IGND IDO_4 A5 A39 IDO_12

IGND

B63 B29 IGND IDO_5 A6 A40 IDO_13

IGND

B62 B28 IGND IDO_6 A7 A41 IDO_14

IGND

B61 B27 IGND IDO_7 A8 A42 IDO_15

VDD8

B60 B26 VDD7 VDD1 A9 A43 VDD2
IDO_63
IDO_62
IDO_61
IDO_60
IDO_59
IDO_58
IDO_57
IDO_56

IDO_47
IDO_46
IDO_45
IDO_44
IDO_43
IDO_42
IDO_41
IDO_40

B59 B25 IDO_55 IGND A10 A44 IGND

B58 B24 IDO_54 IGND A11 A45 IGND

B57 B23 IDO_53 IGND A12 A46 IGND

B56 B22 IDO_52 IGND A13 A47 IGND

B55 B21 IDO_51 IGND A14 A48 IGND

B54 B20 IDO_50 IGND A15 A49 IGND

B53 B19 IDO_49 IGND A16 A50 IGND

B52 B18 IDO_48 N/C A17 A51 N/C

N/C

B51 B17 N/C IDO_16 A18 A52 IDO_24

IGND

B50 B16 IGND IDO_17 A19 A53 IDO_25

IGND

B49 B15 IGND IDO_18 A20 A54 IDO_26

IGND

B48 B14 IGND IDO_19 A21 A55 IDO_27

IGND

B47 B13 IGND IDO_20 A22 A56 IDO_28

IGND

B46 B12 IGND IDO_21 A23 A57 IDO_29

IGND

B45 B11 IGND IDO_22 A24 A58 IDO_30

IGND

B44 B10 IGND IDO_23 A25 A59 IDO_31

VDD6

B43 B9 VDD5 VDD3 A26 A60 VDD4

B42 B8 IDO_39 IGND A27 A61 IGND

B41 B7 IDO_38 IGND A28 A62 IGND

B40 B6 IDO_37 IGND A29 A63 IGND

B39 B5 IDO_36 IGND A30 A64 IGND

B38 B4 IDO_35 IGND A31 A65 IGND

B37 B3 IDO_34 IGND A32 A66 IGND

B36 B2 IDO_33 IGND A33 A67 IGND

B35 B1 IDO_32 N/C A34 A68 N/C

Hardware Information 13