CONISTON 1.0
PAGE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
TABLE OF CONTENTS
SYSTEM BLOCK DIAGRAM
POWER BLOCK DIAGRAM
DC & BATTERY CHANGER
BATTERY CONN & SELECT
SYSTEM POWER (+V3A / +V5A)
CPU POWER (+VCC_CORE)
SYSTEM POWER (+VCCP / +V1.5S)
SYSTEM POWER (+V1.8 / +VGAVCC)
SYSTEM POWER
SYSTEM POWER
SYSTEM POWER
CLOCK GENERATOR
YONAH PROCESSOR #1
YONAH PROCESSOR #2
YONAH PROCESSOR #3
YONAH PROCESSOR #4
CALISTOGA ( NB ) #1
CALISTOGA ( NB ) #2
CALISTOGA ( NB ) #3
CALISTOGA ( NB ) #4
CALISTOGA ( NB ) #5
CALISTOGA ( NB ) #6
DDR II CONNECTOR (DIMM I)
DDR II CONNECTOR (DIMM II)
DDR II DECOUPLING
PAGE
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
ATI M52P/M54P/M56P #1
ATI M52P/M54P/M56P #2
ATI M52P/M54P/M56P #3
ATI M52P/M54P/M56P #4
ATI M52P/M54P/M56P #5
ATI M52P/M54P/M56P #6
GPU VRAM #1
GPU VRAM #2
SDVO TO DVI & DVI CONN.
CRT CONNECTOR
LCD INTERFACE
TV-OUT SWITCH
ICH7-M #1
ICH7-M #2
ICH7-M #3
ICH7-M #4
ICH7-M #5
MEDIA BAY PLUG POWER
HDD CONNECTOR & G SENSOR
MEDIA BAY CONNECTOR
LAN CONTROLLER
LAN SWITCH
RJ45 CONNECTOR
KBC CONTROLLER
PAGE
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
SUPER I/O CONTROLLER& BIOS
THERMAL SENSOR & FAN
KB & TP & STICK POINT I/F
1394 CONNECTOR
CARDBUS CONTROLLER
PC CARD & EXPRESS CARD POWER
CARDBUS CONNECTOR
SMART CARD & 5 IN 1 CONN.
SMART CARD CONTROLLER
AUDIO CODEC
AUDIO AMP. & JACK
USB CONNECTOR
MINI CARD
MDC & RJ11 & BLUETOOTH CONN.
DOCKING CONNECTOR
LED & WIRELESS SWCH
TCPA
1394 CONTROLLER
SCREW HOLD
MAIN BOARD TO OTHER BOARD
I/O BOARD
HOTKEY BOARD
TOUCH PAD BOTTOM BOARD
MULTIBAY ODD BOARD
DATE
CHANGE NO.
REV
DRAWER
DESIGN
CHECK
RESPONSIBLE
SIZE
FILE NAME :
XXXXXXXXXXXX
P/N
EE
3
XXXX-XXXXXX-XX
DATE
POWER
VER :
DATE
INVENTEC
TITLE
CONISTON MV
DOC. NUMBER
CODE SIZE
A3
CS
SHEET
17 7
REV
A02 6050A2087001
OF
DVI
CRT
S-VIDEO
( DOCK )
DVI SW
DVI IC
CH 7307
Yonah/Merom
(uFCPGA)
SLG8LP462 (64PIN)
Clock Generator
DVI ( MB )
CRT ( MB )
S-VIDEO
LCM
15.4" TFT
XGA/SXGA
Docking
USB 7
USB 6
PORT REPLICATOR
Camera
Switch
PI5V330
SPI FLASH
(HDCP)
USB 5
Finger Printer
Switch
PI5V330
USB 4
Blue Tooth
MDC / Modem
Module 56K
USB 3
Express Card
RJ11
ATI
VGA CHIP
M52/M54/M56
VRAM
128MB/256MB
USB 2
USB 1
CONN C
3.3V, AZALIA
CONN B
MIC-JACK
PCI Express x16
4GB/Sec
USB 0
CONN A
AUDIO CODEC
AZALIA
RTL ALC883D
FSB, 533/667 MHz
Calistoga
945GM/PM
1466 uFCBGA
DMI x4
ICH7-M
652 BGA
3.3V, LPC_Interface,33MHz
PCI EXPRESS X1
SATA_HDD
SATA_HDD
HDD
PATA_ODD
1.8V, DDR2 Interface, 533/667 MHz
1.8V, DDR2 Interface, 533/667 MHz
EXPRESS CARD
SATA_RAID
Multi-Bay
( MB )
SATA_RAID
Main Board
EXPRESS CARD
3.3V, PCI_Interface,33MHz
6 IN 1
SOLT
DDR2_SODIMM0
ANT
MINI CARD
( DOCK )
CARD READER
SMART CARD
INTEL WRIELESS LAN
OZ128
SOLT
DDR2_SODIMM1
ANT
ANT
1394 CONN
On Main Board
LAN SW
PI3L301D
LAN CONTROLLER IC
BCM5787MKMLG
CARD BUS IC
OZ601
CARDBUS
TYPE II
1394 PORT 1 1394 PORT 2
On Docking
RJ45 ( DOCK )
IEEE 1394
TSB43AB22
(6 Pin)
RJ45 ( MB )
Controller
(4 Pin)
On Docking
BATTERY
System Charger &
DC/DC System power
(IMVP-6
VR)
HP-JACK
SPDIF OUT
SPEAKER
LINE IN
SMSC
KBC1122
BIOS
FLASH ROM
Touch PAD
&
Stick Point
3-AXIS SENSOR
KIONIX KXP84
FIR
SERIAL PORT
( MB & DOCK )
SIO 1036
PARALLEL PORT
CHANGE by
RDEE3 21-Aug-2006
SMSC
( DOCK )
TPM 1.2
INF SLB9635TT
INVENTEC
TITLE
CONISTON MV
BLOCK DIAGRAM
CODE
SIZE
A3
CS
SHEET
DOC. NUMBER
6050A2087001 A02
REV
OF
77 2
DSKDC
+VBAT
5V
+V5S
+V5A
+VADPTR
+V3S
+V1.5S
SCL
SDA
ACOK
+V2.5S
+V1.2S
+VPACK
SKIP#
3V
EN_PSV
EN_PSV
EN_PSV
EN_PSV
+V3A
1.5V
1.8V
VCCP
VCCP
+V3S
+V1.5S
+V0.9S
+V1.8
+VGAVCC
+VCCP
PWM1
PWM2
CHANGE by
SW
IN
+VCC_CORE
SW
IN
INVENTEC
TITLE
CONISTON MV
BLOCK DIAGRAM
SIZE DOC. NUMBER
RDEE3
21-Aug-2006
CODE REV
A3
CS
SHEET
37 7
A02 6050A2087001
OF
(90W BLUE) 6026B0071401
(65W YELLOW) 6026B0071402
JACK700
G2
SINGA_2DC_S006_I17_3P
1
C1156
2
68uF_25v
+VBAT_A +VBAT
R580
12
4.7K_5%
R581
12
4.7K_5%
BAT54S_30V_0.2A
D34
2
3
1
1
2
3
G1
63 8 7 6 5 4 4
ACPRES
CHG_EN#
BAT1_CLK
BAT1_DATA
NFM60R30T222
1
C712
10pF_50v
Q718
AM4825P_AP
8
D
6
5
G
1
2
S
C713
2
0.1uF_25v
1
2
3
R1025
4
1
2
100K_5%
1
R904
432K_1%
2
1
2
CHARGE_GND
C927
1
R903
31.6K_1%
2
OPEN
72 52 5
72 71 68 66 65 60 58 54 53 52 50 4 42 41 40 39 14 12 11 6 5
52
54 52 5
54 52 5
1
2
1
2
+V3A
R899
47K_5%
R898
100K_5%
L701
12
3
4
1
C928
2
0.1uF_25v
CHARGE_GND
R925
12
C923
1
1_5%
2
2.2uF_25v
CHARGE_GND
1
C924
2
1uF_10v
CHARGE_GND
C739
1
10pF_50v
2
1
R926
100K_5%
2
1
R927
100K_5%
2
R905
1
10K_5%
R837
1
0.01_1%_1W
C929
12
0.1uF_25v
2
1
2
2
DOCK_PW
C738
0.1uF_25v
+VBAT_A
4
CHARGE_GND
67
1
C930
0.1uF_25v
2
U716
12
VCC
3
ACN
4
ACP
6
BYPASS#
5
ACDE
11
VREF5
10
AGND
15
S
1
CHGEN#
14
SCL
13
SDA
25
ALARM#
17
IOU
TI_BQ24721_QFN_32P
2
ACDRV#
23
SYS
24
BA DRV#
32
PVCC
30
H DRV
29
PH
31
B S
28
REGN
27
LODRV
26
PGND
22
SYNP
21
SYNN
20
SRP
19
SRN
18
BA
7
EAO
8
EAI
9
FBO
16
ISYNSE
33
ML
R929
12
0_5%
1
2
R906
10_5%
12
D714
13
CHENMKO_BAT54_3P
1
R928
68K_5%
2
CHARGE_GND
C1157
10uF_25v_K_X5R
C931
0.1uF_25v
2
1
12
C956
1uF_25v
1
R901
200K_1%
2
1
2
1
R900
18K_5%
2
C922
100pF_50v
1
C866
2
0.1uF_25v
Q719
1
2
8
2
3
FDS6900AS
1
2
C869
1
2
10uF_25v_K_X5R
5
2
6
7
4
2
1
R902
10K_1%
2
C926
56pF_50v
C925
1
2
1500pF_50v
C868
1
2
10uF_25v_K_X5R
L723
12
PLFC1045R_10uH
10uF_25v_K_X5R
1
2
C904
CHARGE_GND
0.01_1%_1W
0.1uF_25v
C955
1
2
0.1uF_25v
NEAR IC
R1026
12
100K_5%
12
C1170
0.01uF_50v
R888
12
C954
12
CHARGE_GND
Q717
AM4825P_AP
1
S
2
3
10uF_25v_K_X5R
C953
1
2
0.1uF_25v
G
C903
D
8
6
5 4
+VPACK
5
1
2
POWERPAD_4A
C921
1
2
CHARGE_GND
PAD700
Q721
8
D
7
6
5
G
AM4825P_AP
0.1uF_25v
S
+VBAT
1
2
3
4
63 8 7 6 5 4
234
1
R1027
12
100K_5%
INVENTEC
TITLE
CONISTON MV
DC & BATTERY CHANGER
SIZE
A3
CHANGE by SHEET
21-Aug-2006 RDEE3
CS
DOC. NUMBER REV CODE
4
A02 6050A2087001
OF
77
+VPACK
4
+VBAT
63 8 7 6 4 5
1
R406
1M_5%
2
1
R428
56.2K_1%
2
1
R427
180K_1%
2
52
CHG_1
ALARM_LA
ALARM_LA
5
52
CHG_2
5
U29
3
LTH
2
GND
1
HTH
GMT_G680LT1_SOT23_5P
1
R887
10K_5%
2
Q720
2
5
2
FDG6301N_SC70_6
1
R799
10K_5%
2
Q713
2
5
2
FDG6301N_SC70_6
4
RESET#
5
VCC
R886
47K_5%
6
1
4
2
3
2
R800
47K_5%
6
1
4
2
3
2
R317
12
10K_5%
1
2
1
R885
2.2K_5%
2
1
2
1
R801
2.2K_5%
2
72 7 6
D713
SSM34_3A40V
1
S
2
3
AM4825P_AP
D711
SSM34_3A40V
1
S
2
3
4
G
AM4825P_AP
+V5AUXON
Q724
G
2 1
Q712
D
2 1
D
8
7
6
5
+V5LA
8
7
6
5 4
1
2
72 12 6
C445
0.1uF_10v
Q725
1
8
S
D
2
7
3
6
4
5
G
AM4825P_AP
Q709
1
8
D
S
7
2
6
3
54
G
AM4825P_AP
63 8 7 6 4 5
R838
12
52.3K_1%
R839
18.2K_1%
2.7V (12V)
1.8V (9V)
+VBAT
1
1
2
2
1
R365
470K_5%
2
OPEN
1
R364
4.7K_5%
2
6
1
4
3
FDG6301N_SC70_6
1
R108
470K_5%
2
1
R142
4.7K_5%
2
C854
OPEN
R842
200K_1%
C342
1
CHENMKO_BAT54_3P
2
Q28
2
2
5
2
2
C105
1
2
OPEN
Q15
6
1
4
2
2
3
2
FDG6301N_SC70_6
1
R844
100K_1%
2
12
100K_1%
1
1
C856
2
0.1uF_10v
2
D27
+V5A
1
R363
10K_5%
2
G
D
CHENMKO_BAT54_3P
R106
10K_5%
2
5
R843
1 3
1
2
C1139
OPEN
Q745
SSM3K17FU
S
D25
+V5A
1
2
G
SSM3K17FU
S
D
3
2
1
R568
137K_1%
2
1
R566
1
33K_1%
2
2
52
5
1
2
1 3
1
2
1
2
C1138
OPEN
Q746
52
5
+V3A
8
U713 A
+
1
OUT
TI_LMV393IDGKR_SOP_8P
4
1
2
BATTERY1_IN
BAT1_DATA
BAT1_CLK
D28
RLZ4.7B
DCHG_1
ALARM_LA
R567
137K_1%
R565
33K_1%
DCHG_2
ALARM_LA
R841
12
1M_1%
C825
0.1uF_10v
BAT_LATH_RES
CELL_ID
AZ23C6V2
D26
1
RLZ4.7B
2
ACPRES
52
52
54 52 4
54 52 4
D715
BATTERY2_IN
BAT2_CLK
BAT2_DATA
+V3A
1
R840
100K_1%
2
2 52 4
52
R924
100K_5%
1
2
CHANGE by
+V3A
1
2
3
52
52 47 29
52 47 29
UDZS5.6B 2
8
U15 A
1
2
TC7W02FU
4
3
+V3A
D9
1
2
1
2
1
7
1
R922
100K_5%
2
R107
100K_5%
AZ23C6V2
1
R923
SYN_200045MR007G132ZL_7P
0_5%
2
(MAIN BATTERY)
D716
AZ23C6V2
D8
12
3
+V3LA
6
8
U15 B
5
3
6
TC7W02FU
4
CN714
1
1
2
2
3
3
4
4
5
5
6
G1
6
G
G2
7
G
7
CELL_ID
SERIES
VOLTAGE
CN705
1
1
2
2
3
3
4
4
5
5
6
G1
6
G
7
G2
7
G
SYN_200275MR007G168ZL_7P
( 2’nd BATTERY)
2’nd Default 3 Sertes 12.6V
3’nd Dock 3 Sertes 12.6V
BATTERY_IN
R209
12
5
10K_5%
1
C221
2
0.1uF_10v
Q23
D
G
S
SSM3K17FU
21-Aug-2006 RDEE3
TITLE
SIZE
A3
HI
3
12.6V
>
_
BATTERY
LOW
4
16.8V
3V
< 3V
BATTERY NO
IN
ALARM_LA
INVENTEC
CONISTON MV
BATTERY CONN & SELECT
CODE
DOC. NUMBER
CS
SHEET
OF
57 7
REV
A02 6050A2087001
THER_SD#
+V5AUXON
MAX : 5A
+V3A
72 71 68 66 65 60 58 54 53 52 50 47 42 41 40 39 14 12 11 5 4
PAD7
POWERPAD_2_0610
C441
1
2
1uF_10v
72 7 5
C500
9 8 7 6
12
PLC_0755_4R7_5.1A
1
C440
2
330uF_6.3v
1 3
R509
2
17.4K_1%
OPEN
12
+VBATP
1
2
L39
R1552
0_5%_OPEN
C1260
CHENMKO_BAT54_3P
D22
54
OPEN
+VBAT
63 8 7 5 4
1
C468
10uF_25v_K_X5R
1
2
1
2
R510
7.32K_1%
5
2
6
7
4
2
FDS6900AS
PAD8
3
4
POWERPAD_4A
1 2
51120GND
Q44
1
2
8
3
2
+VBATP
9 8 7 6
C470
0.1uF_16v
+V3LA
5
1
C795
68uF_25v
2
2VREF
6
1000pF_50v
1
C499
2
51120GND
51120GND
R508
12
0_5%
R503
12
0_5%
U32
3
6
8
4
5
2
7
1
17
COMP2
CS2
1
2
GND
VFB2
V5FIL
VREG321VREG5
18
19
VO1
VFB1
VREF2
COMP1
33
32
SKIPSEL
31
ONSEL
30
PGOOD1
29
EN1
28
VBS 1
27
DRVH1
26
LL1
25
DRVL1
CS1
PGND1
VIN
23
20
24
22
1
R502
10K_1%
2
VO2
9
TI_TPS51120_QFN_32P
EN5
10
EN3
11
R506
0_5%
1 2
12
12
13
14
15
16
R504
15K_1%
PGOOD2
EN2
VBS 2
DRVH2
LL2
DRVL2
PGND2
C496
4.7uF_25v
R511
12
7.32K_1%
1
2
R514
12
0_5%
12
R521
0_5%
52 40 12 11 10 9 8 7
R513
12
30K_1%
R512
12
OPEN
51120GND
12
C523
0.1uF_16v
SLP_S3#_3R
+VBATP
10uF_25v_K_X5R
C492
8765
D
G
Q46
FDS8884
41S23
8
765
D
G
Q47
FDS6690AS
2VREF
6
S
123
4
1
2
9 8 7 6
1
1
C493
2
2
4.7uF_25v
L43
12
PLC1055P_4.7uH_5.8A
1
R1553
0_5%_OPEN
2
330uF_6.3v
C1261
OPEN
C519
MAX : 7A
72 64 42 12 11 10 9 8 5
+V5A
PAD9
POWERPAD_2_0610
1
C520
1
1uF_10v
2
2
C497
1
10uF_6.3v
2
C494
1uF_6.3v
R505
10_5%
1
2
C495
1
2
1
2
0.1uF_16v
+V5LA
1
2
72 12 5
C498
10uF_6.3v
INVENTEC
TITLE
CONISTON MV
SYSTEM PWR (+V3A/+V5A)
SIZE CODE DOC. NUMBER
A3
CHANGE by OF
21-Aug-2006 RDEE3
CS
SHEET
67 7
REV
A02 6050A2087001
+V5S
72 68 67 61 58 55 54 53 52 48 47 46 42 40 38 37 36 35 32 29 12 10 7
R68
12
C769
P9062
P9060
P9058
P9056
1
2
0_5%
10_5%
1uF_10v
R67
12
0_5%
CPU_SINGNAL_GROUND
C51
1
2
0.0047uF_50v
41
40
39
ML
VID0
VID138VID2
1
EN
2
PWRGD
3
PGDELAY
4
CLKEN
5
U709
FBRYN
6
ADI_ADP3207_LFCSP_40P
FB
7
COMP
8
SS
9
S SE
10
DPRSLP
VRPM
ILIMI
12
13
11
1
R780
82.5K_1%
2
1
R781
100K_1%
2
CPU_SINGNAL_GROUND
+VBAT
63 8 6 5 4
1
R579
0_5%
2
RRPM
1
2
C70
VID337VID4
R
14
1
2
36
35
VID534VID6
RAMPAD
CSREF
LLSE
15
17
16
1
R72
274K_1%
2
R793
237K_1%
31
33
32
PSI
VCC
DPRS P
SENSE
VR
DCM
OD
PWM1
PWM2
PWM3
SW1
SW2
SW3
CSCOMP
CSSUM
GND
19
18
20
CPU_SINGNAL_GROUND
C784
47pF_50v
30
29
28
27
26
25
24
23
22
21
1
2
C69
1uF_10v12
PSI#
H_DPRSTP#
H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
MCH_GOOD
15
39 15
16
16
16
16
16
16
16
8 7
R44
12
R69
12
R70 0_5%
P9061
P9059
P9057
12
0_5%
+V3S
72 70 69 68 66 65 63 62 61 60 58 57 55 54 53 52 49 48 47 46 42 41 40 39 37 36 35 29 25 24 22 19 18 13 12 11 10 7
1
1
2
0.012uF_16v
C773
40 18
12
220pF_25v
1
1.65K_1%
2
16
16
CPU_SINGNAL_GROUND
R43
3K_5%
2
R45
12
0_5%
12
680pF_50v
R784
12
499_1%
C55
1
R47
2
VCCSENSE
VSSSENSE
1000pF_50v
CPU_SINGNAL_GROUND
VR_PWRGD_CK410
IMVP_CKEN#
CPU_SINGNAL_GROUND
PM_DPRSLPVR
C53
1
2
18pF_50v
C52
1
1000pF_50v
2
CPU_SINGNAL_GROUND
54 13 7
3
C772
R46
12
28K_1%
C54
330pF_50v
R42
3K_5%
12
Kevin Sense
R795
R794
C783
1800pF_50v
MCH_GOOD
12
12
R790
12
220K_5%
R791
12
73.2K_1%
1
2
R792
12
165K_1%
R73
12
221K_1%
R71
1
221K_1%
2
12
8 7
0_5%
0_5%
0_5%
R74
52 40 12 11 10 9 8 6
SLP_S3#_3R
+V5AUXON
VR_PWRGD_CK410
+V5S
72 68 67 61 58 55 54 53 52 48 47 46 42 40 38 37 36 35 32 29 12 10 7
C71
4.7uF_10v
BAT54C_30V_0.2A
ADI_ADP3419_RM_MSOP_10P
1
2
U8
1
IN
2
SD
3
DRVLSD
4
CROWBAR
5
VCC
1
3
2
D6
DRVH
DRVL
1
1
C74
R82
2.2_5%
2
0.22uF_10v
2
10
BS
9
8
SW
7
GND
6
+V5S
72 68 67 61 58 55 54 53 52 48 47 46 42 40 38 37 36 35 32 29 12 10 7
C792
4.7uF_10v
BAT54C_30V_0.2A
ADI_ADP3419_RM_MSOP_10P
1
2
U710
1
IN
2
SD
3
DRVLSD
4
CROWBAR
5
VCC
D710
DRVH
DRVL
1
3
1
2
BS
SW
GND
R796
2.2_5%
10
9
8
7
6
2
1
C785
2
0.22uF_10v
BAT54A
72 6 5
54 13 7
+VBATP
9 8 6
1
D3 3
2
10uF_25v_K_X5R
C791
1
1
2
2
10uF_25v_K_X5R
C796
1
1
2
2
R59
12
470K_5%
C62
0.22uF_16v
C790
C788
1
2
0.01uF_50v
0.01uF_50v
R1550
12
0_5%
Q9
FDS6676AS
C799
C797
1
2
0.01uF_50v
0.01uF_50v
R1551
12
0_5%
Q8
FDS6676AS
1
FAIR_NC7WZ17_SC70_6P
2
C789
1
2
765
8
D
G
3
1S2
4
C798
1
2
8765
D
G
41S23
+V3S
72 70 69 68 66 65 63 62 61 60 58 57 55 54 53 52 49 48 47 46 42 41 40 39 37 36 35 29 25 24 22 19 18 13 12 11 10 7
1 2
CHENMKO_BAT54_3P
D4
1
5
U7 A
1
2
8
765
D
Q12
G
FDS8876
3
R63
12
6
470K_5%
52 40
SB_3S_VRMPWRGD
C63 1
2
0.22uF_16v
3
C64
0.1uF_16v
5
U7 B
4
FAIR_NC7WZ17_SC70_6P
2
40 18
PM_PWROK
41S23
L706
12
MPC1040LR45_TOKIN
1
R1012
20_5%
2
C1158
1
2
1000pF_50v
L707
12
MPC1040LR45_TOKIN
1
R1013
20_5%
2
C1159
1
2
1000pF_50v
1
C809
2
330uF_2v_6mR_OPEN
330uF_2v_6mR
1
C134
2
330uF_2v_6mR_OPEN
1
C135
2
330uF_2v_6mR
1
C810
2
330uF_2v_6mR
1
C109
2
1
C108
2
330uF_2v_6mR
4
5
G
4
G
G
4S123
8765
D
S
123
FDS6676AS
8
76
D
S
123
8765
D
FDS6676AS
Q10
Q6
FDS8876
Q7
+VCC_CORE
16
C73
1000pF_50v
1
1
2
2
CPU_SINGNAL_GROUND
C72
1000pF_50v
CHANGE by
INVENTEC
TITLE
CONISTON MV
CPU POWER (+VCC_CORE)
SIZE CODE DOC. NUMBER REV
A3
CS
SHEET OF
22-Aug-2006 RDEE3
77 7
A02 6050A2087001
MAX 8A
+VCCP
42 39 23 22 20 19 16 15 14 13
POWERPAD_2_0610
PAD2
C110
10uF_6.3v
1
1
2
2
C111
220uF_2v_15mR_Panasonic
+VBATP
9 7 6
C78
1
2
4.7uF_25v
10uF_25v_K_X5R
L705
12
PLC1055_2R0_8.2A
63 7 6 5 4
C1262
1
2
0.1uF_25v
52 40 12 11 10 9 7 6 8
SLP_S3#_3R
12
PWR_GOOD_3
1
2
C79
1
R576
OPEN
2
1
C592
OPEN
2
8D765
S
123
8D765
S
12
+VBAT +VBAT
63 7 6 5 4
C1129
1
2
0.01uF_50v
R783
12
OPEN
R782
12
10K_5%
G
Q13
FDS8884
4
G
Q14
FDS6676AS
4
3
R778
12
12.4K_1%
1
2
C768 OPEN
1
C770
OPEN
2
R777
12
30.1K_1%
72 64 42 12 11 10 9 6 5 8
MCH_GOOD
C771
0.1uF_25v
12
R785
12
2.2_5%
51124GND
1
R779
100K_5%
2
2
R776
OPEN
1
R775
OPEN
1 2
5
6
VO2
7
8
9
10
11
12
VFB2
PGOOD2
EN2
VBS 2
DRVH2
LL2
DRVL2
U707
TI_TPS51124RGER_QFN_24P
RIP2
PGND2
14
13
1
R749
R753
18.2K_1%
10K_1%
2
4
ONSEL
V5FIL
15
2
1
OPEN
C767
R774
12
30.1K_1%
51124GND
+V5A +V5A
72 64 42 12 11 10 9 6 5 8
1
2
1
3
VO1
GND
VFB1
GND
PGOOD1
VBS 1
DRVH1
DRVL1
RIP1
V5IN
PGND1
17
16
18
1
2
R771
100K_5%
2
25
24
23
EN1
22
21
20
LL1
19
1
2
C760
1uF_6.3v
R751
12
2.2_5%
R752
2
10_5%
R773
12
30.9K_1%
CHENMKO_BAT54_3P
1
2
C755
12
0.1uF_25v
12 10
+V1.5S_PWRGD
+V5A
1
1
4.7uF_6.3v
2
C766
1000pF_50v
C758
D709
13
R772
12
100K_5%
1
2
8
3
FDS6900AS
Q5
2
52 40 12 11 10 9 7 6 8
SLP_S3#_3R
C787
1
2
4.7uF_25v
5
2
6
7
PLFC1045P_3.3uH
4
2
C786
1
10uF_25v_K_X5R
2
L704
12
1
2
C75
220uF_2v_15mR_Panasonic
65 58 42 40 35 23 22 19 16 10
POWERPAD_2_0610
C58
1
10uF_6.3v
2
MAX 5A
+V1.5S
PAD1
R748
12
0_5%
51124GND
INVENTEC
TITLE
CONISTON MV
SYSTEM PER (+VCCP/+V1.5S)
SIZE
CODE
CHANGE by SHEET OF
22-Aug-2006 RDEE3
A3
DOC. NUMBER REV
CS
87 7
A02 6050A2087001
MAX : 13A
+V1.8
68 25 24 23 18 10
M52
M54
M56
M62
M64
M66
PAD4
POWERPAD_2_0610
C318
10uF_6.3v
1
0
1
0
1
0
1
0
1
0
1
0
PCMB104E_2R2MS
SSM34_3A40V
1
1
C344
2
2
330uF_2v_15mR_Panasonic
+VGAVCC
C437
4.7uF_25v
1
D15
0.95V
0.95V
1.1V
0.95V
1.2V
1.1V
1.2V
1
2
2
1V
1V
1V
X
X
R452 PWR_PLAY R453
90.9K _1% 0402
90.9K _1% 0402
40.2K _1% 0402
40.2K _1% 0402 8.2K _1% 0402
23.7K _1% 0402
23.7K _1% 0402
51K _1% 0402
51K _1% 0402
X
X
52 40 10
R458
SLP_S5#_3R
8 7 6 9
1
2
C436
10uF_25v_K_X5R
R574
OPEN
1
2
C590
OPEN
1
2
1
2
12
100K_5%
8765
D
G
RQA130N03
4 1S23
76
8
5
9
D
G
ROHM_RQW200N03FD5_PSOP_8P
S
4
123
8.2K _1% 0402
8.2K _1% 0402
8.2K _1% 0402
8.2K _1% 0402
8.2K _1% 0402
11.8K _1% 0402 100K _1% 0402
11.8K _1% 0402 100K _1% 0402
11.8K _1% 0402
11.8K _1% 0402
X
X
R457
12
43.2K_1%
1
2
OPENC465
C466
1
2
1000pF_50v
Q31
Q32
R455
12
30.1K_1%
72 64 42 12 11 10 8 6 5 9
R459
OPEN
C435
12
0.1uF_25v
90.9K _1% 0402 (6013A0088701)
40.2K _1% 0402 (6013A0016001)
23.7K _1% 0402 (6013A0015701)
8.2K _1% 0402 (6013A0067301)
100K _1% 0402 (6013A0014701)
51K _1% 0402 (6013A0018501)
11.8K _1% 0402 (6013A008830Y)
M5X
R454
12
30.1K_1%
Q43
DGS
SSM3K17FU
1
C461
0.01uF_16v
2
2
R456
51124_GND
+V5A +VBATP
1
2
R460
12 12
2.2_5%
OPEN
1
R414
OPEN
1 2
5
6
VO2
7
9
10
11
12
VFB2
U30
PGOOD2
TI_TPS51124RGER_QFN_24P
EN2
VBS 2
DRVH2
LL2
DRVL2
RIP2
PGND2
13
14
1
R416
10.2K_1%
2
4
ONSEL
V5FIL
15
51124_GND
+V5A
72 64 42 12 11 10 8 6 5 9
1
R451
2
1
3
VO1
GND
VFB1
GND
PGOOD1
EN1
VBS 1
DRVH1
LL1
DRVL1
RIP1
PGND1
V5IN
18
16
17
1
R413
13.3K_1%
2
OPEN
2
25
24
23 8
22
21
20
19
1
C433
1uF_6.3v
2
C464
R452
12
90.9K_1%
R448
12
200K_5%
D
S
GM INSTALL
0_5%_OPEN
R411
2.2_5%
0.1uF_25v
R415
1
2
10_5%
M6X
R453
12
8.2K_1%
2
1
100pF_50v
R447
12
100K_5%
G
Q42
SSM3K17FU
1
R450
2
C431
2
1
+V5A
C434
1
4.7uF_6.3v
2
C463
1
2
0.01uF_16v
+V5A
28
100K_5%
13
R449
12
4
41S23
72 64 42 12 11 10 8 6 5 9
PWR_PLAY
D20
CHENMKO_BAT54_3P
52 40 12 11 10 8 7 6
C432
4.7uF_25v
765
8
D
Q30
G
FDS6294
S
3 L36
12
8765
9
Q29
D
G
ROHM_RQW200N03FD5_PSOP_8P
1
R575
OPEN
2
1
C591
OPEN
2
SLP_S3#_3R
1
2
PCMB104E_2R2MS
D16
SSM34_3A40V
1
2
12
GM : OPEN
+VBATP
8 7 6 9
1
C395
2
10uF_25v_K_X5R
L35
1
2
C343
220uF_2v_15mR_Panasonic
330uF_2v_15mR_Panasonic
MAX : 16A
+VGAVCC
30 28 27 11
PAD3
POWERPAD_2_0610
C358
1
C317
1
10uF_6.3v
2
2
R412
12
0_5%
51124_GND
CHANGE by
RDEE3 21-Aug-2006
INVENTEC
TITLE
CONISTON MV
SYSTEM PWR (+V1.8/+VGAVCC)
SIZE
CODE
A3
6050A2087001 A02
CS
SHEET OF
REV DOC. NUMBER
77 9
SLP_S5#_3R
SLP_S3#_3R
52 40 9
52 40 12 11 9 8 7 6
+V1.8
68 25 24 23 18 9 10
1
C357
2
10uF_6.3v
1
C356
2
10uF_6.3v
1
2
R375
0_5%
+V5A
72 64 42 12 11 9 8 6 5
11
ML VDDQSNS
10 2
VIN
9
S5
8
GND PGND
7
S3
6
V REF
GMT_G2997F6U_MSOP10_10P
1
C385
2
1uF_6.3v
1
2
C384
1uF_6.3v
VLDOIN
V SNS
M_VREF
U22
V
25 24 18
61 34 33 32 31 30
D
G
AO4406
SSM3K17FU
+V1.8S
1
S
2
3
4
Q730
G
1
R964
470_5%
2
D
1
2
1
2
C1005
C1000
22uF_6.3v
22uF_10v
1
2
C1001
0.1uF_16v
S
Q731
G
SSM3K17FU
+V1.2S
30 27 10
1
R965
470_5%
2
D
S
GM :OPEN
+V1.8
68 25 24 23 18 9 1
C999
1
+V0.9S
34 33 26
PAD5
1
3
4
5
POWERPAD_2_0610
1
C354
2
10uF_6.3v
1
2
C355
10uF_6.3v
2
0.1uF_10v
1
2
C975
3300pF_50v
+V1.5S_PWRGD
SLP_S3_5R
12 8
12 11
Q729
8
6
5
1
R947
100K_5%
2
GM :OPEN
+V3S
72 70 69 68 66 65 63 62 61 60 58 57 55 54 53 52 49 48 47 46 42 41 40 39 37 36 35 29 25 24 22 19 18 13 12 11 7
C438
10uF_6.3v
+V5S
2 68 67 61 58 55 54 53 52 48 47 46 42 40 38 37 36 35 32 29 12 7 10
U27
2
3
4
GMT_G966_25ADJF1Uf_SOP_8P
1
2
C439
0.1uF_10v
1
2
POK1ML
GND
VEN
VIN VO
VPP
9
8
7
AD
6
5
NC
1
2
1
2
R386
OPEN
R385
0_5%
+V2.5S
35 22 18 11
POWERPAD_2_0610
C396
1
2
10uF_6.3v
PAD6
72 68 67 61 58 55 54 53 52 48 47 46 42 40 38 37 36 35 32 29 12 7 10
+V5S
1
R920
330K_5%
2
C952
1
2
0.047uF_10v
+V1.5S
65 58 42 40 35 23 22 19 16 8
+V5S
72 68 67 61 58 55 54 53 52 48 47 46 42 40 38 37 36 35 32 29 12 7 10
1
1
2
2
C951
10uF_6.3v
1
2
36
4
GMT_G966_25ADJF1Uf_SOP_8P
C950
0.1uF_10v
U718
POK9ML
VEN
VIN
VPP
+V1.2S
30 27 10
PAD701
R918
51K_1%
R919
100K_1%
POWERPAD_2_0610
C949
1
2
10uF_6.3v
8
GND
7
AD
VO
5
NC
1
2
1
2
INVENTEC
TITLE
CONISTON MV
SYSTEM POWER
SIZE
CODE DOC. NUMBER
CHANGE by OF
RDEE3 21-Aug-2006
A3
6050A2087001 A02
CS
SHEET
REV
77 10
ONLY FOR M56
BBP_EN
+V3S
72 70 69 68 66 65 63 62 61 60 58 57 55 54 53 52 49 48 47 46 42 41 40 39 37 36 35 29 25 24 22 19 18 13 12 10 7
R831
SLP_S3_5R
12 10 11
12
54.9K_1%
1
2
C839
0.1uF_10v
Q716
4
D
S
3
G
FDC638P
CHENMKO_BAT54_3P 1
+V3A +BBP
U719
1
2
1
2
5
6
C989
2.2uF_6.3v
2N7002_TAP_DIODES
+VGA_3S
R830
150_5%
D712
1
IN
3
SHDN#
GMT_G916T1Uf_SOT23_5_5P_OPEN
+V5A
Q728
2
61 32 30 29 28
C601
1
2
10uF_25v_K_X5R
1
2
3
1
R950
100K_5%
2
3
1
5
OU
4
SE
GND
2
SLP_S3_5R
1
2
1
2
12 10 11
R948
20K_1%
R949
100K_1%
1.5V 20K
1.8V 44.2K
12
30K_1%
R963
1
2
C988
10uF_6.3v
1
2
Q727
312
+V2.5S
35 22 1 10
C967
0.1uF_10v
FDN357N
+VGAVCC
Q726
4
S
D
3
G
FDC638P
CHENMKO_BAT54_3P 1
+VGA_2.5S
30 28 27
1
2
5
6
R946
200_5%
D717
1
2
3
C600
1
2
10uF_25v_K_X5R
SLP_S3#_3R
52 40 12 10 9 8 7 6 11
SLP_S3#_3R
GM : OPEN
52 40 12 10 9 8 7 6 11
RDEE3 21-Aug-2006
INVENTEC
TITLE
CONISTON MV
SYSTEM POWER
SIZE CODE
A3
DOC. NUMBER REV
6050A2087001 A02
CS
SHEET OF CHANGE by
77 11
+V5A
72 64 42 11 10 9 8 6 5 12
SLP_S3_5R
52 40 11 10 9 8 7 6 12
SLP_S3#_3R
SLP_S3_5R
11 10 12
11 10 12
Q45
D
G
S
SSM3K17FU
72 64 42 11 10 9 8 6 5 12
R552
12
200_5%
R551
12
220K_5%
+V5LA
72 6 5
1
R462
10K_5%
2
13
12
220K_5%
CHENMKO_BAT54_3P D21
+V5A +VAUDIO_5S
D24CHENMKO_BAT54_3P
13
4
S
3
FDC638P
C571
12
Q55
G
OPEN
1
D
2
5
6
C572
1
2
4.7uF_6.3v
D23CHENMKO_BAT54_3P
R550
13
R461
12
220K_5%
62
Q52
4
1
D
S
2
5
6 3
G
AO6409
Q53
1
4
D
S
2
5
6
3
G
AO6409
C551
1
2
1000pF_50v
+V3A
72 71 68 66 65 60 58 54 53 52 50 47 42 41 40 39 14 11 6 5 4 12
Q36
4
1
S
D
2
5
6 3
G
AO6409
Q37
4
1
D
S
2
5
6 3
G
AO6409_OPEN
C469
12
2200pF_50v
SSM3K17FU
+V1.5S_PWRGD
SLP_S3#_3R
10 8
52 40 11 10 9 8 7 6 12
Q54
G
SSM3K17FU
Q38
G
BAT54A
1
2
D
S
D1
1
2
D
S
R417
200_5%
R549
200_5%
+V5S
72 68 67 61 58 55 54 53 52 48 47 46 42 40 38 37 36 35 32 29 10 7
1
C550
47uF_6.3v
2
+V3S
1
C442
47uF_6.3v
2
+V3S
72-7 - 9- - - - - 2- - - - 7- - 4- - 2-49- 4 - 47- 4 - 42-4 -4 - 9- 7- - - 29- 2 - 24-22- 9- - - - - 7- 2-
1
R48
100K_5%
2
1
3
2
1
2
C56
0.1uF_16v
+V3A
72-7 - - - - - - 4- - 2- - 47- 42-4 -4 - 9- 4- - - -4- 2-
C57
1
2
0.1uF_10v
5
U5 A
6
1
FAIR_NC7WZ17_SC70_6P
2
8
PWR_GOOD_3
CHANGE by
INVENTEC
TITLE
CONISTON MV
SYSTEM POWER
SIZE
21-Aug-2006 RDEE3
A3
CODE
CS
SHEET
DOC. NUMBER
OF
12 77
REV
A02 6050A2087001
42 39 23 22 20 19 16 15 14 8 13
CPU_BSEL1
CPU_BSEL2
CLK_R3S_ICH14
VR_PWRGD_CK410
18 15
R389
18 15
40
IMVP_CKEN#
+VCCP
2
R486
OPEN
1
1
R484
OPEN
2
10K_5%
2
1
33_5%R388
12
OPEN
7
SSM3K17FU_OPEN
CLK_R3S_SIOPCI
CLK_R3S_SIO14
Layout note: All decoupling 0.047uF disperse closed to pin
C422
C444
1
1
2
42 39 23 22 20 19 16 15 14 8 13
R481
2
1
R390
+V3S
2
1
2
Q39
54 7
D
G
R419
OPEN
2
10K_5%
1
10uF_6 3v
0 047uF_10v
+VCCP
CPU_BSEL0
CLK_R3S_ICH48
CLK_R3S_SMCARDPCI
S
LAYOUT NOTES : THE IREF(PIN_46) SIGNAL VIA R132
SILEGO OPEN; ICS 4.7K OHM
53
53
12
R469 12.1_1%
12
C443
C423
1
2
0 047uF_10v
1
2
0 047uF_10v
C471
1
2
0 047uF_10v
Please place close to CLKGEN within 500mils
30PPM
X2
C420
33pF_50v
12
18 15
40
CLK_R3S_CBPCI
CLK_R3S_1394PCI
CLK_R3S_LPCPCI
CLK_R3S_KBPCI
CLK_R3S_TPMPCI
CLK_R3S_KBC14
ICH_3S_SMDATA
ICH_3S_SMCLK
CLK_R3S_ICHPCI
1
R395
4.7K_5%
2
12
1
14 31818MHZ
2
OPENR 9
C421
1
2
33pF_50v
12
R478
12
R476
1
R472
57
12
R473
12
R466
0
12
R468
65
12
R467
61
12
R465
52
1
R464
69
12
R423
12
R422
52
12
R421
40 25 24
40 25 24
41
CLK_REQB#
+V3S
72-7 - 9- - - - - 2- - - - 7- - 4- - 2-49- 4 - 47- 4 - 42-4 -4 - 9- 7- - - 29- 2 - 24-22- 9- - 2- - -7- -
R420 10K_5%
DOCK_NEWCARD_CLKEN
12.1_1%R424
CLK_3S_KBPCI
CLK_3S_KBC14
C475
1
2
0 047uF_10v
10K_5%
33_5%
CLK_BSEL1
CLK BSEL2
2
33_5%
OPEN
12 1_1%
12 1_1%
12 1_1%
12 1_1%
12 1_1%
2
10K_5%
12 1_1%
OPEN
R463
R474
R471 33_5%
12
12
10K_5%R418
67
+V3S_CLKVDD
1
2
0 047uF_10v
CLK_3S_ICH48
2
1
12
12
65
NFM40P12C223
L38
C474
CLK 3S MINICARDPCI CLK 3S MINICARDPCI
CLK_3S_KBPCI
CLK 3S PMPCI
CLK 3S PMPCI
CLK 3S KBC14
10K_5%
OPEN
1
1
R189
0_5%
2
+V3S
72-7 - 9- - - - - 2- - - - 7- - 4- - 2-49- 4 - 47- 4 - 42-4 -4 - 9- 7- - - 29- 2 - 24-22- 9- - 2- - -7- -
1
1
4
BLM11A121S
L42
3
2
2
C473
1
2
0 047uF_10v
U28
24
VDDSRC
41
VDDSRC
5
CLK_3S_ICHPCI
CLK_REQA#
2
0_5%R38
VDDPCI
10
VDD48
16
VDD
33
VDDSRC
50
VDDCPU
57
X1
56
X2
11
FSLA_USB_48MHZ
15
FSLB_ ES _MODE
59
REF1_FSLC_ ES _SEL
6
PCICLK6
2
PCICLK4
3
PCICLK5
1
PCI_REFSEL_PCICLK3
62
SEL_REQ_PCICLK2
60
REF0_PCICLK1
54
SDA A
53
SCLK
7
SELSRC_LCDCLK#_PCICLK_F1
9
Vtt_PwrGd#_PD
46
VREF
64
CLKREQA#
63
CLKREQB#
4
GND
12
GND
40
GNDSRC
58
GND
17
GND
25
GNDSRC
32
GNDSRC
47
GNDCPU
ICS_ICS9LPR316_TSSOP_64P
PCI_SRC_S OP#
CPUCLK 2_I P_CLKREQC#
CPUCLKC2_I P_CLKREQD#
LCDCLK_SS _SRCCLK 0
LCDCLK_SSC_SRCCLKC0
1
2
VDDREF
CPU_S OP#
CPUCLK 0
CPUCLKC0
CPUCLK 1
CPICLKC1
SRCCLK 5
SRCCLKC5
SRCCLK 8
SRCCLKC8
SRCCLK 7
SRCCLKC7
SRCCLK 6
SRCCLKC6
SRCCLK 4
SRCCLKC4
GNDSRC
GNDSRC
SRCCLK 3
SRCCLKC3
SRCCLK 2
SRCCLKC2
SRCCLK 1
SRCCLKC1
DO _96MHZ
DO C_96MHz
C472
10uF_6 3v
55
8
61
CLK_CPUBCLK
52
CLK_CPUBCLK#
51
CLK_MCHBCLK
49
CLK MCHBCLK#
48
45
44
CLK PEG REF
35
CLK_PEG_REF#
34
CLK_PEG_MCH
43
CLK PEG MCH#
42
CLK_PCIE_CARD
39
38
CLK PCIE CARD#
CLK PCIE ICH
37
CLK PCIE ICH#
36
CLK SATA1
30
31
CLK SATA1#
R491 1
28
R492
12
29
CLK PCIE MINI
26
27
CLK PCIE MINI#
CLK PCIE CARDDOCK
22
23
CLK PCIE CARDDOCK#
CLK PCIE LAN
20
CLK PCIE LAN#
21
SSCLK1 DREF
18
SSCLK1 DREF#
19
CLK DREF
13
CLK DREF#
14
40
PCISTOP#_3
40
12
24 9_1%
24 9_1%
24 9_1%
24 9_1%
R396
24 9_1%
24 9_1%
24 9_1%
24 9_1%
R399
R400
R401 40
R403
2
0_5%
0_5%
SIL OPEN
24 9_1%
24 9_1%
24 9_1%
24 9_1%
R493
R494
12
12
12
10K_5%
1
2
G
Q34
SSM3K17FU
S
D
12
1
2
12
12
1 2
1 2
1 2
1 2
1 2
12
12
12
12
R391
R392
R393
R394
R402
R404
R397
R398
24 9_1%
24 9_1%
24 9_1%
24 9_1%1 2
24 9_1%
24 9_1%
R489
R490
R487
R488
CPUSTOP#_3
14
CLK_R_CPUBCLK
14
CLK_R_CPUBCLK#
20
CLK_R_MCHBCLK
20
CLK_R_MCHBCLK#
18
MCH_CLK_REQ#
58
ICH_NEWCARD_CLKEN
27
CLK_R_PEG_REF
27
CLK_R_PEG_REF#
18
CLK_R_PEG_MCH
18
CLK_R_PEG_MCH#
59
CLK_R_PCIE_CARD
59
CLK_R_PCIE_CARD#
CLK_R_PCIE_ICH
40
CLK_R_PCIE_ICH#
39
CLK_R_SATA1
39
CLK_R_SATA1#
65
CLK_R_PCIE_MINI
65
CLK_R_PCIE_MINI#
67
CLK_R_PCIE_CARDDOCK
67
CLK_R_PCIE_CARDDOCK#
+V3S
NO DOCKING : OPEN
R483 1 2
R485 24 9_1%
R482 24 9_1%
R477 24 9_1%
Close to CLKGEN
1 2
1 2
1 2
1 2
1 2
24 9_1%
24 9_1%R480
24 9_1%R475
49
CLK_R_PCIE_LAN
49
CLK_R_PCIE_LAN#
18
SSCLK1_R_DREF
18
SSCLK1_R_DREF#
18
CLK_R_DREF
18
CLK_R_DREF#
BSEL0
1 0 0
1 1 0
BSEL1
FSB
BSEL2
FSC
FSB CLOCK
FREQUENCY
533
667
HOST CLOCK
FREQUENCY FSA
133
166
CLKREQA#
CLKREQB#
CLKREQC#
CLKREQD#
SRCCLK8
X
SRCCLK7
X
SRCCLK6
X
SRCCLK5
X
SRCCLK4
X
SRCCLK3
X
SRCCLK2
X
SRCCLK1
X
CHANGE by
SRCCLK0
X
RDEE3 21-Aug-2006
INVENTEC
TITLE
CONISTON MV
CLOCK_GENERATOR
DOC. NUMBER
CODE
SIZE
A3
6050A2087001 A02
CS
SHEET
REV
OF
77 13
H_A#(31:3)
H_STPCLK#
H_A20M#
H_FERR#
H_IGNNE#
H_INTR
H_NMI
H_SMI#
20
H A#(3)
H A#(4)
H A#(5)
H A#(6)
H A#(7)
H A#(8)
H A#(9)
H_A#(10)
H A#(11)
H_A#(12)
H A#(13)
H A#(14)
H A#(15)
H A#(16)
H A#(17)
H A#(18)
H_A#(19)
H A#(20)
H A#(21)
H A#(22)
H A#(23)
H_A#(24)
H A#(25)
H_A#(26)
H A#(27)
H A#(28)
H_A#(29)
H A#(30)
H A#(31)
39
39
39
39
39
39
39
H_REQ#(4:0)
H REQ#(0)
H REQ#(1)
H REQ#(2)
H REQ#(3)
H REQ#(4)
H_ADSTB#0
20
H_ADSTB#1
20
20
CN712 1
4
A3#
L4
A4#
M3
A5#
K5
A6#
M1
A7#
N2
A8#
1
A9#
N3
A10#
P5
A11#
P2
A12#
L1
A13#
P4
A14#
P1
A15#
R1
A16#
L2
K3
H2
K2
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
V3
B2
C3
B25
ADDR GROUP 0 ADDR GROUP 1
ADS B0#
REQ0#
REQ1#
REQ2#
3
REQ3#
REQ4#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
5
A25#
3
A26#
A27#
A28#
A29#
A30#
A31#
ADS B1#
A20M#
FERR#
IGNNE#
S PCLK#
LIN 0
LIN 1
SMI#
RSVD01
RSVD02
RSVD03
RSVD04
RSVD05
RSVD06
2
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
FOX_PZ47823_2743_01_478P
DEFER#
CONTROL
XDP/ITP SIGNALS
PROCHO #
HERMDA
HERMDC
THERM
HERM RIP#
H CLK
RESERVED
ADS#
BNR#
BPRI#
DRDY#
DBSY#
BR0#
IERR#
INI #
LOCK#
RESE #
RS0#
RS1#
RS2#
RDY#
HI M#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
RS #
DBR#
BCLK0
BCLK1
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
+VCCP
42 39 23 22 20 19 16 15 13 8 14
CLOSED TO CPU
1
R815
R812
56_5%
56_5%
2
2
1
R187
56_5%
2
+VCCP
42 39 23 22 20 19 16 15 13 8 14
1
R816
56_5%
2
H BPM5_PREQ#
H_TCK
TDI_FLEX
H_TMS
H_TRST#
40
ITP_DBRESET#
54
H_THERMDA
54
H_THERMDC
PM_THRMTRIP#
13
CLK_R_CPUBCLK
13
CLK_R_CPUBCLK#
20
20
20
20
20
20
20
39
20
20
20
20
20
ICH7
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BREQ#0
H_INIT#
H_LOCK#
H_CPURST#
H_TRDY#
H_HIT#
H_HITM#
H RS#(0)
H RS#(1)
H RS#(2)
1
R814
56_5%
2
+VCCP
20
H_RS#(0:2)
+V3A
72 71 68 66 65 60 58 54 53 52 50 47 42 41 40 39 12 11 6 5 4
11
R188
240_5%
2
1
R813
56_5%
2
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
F3
F4
G3
G2
G6
HI #
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
CK
AA6
DI
AB3
DO
AB5
MS
AB6
C20
D21
A24
A25
C7
A22
A21
22
D2
F6
D3
C1
AF1
D22
C23
C24
12
R186
56_5%
42- 9-2 -22- 2 - 9- - - - - 4-
10mils/25mils
+VCCP
54 39 18
5mils/10mils
GMCH CPU
Routing on internal Layer
PM_THRMTRIP# Routing on one Layer
2 : 1 trace space ratio
RDEE3
21-Aug-2006
INVENTEC
TITLE
CONISTON MV
YONAH-1/4
DOC. NUMBER
CODE
A3
CS
SHEET CHANGE by
14 77
REV SIZE
A02 6050A2087001
OF
H_D#(63:0)
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#(63:0)
+VCCP
42 39 23 22 20 19 16 14 13 8 15
1
R170
1K_1%
2
H_GTLREF
1
R168
2K_1%
CLOSED TO CPU WITHIN 0.5"
2
20 15
20
20
20
20 15
Notice:
25 mil spacing away form other switching signal
CN712 2
H_D#(0)
H D#(1)
H D#(2)
H_D#(3)
H D#(4)
H_D#(5)
H_D#(6)
H D#(7)
H_D#(8)
H D#(9)
H_D#(10)
H D#(11)
H D#(12)
H_D#(13)
H D#(14)
H_D#(15)
H D#(16)
H D#(17)
H_D#(18)
H D#(19)
H_D#(20)
H D#(21)
H_D#(22)
H_D#(23)
H D#(24)
H_D#(25)
H D#(26)
H D#(27)
H_D#(28)
H D#(29)
H_D#(30)
H D#(31)
H_DSTBN#1
H_DSTBP#1
H_DINV#1
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2 PSI#
20 20
20
20
18 13
18 13
18 13
1
1
R185
51_5%
R182
OPEN
2
2
E22
D0#
F24
D1#
E26
D2#
H22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
D9#
24
D10#
23
D11#
H26
D12#
DATA GRP 0 DATA GRP 1
F26
D13#
K22
D14#
H25
D15#
H23
DS BN0#
G22
DS BP0#
26
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L25
D20#
L22
D21#
L23
D22#
M23
D23#
P25
D24#
P22
D25#
P23
D26#
24
D27#
R24
D28#
L26
D29#
25
D30#
N24
D31#
M24
DS BN1#
N25
DS BP1#
M26
DINV1#
AD26
G LREF
C26
ES 1
D25
B22
B23
C21
MISC
ES 2
BSEL0
BSEL1
BSEL2
FOX_PZ47823_2743_01_478P
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
DATA GRP 2 DATA GRP 3
D45#
D46#
D47#
DS BN2#
DS BP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DS BN3#
DS BP3#
DINV3#
COMP0
COMP1
COMP2
COMP3
DPRS P#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
18 / 25 mil
5 / 25 mil
18 / 25 mil
5 / 25 mil
12
R184 27.4_1%
12
12
R818
12
NOTE:
COM0, COM2, trace impedance
should be 27.4 ohm
COM1, COM3, trace impedance
should be 55 ohm
H_D#(32)
H D#(33)
H D#(34)
H_D#(35)
H D#(36)
H_D#(37)
H_D#(38)
H D#(39)
H_D#(40)
H D#(41)
H_D#(42)
H D#(43)
H D#(44)
H_D#(45)
H D#(46)
H_D#(47)
H D#(48)
H D#(49)
H_D#(50)
H D#(51)
H_D#(52)
H D#(53)
H_D#(54)
H_D#(55)
H D#(56)
H_D#(57)
H D#(58)
H D#(59)
H_D#(60)
H D#(61)
H_D#(62)
H D#(63)
54.9_1%R169
27.4_1%
54.9_1%R817
39 7
39
20
39 20
20
20
7
H_DSTBN#3
H_DSTBP#3
H_DINV#3
CLOSED TO CPU
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_CPUSLP#
20 15
H_D#(63:0)
20
H_DSTBN#2
20
H_DSTBP#2
20
H_DINV#2
20 15
H_D#(63:0)
+VCCP
42 39 23 22 20 19 16 14 13 8 15
2
R183
OPEN
1
CLOSED TO CPU
39
H_PWRGD
CHANGE by
RDEE3 21-Aug-2006
INVENTEC
TITLE
CONISTON MV
YONAH-2/4
SIZE
A3
DOC. NUMBER
6050A2087001 A02
CS
SHEET
REV CODE
OF
77 15
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (NORTH SIDE
PRIMARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE
PRIMARY)
C832
1
22uF_6.3v
C814
1
2
22uF_6.3v
C836
1
2
22uF_6.3v
C830
1
2
22uF_6.3v
C812
1
2
OPEN
C187
1
2
OPEN
C831
1
2 2
22uF_6.3v
C826
1
2
22uF_6.3v
C834
1
2
22uF_6.3v
C829
1
2
22uF_6.3v
C184
1
2
OPEN
C857
1
22uF_6.3v
C858
1
2
22uF_6.3v
C835
1
2
22uF_6.3v
C159
1
2
22uF_6.3v
C828
1
2
22uF_6.3v
C837
1
2
22uF_6.3v
C838
1
2
22uF_6.3v
C833
1
2
22uF_6.3v
C827
1
2
OPEN
C188
1
2
OPEN
C189
1
2
OPEN
+VCC_CORE
1
2 2
1
2
1
2
1
2
NOTE:
NO_STUFF
22UF X 12
C813
22uF_6.3v
C160
22uF_6.3v
C185
22uF_6.3v
C186
22uF_6.3v
7 16
CN712 3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
AA10
VCC053
AA12
VCC054
AA13
VCC055
AA15
VCC056
AA17
VCC057
AA18
VCC058
AA20
VCC059
AB9
VCC060
AC10
VCC061
AB10
VCC062
AB12
VCC063
AB14
VCC064
AB15
VCC065
AB17
VCC066
AB18
VCC067
FOX_PZ47823_2743_01_478P
VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099
VCC0100
VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCA
VCCSENSE
VSSSENSE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
6
K6
M6
21
K21
M21
N21
N6
R21
R6
21
6
V21
W21
B26
AD6
VID0
AF5
VID1
AE5
VID2
AF4
VID3
AE3
VID4
AF2
VID5
AE2
VID6
AF7
AE7
+VCC_CORE
7 16
+VCCP
42 39 23 22 20 19 15 14 13 8
C192
+VCCP
42 39 23 22 20 19 15 14 13 8
1
C190
2
330uF_2.5v
1
2
0.1uF_10v
+V1.5S
65 58 42 40 35 23 22 19 10 8 16
7
H_VID0
7
H_VID1
+VCC_CORE
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
1
2
7 16
1
R150
100_5%
2
7
VSSSENSE
LAYOUT NOTE
ROUTE VCCSENSE AND VSSSENSE TRACE AT
27.4 OHM WITH 50 MIL SPACING.
PLACE PU AND PD WITHIN 1 INCH OF CPU
R151
100_5%
7
7
7
7
7
7
C191
1
2
0.1uF_10v
VCCSENSE
PLACE THESE INSIDE SOCKET
CAVITY ON L8 SIDE (NORTH SIDE
SECONDARY)
C158
C183
1
2
0.1uF_10v
+V1.5S
1
2
1
1
2
2
0.1uF_10v
65 58 42 40 35 23 22 19 10 8 16
C59
10uF 6.3v
LAYOUT NOTE
PLACE NEAR PIN B26
C181
0.1uF_10v
C60
1
2
0.01uF_16v
C182
1
2
0.1uF_10v
" Kelvin " Trace
Layout notice :
VCCSENSE & VSSSENSE traces must be paralleled to IMVP6
( Trace net type is 18 / 7 mil )
CHANGE by
RDEE3 21-Aug-2006
INVENTEC
TITLE
CONISTON MV
YONAH-3/4
CODE DOC. NUMBER
SIZE
A3
CS
SHEET
6050A2087001
REV
A02
OF
77 16
CN712 4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
A26
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
2
VSS061
5
VSS062
22
VSS063
25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
FOX_PZ47823_2743_01_478P
VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS0100
VSS0101
VSS0102
VSS0103
VSS0104
VSS0105
VSS0106
VSS0107
VSS0108
VSS0109
VSS0110
VSS0111
VSS0112
VSS0113
VSS0114
VSS0115
VSS0116
VSS0117
VSS0118
VSS0119
VSS0120
VSS0121
VSS0122
VSS0123
VSS0124
VSS0125
VSS0126
VSS0127
VSS0128
VSS0129
VSS0130
VSS0131
VSS0132
VSS0133
VSS0134
VSS0135
VSS0136
VSS0137
VSS0138
VSS0139
VSS0140
VSS0141
VSS0142
VSS0143
VSS0144
VSS0145
VSS0146
VSS0147
VSS0148
VSS0149
VSS0150
VSS0151
VSS0152
VSS0153
VSS0154
VSS0155
VSS0156
VSS0157
VSS0158
VSS0159
VSS0160
VSS0161
VSS0162
P6
P21
P24
R2
R5
R22
R25
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
1
4
23
26
CHANGE by
INVENTEC
TITLE
CONISTON MV
YONAH-4/4
CS
SHEET
DOC. NUMBER
17 77
21-Aug-2006 RDEE3
A3
REV CODE SIZE
A02 6050A2087001
OF
3.6K_5%
3.6K_5%
12
R349
MCH_ICH_SYNC#
MCH_CLK_REQ#
41
3
+V2.5S
35 22 11 10
12
R348
SDVO_CTRCLK
SDVO_CTRDAT
PM_PWROK
PLT_RST#
40 7
35
35
52 41 35
100_5%
R373
2
12
1
0_5%
R374
PM_THRMTRIP#
PM_DPRSLPVR
PM_EXTTS#0
BM_BUSY#
40
54 39 14
25 24
40 7
R360
R361
12
12
0_5%
0_5%
2
10K_5%
2
MCH CFG(20)
R359
OPEN
1
R362
1
MCH CFG(17)
MCH_CFG(18)
MCH CFG(19)
+V3S
MCH_CFG(16)
MCH CFG(13)
MCH_CFG(14)
MCH CFG(15)
MCH CFG(9)
MCH CFG(10)
MCH_CFG(11)
MCH CFG(12)
MCH_CFG(20:3)
18
MCH CFG(3)
MCH CFG(4)
MCH CFG(5)
MCH CFG(6)
MCH CFG(7)
MCH CFG(8)
CPU_BSEL2
CPU_BSEL0
CPU_BSEL1
15 13
15 13
15 13
R245
R246
R244
1
1
1
2
2
2
1K_5%
1K_5%
1K_5%
MCH_BSEL0
MCH_BSEL2
MCH_BSEL1
AW41
NC17
AY41
AW1
AY1
A40
A39
A4
B2
NC13
NC14
NC15
NC16
NC10
NC11
NC12
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
A3
NC18
BA41
BA40
BA39
BA3
BA2
BA1
B41
NC8
NC9
C41
C1
NC2
NC3
NC4
NC5
NC0D1NC1
NC6
NC7
NC
ODT)
(FSB Dynamic
MCH_CFG(16)
DMI
DMI_ XP_0
DMI_ XP_1
DMI_ XP_2
DMI_ XP_3
AE41
AF37
AG41
DMI RXP(1)
DMI_RXP(2)
DMI_RXP(3)
MCH_CFG(9)
Lane
PCIE Graphics
AC37
DMI_RXP(0)
40
DMI_RXP(3:0)
DMI_ XN_0
DMI_ XN_1
DMI_ XN_2
DMI_ XN_3
AE37
AF41
AG37
AH41
DMI_RXN(1)
DMI_RXN(2)
DMI_RXN(3)
MCH_CFG(5)
DMI_RXP_3
DMI RXN(0)
40
DMI_RXN(3:0)
K28
H32
ICH_SYNC#
CLK_REQ#
MISC
DMI_RXP_2
DMI_RXP_0
DMI_RXP_1
AF35
AG39
AC35
AE39
DMI_TXP(0)
DMI TXP(1)
DMI_TXP(2)
DMI_TXP(3)
AH34
H28
H27
RS IN#
SDVO_C RLCLK
SDVO_C RLDA A
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AF39
AG35
AH39
DMI_TXN(1)
DMI TXN(2)
DMI_TXN(3)
40
DMI_TXP(3:0)
MCH_CFG(6)
MCH_CFG(5)
AH33
H26
F25
G6
PM_EX S#_0
PM_EX S#_1
PM_ HRM RIP#
PWROK
PM_BMBUSY#
PM
CLK
D_REFSSCLKIN#
D_REFSSCLKIN
DMI_RXN_0
D41
AE35
13
SSCLK1_R_DREF#
SSCLK1_R_DREF
DMI_TXN(0)
40
DMI_TXN(3:0)
MCH_CFG(10)
MCH_CFG(11)
MCH_CFG(16)
MCH_CFG(7)
MCH_CFG(9)
G28
K27
26
CFG_19
CFG_20
D_REFCLKIN#
D_REFCLKIN
G_CLKIN#
G_CLKIN
A26
A27
C40
AG33
AF33
13
13
13
13
13
CLK_R_PEG_MCH#
CLK_R_PEG_MCH
CLK_R_DREF#
CLK_R_DREF
MCH_CFG(13)
MCH_CFG(12)
H15
CFG_16
CFG_1725CFG_18
0 47uF_6 3v
2
80.6_1%
G18
H16
CFG_15
CFG_14
SM_VREF_0
SM_VREF_1
AK41
12
C882
M_VREF
R282
C15
AK1
25 24 10
1
K15
CFG_13
G15
D15
E16
CFG_10
CFG_11
CFG_12
SM_RCOMP#
SM_RCOMP
A 9
AV9
MCH SMRCOMPN
2
G16
D16
CFG_8
CFG_9
SM_OD _2
SM_OD _3
AY20
AU21
26 25
26 25
M_ODT2
M_ODT3
80.6_1%
R283
R281
2
2
OPEN
D19
E18
CFG_5
CFG_6
CFG_7
SM_OD _0
SM_OD _1
BA13
BA12
26 24
26 24
M_ODT0
M_ODT1
1
OPEN
1
1
R342
K16
K18
E15
F18
F15
18
CFG_2
CFG_3
CFG_4
CFG_0
CFG_1
SM_OCDCOMP_0
SM_OCDCOMP_1
DDR MUXING
SM_CS#_2
SM_CS#_3
AY21
AW21
AL20
AF10
26 25
26 25
M_CS2#
M_CS3#
+V1.8
68 25 24 23 10 9
M_OCDCOMP0
M_OCDCOMP1
SM_CS#_0
SM_CS#_1
AW13
AW12
26 24
26 24
M_CS0#
M_CS1#
D27
RSVD_12
RSVD_13
SM_CKE_3
SM_CKE_1
SM_CKE_2
AY29
BA29
26 25
26 25
M_CKE1
M_CKE2
M_CKE3
A35
A34
D28
RSVD_9
RSVD_10
RSVD_11
RSVD CFG
SM_CKE_0
SM_CK#_3
AU20
A 20
26 24
26 24
M_CLK_DDR4#
M_CKE0
AG11
AF11
A41
H7
19
RSVD_8
RSVD_4
RSVD_5
RSVD_6
RSVD_7
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK_3
AW35
A 1
AY7
AY40
24
24
25
25
M_CLK_DDR0#
M_CLK_DDR1#
M_CLK_DDR3#
M_CLK_DDR4
R32
F3
F7
32
U717 2
RSVD_1
RSVD_2
RSVD_3
SM_CK_0
SM_CK_1
SM_CK_2
AY35
AR1
AW7
AW40
24
24
25
25
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR3
72 70 69 68 66 65 63 62 61 60 58 57 55 54 53 52 49 48 47 46 42 41 40 39 37 36 35 29 25 24 22 19 13 12 11 10 7 18
CHANGE by
RDEE3
21-Aug-2006
SIZE
A3
CODE
CS
SHEET
6050A2087001 A02
DOC. NUMBER
18
OF
77
REV
CALISTOGA-1/6
TITLE
INVENTEC
CONISTON MV
HIGH Dynamic ODT
LOW Dynamic ODT
Disable
Enabled
HIGH Normal operation
LOW Reverse Lane
MCH_CFG(10)
HOST PLL VCO
SELECT
LOW RESERVED
HIGH MOBILITY
MCH_CFG(11)
HIGH Reserved
LOW Calistoga
HIGH DMIx4
LOW DMIx2
MCH_CFG(6)
(DDR)
LOW Moby Dick
HIGH Calistoga
MCH_CFG(7)
(CPU Strap)
LOW RSVD
HIGH Mobile CPU
2
2
2
2
2
2
2
2
2
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
R277
R334
R332
R336
R907
R908
R333
R278
R279
(PCIE Backward
Interpoerability
MCH_CFG(20)
mode)
18
18
1
1
1
1
1
1
1
1
1
18
18
18
18
18
18
18
operational
simultaneously via the PEG port
HIGH SDVO and PCIE x1 are operating
LOW Only SDVO or PCIE x1 is
MCH_CFG(18)
(VCC Select)
LOW 1.05V
HIGH 1.5V
REVERSAL)
(DMI LANE
MCH_CFG(19)
HIGH LANES REVERSED
LOW Normal
MCH_CFG(18)
MCH_CFG(19)
MCH_CFG(20)
18
18
18
2
2
2
OPEN
OPEN
R355
R353
OPEN
1
1
R351
+V3S
1
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXP15
PEG_TXN15
C398
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
0 1uF_16v12
C399
0 1uF_16v
12
C361
0 1uF_16v
12
C363
12
0 1uF_16v
C401
0 1uF_16v
12
C404
0 1uF_16v12
C365
0 1uF_16v12
C367
0 1uF_16v
12
C405
0 1uF_16v
12
C406
0 1uF_16v12
C369
12
0 1uF_16v
C370
0 1uF_16v
12
C407
0 1uF_16v12
C408
0 1uF_16v
12
C371
0 1uF_16v
2
1
C372
0 1uF_16v12
C409
0 1uF_16v12
C410
0 1uF_16v
12
C373
0 1uF_16v
12
C374
12
0 1uF_16v
C411
0 1uF_16v
12
C412
0 1uF_16v
12
C375
2
0 1uF_16v1
C376
0 1uF_16v
12
C413
0 1uF_16v
12
C414
0 1uF_16v12
C377
0 1uF_16v12
C378
2
0 1uF_16v
1
C415
0 1uF_16v
12
C416
0 1uF_16v
12
C379
0 1uF_16v
12
C380
0 1uF_16v
12
GM : OPEN
Place to near NB
GM : ORIGNAL , PM : 0 Ohm
GM : 0 Ohm , PM : OPEN
GM : OPEN , PM : 0 Ohm
GM : ORIGNAL , PM : OPEN
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
PEG_C_TXP0
PEG_C_TXN0
PEG_C_TXP1
PEG_C_TXN1
PEG_C_TXP2
PEG_C_TXN2
PEG_C_TXP3
PEG_C_TXN3
PEG_C_TXP4
PEG_C_TXN4
PEG_C_TXP5
PEG_C_TXN5
PEG_C_TXP6
PEG_C_TXN6
PEG_C_TXP7
PEG_C_TXN7
PEG_C_TXP8
PEG_C_TXN8
PEG_C_TXP9
PEG_C_TXN9
PEG_C_TXP10
PEG_C_TXN10
PEG_C_TXP11
PEG_C_TXN11
PEG_C_TXP12
PEG_C_TXN12
PEG_C_TXP13
PEG_C_TXN13
PEG_C_TXP14
PEG_C_TXN14
PEG_C_TXP15
PEG_C_TXN15
12
1
12
12
12
12
12
12
2
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
35
35
35
35
35
35
35
35
SDVOB_R
SDVOB_G+
SDVOB_G
SDVOB_B+
SDVOB_B
SDVOB_CLK+
SDVOB_CLK
PEG_TXP0 SDVOB_R+
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
19
C397
19
C400
19
C362
19
C364
19
C402
19
C403
19
C366
19
C368
PM : OPEN , GM : ORIGNAL
DVI : INSTALL
Place to near NB
RS12
1
4
LVDS_R_TXCL
LVDS_R_TXCL+
LVDS_R_TXCU
LVDS_R_TXCU+
LVDS_R_TXDL0
LVDS_R_TXDL0+
LVDS_R_TXDL1
LVDS_R_TXDL1+
LVDS_R_TXDL2
LVDS_R_TXDL2+
LVDS_R_TXDU0
LVDS_R_TXDU0+
LVDS_R_TXDU1
LVDS_R_TXDU1+
LVDS_R_TXDU2
LVDS_R_TXDU2+
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
23
0_5%_OPEN
RS16
1
23
0_5%_OPEN
RS9
1
23
0_5%_OPEN
RS10
1
23
0_5%_OPEN
RS11
1
23
0_5%_OPEN
RS15
1
23
0_5%_OPEN
RS13
1
23
0_5%_OPEN
RS14
1
23
0_5%_OPEN
37 27
37 27
37 27
4
37 27
37 27
4
37 27
37 27
4
37 27
37 27
4
37 27
37 27
4
37 27
37 27
4
37 27
4
37 27
37 27
72 70 69 68 66 65 63 62 61 60 58 57 55 54 53 52 49 48 47 46 42 41 40 39 37 36 35 29 25 24 22 18 13 12 11 10 7
37 28
37 28
37 27
1
R936
OPEN
2
+V1.5S
65 58 42 40 35 23 22 16 10 8
R328
R911
R941
1
1
1
2
2
2
0_5%
0_5%
0_5%
0_5%
OPEN
OPEN
OPENR912
36 28
CRT_B
36 28
CRT_G
36 28
CRT_R
36 28
36 28
36 28
R
G
B
52 37 27
R196
R230 OPEN
LVDS_R_TXCL+
LVDS_R_TXCU
LVDS_R_TXCU+
LVDS_R_TXDL0
LVDS_R_TXDL1
LVDS_R_TXDL2
LVDS_R_TXDL0+
LVDS_R_TXDL1+
LVDS_R_TXDL2+
LVDS_R_TXDU0
LVDS_R_TXDU1
LVDS_R_TXDU2
R338
R913
1
1
LVDS_R_TXDU0+
LVDS_R_TXDU1+
2
2
LVDS_R_TXDU2+
0_5%
VIDEO_R_COMP
SVID R LUMA
SVID_R_CHROMA
LCM_3S_BKLTEN
LVDS_TXCL
LVDS_TXCL+
LVDS_TXCU
LVDS_TXCU+
LVDS_TXDL0
LVDS_TXDL0+
LVDS_TXDL1
LVDS_TXDL1+
LVDS_TXDL2
LVDS_TXDL2+
LVDS_TXDU0
LVDS_TXDU0+
LVDS_TXDU1
LVDS_TXDU1+
LVDS_TXDU2
LVDS_TXDU2+
37 28
R959
OPEN
SVID_LUMA
SVID_CHROMA
42 39 23 22 20 16 15 14 13 8 19
42 39 23 22 20 16 15 14 13 8 19
38 28
38 28
R330
12
OPEN
R358
12
OPEN
R930
0_5%
R933
OPEN
LCM_3S_VDDEN
1
2
+VCCP
R340
0_5%
+VCCP
1
2
1
2
INV_PWM_3
R357
12
OPEN
LCM_DDCPCLK
LCM_DDCPDATA
R232 OPEN12
R233 1 2
12
R341
12
1
1
R931
0_5%
2
2
CRT_DDCCLK
CRT_DDCDATA
CRT_HSYNC
CRT_VSYNC
R910
12
0_5%
R350
12
0_5%
R356
12
0_5%
CLOSE TO CALISTOGA
+V3S
1
1
R352
R354
OPEN
OPEN
2
2
R370
OPEN
12
NEAR GPU
12
OPEN
1
2
R937
12
OPEN
12
OPEN
12
OPEN
12
OPENR274
12
OPEN
12
OPENR938
12
12
OPENR331
R335
0_5%
12
R909
1
R329 OPEN
12
R942
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
1
R935
0_5%
2
B
G
R
1
2
OPEN
2
OPEN
LVDS_R_TXCL
R320
R273
R939
R940 OPEN
CLOSE TO CALISTOGA
CHANGE by
PM:OPEN GM: 10K OHM
U717 3
D32
L_BKL C L
30
L_BKL EN
H30
L_CLKC LA
H29
L_CLKC LB
G26
L_DDC_CLK
G25
L_DDC_DA A
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
A33
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
LA_DA A#_0
B35
LA_DA A#_1
A37
LA_DA A#_2
B37
LA_DA A_0
B34
LA_DA A_1
A36
LA_DA A_2
G30
LB_DA A#_0
D30
LB_DA A#_1
F29
LB_DA A#_2
F30
LB_DA A_0
D29
LB_DA A_1
F28
LB_DA A_2
A16
V_DACA_OU
C18
V_DACB_OU
A19
V_DACC_OU
20
V_IREF
B16
V_IR NA
B18
V_IR NB
B19
V_IR NC
K30
V_DCONSEL0
29
V_DCONSEL1
E23
CR _BLUE
D23
CR _BLUE#
C22
CR _GREEN
B22
CR _GREEN#
A21
CR _RED
B21
CR _RED#
C26
CR _DDC_CLK
C25
CR _DDC_DA A
G23
CR _HSYNC
22
CR _IREF
H23
CR _VSYNC
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
VIDEO_R_COMP
SVID_R_LUMA
SVID_R_CHROMA
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
LVDS
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_ XN_0
EXP_A_ XN_1
EXP_A_ XN_2
EXP_A_ XN_3
EXP_A_ XN_4
EXP_A_ XN_5
EXP_A_ XN_6
EXP_A_ XN_7
EXP_A_ XN_8
PCI-EXPRESS GRAPHICS
EXP_A_ XN_9
EXP_A_ XN_10
TV
EXP_A_ XN_11
EXP_A_ XN_12
EXP_A_ XN_13
EXP_A_ XN_14
EXP_A_ XN_15
EXP_A_ XP_0
EXP_A_ XP_1
EXP_A_ XP_2
EXP_A_ XP_3
EXP_A_ XP_4
EXP_A_ XP_5
VGA
EXP_A_ XP_6
EXP_A_ XP_7
EXP_A_ XP_8
EXP_A_ XP_9
EXP_A_ XP_10
EXP_A_ XP_11
EXP_A_ XP_12
EXP_A_ XP_13
EXP_A_ XP_14
EXP_A_ XP_15
TITLE
SIZE
21-Aug-2006 RDEE3
A3
+V1.5S_PCIE
22
12
35 27
35 27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19 36 28
19
19
19
24.9_1%R371
PEG_C_RXN0
PEG_C_RXN1
PEG_C_RXN2
PEG_C_RXN3
PEG_C_RXN4
PEG_C_RXN5
PEG_C_RXN6
PEG_C_RXN7
PEG_C_RXN8
PEG_C_RXN9
PEG_C_RXN10
PEG_C_RXN11
PEG_C_RXN12
PEG_C_RXN13
PEG_C_RXN14
PEG_C_RXN15
PEG_C_RXP0
PEG_C_RXP1
PEG_C_RXP2
PEG_C_RXP3
PEG_C_RXP4
PEG_C_RXP5
PEG_C_RXP6
PEG_C_RXP7
PEG_C_RXP8
PEG_C_RXP9
PEG_C_RXP10
PEG_C_RXP11
PEG_C_RXP12
PEG_C_RXP13
PEG_C_RXP14
PEG_C_RXP15
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14 PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
D40
D38
F34
G38
H34
L34
M38
N34
P38
R34
V34
W38
Y34
AA38
AB34
AC38
D34
F38
G34
H38
L38
M34
N38
P34
R38
V38
W34
Y38
AA34
AB38
F36
G40
H36
L36
M40
N36
P40
R36
V36
W40
Y36
AA40
AB36
AC40
D36
F40
G36
H40
L40
M36
N40
P36
R40
V40
W36
Y40
AA36
AB40
38
38
34
34
40
40
36
36
INVENTEC
CONISTON MV
CALISTOGA-2/6
CODE
DOC. NUMBER
CS
SHEET
OF
19 77
REV
A02 6050A2087001
1
20
MCH_HXSCOMP
MCH_HXRCOMP
MCH_HYSCOMP
MCH_HYRCOMP
MCH_HXSWING
MCH_HYSWING
NOTE:
MCH_HXRCOMP, MCH_HYRCOMP
MCH_HXSWING, MCH_HYSWING
should be 10 mil wide with 20 mil spacing
R876 54.9_1%
12
20
1
20
R874 54.9_1%
12
20
+VCCP
42 39 23 22 19 16 15 14 13 8 20
1
R243
221_1%
2
20
1
R242
100_1%
2
+VCCP
42 39 23 22 19 16 15 14 13 8 20
1
R872
221_1%
2
20
1
R873
100_1%
2
2
2
C252
1
0.1uF_10v
2
C888
1
0.1uF_10v
2
24.9_1%R875
24.9_1%R871
H_D#(63:0)
+VCCP
42 39 23 22 19 16 15 14 13 8 20
+VCCP
42 39 23 22 19 16 15 14 13 8 20
MCH_HXRCOMP
MCH_HXSCOMP
MCH_HXSWING
MCH_HYRCOMP
MCH_HYSCOMP
MCH_HYSWING
15
20
20
20
20
20
20
H_D#(63:0)
H_D#(0)
H D#(1)
H_D#(2)
H_D#(3)
H D#(4)
H_D#(5)
H D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H D#(11)
H_D#(12)
H D#(13)
H_D#(14)
H_D#(15)
H D#(16)
H_D#(17)
H D#(18)
H D#(19)
H_D#(20)
H D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H D#(26)
H_D#(27)
H D#(28)
H_D#(29)
H_D#(30)
H D#(31)
H_D#(32)
H D#(33)
H_D#(34)
H_D#(35)
H D#(36)
H_D#(37)
H D#(38)
H_D#(39)
H_D#(40)
H D#(41)
H_D#(42)
H D#(43)
H_D#(44)
H_D#(45)
H D#(46)
H_D#(47)
H D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H D#(53)
H_D#(54)
H D#(55)
H D#(56)
H_D#(57)
H D#(58)
H_D#(59)
H_D#(60)
H D#(61)
H_D#(62)
H D#(63)
Layout notes:
Trace need be 10 mils
CLK_R_MCHBCLK
CLK_R_MCHBCLK#
U717 1
F1
H_D#_0
1
H_D#_1
H1
H_D#_2
6
H_D#_3
H3
H_D#_4
K2
H_D#_5
G1
H_D#_6
G2
H_D#_7
K9
H_D#_8
K1
H_D#_9
K7
H_D#_10
8
H_D#_11
H4
H_D#_12
3
H_D#_13
K11
H_D#_14
G4
H_D#_15
10
H_D#_16
W11
H_D#_17
3
H_D#_18
U7
H_D#_19
U9
H_D#_20
U11
H_D#_21
11
H_D#_22
W9
H_D#_23
1
H_D#_24
8
H_D#_25
4
H_D#_26
W7
H_D#_27
U5
H_D#_28
9
H_D#_29
W6
H_D#_30
5
H_D#_31
AB7
H_D#_32
AA9
H_D#_33
W4
H_D#_34
W3
H_D#_35
Y3
H_D#_36
Y7
H_D#_37
W5
H_D#_38
Y10
H_D#_39
AB8
H_D#_40
W2
H_D#_41
AA4
H_D#_42
AA7
H_D#_43
AA2
H_D#_44
AA6
H_D#_45
AA10
H_D#_46
Y8
H_D#_47
AA1
H_D#_48
AB4
H_D#_49
AC9
H_D#_50
AB11
H_D#_51
AC11
H_D#_52
AB3
H_D#_53
AC2
H_D#_54
AD1
H_D#_55
AD9
H_D#_56
AC1
H_D#_57
AD7
H_D#_58
AC6
H_D#_59
AB5
H_D#_60
AD10
H_D#_61
AD4
H_D#_62
AC8
H_D#_63
E1
H_XRCOMP
E2
H_XSCOMP
E4
H_XSWING
Y1
H_YRCOMP
U1
H_YSCOMP
W1
13
13
H_YSWING
AG2
H_CLKIN
AG1
H_CLKIN#
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
HOST
H_A#_30
H_A#_31
H_ADS#
H_ADS B#_0
H_ADS B#_1
H_VREF
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURS #
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DS BN#_0
H_DS BN#_1
H_DS BN#_2
H_DS BN#_3
H_DS BP#_0
H_DS BP#_1
H_DS BP#_2
H_DS BP#_3
H_HI #
H_HI M#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_ RDY#
H9
C9
E11
G11
F11
G12
F9
H11
G14
D9
H13
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
C6
F6
C7
B7
A7
C3
H8
K13
W8
U3
AB10
K4
Y5
AC4
K3
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
14
H_A#(31:3)
H_A#(3)
H_A#(4)
H_A#(5)
H A#(6)
H A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
12
14
15
13
9
H VREF
H VREF
7
7
6
H A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H A#(16)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H A#(22)
H_A#(23)
H A#(24)
H_A#(25)
H A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
14
14
14
14
14
14
14
14
14
15
14
15
15
15
15
15
15
15
15
15
15
15
15
14
14
39 15
LAYOUT NOTE:
Place R675 and R676 close to MCH within 100 mil
+VCCP
42 39 23 22 19 16 15 14 13 8 20
1
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_HIT#
H_HITM#
14
H REQ#(0)
H REQ#(1)
H REQ#(2)
H REQ#(3)
H REQ#(4)
14
H_LOCK#
H RS#(0)
H_RS#(1)
H RS#(2)
H_CPUSLP#
H_TRDY#
R280
100_1%
2
C305
1
0.1uF_10v
2
Close to J13 , K13
14
H_REQ#(4:0)
14
H_RS#(2:0)
1
R337
200_1%
2
RDEE3
21-Aug-2006
INVENTEC
TITLE
CONISTON MV
CALISTOGA-3/6
SIZE
A3
DOC. NUMBER CODE
6050A2087001 A02
CS
SHEET
REV
OF CHANGE by
77 20
MA_DATA(63:0)
24
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
AF4
AF8
SA_DQ62
SA_DQ63
AG9
AH6
SA_DQ60
SA_DQ61
AG4
AF6
SA_DQ58
SA_DQ59
AG7
AF9
SA_DQ56
SA_DQ57
AN1
AL2
SA_DQ54
SA_DQ55
AV2
A 3
SA_DQ52
SA_DQ53
AN2
AP1
SA_DQ50
SA_DQ51
AW2
AY2
SA_DQ47
SA_DQ48
SA_DQ49
SA_RCVENOU #
SA_RCVENIN#
SA_WE#
AK24
AY14
P3
26 24
MA_WE#
AN9
A 5
AL5
SA_DQ45
SA_DQ46
SA_RAS#
AW14
AK23
26 24
MA_RAS#
AR12
AR14
SA_DQ32
SA_DQ33
SA_MA_1
SA_MA_2
AU14
AW16
AP20
A 21
SA_DQ30
SA_DQ31
SA_MA_0
AY16
26 24
AN20
AP24
AL23
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AL8
AN3
AH5
AP21
SA_DQ26
SA_DQS#_4
AM12
AP13
AP12
A 13
A 12
AL14
AL12
AN7
AK8
AK7
AK9
AP9
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ39
SA_DQ40
SA_DQ37
SA_DQ38
SA_DQ35
SA_DQ36
SA_DQ34
DDR SYSTEM MEMORY A
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
AV20
AV12
A 17
SA_MA_9
AU13
A 16
SA_MA_7
SA_MA_8
AU17
AW17
SA_MA_5
SA_MA_6
AU16
AV17
SA_MA_3
SA_MA_4
BA16
BA17
MA_A(13:0)
AP26
AP23
AL22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
AU33
AN27
AM21
AM24
AN24
AK28
AL28
SA_DQ21
SA_DQ22
SA_DQ19
SA_DQ20
SA_DQS#_0
SA_DQS_7
SA_DQS_5
SA_DQS_6
AK32
AP3
AG5
AN8
24
MA_DQS#(7:0)
AM26
AL27
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQS_2
SA_DQS_3
SA_DQS_4
AM22
AN12
AN33
AK26
SA_DQ14
SA_DQ15
SA_DQS_0
SA_DQS_1
A 33
AN28
AM36
AM34
AN38
SA_DQ12
SA_DQ13
SA_DQ11
SA_DM_6
SA_DM_7
AK33
AH4
24
MA_DQS(7:0)
AR31
AP31
SA_DQ10
SA_DM_5
AL9
AR3
AN35
AP33
SA_DQ8
SA_DQ9
SA_DM_3
SA_DM_4
AN22
AM14
AH31
A 32
SA_DQ7
SA_DQ6
SA_DM_1
SA_DM_2
AL26
AM35
AK35
A 36
SA_DQ5
SA_DQ4
SA_DQ3
SA_CAS#
SA_DM_0
AY13
A 33
26 24
MA_CAS#
MA_DM(7:0)
AM33
AM31
A 34
SA_DQ2
SA_DQ1
SA_BS_1
SA_BS_2
AV14
BA20
26 24
26 24
MA_BS1#
MA_BS2#
24
A 35
U717 4
SA_DQ0
SA_BS_0
AU12
26 24
MA_BS0#
MB_DATA(63:0)
25
CHANGE by OF
RDEE3
21-Aug-2006
SIZE
A3
CODE
CALISTOGA-4/6
CS
SHEET
DOC. NUMBER
21 77
REV
A02 6050A2087001
TITLE
INVENTEC
CONISTON MV
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
AK5
AR5
AK4
AK3
AV4
A 4
A 5
A 3
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_DQ58
SB_DQ59
SB_DQ56
SB_DQ57
AW5
AY5
SB_DQ54
SB_DQ55
AY10
AY9
SB_DQ52
SB_DQ53
AW4
BA4
SB_DQ50
SB_DQ51
AW10
BA10
SB_DQ47
SB_DQ48
SB_DQ49
SB_RCVENOU #
SB_RCVEN N#
SB_WE#
AK18
AR27
P10
26 25
MB_WE#
AH11
AK10
A 8
SB_DQ45
SB_DQ46
SB_RAS#
AU23
AK16
P11 P5
26 25
MB_RAS#
AK13
SB_DQ43
SB_DQ44
SB_MA_12
SB_MA_13
AY27
AR23
A 9
SB_DQ42
SB_MA_11
BA27
AN14
AN17
AP14
AP15
AL15
A 11
SB_DQ41
SB_DQ39
SB_DQ40
SB_DQ37
SB_DQ38
SB_DQ35
SB_DQ36
SB_DQ34
DDR SYSTEM MEMORY B
SB_MA_10
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_3
SB_MA_4
AU27
AV28
AV27
AW27
AV24
AR28
A 27
A 28
AL19
SB_DQ32
SB_DQ33
SB_MA_1
SB_MA_2
AW24
AY24
AV29
SB_DQ30
SB_DQ31
SB_MA_0
AY23
26 25
AU29
AU31
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
A 10
A 7
AP5
A 31
SB_DQ26
SB_DQS#_4
AP16
AW29
AW31
AM19
AM16
AH10
AN10
MB_A(13:0)
BA33
AP34
AY33
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
AU39
A 35
AP29
BA36
AU36
AP35
AP36
SB_DQ21
SB_DQ22
SB_DQ19
SB_DQ20
SB_DQS#_0
SB_DQS_7
SB_DQS_5
SB_DQS_6
AR7
AN5
AR10
AM40
25
MB_DQS#(7:0)
AR36
AV36
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQS_2
SB_DQS_3
SB_DQS_4
AR29
AR16
BA38
AY38
SB_DQ14
SB_DQ15
SB_DQS_0
SB_DQS_1
A 39
AU35
AW38
AR40
AP38
SB_DQ12
SB_DQ13
SB_DQ11
SB_DM_6
SB_DM_7
AM39
AN4
25
MB_DQS(7:0)
AU38
AV38
SB_DQ10
SB_DM_5
AH8
BA5
AV41
A 40
SB_DQ8
SB_DQ9
SB_DM_3
SB_DM_4
BA31
AL17
AN41
AP41
SB_DQ7
SB_DQ6
SB_DM_1
SB_DM_2
AR38
A 36
AK38
A 38
SB_DQ5
SB_DQ4
SB_DQ3
SB_CAS#
SB_DM_0
AR24
AK36
26 25
MB_CAS#
MB_DM(7:0)
AR41
AP39
A 37
SB_DQ2
SB_DQ1
SB_BS_1
SB_BS_2
AV23
AY28
26 25
26 25
25
MB_BS1#
MB_BS2#
AK39
U717 5
SB_DQ0
SB_BS_0
A 24
26 25
MB_BS0#
NOTE:
2
1
C419
1
CLOSE O B26 CLOSE O C39
C960
1
2
OPEN
1
22uF_6 3v
2
C963
1
OPEN
2
1
2
1
2
1
2
CAPS USED IN +V1.5S_PCIE
SHOULD BE WITHIN ON TOP
LAYER
1
C417
2
10uF_6.3v
NOTE:
10UF CAPS USED IN
+V1.5S_3GPLL SHOULD
SHOULD BEPLACED
2
N CAVITY
BLM11B121SBL34
C329
10uF_6.3v
0.022uF_16V
+V1.5S_DPLL
35 18 11 10 22
BLM11A121S
1 2
C885
1
C884
1
0 1uF_10v
2
2
C304
C302
1
1
2
2
OPEN
OPEN
CLOSE O E19 C20 H20 E20
C934
OPEN
C323
OPEN
C307
OPEN
65 58 42 40 35 23 19 16 10 8 22
65 58 42 40 35 23 19 16 10 8 22
+V1.5S
1
ICB_1206_3.0A
L37
220uF_2.5v
+V1.5S
D14
1 3
L32
2
R870
OPEN
L33
12
+VCCP
1
R368
0_5%
2
C353
1
2
OPEN
+V1.5S
R943
0_5%
C933
1
2
C322
1
2
C306
1
2
65 58 42 40 35 23 19 16 10 8 22
L24
OPEN
OPEN
OPEN
+V2.5S
L23
1
1
4
2
35 18 11 10 22
R369
BLM18PG181SN1J_OPEN
C254
470uF_2.5v
BAT54_OPEND11
13
V1_5SFOLLOW
NOTE:
CAPS USED IN +V2.5S_CRTDAC
SHOULD BE WITHIN 250MILS
OF EDGE OF MCH
65 58 42 40 35 23 19 16 10 8 22
+V1.5S
NFM60R30T222
2
3
NOTE:
0.1UF CAPS IN +V1.5_xPLL
NEED TO BE LOCATED AS
EDGE CAPS WITHIN 200 MILS
2 70 69 68 66 65 63 62 61 60 58 57 55 54 53 52 49 48 47 46 42 41 40 39 37 36 35 29 25 24 19 18 13 12 11 10 7 22
NOTE:
CAPS USED IN +V3S
SHOULD BE WITHIN 250MILS
OF EDGE OF MCH
65 58 42 40 35 23 19 16 10 8 22
CAPS USED IN +V1.5S_TVDAC
AND +V1.5S_QTVDAC SHOULD BE
WITHIN 250 MILS OF EDGE
12
OPEN
VCCGFOLLOW
+V1.5S_HPLL
CLOSE O AF1
C886
1
2
0.1uF_10v
+V3S
+V1.5S
BLM18PG181SN1J_OPEN
42 39 23 20 19 16 15 14 13 8 22
BAT54_OPEN
1
22
12
65 58 42 40 35 23 19 16 10 8 22
R247
12
OPEN
BLM18PG181SN1J_OPEN
R347
2
1
0_5%
L30
12
R339
12
0_5%
GM : ORIGNAL ; PM : OPEN
C418
10uF_6.3v
1
2
+V2.5S
C300
1
2
OPEN
+V1.5_TVDAC
+V1.5S_PCIE
+V1.5S 3GPLL
1
2
R961
12
OPEN
1
2
GM : OPEN ; PM : O Ohm
GM : 0 Ohm ; PM : OPEN
+VCCP
1
C253
2
330uF_2.5v
PLACE ON THE EDGE
C328
1
4.7uF_6.3v
2
C330
1
2.2uF_10v
2
PLACE IN CAVITY
42 39 23 20 19 16 15 14 13 8 2
C889
1
0.22uF_6.3v
2
9
1
2
C331
0.1uF_10v
C303
OPEN
+V1.5S_HPLL
C994
OPEN
+V1.5S_MPLL
C301
OPEN
R932
R934 1 2
C324
10uF_6.3v
0.1uF_10v
+V2.5S
1
2
C961
1
OPEN
2
35 18 11 10 22
+V2.5S_CRTDAC
1
2
22
C995
1
1
OPEN
2
2
+VCCA_TVDAC
12
+V3S
1
C326
1
2
0.1uF_10v
2
+V1.5S
C332
1
2
35 18 11 10 22
R962
OPEN
C325
OPEN
1
R960
0_5%
2
OPEN
0_5%
R958
12
0_5%
1
OPEN
2
+V2.5S
1
2
C962
U717 8
H22
VCCSYNC
C30
VCC_ XLVDS0
B30
VCC_ XLVDS1
A30
VCC_ XLVDS2
A 41
VCC3G0
AB41
VCC3G1
Y41
VCC3G2
V41
VCC3G3
R41
VCC3G4
N41
VCC3G5
L41
VCC3G6
AC33
VCCA_3GPLL
G41
VCCA_3GBG
H41
VSSA_3GBG
F21
VCCA_CR DAC0
E21
VCCA_CR DAC1
G21
VSSA_CR DAC
0.1uF_16V
B26
VCCA_DPLLA
C39
VCCA_DPLLB
AF1
VCCA_HPLL
A38
VCCA_LVDS
B39
VSSA_LVDS
AF2
VCCA_MPLL
H20
VCCA_ VBG
G20
VSSA_ VBG
E19
VCCA_ VDACA0
F19
VCCA_ VDACA1
C20
VCCA_ VDACB0
D20
VCCA_ VDACB1
E20
VCCA_ VDACC0
F20
VCCA_ VDACC1
AH1
VCCD_HMPLL0
AH2
VCCD_HMPLL1
A28
VCCD_LVDS0
B28
VCCD_LVDS1
C28
VCCD_LVDS2
D21
VCCD_ VDAC
A23
VCC_HV0
B23
VCC_HV1
B25
VCC_HV2
H19
VCCD_Q VDAC
AK31
VCCAUX0
AF31
VCCAUX1
AE31
VCCAUX2
AC31
VCCAUX3
AL30
VCCAUX4
AK30
VCCAUX5
A 30
VCCAUX6
AH30
VCCAUX7
AG30
VCCAUX8
AF30
VCCAUX9
AE30
VCCAUX10
AD30
VCCAUX11
AC30
VCCAUX12
AG29
VCCAUX13
AF29
VCCAUX14
AE29
VCCAUX15
AD29
VCCAUX16
AC29
VCCAUX17
AG28
VCCAUX18
AF28
VCCAUX19
AE28
VCCAUX20
AH22
VCCAUX21
A 21
VCCAUX22
AH21
VCCAUX23
A 20
VCCAUX24
AH20
VCCAUX25
AH19
VCCAUX26
P19
VCCAUX27
P16
VCCAUX28
AH15
VCCAUX29
P15
VCCAUX30
AH14
VCCAUX31
AG14
VCCAUX32
AF14
VCCAUX33
AE14
VCCAUX34
Y14
VCCAUX35
AF13
VCCAUX36
AE13
VCCAUX37
AF12
VCCAUX38
AE12
VCCAUX39
AD12
VCCAUX40
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
CHANGE by
V _0
V _1
V _2
V _3
V _4
V _5
V _6
V _7
V _8
V _9
V _10
V _11
V _12
V _13
V _14
V _15
V _16
V _17
V _18
V _19
V _20
V _21
V _22
V _23
V _24
V _25
V _26
V _27
V _28
V _29
V _30
POWER
V _31
V _32
V _33
V _34
V _35
V _36
V _37
V _38
V _39
V _40
V _41
V _42
V _43
V _44
V _45
V _46
V _47
V _48
V _49
V _50
V _51
V _52
V _53
V _54
V _55
V _56
V _57
V _58
V _59
V _60
V _61
V _62
V _63
V _64
V _65
V _66
V _67
V _68
V _69
V _70
V _71
V _72
V _73
V _74
V _75
V _76
RDEE3
AC14
AB14
W14
V14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
+VCCP
42 39 23 20 19 16 15 14 13 8 22
14
13
12
VTTLF CAP3
VTTF CAP2
VTTF_CAP1
C909
1
2
0.47uF_6.3v
C887
1
2
0.47uF_6.3v
C890
1
2
0.22uF_6.3v
INVENTEC
TITLE
CONISTON MV
CALISTOGA-5/6
21-Aug-2006
SIZE
CODE
DOC. NUMBER
A3
6050A2087001 A02
CS
SHEET
REV
OF
77 22
+VCCP
42 39 22 20 19 16 15 14 3 8 23
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
AA33
AA32
AA31
AA30
AA29
AB28
AA28
AB23
AA23
AC22
AB22
AC21
AA21
AC20
AB20
AB19
AA19
U717 7
VCC_0
W33
VCC_1
P33
VCC_2
N33
VCC_3
L33
VCC_4
33
VCC_5
VCC_6
Y32
VCC_7
W32
VCC_8
V32
VCC_9
P32
VCC_10
N32
VCC_11
M32
VCC_12
L32
VCC_13
32
VCC_14
VCC_15
W31
VCC_16
V31
VCC_17
31
VCC_18
R31
VCC_19
P31
VCC_20
N31
VCC_21
M31
VCC_22
VCC_23
Y30
VCC_24
W30
VCC_25
V30
VCC_26
U30
VCC_27
30
VCC_28
R30
VCC_29
P30
VCC_30
N30
VCC_31
M30
VCC_32
L30
VCC_33
VCC_34
Y29
VCC_35
W29
VCC_36
V29
VCC_37
U29
VCC_38
R29
VCC_39
P29
VCC_40
M29
VCC_41
L29
VCC_42
VCC_43
VCC_44
Y28
VCC_45
V28
VCC_46
U28
VCC_47
28
VCC_48
R28
VCC_49
P28
VCC_50
N28
VCC_51
M28
VCC_52
L28
VCC_53
P27
VCC_54
N27
VCC_55
M27
VCC_56
L27
VCC_57
P26
VCC_58
N26
VCC_59
L26
VCC_60
N25
VCC_61
M25
VCC_62
L25
VCC_63
P24
VCC_64
N24
VCC_65
M24
VCC_66
VCC_67
VCC_68
Y23
VCC_69
P23
VCC_70
N23
VCC_71
M23
VCC_72
L23
VCC_73
VCC_74
VCC_75
Y22
VCC_76
W22
VCC_77
P22
VCC_78
N22
VCC_79
M22
VCC_80
L22
VCC_81
VCC_82
VCC_83
W21
VCC_84
N21
VCC_85
M21
VCC_86
L21
VCC_87
VCC_88
VCC_89
Y20
VCC_90
W20
VCC_91
P20
VCC_92
N20
VCC_93
M20
VCC_94
L20
VCC_95
VCC_96
VCC_97
Y19
VCC_98
N19
VCC_99
M19
VCC_100
L19
VCC_101
N18
VCC_102
M18
VCC_103
L18
VCC_104
P17
VCC_105
N17
VCC_106
M17
VCC_107
N16
VCC_108
M16
VCC_109
L16
VCC_110
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
AU41
A 41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
A 34
AR34
BA30
AY30
AW30
AV30
AU30
A 30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
A 29
AH29
A 28
AH28
A 27
AH27
BA26
AY26
AW26
AV26
AU26
A 26
AR26
A 26
AH26
A 25
AH25
A 24
AH24
BA23
A 23
BA22
AY22
AW22
AV22
AU22
A 22
AR22
AP22
AK22
A 22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
A 19
AR19
AP19
AK19
A 19
A 18
A 17
AH17
A 16
AH16
BA15
AY15
AW15
AV15
AU15
A 15
AR15
A 15
A 14
A 13
AH13
AK12
A 12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
A 8
AR8
AP8
BA6
AY6
AW6
AV6
A 6
AR6
AP6
AN6
AL6
AK6
A 6
AV1
A 1
VCC_SM_LF4
VCC_SM_LF5
C381
1
0.47uF_6.3v
2
1
C360
2
10uF_10v
C383
1
0.47uF_6.3v
2
NEAR PIN BA15 ON LAYER1
C932
1
0.47uF_6.3v
2
VCC_SM_LF2
VCC_SM_LF1
1
2
C310
1
0.22uF_6.3v
2
1
C333
10uF_10v
2
+VCCP
C382
0.47uF_6.3v
1
2 330uF_2.5v
C309
1
1uF_6.3v
2
C327
1
0.22uF_6.3v
2
PLACE IN CAVITY
10uF_10v
C883
1
0.47uF_6.3v
2
42 39 22 20 19 16 15 14 13 8 23
1
1
2
1
2
1
C359
2
C891
10uF_10v
C308
0.22uF_6.3v
+V1.8
68 25 24 18 10 9
C910
330uF_2.5v
C270
2
C881
1
0.47uF_6.3v
2
U717 6
AD27
VCC_NC F0
AC27
VCC_NC F1
AB27
VCC_NC F2
AA27
VCC_NC F3
Y27
VCC_NC F4
W27
VCC_NC F5
V27
VCC_NC F6
U27
VCC_NC F7
27
VCC_NC F8
R27
VCC_NC F9
AD26
VCC_NC F10
AC26
VCC_NC F11
AB26
VCC_NC F12
AA26
VCC_NC F13
Y26
VCC_NC F14
W26
VCC_NC F15
V26
VCC_NC F16
U26
VCC_NC F17
26
VCC_NC F18
R26
VCC_NC F19
AD25
VCC_NC F20
AC25
VCC_NC F21
AB25
VCC_NC F22
AA25
VCC_NC F23
Y25
VCC_NC F24
W25
VCC_NC F25
V25
VCC_NC F26
U25
VCC_NC F27
25
VCC_NC F28
R25
VCC_NC F29
AD24
VCC_NC F30
AC24
VCC_NC F31
AB24
VCC_NC F32
AA24
VCC_NC F33
Y24
VCC_NC F34
W24
VCC_NC F35
V24
VCC_NC F36
U24
VCC_NC F37
24
VCC_NC F38
R24
VCC_NC F39
AD23
VCC_NC F40
V23
VCC_NC F41
U23
VCC_NC F42
23
VCC_NC F43
R23
VCC_NC F44
AD22
VCC_NC F45
V22
VCC_NC F46
U22
VCC_NC F47
22
VCC_NC F48
R22
VCC_NC F49
AD21
VCC_NC F50
V21
VCC_NC F51
U21
VCC_NC F52
21
VCC_NC F53
R21
VCC_NC F54
AD20
VCC_NC F55
V20
VCC_NC F56
U20
VCC_NC F57
20
VCC_NC F58
R20
VCC_NC F59
AD19
VCC_NC F60
V19
VCC_NC F61
U19
VCC_NC F62
19
VCC_NC F63
AD18
VCC_NC F64
AC18
VCC_NC F65
AB18
VCC_NC F66
AA18
VCC_NC F67
Y18
VCC_NC F68
W18
VCC_NC F69
V18
VCC_NC F70
U18
VCC_NC F71
18
VCC_NC F72
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
NCTF
VCCAUX_NC F0
VCCAUX_NC F1
VCCAUX_NC F2
VCCAUX_NC F3
VCCAUX_NC F4
VCCAUX_NC F5
VCCAUX_NC F6
VCCAUX_NC F7
VCCAUX_NC F8
VCCAUX_NC F9
VCCAUX_NC F10
VCCAUX_NC F11
VCCAUX_NC F12
VCCAUX_NC F13
VCCAUX_NC F14
VCCAUX_NC F15
VCCAUX_NC F16
VCCAUX_NC F17
VCCAUX_NC F18
VCCAUX_NC F19
VCCAUX_NC F20
VCCAUX_NC F21
VCCAUX_NC F22
VCCAUX_NC F23
VCCAUX_NC F24
VCCAUX_NC F25
VCCAUX_NC F26
VCCAUX_NC F27
VCCAUX_NC F28
VCCAUX_NC F29
VCCAUX_NC F30
VCCAUX_NC F31
VCCAUX_NC F32
VCCAUX_NC F33
VCCAUX_NC F34
VCCAUX_NC F35
VCCAUX_NC F36
VCCAUX_NC F37
VCCAUX_NC F38
VCCAUX_NC F39
VCCAUX_NC F40
VCCAUX_NC F41
VCCAUX_NC F42
VCCAUX_NC F43
VCCAUX_NC F44
VCCAUX_NC F45
VCCAUX_NC F46
VCCAUX_NC F47
VCCAUX_NC F48
VCCAUX_NC F49
VCCAUX_NC F50
VCCAUX_NC F51
VCCAUX_NC F52
VCCAUX_NC F53
VCCAUX_NC F54
VCCAUX_NC F55
VCCAUX_NC F56
VCCAUX_NC F57
VSS_NC F0
VSS_NC F1
VSS_NC F2
VSS_NC F3
VSS_NC F4
VSS_NC F5
VSS_NC F6
VSS_NC F7
VSS_NC F8
VSS_NC F9
VSS_NC F10
VSS_NC F11
VSS_NC F12
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
R15
17
16
15
+V1.5S
65 58 42 40 35 22 19 16 10 8
U717 9
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
41
VSS_3
P41
VSS_4
M41
VSS_5
41
VSS_6
F41
VSS_7
AV40
VSS_8
AP40
VSS_9
AN40
VSS_10
AK40
VSS_11
A 40
VSS_12
AH40
VSS_13
AG40
VSS_14
AF40
VSS_15
AE40
VSS_16
B40
VSS_17
AY39
VSS_18
AW39
VSS_19
AV39
VSS_20
AR39
VSS_21
AN39
VSS_22
A 39
VSS_23
AC39
VSS_24
AB39
VSS_25
AA39
VSS_26
Y39
VSS_27
W39
VSS_28
V39
VSS_29
39
VSS_30
R39
VSS_31
P39
VSS_32
N39
VSS_33
M39
VSS_34
L39
VSS_35
39
VSS_36
H39
VSS_37
G39
VSS_38
F39
VSS_39
D39
VSS_40
A 38
VSS_41
AM38
VSS_42
AH38
VSS_43
AG38
VSS_44
AF38
VSS_45
AE38
VSS_46
C38
VSS_47
AK37
VSS_48
AH37
VSS_49
AB37
VSS_50
AA37
VSS_51
Y37
VSS_52
W37
VSS_53
V37
VSS_54
37
VSS_55
R37
VSS_56
P37
VSS_57
N37
VSS_58
M37
VSS_59
L37
VSS_60
37
VSS_61
H37
VSS_62
G37
VSS_63
F37
VSS_64
D37
VSS_65
AY36
VSS_66
AW36
VSS_67
AN36
VSS_68
AH36
VSS_69
AG36
VSS_70
AF36
VSS_71
AE36
VSS_72
AC36
VSS_73
C36
VSS_74
B36
VSS_75
BA35
VSS_76
AV35
VSS_77
AR35
VSS_78
AH35
VSS_79
AB35
VSS_80
AA35
VSS_81
Y35
VSS_82
W35
VSS_83
V35
VSS_84
35
VSS_85
R35
VSS_86
P35
VSS_87
N35
VSS_88
M35
VSS_89
L35
VSS_90
35
VSS_91
H35
VSS_92
G35
VSS_93
F35
VSS_94
D35
VSS_95
AN34
VSS_96
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
A 31
AG31
AB31
Y31
AB30
E30
A 29
AN29
AB29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
E28
AP27
AM27
AK27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
33
29
28
27
U717 10
A 23
VSS_180
AN23
VSS_181
AM23
VSS_182
AH23
VSS_183
AC23
VSS_184
W23
VSS_185
K23
VSS_186
23
VSS_187
F23
VSS_188
C23
VSS_189
AA22
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
BA21
VSS_197
AV21
VSS_198
AR21
VSS_199
AN21
VSS_200
AL21
VSS_201
AB21
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
21
VSS_206
H21
VSS_207
C21
VSS_208
AW20
VSS_209
AR20
VSS_210
AM20
VSS_211
AA20
VSS_212
K20
VSS_213
B20
VSS_214
A20
VSS_215
AN19
VSS_216
AC19
VSS_217
W19
VSS_218
K19
VSS_219
G19
VSS_220
C19
VSS_221
AH18
VSS_222
P18
VSS_223
H18
VSS_224
D18
VSS_225
A18
VSS_226
AY17
VSS_227
AR17
VSS_228
AP17
VSS_229
AM17
VSS_230
AK17
VSS_231
AV16
VSS_232
AN16
VSS_233
AL16
VSS_234
16
VSS_235
F16
VSS_236
C16
VSS_237
AN15
VSS_238
AM15
VSS_239
AK15
VSS_240
N15
VSS_241
M15
VSS_242
L15
VSS_243
B15
VSS_244
A15
VSS_245
BA14
VSS_246
A 14
VSS_247
AK14
VSS_248
AD14
VSS_249
AA14
VSS_250
U14
VSS_251
K14
VSS_252
H14
VSS_253
E14
VSS_254
AV13
VSS_255
AR13
VSS_256
AN13
VSS_257
AM13
VSS_258
AL13
VSS_259
AG13
VSS_260
P13
VSS_261
F13
VSS_262
D13
VSS_263
B13
VSS_264
AY12
VSS_265
AC12
VSS_266
K12
VSS_267
H12
VSS_268
E12
VSS_269
AD11
VSS_270
AA11
VSS_271
Y11
VSS_272
TL_CALISTOGA_MICRO_FCBGA_TSB_1466P
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
D11
B11
AV10
AP10
AL10
A 10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
A 7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
A 4
Y4
U4
R4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
A 2
AR2
AP2
AK2
A 2
AD2
AB2
Y2
U2
N2
H2
F2
C2
AL1
11
4
2
2
INVENTEC
TITLE
CONISTON MV
CALISTOGA-6/6
SIZE
CODE
A3
CS
SHEET CHANGE by
21-Aug-2006 RDEE3
23 77
REV DOC. NUMBER
A02 6050A2087001
OF
R172
10K_5%
MA_A(13:0)
1
1
R171
10K_5%
2
2
MA_DQS#(7:0)
MA_DM(7:0)
MA_DQS(7:0)
21
26 21
21
CN711 1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10_AP
90
A11
89
A12
116
A13
86
A14
84
26 21
MA_BS2#
26 21
MA_BS0#
26 21
MA_BS1#
26 18
M_CS0#
26 18
M_CS1#
M_CKE0
M_CKE1
MA_CAS#
MA_RAS#
MA_WE#
M_ODT0
M_ODT1
18
18
18
18
26 18
26 18
26 21
26 21
26 21
0 25 13
40 25 13
26 18
26 18
M_CLK_DDR0
M_CLK_DDR0#
M_CLK_DDR1
M_CLK_DDR1#
ICH_3S_SMCLK
ICH_3S_SMDATA
21
21
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
OD 0
119
OD 1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
FOX_AS0A42X_N2RX_RVS_5.2mm_200P
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
C162
0.1uF_16v
MA_DATA(63:0)
+V1.8
68 25 23 18 10 9
Layout notes: Place these Caps closed So Dimm0
C260
C282
1
1
2
2
0 1uF_16v
0 1uF_16v
+V3S
72 70 69 68 66 65 63 62 61 60 58 57 55 54 53 52 49 48 47 46 42 41 40 39 37 36 35 29 25 22 19 18 13 12 11 10 7
C161
1
1
2.2uF_16v
2
2
1
2
C907
0 1uF_16v
1
2
C263
0 1uF_16v
1
2
C334
2 2uF_16v
0.1uF_16v
C339
1
2
C261
2 2uF_16v
1
2
C335
C336
1
11
2 2uF_16v
2
2
2 2uF_16v
M_VREF
25 18 10
1
C338
2
2.2uF_16v
C337
2
2 2uF_16v
PM_EXTTS#0
CN711 2
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
25 18
NC2
50
NC3
69
NC4
163
NC ES
1
VREF
G1
GND0
G2
GND1
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
FOX_AS0A42X_N2RX_RVS_5.2mm_200P
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
SO DIMM0
RDEE3 21-Aug-2006
INVENTEC
TITLE
CONISTON MV
DDR II-DIMM-0
SIZE CODE
A3
DOC. NUMBER
6050A2087001 A02
CS
SHEET
REV
OF CHANGE by
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