Acer TravelMate 5760, TravelMate 5760G Schematics

5

4

3

2

1

GPU CORE PWR

C743

D D

=5-%/2&.',$*5$0

01

intel

SandyBridge QC /DC 35W

DDR III - SODIMM 0 DDR III - SODIMM 1

P14, 15

C C

Dual Channel DDR III

1066/1333 MHz

DDR SYSTEM MEMORY

FDI interface

HDD (SATA)

ODD (SATA)

P25

USB 2.0 * 3

USB0,1,2

P27

SATA0

SATA1

USB 2.0

SATA Gen3

SATA Gen2

USB

rPGA 988

(37.5mm X 37.5mm)

FDI

CLK

DMI

X4 DMI interface

5GT/s2.7GT/s

CLK

DMIFDI

intel

<PCH>

CougarPoint 0.7

P4~P7

PCI-E X16

PCI-E

PCIE X16

5GT/s

iGFX Interfaces

INT_CRT

INT_LVDS

INT_HDMI

nVIDIA GPU

N12GS & N12GV Fermi Package GB2-128

Optimus (Muxless)

X'TAL

27.0MHz

P16~P22

Channel A

Channel B

EXT_HDMI EXT_CRT EXT_LVDS

VRAM GDDR3

64(or 128)Mb x16 x8 pcs

P14, 15

RT8204

GPU IO PWR

UP6111AQDD

Discharger/+3V_M

+1.8V

UP61111AQDD

CPU iGPU_CORE

RT8204

+0.85V

ISL62871

CRT

USB-8

LVDS

HDMI

CHARGER

P45

ISL88731

3/5V SYS PWR

P46

RT8206

CPU CORE PWR

P54

ISL95831

CPU +1.05V_VTT

P51

UP61111AQDD

PCH +1.05V

P45

UP61111AQDD

DDR3 PWR

P48

RT8207A

P24

P53

P52

P43~P44

P47

P49

P50

Bluetooth

B B

USB9

CCD

USB6

A A

HP Jack MIC Jack DMIC

P27

P24

Audio CODEC

CONEXANT CX20584-21Z

P30 P30

5

SPK

P30

Azalia

X'TAL

32.768KHz

P24

HDA

RTC P9

Dual SPI ROM

4MB x1 (Basic ME+Braidwood)

SPI ROM

mBGA 989

(25mm X 25mm)

1RWH +0QRWVXSSRUW86% +0QRWVXSSRUW6$7$

SPI

P9P30

Touch Pad

P31

4

P8~P13

LPC

WPCE791/FLASH

NPCE971

P31

Keyboard

P29

X'TAL 25MHz

Light Sensor

P29

PCI-Express Gen2

5GT/s

Giga LAN

X'TAL 25MHz

Arthohorus AR8151

Transformer

Button on

P33

mechanical key

3

PCIE6

RJ45

P26

PCIE1 PCIE2

Mini Card

WiFi +BT (Half)

USB3

P31

P28

USB3

Fan Driver

(PWM Type)

2

Mini Card

3G

USB4

P28

USB4

SIM Card Conn DB

P42

Size Document Number Rev

Date: Sheet

Date: Sheet of

Friday, February 11, 2011

CardReader

Realtek RTS5209

USB5

P28

Quanta Computer Inc.

PROJECT :

Block Diagram

P23

1

ZRJ

of

141

1A

1

2

3

4

5

6

7

8

02

N12P-GE Power Up Seque nce

MS15-UMA Power-ON Sequence

ACIN

A A

MAINON

+3VPCU/+5VPCU

NBSWON#

DGPU_VRON

S5_ON

+3V_GPU(VDD3)

+1.05V_GPU(PEX_VDD)

+VGPU_CORE(NVVDD)

tNVVDD

tNV-IFPAB_IOVDD

SLP_S5#,SLP_S4#,SLP_S3#

+1.8V_GPU(IFPAB_IOVDD)

tNV-FBVDDQ

B B

+1.5V_GPU(FBVDDQ)

+1.05V_PCH/+1.05V_VTT/+0.75V_DDR_VTT

+1.5VSUS/+3VSUS/+5VSUS

RSMRST#

EC_PWRBTN#

SUSON

MAINON MAINON2

+1.5V/+1.8V/+3V/+5V

T1

T2

T3

T5

N12P-GE Power up Sequence tNVVDD>0 tNV-IFPAB_IOVDD>0 tNV-FBVDDQ>0

HWPG

VRON

T10

CPU SVID BUS

+VCC_CORE

+VCC_GFX

T9

+3V_DSW

Deep S4/S5 off-on Sequence

DWPROK

SUSWARN#

C C

SUS_ACK#

SLP_SUS#

RSMRST#

S5_ON

T1

IMVP_PWRGD

EC_PWROK

SYS_PWROK

DRAMPWROK

UNCOREPWRGOOD

SUS_STAT#

PLTRST#

T4

T8

T6

T7

System Power Sequence T1: S5_ON TO RSMRST# = 30ms (spec:mini 10ms) T2: RSMRST# TO EC_PWRBTN# = 110ms (spec:mini 100ms)

+3V_S5/+5V_S5

T3: MAINON2 TO VRON = 110ms (spec:mini 99ms) T4: VRON TO EC_PWROK = 10ms (HWPG NEED TO BE HIGH at that time)

Deep S4/S5 Sequence T1: S5_ON TO RSMRST# = 30ms (spec:mini 10ms)

T5: MAINON to MAINON2 =500us

T6: EC_PWROK to UNCO REP WRGOOD =2ms(Min) T7: SUS_STAT# to PLTRST# =60us(Min) T8: SYS_PWROK to SUS_STAT# =1ms(Min) T9: +VCC_CORE to IMVP_PWRGD =5ms(Max) T10: VRON to accept SVID command. =5ms(Max)

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Date: Sheet

Monday, December 13, 2010

1

2

3

4

5

6

7

Monday, December 13, 2010

PROJECT :

Frontpage

ZRJ

of

241

8

1A

5

4

3

2

1

03

D D

+3V_S5

+3V_GPU

2.2Kȍ

SMB_ME0_CLK

SMB_ME0_DAT

+3V_S5

C C

+3V_S5

+3VPCU

G

D

NMOS

G

D

NMOS

+3V_GPU +3V_GPU

I2CS_SCL

S

I2CS_SDA

S

2.2Kȍ2.2Kȍ

N12P-GE

2.2Kȍ

S

+3V_S5

2.2Kȍ

G

DS

NMOS

G

D

NMOS

G

NMOS

G

NMOS

SMB_RUN_CLK

SMB_RUN_DAT

S

intel

<PCH>

CougarPoint 0.7

mBGA 989

(25mm X 25mm)

B B

A A

SMB_ME1_CLK

+3V_S5

SMB_PCH_CLK

SMB_PCH_DAT

6.8Kȍ

DS

MBCLK

6.8Kȍ

EC

ITE 8518

+3V

4.7Kȍ

MBDATASMB_ME1_DAT

+3V

Slave ADDRESS :A0H Slave ADDRESS :A4H

4.7Kȍ

DDR3 DIMM-0-STD (5.2H)

VREF DQ0 M2 Solution

DDR3 DIMM-1-STD (9.2H)

VREF DQ1 M2 Solution

D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Monday, December 13, 2010

Date: Sheet of

5

4

3

2

Date: Sheet

PROJECT :

SMBus Address

ZRJ

341

1

341

1A

of

5

4

3

2

1

Sandy Bridge Processor (DMI,PEG,FDI)

U26A

DMI_TXN0[8] DMI_TXN1[8] DMI_TXN2[8] DMI_TXN3[8]

DMI_TXP0[8]

D D

DMI_TXP1[8] DMI_TXP2[8] DMI_TXP3[8]

DMI_RXN0[8] DMI_RXN1[8] DMI_RXN2[8] DMI_RXN3[8]

DMI_RXP0[8] DMI_RXP1[8] DMI_RXP2[8] DMI_RXP3[8]

FDI_TXN0[8] FDI_TXN1[8] FDI_TXN2[8] FDI_TXN3[8] FDI_TXN4[8] FDI_TXN5[8] FDI_TXN6[8] FDI_TXN7[8]

FDI_TXP0[8] FDI_TXP1[8] FDI_TXP2[8]

C C

FDI_TXP3[8] FDI_TXP4[8] FDI_TXP5[8] FDI_TXP6[8] FDI_TXP7[8]

FDI_FSYNC0[8] FDI_FSYNC1[8]

FDI_INT[8]

FDI_LSYNC0[8] FDI_LSYNC1[8]

eDP_COMP INT_eDP_HPD_Q

B B

B27 B25 A25 B24

B28 B26 A24 B23

G21 E22

F21

D21 G22

D22

F20

C21

A21 H19 E19

F18 B21 C20 D18 E17

A22 G19 E20 G18 B20 C19 D19

F17

J18

J17 H20

J19 H17

A18 A17 B16

C15 D15

C17

F16 C16 G15

C18 E16 D16

F15

CPU-989P-rPGA

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]

DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]

DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3]

FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3]

FDI0_FSYNC FDI1_FSYNC

FDI_INT FDI0_LSYNC

FDI1_LSYNC

eDP_COMPIO eDP_ICOMPO eDP_HPD

eDP_AUX eDP_AUX#

eDP_TX[0] eDP_TX[1] eDP_TX[2] eDP_TX[3]

eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]

DMI

Intel(R) FDI

eDP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33

PEG_RX[0]

L35

PEG_RX[1]

K34

PEG_RX[2]

H35

PEG_RX[3]

H32

PEG_RX[4]

G34

PEG_RX[5]

G31

PEG_RX[6]

F33

PEG_RX[7]

F30

PEG_RX[8]

E35

PEG_RX[9]

E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28

PEG_TX[0]

M33

PEG_TX[1]

M30

PEG_TX[2]

L31

PEG_TX[3]

L28

PEG_TX[4]

K30

PEG_TX[5]

K27

PEG_TX[6]

J29

PEG_TX[7]

J27

PEG_TX[8]

H28

PEG_TX[9]

G28 E28 F28 D27 E26 D25

0.22uF AC coupling Caps for PCIE GEN1/2/3

PEG_COMP

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

PEG_TXN0_C PEG_TXN1_C PEG_TXN1 PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C PEG_TXN8_C PEG_TXN9_C PEG_TXN10_C PEG_TXN11_C PEG_TXN12_C PEG_TXN13_C PEG_TXN14_C PEG_TXN15_C

PEG_TXP0_C PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C PEG_TXP8_C PEG_TXP9_C PEG_TXP10_C PEG_TXP11_C PEG_TXP12_C PEG_TXP13_C PEG_TXP14_C PEG_TXP15_C

C598 EV@ 0.22u/6.3V_4C598 EV@ 0.22u/6.3V_4 C623 EV@ 0.22u/6.3V_4C623 EV@ 0.22u/6.3V_4 C600 EV@ 0.22u/6.3V_4C600 EV@ 0.22u/6.3V_4 C625 EV@ 0.22u/6.3V_4C625 EV@ 0.22u/6.3V_4 C602 EV@ 0.22u/6.3V_4C602 EV@ 0.22u/6.3V_4 C627 EV@ 0.22u/6.3V_4C627 EV@ 0.22u/6.3V_4 C604 EV@ 0.22u/6.3V_4C604 EV@ 0.22u/6.3V_4 C629 EV@ 0.22u/6.3V_4C629 EV@ 0.22u/6.3V_4 C606 EV@ 0.22u/6.3V_4C606 EV@ 0.22u/6.3V_4 C631 EV@ 0.22u/6.3V_4C631 EV@ 0.22u/6.3V_4 C608 EV@ 0.22u/6.3V_4C608 EV@ 0.22u/6.3V_4 C633 EV@ 0.22u/6.3V_4C633 EV@ 0.22u/6.3V_4 C610 EV@ 0.22u/6.3V_4C610 EV@ 0.22u/6.3V_4 C635 EV@ 0.22u/6.3V_4C635 EV@ 0.22u/6.3V_4 C612 EV@ 0.22u/6.3V_4C612 EV@ 0.22u/6.3V_4 C637 EV@ 0.22u/6.3V_4C637 EV@ 0.22u/6.3V_4

C599 EV@ 0.22u/6.3V_4C599 EV@ 0.22u/6.3V_4 C624 EV@ 0.22u/6.3V_4C624 EV@ 0.22u/6.3V_4 C601 EV@ 0.22u/6.3V_4C601 EV@ 0.22u/6.3V_4 C626 EV@ 0.22u/6.3V_4C626 EV@ 0.22u/6.3V_4 C603 EV@ 0.22u/6.3V_4C603 EV@ 0.22u/6.3V_4 C628 EV@ 0.22u/6.3V_4C628 EV@ 0.22u/6.3V_4 C605 EV@ 0.22u/6.3V_4C605 EV@ 0.22u/6.3V_4 C630 EV@ 0.22u/6.3V_4C630 EV@ 0.22u/6.3V_4 C607 EV@ 0.22u/6.3V_4C607 EV@ 0.22u/6.3V_4 C632 EV@ 0.22u/6.3V_4C632 EV@ 0.22u/6.3V_4 C609 EV@ 0.22u/6.3V_4C609 EV@ 0.22u/6.3V_4 C634 EV@ 0.22u/6.3V_4C634 EV@ 0.22u/6.3V_4 C611 EV@ 0.22u/6.3V_4C611 EV@ 0.22u/6.3V_4 C636 EV@ 0.22u/6.3V_4C636 EV@ 0.22u/6.3V_4 C613 EV@ 0.22u/6.3V_4C613 EV@ 0.22u/6.3V_4 C638 EV@ 0.22u/6.3V_4C638 EV@ 0.22u/6.3V_4

PEG_RXN[0..15] [16]

PEG_RXP[0..15] [16]

PEG_TXN0 PEG_TXN2

PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

PEG_TXN[0..15] [16]

+1.05V_VTT

PEG_TXP[0..15] [16]

SYS_PWROK[8,32]

PM_DRAM_PWRGD[8]

SNB_IVB# N.A at SNB EDS #27637 0.7v1

H_SNB_IVB#[9]

EC_PECI[11,32]

H_PROCHOT#[32,35]

PM_THRMTRIP#[11]

PM_SYNC[8]

H_PWRGOOD[11,32]

R205 75_4R205 75_4

CPU_PLTRST#

+3V_S5

C393

0.1U/10V_4

U15

2 1

74AHC1G09

3 5

Sandy Bridge Processor (CLK,MISC,JTAG)

U26B

C26

PROC_SELECT#

TP3TP3

TP1TP1

R185 56_4R185 56_4

R202 10K_4R202 10K_4

C372 0.1U/10V_4C372 0.1U/10V_4

PM_DRAM_PWRGD_R

R204 43_4R204 43_4

4

R220 *39/J_4R220 *39/J_4

SKTOCC#

TP_CATERR#

H_PROCHOT#_R

CPU_PLTRST#_R

+1.5V_CPU

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

CPU-989P-rPGA

R213

R213 200/F_4

200/F_4 R212 130/F_4R212 130/F_4

3

Q15 *2N7002KQ15 *2N7002K

2

PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q

1

MISCTHERMALPWR MANAGEMENT

MAINON_ON_G [6,40]

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

JTAG & BPM

PLTRST#[10,16,25,26,29,32]

BCLK

BCLK#

PRDY# PREQ#

TCK TMS

TRST#

TDO

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

04

A28 A27

A16 A15

R8

AK1 A5 A4

AP29 AP27

AR26 AR27 AP30

AR28

TDI

AP26

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

XDP_PRDY#

XDP_PREQ# XDP_TCLK

XDP_TMS XDP_TRST#

XDP_TDI XDP_TDO

XDP_DBRST#

U13

1

VCC5NC

2

IN GND3OUT

74LVC1G07GW

CLK_CPU_BCLKP [10] CLK_CPU_BCLKN [10]

CLK_DPLL_SSCLKP [10] CLK_DPLL_SSCLKN [10]

CPU_DRAMRST# [5]

R179 140/F_4R179 140/F_4 R139 25.5/F_4R139 25.5/F_4 R142 200/F_4R142 200/F_4

TP22TP22

XDP_DBRST# [8]

+3V_S5

C376

0.1U/10V_4

CPU_PLTRST#

4

DP & PEG Compensation

Processor pull-up(CPU)

A A

R125 24.9/F_4R125 24.9/F_4

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms

5

+1.05V_VTT+1.05V_VTT

R154 24.9/F_4R154 24.9/F_4

PEG_ICOMPI and RCOMPO signals should be routed within 500 mils typical impedance = 43 mohms

PEG_ICOMPO signals should be routed within 500 mils typical impedance = 14.5 mohms

PEG_COMPeDP_COMP

4

H_PROCHOT# XDP_TDO XDP_TMS XDP_TDI XDP_PREQ# XDP_TCLK XDP_TRST#

R192 62_4R192 62_4 R215 51_4R215 51_4 R218 51_4R218 51_4 R217 51_4R217 51_4 R214 *51_4R214 *51_4 R219 51_4R219 51_4 R208 51_4R208 51_4

+1.05V_VTT

3

IMVP_PWRGD[8,35]

PM_THRMTRIP#

2

1 3

3

Q13

Q13 FDV301N

FDV301N

1

R209

R209 1K_4

1K_4

2

Q12

Q12 MMBT3904

MMBT3904

+1.05V_VTT

SYS_SHDN# [34,41]

2

eDP Hot-plug

HPD disable

INT_eDP_HPD_Q

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Saturday, January 22, 2011

Date: Sheet of

Date: Sheet

PROJECT :

Sandy Bridge 1/4

+1.05V_VTT

ZRJ

441

1

R126

R126 1K_4

1K_4

of

1A

5

4

3

2

1

Sandy Bridge Processor (DDR3)

05

U26C

AB6

D D

C C

B B

A A

M_A_DQ[63:0][14]

M_A_BS#0[14] M_A_BS#1[14] M_A_BS#2[14]

M_A_CAS#[14] M_A_RAS#[14] M_A_WE#[14]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

5

G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6

AK8 AK9

AH8 AH9 AL9

AL8 AP11 AN11 AL12

AM12 AM11

AL11 AP12

AN12

AJ14

AH14

AL15 AK15 AL14 AK14 AJ15

AH15

AE10 AF10

AE8

AD9

AF9

C5 D5 D3 D2 D6 C6 C2 C3

F10

F8 G9

F9 F7 G8 G7 K4 K5 K1

J1 J5 J4

J2 K2 M8

N8 N7

M9 N9 M7

AJ5 AJ6 AJ8

AJ9

V6

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

CPU-989P-rPGA

SA_CLK[0] SA_CKE[0]

SA_CLK[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

4

AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

R145 1K_4R145 1K_4

SA_CLK#[0]

SA_CLK#[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

RSVD_TP[7] RSVD_TP[8]

RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

DDR SYSTEM MEMORY A

M_A_CLKP0 [14] M_A_CLKN0 [14] M_A_CKE0 [14]

M_A_CLKP1 [14] M_A_CLKN1 [14] M_A_CKE1 [14]

M_A_CS#0 [14] M_A_CS#1 [14]

M_A_ODT0 [14] M_A_ODT1 [14]

DRAMRST_CNTRL_PCH[10]

M_A_DQSN[7:0] [14]

M_A_DQSP[7:0] [14]

M_A_A[15:0] [14]

+1.5V_SUS

R153

R153 1K_4

1K_4

CD_DRAMRST#

M_B_DQ[63:0][15]

M_B_BS#0[15] M_B_BS#1[15] M_B_BS#2[15]

M_B_CAS#[15] M_B_RAS#[15] M_B_WE#[15]

3

Q6 2N7002KQ62N7002K

2

C282

0.047U/10V_4

1

R152

4.99K/F_4

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

CPU_DRAMRST# [4]DDR3_DRAMRST#[14,15]

D10

K10

AM5 AM6 AR3

AP3 AN3 AN2 AN1

AP2

AP5 AN9

AT5

AT6

AP6 AN8 AR6 AR5 AR9

AJ11

AT8

AT9

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA9 AA7

AA10

AB8 AB9

C9 A7

C8 A9 A8 D9 D8 G4

F4

F1 G1 G5

F5

F2 G2

J7

J8 K9

J9

J10

K8 K7 M5 N4 N2 N1 M4 N5 M2 M1

R6

U26D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

CPU-989P-rPGA

AE2

SB_CLK[0]

SB_CLK#[0]

SB_CLK#[1]

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

RSVD_TP[17] RSVD_TP[18]

RSVD_TP[19] RSVD_TP[20]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

DDR SYSTEM MEMORY B

2

AD2 R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1 R10

SB_CKE[1]

AB2 AA2 T9

AA1 AB1 T10

AD3

SB_CS#[0]

AE3

SB_CS#[1]

AD6 AE6

AE4

SB_ODT[0]

AD4

SB_ODT[1]

AD5 AE5

M_B_DQSN0

D7

M_B_DQSN1

F3

M_B_DQSN2

K6

M_B_DQSN3

N3

M_B_DQSN4

AN5

M_B_DQSN5

AP9

M_B_DQSN6

AK12

M_B_DQSN7

AP15

M_B_DQSP0

C7

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

Size Document Number Rev

Date: Sheet of

Saturday, January 22, 2011

M_B_DQSP1

G3

M_B_DQSP2

J6

M_B_DQSP3

M3

M_B_DQSP4

AN6

M_B_DQSP5

AP8

M_B_DQSP6

AK11

M_B_DQSP7

AP14

M_B_A0

AA8

M_B_A1

T7

M_B_A2

R7

M_B_A3

T6

M_B_A4

T2

M_B_A5

T4

M_B_A6

T3

M_B_A7

R2

M_B_A8

T5

M_B_A9

R3

M_B_A10

AB7

M_B_A11

R1

M_B_A12

T1

M_B_A13

AB10

M_B_A14

R5

M_B_A15

R4

Sandy Bridge 2/4

Quanta Computer Inc.

PROJECT :

M_B_CLKP0 [15] M_B_CLKN0 [15] M_B_CKE0 [15]

M_B_CLKP1 [15] M_B_CLKN1 [15] M_B_CKE1 [15]

M_B_CS#0 [15] M_B_CS#1 [15]

M_B_ODT0 [15] M_B_ODT1 [15]

M_B_DQSN[7:0] [15]

M_B_DQSP[7:0] [15]

M_B_A[15:0] [15]

ZRJ

1

1A

541

5

4

3

2

1

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

CPU VTT

+1.05V_VTT

+

10U/6.3V_8

R492 *short_4R492 *short_4

H_CPU_SVIDALRT# VR_SVID_CLK VR_SVID_DATA

R180 100/F_4R180 100/F_4

R181 100/F_4R181 100/F_4 R487 10/F_4R487 10/F_4

R486 10/F_4R486 10/F_4

C616

C616 330u/2V_7343

330u/2V_7343

C660

C668

C260

C670

C670 *22U/6.3V_8

*22U/6.3V_8

10U/6.3V_8

SNB 45W:8.5A

Spec

330uF/6mohm x 2 22uF x 12 22uF x 7 (Non-stuff)

+

C326

C326 *330U/2V_7343

*330U/2V_7343

C262

C673

10U/6.3V_8

C258

C658

C639

10U/6.3V_8

C295

C295 *22U/6.3V_8

*22U/6.3V_8

+1.05V_VTT

10U/6.3V_8

C294

C663

C663 *22U/6.3V_8

*22U/6.3V_8

CPU VCCPL

SNB 45W:1.5A

Spec

330uF/7mohm x 1 10uF x 1 1uF x 2

+VCC_CORE

VCCSENSE [35] VSSSENSE [35]

+1.05V_VTT

VCCP_SENSE [36] VSSP_SENSE [36]

MAIND[34,37,40]

C640

10U/6.3V_8

C265

10U/6.3V_8

R195 *short_8R195 *short_8

3

2

3

C677

C264

C292

C292 *22U/6.3V_8

*22U/6.3V_8

Q11

Q11 *2N7002E

*2N7002E

CPU VGT

SNB 45W:21.5A

Spec

470uF/4mohm x 2 22uF x 12

+

C694

C694 *330U/2V_7343

*330U/2V_7343

C690

C690 *22U/6.3V_8

*22U/6.3V_8

+1.8V

+VDDR_REF_CPU+SMDDR_VREF

1

R196

R196 *100K_4

*100K_4

C387

10U/6.3V_8

C382

10U/6.3V_8

C391

4.7U/25V_8

C676

C676 *22U/6.3V_8

*22U/6.3V_8

C270

4.7U/6.3V_6

Sandy Bridge Processor (GRAPHIC POWER)

POWER

R191

R191 75_4

75_4

VR_SVID_ALERT#H_CPU_SVIDALRT#

POWER

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

1.8V RAIL

SVID CLK

VR_SVID_CLK [35]

SVID DATA

VR_SVID_DATA [35]

SVID ALERT

VR_SVID_ALERT# [35]

VAXG_SENSE

SM_VREF

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA_SENSE

FC_C22

VCCSA_VID1

Size Document Number Rev

Date: Sheet of

Date: Sheet

+VCC_GFX

AR24 AR23 AR21

C381

10U/6.3V_8

C384

10U/6.3V_8

C691

4.7U/25V_8

+

AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17

AK24 AK23 AK21 AK20 AK18 AK17

AH24 AH23 AH21 AH20 AH18 AH17

C619

C619 *330u/6.3V_7343

*330u/6.3V_7343

+

C696

C696 *330U/2V_7343

*330U/2V_7343

10U/6.3V_8

4.7U/25V_8

+

C695

C695 *330U/2V_7343

*330U/2V_7343

C388

C379

10U/6.3V_8

C390

C380

10U/6.3V_8

C392

C675

4.7U/25V_8

C386

C689

*22U/6.3V_8

C268

C269

1U/6.3V_4

Layout note: need routing together and ALERT need between CLK and DATA

VR_SVID_CLK

Place PU resistor close to CPU

+1.05V_VTT

R190

R190 130/F_4

VR_SVID_DATA

130/F_4

Place PU resistor close to CPU

R184 43_4R184 43_4

AT24 AT23 AT21 AT20 AT18 AT17

AL24 AL23 AL21 AL20 AL18 AL17

AJ24 AJ23 AJ21 AJ20 AJ18 AJ17

B6 A6 A2

U26G

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

VCCPLL1 VCCPLL2 VCCPLL3

CPU-989P-rPGA

+1.05V_VTT

2

R182 10/F_4R182 10/F_4

AK35 AK34

R183 10/F_4R183 10/F_4

+VDDR_REF_CPU

AL1

CAD Note: +VDDR_REF_CPU should have 10 mil trace width

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

M27 M26 L26 J26 J25 J24 H26 H25

H23

H_FC_C22

C22 C24

+VDDR_REF_CPU

C324

C348

4.7U/25V_8

C360

C359

10U/6.3V_8

4.7U/25V_8

CPU SA

SNB 45W: 6A

Spec

330uF/7mohm x 1

10uF x 3

C291

4.7U/25V_8

VCCSA_SENSE [39]

R129 10K_4R129 10K_4

VCCSA_SEL [39]

C283

4.5A

R178 *short_1206R178 *short_1206 R168 *short_1206R168 *short_1206

8 7

5

4

MAIND

C357

C357 *470P/50V_4

*470P/50V_4

MAINON_ON_G[4,40]

Quanta Computer Inc.

PROJECT :

Sandy Bridge 3/4

Saturday, January 22, 2011

1

+VCC_GFX

VCC_AXG_SENSE [35] VSS_AXG_SENSE [35]

C288

4.7U/25V_8

C290

10U/6.3V_8

4.7U/25V_8

+1.5V_CPU+1.5V_SUS

1 2 36

Q10

Q10 *AO4496

*AO4496

2

ZRJ

CPU MCH

SNB 45W: 5A

Spec

330uF/6mohm x 1 10uF x 6

Real

10uF x 6

C286

06

+1.5V_CPU

C289

C309

4.7U/25V_8

+

C354

C354 330U/2V_7343

330U/2V_7343

VCCSA

+

C287

C287 *330U/2V_7343

*330U/2V_7343

R155

R155 *220_8

*220_8

3

Q7

Q7 *DMN601K-7

*DMN601K-7

1

1A

of

641

Sandy Bridge Processor (POWER)

POWER

U26F

C304

10U/6.3V_8

C671

10U/6.3V_8

C336

10U/6.3V_8

C333

10U/6.3V_8

C306

+VCC_CORE

C318

10U/6.3V_8

C667

10U/6.3V_8

C314

10U/6.3V_8

C332

10U/6.3V_8

C305

10U/6.3V_8

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

CPU-989P-rPGA

D D

CPU Core Power

SNB 45W:52A

Spec

470uF/4mohm x 4 22uF x 16 10uF x 10

C358

C358 *22U/6.3V_8

*22U/6.3V_8

C661

C C

10U/6.3V_8

C334

C334 *22U/6.3V_8

*22U/6.3V_8

C303

C303 *22U/6.3V_8

*22U/6.3V_8

+

C298

C298 *470u/2V_7343

*470u/2V_7343

B B

A A

C323

10U/6.3V_8

C666

10U/6.3V_8

C313

10U/6.3V_8

C316

C316 *22U/6.3V_8

*22U/6.3V_8

C338

10U/6.3V_8

C672

10U/6.3V_8

C302

10U/6.3V_8

C315

10U/6.3V_8

+

C299

C299 *470u/2V_7343

*470u/2V_7343

C307

10U/6.3V_8

C320

10U/6.3V_8

C319

10U/6.3V_8

C317

10U/6.3V_8

5

C337

10U/6.3V_8

C662

10U/6.3V_8

C301

10U/6.3V_8

C335

10U/6.3V_8

+

C340

470u/2V_7343

10U/6.3V_8

POWER

PEG AND DDR

CORE SUPPLY

SENSE LINES SVID

4

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE VSSIO_SENSE

5

4

3

2

1

Sandy Bridge Processor (GND)

U26I

M34

H33 H30 H27 H24 H21 H18 H15 H13 H10

G35 G32 G29 G26 G23 G20 G17 G11

T35 T34 T33 T32 T31 T30 T29 T28 T27 T26

N35 N34 N33 N32 N31 N30 N29 N28 N27 N26

L33 L30 L27

K35 K32 K29 K26 J34 J31

F34 F31 F29

U26I

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

Sandy Bridge Processor (RESERVED, CFG)

U26E

L7

RSVD28

AG7

TP21TP21 TP2TP2

TP7TP7 TP6TP6 TP5TP5 TP4TP4

T7T7

CFG0 CFG2 CFG4CFG4

CFG5 CFG6 CFG7CFG7

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

CPU-989P-rPGA

RESERVED

RSVD29 RSVD30 RSVD31 RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

VCC_DIE_SENSE

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

KEY

AE7 AK2 W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AH27

AN35 AM35

AT2 AT1 AR1

B1

07

U26H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

D D

C C

B B

AT10

AR25 AR22 AR19 AR16 AR13 AR10

AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7 AM4 AM3 AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AJ25

AT7 AT4 AT3

AR7 AR4 AR2

AP7 AP4 AP1

AN7 AN4

AL7 AL4 AL2

AK7 AK4

VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

CPU-989P-rPGA

Processor Strapping

The CFG signals have a default value of '1' if not terminated on the board.

10

CFG2

A A

(PEG Static Lane Reversal)

CFG4 (DP Presence Strap)

CFG7 (PEG Defer Training)

5

Normal Operation Lane Reversed

Disable; No physical DP attached to eDP

PEG train immediately following xxRESETB de assertion

CPU-989P-rPGA

Enable; An ext DP device is connected to eDP

PEG wait for BIOS training

4

CFG2

CFG7

3

R216 1K/F_4R216 1K/F_4

R194 *1K/F_4R194 *1K/F_4

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Monday, December 20, 2010

Date: Sheet of

Monday, December 20, 2010

Date: Sheet of

Monday, December 20, 2010

2

Date: Sheet

PROJECT :

Sandy Bridge 4/4

ZRJ

741

1

of

1A

5

Cougar Point (DMI,FDI,PM)

U28C

DMI_RXN0[4]

+1.05V_VTT

PM_DRAM_PWRGD[4]

DMI_RXN1[4] DMI_RXN2[4] DMI_RXN3[4]

DMI_RXP0[4] DMI_RXP1[4] DMI_RXP2[4] DMI_RXP3[4]

DMI_TXN0[4] DMI_TXN1[4] DMI_TXN2[4] DMI_TXN3[4]

DMI_TXP0[4] DMI_TXP1[4] DMI_TXP2[4] DMI_TXP3[4]

R237 49.9/F_4R237 49.9/F_4 R235 750/F_4R235 750/F_4

XDP_DBRST#[4]

PWROK_EC[32]

ICH_RSMRST#[32]

DNBSWON#[32]

DMI_COMP

DMI2RBIAS

SUS_PWR_ACK

XDP_DBRST#

SYS_PWROK

PM_DRAM_PWRGD

ICH_RSMRST#

SUS_PWR_ACK

AC_PRESENT

PM_BATLOW#

PM_RI#

D D

C C

B B

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_R1P0

DMI

FDI

DMI

FDI

+3V

CLKRUN# / GPIO32

+3V_S5

SUS_STAT# / GPIO61

+3V_S5

SUSCLK / GPIO62

+3V_S5

SLP_S5# / GPIO63

System Power Management

DSW

+3V_S5

SLP_LAN# / GPIO29

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

SLP_S4#

+3V_S5

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

WAKE#

4

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16 AV12 BC10 AV14 BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWVREN

R596 *short_4R596 *short_4

PCIE_WAKE#

CLKRUN#

SLP_LAN#

FDI_TXN0 [4] FDI_TXN1 [4] FDI_TXN2 [4] FDI_TXN3 [4] FDI_TXN4 [4] FDI_TXN5 [4] FDI_TXN6 [4] FDI_TXN7 [4]

FDI_TXP0 [4] FDI_TXP1 [4] FDI_TXP2 [4] FDI_TXP3 [4] FDI_TXP4 [4] FDI_TXP5 [4] FDI_TXP6 [4] FDI_TXP7 [4]

FDI_INT [4] FDI_FSYNC0 [4] FDI_FSYNC1 [4] FDI_LSYNC0 [4] FDI_LSYNC1 [4]

ICH_RSMRST#

PCIE_WAKE# [25]

CLKRUN# [32]

SUS_STAT# [32]

PCH_SUSCLK [32]

T13T13

SUSC# [32]

SUSB# [32]

T11T11

T12T12

PM_SYNC [4]

3

+3V

R274 2.2K_4R274 2.2K_4 R275 2.2K_4R275 2.2K_4

INT_LVDS_BLON[24]

INT_LVDS_VDDEN[24]

INT_LVDS_BRIGHT[24]

INT_LVDS_EDIDCLK[24] INT_LVDS_EDIDDATA[24]

INT_TXLCLKOUTN[24] INT_TXLCLKOUTP[24]

INT_TXLOUTN0[24] INT_TXLOUTN1[24] INT_TXLOUTN2[24]

INT_TXLOUTP0[24] INT_TXLOUTP1[24] INT_TXLOUTP2[24]

INT_LVDS_EDIDCLK

INT_LVDS_EDIDDATA

R276 2.2K_4R276 2.2K_4

+3V

R294 2.2K_4R294 2.2K_4 R258 2.37K/F_4R258 2.37K/F_4

T10T10

INT_TXLCLKOUTN INT_TXLCLKOUTP

INT_TXLOUTN0 INT_TXLOUTN1 INT_TXLOUTN2

INT_TXLOUTP0 INT_TXLOUTP1 INT_TXLOUTP2

R place close to PCH

INT_CRT_BLU INT_CRT_GRE INT_CRT_RED

INT_CRT_DDCCLK INT_CRT_DDCDAT

R320 20/F_4R320 20/F_4 R306 20/F_4R306 20/F_4

INT_CRT_BLU INT_CRT_GRE INT_CRT_RED

INT_CRT_HSYNC_R INT_CRT_VSYNC_R

DAC_IREF

R287

R287 1K/F_4

1K/F_4

INT_CRT_HSYNC[24]

INT_CRT_VSYNC[24]

R300 150/F_4R300 150/F_4 R292 150/F_4R292 150/F_4 R284 150/F_4R284 150/F_4

+3V

R285 2.7K_4R285 2.7K_4 R293 2.7K_4R293 2.7K_4

INT_CRT_DDCCLK[24] INT_CRT_DDCDAT[24]

INT_CRT_BLU[24] INT_CRT_GRE[24] INT_CRT_RED[24]

2

Cougar Point (LVDS,DDI)

U28D

J47

M45

P45 T40

K47 T45

P39

AF37 AF36

AE48 AE47

AK39 AK40

AN48 AM47 AK47

AJ48

AN47 AM49 AK49

AJ47

AF40 AF39

AH45 AH47 AF49 AF45

AH43 AH49 AF47 AF43

N48

P49 T49

T39

M40

M47 M49

T43 T42

CougarPoint_R1P0

L_BKLTEN L_VDD_EN

L_BKLTCTL L_DDC_CLK

L_DDC_DATA L_CTRL_CLK

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN

DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN

DDPD_AUXP

CRT

DDPD_HPD

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

1

08

INT_HDMI_SCL [23] INT_HDMI_SDA [23]

INT_HDMI_HPD [23]

INT_HDMI_TXDN2 [23] INT_HDMI_TX DP2 [23] INT_HDMI_TXDN1 [23] INT_HDMI_TX DP1 [23] INT_HDMI_TXDN0 [23] INT_HDMI_TX DP0 [23] INT_HDMI_TXCN [23] INT_HDMI_TXCP [23]

INT. HDMI INT. DP

PCH Pull-high/low(CLG) System PWR_OK(CLG)

DSWVREN

+3V_RTC+3V_S5

R588

R588 330K_4

330K_4

R574

R574 *330K_4

*330K_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Saturday, January 22, 2011

Date: Sheet of

Saturday, January 22, 2011

Date: Sheet of

Saturday, January 22, 2011

2

Date: Sheet

PROJECT :

Cougar Point 1/6

ZRJ

841

1

1A

of

+3V

CLKRUN# XDP_DBRST#

ICH_RSMRST#

A A

SYS_PWROK

R547 8.2K_4R547 8.2K_4 R554 10K_4R554 10K_4 R555 *1K_4R555 *1K_4 R578 10K_4R578 10K_4 R277 10K_4R277 10K_4

PM_RI# PM_BATLOW# PCIE_WAKE# SLP_LAN# SUS_PWR_ACK AC_PRESENT

PM_DRAM_PWRGD

R564 10K_4R564 10K_4 R341 8.2K_4R341 8.2K_4 R565 10K_4R565 10K_4 R360 *10K_4R360 *10K_4 R568 10K_4R568 10K_4 R362 10K_4R362 10K_4

R572 200/F_4R572 200/F_4

+3V_S5

C461

C461 *0.1U/10V_4

*0.1U/10V_4

U17

SYS_PWROK[4,32]

SYS_PWROK

U17

4

TC7SH08

2 1

3 5

R263

R263 100K_4

100K_4

PWROK_EC

IMVP_PWRGD [4,35]

On Die DSW VR Enable

High = Enable (Default)

Low = Disable

5

4

3

5

RTC Circuitry(RTC)

20mils

+3V_RTC

D19

+3V_RTC_1

20MIL

D19

BAT54C

R604 20K_4R604 20K_4

30mils

R605 20K/J_4R605 20K/J_4

C742

C742 1U/6.3V_4

1U/6.3V_4

C740

C740 1U/6.3V_4

1U/6.3V_4

C741

C741 1U/6.3V_4

1U/6.3V_4

RTC_RST#

12

J1

*SHORT_ PAD1

SRTC_RST#

12

J2

*SHORT_ PAD1

+3VPCU

D D

R571

R571 1K_4

1K_4

20MIL

CN23

1

2

RTC_CONN

HDA Bus(CLG)

ACZ_BITCLK[28]

ACZ_SYNC[28]

C C

ACZ_RST#[28]

ACZ_SDOUT[28]

R343 33_4R343 33_4 R347 33_4R347 33_4 R364 33_4R364 33_4 R597 33_4R597 33_4

ACZ_BITCLK_R ACZ_SYNC_R ACZ_RST#_R ACZ_SDOUT_R

PCH JTAG Debug ( C LG)

+3V_S5

R321

R309

210/F_4

PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TCK

R310

R322

R558

R558 51_4

51_4

PCH Dual SPI (CLG)

B B

PCH_SPI_CS0# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO

A A

R533 *short_4R533 *short_4 R529 *short_4R529 *short_4 R536 *short_4R536 *short_4

R530 3.3K_4R530 3.3K_4

+3V

R322

100/F_4

MX25L3205DM2I-12G: AKE39FP0Z00

W25X32VSSIG: AKE39ZP0N00

U27

1

CE#

PCH_SPI1_CLK_R PCH_SPI1_SI_R PCH_SPI1_SO_R

C720

C720 *22P/50V_4

*22P/50V_4

5

VDD

6

SCK

5

SI

2

SO

HOLD#

3

WP#

VSS

SPI Flash

REV: B modify footprint

8

R538 3.3K_4R538 3.3K_4

7 4

+3V

C724

0.1U/10V_4

4

PCH2(CLG)

C738 18P/50V_4C738 18P/50V_4

C734 18P/50V_4C734 18P/50V_4

PCH Strap Table

Pin Name

SPKR

GNT3# / GPIO55

INTVRMEN

GNT1# / GPIO51

GPIO19

HDA_SDO

DF_TVS

GPIO28

HDA_SYNC On-Die PLL VR Voltage Select RSMRST

GPIO8

SPI_MOSI

NV_ALE

4

23

R575

R575 10M_4

10M_4

R600 1M_4R600 1M_4

SPKR[28]

ACZ_SDIN0[28]

TP33TP33

R544 *10K_4R544 *10K_4

4 1

+3V_RTC

+3VPCU

Y4

32.768KHZY432.768KHZ

Strap description

No reboot mode setting PWROK

Top-Block Swap Override

Integrated 1.05V VRM enable ALWAYS Should be always pull-up

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

Flash Descriptor Security

DMI/FDI Termination voltage

On-die PLL Voltage Regulator RSMRST#

Integrated Clock Chip Enable

iTPM function Disable APWROK

Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm)

3

RTC_X1 RTC_X2 RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INVRMEN

ACZ_BITCLK_R ACZ_SYNC_R SPKR ACZ_RST#_R

TP14TP14

ACZ_SDOUT_R

TP34TP34

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

PCH_SPI_CLK PCH_SPI_CS0# PCH_SPI_CS1#

PCH_SPI_SI PCH_SPI_SO

Sampled

PWROK

RSMRST

PWROK

RSMRST#

3

2

Cougar Point (HDA,JTAG,SATA)

U28A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_R1P0

Configuration

0 = Default (weak pull-down 20K) 1 = Setting to No-Reboot mode

0 = "top-block swap" mode 1 = Default (weak pull-up 20K)

GNT0#GNT1#

11 00

0 = Override 1 = Default (weak pull-up 20K)

0 = Set to Vss 1 = Set to Vcc (weak pull-down 20K)

0 = Disable 1 = Enable (Default)

0 = Support by 1.8V (weak pull-down) 1 = Support by 1.5V

Should be pull-down (weak pull-up 20K)

0 = Default (weak pull-down 20K) 1 = Enable

RTCIHDA

JTAG

SPI

+3V

Boot Location

LPC

FWH4 / LFRAME#

+3V

LDRQ1# / GPIO23

SATA 6G

+3V

SATA

+3V_S5

SATA3RCOMPO

SATA0GP / GPIO21 SATA1GP / GPIO19

SPI

*

LPC

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

C38 A38 B37 C37

D36

PCH_DRQ#0

E36

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATALED#

PCH_DRQ#1

K36

SERIRQ

V5

AM3 AM1

SATA_TXN0_C

AP7

SATA_TXP0_C

AP5

SATA_RX1N

AM10

SATA_RX1P

AM8

SATA_TXN1_C

AP11

SATA_TXP1_C

AP10 AD7

AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

SATA_COMP

Y10

AB12

SATA3_COMP

AB13

SATA3_RBIAS

AH1

P3

PCH_ODD_EN

V14

BBS_BIT0

P1

R546 *1K_4R546 *1K_4

+3V

R570 *1K_4R570 *1K_4

R576 330K_4R576 330K_4

+3V_RTC

Default weak pull-up on GNT0/1# [Need external pull-down for LPC BIOS]

ME_WR#[32]

2

R566 *1K_4R566 *1K_4 R548 *1K_4R548 *1K_4

+3V

R522 2.2K_4R522 2.2K_4 R523 1K_4R523 1K_4

R311 *1K_4R311 *1K_4

+3V_S5

TP15TP15 TP12TP12

C434 0.01U/25V_4C434 0.01U/25V_4 C430 0.01U/25V_4C430 0.01U/25V_4

C428 0.01U/25V_4C428 0.01U/25V_4 C429 0.01U/25V_4C429 0.01U/25V_4

R272 37.4/F_4R272 37.4/F_4

R271 49.9/F_4R271 49.9/F_4

R532 750/F_4R532 750/F_4

R545 10KR545 10K

R580 *1K_4R580 *1K_4 R598 0_4R598 0_4

R365 1K_4R365 1K_4

LAD0 [26,32] LAD1 [26,32] LAD2 [26,32] LAD3 [26,32]

LFRAME# [26,32]

SERIRQ [32]

+3V

SATA_ACT# [31]

SPKR

PCH_INVRMEN

+1.8V

1

09

SERIRQ PCH_ODD_EN

SATA_RXN0 [27] SATA_RXP0 [27] SATA_TXN0 [27] SATA_TXP0 [27]

SATA_RX1N [27] SATA_RX1P [27] SATA_TXN1 [27] SATA_TXP1 [27]

+1.05V_VTT

PCI_GNT3# [10]

BBS_BIT1 [10]

BBS_BIT0

ACZ_SDOUT_R

DF_TVS [11] H_SNB_IVB# [4]

PLL_ODVR_EN [11]

ACZ_SYNC_R

Size Document Number Rev

Date: Sheet of

Date: Sheet

Cougar Point 2/6

Saturday, January 22, 2011

R278 8.2K_4R278 8.2K_4 R262 *10K_4R262 *10K_4

SATA HDD

SATA ODD

Quanta Computer Inc.

PROJECT :

1

+3V

ZRJ

941

1A

of

5

4

3

2

1

Cougar Point-M (PCI-E,SMBUS,CLK)

Cougar Point-M (PCI,USB,NVRAM)

U28E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

D D

C C

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

T14T14

TP13TP13

R315 22_4R315 22_4 R319 22_4R319 22_4 R314 22_4R314 22_4

dGPU_EDIDSEL#

DGPU_SELECT# GPIO54

BBS_BIT1 PCI_GNT 3#

MPC_PWR_CTRL# dGPU_PWM_SELECT#

EXTTS_SNI_DRV1_PCH

PCI_PME # PCI_PLTR ST#

CLK_PCI_LPC_R CLK_PCI_EC_R

dGPU_EDIDSEL#[24]

DGPU_SELECT#[24]

BBS_BIT1[9]

PCI_GNT 3#[9]

dGPU_PWM_SELECT#[24]

DGPU_HOLD_RST#[16]

CLK_PCI_FB CLK_PCI_FB_R

CLK_PCI_LPC[26]

CLK_PCI_EC[32]

B B

AH37 AK43 AK45

AH12

AB46 AB45

AY16 BG46

BE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28

AW30

C18 N30

H3

AM4 AM5

Y13 K24 L24

B21 M20

K40 K38 H38 G38

C46 C44 E40

D47 E42 F46

G42 G40 C42 D44

K10

C6

H49 H43 J48 K42 H40

TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20

TP21 TP22 TP23 TP24

TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40

PIRQA# PIRQB# PIRQC# PIRQD#

REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

PME# PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

CougarPoint_R1P0

RSVD

+3V +3V +3V

+3V +3V +3V +3V

PCI

+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5

USB

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25 RSVD26

RSVD27 RSVD28

RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8 AY5

BA2 AT12

BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

USBP1USBP1+

USBP3USBP3+ USBP4USBP4+ USBP5USBP5+

USBP8USBP8+ USBP11USBP11+ USBP10USBP10+

USBP13USBP13+

USB_BIAS

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

USBP1- [30] USBP1+ [30]

USBP3- [30] USBP3+ [30] USBP4- [31] USBP4+ [31] USBP5- [26,31] USBP5+ [26,31]

USBP8- [24] USBP8+ [24] USBP11- [30] USBP11+ [30] USBP10- [26] USBP10+ [26]

USBP13- [26] USBP13+ [26]

R579 22.6/F_4R579 22.6/F_4

USB_OC4# [30]

EXT/B-USB1-1

EXT/B-USB1-2 BlueTooth

Camera EXT/B-USB1-1 Mini Card (WLAN)

Mini Card (3G)

EHCI1

EHCI2

GLAN

Mini 3G

JM389

MiniWLAN

MINI 3G

WLAN

JM388

LAN

PCIE_R X1-[25] PCIE_R X1+[25]

PCIE_TX1-[25] PCIE_TX1+[25]

PCIE_R X3-_3G[26]

PCIE_R X3+_3G[26] PCIE_TX3-_3G[26] PCIE_TX3+_3G[26]

PCIE_R X5#[29]

PCIE_R X5[29] PCIE_TX5#[29] PCIE_TX5[29]

PCIE_R X6-[26] PCIE_R X6+[26]

PCIE_TX6-[26]

PCIE_TX6+[26]

CLK_PCIE_3GN[26] CLK_PCIE_3GP[26]

PCIE_CLKREQ_3G#[26]

CLK_PCIE_WLANN[26] CLK_PCIE_WLANP[26]

CLKREQ_WLAN#[26]

CLK_SRC5#[29] CLK_SRC5[29]

PCIE_CLKREQ5#[29]

CLK_PCIE_LANN[ 25] CLK_PCIE_LANP[25]

PCIE_CLKREQ_LAN#[25]

C410 0.1U/10V_4C410 0.1U/10V_4 C411 0.1U/10V_4C411 0.1U/10V_4

C417 3G@0.1U/10V_4C417 3G@0.1U/10V_4 C418 3G@0.1U/10V_4C418 3G@0.1U/10V_4

C415 0.1u/10V_4C415 0.1u/10V_4 C416 0.1u/10V_4C416 0.1u/10V_4

C414 0.1U/10V_4C414 0.1U/10V_4 C413 0.1U/10V_4C413 0.1U/10V_4

T8T8 T9T9

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_TXN5_C PCIE_TXP5_C

PCIE_TXN6_LAN_C PCIE_TXP6 _LAN_C

PCIE_C LKREQ0#

CLK_PCIE_3GN CLK_PCIE_3GP

PCIE_CLKREQ_3G#

CLK_PCIE_WLANN CLK_PCIE_WLANP

CLKREQ_WLAN#

PCIE_CLKREQ_REV0#

PCIE_CLKREQ_REV1#

PCIE_CLKREQ5#

CLK_PCIE_LANN CLK_PCIE_LANP

PCIE_CLKREQ_LAN#

CLK_PCIE_REQ6#

CLK_PCIE_REQ7#

U28B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPoint_R1P0

+3V_S5

SMBUSController

+3V_S5

SML1ALERT# / PCHHOT# / GPIO74

+3V_S5

PCI-E*

+3V_S5

CLOCKS

+3V

+3V_S5

+3V

+3V_S5

+3V

SMBALERT# / GPIO11

SMBDATA

SML0ALERT# / GPIO60

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_DATA1

Link

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SML0CLK

CL_CLK1

SMBALERT#

E12

SMB_PCH_CLK

H14

SMB_PCH_DAT

C9

DRAMRST_CNTRL_PCH

A12

SMB_ME0_CLK

C8

SMB_ME0_DAT

G12

SML1ALERT#_R

C13

SMB_ME1_CLK

E14

SMB_ME1_DAT

M16

M7

T11

P10

PCIE_CLKREQ_PEG#

M10

CLK_PCIE_VGAN

AB37

CLK_PCIE_VGAP

AB38

AV22 AU22

AM12 AM13

CLK_BUF_PCIE_3GPLLN

BF18

CLK_BUF_PCIE_3GPLLP

BE18

CLK_BUF_BCLKN

BJ30

CLK_BUF_BCLKP

BG30

CLK_BUF_DREFCLKN

G24

CLK_BUF_DREFCLKP

E24

CLK_BUF_DREFSSCLKN

AK7

CLK_BUF_DREFSSCLKP

AK5

CLK_PCH_14M

K45

CLK_PCI_FB

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

SKU_ID1

K43

CLK_FLEX1

F47

CLK_FLEX2

H47

CLK_FLEX3

K49

R589 *0_4R589 *0_4

PCIE_CLKREQ_PEG# [16]

CLK_PCIE_VGAN [16] CLK_PCIE_VGAP [16]

CLK_CPU_BCLKN [4] CLK_CPU_BCLKP [4]

CLK_DPLL_SSCLKN [4] CLK_DPLL_SSCLKP [4]

R542 90.9/F_4R542 90.9/F_4

R286 *22_4R286 *22_4 R563 0_4R563 0_4

T30T30

DRAMRST_CNTRL_PCH [5]

SML1ALERT# [11,31]

CL_CLK1 [26]

CL_DATA1 [26]

CL_RST1# [26]

+1.05V_VTT

SKU_ID1 [11]

CLK_27M_VGA [18]

ODD_PRSNT# [27]

R539

R539 1M_4

1M_4

10

For LAN

For EC

C726 27P/50V_4C726 27P/50V_4

21

Y3 25MHzY325MHz

C719 27P/50V_4C719 27P/50V_4

2

SMBus/Pull-up(CLG)CLK_REQ/Strap Pin(CLG)

MBCLK2[32]

MBDATA2[32]

+3V_S5

R569 1K_4R569 1K_4 R355 10K_4R355 10K_4

R337 2.2K_4R337 2.2K_4 R356 2.2K_4R356 2.2K_4 R562 2.2K_4R562 2.2K_4 R352 2.2K_4R352 2.2K_4 R573 10K_4R573 10K_4

+3V_S5

3

+3V_S5

3

R339

2.2K_4

2

SMB_ME1_CLK

1

Q22

Q22 2N7002K

2N7002K

R338

2.2K_4

2

SMB_ME1_DAT

1

Q21

Q21 2N7002K

2N7002K

DRAMRST_CNTRL_PCH SMBALERT#

SMB_PCH_CLK SMB_PCH_DAT SMB_ME0_CLK SMB_ME0_DAT SML1ALERT#_R

SMBus(PCH)

+3V

R330

2

4.7K_4

SMB_PCH_CLK

3

Q20 2N7002KQ20 2N7002K

SMB_PCH_DAT

3

Q23 2N7002KQ23 2N7002K

Size Document Number Rev

Date: Sheet of

Date: Sheet

Cougar Point 3/6

Saturday, January 22, 2011

4.7K_4

1

SMB_RUN_CLK [14,15,26]

+3V

R361

2

4.7K_4

1

SMB_RUN_DAT [ 14,15,26]

Quanta Computer Inc.

PROJECT :

1

ZRJ

of

10 41

1A

PLTRST#(CLG)

+3V_S5

C739

0.1U/10V_4

PCI_PLTR ST#

A A

2 1

3 5

5

U29

U29 TC7SH08FU

TC7SH08FU

PLTRST#

4

R603

R603 100K_4

100K_4

PLTRST# [4,16,25,26,29,32]

PCI/USBOC# Pull-up(CLG)

R599

10

USB_OC4# USB_OC1# USB_OC2# USB_OC3#

4

9 8 7 4

10KX8

1 2 3

56

MPC_PWR_CTRL# GPIO54

dGPU_PWM_SELECT#

MPC Switch Control

MPC_PWR_CTRL#

USB_OC6# USB_OC0# USB_OC7# USB_OC5#

+3V

10

9 8 7 4

R329 *1K_4R329 *1K_4

PCI_PIRQA#

R567 8.2K_4R567 8.2K_4

PCI_PIRQB#

R581 8.2K_4R581 8.2K_4

PCI_PIRQC#

R348 8.2K_4R348 8.2K_4

PCI_PIRQD#

R349 8.2K_4R349 8.2K_4

R344

10KX8

Low = MPC ON High = MPC OFF (Default)

DGPU_HOLD_RST#

1

EXTTS_SNI_DRV1_PCH

2

dGPU_EDIDSEL#

3

DGPU_SELECT#

56

+3V_S5

+3V+3V_S5

3

R557 10K_4R557 10K_4 R561 10K_4R561 10K_4 R357 10K_4R357 10K_4 R358 *10K_4R358 *10K_4 R328 10K_4R328 10K_4 R298 10K_4R298 10K_4 R342 10K_4R342 10K_4

+3V

R551 10K_4R551 10K_4 R269 10K_4R269 10K_4

+3V_S5

R316 EV@10K_4R316 EV@10K_4 R317 *10K_4R317 *10K_4

CLK_BUF_BCLKN CLK_BUF_BCLKP

CLK_BUF_PCIE_3GPLLN CLK_BUF_PCIE_3GPLLP CLK_BUF_DREFCLKN CLK_BUF_DREFCLKP CLK_BUF_DREFSSCLKN CLK_BUF_DREFSSCLKP CLK_PCH_14M

CLOCK TERMINATION for FCIM

PCIE_C LKREQ0# PCIE_CLKREQ_REV0# PCIE_CLKREQ_REV1# PCIE_C LKREQ5# PCIE_CLKREQ_LAN# CLK_PCIE_REQ6# CLK_PCIE_REQ7#

PCIE_CLKREQ_3G# CLKREQ_WLAN#

PCIE_CLKREQ_PEG#

R230 10K_4R230 10K_4 R229 10K_4R229 10K_4

R232 10K_4R 232 10K_4 R231 10K_4R 231 10K_4 R312 10K_4R312 10K_4 R325 10K_4R325 10K_4 R249 10K_4R 249 10K_4 R252 10K_4R252 10K_4 R301 10K_4R 301 10K_4

5

4

3

2

1

Cougar Point (GPIO,VSS_NCTF,RSVD)

U28F

S_GPIO

EC_EXT_SMI#[32]

D D

check VR_ON GPIO

EC_EXT_SCI#[32]

TP16TP16

dGPU_PWROK[16,32]

PLL_ODVR_EN[9]

Need Check

C C

DGPU_PWR_EN[40]

dGPU_VRON[32,38,40]

DGPU_PWR_EN

SML1ALERT#[10,31]

SV_SET_UP

High = Strong (Default)

B B

+3V

TEST_SET_UP

R265 10K_4R265 10K_4 R270 *0_4R270 *0_4

SGPIO

S_GPIO

+3V_S5

PCH_GPIO15

Intel ME Crypto Transport Layer Security (TLS) cipher suite

Low = Disable (Default)

High = Enable

A A

FDI TERMINATION VOLTAGE OVERRIDE

R559 1K_4R559 1K_4

MFG-TEST

MFG_MODE

FDI_OVRVLTG DMI_OVRVLTG BIOS_REC

R318 *10K/F_4R318 *10K/F_4

LOW - Tx, Rx terminated to same voltage

5

R283 100_4R283 100_4

EC_EXT_SMI# BOARD_ID1 EC_EXT_SCI#

SMIB# PCH_GPIO15

SKU_ID0

dGPU_PWROK BIOS_REC

GPIO27

R308 *short_4R308 *short_4

STP_PCI#

R280 0_4R280 0_4

FDI_OVRVLTG MFG_MODE BOARD_ID0 TEST_SET_UP

R534 0_4R534 0_4

SV_DET

R289 1K/F_4R289 1K/F_4 R282 *0_4R282 *0_4

R549 10K_4R549 10K_4 R550 *0_4R550 *0_4

DMI TERMINATION

VOLTAGE OVERRIDE

CR_WAKER#

PLL_ODVR_EN_R

DMI_OVRVLTG

CRIT_TEMP_REP#

+3V

4

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

CougarPoint_R1P0

Low = Tx, Rx terminated to same voltage (DC Coupling Mode) (DEFAULT)

+3V

+3V_S5

+3V

+3V_S5

DSW

+3V_S5

+3V

+3V_S5

+3V

+3V_S5

GPIO

+3V

NCTF

+3V+3V +3V

TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4

NC_1

VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32

BIOS RECOVERY

3

C40 B41 C41 A40

P4 AU16 P5 AY11 AY10 T14 AY1

AH8 AK11 AH10 AK10

P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

DGPU_PRSNT#

R583 1.5K/F_4R583 1.5K/F_4 R593 1.5K/F_4R593 1.5K/F_4 R592 1.5K/F_4R592 1.5K/F_4

R188 *0_4R188 *0_4

EC_RCIN#

PCH_THRMTRIP#

R245 390_4R245 390_4

GPIO Pull-up/Pull-down(CLG)

CR_WAKER# SMIB#

PLL_ODVR_EN

EC_EXT_SMI# EC_EXT_SCI#

STP_PCI# EC_A20GATE EC_RCIN# CRIT_TEMP_REP#

GPIO27 dGPU_PWROK

R290 10K_4R290 10K_4R279 *200K/F_4R279 *200K/F_4 R291 *0_4R291 *0_4

High = Disable (Default)

Low = Enable

+3V

EC_A20GATE [32] EC_PECI [4,32] EC_RCIN# [32] H_PWRGOOD [4,32] PM_THRMTRIP# [4]

DF_TVS [9]

R332 10K_4R332 10K_4 R560 10K_4R560 10K_4 R296 *10K_4R296 *10K_4

R584 10K_4R584 10K_4 R351 10K_4R351 10K_4

R556 *10K_4R556 *10K_4 R299 10K_4R299 10K_4 R297 10K_4R297 10K_4 R535 10K_4R535 10K_4

R353 *10K_4R353 *10K_4 R354 *10K_4R354 *10K_4

2

+3V_S5

+3V

DGPU_PRSNT# (GPIO68)

1

Discrete Only

Switchable (Mux)

Optimize (Muxless)

0 = GPU power is control by PCH GPIO (Discrete, SG or Optimize) 1 = GPU power is control by H/W (pure Discrete SKU)

Size Document Number Rev

Date: Sheet of

Date: Sheet

0 or 1

0

+3V

R591 IV@10K_4R591 IV@10K_4 R582 EV@100K_4R582 EV@100K_4

+3V

R594 EV@10K_4R594 EV@10K_4 R585 IV@10K_4R585 IV@10K_4

+3V

R543 *10K_4R543 *10K_4 R541 10K_4R541 10K_4

R553 10K_4R553 10K_4 R590 10K_4R590 10K_4

+3V_S5

R327 *10K_4R327 *10K_4

Cougar Point 4/6

Saturday, January 22, 2011

SKU_ID0

SKU_ID1 (GPIO64)

(GPIO16)

0

1

0

1

DGPU_PRSNT#

SKU_ID0

BOARD_ID0 BOARD_ID1

SV_DET

Quanta Computer Inc.

PROJECT :

11

VGA H/W

Setup

Signal

Menu

UMA

HiddenUMA Only

GPU

Hidden

UMA+GPU

DIS/SG

UMA/SG

UMA

SKU_ID1 [10]

R552 *10K_4R552 *10K_4 R601 *10K_4R601 *10K_4

R331 100K_4R331 100K_4

ZRJ

11 41

1

UMA boot

GPU boot

UMA boot

+3V

1A

of

5

4

3

2

1

PCH5(CLG)

12

COUGAR POINT (POWER)

+1.05V_VTT

D D

C C

B B

VccCORE =1.3 A(60mils)

C458

C458 1U/6.3V_4

1U/6.3V_4

R234 *short_6R234 *short _6

+1.05V_VTT

VccIO =2.925 A(140mils)

C442

C442 1U/6.3V_4

1U/6.3V_4

C432

C432 1U/6.3V_4

1U/6.3V_4

R521 *short_8R521 *short _8

+VCCAFDI_VRM

+1.05V_VTT

R238 *short_6R238 *short_6

+1.5V

C463

C463 1U/6.3V_4

1U/6.3V_4

+1.05V_PCH_VCCDPLL_EXP+1.05V_VTT

C437

C437 1U/6.3V_4

1U/6.3V_4

C431

4.7U/6.3V_6

+3V_VCC _EXP+3V

C708

0.1U/10V_4

TP8TP8

R236 *short_8R236 *short_8

+1.05V_VTT

+VCCAFDI_VRM

C456

C456 1U/6.3V_4

1U/6.3V_4

TP25TP25

C441

C441 1U/6.3V_4

1U/6.3V_4

+VCCAFDI_VRM

+1.05V_VCCAPLL_FDI

+1.05V_VCCDPLL_FDI

VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1

1.5V (Mobile)

C464

4.7U/6.3V_6

AA23 AC23 AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26 AG27 AG29

AN19

AN16 AN17

AN21 AN26 AN27 AP21 AP23 AP24 AP26 AT24

AN33 AN34

BH29

AP16

AP17

AU20

AJ23 AJ26 AJ27 AJ29 AJ31

BJ22

BG6

U28G

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] VCCCORE[16] VCCCORE[17]

VCCIO[28]

VCCAPLLEXP

VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[24]

VCCIO[25] VCCIO[26]

VCC3_3[3]

VCCVRM[2]

VccAFDIPLL

VCCIO[27]

VCCDMI[2]

CougarPoint_R1P0

POWER

VCC CORE

VCCIO

FDI

CRTLVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

DMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

DFT / SPI HVCMOS

VCCADAC

VSSADAC

VCCALVDS VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

U48

U47

AK36 AK37

AM37 AM38 AP36 AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

VccADAC =1mA(8mils)

C728

0.01U/25V_4

VccALVDS=1mA(8mils)

VccTX_LVDS=60mA(10mils)

C421

C422

0.01U/25V_4

R586 *short_6R586 *short_6

C731

0.1U/10V_4

+VCCAFDI_VRM

+VCCP_NAND

C717

C717 1U/6.3V_4

1U/6.3V_4

+VCCAFDI_VRM

C716

C716 *10U/6.3V_6

*10U/6.3V_6

R253 *short_8R253 *short_8

C452

0.1U/10V_4

R537 *short_6R537 *short_6

C723

C723 1U/6.3V_4

1U/6.3V_4

C729

0.1U/10V_4

+3V+3V_VCC_GIO

R527 0_4R527 0_4

VCCPNAND = 190 mA(15mils)

VCCSPI = 20mA(8mils)

+VCCA_DAC_1_2

C727

C727 10u/6.3V_6

10u/6.3V_6

+VCCALVDS +3V

R250 0_4R250 0_4

L20 0.1uH_8L20 0.1uH_8

C420

C420 10U/6.3V_8

10U/6.3V_8

VCCDMI = 42mA(10mils)

R233 *short_4R233 *short_4

C412

C412 1U/6.3V_4

1U/6.3V_4

VCCCLKDMI = 80mA(8mils)

+1.05V_VTT+1.1V_VCC_DMI_CCI

+1.8V

+3V+3V_VCCME_ SPI

L34 1500ohm/3AL34 1500ohm/3A

C743

C743 10U/6.3V_8

10U/6.3V_8

+1.8V+VCC_TX_LVDS

+1.05V_VTT+1.1V_VCC_DMI

+1.05V_VTT

VCCRTC<1mA(8mils)

+3V

+3V_S5

VCCME(+1.05V) = ??A(??mils)

+1.05V_VTT

R526 *short_1206R526 *short_1206

+1.05V_VTT

R528 *short_6R528 *short _6

R525 *short_6R525 *short _6

R524 *short_6R524 *short _6

R304 *0_6R304 *0_6

+1.05V_VTT

R519 *short_4R519 *short _4

1mA(8mils)

+3V_RTC

R577 *short_4R577 *short _4

+1.05V_VTT

+1.05V_VCCEPW

C715

C715 1U/6.3V_4

1U/6.3V_4

C714

C714 1U/6.3V_4

1U/6.3V_4

C709

C709 1U/6.3V_4

1U/6.3V_4

C488

C488 *1U/6.3V_4

*1U/6.3V_4

C700

4.7U/6.3V_6

C736

C736 1U/6.3V_4

1U/6.3V_4

TP30TP30

VCCDSW3_3= 3mA

C474

TP9TP9

0.1U/10V_4

TP26TP26

R256 *short_6R256 *short _6

C707

C707 *1U/6.3V_4

*1U/6.3V_4

VccASW =1.01 A(60mils)

C475

C467

1U/6.3V_4

C466

C466 10U/6.3V_8

10U/6.3V_8

C486 0.1U/10V_4C486 0.1U/10V_4

+VCCAFDI_VRM

65mA(10mils)

8mA(8mils)

VCCDIFFCLKN= 55mA(10mils)

VCCSSC= 95mA(10mils)

C473 0.1U/10V_4C473 0.1U/10V_4

C702

C701

0.1U/10V_4

C735

C730

0.1U/10V_4

C478

C478 1U/6.3V_4

1U/6.3V_4

C476

C476 10U/6.3V_8

10U/6.3V_8

+VCCRTCEXT

+VCCAFDI_VRM

+1.05V_VCCA_A_DPL +1.05V_VCCA_B_DPL

+VCCDIFFCLK +VCCDIFFCLKN

+V1.05V_SSCVCC

+VCCSST

+V1.05M_VCCSUS

+VTT_VCCPCPU

Cougar Point-M (POWER)

POWER

U28J

AD49

BH23

AL29

AL24

AA19 AA21 AA24 AA26 AA27 AA29 AA31 AC26 AC27 AC29 AC31 AD29 AD31

BD47 BF47

AF17 AF33 AF34 AG34

AG33

T16

V12

T38

W21 W23 W24 W26 W29 W31 W33

N16

Y49

V16

T17

V19

BJ8

A22

U28J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2 VCCIO[14]

DCPSUS[3]

VCCASW[1] VCCASW[2] VCCASW[3] VCCASW[4] VCCASW[5] VCCASW[6] VCCASW[7] VCCASW[8] VCCASW[9] VCCASW[10] VCCASW[11] VCCASW[12] VCCASW[13] VCCASW[14] VCCASW[15] VCCASW[16] VCCASW[17] VCCASW[18] VCCASW[19] VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA VCCADPLLB

VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1] DCPSUS[2]

V_PROC_IO

VCCRTC

CougarPoint_R1P0

Clock and Miscellaneous

CPURTC

+VCCACLK

+VCCPDSW

PCH_VCCDSW

+3V_SUS_CLKF33

+VCCD PLL_CPY

+VCCSUS1

PCI/GPIO/LPCMISC

SATA USB

HDA

VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]

VCC3_3[1] VCC3_3[8] VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12] VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2] VCCIO[3] VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26 P26 P28 T27 T29

+3V_VCC PUSB

T23 T24 V23 V24

+3V_VCC AUBG

P24

+VCCAUPLL

T26

+5V_PCH_ VCC5RE FSUS

M26

+VCCA_USBSUS

AN23

+3V_VCC PSUS

AN24

+5V_PCH_ VCC5RE F

P34

N20 N22

+3V_VCC PSUS

P20 P22

AA16

+3V_VCCPCORE

W16 T34

AJ2

AF13

AH13 AH14

AF14

+V1.1LAN_VCCAPLL

AK1

VCCVRM= 114mA(15mils)

+VCCAFDI_VRM

AF11

AC16 AC17 AD17

T21

V21

T19

+V3.3A_1.5A_HDA_IO

P32

+3V

C718

0.1U/10V_4

+V1.05S_SATA3

C468

C468 1U/6.3V_4

1U/6.3V_4

+1.05V_VCCEPW

C514

C514 *1U/6.3V_4

*1U/6.3V_4

+1.05V_VCCUSBCORE

R295 *short_6R295 *short _6

C439

C439 *1U/6.3V_4

*1U/6.3V_4

TP29TP29

R261 *short_6R261 *short _6

VCCME = 1.01A(60mils)

R366 0_4R366 0_4

C515

0.1U/10V_4

+1.05V_VTT

R359 *short_8R359 *short _8

VCCSUS3_3 = 119mA(15mils)

C500

C500 1U/6.3V_4

1U/6.3V_4

C490

0.1U/10V_4

C732

0.1U/10V_4

C733

0.1U/10V_4

C737

C737 1U/6.3V_4

1U/6.3V_4

C506

C506 1U/10V_4

1U/10V_4

C721

0.1U/10V_4

C489

0.1U/10V_4

C457

C457 1U/10V_4

1U/10V_4

+3V_S5

R346 *short_6R346 *short _6

R587 *short_6R587 *short _6

+1.05V_VTT

VCC5REFSUS=1mA

R595 10/F_4R595 10/F_4

D21 RB500V-40D21 RB500V-40

V5REF= 1mA

R602 10/F_4R602 10/F_4

D20 RB500V-40D20 RB500V-40

R363 *short_6R363 *short _6

VCCSUS3_3 = 119mA(15mils)

R540 *short_6R540 *short _6

VCCPCORE = 28mA(10mils)

+3V

+1.05V_VTT

R259 *short_8R259 *short _8

+1.05V_VTT

VCCSUSHDA= 10mA(8mils)

+3V_S5

+5V_S5 +3V_S5

+5V +3V

+3V_S5

+3V

+1.05V_VTT

+3V

C722

4.7U/6.3V_6

+3V_SUS_CLKF33

C725

C725 1U/10V_4

1U/10V_4

2

R531 1/F_4R531 1/F_4

A A

5

4

3

L33 10UH/100mA_8L33 10UH/100mA_8

L28 10UH/100mA_8L28 10UH/100mA_8

L27 10UH/100mA_8L27 10UH/100mA_8

+

C698

C698 220U/2.5V_3528

220U/2.5V_3528

+

C697

C697 *220U/2.5V_3528

*220U/2.5V_3528

+1.05V_VCCA_A_DPL

C706

C706 1U/6.3V_4

1U/6.3V_4

+1.05V_VCCA_B_DPL

C705

C705 1U/6.3V_4

1U/6.3V_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet

Saturday, January 22, 2011

Date: Sheet of

Saturday, January 22, 2011

Date: Sheet of

Saturday, January 22, 2011

PROJECT :

Cougar Point 5/6

1

ZRJ

of

12 41

1A

5

PCH6(CLG)

IBEX PEAK-M (GND)

D D

U28H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

C C

B B

A A

AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39

AD4 AD40 AD42 AD43 AD45 AD46

AD8

AE2

AE3

AF10

AF12 AD14 AD16

AF16

AF19

AF24

AF26

AF27

AF29

AF31

AF38

AF4 AF42 AF46

AF5

AF7

AF8

AG19

AG2 AG31 AG48

AH11

AH3 AH36 AH39 AH40 AH42 AH46

AH7

AJ19 AJ21 AJ24 AJ33 AJ34

AK12

AK3

VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]

CougarPoint_R1P0

5

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

4

U28I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

CougarPoint_R1P0

4

3

H46

VSS[259]

K18

VSS[260]

K26

VSS[261]

K39

VSS[262]

K46

VSS[263]

K7

VSS[264]

L18

VSS[265]

L2

VSS[266]

L20

VSS[267]

L26

VSS[268]

L28

VSS[269]

L36

VSS[270]

L48

VSS[271]

M12

VSS[272]

P16

VSS[273]

M18

VSS[274]

M22

VSS[275]

M24

VSS[276]

M30

VSS[277]

M32

VSS[278]

M34

VSS[279]

M38

VSS[280]

M4

VSS[281]

M42

VSS[282]

M46

VSS[283]

M8

VSS[284]

N18

VSS[285]

P30

VSS[286]

N47

VSS[287]

P11

VSS[288]

P18

VSS[289]

T33

VSS[290]

P40

VSS[291]

P43

VSS[292]

P47

VSS[293]

P7

VSS[294]

R2

VSS[295]

R48

VSS[296]

T12

VSS[297]

T31

VSS[298]

T37

VSS[299]

T4

VSS[300]

W34

VSS[301]

T46

VSS[302]

T47

VSS[303]

T8

VSS[304]

V11

VSS[305]

V17

VSS[306]

V26

VSS[307]

V27

VSS[308]

V29

VSS[309]

V31

VSS[310]

V36

VSS[311]

V39

VSS[312]

V43

VSS[313]

V7

VSS[314]

W17

VSS[315]

W19

VSS[316]

W2

VSS[317]

W27

VSS[318]

W48

VSS[319]

Y12

VSS[320]

Y38

VSS[321]

Y4

VSS[322]

Y42

VSS[323]

Y46

VSS[324]

Y8

VSS[325]

BG29

VSS[328]

N24

VSS[329]

AJ3

VSS[330]

AD47

VSS[331]

B43

VSS[333]

BE10

VSS[334]

BG41

VSS[335]

G14

VSS[337]

H16

VSS[338]

T36

VSS[340]

BG22

VSS[342]

BG24

VSS[343]

C22

VSS[344]

AP13

VSS[345]

M14

VSS[346]

AP3

VSS[347]

AP1

VSS[348]

BE16

VSS[349]

BC16

VSS[350]

BG28

VSS[351]

BJ28

VSS[352]

3

2

1

13

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Monday, December 13, 2010

Date: Sheet of

2

Date: Sheet of

PROJECT :

Cougar Point 6/6

ZRJ

13 41

1

1A