Acer travelmate 4102 Schematics
1
5VPCU
5V / 3.3V
A A
Page 26
1.8V / 0.9V
Page 27
3V_ALWAYS
15V
+5V
+3V_S5
+3V
+3VSUS
+5VSUS
+1.8VSUS
+2.5V
+1.8V
MVREF_DM
+0.9V
+1.5V_S5
2
CLOCK GEN
ICS
ICS954206
Page 2
3
4
Centrino
5
6
Kyoto II ( EW5 )
7
BOM MARK
8
PENTIUM-P/CELEROM-M
DORTHAN
INTEL Mobile_479 CPU
Page 3,4
HOST BUS
400/533MHz
CLK_SDRAM0~5,
CLK_SDRAM0~5#
DDR II A
DDR II B
Page 9
Page 9
400/533MHZ DDR II
ALVISO
1257 BGA
Page 5,6,7,8
LVDS
RGB
TVOUT
INT_LVDS
INT_CRT
INT_TV-OUT
LVDS
Page 12
CRT
Page 12
TV-OUT
Page 12
B B
1.5V/CPUIO
Page 28
CPU CORE
Page 25
C C
BATTERY
CHARGER
Page 29
D D
+1.5V
VCCP
VCC_CORE
REF3V
HDD
Page 16
ODD
Page 16
SATA
ATA 66/100
AUDIO CODEC
CONEXANT
20468-31
Page 21
AMP
MAX9750
Page 22
SPEKERMIC IN
Page 21 Page 22 Page 22
MODEM
CONEXANT
20493-21
LINE
OUT
Page 21
AC97
RJ11
Page 19
DMI I/F
PCI BUS
ICH6-M
609 BGA
Page 13,14,15
LPC
NS
KBC(97551)
Page 24
TouchpadFAN
Page 23 Page 23 Page 23 Page 24
USB 2.0
Keyboard
FLASH
BIOS
SYSTEM 3
USB PORT
Page 17 Page 17
USB0,1,2
TI
PCMCIA
PCI1410A
Page 18
MINI-PCI
Wireless LAN
Page 17
Realtek
10/100 LAN
8100CL
Page 19
MINI-USB
USB3
PCMCIA
Page 18
TRANSFORMER
Page 19
RJ45
Page 19
PCI ROUTING TABLE
REQ0# / GNT0#
REQ1# / GNT1#
REQ2# / GNT2#
1
2
3
IDSEL
AD18
AD20
AD17
4
INTERUPT
INTD#
INTB#,INTC#
INTE#
DEVICE
REALTEK LAN
MINI-PCI
TI 1410A
5
Title
BLOCK DIAGRAM
Size : Document Number : Rev :
X
6
Date :
7
QUANTA COMPUTER
HW Engineer :
EW5 --- Alviso & ICH6
Sheet of
130Saturday, Ju l y 09, 2005
8
1A
5
4
3
2
1
Add for DEBUG BOARD
CKG_XIN
33P-4C347
12
33P-4C346
SMBCK
SMBDT
CLK_EN#
STP_CPU#
STP_PCI#
SELPSB1_CLK
R281 475/F-4
VDDCKGPCI
C144
.01U-4
VDDCKGREF
.01U-4C167
VDDCKG48
.01U-4C137
C168
.01U-4
VDDACKG
C169
1U/10V-8
SMBDT
SMBCK
Y3
14.318MHz
CKG_XOUT
C143
.01U-4
C145
.01U-4
C170
.01U-4
Y1= CL=20P
D D
CLK_EN#[25]
STP_CPU#[14,25]
STP_PCI#[14]
SELPSB1_CLK[4,6]
L20 ACB2012L-120
+3V
C142
1U/10V-8C139
C140
.01U-4
R131 10K-4
2
Q7
2N7002
R132 10K-4
2
Q8
2N7002
1U/10V-8
1
1
C171
.01U-4
R120 1-6
R102 2.2-6
C C
B B
+3V
L21 ACB2012L-120
PDAT_SMB[14]
PCLK_SMB[14]
C146
1U/10V-8
R123 2.2-6
+3V
3
+3V
3
SMBDT [9]
SMBCK [9]
U16
50
XIN
49
XOUT
46
SMCLK
47
SMDAT
10
VTT_PWRGD#/PD
54
CPU_STOP#
55
PCI/PCIE_STOP#
16
TEST_MODE/FSB
39
IREF
1
VDDPCI1
7
VDDPCI2
48
VDDREF
11
VDD48
21
VDDSRC1
28
VDDSRC2
34
VDDSRC3
42
VDDCPU
37
VDDA
38
GNDA
ICS954206
REF0
REF1/FSC
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
DOT_96
DOT_96#
96M_SS/SRC0
96M_SS#/SRC0#
SRC1
SRC1#
SRC2
SRC2#
SRC3
SRC3#
SRC4_SATA
SRC4#_SATA#
SRC5
SRC5#
SRC6
SRC6#
ITPCLK/SRC7
ITPCLK#/SRC7#
ITP_EN/PCICLKF0
SEL_96M#/PCICLKF1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
USB_48/FSA
GND1
GND2
GND3
GND4
GND5
GND6
14M_REF0
52
SELPSB2_CLK_1
53
R_HCLK_CPU
44
R_HCLK_CPU#
43
R_HCLK_MCH
41
R_HCLK_MCH#
40
R_DOT96
14
R_DOT96#
15
R_DREFSSCLK
17
R_DREFSSCLK#
18
19
20
R_PCIE_ICH
22
R_PCIE_ICH#
23
R_MCH_3GPLL
24
R_MCH_3GPLL#
25
R_PCIE_SATA
26
R_PCIE_SATA#
27
31
30
33
32
36
35
R_PCLK_591
8
R_PCLK_ICH
9
R_PCLK_MINI
56
3
R_PCLK_LAN
4
R_PCLK_SIO PCLK_SIO
5
SELPSB0_CLK
12
2
6
13
29
45
51
R282 33-4
R279 4.7K-6
R266 33-4
R264 33-4
R276 33-4
R268 33-4
R267 33-4
R110 *33-4
R262 33-4
R_HCLK_CPU
R_HCLK_CPU#
R_HCLK_MCH
R_HCLK_MCH#
R_DOT96#
R_DOT96
R_DREFSSCLK#
R_DREFSSCLK
R_PCIE_ICH#
R_PCIE_ICH CLK_PCIE_ICH
R_MCH_3GPLL#
R_MCH_3GPLL
R_PCIE_SATA#
R_PCIE_SATA
14M_ICH
PCLK_591
PCLK_ICHVDDCKGCPU
PCLK_MINI
PCLK_PCMR_PCLK_PCM
PCLK_LAN
CLK48_USB
4 3
4 3
4 3
4 3
4 3
4 3
4 3
14M_ICH [14]
SELPSB2_CLK [ 4,6]
RN21
4P2R-33
12
RN20
4P2R-33
12
RN19
12
4P2R-33
RN18
4P2R-33
12
RN17
4P2R-33
12
RN16
4P2R-33
12
RN15
4P2R-33
12
PCLK_591 [24]
PCLK_ICH [13]
PCLK_MINI [17]
PCLK_PCM [18]
PCLK_LAN [19]
PCLK_SIO [17]
CLK48_USB [14]
HCLK_CPU
HCLK_CPU#
HCLK_MCH
HCLK_MCH#
DOT96#
DOT96
DREFSSCLK#
DREFSSCLK
CLK_PCIE_ICH#
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
CLK_PCIE_SATA#
CLK_PCIE_SATA
HCLK_CPU [3]
HCLK_CPU# [3]
HCLK_MCH [5]
HCLK_MCH# [5]
DOT96# [6]
DOT96 [6]
DREFSSCLK# [6]
DREFSSCLK [6]
CLK_PCIE_ICH# [14]
CLK_PCIE_ICH [14]
CLK_MCH_3GPLL# [6]
CLK_MCH_3GPLL [6]
CLK_PCIE_SATA# [13]
CLK_PCIE_SATA [13]
HCLK_CPU
HCLK_CPU#
HCLK_MCH
HCLK_MCH#
DOT96
DOT96#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DREFSSCLK
DREFSSCLK#
PCLK_591
PCLK_ICH
PCLK_MINI
PCLK_PCM
PCLK_LAN
CLK48_USB
14M_ICH
96M/SRC0 SELECT
0: 96M 1: SRC0
R_PCLK_ICH
R_PCLK_591
ITP/SRC7 SELECT
0: SRC7 1: ITP
R288 49.9/F-4
R287 49.9/F-4
R286 49.9/F-4
R285 49.9/F-4
R260 49.9/F-4
R259 49.9/F-4
R252 49.9/F-4
R251 49.9/F-4
R256 49.9/F-4
R255 49.9/F-4
R254 49.9/F-4
R253 49.9/F-4
R258 49.9/F-4
R257 49.9/F-4
*10P-4C330
*10P-4C329
*10P-4C341
*10P-4C332
*10P-4C331
*10P-4C328
*10P-4C349
R265 10K-4
+3V
R103
*10K-4
R263
10K-4
+3V
R89
10K-4
FSA FSB FSC
SELPSB0_CLK
R90
A A
*1K-4
+VCCP +VCCP
R91
*1K-4
SELPSB1_CLK
R92
*1K-4
R121
*1K-4
SELPSB2_CLK
R122
*1K-4
FSB SETTING
FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33
0 0 1 133 100 33
0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 RSVD 100 33
QUANTA COMPUTER
Title
CLOCK GENERATOR
Size : Document Number : Rev :
X
5
4
3
2
Date :
HW Engineer :
EW5 --- Alviso & ICH6
Sheet of
1
230Saturday, Ju l y 09, 2005
1A
1
HA#[3..31][5]
A A
B B
C C
G1: NC for Dothan and
DPRSTP# for Yonah
C: UNINSTALL
+VCCP
R222 *0-4
R221 56-4
THERMTRIP#[6,13]
D D
HA#[3..31]
HADSTB0#[5]
HADSTB1#[5]
HREQ#0[5]
HREQ#1[5]
HREQ#2[5]
HREQ#3[5]
HREQ#4[5]
ADS#[5]
HBREQ0#[5]
BPRI#[5]
BNR#[5]
HLOCK#[5]
HIT#[5]
HITM#[5]
DEFER#[5]
T78
T79
T77
T84
HTRDY#[5]
RS#0[5]
RS#1[5]
RS#2[5]
T74
T75
T83
T76
THERMDA
THERMDC
THERMTRIP#_PWR
CPU_PROCHOT#
A20M#
FERR#
IGNNE#
CPUPWRGD
SMI#
STPCLK#
CPUSLP#
DPSLP#
A20M#[13]
FERR#[13]
IGNNE#[13]
CPUPWRGD[13]
SMI#[13]
DBR#[14]
INTR[13]
NMI[13]
STPCLK#[13]
CPUSLP#[5,13]
DPSLP#[13]
DPRSLP#[13]
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
H_IERR#
BPM0#
BPM1#
BPM2#
BPM3#
TCK
TDO
TDI
TMS
TRST#
PREQ#
PRDY#
DBR#
2
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
U3
AE5
R2
P3
T2
P1
T1
N2
A4
N4
J3
L1
J2
K3
K4
L4
C8
B8
A9
C9
M3
H1
K1
L2
C2
D3
A3
E4
B4
A13
A12
C12
C11
B13
A16
A15
B10
A10
A7
D1
D4
C6
A6
B7
G1
B18
A18
C17
B17
U14A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB0#
ADSTB1#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADS#
IERR#
BREQ0#
BPRI#
BNR#
LOCK#
HIT#
HITM#
DEFER#
BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#
A20M#
FERR#
IGNNE#
PWRGOOD
SMI#
TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#
LINT0
LINT1
STPCLK#
SLP#
DPSLP#
DPRSTP#
THERMDA
THERMDC
THERMTRIP#
PROCHOT#
Dothan Processor
Dothan
REQUEST
PHASE
SIGNALS
ERROR
SIGNALS
ARBITRATION
PHASE
SIGNALS
SNOOP PHASE
SIGNALS
RESPONSE
PHASE
SIGNALS
PC
COMPATIBILITY
SIGNALS
DIAGNOSTIC
& TEST
SIGNALS
EXECUTION
CONTROL
SIGNALS
THERMAL DIODE
1 OF 3
3
DATA
PHASE
SIGNALS
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
DBSY#
DRDY#
BCLK1
BCLK0
INIT#
RESET#
DPWR#
4
HD#[0..63]
HD#0
A19
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
M2
H2
B14
B15
B5
B11
C19
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
CPUINIT#
CPURST#
HDSTBN0# [5]
HDSTBP0# [5]
HDSTBN1# [5]
HDSTBP1# [5]
HDSTBN2# [5]
HDSTBP2# [5]
HDSTBN3# [5]
HDSTBP3# [5]
HDBI0# [5]
HDBI1# [5]
HDBI2# [5]
HDBI3# [5]
DBSY# [5]
DRDY# [5]
HCLK_CPU# [2]
HCLK_CPU [2]
CPUINIT# [13]
CPURST# [5]
DPWR# [5]
HD#[0..63] [5]
Change ADM1032ARZ to ADM1032ARZ-1
CPU_PROCHOT#
R220 330-4
5
H/W MONITOR
15 MIL
+3V
R239 47-6
THERMDC
10 mil trace /
10 mil space
THERMDA
2
3V_THM
C321
.1U-4
C323
2200P-4
+3V +3V
R238
1K-6
2
Q19
1 3
PMBS3904
NOTICE SMT pin1
R237
330-4
ICH_THRM#
Q18
1 3
PMBS3904
U15
ADM1032AR
1
VCC
3
DXN
2
DXP
-OVT4GND
6
-ALT
SMDATA
SMCLK
ICH_THRM# [14]
+3V
R250
R249
10K-4
10K-4
6
7
8
5
THER_OVT#
close to CPU
KBSMDAT
KBSMCLK
THER_OVT#
7
+3V
R244
R245
10K-4
10K-4
THERMTRIP#_PWR
1
1
+VCCP
R246 0-6
DBR#
H_IERR#
CPUPWRGD
TDI
TMS
TDO
CPURST#
FERR#
close to ITP conn
TCK
TRST#
+3V
2
Q23
CH2507S
+3V
2
Q20
CH2507S
R241
56-4
R242 33/F-4
R248
330-4
1 3
MBDATA
3
MBCLK
3
R243
1K/F-6
1 3
2
Q22
PMBS3904
R231 150-4
R234 56-4
R233 200-4
R229 150-4
R230 39.2/F-4
R227 *54.9/F-4
R228 54.9-4
R235 56-4
R225 27.4/F-4
R226 680-4
MBDATA [24,28]
MBCLK [24,28]
+VCCP
A2
12
10U/6.3V-8
2
Q21
PMBS3904
6/14 change pull
high voltage to
delay BJT on timing
ICH_PWROK [14,24]
1999_SHT# [26]
8
C324
1999_SHT# [26]
+3VSUS
+VCCP
QUANTA COMPUTER
Title
Dothan Processor (HOST)
Size : Document Number : Rev :
X
1
2
3
4
5
6
Date :
7
HW Engineer :
EW5 --- Alviso & ICH6
Sheet of
330Saturday, Ju l y 09, 2005
8
1A
1
2
3
4
5
6
7
8
+VCCP
T81
T80
T71
CPU_VCCA
*0-8
0-8
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
COMP0
COMP1
COMP2
COMP3
R203
A A
B B
C C
27.4/F-4
12
C54
10U/6.3V-8
12
C292
10U/6.3V-8
12
C298
10U/6.3V-8
C283
10U/6.3V-8
1 2
R202
27.4/F-4
54.9/F-4
Place pulldown resistors within
0.5" of COMP pins
VCC_CORE
12
12
C52
10U/6.3V-8
12
C300
10U/6.3V-8
12
C281
10U/6.3V-8
C56
10U/6.3V-8
1 2
12
C51
10U/6.3V-8
12
C299
10U/6.3V-8
12
C60
10U/6.3V-8
10U/6.3V-8
1 2
C53
10U/6.3V-8
VCC_CORE
12
C290
10U/6.3V-8
12
C282
10U/6.3V-8
VCC_CORE
C59
10U/6.3V-8
1 2
R37
.01U/16V-4
C303
R36
54.9/F-4
C81
12
C50
10U/6.3V-8
12
C295
10U/6.3V-8
12
C287
10U/6.3V-8
C63
10U/6.3V-8
1 2
1 2
12
C85
10U/6.3V-8
12
C285
10U/6.3V-8
12
C61
10U/6.3V-8
C77
10U/6.3V-8
1 2
1K/F-6
2K/F-4
CPU_VCCA
12
C286
10U/6.3V-8
12
C62
10U/6.3V-8
10U/6.3V-8
1 2
R196
R198
VCC_CORE
VCC_CORE
VCC_COREVCC_CORE
C302
Place voltage
divider within
0.5" of GTLREF
pin
R232
*1K-4
T70
T2
T82
+1.8V
+1.5V
12
12
C76
C294
10U/6.3V-8
10U/6.3V-8
12
12
C293
C291
10U/6.3V-8
10U/6.3V-8
C304
C55
10U/6.3V-8
10U/6.3V-8
1 2
1 2
R51
*1K-4
R57
R55
12
C301
10U/6.3V-8
12
C289
10U/6.3V-8
C284
10U/6.3V-8
1 2
Total caps = 2633 uF
ESR = 15m ohm/5 // 5m ohm/25 // 5m ohm/15
12
C66
.1U-4
+VCCP
C69
.1U-4
C71
.1U-4
C74
.1U-4
3
C58
.1U-4
C64
.1U-4
+VCCP
D D
12
C80
+
150U/4V-3528
<Type>
CC3528
12
C70
.1U-4
1
12
C72
.1U-4
12
C73
.1U-4
12
C67
.1U-4
2
AD26
AC26
VCC_CORE
AA11
AA13
AA15
AA17
AA19
AA21
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC11
AC13
AC15
AC17
AC19
AD10
AD12
AD14
AD16
AD18
AE11
AE13
AE15
AE17
AE19
AF10
AF12
AF14
AF16
AF18
P25
P26
AB2
AB1
AF7
AC1
E26
D18
D20
D22
E17
E19
E21
G21
H22
K22
V22
W21
Y22
AA5
AA7
AA9
AB6
AB8
AC9
AD8
AE9
AF8
C5
F23
B2
C3
N1
B1
F26
D6
D8
E5
E7
E9
F6
F8
F18
F20
F22
G5
H6
J5
J21
U5
V6
W5
Y6
U14B
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
NC1
RSVD2
RSVD3
RSVD4
RSVD5
VCCA3
VCCA2
VCCA1
VCCA0
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
Dothan Processor
Dothan
2 OF 3
POWER,
GROUND,
RESERVED
SIGNALS
4
VSS00
VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
CPU_VID0[25]
CPU_VID1[25]
CPU_VID2[25]
CPU_VID3[25]
CPU_VID4[25]
CPU_VID5[25]
T68
T69
SELPSB2_CLK[2,6]
SELPSB1_CLK[2,6]
SELPSB1_CLK BSEL1
5
1 2
1 2
DOTHAN-A NC
DOTHAN-B
POP
6
+VCCP
Z0501
Z0502
0-4
R223
R224
0-4
T3
U14C
W23
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
POWER, GR OU N D AND NC
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCQ0
VCCQ1
VID0
VID1
VID2
VID3
VID4
VID5
VCCSENSE
VSSSENSE
BSEL0
BSEL1
PSI
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
Dothan
3 OF 3
VID
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
P23
W4
E2
F2
F3
G3
G4
H4
AE7
AF6
BSEL0SELPSB2_CLK
C16
C14
E1
R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
Dothan Processor
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
QUANTA COMPUTER
Title
Dothan Processor (POWER)
Size : Document Number : Rev :
X
Date :
7
HW Engineer :
EW5 --- Alviso & ICH6
Sheet of
430Saturday, Ju l y 09, 2005
8
1A
1
2
3
4
5
6
7
8
U18E
AF23
VSS136
H23
VSS137
AL22
VSS138
AH22
VSS139
J22
VSS140
E22
VSS141
D22
VSS142
A22
VSS143
AN21
VSS144
AF21
VSS145
F21
VSS146
C21
VSS147
A A
B B
C C
D D
1
AK20
AN19
AG19
AN17
AN14
AG14
AN11
AG11
AA11
AA10
AN24
AL18
AJ17
AF17
AL16
AL14
AJ14
AL11
AJ11
AF11
AL24
VSS148
V20
VSS149
G20
VSS150
F20
VSS151
E20
VSS152
D20
VSS153
A20
VSS154
VSS155
VSS156
W19
VSS157
T19
VSS158
J19
VSS159
H19
VSS160
C19
VSS161
VSS162
U18
VSS163
B18
VSS164
A18
VSS165
VSS166
VSS167
VSS168
G17
VSS169
C17
VSS170
VSS171
K16
VSS172
H16
VSS173
D16
VSS174
A16
VSS175
K15
VSS176
C15
VSS177
VSS178
VSS179
VSS180
VSS181
K14
VSS182
J14
VSS183
F14
VSS184
B14
VSS185
A14
VSS186
J12
VSS187
D12
VSS188
B12
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
Y11
VSS196
H11
VSS197
F11
VSS198
VSS199
Y10
VSS200
L10
VSS201
D10
VSS202
AN9
VSS203
AH9
VSS204
AE9
VSS205
AC9
VSS206
AA9
VSS207
V9
VSS208
T9
VSS209
K9
VSS210
H9
VSS211
A9
VSS212
AL8
VSS213
Y8
VSS214
P8
VSS215
L8
VSS216
E8
VSS217
C8
VSS218
AN7
VSS219
AK7
VSS220
AG7
VSS221
AA7
VSS222
V7
VSS223
G7
VSS224
AJ6
VSS225
AE6
VSS226
AC6
VSS227
AA6
VSS228
T6
VSS229
P6
VSS230
L6
VSS231
J6
VSS232
B6
VSS233
AP5
VSS234
AL5
VSS235
W5
VSS236
E5
VSS237
AN4
VSS238
AF4
VSS239
Y4
VSS240
U4
VSS241
P4
VSS242
L4
VSS243
H4
VSS244
C4
VSS245
AJ3
VSS246
AC3
VSS247
AB3
VSS248
AA3
VSS249
C3
VSS250
A3
VSS251
AN2
VSS252
AL2
VSS253
AH2
VSS254
AE2
VSS255
AD2
VSS256
V2
VSS257
T2
VSS258
P2
VSS259
L2
VSS260
B27
VSS261
J26
VSS262
G26
VSS263
E26
VSS264
A26
VSS265
VSS266
VSS267
J2
VSS268
G2
VSS269
D2
VSS270
Y1
VSS271
B36
VSSALVDS
VSS
2
AG37
VSS0
Y37
VSS1
V37
VSS2
T37
VSS3
P37
VSS4
M37
VSS5
K37
VSS6
H37
VSS7
E37
VSS8
AN36
VSS9
AL36
VSS10
AJ36
VSS11
AF36
VSS12
AE36
VSS13
AD36
VSS14
AC36
VSS15
AB36
VSS16
AA36
VSS17
C36
VSS18
AE35
VSS19
Y35
VSS20
W35
VSS21
V35
VSS22
U35
VSS23
T35
VSS24
R35
VSS25
P35
VSS26
N35
VSS27
M35
VSS28
L35
VSS29
K35
VSS30
J35
VSS31
H35
VSS32
G35
VSS33
F35
VSS34
E35
VSS35
D35
VSS36
B35
VSS37
AN34
VSS38
AH34
VSS39
AD34
VSS40
AC34
VSS41
AB34
VSS42
AA34
VSS43
C34
VSS44
AL33
VSS45
AF33
VSS46
AD33
VSS47
W33
VSS48
V33
VSS49
U33
VSS50
T33
VSS51
R33
VSS52
P33
VSS53
N33
VSS54
M33
VSS55
L33
VSS56
K33
VSS57
J33
VSS58
H33
VSS59
G33
VSS60
F33
VSS61
E33
VSS62
D33
VSS63
AN32
VSS64
AJ32
VSS65
AD32
VSS66
AC32
VSS67
AB32
VSS68
AA32
VSS69
Y32
VSS70
C32
VSS71
A32
VSS72
AL31
VSS73
AG31
VSS74
AD31
VSS75
W31
VSS76
V31
VSS77
U31
VSS78
T31
VSS79
R31
VSS80
P31
VSS81
N31
VSS82
M31
VSS83
L31
VSS84
K31
VSS85
J31
VSS86
H31
VSS87
G31
VSS88
F31
VSS89
E31
VSS90
D31
VSS91
AP30
VSS92
AE30
VSS93
AC30
VSS94
AB30
VSS95
AA30
VSS96
Y30
VSS97
C30
VSS98
AM29
VSS99
AJ29
VSS100
AG29
VSS101
AD29
VSS102
AA29
VSS103
W29
VSS104
V29
VSS105
U29
VSS106
P29
VSS107
L29
VSS108
H29
VSS109
G29
VSS110
F29
VSS111
E29
VSS112
D29
VSS113
A29
VSS114
AC28
VSS115
AB28
VSS116
AA28
VSS117
W28
VSS118
E28
VSS119
AN27
VSS120
AL27
VSS121
AJ27
VSS122
AG27
VSS123
AF27
VSS124
AB27
VSS125
AA27
VSS126
W27
VSS127
G27
VSS128
E27
VSS129
AJ24
VSS130
AG24
VSS131
J24
VSS132
F24
VSS133
D24
VSS134
B24
VSS135
@ALVISO_GM/GML
221/F-4
100/F-4
24.9/F-4
R95
221/F-4
R94
100/F-4
R101
R97
R107
+VCCP
+VCCP
+VCCP
+VCCP
HXRCOMP
R105
24.9/F-4
R100
54.9/F-4
HXSCOMP
HYRCOMP
R106
54.9/F-4
HYSCOMP
HXSWING
C135
.1U-4
1 2
HYSWING
C133
.1U-4
1 2
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
U18A
E4
HD0#
E1
HD1#
F4
HD2#
H7
HD3#
E2
HD4#
F1
HD5#
E3
HD6#
D3
HD7#
K7
HD8#
F2
HD9#
J7
HD10#
J8
HD11#
H6
HD12#
F3
HD13#
K8
HD14#
H5
HD15#
H1
HD16#
H2
HD17#
K5
HD18#
K6
HD19#
J4
HD20#
G3
HD21#
H3
HD22#
J1
HD23#
L5
HD24#
K4
HD25#
J5
HD26#
P7
HD27#
L7
HD28#
J3
HD29#
P5
HD30#
L3
HD31#
U7
HD32#
V6
HD33#
R6
HD34#
R5
HD35#
P3
HD36#
T8
HD37#
R7
HD38#
R8
HD39#
U8
HD40#
R4
HD41#
T4
HD42#
T5
HD43#
R1
HD44#
T3
HD45#
V8
HD46#
U6
HD47#
W6
HD48#
U3
HD49#
V5
HD50#
W8
HD51#
W7
HD52#
U2
HD53#
U1
HD54#
Y5
HD55#
Y2
HD56#
V4
HD57#
Y7
HD58#
W1
HD59#
W3
HD60#
Y3
HD61#
Y6
HD62#
W2
HD63#
C1
HXRCOMP
C2
HXSCOMP
D1
HXSWING
T1
HYRCOMP
L1
HYSCOMP
P1
HYSWING
@ALVISO_GM/GML
HOST
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HADS#
HADSTB0#
HADSTB1#
HVREF
HBNR#
HBPRI#
BREQ0#
HCPURST#
HCLKINN
HCLKINP
HDBSY#
HDEFER#
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#
HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HCPUSLP#
HTRDY#
G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13
F8
B9
E13
J11
A5
D5
E7
H10
AB1
AB2
C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5
HD#[0..63][3]
HD#[0..63]
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
HA#[3.. 31]
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HCPUSLP#_GMC H
HA#[3..31] [3]
ADS# [3]
HADSTB0# [3]
HADSTB1# [3]
BNR # [3]
BPRI# [3]
HBREQ0# [3]
CPURS T# [3]
HCLK_MCH# [2]
HCLK_MCH [2]
DBSY# [3]
DEFER# [3]
HDBI0# [3]
HDBI1# [3]
HDBI2# [3]
HDBI3# [3]
DPWR# [3]
DRDY# [3]
HDSTBN0# [3]
HDSTBN1# [3]
HDSTBN2# [3]
HDSTBN3# [3]
HDSTBP0# [3]
HDSTBP1# [3]
HDSTBP2# [3]
HDSTBP3# [3]
HIT# [3]
HITM# [3]
HLOCK# [3]
HREQ#0 [3]
HREQ#1 [3]
HREQ#2 [3]
HREQ#3 [3]
HREQ#4 [3]
RS#0 [3]
RS#1 [3]
RS#2 [3]
HTRDY# [3]
+VCCP
R117
100/F-4
HVREF
R116
200/F-4
T5
*PAD
T90
*PAD
B: POP FOR DOTHAN B
R99
1 2
0-4
1 2
CPUSLP# [3,13]
DO NOT INSTALL FOR DOTHAN-A AND INSTALL FOR DOTHAN-B
C163
.1U-4
QUANTA COMPUTER
Title
Alviso (Host)
Size : Document Number : Rev :
X
3
4
5
6
Date :
7
HW Engineer :
EW5 --- Alviso & ICH6
Sheet of
530Saturday, July 09, 2005
8
1A
1
2
3
CFG3
R134
*1K-4-C
4
FOR DDR533
5
6
7
8
CFG[0:2]=100 FOR FSB 533
CFG[0:2]=101 FOR FSB 400
U18C
CKE0
CKE1
CKE2
CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMXSLEW
SMYSLEW
AA31
AB35
AC31
AD35
Y31
AA35
AB31
AC35
AA33
AB37
AC33
AD37
Y33
AA37
AB33
AC37
AM33
AL1
AE11
AJ34
AF6
AC10
AN33
AK1
AE10
AJ33
AF5
AD10
AP21
AM21
AH21
AK21
AN16
AM14
AH15
AG16
AF22
AF16
AP14
AL15
AM11
AN10
AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
DMITXN0
DMITXN1
DMITXN2
DMITXN3
DMITXP0
DMITXP1
DMITXP2
DMITXP3
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
@ALVISO_GM/GML
DMIDDR MUXING
CFG/RSVDPMLCKNC
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP
DMI_TXN0[14]
DMI_TXN1[14]
DMI_TXN2[14]
+2.5V
12
R135
*40.2/F-4
DMI_TXN3[14]
DMI_TXP0[14]
DMI_TXP1[14]
DMI_TXP2[14]
DMI_TXP3[14]
DMI_RXN0[14]
DMI_RXN1[14]
DMI_RXN2[14]
DMI_RXN3[14]
DMI_RXP0[14]
DMI_RXP1[14]
DMI_RXP2[14]
DMI_RXP3[14]
CLK_SDRAM0[9]
CLK_SDRAM1[9]
T12
CLK_SDRAM3[9]
CLK_SDRAM4[9]
T10
CLK_SDRAM0#[9]
CLK_SDRAM1#[9]
T8
CLK_SDRAM3#[9]
CLK_SDRAM4#[9]
T7
CKE0[9]
CKE1[9]
CKE2[9]
CKE3[9]
SM_CS0#[9]
SM_CS1#[9]
SM_CS2#[9]
SM_CS3#[9]
SM_ODT0[9]
SM_ODT1[9]
SM_ODT2[9]
SM_ODT3[9]
MVREF_DM
It's point to point,
55ohm trace, keep as
short as possible.
R140 10K-4
1 2
R139 10K-4
1 2
CLK_SDRAM2
CLK_SDRAM5
CLK_SDRAM2#
CLK_SDRAM5#
M_OCDCOMP0
M_OCDCOMP1
M_RCOMPN
M_RCOMPP
PM_EXTTS#0
PM_EXTTS#1
A A
B B
E: DEPOP
12
R144
*40.2/F-4
Route as short
as possible.
C C
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25
CFG[17:3] have internal pullup resistors.
CFG[19:18] have internal pulldown resistors
J23
PM_EXTTS#0
J21
PM_EXTTS#1
H22
F5
AD30
AE29
A24
A23
C37
D37
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37
CFG0
1 2
R280 1K-4
R283 1K-4
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
R98 0-4
1 2
R163 100-6
DOT96#
DOT96
DREFSSCLK#_R
DREFSSCLK_R
TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
TP_NC10
TP_NC11
R136 4.7K-4
T6
R124 *1K-4-C
R130
T20
T23
T11
T17
T15
T91
T19
T16
T14
T25
T26
T27
T32
T28
T21
T93
T92
T36
T31
T97
T99
T95
T89
T85
T86
T87
T88
T96
T94
T98
+VCCP
SELPSB1_CLK [ 2,4]
SELPSB2_CLK [ 2,4]
1K-4-C
R128
*1K-4-C
R119
1K-4-C
PM_BMBUSY# [14]
THERMTRIP# [3,13]
IMVP_PWRGD [ 14,24,25]
PLTRST# [13,14,16,24]
DOT96# [2]
DOT96 [2]
B: POP ALWAYS
CFG5 Low=DMIx2
High=DMIx4
CFG6 Low=DDR2
High=DDR
CFG9 Low=REVERSE LANE
High=NORMAL
CFG11 FOR CPU533
INT_DDCCLK[12]
INT_DDCDAT[12]
INT_VGA_BLU[12]
INT_VGA_GRN[12]
INT_VGA_RED[12]
INT_VSYNC[12]
INT_HSYNC[12]
R133 150/F-4
1 2
R127 150/F-4
1 2
R129 150/F-4
1 2
R138 150/F-4
1 2
R142 150/F-4
1 2
R143 150/F-4
1 2
INT_TV_C/R
INT_TV_COMP
INT_TV_Y/G
INT_VGA_RED
INT_VGA_GRN
INT_VGA_BLU
CLK_MCH_3GPLL#[2]
CLK_MCH_3GPLL[2]
I_EDIDCLK[12]
I_EDIDDATA[12]
R159 1.5K/F-6
INT_TV_Y/G[12]
INT_TV_C/R[12]
INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R
TV_REFSET
R137 4.99K/F-6
REFSET
R141 255/F-4
BLON
T29
T24
DISP_ON
T40
T39
T37
TXLCLKOUTÂTXLCLKOUT+
TXUCLKOUTÂTXUCLKOUT+
TXLOUT0ÂTXLOUT1ÂTXLOUT2-
TXLOUT0+
TXLOUT1+
TXLOUT2+
TXUOUT0ÂTXUOUT1ÂTXUOUT2-
TXUOUT0+
TXUOUT1+
TXUOUT2+
AB29
AC29
H24
H25
A15
C16
A17
J18
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
U18F
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
LBKLT_CTRL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
LACLKN
LACLKP
LBCLKN
LBCLKP
LADATAN0
LADATAN1
LADATAN2
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
LBDATAP0
LBDATAP1
LBDATAP2
@ALVISO_GM/GML
MISC
TV VGA LVDS
PCI-EXPRESS GRAPHICS
EXP_COMPI
EXP_ICOMPO
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
D36
D34
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36
D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36
T30
T33
T38
R162 24.9/F-4
VCC3G_PCIE
1 2
A2
M_RCOMPN
M_RCOMPP
Width : 20mil
Length <
500mil
DREFSSCLK_R
DREFSSCLK#_R
D D
DREFSSCLK#_R
DREFSSCLK_R
R115 80.6/F-4
R114 80.6/F-4
D: DEPOP
1
R150
1 2
1 2
R152
RP4
4
2
*4P2R-0
0-6
0-6
3
1
+1.8VSUS
ADD 4/6
DREFSSCLK [2]
DREFSSCLK# [2]
DOT96# [2]
DOT96 [2]
RP4 NC 4/6
2
5
TXLCLKOUT+
TXLCLKOUTÂTXUCLKOUT+
TXUCLKOUT-
TXLOUT0+
TXLOUT0ÂTXLOUT1+
TXLOUT1ÂTXLOUT2+
TXLOUT2-
TXUOUT0ÂTXUOUT0+
TXUOUT1ÂTXUOUT1+
TXUOUT2ÂTXUOUT2+
DISP_ON
BLON
QUANTA COMPUTER
Title
Alviso (VGA,DMI)
Size : Document Number : Rev :
X
6
Date :
7
HW Engineer :
EW5 --- Alviso & ICH6
Sheet of
630Saturday, Ju l y 09, 2005
8
1A
TXLCLKOUT+[12]
TXLCLKOUT-[12]
TXUCLKOUT+[12]
TXUCLKOUT-[12]
TXLOUT0+[12]
TXLOUT0-[12]
TXLOUT1+[12]
TXLOUT1-[12]
TXLOUT2+[12]
TXLOUT2-[12]
TXUOUT0-[12]
TXUOUT0+[12]
TXUOUT1-[12]
TXUOUT1+[12]
TXUOUT2-[12]
TXUOUT2+[12]
DISP_ON[12]
BLON[12]
3
4
1
2
3
4
5
6
7
8
R_A_MD[0..63][9]
A A
B B
C C
R_A_MD0
R_A_MD1
R_A_MD2
R_A_MD3
R_A_MD4
R_A_MD5
R_A_MD6
R_A_MD7
R_A_MD8
R_A_MD9
R_A_MD10
R_A_MD11
R_A_MD12
R_A_MD13
R_A_MD14
R_A_MD15
R_A_MD16
R_A_MD17
R_A_MD18
R_A_MD19
R_A_MD20
R_A_MD21
R_A_MD22
R_A_MD23
R_A_MD24
R_A_MD25
R_A_MD26
R_A_MD27
R_A_MD28
R_A_MD29
R_A_MD30
R_A_MD31
R_A_MD32
R_A_MD33
R_A_MD34
R_A_MD35
R_A_MD36
R_A_MD37
R_A_MD38
R_A_MD39
R_A_MD40
R_A_MD41
R_A_MD42
R_A_MD43
R_A_MD44
R_A_MD45
R_A_MD46
R_A_MD47
R_A_MD48
R_A_MD49
R_A_MD50
R_A_MD51
R_A_MD52
R_A_MD53
R_A_MD54
R_A_MD55
R_A_MD56
R_A_MD57
R_A_MD58
R_A_MD59
R_A_MD60
R_A_MD61
R_A_MD62
R_A_MD63
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AP7
AP11
AP10
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AM3
AK2
AK3
AG2
AG1
AM2
AH3
AG3
AE3
AD6
AC4
AD4
AD5
U18B
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
AL9
SADQ33
AL6
SADQ34
SADQ35
SADQ36
SADQ37
AL7
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
AL4
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
AL3
SADQ52
SADQ53
SADQ54
SADQ55
AF3
SADQ56
SADQ57
SADQ58
SADQ59
AF2
SADQ60
AF1
SADQ61
SADQ62
SADQ63
SA_BS0#
SA_BS1#
SA_BS2#
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
DDR SYSTEM MEMORY A
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
@ALVISO_GM/GML
AK15
AK16
AL21
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
AN15
AP16
AF29
AF28
AP15
R_A_BS0#
R_A_BS1#
R_A_BS2#
R_A_DM0
R_A_DM1
R_A_DM2
R_A_DM3
R_A_DM4
R_A_DM5
R_A_DM6
R_A_DM7
R_A_DQS0
R_A_DQS1
R_A_DQS2
R_A_DQS3
R_A_DQS4
R_A_DQS5
R_A_DQS6
R_A_DQS7
R_A_DQS#0
R_A_DQS#1
R_A_DQS#2
R_A_DQS#3
R_A_DQS#4
R_A_DQS#5
R_A_DQS#6
R_A_DQS#7
R_A_MA0
R_A_MA1
R_A_MA2
R_A_MA3
R_A_MA4
R_A_MA5
R_A_MA6
R_A_MA7
R_A_MA8
R_A_MA9
R_A_MA10
R_A_MA11
R_A_MA12
R_A_MA13
R_A_SCASA#
R_A_SRASA#
SA_RCVENIN#
SA_RCVENOUT#
R_A_BMWEA#
R_A_BS0# [9]
R_A_BS1# [9]
R_A_BS2# [9]
R_A_DM[0..7] [9]
R_A_DQS[0..7] [9]
R_A_DQS#[0..7] [9]
R_A_MA[0..13] [9]
R_A_SCASA# [9]
R_A_SRASA# [9]
R_A_BMWEA# [9]
R_B_MD[0..63][9]
T35
T34
R_B_MD0
R_B_MD1
R_B_MD2
R_B_MD3
R_B_MD4
R_B_MD5
R_B_MD6
R_B_MD7
R_B_MD8
R_B_MD9
R_B_MD10
R_B_MD11
R_B_MD12
R_B_MD13
R_B_MD14
R_B_MD15
R_B_MD16
R_B_MD17
R_B_MD18
R_B_MD19
R_B_MD20
R_B_MD21
R_B_MD22
R_B_MD23
R_B_MD24
R_B_MD25
R_B_MD26
R_B_MD27
R_B_MD28
R_B_MD29
R_B_MD30
R_B_MD31
R_B_MD32
R_B_MD33
R_B_MD34
R_B_MD35
R_B_MD36
R_B_MD37
R_B_MD38
R_B_MD39
R_B_MD40
R_B_MD41
R_B_MD42
R_B_MD43
R_B_MD44
R_B_MD45
R_B_MD46
R_B_MD47
R_B_MD48
R_B_MD49
R_B_MD50
R_B_MD51
R_B_MD52
R_B_MD53
R_B_MD54
R_B_MD55
R_B_MD56
R_B_MD57
R_B_MD58
R_B_MD59
R_B_MD60
R_B_MD61
R_B_MD62
R_B_MD63
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AK9
AK6
AH5
AK8
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
U18G
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
AJ9
SBDQ38
SBDQ39
AJ7
SBDQ40
SBDQ41
AJ4
SBDQ42
SBDQ43
SBDQ44
AJ8
SBDQ45
AJ5
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
SB_BS0#
SB_BS1#
SB_BS2#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR SYSTEM MEMORY B
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
@ALVISO_GM/GML
AJ15
AG17
AG21
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
AH14
AK14
AF15
AF14
AH16
R_B_BS0#
R_B_BS1#
R_B_BS2#
R_B_DM0
R_B_DM1
R_B_DM2
R_B_DM3
R_B_DM4
R_B_DM5
R_B_DM6
R_B_DM7
R_B_DQS0
R_B_DQS1
R_B_DQS2
R_B_DQS3
R_B_DQS4
R_B_DQS5
R_B_DQS6
R_B_DQS7
R_B_DQS#0
R_B_DQS#1
R_B_DQS#2
R_B_DQS#3
R_B_DQS#4
R_B_DQS#5
R_B_DQS#6
R_B_DQS#7
R_B_MA0
R_B_MA1
R_B_MA2
R_B_MA3
R_B_MA4
R_B_MA5
R_B_MA6
R_B_MA7
R_B_MA8
R_B_MA9
R_B_MA10
R_B_MA11
R_B_MA12
R_B_MA13
R_B_SCASA#
R_B_SRASA#
SB_RCVENIN#
SB_RCVENOUT#
R_B_BMWEA#
R_B_BS0# [9]
R_B_BS1# [9]
R_B_BS2# [9]
R_B_DM[0..7] [9]
R_B_DQS[0..7] [9]
R_B_DQS#[0..7] [9]
R_B_MA[0..13] [9]
R_B_SCASA# [9]
R_B_SRASA# [9]
R_B_BMWEA# [9]
T22
T18
D D
QUANTA COMPUTER
Title
Alviso (DDR)
Size : Document Number : Rev :
X
1
2
3
4
5
6
Date :
7
HW Engineer :
EW5 --- Alviso & ICH6
Sheet of
730Saturday, Ju l y 09, 2005
8
1A
5
+VCCP
3900mA
12
12
C161
C184
.1U-4
.1U-4
D D
12
C211
10U/6.3V-8
12
C132
10U/6.3V-8
12
C207
10U/6.3V-8
12
C155
.1U-4
B: DEPOP C106, C93, C110, C94 WHEN NO EXT.VGA
L34
VCCA_DPLLA
+1.5V
60mA
+1.5V
C C
+1.5V
60mA
+1.5V
60mA
10UH
L35
10UH
L15
1UH-1206
L18
1UH-1206
12
12
12
12
12
12
C203
.1U-4
VCCA_DPLLB
12
C221
.1U-4
12
C147
.1U-4
C149
.1U-4
C202
+
470U/2.5V-7343
+
C222
220U/2.5V-3528
C118
+
470U/2.5V-7343
C122
+
470U/2.5V-7343
.1U-4
+2.5V
C209
+1.5V
12
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC
12
C196
10U/6.3V-8
B: CHANGE FROM RB751
R96
VCCGFOLLOW
10-6
B B
+2.5V
68mA
BLM18PG181S N 1/ 0_6
+VCCP
12
C190
2.2U/6.3V-6
L30
12
C176
4.7U/10V-8
12
.022U-4
C193
D6
CH551
VCCA_CRTDAC
12
C194
.1U-4
C152 .47U/25V -8
C148 .47U/25V -8
C138 .22U-6
C134 .22U-6
21
1 2
1 2
+VCCP
VCCP_GMCH_CAP1
VCCP_GMCH_CAP2
VCCP_GMCH_CAP3
VCCP_GMCH_CAP4
810mA
+VCCP
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
AC2
AC1
B23
C35
AA1
AA2
F19
E19
G19
H20
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
U18H
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC0
VCCA_CRTDAC1
VVSSA_CRTDAC
VCC_SYNC
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
@ALVISO_GM/GML
4
POWER
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCA_TVBG
VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCA_LVDS
VCCHV0
VCCHV1
VCCHV2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCA_3GBG
VSSA_3GBG
F17
E17
D18
C18
F18
E18
H18
G18
D19
H17
B26
B25
A25
A35
B22
B21
A21
AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1
B28
A28
A27
AF20
AP19
AF19
AF18
AE37
W37
U37
R37
N37
L37
J37
Y29
Y28
Y27
F37
G37
B: NO FILTER WHEN EXT. VGA
VCC_TVDACC
VCC_TVBG
VCC_QTVDAC
V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4
+1.5V
C182
.022U-4
V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5
+2.5V
60mA
VCC_DDRDLL
VCC3G_PCIE
12
C216
.1U-4
Note: All VCCSM
pins shorted
internally.
12
C204
10U/6.3V-8
Note: All VCCSM
pins shorted
internally.
C153 .1U-4
C136 .1U-4
C141 .1U-4
12
12
+1.8VSUS
1 2
1 2
1 2
C220
.1U-4
L29
BLM18PG181S N 1/ 0_6
C183
.1U-4
12
C185
10U/6.3V-8
C224 .1U-4
1 2
C225 .1U-4
1 2
C213 .1U-4
1 2
12
C160
10U/6.3V-8
+
+2.5V
150mA
12
+2.5V
2mA
C154
470U/2.5V-7343
+
A2
C378
220U/2.5V-3528
12
C215
.1U-4
3
VCC_TVDACA
12
C174
C175
.022U-4
.1U-4
+3V
C180
.022U-4
10mA
+2.5V
C214
.1U-4
12
C188
.022U-4
C192
.022U-4
VCC_QTVDAC
C179
.022U-4
C223
.01U/16V-4
VCC_TVBG
12
C173
.1U-4
12
C191
.1U-4
12
C162
.1U-4
12
close to PIN D19
L25
BLM18PG181S N 1/ 0_6
12
B: NO FILTER WHEN EXT. VGA
12
C376
10U/6.3V-8
12
A2
C217
10U/6.3V-8
12
C375
10U/6.3V-8
VCC3G_PCIE
+
C156
220U/2.5V-3528
12
L31
BLM18PG181SN1-6
12
C198
.1U-4
L48
BLM18PG181SN1-6
C374
.1U-4
R161
1 2
+3V
12
12
60mA
12
C197
10U/6.3V-8
+1.5V
R126
10-6
L28
BLM18PG181S N 1/ 0_6
+3V
V1_5VFOLLOW
12
+VCCP
L24
BLM18PG181SN1/0_6
120mA
VCC_TVDACB
12
C181
.1U-4
12
C210
.1U-4
L26
56
C166
for C stage 7/5
*10U/6.3V-8
E: Add bulk cap. for acer TV
+1.5V
24mA
12
+1.5V
12
12
+1.5V
+1.5V
30mA
1A
L36
12
BLM18PG181SN1-6
+1.5V
0.5/F-6
VCCA_3GPLL_1VCCA_3GPLL
2
B: CHANGE FROM RB751
D7
21
+1.5V
CH551
+3V
W13
V13
U13
T13
R13
P13
N13
M13
L13
W12
V12
U12
T12
R12
P12
N12
M12
L12
AB26
AA26
Y26
AB25
AA25
Y25
AB24
AA24
Y24
AB23
AA23
Y23
AB22
AA22
Y22
AB21
AA21
Y21
R21
AB20
AA20
AB19
AA19
AB18
AA18
AB17
AA17
Y17
R17
AB16
AA16
Y16
W16
V16
U16
T16
R16
P16
N16
M16
L16
AB15
AA15
Y15
W15
V15
U15
T15
R15
P15
N15
M15
L15
AB14
AA14
Y14
W14
V14
U14
T14
R14
P14
N14
M14
L14
AA13
Y13
AA12
Y12
@ALVISO_GM/GML
U18D
VTT_NCTF0
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
VTT_NCTF7
VTT_NCTF8
VTT_NCTF9
VTT_NCTF10
VTT_NCTF11
VTT_NCTF12
VTT_NCTF13
VTT_NCTF14
VTT_NCTF15
VTT_NCTF16
VTT_NCTF17
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
VSS_NCTF26
VSS_NCTF27
VSS_NCTF28
VSS_NCTF29
VSS_NCTF30
VSS_NCTF31
VSS_NCTF32
VSS_NCTF33
VSS_NCTF34
VSS_NCTF35
VSS_NCTF36
VSS_NCTF37
VSS_NCTF38
VSS_NCTF39
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
VSS_NCTF43
VSS_NCTF44
VSS_NCTF45
VSS_NCTF46
VSS_NCTF47
VSS_NCTF48
VSS_NCTF49
VSS_NCTF50
VSS_NCTF51
VSS_NCTF52
VSS_NCTF53
VSS_NCTF54
VSS_NCTF55
VSS_NCTF56
VSS_NCTF57
VSS_NCTF58
VSS_NCTF59
VSS_NCTF60
VSS_NCTF61
VSS_NCTF62
VSS_NCTF63
VSS_NCTF64
VSS_NCTF65
VSS_NCTF66
VSS_NCTF67
VSS_NCTF68
NCTF
VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
AD26
AC26
AD25
AC25
AD24
AC24
AD23
AC23
AD22
AC22
AD21
AC21
AD20
AC20
AD19
AC19
AD18
AC18
AD17
AC17
AD16
AC16
AD15
AC15
AD14
AC14
AD13
AC13
AB13
AD12
AC12
AB12
W26
V26
U26
T26
R26
P26
N26
M26
L26
W25
V25
U25
T25
R25
P25
N25
M25
L25
W24
V24
U24
T24
R24
P24
N24
M24
L24
W23
V23
U23
T23
R23
P23
N23
M23
L23
W22
V22
U22
T22
R22
P22
N22
M22
L22
W21
V21
U21
T21
P21
N21
M21
L21
Y20
R20
P20
N20
M20
L20
Y19
R19
P19
N19
M19
L19
Y18
R18
P18
N18
M18
L18
W17
V17
U17
T17
P17
N17
M17
L17
1
+1.8VSUS
+VCCP
A A
12
C200
.1U-4
12
C177
4.7U/10V-8
+2.5V
close to PIN B28,A28,A27
QUANTA COMPUTER
Title
Alviso (Power)
Size : Document Number : Rev :
X
5
4
3
2
Date :
HW Engineer :
EW5 --- Alviso & ICH6
1
Sheet of
830Saturday, July 09, 2005
1A
5
MVREF_DM
+1.8VSUS +1.8VSUS
R_A_MD1 R_A_MD4
D D
C C
CKE0[6]
R_A_BS2#[7]
R_A_BS0#[7]
R_A_BMWEA#[7]
R_A_SCASA#[7]
SM_CS1#[6]
SM_ODT1[6]
B B
A A
SMBDT[2]
SMBCK[2]
R_A_MD0
R_A_DQS#0
R_A_DQS0
R_A_MD3
R_A_MD6
R_A_MD9
R_A_MD12
R_A_DQS#1
R_A_DQS1
R_A_MD15 R_A_MD10
R_A_MD14 R_A_MD11
R_A_MD20 R_A_MD21
R_A_MD16 R_A_MD17
R_A_DQS#2
R_A_DQS2
R_A_MD19 R_A_MD18
R_A_MD23 R_A_MD22
R_A_MD28 R_A_MD24
R_A_MD29 R_A_MD25
R_A_DM3
R_A_MD31 R_A_MD26
R_A_MD27
CKE0
R_A_BS2#
R_A_MA12
R_A_MA9
R_A_MA8
R_A_MA5
R_A_MA3
R_A_MA1
R_A_MA10
R_A_BS0#
R_A_BMWEA#
R_A_SCASA#
SM_CS1#
SM_ODT1
R_A_MD32
R_A_MD33
R_A_DQS#4
R_A_DQS4
R_A_MD34
R_A_MD35
R_A_MD40
R_A_MD41
R_A_DM5
R_A_MD43
R_A_MD42
R_A_MD49 R_A_MD53
R_A_MD48 R_A_MD52
R_A_DQS#6
R_A_DQS6
R_A_MD50
R_A_MD51
R_A_MD61 R_A_MD57
R_A_MD60 R_A_MD56
R_A_DM7
R_A_MD58
R_A_MD63 R_A_MD59
SMBDT
SMBCK
+3V
C47
C45
.1U-4
2.2U/6.3V-6
C187
C195
.1U-4
2.2U/6.3V-6
JDIM1
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
PC4800 DDR2 SDRAM
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)
PC4800_DDR2_4.0MM_STD
CLOCK 0,1,2
CKE 0,1
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
VDD11
VDD4
VDD12
RAS#
VDD1
ODT0
SO-DIMM (200P)
VDD6
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
CK0
NC3
BA1
NC2
CK1
SA0
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
CLK_SDRAM0
30
CLK_SDRAM0#
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
A15
86
A14
88
90
A11
92
A7
94
A6
96
98
A4
100
A2
102
A0
104
R_A_BS1#
106
R_A_SRASA#
108
110
S0#
112
114
116
A13
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
R45 10K-4
198
R43 10K-4
200
SMbus address A0
5
R_A_MD5
R_A_DM0
R_A_MD2
R_A_MD7
R_A_MD13
R_A_MD8
R_A_DM1
R_A_DM2
R_A_DQS#3
R_A_DQS3
R_A_MD30
CKE1
R_A_MA11
R_A_MA7
R_A_MA6
R_A_MA4
R_A_MA2
R_A_MA0
SM_CS0#
SM_ODT0
R_A_MA13
R_A_MD36
R_A_MD37
R_A_DM4
R_A_MD38
R_A_MD39
R_A_MD45
R_A_MD44
R_A_DQS#5
R_A_DQS5
R_A_MD46
R_A_MD47
CLK_SDRAM1
CLK_SDRAM1#
R_A_DM6
R_A_MD55
R_A_MD54
R_A_DQS#7
R_A_DQS7
R_A_MD62
4
CLK_SDRAM0 [6]
CLK_SDRAM0# [6]
CKE1 [6]
R_A_BS1# [7]
R_A_SRASA# [7]
SM_CS0# [6]
SM_ODT0 [6]
4
CLK_SDRAM1 [6]
CLK_SDRAM1# [6]
R_A_DM[0..7] [7]
R_A_MD[0..63] [7]
R_A_DQS[0..7] [7]
R_A_DQS#[0..7] [7]
R_A_MA[0..13] [7]
R_B_DM[0..7] [7]
R_B_MD[0..63] [7]
R_B_DQS[0..7] [7]
R_B_DQS#[0..7] [7]
R_B_MA[0..13] [7]
CKE2[6]
R_B_BS2#[7]
R_B_BS0#[7]
R_B_BMWEA#[7]
R_B_SCASA#[7]
SM_CS3#[6]
SM_ODT3[6]
3
MVREF_DM
C189
C186
2.2U/6.3V-6
.1U-4
JDIM2
1
VREF
3
R_B_MD1 R_B_MD4
R_B_MD7
R_B_DQS#0
R_B_DQS0
R_B_MD2
R_B_MD0
R_B_MD11
R_B_MD9
R_B_DQS#1
R_B_DQS1 CLK_SDRAM3#
R_B_MD8 R_B_MD10
R_B_MD14
R_B_MD21 R_B_MD16
R_B_MD20 R_B_MD17
R_B_DQS#2
R_B_DQS2
R_B_MD18
R_B_MD23 R_B_MD22
R_B_MD29
R_B_MD28 R_B_MD25
R_B_DM3
R_B_MD30 R_B_MD27
R_B_MD31 R_B_MD26
CKE2
R_B_BS2#
R_B_MA12
R_B_MA8
R_B_MA5
R_B_MA3
R_B_MA1
R_B_MA10
R_B_BS0# R_B_SRASA#
R_B_BMWEA#
R_B_SCASA#
SM_CS3#
SM_ODT3
R_B_MD37
R_B_DQS#4
R_B_DQS4
R_B_MD35
R_B_MD34
R_B_MD41
R_B_MD40
R_B_MD42
R_B_MD43
R_B_MD48
R_B_MD49
R_B_DQS#6
R_B_DQS6
R_B_MD54
R_B_MD55 R_B_MD50
R_B_MD57 R_B_MD56
R_B_MD60
R_B_DM7
R_B_MD62
R_B_MD63 R_B_MD59
SMBDT
SMBCK
+3V
C48
C46
2.2U/6.3V-6
.1U-4
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
PC4800_DDR2_5.2MM_REV
CLOCK 3,4,5
CKE 2,3
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
SMbus address A1
3
+1.8VSUS+1.8VSUS
R_B_MD5
R_B_DM0
R_B_MD6
R_B_MD3
R_B_MD13
R_B_MD12
R_B_DM1
CLK_SDRAM3
R_B_MD15
R_B_DM2
R_B_MD19
R_B_MD24
R_B_DQS#3
R_B_DQS3
CKE3
R_B_MA11
R_B_MA7R_B_MA9
R_B_MA6
R_B_MA4
R_B_MA2
R_B_MA0
R_B_BS1#
SM_CS2#
SM_ODT2
R_B_MA13
R_B_MD36
R_B_MD32R_B_MD33
R_B_DM4
R_B_MD38
R_B_MD39
R_B_MD44
R_B_MD45
R_B_DQS#5
R_B_DQS5R_B_DM5
R_B_MD46
R_B_MD47
R_B_MD52
R_B_MD53
CLK_SDRAM4
CLK_SDRAM4#
R_B_DM6
R_B_MD51
R_B_MD61
R_B_DQS#7
R_B_DQS7
R_B_MD58
R44 10K-4
R42 10K-4
2
1
TERMINATOR DECOUPLING CAPACITOR
+0.9V
C119
C313
C114
.1U-4
+0.9V
+
C82
150U/6.3V-7343
+
C75
150U/6.3V-7343
C93
.1U-4
.1U-4
C109
.1U-4
.1U-4
C110
.1U-4
C103
.1U-4
C99
.1U-4
C106
.1U-4
C102
.1U-4
C113
.1U-4
C97
.1U-4
C115
.1U-4
C117
.1U-4
C322
.1U-4
C98
.1U-4
C116
.1U-4
C125
.1U-4
C92
.1U-4
C95
.1U-4
C104
.1U-4
C108
.1U-4
C123
.1U-4
+1.8VSUS
+1.8VSUS
DDR2 TERMINATOR
R_A_MA2
R_A_MA0
R_A_MA1
R_A_MA3
R_A_MA13
R_A_BS1#
R_A_MA11
R_A_MA7
R_A_MA8
R_A_MA5 R_B_MA5
R_A_MA10
R_A_BS0#
R_A_MA12
R_A_MA9
R_A_MA6
R_A_MA4
R_A_BS2#
R_A_SRASA#
R_A_SCASA#
R_A_BMWEA#
RN12 4P2R-56
1 2
RN4 4P2R-56
RN14 4P2R-56
RN6 4P2R-56
RN1 4P2R-56
RN9 4P2R-56
RN13 4P2R-56
43
1 2
43
R64 56-4
R75 56-4
1 2
43
1 2
43
1 2
43
1 2
43
1 2
43
R86 56-4
R72 56-4
R69 56-4
R65 56-4
Title
DDR2 SO-DIMM & TERMINATOR
Size : Document Number : Rev :
X
Date :
EW5 --- Alviso & ICH6
R_B_MA10
R_B_BS0#
R_B_MA0
R_B_MA2
R_B_MA3
R_B_MA1
R_B_MA6
R_B_MA4
R_B_MA8
R_B_MA7
R_B_MA11
R_B_MA12
R_B_MA9
R_B_BS1#
R_B_MA13
R_B_BS2#
R_B_SRASA#
R_B_SCASA#
R_B_BMWEA#
QUANTA COMPUTER
HW Engineer :
C96
.1U-4
C127
.1U-4
CKE0
CKE1
CKE2
CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
RN2 4P2R-56
RN3 4P2R-56
RN5 4P2R-56
RN8 4P2R-56
RN7 4P2R-56
RN11 4P2R-56
RN10 4P2R-56
Sheet of
1
C315
.1U-4
C124
C120
.1U-4
.1U-4
R88 56-4
R85 56-4
R83 56-4
R84 56-4
R68 56-4
R56 56-4
R71 56-4
R66 56-4
R58 56-4
R60 56-4
R67 56-4
R70 56-4
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R79 56-4
R61 56-4
R87 56-4
R74 56-4
R76 56-4
R73 56-4
930Saturday, Ju l y 09, 2005
CLK_SDRAM3 [6]
CLK_SDRAM3# [6]
CKE3 [6]
R_B_BS1# [7]
R_B_SRASA# [7]
SM_CS2# [6]
SM_ODT2 [6]
CLK_SDRAM4 [6]
CLK_SDRAM4# [6]
+3V
C94
.1U-4
2
+
C91
150U/6.3V-7343
C112
.1U-4
43
43
43
43
43
43
43
+0.9V
+0.9V+0.9V
1A
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