VER : 1A
5
4
3
2
1
BOM P/N
31ZR7MB0000 ZR7B MB(UMA,BT)W/O CPU
31ZR7MB0010 ZR7B MB(SG,MADS,SAM,BT,3G)W/O CPU
D D
Description
DDRIII-SODIMM1
DDRIII-SODIMM2
X'TAL
14.318MHz
SLG8LV595
CLOCK
GENERATOR
C C
P14,15
P3
SATA - HDD
SATA - ODD
USB Port
USB/B Con.
(USB Port x3)
Bluetooth Con.
B B
Cardreader
P32
AU6437-GBL
Cardreader control
P34
P34
P34
P32
=5%6<67(0%/2&.',$*5$0
X'TAL
32.768KHz
X'TAL 25MHz
SPI ROM
Madison-Pro
Park
ATI-GPU
P16, 17, 18, 21, 22, 23
P8
Dual Channel DDR III
800/1066 MHZ
SATA 0
P29
P8
SATA 1
BATTERY
P29
USB-1
USB-3/9/11
USB-4
USB-12
Azalia
FDI
FDI
CLK
SATA
Ibex Peak-M
USB
PCH
P8, 9, 10, 11, 12, 13
RTC
IHDA
Arrandale
rPGA 989
P4, 5, 6, 7
LPC
LPC
DMI
DMI
PCI-E x16
GFX IMC
DMI(x4)
INT_CRT
INT_LVDS
Display
INT_HDMI
PCI-E x1
SPI
PCIE-6
USB-13
PCIE-2
USB-10
PCIE-1
Channel A
Channel C
EXT_HDMI
EXT_CRT
EXT_LVDS
MINI CARD
WLAN
MINI CARD
3G
AR8151
GIGA LAN
64MB/128MB x 8
TS3DV421
SN74CBT3257 x3
LVDS/CRT
SWITCH
PS8101
LS
P28
P28 P28
P26
X'TAL
25MHz
ISL88731A
Batery Charger
P24
P25
SIM Card FFC
Conn
P38
P19, 20
USB-8
Int. MIC
EXT_HDMI
RJ45
UP6111AQDD
+1.05V
CRT Con.
LVDS/CCD/MIC
Con.
HDMI Con.
P27
P42
P24
P24
P25
ISL62881HRZ-T
+VGFX_AXG
P46
Int. MIC
BOM Option Table
A A
Reference
IV@
SW@
MP@
VRAM@
3G@
*
Description
for UMA only SKU
for Switchable Graphic only SKU
for Madison & Park different parts
for different VRAM parts
for 3G function
do not stuff
5
ALC271X-GRR
AUDIO CODEC
MIC JACK
P31
HP/SPDIF
Speaker
P31
P30
P31
4
K/B Con.
P35
NPCE781
EC
Power
Board Con.
P33
W25X16VSS1G
SPI FLASH
P37
P37
SW/B
P33
EM-6781-T3
HALL SENSOR
Touch Pad
Board Con.
P24
P35
Fan Driver
(PWM Type)
P35
X'TAL
32.768KHz
http://laptop-motherboard-schematic.blogspot.com/
3
RT8206B
3V/5V
ISL62882
CPU core
UP6111AQDD
+1.1V_VTT
2
RT8207A
+1.5V_SUS
P39
MAX8792ETD+T
+VGPU_CORE
P40
ISL62872
+VGPU_IO
P41
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
TPS54418RTE x2
+1.8V/+1V
P43
Discharger
P44
Thermal Protection
P45
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Block Diagram
Block Diagram
Block Diagram
1
ZR7B
ZR7B
ZR7B
15 0 Friday, March 05, 2010
15 0 Friday, March 05, 2010
15 0 Friday, March 05, 2010
P47
P47
P48
1A
1A
1A
1
GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)
+3.3V
2
VIN
VIN
3
+1.5V
4
+1.5V_SUS
5
+1.8V
6
7
8
+5V
dGPU_VRON
A A
VDDR3
MOS (AO3413)
+3_D (0.5A)
+3V_D
P22
VDDC
ISL6264
+VGPU_CORE (20A)
P44
PG_GPUIO_EN
VDDCI
ISL62872
P45
+VGPU_IO (4.5A)
PG_1V_EN
(DP PLL PWR)
+1V
G9334ADJ & MOS
+1V (3A)
P47
PG_1.5V_EN
VDDR1
MOS (AO4710)
P43
+1.5V_GPU (10A)
PG_1.5V_EN
VDDR4
MOS (AO6402)
P43
+1.8V_GPU (3A)
PG_1.5V_EN
BJT
P22
dGPU_PWROK
dGPU_PWR_EN#
MOS
AO3413
+5_GPU
P22
GPU PWR CTRL Option 2 (VDDR3 after VDDR1)
VIN
VDDCI
ISL62872
P45
+VGPU_IO (4.5A)
PG_1V_EN
dGPU_VRON
VIN
VDDC
ISL6264
P44
+VGPU_CORE (20A)
Power States
POWER PLANE
B B
C C
VIN
+VCCRTC
+3VPCU
+5VPCU
+15V
+3V_S5
+5V_S5
+5V
+1.5VSUS
+0.75V_DDR_VTT
+VGFX_AXG S0 GFX_ON Internal GPU POWER
+1.8V
+1.5V
+1.1V_VTT S0
+1.05V
+VCC_CORE
LCDVCC
+5V_GPU
+GPU_CORE
+GPU_IO PG_GPUIO_EN +0.9V~+1.1V
VOLTAGE
+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+5V
+3.3V
+1.5V
+0.75V
variation
+1.8V
+1.5V
+1.05V or +1.1V
+1.05V
variation
+3.3V
+5V Discrete enable SWITCHABLE PWM IC POWER
DESCRIPTION
RTC POWER
EC POWER
CHARGE POWER
CHARGE PUMP POWER
LAN/BT/CIR POWER
USB POWER
HDD/ODD/Codec/TP/CRT/HDMI POWER
PCH/GPU/Peripheral component POWER +3V
CPU/SODIMM CORE POWER
SODIMM Termination POWER
CPU/PCH/Braidwood POWER
MINI CARD/NEW CARD POWER
PCH CORE POWER MAINON
CPU CORE POWER
LCD POWER
+1.5V
(DP PLL PWR)
+1V
G9334ADJ & MOS
+1V (3A)
CONTROL
SIGNAL
ALWAYS MAIN POWER
ALWAYS
ALWAYS
ALWAYS
S5_ON
S5_ON
MAINON
MAINON
SUSON
MAINON
MAINON
MAINON
MAINON CPU VTT POWER
VRON
LVDS_VDDEN
dGPU_PWR_EN#
PG_1.5V_EN +1.5V +1.5V_GPU
+1.5V_GPU +1.8V +1.8V_GPU
PG_1V_EN +1V +1V Discrete enable DP/PEG POWER
P47
PG_1.5V_EN
+1.5V_SUS
VDDR1
MOS (AO4710)
+1.5V_GPU (10A)
ACTIVE IN
ALWAYS
ALWAYS
ALWAYS
ALWAYS
ALWAYS ALWAYS
S0-S5
S0-S5
S0
S0
S0-S3
S0
S0
S0
S0
S0
S0
Discrete enable +3V_D GPU CORE POWER +0.9V~+1.1V
Discrete enable GPU I/O POWER
Discrete enable VRAM CORE POWER
Discrete enable GPU_CRE/LVDS/PLL POWER
+1.5V_GPU
P43
Thermal Follow Chart
CPU
CORE PWR
+3.3V
VDDR3
MOS (AO3413)
P22
+3_D (0.5A)
+3V_D PG_GPUIO_EN
H_ORICHOT#
H/W Throttling
+1.8V
VDDR4
MOS (AO6402)
P43
+1.8V_GPU (3A)
NTC
Thermal
Protection
CPU
PCH
SM-Bus
EC
PG_1.5V_EN
BJT
P22
PM_THRMTRIP#
SML1ALERT#
CPUFAN#
dGPU_PWROK
SYS_SHDN#
WIRE-AND
dGPU_PWR_EN#
3V/5 V
SYS PWR
FAN FAN Driver
+5V
MOS
AO3413
+5_GPU
P22
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
http://laptop-motherboard-schematic.blogspot.com/
1
2
3
4
5
6
Size Document Number Rev
PWR Status & GPU PW R CRL & T HRM
PWR Status & GPU PW R CRL & T HRM
PWR Status & GPU PW R CRL & T HRM
Date: Sheet
Date: Sheet
Date: Sheet
7
PROJECT :
ZR7B
ZR7B
ZR7B
25 0 Friday, March 05, 2010
25 0 Friday, March 05, 2010
25 0 Friday, March 05, 2010
8
1A
1A
1A
of
of
of
5
4
3
2
1
D D
L53 595@PBY160808T-181Y-N/2A/180ohm_6 L53 595@PBY160808T-181Y-N/2A/180ohm_6
+1.5V
+1.05V
C477
C477
.1u/16V_4
.1u/16V_4
R509
R509
*10K_4
*10K_4
R513
R513
10K_4
10K_4
20mil
CPU_SEL
L54 BLM18AG601SN1D/200mA/600ohm_6 L54 BLM18AG601SN1D/200mA/600ohm_6
+3V
C750
C750
4.7u/10V_8
4.7u/10V_8
C C
B B
150mA(30mil)
C723
C723
.1u/16V_4
.1u/16V_4
C745
C745
.1u/16V_4
.1u/16V_4
CLK_ICH_14M <10>
C724
C724
.1u/16V_4
.1u/16V_4
+3V_CLK
+1.5V_CLK
C744
C744
.1u/16V_4
.1u/16V_4
C734 33p/50V_4 C734 33p/50V_4
C727 33p/50V_4 C727 33p/50V_4
R527
R527
*585@0_6
*585@0_6
R508 33_4 R508 33_4
IDT: AL003197001 (ICS9LVS3197AKLFT)
Realtek: AL000890000 (RTM890N-632-GRT)
Silego: AL000595000 (SLG8LV595VTR)
SMBus CPU_CLK select
ICH_SMBDATA <10>
C747
C747
*10p/50V/COG_4
*10p/50V/COG_4
Y5
Y5
14.318MHz
14.318MHz
CLK_SDATA
CLK_SCLK
CPU_SEL
XTAL_IN
XTAL_OUT
3
+3V
+3V
2
U35
U35
1
VDD_DOT
17
VDD_SRC
24
VDD_CPU
5
VDD_27
29
VDD_REF
31
SDA
32
SCL
30
REF_0/CPU_SEL
28
XTAL_IN
27
XTAL_OUT
2
VSS_DOT
8
VSS_27
9
VSS_SATA
12
VSS_SRC
21
VSS_CPU
26
VSS_REF
33
GND
SLG8LV595V
SLG8LV595V
1
Q18
Q18
2N7002K
2N7002K
R325
R325
2.2K_4
2.2K_4
CLK_SDATA
VDD_SRC_I/O
VDD_CPU_I/O
DOT_96
DOT_96#
27M
27M_SS
SRC_1/SATA
SRC_1#/SATA#
SRC_2
SRC_2#
*CPU_STOP#
CPU_1
CPU_1#
CPU_0
CPU_0#
CKPWRGD/PD#
CLK_SDATA <14,15,28>
15
18
3
4
6
7
10
11
13
14
16
20
19
23
22
25
+VDDIO_CLK
CLK_BUF_DREFCLK <10>
CLK_BUF_DREFCLK# <10>
TP12 TP12
CLK_VGA_27M_SS
CLK_BUF_PCIE_3GPLL <10>
CLK_BUF_PCIE_3GPLL# <10>
CLK_BUF_DREFSSCLK <10>
CLK_BUF_DREFSSCLK# <10>
R491 10K_4 R491 10K_4
TP9TP9
TP8TP8
CLK_BUF_BCLK <10>
CLK_BUF_BCLK# <10>
CK_PWRGD_R
CLK Enable
80mA(20mil)
C721
C721
C728
C728
.1u/16V_4
.1u/16V_4
.1u/16V_4
.1u/16V_4
Place each 0.1uF cap as close as
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.
R609 SW@33_4 R609 SW@33_4
R506 *SW@33_4 R506 *SW@33_4
C742 *SW@10p/50V_4 C742 *SW@10p/50V_4
+3V
VR_PWRGD_CK505# <40>
L49 PBY160808T/2A/180ohm_6 L49 PBY160808T/2A/180ohm_6
C720
C720
10u/Y5V_8
10u/Y5V_8
2
C725
C725
10u/Y5V_8
10u/Y5V_8
+3V
3
Q37
Q37
2N7002K
2N7002K
R489
R489
1K/F_4
1K/F_4
27M_CLK <17>
CLK_27M_SS <17>
CK_PWRGD_R
R488
R488
100K/F_4
100K/F_4
+1.05V
R551
01
A A
CPU_SEL
CPU0/1=133MHz
(default)
5
CPU0/1=100MHz
ICH_SMBCLK <10>
4
2
3
Q38
Q38
2N7002K
2N7002K
R551
2.2K_4
2.2K_4
CLK_SCLK
1
3
CLK_SCLK <14,15,28>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Clock Generator
Clock Generator
Clock Generator
Date: Sheet
Date: Sheet
2
Date: Sheet
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZR7B
ZR7B
ZR7B
35 0 Friday, March 05, 2010
35 0 Friday, March 05, 2010
35 0 Friday, March 05, 2010
1A
1A
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
4
AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)
U33A
U33A
DMI_TXN0 <8>
DMI_TXN1 <8>
DMI_TXN2 <8>
DMI_TXN3 <8>
D D
DMI_TXP0 <8>
DMI_TXP1 <8>
DMI_TXP2 <8>
DMI_TXP3 <8>
DMI_RXN0 <8>
DMI_RXN1 <8>
DMI_RXN2 <8>
DMI_RXN3 <8>
DMI_RXP0 <8>
DMI_RXP1 <8>
DMI_RXP2 <8>
DMI_RXP3 <8>
FDI_TXN0 <8>
FDI_TXN1 <8>
FDI_TXN2 <8>
FDI_TXN3 <8>
FDI_TXN4 <8>
FDI_TXN5 <8>
FDI_TXN6 <8>
FDI_TXN7 <8>
FDI_TXP0 <8>
FDI_TXP1 <8>
FDI_TXP2 <8>
FDI_TXP3 <8>
FDI_TXP4 <8>
C C
FDI_TXP5 <8>
FDI_TXP6 <8>
FDI_TXP7 <8>
FDI_FSYNC0 <8>
FDI_FSYNC1 <8>
FDI_INT <8>
FDI_LSYNC0 <8>
FDI_LSYNC1 <8>
B B
A24
DMI_RX#[0]
C23
DMI_RX#[1]
B22
DMI_RX#[2]
A21
DMI_RX#[3]
B24
DMI_RX[0]
D23
DMI_RX[1]
B23
DMI_RX[2]
A22
DMI_RX[3]
D24
DMI_TX#[0]
G24
DMI_TX#[1]
F23
DMI_TX#[2]
H23
DMI_TX#[3]
D25
DMI_TX[0]
F24
DMI_TX[1]
E23
DMI_TX[2]
G23
DMI_TX[3]
E22
FDI_TX#[0]
D21
FDI_TX#[1]
D19
FDI_TX#[2]
D18
FDI_TX#[3]
G21
FDI_TX#[4]
E19
FDI_TX#[5]
F21
FDI_TX#[6]
G18
FDI_TX#[7]
D22
FDI_TX[0]
C21
FDI_TX[1]
D20
FDI_TX[2]
C18
FDI_TX[3]
G22
FDI_TX[4]
E20
FDI_TX[5]
F20
FDI_TX[6]
G19
FDI_TX[7]
F17
FDI_FSYNC[0]
E17
FDI_FSYNC[1]
C17
FDI_INT
F18
FDI_LSYNC[0]
D17
FDI_LSYNC[1]
Clarksfield/Auburndale
Clarksfield/Auburndale
DMI Intel(R) FDI
DMI Intel(R) FDI
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
B26
A26
B27
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
CPEG_TXN0
CPEG_TXN1
CPEG_TXN2
CPEG_TXN3
CPEG_TXN4
CPEG_TXN5
CPEG_TXN6
CPEG_TXN7
CPEG_TXN8
CPEG_TXN9
CPEG_TXN10
CPEG_TXN11
CPEG_TXN12
CPEG_TXN13
CPEG_TXN14
CPEG_TXN15
CPEG_TXP0
CPEG_TXP1
CPEG_TXP2
CPEG_TXP3
CPEG_TXP4
CPEG_TXP5
CPEG_TXP6
CPEG_TXP7
CPEG_TXP8
CPEG_TXP9
CPEG_TXP10
CPEG_TXP11
CPEG_TXP12
CPEG_TXP13
CPEG_TXP14
CPEG_TXP15
R434 49.9/F_4 R434 49.9/F_4
R435 750/F_4 R435 750/F_4
C300 SW@0.1u/10V_4_X7RC300 SW @0.1u/10V_4_X7R
C659 SW@0.1u/10V_4_X7RC659 SW @0.1u/10V_4_X7R
C304 SW@0.1u/10V_4_X7RC304 SW @0.1u/10V_4_X7R
C286 SW@0.1u/10V_4_X7RC286 SW @0.1u/10V_4_X7R
C288 SW@0.1u/10V_4_X7RC288 SW @0.1u/10V_4_X7R
C285 SW@0.1u/10V_4_X7RC285 SW @0.1u/10V_4_X7R
C289 SW@0.1u/10V_4_X7RC289 SW @0.1u/10V_4_X7R
C281 SW@0.1u/10V_4_X7RC281 SW @0.1u/10V_4_X7R
C644 SW@0.1u/10V_4_X7RC644 SW @0.1u/10V_4_X7R
C634 SW@0.1u/10V_4_X7RC634 SW @0.1u/10V_4_X7R
C636 SW@0.1u/10V_4_X7RC636 SW @0.1u/10V_4_X7R
C624 SW@0.1u/10V_4_X7RC624 SW @0.1u/10V_4_X7R
C638 SW@0.1u/10V_4_X7RC638 SW @0.1u/10V_4_X7R
C626 SW@0.1u/10V_4_X7RC626 SW @0.1u/10V_4_X7R
C640 SW@0.1u/10V_4_X7RC640 SW @0.1u/10V_4_X7R
C628 SW@0.1u/10V_4_X7RC628 SW @0.1u/10V_4_X7R
C292 SW@0.1u/10V_4_X7RC292 SW @0.1u/10V_4_X7R
C658 SW@0.1u/10V_4_X7RC658 SW @0.1u/10V_4_X7R
C308 SW@0.1u/10V_4_X7RC308 SW @0.1u/10V_4_X7R
C284 SW@0.1u/10V_4_X7RC284 SW @0.1u/10V_4_X7R
C290 SW@0.1u/10V_4_X7RC290 SW @0.1u/10V_4_X7R
C282 SW@0.1u/10V_4_X7RC282 SW @0.1u/10V_4_X7R
C287 SW@0.1u/10V_4_X7RC287 SW @0.1u/10V_4_X7R
C280 SW@0.1u/10V_4_X7RC280 SW @0.1u/10V_4_X7R
C645 SW@0.1u/10V_4_X7RC645 SW @0.1u/10V_4_X7R
C635 SW@0.1u/10V_4_X7RC635 SW @0.1u/10V_4_X7R
C637 SW@0.1u/10V_4_X7RC637 SW @0.1u/10V_4_X7R
C625 SW@0.1u/10V_4_X7RC625 SW @0.1u/10V_4_X7R
C639 SW@0.1u/10V_4_X7RC639 SW @0.1u/10V_4_X7R
C627 SW@0.1u/10V_4_X7RC627 SW @0.1u/10V_4_X7R
C641 SW@0.1u/10V_4_X7RC641 SW @0.1u/10V_4_X7R
C629 SW@0.1u/10V_4_X7RC629 SW @0.1u/10V_4_X7R
PEG_RXN[0..15] <16>
Use reverse type
(at GPU side)
PEG_RXP[0..15] <16>
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PEG_TXN[0..15] <16>
PEG_TXP[0..15] <16>
Processor Compensation Signals
R462 20/F_4 R462 20/F_4
R461 20/F_4 R461 20/F_4
R128 49.9/F_4 R128 49.9/F_4
R459 49.9/F_4 R459 49.9/F_4
H_PECI <11>
H_PROCHOT# <40>
PM_THRMTRIP# <11>
PM_SYNC <8>
H_PWRGOOD <11>
PM_DRAM_PWRGD <8,36>
PLTRST# <10,11,26,28,32,37>
R185 1.5K/F_4 R185 1.5K/F_4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
T52T52
H_CATERR#
H_PROCHOT#
H_CPURST# XDP_TMS
H_VTTPWRGD
T42T42
CPU_PLTRST#
R180
R180
750/F_4
750/F_4
U33B
U33B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
Clarksfield/Aubu rndale
Clarksfield/Aubu rndale
MISC THERMAL
MISC THERMAL
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TMS
TDI
TDO
A16
B16
AR30
AT30
E16
D16
A18
A17
F6
AL1
AM1
AN1
AN15
AP15
AT28
AP27
AN28
AP28
AT27
AT29
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
T38T38
T37T37
T44T44
T48T48
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_PREQ#
XDP_TCLK
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
H_DBR#_R
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
CLK_CPU_BCLK <11>
CLK_CPU_BCLK# <11>
CLK_PCIE_3GPLL <10>
CLK_PCIE_3GPLL# <10>
DPLL_REF_SSCLK <10>
DPLL_REF_SSCLK# <10>
CPU_DDR3_DRAMRST# <36>
R161 100/F_4 R161 100/F_4
R163 24.9/F_4 R163 24.9/F_4
R170 130/F_4 R170 130/F_4
R188 10K_4 R188 10K_4
R179 10K_4 R179 10K_4
T41T41
T67T67
T45T45
T49T49
T68T68
T73T73
T71T71
T72T72
T74T74
R190 *Short_4 R190 *Short_4
T40T40
T43T43
T39T39
T46T46
T51T51
T47T47
T50T50
T53T53
PM_EXTTS#0 <14>
+1.1V_VTT
PM_EXTTS#1 <15>
XDP_DBRST# <8>
Layout Note: Place
these resistors
near Processor
Thermaltri p pr ot e c t
+1.1V_VTT
3
Q15
Q15
PM_THRMTRIP#
2
1 3
FDV301N
FDV301N
1
R189
R189
1K_4
1K_4
2
Q14
Q14
MMBT3904
MMBT3904
SYS_SHDN# <39,48>
4
DELAY_VR_PWRGOOD <8,40>
A A
PM_THRMTRIP# <11>
5
VTT PWR_Good
MPWROK <37>
+3V
C398
C398
0.1u/10V_4
0.1u/10V_4
R187
3 5
4
U15
U15
TC7SH0 8FU
TC7SH0 8FU
R187
2K/F_4
2K/F_4
3
H_VTTPWRGD
R178
R178
1K_4
1K_4
2
1
Processor pull-up
+1.5V_CPUVDDQ
R182
R182
1.1K/F_4
1.1K/F_4
R181
R181
3K/F_4
3K/F_4
XDP_TDO
H_CATERR#
H_PROCHOT#
H_CPURST#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
PM_DRAM_PWRGD
R468 51/F_4 R468 51/F_4
R157 49.9/F_4 R157 49.9/F_4
R460 68_4 R460 68_4
R193 *68_4 R193 *68_4
R192 *51_4 R192 *51_4
R479 *51_4 R479 *51_4
R466 *51_4 R466 *51_4
R183 *51_4 R183 *51_4
R463 51/F_4 R463 51/F_4
Use a voltage divider with VDDQ
(1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
rail with 2K and 1K combination.
+1.1V_VTT
2
JTAG MAPPING
XDP_TDI_R XDP_TDI
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
Scan Chain
(Default)
CPU Only
GMCH Only
R476 0_4 R476 0_4
R475 *0_4 R475 *0_4
R474
R474
0_4
0_4
R473 *0_4 R473 *0_4
R467 0_4 R467 0_4
STUFF -> R469, R491, R507
NO STUFF -> R489, R490
STUFF -> R490, R491
NO STUFF -> R469, R489, R507
STUFF -> R489, R507
NO STUFF -> R491, R490, R469
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 1/4
AUBURNDA 1/4
AUBURNDA 1/4
Date: Sheet
Date: Sheet
Date: Sheet
XDP_TDO
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZR7B
ZR7B
ZR7B
45 0 Friday, March 05, 2010
45 0 Friday, March 05, 2010
45 0 Friday, March 05, 2010
1A
1A
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)
U33C
U33C
M_A_DQ[63:0] <14>
D D
C C
B B
M_A_BS#0 <14>
M_A_BS#1 <14>
M_A_BS#2 <14>
M_A_CAS# <14>
M_A_RAS# <14>
M_A_WE# <14>
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C10
D10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AJ10
AL10
AK12
AK8
AK11
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
AC3
AB2
AE1
AB3
AE9
A10
B10
E10
F10
AJ7
AJ6
AJ9
AL7
AL8
J10
C7
A7
A8
D8
E6
F7
E9
B7
E7
C6
G8
K7
J8
G7
J7
L7
M6
M8
L9
L6
K8
N8
P9
U7
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLK0 <14>
M_A_CLK0# <14>
M_A_CKE0 <14>
M_A_CLK1 <14>
M_A_CLK1# <14>
M_A_CKE1 <14>
M_A_CS#0 <14>
M_A_CS#1 <14>
M_A_ODT0 <14>
M_A_ODT1 <14>
M_A_DM[7:0] <14>
M_A_DQS#[7:0] <14>
M_A_DQS[7:0] <14>
M_A_A[15:0] <14>
3
M_B_DQ[63:0] <15>
M_B_BS#0 <15>
M_B_BS#1 <15>
M_B_BS#2 <15>
M_B_CAS# <15>
M_B_RAS# <15>
M_B_WE# <15>
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AG1
AG4
AG3
AH4
AM6
AN2
AM4
AM3
AN5
AN6
AN4
AN3
AN7
AR10
AT10
AC5
AC6
AF3
AJ3
AK1
AJ4
AK3
AK4
AK5
AK2
AP3
AT4
AT5
AT6
AP6
AP8
AT9
AT7
AP9
AB1
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
W5
R7
Y7
U33D
U33D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
2
W8
SB_CK[0]
W9
SB_CK#[0]
M3
SB_CKE[0]
V7
SB_CK[1]
V6
SB_CK#[1]
M2
SB_CKE[1]
AB8
SB_CS#[0]
AD6
SB_CS#[1]
AC7
SB_ODT[0]
AD1
SB_ODT[1]
M_B_DM0
D4
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
1
M_B_CLK0 <15>
M_B_CLK0# <15>
M_B_CKE0 <15>
M_B_CLK1 <15>
M_B_CLK1# <15>
M_B_CKE1 <15>
M_B_CS#0 <15>
M_B_CS#1 <15>
M_B_ODT0 <15>
M_B_ODT1 <15>
M_B_DM[7:0] <15>
M_B_DQS#[7:0] <15>
M_B_DQS[7:0] <15>
M_B_A[15:0] <15>
Clarksfield/Auburndale
Clarksfield/Auburndale
Channel A DQ[15,32,48,54], DM[5]
Requires minimum 12mils spacing
with all other signals, including data signals.
A A
5
4
http://laptop-motherboard-schematic.blogspot.com/
3
Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.
Clarksfield/Auburndale
Clarksfield/Auburndale
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
AUBURNDA 2/4
AUBURNDA 2/4
AUBURNDA 2/4
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZR7B
ZR7B
ZR7B
55 0 Friday, March 05, 2010
55 0 Friday, March 05, 2010
55 0 Friday, March 05, 2010
of
of
1
of
1A
1A
1A
5
U33F
CPU Core Power
ARD:48A
CFD:52A
C346 22U/6.3V_8 C346 22U/6.3V_8
C684 22U/6.3V_8 C684 22U/6.3V_8
C350 22U/6.3V_8 C350 22U/6.3V_8
D D
C C
B B
A A
C303 22U/6.3V_8 C303 22U/6.3V_8
C672 22U/6.3V_8 C672 22U/6.3V_8
C677 22U/6.3V_8 C677 22U/6.3V_8
C674 22U/6.3V_8 C674 22U/6.3V_8
C384 22U/6.3V_8 C384 22U/6.3V_8
C354 22U/6.3V_8 C354 22U/6.3V_8
C668 22U/6.3V_8 C668 22U/6.3V_8
C311 22U/6.3V_8 C311 22U/6.3V_8
C366 22U/6.3V_8 C366 22U/6.3V_8
C334 10U/6.3V_8 C334 10U/6.3V_8
C336 10U/6.3V_8 C336 10U/6.3V_8
C322 10U/6.3V_8 C322 10U/6.3V_8
C675 10U/6.3V_8 C675 10U/6.3V_8
C666 10U/6.3V_8 C666 10U/6.3V_8
C682 10U/6.3V_8 C682 10U/6.3V_8
C678 10U/6.3V_8 C678 10U/6.3V_8
C388 10U/6.3V_8 C388 10U/6.3V_8
C669 10U/6.3V_8 C669 10U/6.3V_8
C356 10U/6.3V_8 C356 10U/6.3V_8
C357 10U/6.3V_8 C357 10U/6.3V_8
C320 10U/6.3V_8 C320 10U/6.3V_8
C671 10U/6.3V_8 C671 10U/6.3V_8
C323 10U/6.3V_8 C323 10U/6.3V_8
C314 10U/6.3V_8 C314 10U/6.3V_8
C681 10U/6.3V_8 C681 10U/6.3V_8
C344 0.1u/10V_4_X7R C344 0.1u/10V_4_X7R
C309 0.1u/10V_4_X7R C309 0.1u/10V_4_X7R
C313 330u/2V_7343
C313 330u/2V_7343
C339 330u/2V_7343
C339 330u/2V_7343
+VCC_CORE
+
+
+
+
U33F
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
Clarksfield/Auburndale
Clarksfield/Auburndale
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)
5
4
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VTT_SELECT
VSS_SENSE_VTT
SENSE LINES
SENSE LINES
4
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
H_PSI#
AN33
PSI#
H_VID0
AK35
H_VID1
AK33
H_VID2
AK34
H_VID3
AL35
H_VID4
AL33
H_VID5
AM33
H_VID6
AM35
H_DPRSLPVR
AM34
H_VTTVID1
G15
H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V
AN35
AJ34
AJ35
VTT_SENSE
B15
VSS_SENSE_VTT
A15
C679 10U/6.3V_8 C679 10U/6.3V_8
C676 10U/6.3V_8 C676 10U/6.3V_8
C662 10U/6.3V_8 C662 10U/6.3V_8
C362 10U/6.3V_8 C362 10U/6.3V_8
C683 10U/6.3V_8 C683 10U/6.3V_8
C664 10U/6.3V_8 C664 10U/6.3V_8
C663 10U/6.3V_8 C663 10U/6.3V_8
C685 22U/6.3V_8 C685 22U/6.3V_8
C633 22U/6.3V_8 C633 22U/6.3V_8
C326 22U/6.3V_8 C326 22U/6.3V_8
C306
C306
+
+
330u/2V_7343
330u/2V_7343
C294 22U/6.3V_8 C294 22U/6.3V_8
C295 22U/6.3V_8 C295 22U/6.3V_8
R159 100/F_4 R159 100/F_4
R160 100/F_4 R160 100/F_4
VTT Rail Values are
Auburndal VTT=1.05V
Clarksfield VTT=1.1V
18A
+1.1V_VTT
+1.1V_VTT
H_PSI# <40>
H_VID0 <40>
H_VID1 <40>
H_VID2 <40>
H_VID3 <40>
H_VID4 <40>
H_VID5 <40>
H_VID6 <40>
H_DPRSLPVR <40>
T36T36
I_MON <40>
+VCC_CORE
VCCSENSE <40>
VSSSENSE <40>
T65T65
T64T64
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)
U33G
22A
+VGFX_AXG
+
+
C692
C692
330U/2V_7343
330U/2V_7343
+
+
C691
C691
330U/2V_7343
330U/2V_7343
+1.1V_VTT
C345
C345
22u/6.3V_8
22u/6.3V_8
3
C359
C359
C358
C358
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
C361
C670
C670
22u/6.3V_8
22u/6.3V_8
C296
C296
22u/6.3V_8
22u/6.3V_8
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_DPRSLPVR
H_PSI#
C361
10u/6.3V_8
10u/6.3V_8
C335
C335
22u/6.3V_8
22u/6.3V_8
R478 1K_4 R478 1K_4
R477 *1K/F_4 R477 *1K/F_4
R481 1K_4 R481 1K_4
R480 *1K/F_4 R480 *1K/F_4
R197 1K_4 R197 1K_4
R196 *1K/F_4 R196 *1K/F_4
R472 *1K/F_4 R472 *1K/F_4
R471 1K_4 R471 1K_4
R195 *1K/F_4 R195 *1K/F_4
R194 1K_4 R194 1K_4
R465 1K_4 R465 1K_4
R458 *1K/F_4 R458 *1K/F_4
R470 *1K/F_4 R470 *1K/F_4
R469 1K_4 R469 1K_4
R202 1K_4 R202 1K_4
R201 *1K/F_4 R201 *1K/F_4
R464 *1K/F_4 R464 *1K/F_4
R457 1K_4 R457 1K_4
C360
C360
10u/6.3V_8
10u/6.3V_8
C297
C297
22u/6.3V_8
22u/6.3V_8
C673
C673
22u/6.3V_8
22u/6.3V_8
1
1
1
0
0
1
0
1
0
Note:
For Validating IMVP VR R6451 should be STUFF
and R2N1 NO_STUFF
U33G
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
J24
VTT1_45
J23
VTT1_46
H25
VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51
H27
VTT1_52
G28
VTT1_53
G27
VTT1_54
G26
VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
Clarksfield/Auburndale
Clarksfield/Auburndale
HFM_VID : Max 1.4V
LFM_VID : Min 0.65V
2
GRAPHICS
GRAPHICS
FDI PEG & DMI
FDI PEG & DMI
+1.1V_VTT
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
GRAPHICS VIDs
GRAPHICS VIDs
POWER
POWER
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT1_63
VTT1_64
VTT1_65
1.1V 1.8V
1.1V 1.8V
VTT1_66
VTT1_67
VTT1_68
VCCPLL1
VCCPLL2
VCCPLL3
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
J22
J20
J18
H21
H20
H19
L26
L27
M26
T69T69
T70T70
C665 10U/6.3V_8 C665 10U/6.3V_8
C667 10U/6.3V_8 C667 10U/6.3V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 3/4 (PWR)
AUBURNDA 3/4 (PWR)
AUBURNDA 3/4 (PWR)
Date: Sheet
Date: Sheet
Date: Sheet
C368
C368
1U/6.3V_4
1U/6.3V_4
C372
C372
1U/6.3V_4
1U/6.3V_4
VCC_AXG_SENSE <46>
VSS_AXG_SENSE <46>
GFX_VID0 <46>
GFX_VID1 <46>
GFX_VID2 <46>
GFX_VID3 <46>
GFX_VID4 <46>
GFX_VID5 <46>
GFX_VID6 <46>
GFX_ON <46>
GFX_DPRSLPVR <46>
GFX_IMON <46>
ARD:3A
CFD:6A
C373
C307
C307
1U/6.3V_4
1U/6.3V_4
C312
C312
22U/6.3V_8
22U/6.3V_8
C373
1U/6.3V_4
1U/6.3V_4
ZR7B
ZR7B
ZR7B
C301
C301
1U/6.3V_4
1U/6.3V_4
C363
C363
22U/6.3V_8
22U/6.3V_8
+1.1V_VTT
C660 22U/6.3V_8 C660 22U/6.3V_8
C661 22U/6.3V_8 C661 22U/6.3V_8
0.6A
+1.8V
C298 22U/6.3V_8 C298 22U/6.3V_8
C299 4.7U/6.3V_6 C299 4.7U/6.3V_6
C272 2.2U/6.3V_6 C272 2.2U/6.3V_6
C274 1U/6.3V_4 C274 1U/6.3V_4
C273 1U/6.3V_4 C273 1U/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
+
+
C310
C310
330U/2V_7343
330U/2V_7343
65 0 Friday, March 05, 2010
65 0 Friday, March 05, 2010
65 0 Friday, March 05, 2010
+1.5V_CPUVDDQ
of
of
of
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U33E
U33H
U33H
AT20
VSS1
AT17
VSS2
AR31
VSS3
AR28
VSS4
AR26
VSS5
AR24
VSS6
AR23
VSS7
AR20
VSS8
AR17
VSS9
AR15
VSS10
D D
C C
B B
AR12
VSS11
AR9
VSS12
AR6
VSS13
AR3
VSS14
AP20
VSS15
AP17
VSS16
AP13
VSS17
AP10
VSS18
AP7
VSS19
AP4
VSS20
AP2
VSS21
AN34
VSS22
AN31
VSS23
AN23
VSS24
AN20
VSS25
AN17
VSS26
AM29
VSS27
AM27
VSS28
AM25
VSS29
AM20
VSS30
AM17
VSS31
AM14
VSS32
AM11
VSS33
AM8
VSS34
AM5
VSS35
AM2
VSS36
AL34
VSS37
AL31
VSS38
AL23
VSS39
AL20
VSS40
AL17
VSS41
AL12
VSS42
AL9
VSS43
AL6
VSS44
AL3
VSS45
AK29
VSS46
AK27
VSS47
AK25
VSS48
AK20
VSS49
AK17
VSS50
AJ31
VSS51
AJ23
VSS52
AJ20
VSS53
AJ17
VSS54
AJ14
VSS55
AJ11
VSS56
AJ8
VSS57
AJ5
VSS58
AJ2
VSS59
AH35
VSS60
AH34
VSS61
AH33
VSS62
AH32
VSS63
AH31
VSS64
AH30
VSS65
AH29
VSS66
AH28
VSS67
AH27
VSS68
AH26
VSS69
AH20
VSS70
AH17
VSS71
AH13
VSS72
AH9
VSS73
AH6
VSS74
AH3
VSS75
AG10
VSS76
AF8
VSS77
AF4
VSS78
AF2
VSS79
AE35
VSS80
Clarksfield/Auburndale
Clarksfield/Auburndale
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
U33I
U33I
K27
VSS161
K9
VSS162
K6
VSS163
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
Clarksfield/Auburndale
Clarksfield/Auburndale
VSS
VSS
NCTF
NCTF
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
VREF_DQ_DIMM0 <14,36>
VREF_DQ_DIMM1 <15,36>
CFG0
CFG3
CFG4
CFG7
TP5TP5
TP2TP2
TP3TP3
TP33TP33
TP34TP34
Processor Strapping
CFG0
10
(PCI-Epress
Configuration Select)
CFG3
(PCI-Epress Static
Lane Reversal)
A A
5
CFG4
(Embended
Display Port Presence)
7
V
K
,
S
H
D
Q
H
F
Q
W
F
&
R
G
H
L
O
P
O
I
D
S
%
L
U
R
*
U
F
N
Single PEG
Bifurcation enabled
Normal Operation Lane Numbers Reversed
Disabled; No Physical Display Port
attached to Embedded Diplay Port
4
http://laptop-motherboard-schematic.blogspot.com/
Enabled; An external Display port
device is connected to the Embedded
Display port
3
DEFAULT
1
1
1
U33E
AP25
RSVD1
AL25
RSVD2
AL24
RSVD3
AL22
RSVD4
AJ33
RSVD5
AG9
RSVD6
M27
RSVD7
L28
RSVD8
J17
SA_DIMM_VREF
H17
SB_DIMM_VREF
G25
RSVD11
G17
RSVD12
E31
RSVD13
E30
RSVD14
AM30
CFG[0]
AM28
CFG[1]
AP31
CFG[2]
AL32
CFG[3]
AL30
CFG[4]
AM31
CFG[5]
AN29
CFG[6]
AM32
CFG[7]
AK32
CFG[8]
AK31
CFG[9]
AK28
CFG[10]
AJ28
CFG[11]
AN30
CFG[12]
AN32
CFG[13]
AJ32
CFG[14]
AJ29
CFG[15]
AJ30
CFG[16]
AK30
CFG[17]
H16
RSVD_TP_86
B19
RSVD15
A19
RSVD16
A20
RSVD17
B20
RSVD18
U9
RSVD19
T9
RSVD20
AC9
RSVD21
AB9
RSVD22
C1
RSVD_NCTF_23
A3
RSVD_NCTF_24
J29
RSVD26
J28
RSVD27
A34
RSVD_NCTF_28
A33
RSVD_NCTF_29
C35
RSVD_NCTF_30
B35
RSVD_NCTF_31
Clarksfield/Auburndale
Clarksfield/Auburndale
CFG0
R186 *3.01K_NC R186 *3.01K_NC
CFG3
R169 3.01K/F_4 R169 3.01K/F_4
CFG4
R162 *3.01K R162 *3.01K
CFG7
R172 *3.01K/F_4 R172 *3.01K/F_4
AJ13
RSVD32
AJ12
RSVD33
AH25
RSVD34
AK26
RSVD35
AL26
RSVD36
RSVD_NCTF_37
RSVD_NCTF_40
RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD_TP_59
RSVD_TP_60
RESERVED
RESERVED
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
2
AR2
AJ26
RSVD38
AJ27
RSVD39
AP1
AT2
AT3
AR1
AL28
RSVD45
AL29
RSVD46
AP30
RSVD47
AP32
RSVD48
AL27
RSVD49
AT31
RSVD50
AT32
RSVD51
AP33
RSVD52
AR33
RSVD53
AT33
AT34
AP35
AR35
AR32
RSVD58
E15
F15
A2
KEY
D15
RSVD62
C15
RSVD63
AJ15
RSVD64
RSVD65
VSS
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet
Date: Sheet
Date: Sheet
TP6TP6
AH15
TP7TP7
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
TP4TP4
AP34 can be NC on CRB; EDS/DG suggestion to GND
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
AUBURNDA 4/4
AUBURNDA 4/4
AUBURNDA 4/4
1
ZR7B
ZR7B
ZR7B
75 0 Friday, March 05, 2010
75 0 Friday, March 05, 2010
75 0 Friday, March 05, 2010
1A
1A
1A
of
of
of
5
4
3
2
1
IBEX PEAK-M (DMI,FDI,GPIO)
U36C
U36C
ACIN_R
PM_BATLOW#
PM_RI#
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_DN_ACK / GPIO30
P5
PWRBTN#
P7
ACPRESENT / GPIO31
A6
BATLOW# / GPIO72
F14
RI#
IbexPeak-M_R1P0
IbexPeak-M_R1P0
DMI
FDI
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
DMI_RXN0 <4>
SYS_PWROK
ICH_RSMRST# <37>
DNBSWON# <37>
PCH_ACIN <37>
DMI_RXN1 <4>
DMI_RXN2 <4>
DMI_RXN3 <4>
DMI_RXP0 <4>
DMI_RXP1 <4>
DMI_RXP2 <4>
DMI_RXP3 <4>
DMI_TXN0 <4>
DMI_TXN1 <4>
DMI_TXN2 <4>
DMI_TXN3 <4>
DMI_TXP0 <4>
DMI_TXP1 <4>
DMI_TXP2 <4>
DMI_TXP3 <4>
+1.05V
R483 49.9/F_4 R483 49.9/F_4
XDP_DBRST#
RSV_ICH_LAN_RST#
SUS_PWR_ACK_R
R269 *0_4 R269 *0_4
D D
C C
XDP_DBRST# <4>
PM_DRAM_PWRGD <4,36>
B B
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
SLP_S4#
SLP_S3#
SLP_M#
TP23
PMSYNCH
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
BJ14
BF13
BH13
BJ12
BG14
J12
Y1
P8
F3
E4
H7
P12
K8
N2
BJ10
F6
SUS_STAT#
R401 *Short_4 R401 *Short_4
SLP_S5#_R
SLP_M#
PM_SLP_LAN#
R278 *0_4 R278 *0_4
TP14TP14
TP27TP27
TP23TP23
TP29TP29
FDI_TXN0 <4>
FDI_TXN1 <4>
FDI_TXN2 <4>
FDI_TXN3 <4>
FDI_TXN4 <4>
FDI_TXN5 <4>
FDI_TXN6 <4>
FDI_TXN7 <4>
FDI_TXP0 <4>
FDI_TXP1 <4>
FDI_TXP2 <4>
FDI_TXP3 <4>
FDI_TXP4 <4>
FDI_TXP5 <4>
FDI_TXP6 <4>
FDI_TXP7 <4>
FDI_INT <4>
FDI_FSYNC0 <4>
FDI_FSYNC1 <4>
FDI_LSYNC0 <4>
FDI_LSYNC1 <4>
PCIE_WAKE# <26,28>
CLKRUN# <37>
ICH_SUSCLK <37>
SUSC# <37>
SUSB# <37>
PM_SYNC <4>
INT_LVDS_BLON <24>
INT_LVDS_DIGON <24>
INT_LVDS_BRIGHT <24>
INT_LVDS_EDIDCLK <24>
INT_LVDS_EDIDDATA <24>
INT_TXLCLKOUT- <24>
INT_TXLCLKOUT+ <24>
INT_TXLOUT0- <24>
INT_TXLOUT1- <24>
INT_TXLOUT2- <24>
INT_CRT_BLU <24>
INT_CRT_GRN <24>
INT_CRT_RED <24>
INT_CRT_DDCCLK <24>
INT_CRT_DDCDAT <24>
INT_HSYNC <24>
INT_VSYNC <24>
+3V
INT_TXLOUT0+ <24>
INT_TXLOUT1+ <24>
INT_TXLOUT2+ <24>
R254 10K_4 R254 10K_4
R258 10K_4 R258 10K_4
R233 2.37K/F_4 R233 2.37K/F_4
INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
DAC_IREF
R243
R243
1K/F_4
1K/F_4
IBEX PEAK-M (LVDS,DDI)
U36D
U36D
AB48
AB46
AP39
AP41
AT43
AT42
AV53
AV51
BB47
BA52
AY48
AV47
BB48
BA50
AY49
AV48
AP48
AP47
AY53
AT49
AU52
AT53
AY51
AT48
AU50
AT51
AA52
AB53
AD53
AD48
AB51
T48
T47
Y48
Y45
V48
V51
V53
Y53
Y51
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
IbexPeak-M_R1P0
IbexPeak-M_R1P0
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT
CRT
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46
BG46
BJ48
BG48
BF45
BH45
T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
TP36TP36
TP35TP35
INT_HDMITX2N_R
INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R
SDVO_CTRLCLK <25>
SDVO_CTRLDAT <25>
C411 0.1u/10V_4_X7R C411 0.1u/10V_4_X7R
C412 0.1u/10V_4_X7R C412 0.1u/10V_4_X7R
C414 0.1u/10V_4_X7R C414 0.1u/10V_4_X7R
C413 0.1u/10V_4_X7R C413 0.1u/10V_4_X7R
C442 0.1u/10V_4_X7R C442 0.1u/10V_4_X7R
C443 0.1u/10V_4_X7R C443 0.1u/10V_4_X7R
C432 0.1u/10V_4_X7R C432 0.1u/10V_4_X7R
C431 0.1u/10V_4_X7R C431 0.1u/10V_4_X7R
R place close to PCH
R507 150_4 R507 150_4
R499 150_4 R499 150_4
R495 150_4 R495 150_4
INT_HDMI_HPD <25>
INT_HDMITX2N < 25>
INT_HDMITX2P <25>
INT_HDMITX1N < 25>
INT_HDMITX1P <25>
INT_HDMITX0N < 25>
INT_HDMITX0P <25>
INT_HDMICLK- <25>
INT_HDMICLK+ <25>
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
PCH Pull-high/low System PWR_OK
+3V
CLKRUN#
A A
XDP_DBRST#
ICH_RSMRST#
RSV_ICH_LAN_RST#
SYS_PWROK ACIN_R
R498 8.2K_4 R498 8.2K_4
R275 1K_4 R275 1K_4
R560 10K_4 R560 10K_4
R572 10K_4 R572 10K_4
R582 10K_4 R582 10K_4
5
PM_RI#
PM_BATLOW#
PCIE_WAKE#
PM_SLP_LAN#
SUS_PWR_ACK_R
R296 10K_4 R296 10K_4
R541 10K_4 R541 10K_4
R287 1K_4 R287 1K_4
R292 *10K_4 R292 *10K_4
R530 10K_4 R530 10K_4
R270 10K_4 R270 10K_4
+3V_S5
4
3
C805 *.1u_4 C805 *.1u_4
SYS_PWROK
U41
U41
TC7SH08FU
TC7SH08FU
+3V_S5
'(/$<B95B3:5*22'QHHG38.WR9
38DWSRZHUVLGH
5 3
1
4
2
R605 100K_4 R605 100K_4
DELAY_VR_PWRGOOD <4,40>
PWROK_EC <37>
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 1/6
IBEX PEAK-M 1/6
IBEX PEAK-M 1/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZR7B
ZR7B
ZR7B
85 0 Friday, March 05, 2010
85 0 Friday, March 05, 2010
85 0 Friday, March 05, 2010
of
of
1
of
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
5
RTC Circuitry
+VCCRTC
CR1
+3VPCU
VCCRTC_1
D D
R592
R592
1K_4
1K_4
VCCRTC_2
BT1
BT1
1
1
2
2
RTC_CONN
RTC_CONN
CR1
BAT54C
BAT54C
1 3
2
RTC_N01
Q44
Q44
*MMBT3904
*MMBT3904
RTC_N03
R586 20K/F_4 R586 20K/F_4
R326 20K/F_4 R326 20K/F_4
C798
C798
1u/10V_4
1u/10V_4
R601 *22K_6 R601 *22K_6
C796
C796
1u/10V_4
1u/10V_4
C781
C781
1u/10V_4
1u/10V_4
R600
R600
*68.1K/F_4
*68.1K/F_4
R591
R591
*150K/F_6
*150K/F_6
RTC_RST#
1 2
J1
J1
*SHORT_ PAD1
*SHORT_ PAD1
SRTC_RST#
1 2
J2
J2
*SHORT_ PAD1
*SHORT_ PAD1
+5V_S5
HDA Bus
C C
PCH_AZ_CODEC_SYNC <30>
PCH_AZ_CODEC_RST# <30>
PCH_AZ_CODEC_SDOUT <30>
PCH_AZ_CODEC_BITCLK <30>
R563 33_4 R563 33_4
R569 33_4 R569 33_4
R568 33_4 R568 33_4
R564 33_4 R564 33_4
C787
C787
*27p_4
*27p_4
ACZ_SYNC ACZ_SYNC
ACZ_RST#
ACZ_SDOUT ACZ_SDOUT
ACZ_BIT_CLK ACZ_BIT_CLK
4
HDA_SYNC (PCH strap pin)
Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V
+VCCRTC
PCH_AZ_CODEC_SDIN0 <30>
+3V_S5
HDMI_HPD_PCH# <25>
C786
C786
15p/50V_4
15p/50V_4
2 3
Y6
32.768KHZY632.768KHZ
4 1
C785
C785
15p/50V_4
15p/50V_4
R573 1M_4 R573 1M_4
ACZ_BIT_CLK
ACZ_SYNC
SPKR <30>
ACZ_RST#
R562 *10K_4 R562 *10K_4
R485 *10K_4 R485 *10K_4
+3VPCU
3
R557
TP20TP20
R557
10M_4
10M_4
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
SPKR
ACZ_SDOUT
PCH_GPIO33
RTC_X1
RTC_X2
PCH_GPIO13
SPI_CLK_R
SPI_CS0#_R
SPI_CS1#
SPI_SI_R
SPI_SO_R
U36A
U36A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IbexPeak-M_R1P0
IbexPeak-M_R1P0
RTC IHDA
RTC IHDA
SPI JTAG
SPI JTAG
FWH4 / LFRAME#
LDRQ1# / GPIO23
LPC
LPC
SATA
SATA
SATA0GP / GPIO21
SATA1GP / GPIO19
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LDRQ0#
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
2
D33
B33
C32
A32
C34
A34
F34
AB9
SATA_RXN0_C
AK7
SATA_RXP0_C
AK6
AK11
AK9
SATA_RXN1_C
AH6
SATA_RXP1_C
AH5
AH9
AH8
AF11
AF9
AF7
Note:
AF6
SATA port2/3 may not be available on all PCH sku
AH3
(HM55 support 3 port only)
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
R245 37.4/F_4 R245 37.4/F_4
AF15
T3
Y9
V1
R253 10K_4 R253 10K_4
R263 43K/F_4 R263 43K/F_4
R505 43K/F_4 R505 43K/F_4
+1.05V
SATA_ACT# <33>
PCH_ODD_EN <29>
+3V
+3V
+3V
LPC_LAD0 <28,37>
LPC_LAD1 <28,37>
LPC_LAD2 <28,37>
LPC_LAD3 <28,37>
LPC_LFRAME# <28,37>
IRQ_SERIRQ <37>
SATA_RXN0_C <29>
SATA_RXP0_C <29>
SATA_TXN0 <29>
SATA_TXP0 <29>
SATA_RXN1_C <29>
SATA_RXP1_C <29>
SATA_TXN1 <29>
SATA_TXP1 <29>
1
3&+6WUDS3LQ&RQILJXUDWLRQ7DEOH
INTVRMEN
SPI_MOSI
PCH SPI
B B
SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO_R
R518 3.3K/F_4 R518 3.3K/F_4
+3V
U37
U37
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q32BVSSIG
W25Q32BVSSIG
HOLD#
VDD
VSS
8
R523 3.3K/F_4 R523 3.3K/F_4
7
4
+3V
C741
C741
.1u/10V_4
.1u/10V_4
SPKR
HDA_DOCK_EN
#/GPIO33
GNT0#,
GNT1#
GNT2#/
GPIO53
GNT3#/
GPIO55
NV_ALE
NV_CLE
Integrated 1.05V VRM Enable /
Disable
TPM Function ality
Disable
Reboot option at power-up 0 = Default Mode (Internal weak Pull-down)
Flash Descriptor
Security Override
Boot BIOS Strap
ESI Strap
(Server Only)
Top-Block
Swap Override
IntelR Anti-Theft Technology
HDD Data Protection
(Intel AT-d) Enable
DMI Termination
Voltage
1 = Integrated VRM is enabled
1 = Enabled
0 = Disable
1 = No Reboot Mode with TCO Disabled
0 = Flash Descriptor Security will be overridden
1 = Security measure defined in the Flash
Descriptor will be enabled.
(0,0) = LPC (0,1) = Reserved NAND
(1,0) = PCI (1,1) = SPI
ESI compatible mode is for server
platforms only
0 = Top Block Swap Mode
1 = Default Mode (Internal pull-up)
1 = Enabled
0 = Disabled (Default)
DMI termination voltage. Weak
internal pull-up. Do not pull low.
0 = Integrated VRM is disabled
PCI_GNT0# <10>
PCI_GNT1# <10>
+VCCRTC
+3V
+3V
PCH_GPIO33
PWM_SELECT# <10,24>
PCI_GNT3# <10>
NV_ALE <10>
NV_CLE <10>
R593 330K_6 R593 330K_6
R529 *1K_4 R529 *1K_4
R522 *1K/F_4 R522 *1K/F_4
R286 *1K/F_4 R286 *1K/F_4
R293 *10K_4 R293 *10K_4
R455 1K_4 R455 1K_4
R612 1K_4 R612 1K_4
R282 *1K_4 R282 *1K_4
R285 *1K_4 R285 *1K_4
R289 *1K/F_4 R289 *1K/F_4
R528 *10K/F_4 R528 *10K/F_4
R225 *1K/F_4 R225 *1K/F_4
R224 *1K/F_4 R224 *1K/F_4
PCH_INVRMEN
SPI_SI_R
SPKR
+3V
+3V
+1.8V
+1.8V
GPIO8
A A
GPIO15
GPIO27
5
4
Reserved This signal has a weak internal pull up.
Reserved
On-Die PLL Voltage
Regulator
<internal weak pull-up>
http://laptop-motherboard-schematic.blogspot.com/
NOTE: This signal should not be pulled low
0 = Intel ME Crypto Transport Layer Security
(TLS) cipher suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security
(TLS) cipher suite with confidentiality
0 = Disables the VccVRM.
1 = Enables the internal VccVRM to have
a clean supply for analog rails.
3
RSV_GPIO8 <11>
CR_WAKE# <11>
PCH_GPIO27 <11>
R302 10K_4 R302 10K_4
R295 *1K_4 R295 *1K_4
R266 1K_4 R266 1K_4
R247 *10K_4 R247 *10K_4
+3V_S5
+3V_S5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 2/6
IBEX PEAK-M 2/6
IBEX PEAK-M 2/6
Date: Sheet
Date: Sheet
2
Date: Sheet
PROJECT :
ZR7B
ZR7B
ZR7B
95 0 Friday, March 05, 2010
95 0 Friday, March 05, 2010
1
95 0 Friday, March 05, 2010
1A
1A
1A
of
of
of
5
U36E
U36E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
D D
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
TP25TP25
TP21TP21
R516 22_4 R516 22_4
TP22TP22
R281 22_4 R281 22_4
R277 22_4 R277 22_4
PCI_RE Q0#
PCI_RE Q1#
dGPU_SELECT#
PCI_RE Q3#
PCI_GNT 0#
PCI_GNT 1#
PWM_SELECT#
PCI_GNT 3#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_RS T#
PCI_SERR#
PCI_PER R#
PCI_IRDY#
PCI_PAR
PCI_DE VSEL#
PCI_FRAME#
PCI_PLO CK#
PCI_STOP#
PCI_TRDY#
ICH_PME#
PCI_PLTR ST#
CLK_LPC_DEBUG_C
CLK_PCI_PCCARD
CLK_PCI_775_C CLK_PCI_775_C
C C
B B
dGPU_SELECT# <24>
PCI_GNT 0# <9>
PCI_GNT 1# <9>
PWM_SELECT# <9,24>
PCI_GNT 3# <9>
PCI_RS T# <28>
CLK_LPC_DEBUG <28>
CLK_PCI_775 <37>
CLK_PCI_FB CLK_PCI_FB_C
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1# / GPIO50
B45
REQ2# / GPIO52
M53
REQ3# / GPIO54
F48
GNT0#
K45
GNT1# / GPIO51
F36
GNT2# / GPIO53
H53
GNT3# / GPIO55
B41
PIRQE# / GPIO2
K53
PIRQF# / GPIO3
A36
PIRQG# / GPIO4
A48
PIRQH# / GPIO5
K6
PCIRST #
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCI4
IbexPeak-M_R1P0
IbexPeak-M_R1P0
PCI
PCI
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NVRAM
NVRAM
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USB
USB
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
AY9
BD1
AP15
BD8
AV9
BG8
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
AY6
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
D25
N16
J16
F16
L16
E14
G16
F12
T15
4
NV_ALE
NV_CLE
NV_RCOMP
Port1 and port9 can be used on debug mo de
TP31TP31
TP19TP19
TP15TP15
TP13TP13
USB port6/7 may not be available on all PCH sku
(HM55 support 12port only)
USB_BIAS
R561 22.6/F_4 R561 22.6/F_4
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4_5#
USB_OC6#
USB_OC7#
NV_ALE <9>
NV_CLE <9 >
USBP1- <34>
USBP1+ <34>
USBP3- <34>
USBP3+ <34>
USBP4- <34>
USBP4+ <34>
USBP5- <28>
USBP5+ <28>
USBP8- <24>
USBP8+ <24>
USBP9- <34>
USBP9+ <34>
USBP10- <28>
USBP10+ <28>
USBP11- <34>
USBP11+ <34>
USBP12- <32>
USBP12+ <32>
USBP13- <28>
USBP13+ <28>
TP26TP26
TP16TP16
TP30TP30
TP17TP17
TP28TP28
TP32TP32
MB USB
USB/B-USB1-3
BLUETOOTH
Camera
USB/B-USB1-2
Mini Card (3G)
USB/B-USB1-1
Card Reader
Mini Card (WLAN)
USB_OC0# <34>
USB_OC1# <34>
USB_OC4_5# <34>
EHCI1
EHCI2
3
PCIE_R X1- <26>
PCIE_R X1+ <26>
PCIE_TX1- <26>
PCIE_TX1+ <26>
PCIE_R X2- <28>
PCIE_R X2+ <28>
PCIE_TX2- <28>
PCIE_TX2+ <28>
PCIE_R X6- <28>
PCIE_R X6+ <28>
PCIE_TX6- <28>
PCIE_TX6+ <28>
CLK_PCH_SRC1# <28>
CLK_PCH_SRC1 <28>
CLKREQ_3G# <28>
CLK_PCH_SRC2# <28>
CLK_PCH_SRC2 <28>
PCIE_CLK_REQ2# <28>
CLK_PCIE_LOM# <26>
CLK_PCIE_LOM <26>
CLK_PCIE_LAN_REQ# <26>
C704 0.1u/10V_4_X7R C704 0.1u/10V_4_X7R
C705 0.1u/10V_4_X7R C705 0.1u/10V_4_X7R
C439 0.1u/10V_4_X7R C439 0.1u/10V_4_X7R
C438 0.1u/10V_4_X7R C438 0.1u/10V_4_X7R
C441 0.1u/10V_4_X7R C441 0.1u/10V_4_X7R
C440 0.1u/10V_4_X7R C440 0.1u/10V_4_X7R
R503 *Short_4 R503 *Short_4
CLK_PCIE_REQ2#_R
R526 *Short_4 R526 *Short_4
R501 *Short_4 R501 *Short_4
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#_R
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
PCIE_CLK_REQB#
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_C
PCIE_TXP2_C
PCIE_TXN6_C
PCIE_TXP6_C
BG30
BF29
BH29
AW30
BA30
BC30
BD30
AU30
AT30
AU32
AV32
BA32
BB32
BD32
BE32
BF33
BH33
BG32
BA34
AW34
BC34
BD34
AT34
AU34
AU36
AV36
BG34
BG36
AK48
AK47
AM43
AM45
AM47
AM48
AH42
AH41
AM51
AM53
AK53
AK51
BJ30
BJ32
BJ34
BJ36
U4
N4
A8
M9
AJ50
AJ52
H6
P13
U36B
U36B
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
P9
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3# / GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
IbexPeak-M_R1P0
IbexPeak-M_R1P0
2
PCI-E*
PCI-E*
SMBALERT# / GPIO11
SMBDATA
SML0ALERT# / GPIO60
SML0CLK
SML0DATA
SML1ALERT# / GPIO74
SMBus
SMBus
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
Controller
Controller
PEG
PEG
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
From CLK BUFFER
From CLK BUFFER
Clock Flex
Clock Flex
CL_DATA1
CL_RST1#
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
SMBCLK
CL_CLK1
B9
H14
C8
J14
C6
G8
M14
E10
G12
CL_CLK1
T13
CL_DATA1
T11
CL_RST1#
T9
PEG_CLKREQ#_R
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
J42
AH51
AH53
XCLK_RCOMP
AF38
T45
P43
T42
N50
RSV_SMBALERT#
ICH_SMBCLK
ICH_SMBDATA
RSV_SML0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0
RSV_SML1ALERT#
SMB_CLK_ME1
SMB_DATA_ME1
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
R238 90.9/F_4 R238 90.9/F_4
BOARD_ID1
BOARD_ID2
BOARD_ID3
R271 10K_4 R271 10K_4
R261 *0_4 R261 *0_4
R531 *0_4 R531 *0_4 R486 *32.4/F_4 R486 * 32.4/F_4
1
ICH_SMBCLK <3>
ICH_SMBDATA <3>
SMB_CLK_ME0 <26>
SMB_DATA_ME0 <26>
SML1ALERT# <11,35, 37>
CL_CLK1 <28>
CL_DATA1 <28>
CL_RST1# <28>
PEG_CLKREQ# <17>
CLK_PCIE_VGA# <16>
CLK_PCIE_VGA <16>
CLK_PCIE_3GPLL# <4>
CLK_PCIE_3GPLL <4>
DPLL_REF_SSCLK# <4>
DPLL_REF_SSCLK <4>
CLK_BUF_PCIE_3GPLL# <3>
CLK_BUF_PCIE_3GPLL <3>
CLK_BUF_BCLK# <3>
CLK_BUF_BCLK <3>
CLK_BUF_DREFCLK# <3>
CLK_BUF_DREFCLK <3>
CLK_BUF_DREFSSCLK# <3>
CLK_BUF_DREFSSCLK <3>
CLK_ICH_14M <3>
+1.05V
dGPU_EDIDSEL# <24>
+3V
R492
R492
1M_4
1M_4
C722 18p/50V_4 C722 18p/50V_4
1 2
Y4
25MHzY425MHz
C726 18p/50V_4 C726 18p/50V_4
+3V_S5
R276 10K_4 R276 10K_4
R543 10K_4 R543 10K_4
R280 10K_4 R280 10K_4
R283 10K_4 R283 10K_4 R633 *10K_4 R633 *10K_4
R510 10K_4 R510 10K_4
R535 IV@10K_4R535 IV@10K_4
+3V
R504 10K_4 R504 10K_4
+3V
R294 10K_4 R294 10K_4
R304 8.2K_4 R304 8.2K_4
R272 8.2K_4 R272 8.2K_4
R580 8.2K_4 R580 8.2K_4
R576 10K_4 R576 10K_4
R533 SW@10K/F_4R533 SW@10K/F_4
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
PCIE_CLK_REQB#
PEG_CLKREQ#_R
CLK_PCIE_REQ1#_R
dGPU_SELECT#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCIE_CLK_REQ2#
PEG_CLKREQ#_R
3
RP1
USB_OC7#
USB_OC6#
+3V_S5
C507
C507
.1u/10V_4
.1u/10V_4
PCI_PLTRST#
2
4
A A
1
U18
U18
3 5
TC7SH08FU
TC7SH08FU
R312 *0_4 R312 *0_4
5
R313
R313
100K_4
100K_4
PLTRST# <4,11,26,28,32,37>
USB_OC4_5#
+3V_S5
PCI_PIRQD#
PCI_RE Q1#
PCI_FRAME#
PCI_TRDY#
+3V
PCI_PIRQC#
PCI_PIRQA#
PCI_STOP# PCI_PLO CK#
PCI_IRDY#
+3V
6
7
8
9
10
6
7
8
9
10
6
7
8
9
10
RP1
8.2K_10P8R
8.2K_10P8R
RP4
RP4
8.2K_10P8R
8.2K_10P8R
RP5
RP5
8.2K_10P8R
8.2K_10P8R
4
5
4
3
2
1
5
4
3
2
1
5
4
3
2
1
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
PCI_RE Q3#
PCI_PIRQB#
PCI_RE Q0#
PCI_PIRQH#
PCI_PER R#
PCI_DE VSEL#
PCI_SERR#
+3V_S5
+3V
+3V
+3V
R629 *10K_4 R629 *10K_4
R631 *10K_4 R631 *10K_4
BOARD_ID1
BOARD_ID2
BOARD_ID3
+3V_S5
BOARD_ID1
R630 *10K_4 R630 *10K_4
BOARD_ID2
R632 *10K_4 R632 *10K_4
BOARD_ID3
R634 *10K_4 R634 *10K_4
High = JV41_CP(ZQ1)
Low = JM41_CP(ZQ1B)
High = 80port output to LPC
Low = 80port output to PCI
High = Reserved
Low = Reserved (Default)
R559 10K_4 R559 10K_4
R308 10K_4 R308 10K_4
R265 10K_4 R265 10K_4
R303 2.2K_4 R303 2.2K_4
R327 2.2K_4 R 327 2.2K_4
R536 2.2K_4 R 536 2.2K_4
R298 2.2K_4 R 298 2.2K_4
2
RSV_SMBALERT#
RSV_SML0ALERT#
RSV_SML1ALERT#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0
2ND_MBCLK <37>
2ND_MBDATA <37>
+3V_S5
R310
R310
2
2.2K_4
2.2K_4
SMB_CLK_ME1
3
1
Q19
Q19
2N7002K
2N7002K
+3V_S5
R311
R311
2
2.2K_4
2.2K_4
SMB_DATA_ME1
3
1
Q20
Q20
2N7002K
2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Numb e r Rev
Size Document Numb e r Rev
Size Document Numb e r Rev
IBEX PEAK-M 3/6
IBEX PEAK-M 3/6
IBEX PEAK-M 3/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
1
ZR7B
ZR7B
ZR7B
10 50 Friday, March 05, 2010
10 50 Friday, March 05, 2010
10 50 Friday, March 05, 2010
of
of
of
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
1
GPU RST#
D D
TP37TP37
SIO_EXT_SMI# <37>
SIO_EXT_SCI# <37>
TP38TP38
RSV_GPIO8 <9>
TP18TP18
CR_WAKE# <9>
dGPU_PWROK <21>
TP24TP24
PCH_GPIO27 <9>
C C
dGPU_VRON <21,44>
dGPU_PWR_EN# should be stable
before dGPU_VRON enable
SML1ALERT# <10,35,37>
EC suggestion use GPIO49 for FAN control
SATA5GP / GPIO49 / TEMP_ALERT# is used to
alert for EC when CPU or Graph/Memory
controllers' temperature go out of limit.
B B
So connecting GPIO49 to EC and avoid this
pin to be used for other purpose
A A
dGPU_PWR_EN# <39>
TP10TP10
SAVE_LED#
RST_GATE# <36>
R256 *Short_4 R256 *Short_4
BMBUSY#
SIO_EXT_SMI#
SIO_EXT_SCI#
BOARD_ID0
RSV_GPIO8
LAN_DISABLE#
CR_WAKE#
dGPU_HOLD_RST#
GPIO22
PCH_GPIO27
TP_PCH_GPIO28
STP_PCI#
dGPU_PWR_EN#
dGPU_PRSNT#
GPIO38
SAVE_LED#
GPIO45
SV_SET_UP
SATA5GP
GPIO57
C38
F10
AA2
AB12
M11
AB7
AB13
AB6
BE1
BE53
BF53
BH1
BH2
BH52
BH53
BJ49
BJ50
BJ52
BJ53
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
U36F
U36F
A20GATE
PECI
RCIN#
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
AH45
AH46
AF48
AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
TP1
AW22
TP2
BB22
TP3
AY45
TP4
AY46
TP5
AV43
TP6
AV45
TP7
AF13
TP8
M18
TP9
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
Y3
BMBUSY# / GPIO0
TACH1 / GPIO1
D37
TACH2 / GPIO6
J32
TACH3 / GPIO7
GPIO8
K9
LAN_PHY_PWR_CTRL / GPIO12
T7
GPIO15
SATA4GP / GPIO16
F38
TACH0 / GPIO17
Y7
SCLOCK / GPIO22
H10
GPIO24
GPIO27
V13
GPIO28
STP_PCI# / GPIO34
V6
SATACLKREQ# / GPIO35
SATA2GP / GPIO36
SATA3GP / GPIO37
V3
SLOAD / GPIO38
P3
SDATAOUT0 / GPIO39
H3
PCIECLKRQ6# / GPIO45
F1
PCIECLKRQ7# / GPIO46
SDATAOUT1 / GPIO48
AA4
SATA5GP / GPIO49
F8
GPIO57
A4
VSS_NCTF_1
A49
VSS_NCTF_2
A5
VSS_NCTF_3
A50
VSS_NCTF_4
A52
VSS_NCTF_5
A53
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
B52
VSS_NCTF_9
B53
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
BF1
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
BJ1
VSS_NCTF_19
BJ2
VSS_NCTF_20
BJ4
VSS_NCTF_21
VSS_NCTF_22
BJ5
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
D1
VSS_NCTF_27
D2
VSS_NCTF_28
D53
VSS_NCTF_29
E1
VSS_NCTF_30
E53
VSS_NCTF_31
IbexPeak-M_R1P0
IbexPeak-M_R1P0
MISC
MISC
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PROCPWRGD
THRMTRIP#
PCH_THRMTRIP#_R
TP_INT3_3V
R222 56/F_4 R222 56/F_4
TP11TP11
SIO_A20GATE <37>
CLK_CPU_BCLK# <4>
CLK_CPU_BCLK <4>
H_PECI <4>
SIO_RCIN# <37>
H_PWRGOOD <4>
R217 56/F_4 R217 56/F_4
PM_THRMTRIP# <4>
+1.1V_VTT
GPU_RST# <16>
GPIO Pull-up/Pull-down
TP_PCH_GPIO28
GPIO45
RST_GATE#
GPIO57
LAN_DISABLE#
SV_SET_UP 1-X High = Strong (Default)
GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1
+3V
+3V
5 3
4
SIO_EXT_SMI#
SIO_EXT_SCI#
dGPU_PWR_EN#
SIO_RCIN#
SIO_A20GATE
dGPU_HOLD_RST#
SATA5GP
GPIO22
SAVE_LED#
STP_PCI#
GPIO38
BMBUSY#
SV_SET_UP
GPIO57
R575 *10K_4 R575 *10K_4
R239 IV@10K_4R239 IV@10K_4
BOARD_ID0
RSV_GPIO8
C609 *.1u_4 C609 *.1u_4
1
dGPU_HOLD_RST#
2
U27
U27
TC7SH08FU
TC7SH08FU
R511 10K_4 R511 10K_4
R537 10K_4 R537 10K_4
R322 10K_4 R322 10K_4
R309 *10K_4 R309 *10K_4
R279 10K_4 R279 10K_4
R299 10K_4 R299 10K_4
R570 10K_4 R570 10K_4
R251 10K_4 R251 10K_4
R515 10K_4 R515 10K_4
R514 10K_4 R514 10K_4
R246 *10K_4 R246 *10K_4
R250 10K_4 R250 10K_4
R262 10K_4 R262 10K_4
R521 10K_4 R521 10K_4
R274 10K_4 R274 10K_4
R497 10K_4 R497 10K_4
R252 8.2K_4 R252 8.2K_4
R257 10K_4 R257 10K_4
R301 10K_4 R301 10K_4
BOARD_ID0
dGPU_PRSNT#
dGPU always exist
High = JV41/JM41
Low = JM51
High = Disable
Low = Enable
PLTRST# <4,10,26,28,32,37>
R414
R414
100K_4
100K_4
+3V_S5
+3V
+3V
R579 10K_4 R579 10K_4
R240 SW@10K_4 R240 SW@10K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 4/6
IBEX PEAK-M 4/6
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
IBEX PEAK-M 4/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZR7B
ZR7B
ZR7B
1A
1A
11 50 Friday, March 05, 2010
11 50 Friday, March 05, 2010
11 50 Friday, March 05, 2010
1
1A
of
of
of
IBEX PEAK-M (POWER)
D D
40mA(15mils)
C C
37mA(15mils)
B B
VRM enable by strap pin GPIO27
which supply clean 1.05V for
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]
A A
5
U36G
+1.05V_VCCCORE_ICH
R242 *SHORT0805 R242 *SHORT0805 L52
+1.05V
R241 *SHORT0805 R241 *SHORT0805
+1.05V_VCCCORE_ICH
C481
C481
10u/6.3V_8
10u/6.3V_8
C479
C479
1u/6.3V_4
1u/6.3V_4
VCCCORE(+1.05V) = 1.432A(80mils)
+1.05V_PCH_VCCDPLL_EXP
C437 *10u/6.3V_6 C437 *10u/6.3V_6
R232 *short_6 R232 *short_6
R234 *short_6 R234 *short_6
C436
C436
*10u/6.3V_6
*10u/6.3V_6
R237 *short_6 R237 *short_6
+V1.1LAN_VCCAPLL_EXP
C467 10U/6.3V_8 C467 10U/6.3V_8
C446 1U/6.3V_4 C446 1U/6.3V_4
C458 1U/6.3V_4 C458 1U/6.3V_4
C478 1U/6.3V_4 C478 1U/6.3V_4
C452 1U/6.3V_4 C452 1U/6.3V_4
+3V_VCCA3GBG
+VCCAFDI_VRM
+V1.1LAN_VCCAPLL_FDI
+1.05V_VCCDPLL_FDI
+1.8V
+V1.5S_1.8S
+1.05V
+1.05V
+1.05V
+3V
L29 *1uH_6 L29 *1uH_6
+1.05V
R218 *short_6 R218 *short_6
L30 *1uh_6 L30 *1uh_6
VCCIO = 3.062A(150mils)
+1.05V
U36G
AB24
VCCCORE[1]
AB26
VCCCORE[2]
AB28
VCCCORE[3]
AD26
VCCCORE[4]
AD28
VCCCORE[5]
AF26
VCCCORE[6]
AF28
VCCCORE[7]
AF30
VCCCORE[8]
AF31
VCCCORE[9]
AH26
VCCCORE[10]
AH28
VCCCORE[11]
AH30
VCCCORE[12]
AH31
VCCCORE[13]
AJ30
VCCCORE[14]
AJ31
VCCCORE[15]
AK24
VCCIO[24]
BJ24
VCCAPLLEXP
AN20
VCCIO[25]
AN22
VCCIO[26]
AN23
VCCIO[27]
AN24
VCCIO[28]
AN26
VCCIO[29]
AN28
VCCIO[30]
BJ26
VCCIO[31]
BJ28
VCCIO[32]
AT26
VCCIO[33]
AT28
VCCIO[34]
AU26
VCCIO[35]
AU28
VCCIO[36]
AV26
VCCIO[37]
AV28
VCCIO[38]
AW26
VCCIO[39]
AW28
VCCIO[40]
BA26
VCCIO[41]
BA28
VCCIO[42]
BB26
VCCIO[43]
BB28
VCCIO[44]
BC26
VCCIO[45]
BC28
VCCIO[46]
BD26
VCCIO[47]
BD28
VCCIO[48]
BE26
VCCIO[49]
BE28
VCCIO[50]
BG26
VCCIO[51]
BG28
VCCIO[52]
BH27
VCCIO[53]
AN30
VCCIO[54]
AN31
VCCIO[55]
AN35
VCC3_3[1]
AT22
VCCVRM[1]
BJ18
VCCFDIPLL
AM23
VCCIO[1]
IbexPeak-M_R1P0
IbexPeak-M_R1P0
VCCVRM=196mA(15mils)
R219 *short_6 R219 *short_6
L47 10uh_8 L47 10uh_8
+1.05V
L46 10uh_8 L46 10uh_8
POWER
POWER
VCC CORE
VCC CORE
PCI E*
PCI E*
C445
C445
.1u/16V_4
.1u/16V_4
C713
C713
220u_3528
220u_3528
C703
C703
220u_3528
220u_3528
4
CRT LVDS
CRT LVDS
HVCMOS
HVCMOS
DMI
DMI
NAND / SPI
NAND / SPI
FDI
FDI
C444
C444
.1u/16V_4
.1u/16V_4
+
+
+
+
VCCADAC[1]
VCCADAC[2]
VSSA_DAC[1]
VSSA_DAC[2]
VCCALVDS
VSSA_LVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[2]
VCC3_3[3]
VCC3_3[4]
VCCVRM[2]
VCCDMI[1]
VCCDMI[2]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
+V1.5S_1.8S
C708
C708
1u/10V_4
1u/10V_4
C696
C696
1u/10V_4
1u/10V_4
+VCCA_DAC_1_2
AE50
AE52
AF53
AF51
AH38
AH39
AP43
AP45
AT46
AT45
AB34
AB35
AD35
AT24
AT16
AU16
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
AM8
AM9
AP11
AP9
HDA_SYNC (PCH strap pin)
Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V
+V1.1LAN_VCCA_A_DPL
R484
R484
*0_8
*0_8
+V1.1LAN_VCCA_B_DPL
C732
C732
.01u/25V_4
.01u/25V_4
VCCALVDS= 1mA
VCCALVDS
C468
C468
.01u/25V_4
.01u/25V_4
+3V_VCC_GIO
C483
C483
.1u/16V_4
.1u/16V_4
VCCVRM= 196mA(15mils)
+VCCVRM
+VCCDMI
C463
C463
1u/10V_4
1u/10V_4
VCCPNAND= 156mA(15mils)
VCCPNAND
C476
C476
.1u/16V_4
.1u/16V_4
VCCME3_3= 85mA(15mils)
+3V_VCCME_SPI
C472
C472
.1u/16V_4
.1u/16V_4
VCCADAC= 69mA(15mils)
L52
PBY160808T/2A/180ohm_6
PBY160808T/2A/180ohm_6
C733
C733
C739
C739
0.1u/10V_4_X7R
0.1u/10V_4_X7R
10u/10V_6
10u/10V_6
R248 *Short_4 R248 *Short_4
VCCTX_LVDS
C469
C469
.01u/25V_4
.01u/25V_4
VCC3_3 = 357mA(30mils)
R264 *short_6 R264 *short_6
R235 *short_6 R235 *short_6
R231 *Short_4 R231 *Short_4
R221 *SHORT0805 R221 *SHORT0805
R236 *short_6 R236 *short_6
+3V
+1.8V
+3V
3
+3V
VCCTX_LVDS= 59mA(15mils)
L33 0.1UH_8/250mA L33 0.1UH_8/250mA
C470
C470
22u/6.3V_8
22u/6.3V_8
+V1.5S_1.8S
VCCDMI= 61mA(15mils)
+1.1V_VTT
+3V
VCCACLK= 52mA(15mils)
+1.05V
VCCLAN = 320mA(30mils)
+1.05V
R244 *0_6 R244 *0_6
+1.05V
+1.8V
C482 change to 0 ohm resistor.
VCCME(+1.05V) = 1.849A(100mils)
R249 *SHORT0805 R249 *SHORT0805
R260 *SHORT0805 R260 *SHORT0805
68mA(15mils)
69mA(15mils)
VCCIO = 3.062A(150mils)
VCCSUS3_3 = 163mA(20mils)
VCC3_3 = 0.357A(30mils)
V_CPU_IO >1mA(15mils)
+3V_S5
+3V
+1.1V_VTT
VCCRTC= 2mA(15mils)
L48 *10uh_8 L48 *10uh_8
C717 *10u/6.3V_6 C717 *10u/6.3V_6
C718 *1u/6.3V_4 C718 *1u/6.3V_4
+1.05V_VCCAUX
C482
C482
1U/6.3V_4
1U/6.3V_4
+V1.5S_1.8S
+1.05V
C493 0.1u/10V_4_X7R C493 0.1u/10V_4_X7R
C484 0.1u/10V_4_X7R C484 0.1u/10V_4_X7R
R307 *short_6 R307 *short_6
R255 *short_6 R255 *short_6
R228 *short_6 R228 *short_6
+VCCRTC
+V1.1LAN_VCCA_CLK
TP_PCH_VCCDSW
C487
C487
1u/6.3V_4
1u/6.3V_4
+1.05V_VCCEPW
C485 22U/6.3V_8 C485 22U/6.3V_8
C491 22U/6.3V_8 C491 22U/6.3V_8
C488 1U/6.3V_4 C488 1U/6.3V_4
C490 1U/6.3V_4 C490 1U/6.3V_4
+VCCRTCEXT
C492 0.1u/10V_4_X7R C492 0.1u/10V_4_X7R
+V1.1LAN_VCCA_A_DPL
+V1.1LAN_VCCA_B_DPL
C475 1U/6.3V_4 C475 1U/6.3V_4
C473 1U/6.3V_4 C473 1U/6.3V_4
C474 1U/6.3V_4 C474 1U/6.3V_4
+VCCSST
+V1.1LAN_INT_VCCSUS
+3V_S5_VCCPSUS
C494 0.1u/10V_4_X7R C494 0.1u/10V_4_X7R
+3V_VCCPCORE
C486 0.1u/10V_4_X7R C486 0.1u/10V_4_X7R
+VTT_VCCPCPU
C459 4.7U/6.3V_6 C459 4.7U/6.3V_6
C461 0.1u/10V_4_X7R C461 0.1u/10V_4_X7R
C462 0.1u/10V_4_X7R C462 0.1u/10V_4_X7R
C782 0.1u/10V_4_X7R C782 0.1u/10V_4_X7R
C771 0.1u/10V_4_X7R C771 0.1u/10V_4_X7R
AP51
AP53
AF23
AF24
AD38
AD39
AD41
AF43
AF41
AF42
AU24
BB51
BB53
BD51
BD53
AH23
AH35
AF34
AH34
AF32
AT18
AU18
2
Y20
V39
V41
V42
Y39
Y41
Y42
V9
AJ35
V12
Y22
P18
U19
U20
U22
V15
V16
Y16
A12
U36J
U36J
VCCACLK[1]
VCCACLK[2]
VCCLAN[1]
VCCLAN[2]
DCPSUSBYP
VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]
DCPRTC
VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[2]
VCCIO[3]
VCCIO[4]
DCPSST
DCPSUS
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]
VCC3_3[5]
VCC3_3[6]
VCC3_3[7]
V_CPU_IO[1]
V_CPU_IO[2]
VCCRTC
IbexPeak-M_R1P0
IbexPeak-M_R1P0
POWER
POWER
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
USB
USB
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
VCCSUS3_3[28]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC
PCI/GPIO/LPC
VCCSATAPLL[1]
VCCSATAPLL[2]
SATA
SATA
PCI/GPIO/LPC
PCI/GPIO/LPC
CPU
CPU
RTC
RTC
HDA
HDA
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCIO[56]
V5REF_SUS
V5REF
VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCCIO[9]
VCCVRM[4]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
VCCSUSHDA
V24
V26
Y24
Y26
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3
AK1
AH22
AT20
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35
L30
1
VCCIO = 3.208A(150mils)
C489 1U/6.3V_4 C489 1U/6.3V_4
+3V_S5_VCCPUSB
C496 0.1u/10V_4_X7R C496 0.1u/10V_4_X7R
C497 0.1u/10V_4_X7R C497 0.1u/10V_4_X7R
C501 0.022U/16V_4 C501 0.022U/16V_4
+1.05V
R305 *SHORT0805 R305 *SHORT0805
VCCSUS3_3 = 0.163A(20mils)
V5REF_SUS
V5REF
+3V_VCCPPCI
C500 0.1u/10V_4_X7R C500 0.1u/10V_4_X7R
C498 0.1u/10V_4_X7R C498 0.1u/10V_4_X7R
+V1.1LAN_VCCAPLL
C730
C730
*1u/6.3V_4
*1u/6.3V_4
+V1.1LAN_VCC_SATA
+V1.5S_1.8S
+1.05V_VCCEPW
+V3.3A_1.5A_HDA_IO
C502
C502
1u/10V_4
1u/10V_4
R267 *short_6 R267 *short_6
R284 *short_6 R284 *short_6
C729
C729
*10u/6.3V_6
*10u/6.3V_6
VCCME = 1.849A(100mils)
VCCSUSHDA= 6mA(15mils)
+1.05V
V5REF_SUS< 1mA
R574 100/F_4 R574 100/F_4
D18 RB500V-40 D18 RB500V-40
C788 1U/6.3V_4 C788 1U/6.3V_4
V5REF< 1mA
R288 100/F_4 R288 100/F_4
D14 RB500V-40 D14 RB500V-40
C499 1U/6.3V_4 C499 1U/6.3V_4
+3V
VCC3_3 = 0.357A(30mils)
31mA(15mils)
L50 *10uh_8 L50 *10uh_8
VCCIO = 3.062A(150mils)
R259 *SHORT1206 R259 *SHORT1206
C480
C480
1u/10V_4
1u/10V_4
R273 *Short_4 R273 *Short_4
+3V_S5
+1.05V
+1.05V
+3V_S5
+5V_S5
+3V_S5
+5V
+3V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 5/6
IBEX PEAK-M 5/6
IBEX PEAK-M 5/6
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
1
ZR7B
ZR7B
ZR7B
12 50 Friday, March 05, 2010
12 50 Friday, March 05, 2010
12 50 Friday, March 05, 2010
1A
1A
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
IBEX PEAK-M (GND)
D D
U36H
U36H
AB16
VSS[0]
AA19
VSS[1]
AA20
VSS[2]
AA22
VSS[3]
AM19
VSS[4]
AA24
VSS[5]
AA26
VSS[6]
AA28
VSS[7]
AA30
VSS[8]
AA31
VSS[9]
AA32
VSS[10]
AB11
VSS[11]
AB15
VSS[12]
AB23
VSS[13]
AB30
VSS[14]
AB31
VSS[15]
AB32
VSS[16]
AB39
VSS[17]
AB43
VSS[18]
AB47
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AF12
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AK12
AM41
AN19
AK26
AK22
AK23
AK28
AB5
AB8
AC2
AD7
AE2
AE4
Y13
AF5
AF8
AJ2
AT5
AJ4
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
IbexPeak-M_R1P0
IbexPeak-M_R1P0
C C
B B
A A
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
4
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
AF39
3
U36I
U36I
AY7
VSS[159]
B11
VSS[160]
B15
VSS[161]
B19
VSS[162]
B23
VSS[163]
B31
VSS[164]
B35
VSS[165]
B39
VSS[166]
B43
VSS[167]
B47
VSS[168]
B7
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
BB5
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
BE6
VSS[206]
BE8
VSS[207]
BF3
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
C12
VSS[225]
C50
VSS[226]
D51
VSS[227]
E12
VSS[228]
E16
VSS[229]
E20
VSS[230]
E24
VSS[231]
E30
VSS[232]
E34
VSS[233]
E38
VSS[234]
E42
VSS[235]
E46
VSS[236]
E48
VSS[237]
E6
VSS[238]
E8
VSS[239]
F49
VSS[240]
F5
VSS[241]
G10
VSS[242]
G14
VSS[243]
G18
VSS[244]
G2
VSS[245]
G22
VSS[246]
G32
VSS[247]
G36
VSS[248]
G40
VSS[249]
G44
VSS[250]
G52
VSS[251]
VSS[252]
H16
VSS[253]
H20
VSS[254]
H30
VSS[255]
H34
VSS[256]
H38
VSS[257]
H42
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
2
1
IbexPeak-M_R1P0
IbexPeak-M_R1P0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 6/6
IBEX PEAK-M 6/6
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
IBEX PEAK-M 6/6
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZR7B
ZR7B
ZR7B
13 50 Friday, March 05, 2010
13 50 Friday, March 05, 2010
13 50 Friday, March 05, 2010
of
of
of
1A
1A
1A
5
M_A_A[15:0] <5>
D D
M_A_BS#0 <5>
M_A_BS#1 <5>
M_A_BS#2 <5>
M_A_CS#0 <5>
M_A_CS#1 <5>
M_A_CLK0 <5>
M_A_CLK0# <5>
M_A_CLK1 <5>
M_A_CLK1# <5>
M_A_CKE0 <5>
M_A_CKE1 <5>
M_A_CAS# <5>
M_A_RAS# <5>
R215 10K_4 R215 10K_4
R216 10K_4 R216 10K_4
C C
B B
M_A_WE# <5>
CLK_SCLK <3,15,28>
CLK_SDATA <3,15,28>
M_A_ODT0 <5>
M_A_ODT1 <5>
M_A_DM[7:0] <5>
M_A_DQS[7:0] <5>
M_A_DQS#[7:0] <5>
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
CLK_SCLK
CLK_SDATA
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
107
119
109
108
114
121
101
103
102
104
115
110
113
197
201
202
200
116
120
136
153
170
187
137
154
171
188
135
152
169
186
98
97
96
95
92
91
90
86
89
85
84
83
80
78
79
73
74
11
28
46
63
12
29
47
64
10
27
45
62
4
JDIM1A
JDIM1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
(204P)
(204P)
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
3
M_A_DQ[63:0] <5>
+SMDDR_VREF
VREF_DQ_DIMM0 <7,36>
+SMDDR_VREF_DQ0 <36>
+SMDDR_VREF
R122 *short_6 R122 *short_6
PM_EXTTS#0 <4>
DDR3_DRAMRST# <15,36>
R129 M1@0_6 R129 M1@0_6
R131 *M3@0_6 R131 *M3@0_6
+1.5V_SUS
R120
R120
*10K_4
*10K_4
+SMDDR_VREF_DIMM
R121
R121
*10K_4
*10K_4
2.48A
+3V
C269
C269
470p/X7R_4
470p/X7R_4
2
+1.5V_SUS
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=5.2_Standa rd
DDR3-DIMM0_H=5.2_Standa rd
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
1
+0.75V_DDR_VTT
DDR3-DIMM0_H=5.2_Standa rd
DDR3-DIMM0_H=5.2_Standa rd
Place these Caps near So-Dimm0.
+1.5V_SUS
C386
C332
C332
10u/6.3V_6
10u/6.3V_6
C410
C410
.1u/16V_4
.1u/16V_4
5
C386
10u/6.3V_6
10u/6.3V_6
+0.75V_DDR_VTT
C365
C349
C349
10u/6.3V_6
10u/6.3V_6
C409
C409
2.2u/6.3V_6
2.2u/6.3V_6
C365
10u/6.3V_6
10u/6.3V_6
C371
C371
10u/6.3V_6
10u/6.3V_6
C331
C331
10u/6.3V_6
10u/6.3V_6
A A
+3V
C351
C351
.1u/16V_4
.1u/16V_4
C424
C424
1U/6.3V_4
1U/6.3V_4
C342
C342
.1u/16V_4
.1u/16V_4
C375
C375
.1u/16V_4
.1u/16V_4
C415
C415
1U/6.3V_4
1U/6.3V_4
C337
C337
.1u/16V_4
.1u/16V_4
C341
C341
.1u/16V_4
.1u/16V_4
C426
C426
1U/6.3V_4
1U/6.3V_4
+
+
C329
C329
C391
C391
330u/2V_7343
330u/2V_7343
.1u/16V_4
.1u/16V_4
C425
C425
1U/6.3V_4
1U/6.3V_4
+SMDDR_VREF_DIMM
C392
C392
2.2u/6.3V_6
2.2u/6.3V_6
C423
C423
10u/6.3V_6
10u/6.3V_6
4
+SMDDR_VREF_DQ0
C266
C266
.1u/16V_4
.1u/16V_4
C421
C421
10u/6.3V_6
10u/6.3V_6
2.2u/6.3V_6
2.2u/6.3V_6
C419
C419
10u/6.3V_6
10u/6.3V_6
C268
C268
http://laptop-motherboard-schematic.blogspot.com/
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
1
ZR7B
ZR7B
ZR7B
14 50 Friday, March 05, 2010
14 50 Friday, March 05, 2010
14 50 Friday, March 05, 2010
1A
1A
1A
5
4
3
2
1
JDIM2A
M_B_A[15:0] <5>
D D
M_B_BS#0 <5>
M_B_BS#1 <5>
M_B_BS#2 <5>
M_B_CS#0 <5>
M_B_CS#1 <5>
M_B_CLK0 <5>
M_B_CLK0# <5>
M_B_CLK1 <5>
M_B_CLK1# <5>
M_B_CKE0 <5>
M_B_CKE1 <5>
M_B_CAS# <5>
M_B_RAS# <5>
R204 10K_4 R204 10K_4
R214 10K_4 R214 10K_4
+3V
C C
B B
M_B_WE# <5>
CLK_SCLK <3,14,28>
CLK_SDATA <3,14,28>
M_B_ODT0 <5>
M_B_ODT1 <5>
M_B_DM[7:0] <5>
M_B_DQS[7:0] <5>
M_B_DQS#[7:0] <5>
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
PC2100 DDR3 SDRAM SO-DIMM
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DDR3-DIMM1_H=5.2_Reverse
DDR3-DIMM1_H=5.2_Reverse
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
(204P)
(204P)
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQ[63:0] <5>
+SMDDR_VREF_DQ1 <36>
+SMDDR_VREF_DIMM
VREF_DQ_DIMM1 <7,36>
PM_EXTTS#1 <4>
DDR3_DRAMRST# <14,36>
R116 M1@0_6 R116 M1@0_6
R127 *M3@0_6 R127 *M3@0_6
+SMDDR_VREF_DIMM
2.48A
+SMDDR_VREF_DQ1
+1.5V_SUS
+3V
JDIM2B
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=5.2_Reverse
DDR3-DIMM1_H=5.2_Reverse
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
+0.75V_DDR_VTT
+1.5V_SUS
C387
C387
10u/6.3V_6
10u/6.3V_6
+3V
A A
Place these Caps near So-Dimm1.
C376
C376
10u/6.3V_6
10u/6.3V_6
C404
C404
2.2u/6.3V_6
2.2u/6.3V_6
C328
C328
10u/6.3V_6
10u/6.3V_6
C343
C343
10u/6.3V_6
10u/6.3V_6
C417
C417
.1u/16V_4
.1u/16V_4
C389
C389
10u/6.3V_6
10u/6.3V_6
+0.75V_DDR_VTT
5
C364
C364
10u/6.3V_6
10u/6.3V_6
C416
C416
1U/6.3V_4
1U/6.3V_4
C353
C353
.1u/16V_4
.1u/16V_4
C377
C377
.1u/16V_4
.1u/16V_4
C429
C429
1U/6.3V_4
1U/6.3V_4
C338
C338
.1u/16V_4
.1u/16V_4
C370
C370
.1u/16V_4
.1u/16V_4
C385
C385
.1u/16V_4
.1u/16V_4
C427
C427
1U/6.3V_4
1U/6.3V_4
+SMDDR_VREF_DIMM
+
+
C348
C348
330u/2V_7343
330u/2V_7343
C428
C428
1U/6.3V_4
1U/6.3V_4
C394
C394
.1u/16V_4
.1u/16V_4
10u/6.3V_6
10u/6.3V_6
4
C418
C418
+SMDDR_VREF_DQ1
C265
C393
C393
.1u/16V_4
.1u/16V_4
2.2u/6.3V_6
2.2u/6.3V_6
C422
C422
10u/6.3V_6
10u/6.3V_6
C265
C267
C267
2.2u/6.3V_6
2.2u/6.3V_6
C420
C420
10u/6.3V_6
10u/6.3V_6
http://laptop-motherboard-schematic.blogspot.com/
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
1
ZR7B
ZR7B
ZR7B
15 50 Friday, March 05, 2010
15 50 Friday, March 05, 2010
15 50 Friday, March 05, 2010
1A
1A
1A