Acer TimelineX 4820T Schematics
5
4
3
2
1
GPU CORE PWR
ZQ1 BLOCK DIAGRAM
D D
CLOCK GENERATOR
X'TAL
14.318MHz
SELGO: SLG8LV595V
DDR III
SO-DIMM 0
SO-DIMM 1
P14, 15
HDD (SATA)
C C
ODD (SATA)
USB board
P3
P29
P29
BCLK: 133MHz
PEG_CLK: 100MHz
DPLL_REF_SSCLK: 120MHz
Dual Channel
800/ 1066 MHz
800 MT/s 1066 MT/s
SATA0
SATA1
<MCH Processor>
DDR SYSTEM MEMORY
P4~P7
FDI interface
FDI
intel
Arrandale (SG)
rPGA 989
(37.5mm X 37.5mm)
FDI
DMI
DMI
intel
PCI-E
X16
PCIE
2.5GT/s
X4 DMI interface
<PCH>
USB Port X3
USB 3
USB 9
USB 12
USB Port x 1
USB 1
B B
(Debug)
P32
P32
Bluetooth
USB 4
P32
USB 2.0
Azalia
CCD
USB 8
P25
CardReader
AU6437
USB 12
Note:
HM55 does not support USB 6 & 7
HM55 does not support SATA 2 & 3
P31
Audio CODEC
RTL ALC271X
P30
SATA
3.0 GT/s
USB
Ibex Peak_M
mBGA 676
HDA
P8~P13
SPI
SPI ROM
4MB x1 (Basic ME+Braidwood)
P9
(27mm X 25mm)
X'TAL
32.768KHz
Graphics Interfaces
RTC
P9
PCI-E
LPC
EC
(NPCE781/783)
Fan Driver
(PWM Type)
CPU
XDP Conn.
ATI GPU
Madison LP/PRO
1GB
INT_CRT
INT_LVDS
INT_HDMI
X'TAL
32.768KHz
PCI-Express
2.5GT/s
P35
P34
P16
(16 x 64Mb x 8pcs)
P17~P24
HDMI
PCIE-1
CLKOUT_PEG_B
Atheros
Giga-LAN
AR8151
Transformer
RJ45
P27
P27
X'TAL
27.0MHz
P27
CRT
LVDS
INT_CRT
INT_LVDS
X'TAL
25MHz
MAX8792ETD
GPU IO PWR
ISL62872
DISCHARGER
+1.0V/+1.8V
TPS54418RTE
CPU VGFX_AXG
ISL62881
THERMAL
PROTECTION
LVDS_CRT
Switchable
HDMI
Level-shift
PS8101
PCIE-6 PCIE-2
CLKOUT_PEG_2 CLKOUT_PEG_1
Mini Card
WiFi
USB 13
P40/P44
P25
P26
P28
USB10
CHARGER
P41
ISL88731
3/5V SYS PWR
P42
RT8206
CPU CORE PWR
P44
ISL62882
CPU VTT
UP61111AQDD
VTT 1.05V
P43
UP61111AQDD
DDR3 PWR
P46
RT8207A
CRT
LVDS
HDMI
Mini Card
3G
USB 10
SIM Card FFC
Conn
daughter board
P28
P45
P36
P37
ARD: 1.05V
CFD: 1.1V
P38
P39
P40
P25
P25
P26
USB13
P28
USB5
A A
P34
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
Block Diagram
Block Diagram
Block Diagram
1
ZQ1
ZQ1
ZQ1
1A
1A
1A
of
of
of
148Wednesday, December 16, 2009
148Wednesday, December 16, 2009
148Wednesday, December 16, 2009
3G@ FOR 3G SKU
PK@ FOR PARK GPU
MD@ FOR MADSION GPU
IV@ FOR UMA
SW@ FOR SWITCHABLE GRAPHIC
5
SPDIF/HP INT MIC DMIC
P30 P30
4
http://laptop-motherboard-schematic.blogspot.com/
P25
SPI ROM
P35
3
Touch Pad
P32
Keyboard
P34
Button on
mechanical key
2
1
GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)
+3.3V
2
VIN
VIN
3
+1.5V
4
+1.5V_SUS
5
+1.8V
6
7
8
+5V
dGPU_VRON
A A
VDDR3
MOS (AO3413)
+3V_D
P22
+3_D (0.5A)
VDDC
ISL6264
+VGPU_CORE (20A)
P44
PG_GPUIO_EN
VDDCI
ISL62872
P45
+VGPU_IO (4.5A)
PG_1V_EN
(DP PLL PWR)
+1V
G9334ADJ & MOS
+1V (3A)
P47
PG_1.5V_EN
VDDR1
MOS (AO4710)
P43
+1.5V_GPU (10A)
PG_1.5V_EN
VDDR4
MOS (AO6402)
P43
+1.8V_GPU (3A)
PG_1.5V_EN
BJT
P22
dGPU_PWROK
dGPU_PWR_EN#
MOS
AO3413
+5_GPU
P22
GPU PWR CTRL Option 2 (VDDR3 after VDDR1)
VIN
dGPU_VRON
VDDC
ISL6264
P44
+VGPU_CORE (20A)
B B
VIN
VDDCI
ISL62872
P45
+VGPU_IO (4.5A)
PG_1V_EN
Power States
POWER PLANE
VIN
+RTC_CELL
+3VPCU
+5VPCU
+15V
3V_LAN_S5
C C
D D
+5VSUS
+3VSUS
+1.5V_SUS
+0.75V_DDR_VTT
+5V
+3V
+1.8V
+1.5V
+1.1V_VTT +1.05V~+1.1V
+1.05V +1.05V
+VCC_CORE
LCDVCC
MBAT+
+5V_S5
+3V_S5 +3.3V S5D
1
+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+3.3V
+1.5V
+0.9V
+5V
+3.3V
+1.8V
+1.5V
0V~+1.5V
+3.3V
+5V S5_ON
DESCRIPTION
MAIN POWER
RTC
8051 POWER
CHARGE POWER
LARGE POWER
LAN POWER
SODIMM POWER
SODIMM POWER
PCH POWER
CPU CORE POWER
LCD Power
MAIN BATTERY+10V~+17V
2
+1.5V
(DP PLL PWR)
+1V
G9334ADJ & MOS
+1V (3A)
CONTROL
SIGNAL
ALWON
ALWON
+15V_ALWP
AUX_ON
SUSD
SUSD
SUSON
MAINON
MAIND
MAIND
MAINON
MAIND
MAINONCPU POWER
MAINONPCH POWER
VRON
LVDS_VDDEN
3
P47
PG_1.5V_EN
ACTIVE INVOLTAGE
S0~S5
S0~S5
S0~S5
S0~S5
S0~S5
+1.5V_SUS
VDDR1
MOS (AO4710)
P43
+1.5V_GPU (10A)
4
+3.3V
+1.5V_GPU
VDDR3
MOS (AO3413)
P22
+3_D (0.5A)
Thermal Follow Chart
CPU
CORE PWR
+3V_DPG_GPUIO_EN
H_ORICHOT#
5
+1.8V
VDDR4
MOS (AO6402)
+1.8V_GPU (3A)
H/W Throttling
SM-Bus
PG_1.5V_EN
P43
NTC
Thermal
Protection
CPU
PCH
EC
PM_THRMTRIP#
SML1ALERT#
CPUFAN#
6
BJT
P22
dGPU_PWROK
SYS_SHDN#
WIRE-AND
+5V
dGPU_PWR_EN#
MOS
AO3413
P22
+5_GPU
3V/5 V
SYS PWR
FANFAN Driver
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
Date: Sheet
Date: Sheet
Date: Sheet
7
PROJECT :
ZQ1
ZQ1
ZQ1
248Wednesday, December 16, 2009
248Wednesday, December 16, 2009
248Wednesday, December 16, 2009
of
of
of
8
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
1
CLK Gen(CLK)
+1.5V
D D
pi-filter
+3V
C C
B B
A A
L54 595@BLM18AG601SN1D/200mA/600ohm_6L54 595@BLM18AG601SN1D/200mA/600ohm_6
C746
C746
*0.1u/10V_4
*0.1u/10V_4
L57 BLM18AG601SN1D/200mA/600ohm_6L57 BLM18AG601SN1D/200mA/600ohm_6
C792
C792
*0.1u/10V_4
*0.1u/10V_4
IDT: AL003197002 (ICS9LVS3197BKLFT)
Realtek: AL000890000 (RTM890N-632-GRT)
Silego: AL000595000 (SLG8LV595VTR)
CPU_SEL
pi-filter
R551 *585@0_6R551 *585@0_6
C754
C754
10u/6.3V_8
10u/6.3V_8
close bead close PIN 5, 29 each
C466
C466
0.1u/10V_4
0.1u/10V_4
+1.05V
R555
R555
*4.7K_4
*4.7K_4
R564
R564
4.7K_4
4.7K_4
close PIN 1
9/22 modify
01
CPU0/1=133MHz
(default)
5
CPU0/1=100MHz
20mil
C757
C757
0.1u/10V_4
0.1u/10V_4
CPU_SEL
C752
C752
*10u/6.3V_8
*10u/6.3V_8
close PIN 1, 17, 24 each
150mA(30mil)
C467
C467
C758
C758
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
+3V_CLK
CLK_ICH_14M(10)
C772 27p/50V_4C772 27p/50V_4
B-test
C782 33p/50V_4C782 33p/50V_4
SMBus(CLK)CPU_CLK select(CLK)
4
C789
C789
0.1u/10V_4
0.1u/10V_4
+1.5V_CLK
R554 33_4R554 33_4
Y6
Y6
14.318MHZ
14.318MHZ
2 1
ICH_SMBDATA(10,16,28)
ICH_SMBCLK(10,16,28)
CLK_SDATA
CLK_SCLK
CPU_SEL
XTAL_IN
XTAL_OUT
U38
U38
1
VDD_DOT
17
VDD_SRC
24
VDD_CPU
5
VDD_27
29
VDD_REF
31
SDA
32
SCL
30
REF_0/CPU_SEL
28
XTAL_IN
27
XTAL_OUT
2
VSS_DOT
8
VSS_27
9
VSS_SATA
12
VSS_SRC
21
VSS_CPU
26
VSS_REF
33
GND
SLG8LV595V
SLG8LV595V
3
3
+3V
+3V
2
2
1
Q33
Q33
2N7002K
2N7002K
1
Q35
Q35
2N7002K
2N7002K
VDD_SRC_I/O
VDD_CPU_I/O
DOT_96
DOT_96#
27M_SS
SRC_1/SATA
SRC_1#/SATA#
SRC_2#
*CPU_STOP#
CPU_1#
CPU_0#
CKPWRGD/PD#
R563
R563
4.7K_4
4.7K_4
CLK_SDATA
R558
R558
4.7K_4
4.7K_4
CLK_SCLK
3
27M
SRC_2
CPU_1
CPU_0
15
18
3
4
R300 SW@33_4R300 SW@33_4
6
R301 *SW@0_4R301 *SW@0_4
7
10
11
13
14
R579 10K_4R579 10K_4
16
20
19
23
22
CK_PWRGD_R
25
CLK_SDATA (14,15,28)
CLK_SCLK (14,15,28)
+VDDIO_CLK
CLK_BUF_DREFCLK (10)
CLK_BUF_DREFCLK# (10)
27M_CLK (18)
TP46TP46
TP45TP45
10/5 modify
+3V
CLK_BUF_PCIE_3GPLL (10)
CLK_BUF_PCIE_3GPLL# (10)
CLK_BUF_DREFSSCLK (10)
CLK_BUF_DREFSSCLK# (10)
CLK_BUF_BCLK (10)
CLK_BUF_BCLK# (10)
CLK Enable(CLK)
80mA(20mil)
C790
C790
0.1u/10V_4
0.1u/10V_4
VR_PWRGD_CK505#(37)
2
pi-filter
L58
L58
BLM18AG601SN1D/200mA/600ohm_6
C786
C786
0.1u/10V_4
0.1u/10V_4
Place each 0.1uF cap as close as
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.
+3V
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Clock Generator
Clock Generator
Clock Generator
Date: Sheet
Date: Sheet
Date: Sheet
BLM18AG601SN1D/200mA/600ohm_6
C794
C794
10u/6.3V_8
10u/6.3V_8
CRB use +3VPCU
R584
R584
1K_4
1K_4
CK_PWRGD_R
3
Q37
Q37
2N7002K
2N7002K
R580
R580
100K_4
100K_4
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
C802
C802
*0.1u/10V_4
*0.1u/10V_4
ZQ1
ZQ1
ZQ1
348Friday, January 22, 2010
348Friday, January 22, 2010
348Friday, January 22, 2010
of
of
of
+1.05V
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
Arrandale_1(CPU)
5
4
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)
AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)
U28A
U28A
DMI_TXN0(8)
DMI_TXN1(8)
DMI_TXN2(8)
DMI_TXN3(8)
D D
DMI_TXP0(8)
DMI_TXP1(8)
DMI_TXP2(8)
DMI_TXP3(8)
DMI_RXN0(8)
DMI_RXN1(8)
DMI_RXN2(8)
DMI_RXN3(8)
DMI_RXP0(8)
DMI_RXP1(8)
DMI_RXP2(8)
DMI_RXP3(8)
FDI_TXN0(8)
FDI_TXN1(8)
FDI_TXN2(8)
FDI_TXN3(8)
FDI_TXN4(8)
FDI_TXN5(8)
FDI_TXN6(8)
FDI_TXN7(8)
FDI_TXP0(8)
FDI_TXP1(8)
FDI_TXP2(8)
FDI_TXP3(8)
FDI_TXP4(8)
C C
FDI_TXP5(8)
FDI_TXP6(8)
FDI_TXP7(8)
FDI_FSYNC0(8)
FDI_FSYNC1(8)
FDI_INT(8)
FDI_LSYNC0(8)
FDI_LSYNC1(8)
B B
A24
DMI_RX#[0]
C23
DMI_RX#[1]
B22
DMI_RX#[2]
A21
DMI_RX#[3]
B24
DMI_RX[0]
D23
DMI_RX[1]
B23
DMI_RX[2]
A22
DMI_RX[3]
D24
DMI_TX#[0]
G24
DMI_TX#[1]
F23
DMI_TX#[2]
H23
DMI_TX#[3]
D25
DMI_TX[0]
F24
DMI_TX[1]
E23
DMI_TX[2]
G23
DMI_TX[3]
E22
FDI_TX#[0]
D21
FDI_TX#[1]
D19
FDI_TX#[2]
D18
FDI_TX#[3]
G21
FDI_TX#[4]
E19
FDI_TX#[5]
F21
FDI_TX#[6]
G18
FDI_TX#[7]
D22
FDI_TX[0]
C21
FDI_TX[1]
D20
FDI_TX[2]
C18
FDI_TX[3]
G22
FDI_TX[4]
E20
FDI_TX[5]
F20
FDI_TX[6]
G19
FDI_TX[7]
F17
FDI_FSYNC[0]
E17
FDI_FSYNC[1]
C17
FDI_INT
F18
FDI_LSYNC[0]
D17
FDI_LSYNC[1]
Clarksfield/Auburndale
Clarksfield/Auburndale
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
DMI Intel(R) FDI
DMI Intel(R) FDI
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
B26
A26
B27
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_COMP
PEG_RBIAS
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
CPEG_TXN0
CPEG_TXN1
CPEG_TXN2
CPEG_TXN3
CPEG_TXN4
CPEG_TXN5
CPEG_TXN6
CPEG_TXN7
CPEG_TXN8
CPEG_TXN9
CPEG_TXN10
CPEG_TXN11
CPEG_TXN12
CPEG_TXN13
CPEG_TXN14
CPEG_TXN15
CPEG_TXP0
CPEG_TXP1
CPEG_TXP2
CPEG_TXP3
CPEG_TXP4
CPEG_TXP5
CPEG_TXP6
CPEG_TXP7
CPEG_TXP8
CPEG_TXP9
CPEG_TXP10
CPEG_TXP11
CPEG_TXP12
CPEG_TXP13
CPEG_TXP14
CPEG_TXP15
R415 49.9/F_4R415 49.9/F_4
R414 750/F_4R414 750/F_4
C595 SW@0.1u/10V_4C595 SW@0.1u/10V_4
C568 SW@0.1u/10V_4C568 SW@0.1u/10V_4
C593 SW@0.1u/10V_4C593 SW@0.1u/10V_4
C566 SW@0.1u/10V_4C566 SW@0.1u/10V_4
C591 SW@0.1u/10V_4C591 SW@0.1u/10V_4
C564 SW@0.1u/10V_4C564 SW@0.1u/10V_4
C589 SW@0.1u/10V_4C589 SW@0.1u/10V_4
C562 SW@0.1u/10V_4C562 SW@0.1u/10V_4
C587 SW@0.1u/10V_4C587 SW@0.1u/10V_4
C560 SW@0.1u/10V_4C560 SW@0.1u/10V_4
C585 SW@0.1u/10V_4C585 SW@0.1u/10V_4
C558 SW@0.1u/10V_4C558 SW@0.1u/10V_4
C583 SW@0.1u/10V_4C583 SW@0.1u/10V_4
C556 SW@0.1u/10V_4C556 SW@0.1u/10V_4
C581 SW@0.1u/10V_4C581 SW@0.1u/10V_4
C554 SW@0.1u/10V_4C554 SW@0.1u/10V_4
C594 SW@0.1u/10V_4C594 SW@0.1u/10V_4
C567 SW@0.1u/10V_4C567 SW@0.1u/10V_4
C592 SW@0.1u/10V_4C592 SW@0.1u/10V_4
C565 SW@0.1u/10V_4C565 SW@0.1u/10V_4
C590 SW@0.1u/10V_4C590 SW@0.1u/10V_4
C563 SW@0.1u/10V_4C563 SW@0.1u/10V_4
C588 SW@0.1u/10V_4C588 SW@0.1u/10V_4
C561 SW@0.1u/10V_4C561 SW@0.1u/10V_4
C586 SW@0.1u/10V_4C586 SW@0.1u/10V_4
C559 SW@0.1u/10V_4C559 SW@0.1u/10V_4
C584 SW@0.1u/10V_4C584 SW@0.1u/10V_4
C557 SW@0.1u/10V_4C557 SW@0.1u/10V_4
C582 SW@0.1u/10V_4C582 SW@0.1u/10V_4
C555 SW@0.1u/10V_4C555 SW@0.1u/10V_4
C580 SW@0.1u/10V_4C580 SW@0.1u/10V_4
C553 SW@0.1u/10V_4C553 SW@0.1u/10V_4
PEG_RXN[0..15] (17)
Use RVS type
PEG_RXP[0..15] (17)
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PEG_TXN[0..15] (17)
PEG_TXP[0..15] (17)
Processor Compensation Signals
R490 20/F_4R490 20/F_4
R491 20/F_4R491 20/F_4
R148 49.9/F_4R148 49.9/F_4
R492 49.9/F_4R492 49.9/F_4
H_PECI(11)
H_PROCHOT#(37)
PM_THRMTRIP#
H_CPURST#(16)
PM_SYNC(8)
H_PWRGOOD(11,16)
PM_DRAM_PWRGD_R(16)
H_PWRGD_XDP(16)
PLTRST#(10,11,27,28,31,35)
R493 *Short_4R493 *Short_4
R205 *Short_4R205 *Short_4
B-test
R204 *Short_4R204 *Short_4
R156 *Short_4R156 *Short_4
R177 1.5K/F_4R177 1.5K/F_4
SI 2/5 Modified
H_COMP3
H_COMP2
H_COMP1
H_COMP0
H_CATERR#
H_PROCHOT#_R
PM_THRMTRIP#_R
H_PM_SYNC_R
H_VTTPWRGD
CPU_PLTRST#
R176
R176
750/F_4
750/F_4
U28B
U28B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
Clarksfield/Auburndale
Clarksfield/Auburndale
MISC THERMAL
MISC THERMAL
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TMS
TDI
TDO
A16
B16
AR30
AT30
E16
D16
A18
A17
F6
AL1
AM1
AN1
AN15
AP15
AT28
AP27
AN28
AP28
AT27
AT29
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
CLK_CPU_BCLK (11)
CLK_CPU_BCLK# (11)
BCLK_ITP_P (16)
BCLK_ITP_N (16)
CLK_PCIE_3GPLL (10)
CLK_PCIE_3GPLL# (10)
DPLL_REF_SSCLK (10)
DPLL_REF_SSCLK# (10)
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
B-test
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
H_DBR#_R
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
CPU_DDR3_DRAMRST# (16)
R183 100/F_4R183 100/F_4
R187 24.9/F_4R187 24.9/F_4
R192 130/F_4R192 130/F_4
R489 *Short_4R489 *Short_4
R488 10K_4R488 10K_4
R487 10K_4R487 10K_4
R486 *Short_4R486 *Short_4
XDP_PRDY# (16)
XDP_PREQ# (16)
XDP_TCLK (16)
XDP_TMS (16)
XDP_TRST# (16)
R188 *Short_4R188 *Short_4
+1.1V_VTT
C3C
PM_EXTTS#0 (14)
PM_EXTTS#1 (15)
STD
DGG^9000024
FOX
DGG^9000022
LTS
SUY
MLX
Standard: rpga989-aca-zif-069-k01-socket
Reverse: PZ98927-364R-01F-SOCKET
XDP_DBRST# (8,16)
XDP_OBS[0:7] (16)
Thermaltrip protect(CPU)
+1.1V_VTT
3
Q13
Q13
PM_THRMTRIP#
2
1 3
FDV301N
FDV301N
1
R209
R209
1K_4
1K_4
2
Q14
Q14
MMBT3904
MMBT3904
SYS_SHDN# (36,46)
DELAY_VR_PWRGOOD(8,37)
A A
PM_THRMTRIP#(11)
VTT PWR_Good(CPU)
MPWROK(35)
+3V
C348
C348
0.1u/10V_4
0.1u/10V_4
R195
3 5
4
U17
U17
TC7SH08FU
TC7SH08FU
R195
2K/F_4
2K/F_4
H_VTTPWRGD
R196
R196
1K_4
1K_4
2
1
pull-up 56ohm close to PCH
5
4
3
Processor pull-up(CPU)
H_CATERR#
H_PROCHOT#_R
H_CPURST#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
4/9 REV:B MODIFY BY DG1.52
+1.5V_CPUVDDQ
R169
R169
1.1K/F_4
1.1K/F_4
R170
R170
3K/F_4
3K/F_4
If S3 leakage circuit is realized, the
PU and PD resistors must be un-staff.
PM_DRAM_PWRGD_R
Use a voltage divider with VDDQ
(1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
rail with 2K and 1K combination.
R162 49.9/F_4R162 49.9/F_4
R494 68_4R494 68_4
R160 *68_4R160 *68_4
R165 *51_4R165 *51_4
R167 *51_4R167 *51_4
R166 *51_4R166 *51_4
R181 *51_4R181 *51_4
R164 51/F_4R164 51/F_4
2
+1.1V_VTT
JTAG MAPPING(CPU)
XDP_TDI_R
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
Scan Chain
(Default)
CPU Only
GMCH Only
R168 *0_4R168 *0_4
R175 *0_4R175 *0_4
R174
R174
*0_4
*0_4
R171 *0_4R171 *0_4
R178 *0_4R178 *0_4
STUFF -> R469, R491, R507
NO STUFF -> R489, R490
STUFF -> R490, R491
NO STUFF -> R469, R489, R507
STUFF -> R489, R507
NO STUFF -> R491, R490, R469
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 1/4
AUBURNDA 1/4
AUBURNDA 1/4
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
1
XDP_TDI (16)
XDP_TDO (16)
ZQ1
ZQ1
ZQ1
448Friday, January 22, 2010
448Friday, January 22, 2010
448Friday, January 22, 2010
1A
1A
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
Arrandale_2(CPU)
M_A_DQ[63:0](14)
D D
C C
B B
M_A_BS#0(14)
M_A_BS#1(14)
M_A_BS#2(14)
M_A_CAS#(14)
M_A_RAS#(14)
M_A_WE#(14)
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
A10
C10
B10
D10
E10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AJ10
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
AC3
AB2
AE1
AB3
AE9
C7
A7
A8
D8
F10
E6
F7
E9
B7
E7
C6
G8
K7
J8
G7
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AJ7
AJ6
AJ9
U7
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)
U28C
U28C
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLK0 (14)
M_A_CLK0# (14)
M_A_CKE0 (14)
M_A_CLK1 (14)
M_A_CLK1# (14)
M_A_CKE1 (14)
M_A_CS#0 (14)
M_A_CS#1 (14)
M_A_ODT0 (14)
M_A_ODT1 (14)
M_A_DM[7:0] (14)
M_A_DQS#[7:0] (14)
M_A_DQS[7:0] (14)
M_A_A[15:0] (14)
3
M_B_DQ[63:0](15)
M_B_BS#0(15)
M_B_BS#1(15)
M_B_BS#2(15)
M_B_CAS#(15)
M_B_RAS#(15)
M_B_WE#(15)
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AM6
AM4
AM3
AR10
AT10
AF3
AG1
AK1
AG4
AG3
AH4
AK3
AK4
AN2
AK5
AK2
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AB1
AC5
AC6
AJ3
AJ4
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
G1
G5
K2
L3
M1
K5
K4
M4
N5
W5
R7
Y7
J6
J3
J2
J1
J5
U28D
U28D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
2
W8
SB_CK[0]
W9
SB_CK#[0]
M3
SB_CKE[0]
V7
SB_CK[1]
V6
SB_CK#[1]
M2
SB_CKE[1]
AB8
SB_CS#[0]
AD6
SB_CS#[1]
AC7
SB_ODT[0]
AD1
SB_ODT[1]
M_B_DM0
D4
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
1
M_B_CLK0 (15)
M_B_CLK0# (15)
M_B_CKE0 (15)
M_B_CLK1 (15)
M_B_CLK1# (15)
M_B_CKE1 (15)
M_B_CS#0 (15)
M_B_CS#1 (15)
M_B_ODT0 (15)
M_B_ODT1 (15)
M_B_DQS#[7:0] (15)
M_B_DQS[7:0] (15)
M_B_DM[7:0] (15)
M_B_A[15:0] (15)
Clarksfield/Auburndale
Clarksfield/Auburndale
Clarksfield/Auburndale
Channel A DQ[15,32,48,54], DM[5]
Requires minimum 12mils spacing
with all other signals, including data signals.
A A
5
4
http://laptop-motherboard-schematic.blogspot.com/
3
Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.
Clarksfield/Auburndale
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 2/4
AUBURNDA 2/4
AUBURNDA 2/4
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZQ1
ZQ1
ZQ1
of
of
of
548Friday, January 22, 2010
548Friday, January 22, 2010
548Friday, January 22, 2010
1
1A
1A
1A
5
Arrandale_3(CPU)
CPU Core Power
+VCC_CORE
ARD:48A
C281
C306
C306
22u/6.3V_8
22u/6.3V_8
C657
C657
22u/6.3V_8
22u/6.3V_8
C299
C299
10u/6.3V_6
10u/6.3V_6
C288
C288
10u/6.3V_6
10u/6.3V_6
C281
+
+
330u/2V_7343
330u/2V_7343
C633
C633
22u/6.3V_8
22u/6.3V_8
C317
C317
22u/6.3V_8
22u/6.3V_8
C646
C646
10u/6.3V_6
10u/6.3V_6
C273
C273
10u/6.3V_6
10u/6.3V_6
C322
C322
+
C645
C645
22u/6.3V_8
22u/6.3V_8
C632
C632
22u/6.3V_8
22u/6.3V_8
C650
C650
C661
C661
C656
C656
22u/6.3V_8
22u/6.3V_8
C320
C320
22u/6.3V_8
22u/6.3V_8
C315
C315
10u/6.3V_6
10u/6.3V_6
C277
C277
10u/6.3V_6
10u/6.3V_6
+
*330u/2V_7343
*330u/2V_7343
D D
10u/6.3V_6
10u/6.3V_6
C C
10u/6.3V_6
10u/6.3V_6
B B
A A
C638
C638
22u/6.3V_8
22u/6.3V_8
C265
C265
22u/6.3V_8
22u/6.3V_8
C647
C647
10u/6.3V_6
10u/6.3V_6
C295
C295
10u/6.3V_6
10u/6.3V_6
C262
C262
+
+
*330u/2V_7343
*330u/2V_7343
10u/6.3V_6
10u/6.3V_6
10u/6.3V_6
10u/6.3V_6
C318
C318
22u/6.3V_8
22u/6.3V_8
C319
C319
22u/6.3V_8
22u/6.3V_8
C272
C272
C327
C327
+
+
C630
C630
22u/6.3V_8
22u/6.3V_8
C658
C658
22u/6.3V_8
22u/6.3V_8
C634
C634
10u/6.3V_6
10u/6.3V_6
C280
C280
10u/6.3V_6
10u/6.3V_6
C304
C304
330u/2V_7343
330u/2V_7343
C631
C631
22u/6.3V_8
22u/6.3V_8
C659
C659
22u/6.3V_8
22u/6.3V_8
C642
C642
10u/6.3V_6
10u/6.3V_6
C641
C641
10u/6.3V_6
10u/6.3V_6
U28F
U28F
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Clarksfield/Auburndale
Clarksfield/Auburndale
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)
5
4
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VTT_SELECT
VSS_SENSE_VTT
SENSE LINES
SENSE LINES
4
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
+VTT_43
J16
+VTT_44
J15
H_PSI#
AN33
PSI#
H_VID0
AK35
H_VID1
AK33
H_VID2
AK34
H_VID3
AL35
H_VID4
AL33
H_VID5
AM33
H_VID6
AM35
H_DPRSLPVR
AM34
H_VTTVID1
G15
H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V
AN35
AJ34
AJ35
VTT_SENSE
B15
VSS_SENSE_VTT
A15
VTT Rail Values are
Auburndal VTT=1.05V
C307
C307
C298
C298
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
C627
C627
C648
C648
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
C651
C651
C623
C623
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
C313
C313
C325
C325
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
R149 *SHORT_4R149 *SHORT_4
R146 *SHORT_4R146 *SHORT_4
(15mils)
C266
C266
1u/6.3V_4
1u/6.3V_4
TP2TP2
R484 100_4R484 100_4
R485 100_4R485 100_4
+VCC_CORE
TP39TP39
TP37TP37
18A
C629
C629
22u/6.3V_8
22u/6.3V_8
C640
C640
10u/6.3V_8
10u/6.3V_8
C249
C249
10u/6.3V_8
10u/6.3V_8
+1.1V_VTT
H_PSI# (37)
H_VID0 (37)
H_VID1 (37)
H_VID2 (37)
H_VID3 (37)
H_VID4 (37)
H_VID5 (37)
H_VID6 (37)
H_DPRSLPVR (37)
I_MON (37)
VCCSENSE (37)
VSSSENSE (37)
+1.1V_VTT
+
+
C248
C248
330u/2V_7343
330u/2V_7343
C662
C662
10u/6.3V_8
10u/6.3V_8
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)
U28G
R194
R194
1K_4
1K_4
R193
R193
*1K_4
*1K_4
U28G
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
J24
VTT1_45
J23
VTT1_46
H25
VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51
H27
VTT1_52
G28
VTT1_53
G27
VTT1_54
G26
VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
Clarksfield/Auburndale
Clarksfield/Auburndale
+1.1V_VTT
R198
R198
R201
R201
*1K_4
*1K_4
*1K_4
*1K_4
R197
R197
R200
R200
1K_4
1K_4
1K_4
1K_4
HFM_VID : Max 1.4V
LFM_VID : Min 0.65V
2
R207
R207
1K_4
1K_4
R206
R206
*1K_4
*1K_4
GRAPHICS
GRAPHICS
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
R501
R501
R203
R203
1K_4
1K_4
*1K_4
*1K_4
R202
R202
R499
R499
1K_4
1K_4
*1K_4
*1K_4
AR22
VAXG_SENSE
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
GFX_VR_EN
GFX_IMON
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68
VCCPLL1
VCCPLL2
VCCPLL3
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
J22
J20
J18
H21
H20
H19
L26
L27
M26
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V1.8V
1.1V1.8V
R500
R500
*1K_4
*1K_4
R498
R498
1K_4
1K_4
VCC_AXG_SENSE (43)
VSS_AXG_SENSE (43)
GFX_VID0 (43)
GFX_VID1 (43)
GFX_VID2 (43)
GFX_VID3 (43)
GFX_VID4 (43)
GFX_VID5 (43)
GFX_VID6 (43)
GFX_ON (43)
GFX_DPRSLPVR (43)
GFX_IMON (43)
ARD:3A
+1.5V_CPUVDDQ
C329
C329
C321
C331
C331
1u/6.3V_4
1u/6.3V_4
C312
C312
22u/6.3V_8
22u/6.3V_8
C275
C275
10u/6.3V_6
10u/6.3V_6
C624
C624
22u/6.3V_8
22u/6.3V_8
C270
C270
1u/6.3V_4
1u/6.3V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 3/4 (PWR)
AUBURNDA 3/4 (PWR)
AUBURNDA 3/4 (PWR)
Date: Sheet
Date: Sheet
Date: Sheet
C321
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
+
+
C283
C283
C260
C260
22u/6.3V_8
22u/6.3V_8
330u/2V_7343
330u/2V_7343
C264
C264
10u/6.3V_6
10u/6.3V_6
C625
C625
22u/6.3V_8
22u/6.3V_8
C271
C271
C258
C258
1u/6.3V_4
1u/6.3V_4
2.2u/6.3V_6
2.2u/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
C301
C301
1u/6.3V_4
1u/6.3V_4
+1.1V_VTT
C257
C257
4.7u/10V_6
4.7u/10V_6
ZQ1
ZQ1
ZQ1
C296
C296
1u/6.3V_4
1u/6.3V_4
0.6A
C253
C253
22u/6.3V_8
22u/6.3V_8
648Friday, January 22, 2010
648Friday, January 22, 2010
648Friday, January 22, 2010
+1.8V
of
of
of
1A
1A
1A
22A
+VGFX_AXG
+1.1V_VTT
3
+
+
+1.1V_VTT
C635
C635
22u/6.3V_8
22u/6.3V_8
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_DPRSLPVR
H_PSI#
Note:
For Validating IMVP VR R6451 should be STUFF
and R2N1 NO_STUFF
C682
C682
330u/2V_7343
330u/2V_7343
C357
C357
*22u/6.3V_8
*22u/6.3V_8
C679
C679
*10u/6.3V_8
*10u/6.3V_8
C291
C291
22u/6.3V_8
22u/6.3V_8
+
+
C681
C681
330u/2V_7343
330u/2V_7343
C351
C351
22u/6.3V_8
22u/6.3V_8
C353
C353
10u/6.3V_8
10u/6.3V_8
C267
C267
22u/6.3V_8
22u/6.3V_8
C279
C279
22u/6.3V_8
22u/6.3V_8
R191
R191
1K_4
1K_4
R190
R190
*1K_4
*1K_4
C328
C328
22u/6.3V_8
22u/6.3V_8
C352
C352
10u/6.3V_8
10u/6.3V_8
C626
C626
22u/6.3V_8
22u/6.3V_8
C268
C268
22u/6.3V_8
22u/6.3V_8
R186
R186
1K_4
1K_4
R185
R185
*1K_4
*1K_4
http://laptop-motherboard-schematic.blogspot.com/
5
Arrandale_4(CPU)
D D
C C
B B
Processor Strapping
U28H
U28H
AT20
VSS1
AT17
VSS2
AR31
VSS3
AR28
VSS4
AR26
VSS5
AR24
VSS6
AR23
VSS7
AR20
VSS8
AR17
VSS9
AR15
VSS10
AR12
VSS11
AR9
VSS12
AR6
VSS13
AR3
VSS14
AP20
VSS15
AP17
VSS16
AP13
VSS17
AP10
VSS18
AP7
VSS19
AP4
VSS20
AP2
VSS21
AN34
VSS22
AN31
VSS23
AN23
VSS24
AN20
VSS25
AN17
VSS26
AM29
VSS27
AM27
VSS28
AM25
VSS29
AM20
VSS30
AM17
VSS31
AM14
VSS32
AM11
VSS33
AM8
VSS34
AM5
VSS35
AM2
VSS36
AL34
VSS37
AL31
VSS38
AL23
VSS39
AL20
VSS40
AL17
VSS41
AL12
VSS42
AL9
VSS43
AL6
VSS44
AL3
VSS45
AK29
VSS46
AK27
VSS47
AK25
VSS48
AK20
VSS49
AK17
VSS50
AJ31
VSS51
AJ23
VSS52
AJ20
VSS53
AJ17
VSS54
AJ14
VSS55
AJ11
VSS56
AJ8
VSS57
AJ5
VSS58
AJ2
VSS59
AH35
VSS60
AH34
VSS61
AH33
VSS62
AH32
VSS63
AH31
VSS64
AH30
VSS65
AH29
VSS66
AH28
VSS67
AH27
VSS68
AH26
VSS69
AH20
VSS70
AH17
VSS71
AH13
VSS72
AH9
VSS73
AH6
VSS74
AH3
VSS75
AG10
VSS76
AF8
VSS77
AF4
VSS78
AF2
VSS79
AE35
VSS80
Clarksfield/Auburndale
Clarksfield/Auburndale
VSS
VSS
The CFG signals have a default value of '1' if not terminated on the board.
AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
AE34
VSS81
AE33
VSS82
AE32
VSS83
AE31
VSS84
AE30
VSS85
AE29
VSS86
AE28
VSS87
AE27
VSS88
AE26
VSS89
AE6
VSS90
AD10
VSS91
AC8
VSS92
AC4
VSS93
AC2
VSS94
AB35
VSS95
AB34
VSS96
AB33
VSS97
AB32
VSS98
AB31
VSS99
AB30
VSS100
AB29
VSS101
AB28
VSS102
AB27
VSS103
AB26
VSS104
AB6
VSS105
AA10
VSS106
Y8
VSS107
Y4
VSS108
Y2
VSS109
W35
VSS110
W34
VSS111
W33
VSS112
W32
VSS113
W31
VSS114
W30
VSS115
W29
VSS116
W28
VSS117
W27
VSS118
W26
VSS119
W6
VSS120
V10
VSS121
U8
VSS122
U4
VSS123
U2
VSS124
T35
VSS125
T34
VSS126
T33
VSS127
T32
VSS128
T31
VSS129
T30
VSS130
T29
VSS131
T28
VSS132
T27
VSS133
T26
VSS134
T6
VSS135
R10
VSS136
P8
VSS137
P4
VSS138
P2
VSS139
N35
VSS140
N34
VSS141
N33
VSS142
N32
VSS143
N31
VSS144
N30
VSS145
N29
VSS146
N28
VSS147
N27
VSS148
N26
VSS149
N6
VSS150
M10
VSS151
L35
VSS152
L32
VSS153
L29
VSS154
L8
VSS155
L5
VSS156
L2
VSS157
K34
VSS158
K33
VSS159
K30
VSS160
10
A A
CFG4
(Display Port
Presence)
CFG0
(PCI-Epress
Configuration Select)
CFG3
(PCI-Epress Static
Lane Reversal)
Disabled; No Physical Display Port
attached to Embedded Diplay Port
Single PEG
Normal Operation Lane Numbers Reversed
5
Enabled; An external Display port
device is connected to the Embedded
Display port
Bifurcation enabled
U28I
U28I
K27
VSS161
K9
VSS162
K6
VSS163
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
Clarksfield/Auburndale
Clarksfield/Auburndale
4
VSS
VSS
AT35
VSS_NCTF1
AT1
VSS_NCTF2
AR34
VSS_NCTF3
B34
VSS_NCTF4
B2
VSS_NCTF5
B1
VSS_NCTF6
A35
VSS_NCTF7
NCTF
NCTF
CFG[ 1:0 ] - PCI_Epress Configuration Select
* 11= 1 x 16 PEG
* 10= 2 x 8 PEG
4
TP42TP42
TP41TP41
TP1TP1
3
VREF_DQ_DIMM0(14)
VREF_DQ_DIMM1(15)
Use RVS type
3
2
U28E
U28E
RSVD32
AP25
RSVD1
AL25
RSVD2
AL24
RSVD3
AL22
RSVD4
AJ33
RSVD5
AG9
RSVD6
M27
RSVD7
L28
RSVD8
J17
SA_DIMM_VREF
H17
SB_DIMM_VREF
G25
RSVD11
G17
RSVD12
E31
RSVD13
E30
RSVD14
CFG0
AM30
CFG[0]
AM28
CFG[1]
AP31
CFG3
CFG4
CFG7
TP40TP40
TP38TP38
CFG4
R157 *3.01K/F_4R157 *3.01K/F_4
CFG0
R495 *3.01K/F_4R495 *3.01K/F_4
CFG3
R496 3.01K/F_4R496 3.01K/F_4
CFG7
R497 *3.01K/F_4R497 *3.01K/F_4
The Clarkfield processor's PCI Express interface may not meet
PCI Express 2.0 jitter specifications. Intel recommends
placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin
for both rPGA and BGA components. This pull down resistor
should be removed when this issue is fixed.(ES1 only)
CFG[2]
AL32
CFG[3]
AL30
CFG[4]
AM31
CFG[5]
AN29
CFG[6]
AM32
CFG[7]
AK32
CFG[8]
AK31
CFG[9]
AK28
CFG[10]
AJ28
CFG[11]
AN30
CFG[12]
AN32
CFG[13]
AJ32
CFG[14]
AJ29
CFG[15]
AJ30
CFG[16]
AK30
CFG[17]
H16
RSVD_TP_86
B19
RSVD15
A19
RSVD16
A20
RSVD17
B20
RSVD18
U9
RSVD19
T9
RSVD20
AC9
RSVD21
AB9
RSVD22
C1
RSVD_NCTF_23
A3
RSVD_NCTF_24
J29
RSVD26
J28
RSVD27
A34
RSVD_NCTF_28
A33
RSVD_NCTF_29
C35
RSVD_NCTF_30
B35
RSVD_NCTF_31
Clarksfield/Auburndale
Clarksfield/Auburndale
RESERVED
RESERVED
2
RSVD33
RSVD34
RSVD35
RSVD36
RSVD_NCTF_37
RSVD38
RSVD39
RSVD_NCTF_40
RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
RSVD_TP_59
RSVD_TP_60
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
1
AJ13
AJ12
AH25
AK26
AL26
AR2
AJ26
AJ27
AP1
AT2
AT3
AR1
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
E15
F15
A2
KEY
D15
C15
AJ15
TP4TP4
AH15
TP3TP3
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
VSS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
TP43TP43
AP34 can be NC on CRB; EDS/DG suggestion to GND
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
AUBURNDA 4/4
AUBURNDA 4/4
AUBURNDA 4/4
ZQ1
ZQ1
ZQ1
1
of
of
of
748Friday, January 22, 2010
748Friday, January 22, 2010
748Friday, January 22, 2010
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
PCH1(CLG)
5
4
3
2
1
IBEX PEAK-M (DMI,FDI,GPIO)
U35C
U35C
ACIN_R
PM_BATLOW#
PM_RI#
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_DN_ACK / GPIO30
P5
PWRBTN#
P7
ACPRESENT / GPIO31
A6
BATLOW# / GPIO72
F14
RI#
IbexPeak-M_R1P0
IbexPeak-M_R1P0
DMI
FDI
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
DMI_RXN0(4)
+1.05V
SYS_PWROK
ICH_RSMRST#(35)
DNBSWON#(35)
PM_PWRBTN#_R(16)
DMI_RXN1(4)
DMI_RXN2(4)
DMI_RXN3(4)
DMI_RXP0(4)
DMI_RXP1(4)
DMI_RXP2(4)
DMI_RXP3(4)
PCH_ACIN(35)
DMI_TXN0(4)
DMI_TXN1(4)
DMI_TXN2(4)
DMI_TXN3(4)
DMI_TXP0(4)
DMI_TXP1(4)
DMI_TXP2(4)
DMI_TXP3(4)
R548 49.9/F_4R548 49.9/F_4
B-test
R351 *Short_4R351 *Short_4
R354 *Short_4R354 *Short_4
R353 *Short_4R353 *Short_4
R355 *Short_4R355 *Short_4
B-test
R622 *Short_4R622 *Short_4
R356 *0_4R356 *0_4
DMI_COMP
XDP_DBRST#_R
SYS_PWROK_R
PCHPWROK
MEPWROK
RSV_ICH_LAN_RST#
ICH_RSMRST#
SUS_PWR_ACK_R
D D
C C
XDP_DBRST#(4,16)
PM_DRAM_PWRGD(16)
B B
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
SLP_S4#
SLP_S3#
SLP_M#
TP23
PMSYNCH
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
BJ14
BF13
BH13
BJ12
BG14
J12
Y1
P8
F3
E4
H7
P12
K8
N2
BJ10
F6
PCIE_WAKE#
CLKRUN#
SUS_STAT#
SLP_S5#_R
SLP_M#
PM_SLP_LAN#
FDI_TXN0 (4)
FDI_TXN1 (4)
FDI_TXN2 (4)
FDI_TXN3 (4)
FDI_TXN4 (4)
FDI_TXN5 (4)
FDI_TXN6 (4)
FDI_TXN7 (4)
FDI_TXP0 (4)
FDI_TXP1 (4)
FDI_TXP2 (4)
FDI_TXP3 (4)
FDI_TXP4 (4)
FDI_TXP5 (4)
FDI_TXP6 (4)
FDI_TXP7 (4)
FDI_INT (4)
FDI_FSYNC0 (4)
FDI_FSYNC1 (4)
FDI_LSYNC0 (4)
FDI_LSYNC1 (4)
PCIE_WAKE# (27)
CLKRUN# (35)
TP35TP35 T104T104
ICH_SUSCLK (35)
TP36TP36
SUSC# (35)
SUSB# (35)
R339 *0_4R339 *0_4
TP50TP50
PM_SYNC (4)
INT_LVDS_BLON(25)
INT_LVDS_DIGON(25)
INT_LVDS_BRIGHT(25)
INT_LVDS_EDIDCLK(25)
INT_LVDS_EDIDDATA(25)
INT_TXLCLKOUT-(25)
INT_TXLCLKOUT+(25)
INT_TXLOUT0-(25)
INT_TXLOUT1-(25)
INT_TXLOUT2-(25)
INT_TXLOUT0+(25)
INT_TXLOUT1+(25)
INT_TXLOUT2+(25)
INT_CRT_BLU(25)
INT_CRT_GRN(25)
INT_CRT_RED(25)
INT_CRT_DDCCLK(25)
INT_CRT_DDCDAT(25)
R259 10K_4R259 10K_4
+3V
R256 10K_4R256 10K_4
R272 2.37K/F_4R272 2.37K/F_4
T56T56
T59T59
T53T53
T58T58
T101T101
T54T54
T57T57
ramp remove short pad
INT_HSYNC(25)
INT_VSYNC(25)
INT_TXLCLKOUTÂINT_TXLCLKOUT+
INT_TXLOUT0ÂINT_TXLOUT1ÂINT_TXLOUT2-
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_TXUCLKOUTÂINT_TXUCLKOUT+
INT_TXUOUT0ÂINT_TXUOUT1ÂINT_TXUOUT2-
INT_TXUOUT0+
INT_TXUOUT1+
INT_TXUOUT2+
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
C-test
DAC_IREF
R248
R248
1K/F_4
1K/F_4
IBEX PEAK-M (LVDS,DDI)
U35D
U35D
AB48
AB46
AP39
AP41
AT43
AT42
AV53
AV51
BB47
BA52
AY48
AV47
BB48
BA50
AY49
AV48
AP48
AP47
AY53
AT49
AU52
AT53
AY51
AT48
AU50
AT51
AA52
AB53
AD53
AD48
AB51
T48
T47
Y48
Y45
V48
V51
V53
Y53
Y51
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
IbexPeak-M_R1P0
IbexPeak-M_R1P0
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT
CRT
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46
BG46
BJ48
BG48
BF45
BH45
T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
INT_HDMITX2N_R
INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R
SDVO_CTRLCLK (26)
SDVO_CTRLDAT (26)
C409 0.1u/10V_4C409 0.1u/10V_4
C413 0.1u/10V_4C413 0.1u/10V_4
C417 0.1u/10V_4C417 0.1u/10V_4
C423 0.1u/10V_4C423 0.1u/10V_4
C426 0.1u/10V_4C426 0.1u/10V_4
C431 0.1u/10V_4C431 0.1u/10V_4
C404 0.1u/10V_4C404 0.1u/10V_4
C405 0.1u/10V_4C405 0.1u/10V_4
R place close to PCH
R241 150/F_4R241 150/F_4
R240 150/F_4R240 150/F_4
R243 150/F_4R243 150/F_4
INT_HDMI_HPD (26)
INT_HDMITX2N (26)
INT_HDMITX2P (26)
INT_HDMITX1N (26)
INT_HDMITX1P (26)
INT_HDMITX0N (26)
INT_HDMITX0P (26)
INT_HDMICLK- (26)
INT_HDMICLK+ (26)
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
PCH Pull-high/low(CLG) System PWR_OK(CLG)
+3V
CLKRUN#
A A
XDP_DBRST#_R
ICH_RSMRST#
RSV_ICH_LAN_RST#
SYS_PWROK ACIN_R
R605 8.2K_4R605 8.2K_4
R350 1K_4R350 1K_4
R303 10K_4R303 10K_4
R594 10K_4R594 10K_4
R352 10K_4R352 10K_4
5
PM_RI#
PM_BATLOW#
PCIE_WAKE#
PM_SLP_LAN#
SUS_PWR_ACK_R
R305 10K_4R305 10K_4
R615 8.2K_4R615 8.2K_4
R304 10K_4R304 10K_4
R326 *10K_4R326 *10K_4
R592 10K_4R592 10K_4
R357 10K_4R357 10K_4
+3V_S5
4
10/5 modify
SYS_PWROK
3
U39
U39
TC7SH08FU
TC7SH08FU
+3V_S5
4
C797 *0.1u/10V_4C797 *0.1u/10V_4
DELAY_VR_PWRGOOD need PU 2K to +3V.
PU at power side
53
1
2
R593 100K_4R593 100K_4
DELAY_VR_PWRGOOD (4,37)
PWROK_EC (35)
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 1/6
IBEX PEAK-M 1/6
IBEX PEAK-M 1/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZQ1
ZQ1
ZQ1
848Friday, January 22, 2010
848Friday, January 22, 2010
848Friday, January 22, 2010
of
of
1
of
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
5
RTC Circuitry(RTC)
+VCCRTC
D18
20mils
D18
BAT54C
BAT54C
1 3
2
20MIL
RTC_N01
Q34
Q34
MMBT3904
MMBT3904
RTC_N03
R531 20K/F_4R531 20K/F_4
30mils
R527 20K/F_4R527 20K/F_4
C723
C723
1u/6.3V_4
1u/6.3V_4
R545 20K_6R545 20K_6
C727
C727
1u/6.3V_4
1u/6.3V_4
C720
C720
1u/6.3V_4
1u/6.3V_4
R541
R541
68.1K/F_4
68.1K/F_4
R537
R537
150K/F_6
150K/F_6
RTC_RST#
12
J1
J1
*SHORT_ PAD
*SHORT_ PAD
SRTC_RST#
12
J2
J2
*SHORT_ PAD
*SHORT_ PAD
+5V_S5
+3VPCU
VCCRTC_1
20MIL
D D
R533
R533
1K_4
1K_4
VCCRTC_2
20MIL
12
CN22
CN22
RTC_ML2032
RTC_ML2032
HDA Bus(CLG)
C-test
8
R608 3.3K/F_4R608 3.3K/F_4
7
4
ACZ_SYNCACZ_SYNC
ACZ_RST#
ACZ_SDOUTACZ_SDOUT
ACZ_BIT_CLKACZ_BIT_CLK
+3V
C796
C796
0.1u/10V_4
0.1u/10V_4
SPI_SO
R538 33_4R538 33_4
R534 33_4R534 33_4
R542 33_4R542 33_4
R536 33_4R536 33_4
C740
C740
*27p/50V_4
*27p/50V_4
U40
U40
1
CE#
VDD
6
SCK
5
SI
2
SO
HOLD#
3
WP#
VSS
W25Q32BVSSIG
W25Q32BVSSIG
C C
B B
PCH SPI(CLG)
A A
PCH_AZ_CODEC_SYNC(30)
PCH_AZ_CODEC_RST#(30)
PCH_AZ_CODEC_SDOUT(30)
PCH_AZ_CODEC_BITCLK(30)
Place all series terms close to PCH except for SDIN input
lines,which should be close to source.Placement of
R should equal distance to the T split trace point.
Basically, keep the same distance from T for all series
termination resistors.
SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO_R
R609 *Short_4R609 *Short_4
B-test
+3V
C803
C803
*22p/50V_4
*22p/50V_4
R611 3.3K/F_4R611 3.3K/F_4
5
4
PCH2(CLG)
PCH Strap Table
4
C465 15p/50V_4C465 15p/50V_4
C463 15p/50V_4C463 15p/50V_4
+VCCRTC
HDA_SYNC (PCH strap pin)
Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V
PCH_AZ_CODEC_SDIN0(30)
+3V_S5
HDMI_HPD_PCH#(26)
B-test
R589 *10K_4R589 *10K_4
+3VPCU
Pin Name Strap description
SPKR
INIT3_3V
GNT3# / GPIO55
INTVRMEN
GNT1# / GPIO51
GNT0#
GNT2# / GPIO53
NV_ALE
NV_CLE
HDA_DOCK_EN#/GPIO33
SPI_MOSI
HDA_SDO
GPIO8
GPIO27
HDA_SYNC
GPIO15
No reboot mode setting PWROK
Reserved
Integrated 1.05V VRM enable ALWAYS
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
ESI strap (Server only)
Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 32ohm)
DMI Termination voltage weak pull-down 32ohm
Flash Descriptor Security
iTPM function Disable MEPWROK 0 = Default (weak pull-down 20K)
Reserved
Reserved
On-die PLL Voltage Regulator
On-die PLL PWR supply select RSMRST#
Reserved RSMRST#
http://laptop-motherboard-schematic.blogspot.com/
14
23
Y1
32.768KHzY132.768KHz
R570 1M_4R570 1M_4
SPKR(30)
R289 *10K_4R289 *10K_4
TP52TP52
TP51TP51
TP48TP48
TP49TP49
TP47TP47
PWROK
PWROKTop-Block Swap Override
PWROK
PWROK
PWROK
PWROK
PWROK
RSMRST#
RSMRST#
RSMRST#
3
R311
R311
10M_4
10M_4
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
HDA_DOCK_EN#
PCH_GPIO13
PCH_GPIO13
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
SPI_CLK_R
SPI_CS0#_R
SPI_CS1#
SPI_SI_R
SPI_SO_R
Sampled
3
IBEX PEAK-M (HDA,JTAG,SATA)
U35A
RTC_X1
RTC_X2
TP13TP13
TP12TP12
TP11TP11
U35A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IbexPeak-M_R1P0
IbexPeak-M_R1P0
RTCIHDA
RTCIHDA
SPI JTAG
SPI JTAG
Configuration
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
1 = Default (weak pull-up 20K)
Should not be pull-down
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
Should be always pull-up
Boot Location
GNT0#GNT1#
SPI
11
PCI
01
00
Should not be pull-down
(weak pull-up 20K)
0 = Override
1 = Default (weak pull-up 20K)
1 = Enable
Should not be pull-up
(weak pull-down 20K)
Should not be pull-down
(weak pull-up 20K)
0 = Disable
1 = Enable (weak pull-up 20K)
0 = 1.8V supply (weak pull-down 20K)
1 = 1.5V supply
0 = TLS no Confidentiality
(weak pull-down 20K)
1 = TLS Confidentiality
LPC
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
LPC
LPC
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
+3V
+VCCRTC
Default weak pull-up on GNT0/1#
[Need external pull-down for LPC BIOS]
+3V
+1.8V
+1.8V
+3V
+3V
+3V_S5
use defaul (0 = 1.8V supply)
+3V_S5
2
D33
B33
C32
A32
C34
PCH_DRQ#0
A34
F34
AB9
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
AF15
T3
Y9
V1
PCH_DRQ#1
SATA_TXN0_C
SATA_TXP0_C
SATA_TXN1_C
SATA_TXP1_C
SATA_RX4N_C
SATA_RX4P_C
SATA_TXN4_C
SATA_TXP4_C
TP44TP44
TP10TP10
R342 10K_4R342 10K_4
C425 0.01u/16V_4C425 0.01u/16V_4
C432 0.01u/16V_4C432 0.01u/16V_4
CAP. Close connect side
C284 0.01u/16V_4C284 0.01u/16V_4
C290 0.01u/16V_4C290 0.01u/16V_4
Note:
SATA port2/3 may not be available on all PCH sku
(HM55 support 4port only)
TP30TP30
TP27TP27
TP32TP32
TP33TP33
SATA_COMP
R302 37.4/F_4R302 37.4/F_4
R344 *10K_4R344 *10K_4
R624 10K_4R624 10K_4
+3V
ZQ1 note
R601 *10K_4R601 *10K_4
R517 *10K_4R517 *10K_4
R567 330K_4R567 330K_4
R249 1K_4R249 1K_4
R245 1K_4R245 1K_4
R255 *1K_4R255 *1K_4
R254 *1K_4R254 *1K_4
SPKR
PCI_GNT3# (10)
PCH_INVRMEN
C-test
PCI_GNT0# (10)
PCI_GNT1# (10)
USE GPIO PIN
R627 *1K_4R627 *1K_4
R349 1K_4R349 1K_4
2
NV_ALE
NV_CLE
NV_ALE (10)
NV_CLE (10)
HDA_DOCK_EN#
SPI_SI_R
RSV_GPIO8 (11)
CR_WAKE# (11)
R590 *1K_4R590 *1K_4
R591 *1K_4R591 *1K_4
R277 *1K_4R277 *1K_4
R273 *10K_4R273 *10K_4
R340 10K_4R340 10K_4
1
LPC_LAD0 (28,35)
LPC_LAD1 (28,35)
LPC_LAD2 (28,35)
LPC_LAD3 (28,35)
LPC_LFRAME# (28,35)
+3V
IRQ_SERIRQ (35)
SATA_RX0- (29)
SATA_RX0+ (29)
SATA_TX0- (29)
SATA_TX0+ (29)
SATA_RX1- (29)
SATA_RX1+ (29)
SATA_TX1- (29)
SATA_TX1+ (29)
+1.05V
SATA_ACT# (33)
PCH_ODD_EN (29)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 2/6
IBEX PEAK-M 2/6
IBEX PEAK-M 2/6
Date: Sheet
Date: Sheet
Date: Sheet
SATA HDD
SATA ODD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZQ1
ZQ1
ZQ1
1
1A
1A
948Friday, January 22, 2010
948Friday, January 22, 2010
948Friday, January 22, 2010
1A
of
of
of
5
PCH3(CLG)
D D
C C
B B
dGPU_SELECT#(25)
PCI_GNT0#(9)
PCI_GNT1#(9)
PWM_SELECT#(25)
PCI_GNT3#(9)
PCI_RST#(28)
TP9TP9
TP31TP31
CLK_LPC_DEBUG(28)
CLK_PCI_775(35)
R520 22_4R520 22_4
R250 22_4R250 22_4
CLK_PCI_FB CLK_PCI_FB_C
R251 22_4R251 22_4
IBEX PEAK-M (PCI,USB,NVRAM)
U35E
U35E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1# / GPIO50
B45
REQ2# / GPIO52
M53
REQ3# / GPIO54
F48
GNT0#
K45
GNT1# / GPIO51
F36
GNT2# / GPIO53
H53
GNT3# / GPIO55
B41
PIRQE# / GPIO2
K53
PIRQF# / GPIO3
A36
PIRQG# / GPIO4
A48
PIRQH# / GPIO5
K6
PCIRST#
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCI4
IbexPeak-M_R1P0
IbexPeak-M_R1P0
PCI_GNT0#
PCI_GNT1#
PCI_GNT3#
T103T103
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ0#
PCI_REQ1#
dGPU_SELECT#
PCI_REQ3#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_RST#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_FRAME#
PCI_PLOCK#
PCI_STOP#
PCI_TRDY#
ICH_PME#
PCI_PLTRST#
CLK_PCI_PCCARD
CLK_PCI_775_CCLK_PCI_775_C
PCI
PCI
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NVRAM
NVRAM
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USB
USB
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
AY9
BD1
AP15
BD8
AV9
BG8
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
AY6
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
D25
N16
J16
F16
L16
E14
G16
F12
T15
4
NV_ALE
NV_CLE
USBP0ÂUSBP0+
USBP2ÂUSBP2+
USBP6ÂUSBP6+
USBP7ÂUSBP7+
USB_BIAS
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#CLK_LPC_DEBUG_C
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
NV_ALE (9)
NV_CLE (9)
Port1 and port9 can be used on debug mode
TP24TP24
TP26TP26
USBP1- (32)
USBP1+ (32)
TP21TP21
TP14TP14
USBP3- (32)
USBP3+ (32)
USBP4- (32)
USBP4+ (32)
USBP5- (28)
USBP5+ (28)
TP17TP17
TP16TP16
TP15TP15
TP18TP18
USBP8- (25)
USBP8+ (25)
USBP9- (32)
USBP9+ (32)
USBP10- (28)
USBP10+ (28)
USBP11- (32)
USBP11+ (32)
USBP12- (31)
USBP12+ (31)
USBP13- (28)
USBP13+ (28)
R293
R293
MB USB
USB/B-USB1-3
BLUETOOTH
Reserved SIM USB
USB port6/7 may not be available on all PCH sku
(HM55 support 12port only)
Camera
USB/B-USB1-2
Mini Card (3G)
USB/B-USB1-1
Card Reader
Mini Card (WLAN)
22.6/F_4
22.6/F_4
R290 *Short_4R290 *Short_4
R316 *Short_4R316 *Short_4
R285 *Short_4R285 *Short_4
R291 *Short_4R291 *Short_4
C-test
EHCI1
B-test
EHCI2
USB_OC0# (32)
USB_OC1# (32)
USB_OC4_5# (32)
3
8/13 Swap Lan and WLAN/ Lan chagne to port 1
PCIE_RX1-(27)
LAN
Mini 3G
MiniWLAN
Mini 3G
MiniWLAN
BOARD_ID0
RSV_GPIO8
LAN
PCIE_RX1+(27)
PCIE_TX1-(27)
PCIE_TX1+(27)
PCIE_RX2-(28)
PCIE_RX2+(28)
PCIE_TX2-(28)
PCIE_TX2+(28)
PCIE_RX6-(28)
PCIE_RX6+(28)
PCIE_TX6-(28)
PCIE_TX6+(28)
Note:
PCIE port7/8 may not be available on all PCH sku
(HM55 support 6port only)
CLK_PCH_SRC1#(28)
CLK_PCH_SRC1(28)
CLKREQ_3G#(28)
CLK_PCH_SRC2#(28)
CLK_PCH_SRC2(28)
CLKREQ_WLAN#(28)
High = JV41/JM41
Low = JM51
High = Disable
Low = Enable
CLK_PCIE_LOM#(27)
CLK_PCIE_LOM(27)
CLK_PCIE_LAN_REQ#(27)
C741 0.1u/10V_4C741 0.1u/10V_4
C737 0.1u/10V_4C737 0.1u/10V_4
C438 0.1u/10V_4C438 0.1u/10V_4
C435 0.1u/10V_4C435 0.1u/10V_4
B-test
C420 0.1u/10V_4C420 0.1u/10V_4
C424 0.1u/10V_4C424 0.1u/10V_4
1/21 ramp remove CLK TP
R237 *0_4R237 *0_4
R236 *0_4R236 *0_4
R348 *0_4R348 *0_4
R235 *Short_4R235 *Short_4
R234 *Short_4R234 *Short_4
R620 *Short_4R620 *Short_4
B-test
1/21 ramp remove CLK TP
B-test
R515 *Short_4R515 *Short_4
R516 *Short_4R516 *Short_4
CLK_PCIE_LAN_REQ#
2
IBEX PEAK-M (PCI-E,SMBUS,CLK)
U35B
U35B
BG30
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_C
PCIE_TXP2_C
T72T72
T71T71
T65T65
T70T70
T66T66
T67T67
T68T68
T69T69
T114T114
PCIE_TXN6_C
PCIE_TXP6_C
CLK_PCIE_REQ0#
CLK_PCH_SRC1N
CLK_PCH_SRC1P
CLK_PCIE_REQ1#
CLK_PCH_SRC2N
CLK_PCH_SRC2P
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
CLK_PCH_SRC6N
CLK_PCH_SRC6P
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0# / GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1# / GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2# / GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4# / GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5# / GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ# / GPIO56
IbexPeak-M_R1P0
IbexPeak-M_R1P0
PCI-E*
PCI-E*
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1ALERT# / GPIO74
SMBus
SMBus
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
Controller
Controller
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
PEG
PEG
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
From CLK BUFFER
From CLK BUFFER
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
Clock Flex
Clock Flex
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
B9
H14
C8
J14
C6
G8
M14
E10
G12
CL_CLK1
T13
CL_DATA1
T11
CL_RST1#
T9
PEG_CLKREQ#_R
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
J42
AH51
AH53
XCLK_RCOMP
AF38
T45
P43
T42
N50
RSV_SMBALERT#
ICH_SMBCLK
ICH_SMBDATA
RSV_SML0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0
RSV_SML1ALERT#
SMB_CLK_ME1
SMB_DATA_ME1
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
R260 90.9/F_4R260 90.9/F_4
BOARD_ID1
BOARD_ID2
BOARD_ID3
R519 SW@10K_4R519 SW@10K_4
1
ICH_SMBCLK (3,16,28)
ICH_SMBDATA (3,16,28)
SMB_CLK_ME0 (27)
SMB_DATA_ME0 (27)
R330 *0_4R330 *0_4
For LAN
SML1ALERT# (11,34,35)
For EC
CL_CLK1 (28)
CL_DATA1 (28)
CL_RST1# (28)
R599 *SW@0_4R599 *SW@0_4
dGPU_EDIDSEL# (25)
+3V
May be remove is OK
PEG_CLKREQ# (18)
PEG_A_CLKRQ# PD for FreeRun, due GPU not support.
CLK_PCIE_VGA# (17)
CLK_PCIE_VGA (17)
CLK_PCIE_3GPLL# (4)
CLK_PCIE_3GPLL (4)
DPLL_REF_SSCLK# (4)
DPLL_REF_SSCLK (4)
CLK_BUF_PCIE_3GPLL# (3)
CLK_BUF_PCIE_3GPLL (3)
CLK_BUF_BCLK# (3)
CLK_BUF_BCLK (3)
CLK_BUF_DREFCLK# (3)
CLK_BUF_DREFCLK (3)
CLK_BUF_DREFSSCLK# (3)
CLK_BUF_DREFSSCLK (3)
CLK_ICH_14M (3)
+1.05V
B-test
No stuff XTAL25_IN and XTAL25_OUT circuitry
until integrated CG becomes PCH POR.
INTEL FAE: If having UMA digital display
(eDP/DP/DVI/HDMI), then 25MHz is required.
R512
R512
1M_4
1M_4
C3B
C695 10P/50V_4C695 10P/50V_4
21
Y4
25MHzY425MHz
C696 10P/50V_4C696 10P/50V_4
PLTRST#(CLG)
Add Buffers as needed for
+3V_S5
Loading and fanout concerns.
C470
C470
0.1u/10V_4
0.1u/10V_4
PCI_PLTRST#
2
4
A A
1
U18
U18
3 5
TC7SH08FU
TC7SH08FU
5
R331
R331
100K_4
100K_4
PLTRST# (4,11,27,28,31,35)
PCI/USBOC# Pull-up(CLG) CLK_REQ/Strap Pin(CLG) SMBus/Pull-up(CLG)
+3V_S5
+3V
+3V_S5
R595 10K_4R595 10K_4
R596 10K_4R596 10K_4
R598 10K_4R598 10K_4
R329 10K_4R329 10K_4
R619 10K_4R619 10K_4
R603 10K_4R603 10K_4
R621 10K_4R621 10K_4
R247 10K_4R247 10K_4
R262 8.2K_4R262 8.2K_4
R518 8.2K_4R518 8.2K_4
R263 8.2K_4R263 8.2K_4
R617 IV@10K_4R617 IV@10K_4
R618 SW@10K_4R618 SW@10K_4
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
CLK_PCIE_LAN_REQ#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
dGPU_SELECT#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PEG_CLKREQ#_R
3
USB_OC7#
USB_OC6#
USB_OC5#
USB_OC4#
+3V_S5
PCI_REQ0#
PCI_PIRQB#
PCI_REQ3#
PCI_PIRQD#
+3V
PCI_PLOCK#
PCI_SERR#
PCI_DEVSEL#
PCI_STOP#
+3V
6
7
8
9
10
6
7
8
9
10
6
7
8
9
10
RP2
RP2
8.2K_10P8R
8.2K_10P8R
RP4
RP4
8.2K_10P8R
8.2K_10P8R
RP1
RP1
8.2K_10P8R
8.2K_10P8R
4
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
PCI_PIRQH#
PCI_TRDY#
PCI_FRAME#
PCI_REQ1#
PCI_PERR#
PCI_PIRQC#
PCI_IRDY#
PCI_PIRQA#
+3V_S5
+3V
+3V
5
4
3
2
1
5
4
3
2
1
5
4
3
2
1
PEG_A_CLKRQ# PD for FreeRun, due GPU not support.
A16 swap override Strap/Top-Block
Swap Override jumper
Low = A16 swap
override/Top-Block
PCI_GNT3#
Swap Override enabled
High = Default
Boot BIOS Strap
GNT0# GNT1#
0
0
1
1
Danbury Technology Enabled
NV_ALE
DMI Termination Voltage
NV_CLE
Boot BIOS Location
0
LPC
1
Reserved (NAND)
PCI
0
SPI
1
High = Enable
Low = Disable
Set to Vcc when LOW
Set to Vcc/2 when HIGH
+3V
+3V_S5
2
R629 *10K_4R629 *10K_4
R631 *10K_4R631 *10K_4
R633 *10K_4R633 *10K_4
BOARD_ID1
BOARD_ID2
BOARD_ID3
R613 10K_4R613 10K_4
R359 10K_4R359 10K_4
R320 10K_4R320 10K_4
R306 2.2K_4R306 2.2K_4
R318 2.2K_4R318 2.2K_4
R614 2.2K_4R614 2.2K_4
R360 2.2K_4R360 2.2K_4
BOARD_ID1
R630 *10K_4R630 *10K_4
BOARD_ID2
R632 10K_4R632 10K_4
BOARD_ID3
R634 *10K_4R634 *10K_4
High = Reserved
Low = Reserved
High = 80port enabled
Low = 80port disable
High = Reserved
Low = Reserved
RSV_SMBALERT#
RSV_SML0ALERT#
RSV_SML1ALERT#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0
B-test
C3B
2ND_MBCLK(35)
2ND_MBDATA(35)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 3/6
IBEX PEAK-M 3/6
IBEX PEAK-M 3/6
Date: Sheet
Date: Sheet
Date: Sheet
B-test
+3V_S5
R332
R332
2
2.2K_4
Q18 2N7002KQ18 2N7002K
1
+3V_S5
Q19 2N7002KQ19 2N7002K
1
2.2K_4
SMB_CLK_ME1
3
B-test
R328
R328
2
2.2K_4
2.2K_4
SMB_DATA_ME1
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZQ1
ZQ1
ZQ1
10 48Friday, January 22, 2010
10 48Friday, January 22, 2010
10 48Friday, January 22, 2010
1A
1A
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
PCH4(CLG)
BMBUSY#
SIO_EXT_SMI#(35)
SIO_EXT_SCI#(35)
D D
GPIO24 NC for Intel suggestion at 6/1
dGPU_PWR_EN# should be stable
before dGPU_VRON enable
C C
SML1ALERT#(10,34,35)
EC suggestion use GPIO49 for FAN control
SATA5GP / GPIO49 / TEMP_ALERT# is used to
alert for EC when CPU or Graph/Memory
controllers' temperature go out of limit.
So connecting GPIO49 to EC and avoid this
pin to be used for other purpose
B B
B-test
RSV_GPIO8(9)
TP29TP29
CR_WAKE#(9)
dGPU_PWROK(20)
TP28TP28
TP25TP25
dGPU_VRON(20,41)
dGPU_PWR_EN#(36)
RST_GATE#(16)
R607 *Short_4R607 *Short_4
SIO_EXT_SMI#
SIO_EXT_SCI#
BOARD_ID0
RSV_GPIO8
LAN_DISABLE#
CR_WAKE#
dGPU_HOLD_RST#
GPIO22
GPIO27
TP_PCH_GPIO28
STP_PCI#
dGPU_PWR_EN#
dGPU_PRSNT#
GPIO38
SAVE_LED#
GPIO45
SV_SET_UP
SATA5GP
GPIO57
4
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
U35F
U35F
Y3
BMBUSY# / GPIO0
C38
TACH1 / GPIO1
D37
TACH2 / GPIO6
J32
TACH3 / GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL / GPIO12
T7
GPIO15
AA2
SATA4GP / GPIO16
F38
TACH0 / GPIO17
Y7
SCLOCK / GPIO22
H10
GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI# / GPIO34
V6
SATACLKREQ# / GPIO35
AB7
SATA2GP / GPIO36
AB13
SATA3GP / GPIO37
V3
SLOAD / GPIO38
P3
SDATAOUT0 / GPIO39
H3
PCIECLKRQ6# / GPIO45
F1
PCIECLKRQ7# / GPIO46
AB6
SDATAOUT1 / GPIO48
AA4
SATA5GP / GPIO49
F8
GPIO57
A4
VSS_NCTF_1
A49
VSS_NCTF_2
A5
VSS_NCTF_3
A50
VSS_NCTF_4
A52
VSS_NCTF_5
A53
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
B52
VSS_NCTF_9
B53
VSS_NCTF_10
BE1
VSS_NCTF_11
BE53
VSS_NCTF_12
BF1
VSS_NCTF_13
BF53
VSS_NCTF_14
BH1
VSS_NCTF_15
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
BH53
VSS_NCTF_18
BJ1
VSS_NCTF_19
BJ2
VSS_NCTF_20
BJ4
VSS_NCTF_21
BJ49
VSS_NCTF_22
BJ5
VSS_NCTF_23
BJ50
VSS_NCTF_24
BJ52
VSS_NCTF_25
BJ53
VSS_NCTF_26
D1
VSS_NCTF_27
D2
VSS_NCTF_28
D53
VSS_NCTF_29
E1
VSS_NCTF_30
E53
VSS_NCTF_31
IbexPeak-M_R1P0
IbexPeak-M_R1P0
MISC
MISC
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
3
2
1
GPU RST#(CLG)
AH45
AH46
1/21 ramp remove CLK TP
AF48
AF47
U2
AM3
AM1
PCH_PECI_R
BG10
T1
BE10
PCH_THRMTRIP#_R
BD10
BA22
TP1
AW22
TP2
BB22
TP3
AY45
TP4
AY46
TP5
AV43
TP6
AV45
TP7
AF13
TP8
M18
TP9
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
B-test
TP1_PCH
TP2_PCH
TP_INT3_3V
R556 *Short_4R556 *Short_4
R313 56/F_4R313 56/F_4
TP23TP23
TP19TP19
TP34TP34
SIO_A20GATE (35)
CLK_CPU_BCLK# (4)
CLK_CPU_BCLK (4)
H_PECI (4)
SIO_RCIN# (35)
H_PWRGOOD (4,16)
R321 56/F_4R321 56/F_4
PM_THRMTRIP# (4)
+1.1V_VTT
GPU_RST#(17)
SW@TC7SH08FU
SW@TC7SH08FU
GPIO Pull-up/Pull-down(CLG)
SV_SET_UP 1-X High = Strong (Default)
+3V
+3V
C469 *SW@0.1u/10V_4C469 *SW@0.1u/10V_4
53
1
4
2
U19
U19
TP_PCH_GPIO28
GPIO45
RST_GATE#
LAN_DISABLE#
SIO_EXT_SMI#
SIO_EXT_SCI#
dGPU_PWR_EN#
SIO_RCIN#
SIO_A20GATE
dGPU_HOLD_RST#
SATA5GP
GPIO22
SAVE_LED#
STP_PCI#
GPIO38
BMBUSY#
SV_SET_UP
GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1
GPIO57
R283 10K_4R283 10K_4
R334 IV@10K_4R334 IV@10K_4
PLTRST# (4,10,27,28,31,35)
dGPU_HOLD_RST#
R341
R341
SW@100K_4
SW@100K_4
R347 10K_4R347 10K_4
R616 10K_4R616 10K_4
R597 10K_4R597 10K_4
R307 10K_4R307 10K_4
R244 10K_4R244 10K_4
R270 10K_4R270 10K_4
R335 10K_4R335 10K_4
remove GPIO7 PU at 6/1
R602 10K_4R602 10K_4
R623 10K_4R623 10K_4
R626 *10K_4R626 *10K_4
R606 10K_4R606 10K_4
R336 10K_4R336 10K_4
R600 10K_4R600 10K_4
R358 10K_4R358 10K_4
R625 10K_4R625 10K_4
R604 8.2K_4R604 8.2K_4
R343 10K_4R343 10K_4
R324 10K_4R324 10K_4
BOARD_ID0
dGPU_PRSNT#
R279 *10K_4R279 *10K_4
R333 SW@10K_4R333 SW@10K_4
+3V_S5
+3V
+3V
B-test
BOARD_ID0
A A
Size Document Number Rev
Size Document Number Rev
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
RSV_GPIO8
IBEX PEAK-M 4/6
IBEX PEAK-M 4/6
IBEX PEAK-M 4/6
High = JV41/JM41
Low = JM51
High = Disable
Low = Enable
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZQ1
ZQ1
ZQ1
11 48Friday, January 22, 2010
11 48Friday, January 22, 2010
11 48Friday, January 22, 2010
of
of
1
of
1A
1A
1A
5
PCH5(CLG)
R529 *Short_8R529 *Short_8 L23
+1.05V
R526 *Short_8R526 *Short_8
VCCCORE(+1.05V) = 1.432A(80mils)
IBEX PEAK-M (POWER)
D D
R292 *Short_6R292 *Short_6
+1.05V
40mA(15mils)
C C
VRM enable by strap pin GPIO27
which supply clean 1.05V for
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]
37mA(15mils)
B B
+1.05V
A A
L55 *1uH/25mA_6L55 *1uH/25mA_6
+1.05V
C756 *10u/6.3V_6C756 *10u/6.3V_6
VCCIO = 3.062A(150mils)
R539 *Short_8R539 *Short_8
+1.05V
R540 *Short_8R540 *Short_8
C3C
L56 *1uH/25mA_6L56 *1uH/25mA_6
VCCVRM=196mA(15mils)
+1.8V
L46 10uH/100mA_8L46 10uH/100mA_8
L49 10uH/100mA_8L49 10uH/100mA_8
C3C
C3C
+1.05V_PCH_VCCDPLL_EXP
C442 1u/6.3V_4C442 1u/6.3V_4
C430 1u/6.3V_4C430 1u/6.3V_4
C429 1u/6.3V_4C429 1u/6.3V_4
C443 1u/6.3V_4C443 1u/6.3V_4
C427 10u/6.3V_6C427 10u/6.3V_6
+V1.1LAN_VCCAPLL_FDI
C763
C763
*10u/6.3V_6
*10u/6.3V_6
R309 *Short_6R309 *Short_6
C3C
+V1.1LAN_VCCA_A_DPL
+
+
C703
C703
220u/2.5V_3528
220u/2.5V_3528
+V1.1LAN_VCCA_B_DPL
+
+
C715
C715
220u/2.5V_3528
220u/2.5V_3528
+1.05V_VCCCORE_ICH
C434 1u/6.3V_4C434 1u/6.3V_4
C721 10u/6.3V_6C721 10u/6.3V_6
+V1.1LAN_VCCAPLL_EXP
VCCIO
+3V
+V1.5S_1.8S
C446
C446
*0.1u/10V_4
*0.1u/10V_4
C693
C693
*1u/6.3V_4
*1u/6.3V_4
C717
C717
*1u/6.3V_4
*1u/6.3V_4
10/5 modify
VCCIO
C450
C450
*0.1u/10V_4
*0.1u/10V_4
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
AK24
BJ24
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AN30
AN31
AN35
AT22
BJ18
AM23
+V1.5S_1.8S
U35G
U35G
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCIO[24]
VCCAPLLEXP
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
VCCIO[54]
VCCIO[55]
VCC3_3[1]
VCCVRM[1]
VCCFDIPLL
VCCIO[1]
IbexPeak-M_R1P0
IbexPeak-M_R1P0
4
POWER
POWER
VCC CORE
VCC CORE
PCI E*
PCI E*
FDI
FDI
HDA_SYNC (PCH strap pin)
Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V
VCCADAC[1]
VCCADAC[2]
VSSA_DAC[1]
CRTLVDS
CRTLVDS
VSSA_DAC[2]
VCCALVDS
VSSA_LVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[2]
VCC3_3[3]
VCC3_3[4]
HVCMOS
HVCMOS
VCCVRM[2]
VCCDMI[1]
DMI
DMI
VCCDMI[2]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
VCCME3_3[1]
NAND / SPI
NAND / SPI
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
AE50
AE52
AF53
AF51
AH38
AH39
AP43
AP45
AT46
AT45
AB34
AB35
+3V_VCC_GIO
AD35
VCCVRM= 196mA(15mils)
+VCCVRM
AT24
+VCCDM
AT16
AU16
AM16
AK16
AK20
VCCPNAND
AK19
AK15
AK13
AM12
AM13
AM15
AM8
+3V_VCCME_SPI
AM9
AP11
AP9
+VCCA_DAC_1_2
C394
C394
0.01u/16V_4
0.01u/16V_4
VCCALVDS
C397
C397
0.1u/10V_4
0.1u/10V_4
VCCTX_LVDS
C406
C406
0.01u/16V_4
0.01u/16V_4
C416
C416
0.1u/10V_4
0.1u/10V_4
R294 *Short_6R294 *Short_6
C3C
C457
C457
1u/6.3V_4
1u/6.3V_4
VCCPNAND= 156mA(15mils)
R325 *Short_8R325 *Short_8
C458
C458
0.1u/10V_4
0.1u/10V_4
VCCME3_3= 85mA(15mils)
C461
C461
0.1u/10V_4
0.1u/10V_4
VCCADAC= 69mA(15mils)
L23
PBY160808T-181Y-N/2A/180ohm_6
PBY160808T-181Y-N/2A/180ohm_6
C390
C390
22u/6.3V_8
22u/6.3V_8
C-test
VCCALVDS= 1mA
R230 *Short_4R230 *Short_4
C403
C403
0.1u/10V_4
0.1u/10V_4
VCC3_3 = 357mA(30mils)
R271
R271
PBY160808T-121Y-N/2.5A/120ohm_6
PBY160808T-121Y-N/2.5A/120ohm_6
B-test
+V1.5S_1.8S
R322 *Short_4R322 *Short_4
R323 *0_4R323 *0_4
C3C
R314 *Short_6R314 *Short_6
3
C393
C393
0.1u/10V_4
0.1u/10V_4
+3V
C3C
VCCTX_LVDS= 59mA(15mils)
L25 0.1uH/250mA_8L25 0.1uH/250mA_8
C402
C402
10u/6.3V_6
10u/6.3V_6
+3V
VCCDMI= 61mA(15mils)
+1.1V_VTT
+1.05V
+1.8V
+3V
C3C
+3V
VCCACLK= 52mA(15mils)
+1.05V
VCCLAN = 320mA(30mils)
+1.8V
VCCME(+1.05V) = 1.849A(100mils)
+1.05V
R286 0_6R286 0_6
+1.05V
ramp modify
ramp for power saving,
connect to GND
R246 *Short_8R246 *Short_8
R238 *Short_8R238 *Short_8
C3C
VCCSUS3_3 = 163mA(20mils)
VCC3_3 = 0.357A(30mils)
V_CPU_IO >1mA(15mils)
+1.1V_VTT
VCCRTC= 2mA(15mils)
L48 *10uH/100mA_8L48 *10uH/100mA_8
C704 *10u/6.3V_6C704 *10u/6.3V_6
C705 *1u/6.3V_4C705 *1u/6.3V_4
C445
C445
1u/6.3V_4
1u/6.3V_4
C396 22u/6.3V_8C396 22u/6.3V_8
C401 22u/6.3V_8C401 22u/6.3V_8
C408 1u/6.3V_4C408 1u/6.3V_4
C421 1u/6.3V_4C421 1u/6.3V_4
68mA(15mils)
69mA(15mils)
C460 0.1u/10V_4C460 0.1u/10V_4
C447 0.1u/10V_4C447 0.1u/10V_4
R338 *Short_6R338 *Short_6
+3V_S5
C3C
R337 *Short_6R337 *Short_6
+3V
C3C
R578 *Short_6R578 *Short_6
C3C
C785 4.7u/10V_8C785 4.7u/10V_8
C451 0.1u/10V_4C451 0.1u/10V_4
C455 0.1u/10V_4C455 0.1u/10V_4
+VCCRTC
+V1.1LAN_VCCA_CLK
TP_PCH_VCCDSW
C448
C448
0.1u/10V_4
0.1u/10V_4
10/5 modify
+1.05V_VCCEPW
+VCCRTCEXT
C464 0.1u/10V_4C464 0.1u/10V_4
+V1.5S_1.8S
+V1.1LAN_VCCA_A_DPL
+V1.1LAN_VCCA_B_DPL
VCCIO
C415 1u/6.3V_4C415 1u/6.3V_4
C428 1u/6.3V_4C428 1u/6.3V_4
C452 1u/6.3V_4C452 1u/6.3V_4
+VCCSST
+V1.1LAN_INT_VCCSUS
+3V_S5_VCCPSUS
0.1u/10V_4C453 0.1u/10V_4C453
+3V_VCCPCORE
C454
C454
0.1u/10V_4
0.1u/10V_4
+VTT_VCCPCPU
C775
C775
0.1u/10V_4
0.1u/10V_4
2
AP51
AP53
AF23
AF24
Y20
AD38
AD39
AD41
AF43
AF41
AF42
V39
V41
V42
Y39
Y41
Y42
V9
AU24
BB51
BB53
BD51
BD53
AH23
AJ35
AH35
AF34
AH34
AF32
V12
Y22
P18
U19
U20
U22
V15
V16
Y16
AT18
AU18
A12
C784
C784
0.1u/10V_4
0.1u/10V_4
U35J
U35J
VCCACLK[1]
VCCACLK[2]
VCCLAN[1]
VCCLAN[2]
DCPSUSBYP
VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]
DCPRTC
VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[2]
VCCIO[3]
VCCIO[4]
DCPSST
DCPSUS
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]
VCC3_3[5]
VCC3_3[6]
VCC3_3[7]
V_CPU_IO[1]
V_CPU_IO[2]
VCCRTC
IbexPeak-M_R1P0
IbexPeak-M_R1P0
POWER
POWER
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
USB
USB
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
VCCSUS3_3[28]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC
PCI/GPIO/LPC
VCCSATAPLL[1]
VCCSATAPLL[2]
SATA
SATA
PCI/GPIO/LPC
PCI/GPIO/LPC
CPU
CPU
RTC
RTC
HDA
HDA
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCIO[56]
V5REF_SUS
V5REF
VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCCIO[9]
VCCVRM[4]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
VCCSUSHDA
V24
V26
Y24
Y26
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3
AK1
AH22
AT20
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35
L30
VCCIO
C441 1u/6.3V_4C441 1u/6.3V_4
+3V_S5_VCCPUSB+1.05V_VCCAUX
C437
C437
0.022u_4
0.022u_4
VCCIO
C418
C418
1u/10V_6
1u/10V_6
C398
C398
1u/10V_6
1u/10V_6
+3V_VCCPPCI
C419
C419
0.1u/10V_4
0.1u/10V_4
C414
C414
0.1u/10V_4
0.1u/10V_4
C799
C799
*1u/6.3V_4
*1u/6.3V_4
+V1.5S_1.8S
+1.05V_VCCEPW
+V3.3A_1.5A_HDA_IO
C433
C433
1u/6.3V_4
1u/6.3V_4
1
VCCSUS3_3 = 0.163A(20mils)
R288 *Short_6R288 *Short_6
C436
C436
C440
C440
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
R264 100/F_4R264 100/F_4
D5 RB500V-40D5 RB500V-40
R239 100/F_4R239 100/F_4
D3 RB500V-40D3 RB500V-40
C3C
R269 *Short_6R269 *Short_6
VCC3_3 = 0.357A(30mils)
+3V+1.05V
C801
C801
*10u/6.3V_6
*10u/6.3V_6
VCCIO
31mA(15mils)
C449
C449
1u/6.3V_4
1u/6.3V_4
+V1.1LAN_VCCAPLL
VCCME = 1.849A(100mils)
R252 *Short_4R252 *Short_4
VCCSUSHDA= 6mA(15mils)
+3V_S5
C3C
V5REF_SUS< 1mA
V5REF< 1mA
+3V
L59 *10uH/100mA_8L59 *10uH/100mA_8
C3C
+3V_S5
+5V_S5
+3V_S5
+5V
+3V
+1.05V
B-test
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 5/6
IBEX PEAK-M 5/6
IBEX PEAK-M 5/6
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
1
ZQ1
ZQ1
ZQ1
1A
1A
12 48Friday, January 22, 2010
12 48Friday, January 22, 2010
12 48Friday, January 22, 2010
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
1
PCH6(CLG)
U35I
U35I
AY7
VSS[159]
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BC10
BC14
BC18
BC22
BC32
BC36
BC40
BC44
BC52
BD48
BD49
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
AF39
B11
B15
B19
B23
B31
B35
B39
B43
B47
BB5
BC2
BH9
BD5
BE6
BE8
BF3
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
G10
G14
G18
G22
G32
G36
G40
G44
G52
H16
H20
H30
H34
H38
H42
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
B7
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
E6
VSS[238]
E8
VSS[239]
F49
VSS[240]
F5
VSS[241]
VSS[242]
VSS[243]
VSS[244]
G2
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
IBEX PEAK-M (GND)
D D
U35H
U35H
AB16
VSS[0]
AA19
VSS[1]
AA20
VSS[2]
AA22
VSS[3]
AM19
VSS[4]
AA24
VSS[5]
AA26
VSS[6]
AA28
VSS[7]
AA30
VSS[8]
AA31
VSS[9]
AA32
VSS[10]
AB11
VSS[11]
AB15
VSS[12]
AB23
VSS[13]
AB30
VSS[14]
AB31
VSS[15]
AB32
VSS[16]
AB39
VSS[17]
AB43
VSS[18]
AB47
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AF12
AH49
AF35
AP13
AN34
AF45
AF46
AF49
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AJ19
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AK12
AM41
AN19
AK26
AK22
AK23
AK28
AB5
AB8
AC2
AD7
AE2
AE4
Y13
AU4
AF5
AF8
AG2
AH7
AT5
AJ2
AJ4
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
IbexPeak-M_R1P0
IbexPeak-M_R1P0
C C
B B
A A
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
IbexPeak-M_R1P0
IbexPeak-M_R1P0
Size Document Number Rev
Size Document Number Rev
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
Size Document Number Rev
IBEX PEAK-M 6/6
IBEX PEAK-M 6/6
IBEX PEAK-M 6/6
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZQ1
ZQ1
ZQ1
of
of
of
13 48Wednesday, December 16, 2009
13 48Wednesday, December 16, 2009
13 48Wednesday, December 16, 2009
1A
1A
1A
5
DDR_STD(DDR)
M_A_A[15:0](5)
D D
M_A_BS#0(5)
M_A_BS#1(5)
M_A_BS#2(5)
M_A_CS#0(5)
M_A_CS#1(5)
M_A_CLK0(5)
M_A_CLK0#(5)
M_A_CLK1(5)
M_A_CLK1#(5)
M_A_CKE0(5)
M_A_CKE1(5)
M_A_CAS#(5)
M_A_RAS#(5)
R214 10K_4R214 10K_4
R215 10K_4R215 10K_4
C C
B B
M_A_WE#(5)
CLK_SCLK(3,15,28)
CLK_SDATA(3,15,28)
M_A_ODT0(5)
M_A_ODT1(5)
M_A_DM[7:0](5)
M_A_DQS[7:0](5)
M_A_DQS#[7:0](5)
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
CLK_SCLK
CLK_SDATA
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
107
119
109
108
114
121
101
103
102
104
115
110
113
197
201
202
200
116
120
136
153
170
187
137
154
171
188
135
152
169
186
98
97
96
95
92
91
90
86
89
85
84
83
80
78
79
73
74
11
28
46
63
12
29
47
64
10
27
45
62
4
JDIM2A
JDIM2A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM0_H=4_STD
DDR3-DIMM0_H=4_STD
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
3
M_A_DQ[63:0] (5)
+SMDDR_VREF
R173 *0_6R173 *0_6
PM_EXTTS#0(4)
DDR3_DRAMRST#(15,16)
+1.5V_SUS
R172
R172
10K/F_4
10K/F_4
+SMDDR_VREF_DIMM
R182
R182
10K/F_4
10K/F_4
R219 *10K_4R219 *10K_4
+3V
C338
C338
470p/50V_4
470p/50V_4
2
+1.5V_SUS
2.48A
+3V
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
JDIM2B
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=4_STD
DDR3-DIMM0_H=4_STD
1
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VTT1
VTT2
GND
GND
203
204
205
206
+1.5V_SUS
+0.75V_DDR_VTT
R117
R117
10K/F_4
Place these Caps near So-Dimm0.
+1.5V_SUS
C341
C341
10u/6.3V_6
10u/6.3V_6
C335
C335
10u/6.3V_6
10u/6.3V_6
A A
+3V
C314
C314
10u/6.3V_6
10u/6.3V_6
C365
C365
2.2u/6.3V_6
2.2u/6.3V_6
C286
C286
10u/6.3V_6
10u/6.3V_6
C358
C358
0.1u/10V_4
0.1u/10V_4
C311
C311
10u/6.3V_6
10u/6.3V_6
C326
C326
10u/6.3V_6
10u/6.3V_6
+0.75V_DDR_VTT
C336
C336
0.1u/10V_4
0.1u/10V_4
C373
C373
1u/6.3V_4
1u/6.3V_4
C287
C287
0.1u/10V_4
0.1u/10V_4
C292
C292
0.1u/10V_4
0.1u/10V_4
C316
C316
0.1u/10V_4
0.1u/10V_4
C375
C375
1u/6.3V_4
1u/6.3V_4
C309
C309
0.1u/10V_4
0.1u/10V_4
C374
C374
1u/6.3V_4
1u/6.3V_4
+
+
C345
C345
C333
C333
330u/2V_7343
330u/2V_7343
0.1u/10V_4
0.1u/10V_4
C372
C372
1u/6.3V_4
1u/6.3V_4
+SMDDR_VREF_DIMM
C346
C346
2.2u/6.3V_6
2.2u/6.3V_6
C382
C382
*10u/6.3V_6
*10u/6.3V_6
*10u/6.3V_6
*10u/6.3V_6
+SMDDR_VREF_DQ0
C251
C251
0.1u/10V_4
0.1u/10V_4
C370
C370
C371
C371
10u/6.3V_6
10u/6.3V_6
maybe can save
C250
C250
2.2u/6.3V_6
2.2u/6.3V_6
STD 4H
STD 8H
FOX
LTK
DGMK4000004
DGMK4000097
SUY
MLX
DGMK4000011
DGMK4000080
Standard 4H type:DDR-C-2013289-204p
+SMDDR_VREF
VREF_DQ_DIMM0(7)
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
R120 *0_6R120 *0_6
R121 *0_6R121 *0_6
M1:PWR SMDRR_VREF
M1+:voltage divider(Default)
M3:CPU VREF_DQ_DIMM0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
Date: Sheet
Date: Sheet
Date: Sheet
10K/F_4
+SMDDR_VREF_DQ0
R118
R118
10K/F_4
10K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZQ1
ZQ1
ZQ1
14 48Friday, January 22, 2010
14 48Friday, January 22, 2010
14 48Friday, January 22, 2010
of
of
1
of
1A
1A
1A
Loading...