Page 1
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2 2
3 3
4 4
Compal Confidential
MB Schematic Document
2020.02.11
Rev:1.0
LA-J871P
FH51M
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
1.0
Cover Sheet
Custom
1 112Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
1.0
Cover Sheet
Custom
1 112Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
1.0
Cover Sheet
Custom
1 112Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
www.laptoprepairsecrets.com
Page 2
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D
D
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1 1
2 2
3 3
4 4
Cof f eeLake H Pr ocess or
BGA1440 (42X28)
(CFL-H & CML-H _ 8+2)
Cannonlake PCH - H
FCBGA874 (25X24)
CFL-H : HM370
CML-H : HM470
Memory BUS
LPC/eSPI BUS
Int.KBD
Interleaved (DDR4 2400/2666)
SPI
P.23
SPI ROM 16M
TPM
X4 DMI
PEG x16
8GT/s
P.27-37
N18P-G61/G62
- DDR4 So-DIMM 260 pin
- Channel A
- BANK 0,1,2,3
- Address : 0XA0/1
- DDR4 So-DIMM 260 pin
- Channel B
- BANK 4,5,6,7
- Address : 0XA3/4
P.24
P.6-13
P.14-21
- SOP8
- Size : 16M
P.16
- KSI/KSO
- W/BL or 4 Zone RGB
P.66
P.63
EC KB9022
P.58
I2C/PS2
HDA Codec
- ALC295
P.56
HD Audio
Audio Jack
- On IO/B
Int. DMIC
- On CCD Module
Int. Speaker
- ON IO/B > L
- ON M/B > R
- GEN2
- On M/B
- Port 1
P.71
USB3.1 - JUSB 1
- Port 5
P.38
DDC Camera
- W/USB Charger
(SLGC55544)
- PCIE 2.0 5GT/s
- Port 14
LAN(GbE) JRJ45
- E2600
- SATA 3.0
- Port 13
(SATA 0B)
P.67
HDD - JHDD1
P.68
SSD - JSSD1 (PCIE)
- PCIE 2.0 5GT/s
- PCIE Port 21-24
P.68
SSD - JSSD2 (PCIE/SATA)
- PCIE 2.0 5GT/s
- PCIE Port 9-12
- SATA @ Port 12
P.69
- PCIE 2.0 5GT/s
- PCIE Port 17-20
- SATA @ Port 17
- PCIE1.0 2.5GT/s
- PCIE Port 15
P.52
WIFI - JNGFF1
- USB2 Port 4
- GEN2
- USB3.1 Port 5
- USB2.0 Port 3
USB3.1 - JUSB 2
- USB3.1 GEN2
- USB3.1 Port3&4
P.42-43
Type C - JTYPEC1
- CPU eDP
P.38
eDP - JEDP1
DDI
Finger print
- USB2 Port 8
Tuch Screen
- USB2 Port 6
- PCH I2C2
P.66 P.38
HW Circuit DC/DC
Power Circuit DC/DC
P.82-111
P.78
Power On/Of f CKT.
P.63
RTC CKT. (JRTC1)
P.20
Sub Board
HS/B (JHS1)
TURBO/B (JTURBO1)
IO/B (JIO1/JIO2)
P.77
P.66
P.73
- MAX-Q
- GDDR6 4G
Extend IC
- I2C
- KC3810
P.59
- VGA Port C
P.40
HDMI - JHDMI1
P.39
mDP - JDP1
- VGA Port E
- SOP8
- Size : 1M
P.29
VBIOS ROM
- RTS5441E
USB3 Re-driver
USB3.1 - JUSB 3
USB3 Re-driver
- PS8713 - PS8713
- GEN2
- USB3.1 Port 2
- USB2.0 Port 2
IO_B
P.73
SSD - JSSD3 (PCIE/SATA)
EMR - JEMR1
- PCH I2C0
P.64
Touch Pad
- EC PS2
- PCH I2C1
P.63
Fan Control*2
page 77
- NPCT750
I2C
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Block Diagrams
Custom
2 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Block Diagrams
Custom
2 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Block Diagrams
Custom
2 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
www.laptoprepairsecrets.com
Page 3
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Vcc
3.3V +/- 5%
100K +/- 1%
Ra
Board ID
Rb
Vmin
0
1
2
0
0.423 V 0.430 V 0.438 V
Vtyp Vmax
15K +/- 1%
0.000 V 0.300 V
12K +/- 1% 0.347 V 0.345 V 0.360 V
EC AD
0x00 - 0x13
0x14 - 0x1E
0x1F - 0x25
3
4
5
6
7
20K +/- 1%
27K +/- 1%
33K +/- 1%
43K +/- 1%
56K +/- 1%
0x26 - 0x300.541 V 0.550 V 0.559 V
0x31 - 0x3A0.691 V 0.702 V 0.713 V
0x3B - 0x450.807 V 0.819 V 0.831 V
0x46 - 0x540.978 V 0.992 V 1.006 V
0x55 - 0x641.169 V 1.185 V 1.200 V
EC Board ID Table for AD channel
8
9
10
11
12
13
14
15
16
17
18
19
75K +/- 1%
100K +/- 1%
130K +/- 1%
160K +/- 1%
200K +/- 1%
240K +/- 1%
270K +/- 1%
330K +/- 1%
430K +/- 1%
560K +/- 1%
750K +/- 1%
NC
1.398 V
1.634 V
1.849 V
2.015 V
2.185 V
2.316 V
2.395 V
2.521 V
2.667 V
2.791 V
2.905 V
3.000 V
1.414 V
1.650 V
1.865 V
2.031 V
2.200 V
2.329 V
2.408 V
2.533 V
2.677 V
2.800 V
2.912 V
3.000 V
1.430 V
1.667 V
1.881 V
2.046 V
2.215 V
2.343 V
2.421 V
2.544 V
2.687 V
2.808 V
2.919 V
0x65 - 0x76
0x77 - 0x87
0x88 - 0x96
0x97 - 0xA4
0xA5 - 0xAF
0xB0 - 0xB7
0xB8 - 0xBF
0xC0 - 0xC9
0xCA - 0xD4
0xD5 - 0xDD
0xDE - 0xF0
0xF1 - 0xFF
0x16
0x9E
Address(7 bit)
Device
Write Read
Address(8bit)
BUS
EC_SMB_CK1
(+3VLP)
PCH_SML1CLK
(+3VALW)
EC_SMB_CK2
(+3VS)
PCH_SMBCLK
(+3VS)
BQ24780 (Charger IC)
N18P-G0/N17P-G0-K1 (VGA)
BATTERY PACK
0x12
TM-P3393-003 (Touch Pad)I2C_1 (+3VS)
I2C_0 (+3VS)
Thermal Sensor (NCT7718W) 1001_100xb 1001_1001b 1001_1000b
EC_SMB_CK3
(+3VALW)
LED driver 0xC0
CONN@
Connector
Item (X43 / X76) BOM Structure
Unpop @
Item (X43 / X76) BOM Structure
BOM StructureDescript i on43 Level
PCH 0x90
Thermal Sensor (G781) 1001_101xb
KC3810
0xC0
1001_1011b 1001_1010b
XXXXXX (EMR)
DIMM1
DIMM2
UMA Only(Reserved)
UMA@
H62 CPU(Reserved) H62@
H82 CPU(POP) H82@
eDP-TS USB TS_USB@
eDP-TS I2C TS_I2C@
eDP-TS USB NONTS_I2C@
mDP
DP@
For Acer IOAC IOAC@
No Acer IOAC
Intel CNVi
FOR UART BT module
FOR UART debug
NIOAC@
CNVI@
UART_BT@
UART@
Extend GPIO
Finger Print
FinerPrint(with PBA)
KB LED driver
KC3810@
FP@
PBA@
LED14P@
EMR 1.8V WC18V@
EMR 3.3V WC33V@
Thermal sensor
TMS@
TPM pop TPM@
TPM non-pop NTPM@
EMI requirement EMI@
XEMI@
ESD@
FP ESD requirement FPESD@
EMI require reserve
ESD requirement
XESD@ESD require reserve
Item (X4E) BOM Structure
V
V
V
V
V
V
V
V
V
V
V
PCB PCB@
V
431AMBBOL02 FH51M PG61QS 4G
PCB@/H82@/SATANRD@/CMLi5@/CMLPCH@/VGA@/N18P@/VGAG61@/TS_USB@/NONTS_I2C@/DP@/IOAC@/CNVI@/FP@/PBA@/KBLED@/LED14P@/WC18V@/TMS/@TPM@
Item (X76) BOM Structure
OVRM-uPI
uPI_X76@
ON_X76@OVRM-ON
VRAM-SAMSUNG X76SAM@
VRAM-MICRON
X76MIC@
X76869BOL01 - MICRON
X76869BOL02 - SAMSUNG
X76869BOL03 - ON OVRM
X76869BOL04 - UPI OVRM
X4EAMBBOL01 PG6162 FOR EE
X4EP4MBOL01 PG6162 IO FOR EE
SSD3@SSD3 pop
V
Remove KBLED@
+1.8VS power rail for GPU(AON rails)
+1.8VSDGPU_AON
+0.6VS_VTT DDR +0.6VS power rail for DDR terminator .
+3VS
+5VALW
+3VALW System +3VALW always on power rail
+3VLP
+19VB to +3VLP power rail for suspend power
DDR4 +1.2V power rail+1.2V_VDDQ
+1.0VSDGPU
+1.0VS power rail for GPU
System +3V power rail
+5V Always power rail
+5VS System +5V power rail
+VCC_CORE
+19V_VIN
+19VB
Adapter power supply
AC or battery power rail for power circuit.
Core voltage for CPU
Power Plane
Description
+VCC_GT
Sliced graphics power rail
+12.6V_BATT Battery power supply
STATE
SIGNAL
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
ONONONONOFF
OFF
OFF
OFF
OFFLOW LOW LOW
LOWLOW
LOW HIGH
HIGH
HIGH
S0 (Full ON) ON ON ONHIGH HIGH HIGH
SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS
+1.05VALW +1.05V Always power rail
+1.8VS power rail for GPU GC6+1.8VSDGPU_MAIN
+3VALW_DSW +3VALW power for PCH DSW rails
+VCC_SA
System Agent power rail
+RTCVCC
+VCCIO
+1.05V_VCCST
RTC Battery Power
CPU IO +0.95VS power rail
Sustain voltage for processor in Standby modes
+NVVDD1
Core voltage for VGA (merge core & core_s)
+1.35VSDGPU +1.35VS power rail for GPU
+1.8VALW System +1.8VALW always on power rail
+1.05VS_VCCSTG +1.05VALW_PRIM Gated version of VCCST
N/A
ON
N/A
N/A
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
S0 S3
N/A
N/A
N/A
ON
ON
ON
ONON
ON
ON
ON
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ONS4ON
N/A
N/A
N/A
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
S5
ON
N/A
N/A
N/A
ON
ON
ON*
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON*
SD034120280
SD034150280
SD034200280
SD034270280
SD034330280
SD034430280
SD034560280
SD034750280
SD034100380
SD034130380
SD034160380
SD034200380
SD000001B80
SD00000G280
SD034330380
SD00000WM80
SD034560380
SD00000AL80
50 Rev0.2
50 Rev1.0+RGB
50 Rev0.2+RGB
50 Rev1.0
60 Rev0.1
60 Rev0.2
60 Rev1.0
60 Rev0.2+RGB
60 Rev1.0+RGB
50 Rev0.3
50 Rev0.3+RGB
60 Rev0.3
60 Rev0.3+RGB
50 Rev0.1
10
11
12
16
17
13
14
15
18
19
2
1
0
Board ID
7
6
5
4
3
PCB Revision
8
9
*PCB Version
*Key board type
CFL i5QS CPU CFLi5QS@
CFLi5@CFL i5 CPU
CFL QS PCH CFLPCHQS@
CML PCH CMLPCH@
CML i5 CPU
CML i7 CPU
CMLi5@
CMLi7@
CML i9 CPU
CML i5QS CPU CMLi5QS@
CMLi9QS@CML i9QS CPU
CML i7QS CPU CMLi7QS@
CML QS PCH
PVT
PVT W/RGB
PVT@
PVTRGB@
dGPU circuit VGA@
N17P GPU N17P@
N18P GPU N18P@
V
V
N18P-G61 VGAG61@
N18P-G62 MP2 VGAG62@
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
Notes List
Custom
3 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
Notes List
Custom
3 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
Notes List
Custom
3 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
www.laptoprepairsecrets.com
Page 4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DC_IN
PL101,2,3
PJP101
+19V_VIN
PUB1
+12.6V_BATT
+19VB
PL201,2
+12.6V_BATT+
AC CONN.
BATTERY
PJP201
IMVP8
CHARGER
+VCC_CORE
PLZ1,2,3,4
EN:DRVON
PRA3
EN:DRVON
+VCC_SA
PLA1
+19VB
+19VB
EN:3V_EN
PU301
+3VALW
PJ302
+3VLP
EN:SYSON
PUM1
+19VB
+1.2V_VDDQ
PJM2
EN:+1.8_PG
PU1101
+19VB
+1.05VALW
PJ1101
PU501
PJ502
+19VB
+5VALW
US12
+USB3_VCCC
+FP_VCC
UQ1
UL1
UM1
R19
RH99
RH101
UK1
+3VS
JPQ1
+3VALW_TPM
+3V_LAN
+3VS_WLAN
+3VALW_DSW
+3V_PTP
+3VALW_HDA
JPH1
RH94
UQ2
+1.05VALW_PRI M
UC4
+1.05VALW_PCH
+1.05V_VCCST
RH102
+1.05VS_VCCS TG
RH105
RH103
UV45
UO1
R20
+LCDVDD
UX1
RC24
+1.2V_VCCPLL_ OC
RF4
RF7
UY2
+HDMI_5V_OUT
EC,LID
CPU
CPU
CPU
SATA Re-driver
TPM
TPM
PANEL
PCH
LAN
WLAN CARD Conn.
PCH
PCH
TP Conn.
PCH
CPU
PCH
FAN1 Conn.
HDMI Conn.
+0.6VS_VTT
PJM3
PUV1
PUV2,3
+19VB
PUH1 PJH1
+19VB
+VCCIO
CPU
EN:SUSP#
PU2501 PJ2502
+2.5V
JDIMM2
DDR4 Conn.
JDIMM1
+3VS_TPM
U5
JNGFF1
UL2
JTP1
+USB_VCCA
USB3.0 Conn.
JTYPEC1
JHDMI1
JHDD1
+5VS_HDD
UA1
JBL1
JPA1
RO4
U4
+5VS_BL
+VDDA
HDD Conn.
KB BackLight Conn.
CODEC
FAN2 Conn.
JEDP1
U5
GPU
EN:DRVON
PLG1
+19VB
CPU
+VCC_GT
PUZ2,3,4,5
PRG5
RA2
RA4
CODEC
CODEC
+3VS_DVDDIO
+3VS_DVDD
CPU,Memory
+VCC_FAN1
+VCC_FAN2
RX7 JEDP1
+TS_PWR
Touch Screen
+1.35VSDGPU
+NVVDD1
GPU
GPU
+INVPWR_B+
+19VB →+19VB_CPU
LX1
PANEL
EN:SM_PG_CTR L
EN:1.35VSDGPU _EN
+3VALWP
+1.2VP
+0.6VSP
+1.05VALWP
+1.0VS_VCCIOP
+5VALWP
NVVDD_B+
PLV2,3
PUW1
PLW1
+19VB
JIO1
US11
UK2
+2.5VP
UM2
PU1002 PJ1003
+1.0VSDGPUP
+1.0VSDGPU
GPU
+FP_VCC
FP Conn.
UK2
RS127
+5VALW_MUX
IO/B Conn.
PU1801 PJ1801
+19VB
+1.8VALW
EN:SPOK_3V
+1.8VALWP
UQ2
+1.8VS
RA3
CODEC
+1.8VS_VDDA
UG27
EN:DGPU_PWR_E N
+1.8VSDGPU_AO N
+1.8VSDGPU_MA IN
GPU
RH100
+1.8VALW _PR IM
PCH
GPU_B+
+19VB_CPU
+19VB_CPU
+19VB_CPU
RQ5
RQ9
UV48
+FP_FUSE_GPU
GPU
US3
CC logic/U3 MUX
+USB_VCCB
USB3.0 Conn.
US13
UE5
+5V_LEDPWR
KB BackLight Conn.
JBL2
JPQ2UQ1
+5VS
FP Conn.
JFP1
Type-C Conn.
JIO1
JFP1
UM2
+3VS_SSD1
RM54
+3VS_SSD2
RM55
JSSD1
SSD Conn.
JSSD2
SSD Conn.
JUSB1
JUSB2
JFAN1
JFAN1
+3VSDGPU
+3VS
+3VS_WLAN
JNGFF1RM11
WLAN CARD Conn.
+5VALW
+1.05VALW_VCC AZPLL
+1.05VALW_VCC AMPHYPLL
+1.05VALW_XTA L
Title
Size Document Number R e v
Date: Sheet o f
Security Classifi cation
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
Power Map
Custom
4 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
Title
Size Document Number R e v
Date: Sheet o f
Security Classifi cation
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
Power Map
Custom
4 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
Title
Size Document Number R e v
Date: Sheet o f
Security Classifi cation
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
Power Map
Custom
4 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
www.laptoprepairsecrets.com
Page 5
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+3VS
+2.5VS
+1.8VS
+1.05VS_VCCST G
877.7us
8.378us
12.7ms
630.4us
+5VS
412us
25.34ms
EC_VCCST_PG
+VCC_SA
25.35ms
25.36ms
25.19ms
1.759ms
173.0ms
NA
12.42ms
150.3ms
13.01us
55.47us
618.5us
8.679ms
→
347.6us
0us
3.819ms
51.25us
87.75us
NA
26.91us
47.39us
61.95us
25.25ms
67.04ms
100.5us
906.0us
EC_ON
656.1us
424.9us
25.25ms
25.26ms
25.59ms
167.1ms
NA
1.757ms
12.18ms
150.6ms
152.8us
88.37us
367.6us
2.266ms
13us
68.53us
686.0us
11.65ms
446.2us
0us
0us 13.97ms
2.034ms
27.06us
48.00us
112.0us
NA
47.83us
62.37us
BIOS ver: V 0.02W1
EC: ver: V 002AT04
333.3ms
92.03ms
94.88ms
S3 S3 Resume
72.1us
8.502us
2.439ms
SYSON
+1.05V_VCCST
+1.05VALW
+1.2V_VDDQ
SM_PG_CTRL
+0.6VS_VTT
+VCC_GT
SYS_PWROK
330.8ms
29.19ms
→
← →
19.18ms
152.3ms 318.7us
+3VS
+2.5VS
+1.8VS
+1.05VS_VCCST G
+5VS
EC_VCCST_PG
+VCC_SA
EC_ON
SYSON
+1.05V_VCCST
+1.05VALW
+1.2V_VDDQ
SM_PG_CTRL
+0.6VS_VTT
+VCC_GT
SYS_PWROK
PLT_RST#
PCH_PWROK
SUSP#
VR_ON
PBTN_OUT#
EC_RSMRST#
PM_SLP_S4#
PM_SLP_S3#
+VCC_CORE
ON/OFFBTN#
+3VALW
+5VALW
+3VLP
151.8ms
293.7us
PLT_RST#
PCH_PWROK
SUSP#
VR_ON
PBTN_OUT#
EC_RSMRST#
19.22ms
PM_SLP_S4#
PM_SLP_S3#
Power On
AC modeDH5VF_EVT P ower Sequence
+VCC_CORE
Power Off
174.6ms
ON/OFFBTN#
→
→
+3VALW
+5VALW
20.1ms
Plug in
+3VLP
275.9us
692.9us
910.1us
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Power Sequence
Custom
5 1 12Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Power Sequence
Custom
5 1 12Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Power Sequence
Custom
5 1 12Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
www.laptoprepairsecrets.com
Page 6
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
eDP
Trace Width/Space: 15 mil/ 20 mil
Max Trace Length: 600 mil
20191024
- SDI 20 ohm close to CPU
- BCLK/SDO 30 ohm close to PCH
Coffee Lake-H
- Re-fresh R0 stepping
Comet Lake-H
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_AUXN
EDP_AUXP
DP_RCOMP
CPU_DISPA_BC LK_R
CPU_DISPA_SD I
CPU_DISPA_SD O_R
CPU_DISPA_SD I_R
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_TXP0 <38>
EDP_TXN0 <3 8>
EDP_TXP1 <38>
EDP_TXN1 <3 8>
EDP_AUXP <3 8>
EDP_AUXN <3 8>
CPU_DISPA_BC LK_R <18>
CPU_DISPA_SD O_R <18>
CPU_DISPA_S DI_R <1 8>
EDP_TXN2 <3 8>
EDP_TXP2 <38>
EDP_TXN3 <3 8>
EDP_TXP3 <38>
+VCCIO
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(1/8)DDI/eDP
Custom
6 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(1/8)DDI/eDP
Custom
6 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(1/8)DDI/eDP
Custom
6 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
UH1
S IC FH82HM470 SRJAU A0 FCBGA PCH-H
CMLPCH@
SA0000DDP80
RC1 24.9_040 2_1%
1 2
UC1
S IC CL8070104399007 QTJ0 R0 2.8G S
CMLi9QS@
SA0000D3G10
RC2 20_0402_5 %
12
UC1
S IC CL8070104398806 QTJ1 R0 2.1G 1440 S
CMLi5QS@
SA0000D3I10
UC1
S IC CL8068404121905 QRR5 U0 2.4G FCBGA
CFLi5QS@
SA0000COG00
UC1
S IC CL8070104398908 QTJ2 R0 2.4G 1440 S
CMLi7QS@
SA0000D3N10
UH1
S IC FHHM370 QNYF B0 BGA 874P PCH-
CFLPCHQS@
SA0000BPF10
4 of 13
CFL-H
UC1D
CFL-H_BGA1 440
@
DDI1_TXP_0
K36
DDI1_TXN_0
K37
DDI1_TXP_1
J35
DDI1_TXN_1
J34
DDI1_TXP_2
H37
DDI1_TXN_2
H36
DDI1_TXP_3
J37
DDI1_TXN_3
J38
DDI1_AUXP
D27
DDI1_AUXN
E27
DDI2_TXP_0
H34
DDI2_TXN_0
H33
DDI2_TXP_1
F37
DDI2_TXN_1
G38
DDI2_TXP_2
F34
DDI2_TXN_2
F35
DDI2_TXP_3
E37
DDI2_TXN_3
E36
DDI2_AUXP
F26
DDI2_AUXN
E26
DDI3_TXP_0
C34
DDI3_TXN_0
D34
DDI3_TXP_1
B36
DDI3_TXN_1
B34
DDI3_TXP_2
F33
DDI3_TXN_2
E33
DDI3_TXP_3
C33
DDI3_TXN_3
B33
DDI3_AUXP
A27
DDI3_AUXN
B27
EDP_TXP_0
D29
EDP_TXN_0
E29
EDP_TXP_1
F28
EDP_TXN_1
E28
EDP_TXP_2
A29
EDP_TXN_2
B29
EDP_TXP_3
C28
EDP_TXN_3
B28
EDP_AUXP
C26
EDP_AUXN
B26
EDP_DISP_UTIL
A33
PROC_AUDIO_CLK
G27
DISP_RCOMP
D37
PROC_AUDIO_SDI
G25
PROC_AUDIO_SDO
G29
UC5
S IC CL8068404121905 SRF6X U0 2.4G
CFLi5@
SA0000COG40
UC6
S IC CL8070104399510 SRH84 R1 2.5G
CMLi5@
SA0000DCP40
UC8
S IC CL8070104399510 SRH84 R1 2.5G
CMLi7@
SA0000DCP40
www.laptoprepairsecrets.com
Page 7
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
For ECC DIMM
Interleaved Memory
CHANNEL-A
For ECC DIMM
DDR_A_D48
DDR_A_D62
DDR_A_D58
DDR_A_D63
DDR_A_D30
DDR_A_D18
DDR_A_D22
DDR_A_D19
DDR_A_D42
DDR_A_D40
DDR_A_D34
DDR_A_D41
DDR_A_D44
DDR_A_D16
DDR_A_D17
DDR_A_D20
DDR_A_D21
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D43
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D7
DDR_A_D15
DDR_A_D11
DDR_A_D6
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK#1
DDR_A_CLK1
DDR_A_CKE1
DDR_A_CKE0
DDR_A_CS#1
DDR_A_CS#0
DDR_A_ODT0
DDR_A_ODT1
DDR_A_BG0
DDR_A_BA1
DDR_A_BA0
DDR_A_MA16_ RAS#
DDR_A_MA14_ WE#
DDR_A_MA15_ CAS#
DDR_A_MA12
DDR_A_MA11
DDR_A_ACT#
DDR_A_BG1
DDR_A_MA5
DDR_A_MA9
DDR_A_MA6
DDR_A_MA8
DDR_A_MA7
DDR_A_MA13
DDR_A_MA2
DDR_A_MA10
DDR_A_MA1
DDR_A_MA0
DDR_A_MA3
DDR_A_MA4
DDR_A_PAR
DDR_A_ALERT #
DDR_A_DQS# 4
DDR_A_DQS# 6
DDR_A_DQS# 5
DDR_A_DQS# 7
DDR_A_DQS# 2
DDR_A_DQS# 3
DDR_A_DQS# 0
DDR_A_DQS# 1
DDR_A_DQS5
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS1
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
DDR_A_D[0..63 ]<23>
DDR_A_CLK# 0 <23>
DDR_A_CLK0 <23 >
DDR_A_CLK# 1 <23>
DDR_A_CLK1 <23 >
DDR_A_CKE0 < 23>
DDR_A_CKE1 < 23>
DDR_A_ODT0 <23>
DDR_A_CS#1 <23 >
DDR_A_CS#0 <23 >
DDR_A_ODT1 <23>
DDR_A_BG0 <23>
DDR_A_BA0 <23>
DDR_A_BA1 <23>
DDR_A_MA1 6_RAS# <23 >
DDR_A_MA1 4_WE# <23>
DDR_A_MA1 5_CAS# <23 >
DDR_A_MA5 <23>
DDR_A_MA9 <23>
DDR_A_MA6 <23>
DDR_A_MA8 <23>
DDR_A_MA7 <23>
DDR_A_MA1 2 < 23>
DDR_A_MA1 1 < 23>
DDR_A_ACT# <23>
DDR_A_BG1 <23>
DDR_A_MA2 <23>
DDR_A_MA1 0 < 23>
DDR_A_MA1 <23>
DDR_A_MA0 <23>
DDR_A_MA1 3 < 23>
DDR_A_MA3 <23>
DDR_A_MA4 <23>
DDR_A_PAR <23>
DDR_A_ALE RT# <23>
DDR_A_DQS# 4 <23>
DDR_A_DQS# 6 <23>
DDR_A_DQS# 5 <23>
DDR_A_DQS# 7 <23>
DDR_A_DQS# 2 <23>
DDR_A_DQS# 3 <23>
DDR_A_DQS# 0 <23>
DDR_A_DQS# 1 <23>
DDR_A_DQS1 < 23>
DDR_A_DQS3 < 23>
DDR_A_DQS2 < 23>
DDR_A_DQS0 < 23>
DDR_A_DQS5 < 23>
DDR_A_DQS4 < 23>
DDR_A_DQS7 < 23>
DDR_A_DQS6 < 23>
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(2/8)DIMMA
Custom
7 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(2/8)DIMMA
Custom
7 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(2/8)DIMMA
Custom
7 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
1 OF 13
DDR CHANNEL A
CFL-H
DDR4(IL)/LP3-DDR4(NIL) LP3/DDR4
LP3/DDR4
DDR4(IL)/LP3-DDR4(NIL)
UC1A
CFL-H_BGA1 440
@
DDR0_DQSN_7/DDR1_DQSN_5
L3
DDR0_DQSN_0/DDR0_DQSN_0
BR5
DDR0_DQ_9/DDR0_DQ_9
BL5
DDR0_DQ_13/DDR0_DQ_13
BK5
DDR0_DQ_17/DDR0_DQ_33
BG5
NC/DDR0_ECC_2
AY4
NC/DDR0_ALERT#
AU5
DDR0_CKN_0/DDR0_CKN_0
AG2
DDR0_CS#_0/DDR0_CS#_0
AD5
DDR0_CAB_1/DDR0_MA_15
AD1
DDR0_DQ_40/DDR1_DQ_8
V5
DDR0_DQ_61/DDR1_DQ_45
M2
DDR0_DQ_5/DDR0_DQ_5
BP6
DDR0_DQSP_2/DDR0_DQSP_4
BF3
NC/DDR0_ECC_3
AY5
DDR0_CKE_3/DDR0_CKE_3
AT5
DDR0_CKE_0/DDR0_CKE_0
AT1
NC/DDR0_CKN_2
AK3
DDR0_ODT_0/DDR0_ODT_0
AD3
NC/DDR0_CS#_2
AD2
DDR0_DQ_38/DDR1_DQ_6
AA2
DDR0_DQSN_5/DDR1_DQSN_1
U3
DDR0_DQ_52/DDR1_DQ_36
R5
DDR0_DQSP_7/DDR1_DQSP_5
M3
DDR0_DQ_1/DDR0_DQ_1
BT6
DDR0_DQSP_0/DDR0_DQSP_0
BP5
DDR0_DQ_31/DDR0_DQ_47
BC2
NC/DDR0_ECC_4
BA5
NC/DDR0_CKN_3
AL1
NC/DDR0_CS#_3
AE5
DDR0_DQ_34/DDR1_DQ_2
AA4
DDR0_DQ_55/DDR1_DQ_39
P1
DDR0_DQ_57/DDR1_DQ_41
M1
NC/DDR0_ECC_5
BA4
DDR0_DQSN_8/DDR0_DQSN_8
BA3
DDR0_CAA_6/DDR0_MA_12
AU4
DDR0_CAA_8/DDR0_ACT#
AU3
DDR0_CAA_4/DDR0_MA_7
AN1
NC/DDR0_CKP_2
AL3
DDR0_CAB_6/DDR0_BA_1
AH1
DDR0_CKP_0/DDR0_CKP_0
AG1
DDR0_DQSP_5/DDR1_DQSP_1
V3
DDR0_DQ_44/DDR1_DQ_12
V1
DDR0_DQ_48/DDR1_DQ_32
R2
DDR0_DQ_22/DDR0_DQ_38
BF1
DDR0_DQ_24/DDR0_DQ_40
BD2
NC/DDR0_ECC_6
AY1
DDR0_CAA_9/DDR0_BG_1
AU2
NC/DDR0_CKP_3
AL2
DDR0_CAB_2/DDR0_MA_14
AG4
DDR0_DQ_47/DDR1_DQ_15
U4
DDR0_DQ_11/DDR0_DQ_11
BM1
DDR0_DQ_8/DDR0_DQ_8
BL4
DDR0_DQ_14/DDR0_DQ_14
BK1
DDR0_DQSN_3/DDR0_DQSN_5
BD3
DDR0_DQ_27/DDR0_DQ_43
BC5
DDR0_DQSP_8/DDR0_DQSP_8
AY3
NC/DDR0_ECC_7
AY2
DDR0_CAA_1/DDR0_MA_9
AT4
DDR0_CS#_1/DDR0_CS#_1
AE2
DDR0_DQ_37/DDR1_DQ_5
AB4
DDR0_DQ_4/DDR0_DQ_4
BN5
DDR0_DQ_18/DDR0_DQ_34
BF4
DDR0_CAA_0/DDR0_MA_5
AP1
DDR0_CKN_1/DDR0_CKN_1
AK1
DDR0_DQ_62/DDR1_DQ_46
L5
DDR0_DQ_0/DDR0_DQ_0
BR6
DDR0_DQSN_1/DDR0_DQSN_1
BL3
DDR0_DQSP_3/DDR0_DQSP_5
BC3
DDR0_CKE_1/DDR0_CKE_1
AT2
NC/DDR0_MA_3
AP5
DDR0_CAA_7/DDR0_MA_11
AN2
DDR0_CAB_7/DDR0_MA_10
AH2
DDR0_DQ_33/DDR1_DQ_1
AB2
DDR0_DQ_50/DDR1_DQ_34
R4
DDR0_DQ_53/DDR1_DQ_37
P2
DDR0_CAA_5/DDR0_BG_0
AU1
NC/DDR0_MA_4
AP2
DDR0_CAB_9/DDR0_MA_0
AH3
NC/DDR0_ODT_1
AE4
DDR0_DQ_58/DDR1_DQ_42
L4
DDR0_DQ_7/DDR0_DQ_7
BN3
DDR0_DQSP_1/DDR0_DQSP_1
BK3
DDR0_DQ_20/DDR0_DQ_36
BG2
DDR0_DQ_23/DDR0_DQ_39
BF2
DDR0_CKP_1/DDR0_CKP_1
AK2
NC/DDR0_ODT_2
AE1
DDR0_DQ_45/DDR1_DQ_13
V4
DDR0_DQ_42/DDR1_DQ_10
U1
DDR0_DQ_49/DDR1_DQ_33
P5
DDR0_DQ_3/DDR0_DQ_3
BR3
DDR0_DQ_28/DDR0_DQ_44
BD5
DDR0_DQ_25/DDR0_DQ_41
BD1
DDR0_CAA_3/DDR0_MA_8
AN3
DDR0_CAB_3/DDR0_MA_16
AH4
DDR0_CAB_0/DDR0_MA_13
AE3
NC/DDR0_ODT_3
AD4
DDR0_DQ_36/DDR1_DQ_4
AB5
DDR0_DQSN_6/DDR1_DQSN_4
P3
DDR0_DQ_12/DDR0_DQ_12
BK4
DDR0_DQ_15/DDR0_DQ_15
BK2
DDR0_DQ_16/DDR0_DQ_32
BG4
DDR0_DQ_19/DDR0_DQ_35
BF5
DDR0_DQ_32/DDR1_DQ_0
AB1
DDR0_DQSP_6/DDR1_DQSP_4
R3
DDR0_DQ_60/DDR1_DQ_44
M5
DDR0_CKE_2/DDR0_CKE_2
AT3
DDR0_DQSN_4/DDR1_DQSN_0
AA3
DDR0_DQ_41/DDR1_DQ_9
V2
DDR0_DQ_51/DDR1_DQ_35
P4
DDR0_DQ_63/DDR1_DQ_47
L1
DDR0_CAA_2/DDR0_MA_6
AP3
DDR0_CAB_4/DDR0_BA_0
AH5
DDR0_DQ_39/DDR1_DQ_7
AA1
DDR0_DQ_54/DDR1_DQ_38
R1
DDR0_DQ_6/DDR0_DQ_6
BP2
DDR0_DQ_30/DDR0_DQ_46
BC1
DDR0_DQSP_4/DDR1_DQSP_0
AB3
DDR0_DQ_35/DDR1_DQ_3
AA5
DDR0_DQ_43/DDR1_DQ_11
U2
DDR0_DQ_56/DDR1_DQ_40
M4
DDR0_DQ_59/DDR1_DQ_43
L2
DDR0_DQ_2/DDR0_DQ_2
BP3
DDR0_DQ_21/DDR0_DQ_37
BG1
NC/DDR0_ECC_0
BA2
DDR0_CAB_8/DDR0_MA_1
AP4
DDR0_CAB_5/DDR0_MA_2
AN4
DDR0_DQ_46/DDR1_DQ_14
U5
DDR0_DQ_10/DDR0_DQ_10
BL2
DDR0_DQSN_2/DDR0_DQSN_4
BG3
DDR0_DQ_29/DDR0_DQ_45
BD4
DDR0_DQ_26/DDR0_DQ_42
BC4
NC/DDR0_ECC_1
BA1
NC/DDR0_PAR
AG3
www.laptoprepairsecrets.com
Page 8
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CHANNEL-B Interleaved Memory
For ECC DIMMFor ECC DIMM
Trace Width/Space: 15 mil/ 25 mil
Max Trace Length: 500 mil
DDR_B_MA12
DDR_B_MA9
DDR_B_MA5
DDR_B_BG 1
DDR_B_ACT #
DDR_B_MA11
DDR_B_MA13
DDR_B_MA7
DDR_B_MA8
DDR_B_MA6
DDR_B_MA1
DDR_B_MA10
DDR_B_MA2
DDR_B_MA4
DDR_B_MA3
DDR_B_MA0
DDR_B_PAR
DDR_B_ALER T#
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_DQS#7
DDR_B_DQS7
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
+0.6V_B_V REFDQ
+0.6V_VREF CA
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D1 7
DDR_B_D1 8
DDR_B_D1 9
DDR_B_D2 0
DDR_B_D2 1
DDR_B_D2 2
DDR_B_D2 3
DDR_B_D2 4
DDR_B_D2 5
DDR_B_D2 6
DDR_B_D2 7
DDR_B_D2 8
DDR_B_D2 9
DDR_B_D3 0
DDR_B_D3 1
DDR_B_D3 2
DDR_B_D3 3
DDR_B_D3 4
DDR_B_D3 5
DDR_B_D3 6
DDR_B_D3 7
DDR_B_D3 8
DDR_B_D3 9
DDR_B_D4 0
DDR_B_D4 1
DDR_B_D4 2
DDR_B_D4 3
DDR_B_D4 4
DDR_B_D4 5
DDR_B_D4 6
DDR_B_D4 7
DDR_B_D4 8
DDR_B_D4 9
DDR_B_D5 0
DDR_B_D5 1
DDR_B_D5 2
DDR_B_D5 3
DDR_B_D5 4
DDR_B_D5 5
DDR_B_D5 6
DDR_B_D5 7
DDR_B_D5 8
DDR_B_D5 9
DDR_B_D6 0
DDR_B_D6 1
DDR_B_D6 2
DDR_B_D6 3
DDR_B_CL K0
DDR_B_CL K#0
DDR_B_CL K1
DDR_B_CL K#1
DDR_B_CKE 0
DDR_B_CKE 1
DDR_B_CS# 0
DDR_B_CS# 1
DDR_B_ODT 0
DDR_B_ODT 1
DDR_B_MA1 6_RAS#
DDR_B_MA1 4_WE#
DDR_B_MA1 5_CAS#
DDR_B_BG0
DDR_B_BA1
DDR_B_BA0
DDR_B_MA9 <24>
DDR_B_MA5 <24>
DDR_B_MA1 2 <24>
DDR_B_MA7 <24>
DDR_B_MA8 <24>
DDR_B_MA6 <24>
DDR_B_BG1 <24>
DDR_B_ACT# <24>
DDR_B_MA1 1 <24>
DDR_B_MA0 <24>
DDR_B_MA1 <24>
DDR_B_MA1 0 <24>
DDR_B_MA2 <24>
DDR_B_MA4 <24>
DDR_B_MA3 <24>
DDR_B_MA1 3 <24>
DDR_B_PAR <24>
DDR_B_ALER T# <24>
DDR_B_DQS #0 <24 >
DDR_B_DQS 0 <24>
DDR_B_DQS #1 <24 >
DDR_B_DQS 1 <24>
DDR_B_DQS #2 <24 >
DDR_B_DQS 2 <24>
DDR_B_DQS #3 <24 >
DDR_B_DQS 3 <24>
DDR_B_DQS #4 <24 >
DDR_B_DQS 4 <24>
DDR_B_DQS #5 <24 >
DDR_B_DQS 5 <24>
DDR_B_DQS #6 <24 >
DDR_B_DQS 6 <24>
DDR_B_DQS #7 <24 >
DDR_B_DQS 7 <24>
DDR_B_D[0..63 ]<24>
DDR_B_CK E0 <24>
DDR_B_CK E1 <24>
DDR_B_CLK #0 <24>
DDR_B_CLK 1 <24>
DDR_B_CLK 0 <24>
DDR_B_CLK #1 <24>
DDR_B_CS #0 <24>
DDR_B_CS #1 <24>
DDR_B_OD T0 <24>
DDR_B_OD T1 <24>
DDR_B_MA1 6_RAS# <24 >
DDR_B_MA1 4_WE# <24>
DDR_B_MA1 5_CAS# <24 >
DDR_B_BG0 <24>
DDR_B_BA0 <24>
DDR_B_BA1 <24>
+0.6V_VREF CA
+0.6V_B_V REFDQ
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(3/8)DIMMB
Custom
8 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(3/8)DIMMB
Custom
8 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(3/8)DIMMB
Custom
8 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
2 OF 13
DDR CHANNEL B
CFL-H
DDR4(IL)/LP3-DDR4(NIL)
DDR4(IL)/LP3-DDR4(NIL)
LP3/DDR4
LP3/DDR4
DDR4(IL)/LP3-DDR4(NIL)
UC1B
CFL-H_BGA14 40
@
DDR_VREF_CA
BN13
DDR1_DQSP_5/DDR1_DQSP_3
V9
DDR1_DQ_55/DDR1_DQ_55
P8
DDR1_DQ_58/DDR1_DQ_58
L7
DDR1_DQ_0/DDR0_DQ_16
BT11
NC/DDR1_ECC_1
AY11
DDR1_CAA_0/DDR1_MA_5
AM6
NC/DDR1_PAR
AJ7
DDR1_DQ_45/DDR1_DQ_29
W10
DDR1_DQ_42/DDR1_DQ_26
V10
DDR1_DQ_49/DDR1_DQ_49
P11
DDR1_DQ_3/DDR0_DQ_19
BR8
DDR1_DQ_5/DDR0_DQ_21
BN11
DDR1_DQ_22/DDR0_DQ_54
BG7
DDR1_DQ_25/DDR0_DQ_57
BC11
NC/DDR1_ECC_2
AY8
DDR1_CAA_5/DDR1_BG_0
AR9
DDR1_DQ_47/DDR1_DQ_31
V8
DDR1_DQ_8/DDR0_DQ_24
BL12
DDR1_DQ_12/DDR0_DQ_28
BJ11
DDR1_DQ_16/DDR0_DQ_48
BG11
DDR1_DQSN_3/DDR0_DQSN_7
BC9
NC/DDR1_ECC_3
AW8
NC/DDR1_CKN_2
AM10
DDR1_CAB_9/DDR1_MA_0
AJ9
NC/DDR1_CS#_2
AF10
DDR1_DQ_33/DDR1_DQ_17
AA10
DDR1_VREF_DQ
BR13
DDR1_DQSN_1/DDR0_DQSN_3
BL9
DDR1_DQ_14/DDR0_DQ_30
BL7
DDR1_DQ_18/DDR0_DQ_50
BG8
DDR1_DQSP_3/DDR0_DQSP_7
BB9
DDR1_DQSN_8/DDR1_DQSN_8
AY9
NC/DDR1_ECC_4
AY10
DDR1_CAA_3/DDR1_MA_8
AN8
NC/DDR1_CKN_3
AJ11
DDR1_CAB_1/DDR1_MA_15
AF8
DDR1_CS#_0/DDR1_CS#_0
AF11
NC/DDR1_CS#_3
AE10
DDR1_DQ_38/DDR1_DQ_22
AC8
DDR1_DQ_62/DDR1_DQ_62
M7
NC/DDR1_ECC_5
AW10
DDR1_CKN_0/DDR1_CKN_0
AN9
NC/DDR1_CKP_2
AM11
DDR1_DQ_50/DDR1_DQ_50
P7
DDR1_DQ_53/DDR1_DQ_53
P10
DDR1_DQSP_1/DDR0_DQSP_3
BJ9
NC/DDR1_ECC_6
AY7
DDR1_DQSP_8/DDR1_DQSP_8
AW9
DDR1_CKE_0/DDR1_CKE_0
AT8
DDR1_CKE_3/DDR1_CKE_3
AT11
NC/DDR1_CKP_3
AJ10
DDR1_ODT_0/DDR1_ODT_0
AF7
DDR1_DQ_40/DDR1_DQ_24
W8
DDR1_DQ_43/DDR1_DQ_27
V11
DDR1_DQ_59/DDR1_DQ_59
M8
DDR1_DQ_56/DDR1_DQ_56
L11
DDR1_DQ_1/DDR0_DQ_17
BR11
DDR1_DQ_23/DDR0_DQ_55
BF7
DDR1_DQ_20/DDR0_DQ_52
BF11
NC/DDR1_ECC_7
AW7
NC/DDR1_ALERT#
AR8
NC/DDR1_MA_3
AL5
DDR1_CAB_4/DDR1_BA_0
AH8
DDR1_DQSN_6/DDR1_DQSN_6
R9
DDR1_DQ_6/DDR0_DQ_22
BP8
DDR0_VREF_DQ
BP13
DDR1_DQ_10/DDR0_DQ_26
BL8
DDR1_DQ_9/DDR0_DQ_25
BL11
DDR1_DQ_28/DDR0_DQ_60
BC10
DDR1_DQ_26/DDR0_DQ_58
BB8
DDR1_CAA_6/DDR1_MA_12
AR10
DDR1_CAA_2/DDR1_MA_6
AN7
DDR1_CKP_0/DDR1_CKP_0
AM9
NC/DDR1_MA_4
AL6
DDR1_CAB_2/DDR1_MA_14
AH11
DDR1_DQ_15/DDR0_DQ_31
BJ7
DDR1_DQ_13/DDR0_DQ_29
BJ10
DDR1_DQ_17/DDR0_DQ_49
BG10
DDR1_CAB_8/DDR1_MA_1
AK6
DDR1_DQSN_4/DDR1_DQSN_2
AC9
DDR1_DQ_34/DDR1_DQ_18
AC11
DDR1_DQ_36/DDR1_DQ_20
AA7
DDR1_DQSP_6/DDR1_DQSP_6
P9
DDR1_DQ_60/DDR1_DQ_60
L10
DDR1_DQ_19/DDR0_DQ_51
BF8
DDR1_CKN_1/DDR1_CKN_1
AM8
DDR1_CAB_5/DDR1_MA_2
AK5
NC/DDR1_ODT_1
AE8
DDR1_CS#_1/DDR1_CS#_1
AE7
DDR1_DQ_39/DDR1_DQ_23
AC7
DDR1_DQ_63/DDR1_DQ_63
L8
DDR1_CKE_1/DDR1_CKE_1
AT10
DDR1_CAB_7/DDR1_MA_10
AH7
NC/DDR1_ODT_2
AE9
DDR1_DQSP_4/DDR1_DQSP_2
AA9
DDR1_DQ_51/DDR1_DQ_51
R8
DDR1_DQ_54/DDR1_DQ_54
R7
DDR1_DQ_57/DDR1_DQ_57
M11
DDR_RCOMP_0
G1
DDR1_DQ_30/DDR0_DQ_62
BC7
DDR1_CAA_7/DDR1_MA_11
AN11
NC/DDR1_ODT_3
AE11
DDR1_DQ_41/DDR1_DQ_25
W7
DDR1_DQ_44/DDR1_DQ_28
W11
DDR_RCOMP_1
H1
DDR1_DQ_2/DDR0_DQ_18
BT9
DDR1_DQ_4/DDR0_DQ_20
BP11
DDR1_DQSN_2/DDR0_DQSN_6
BG9
DDR1_DQ_21/DDR0_DQ_53
BF10
DDR1_DQ_24/DDR0_DQ_56
BB11
DDR1_DQ_46/DDR1_DQ_30
V7
DDR1_DQ_48/DDR1_DQ_48
R11
DDR_RCOMP_2
J2
DDR1_DQ_7/DDR0_DQ_23
BN8
DDR1_DQ_11/DDR0_DQ_27
BJ8
DDR1_DQ_27/DDR0_DQ_59
BC8
DDR1_DQ_29/DDR0_DQ_61
BB10
DDR1_CKP_1/DDR1_CKP_1
AM7
DDR1_CAB_6/DDR1_BA_1
AH9
DDR1_DQ_35/DDR1_DQ_19
AC10
DDR1_DQ_32/DDR1_DQ_16
AA11
DDR1_DQSN_7/DDR1_DQSN_7
M9
DDR1_DQSN_0/DDR0_DQSN_2
BN9
DDR1_DQSP_2/DDR0_DQSP_6
BF9
DDR1_CAA_8/DDR1_ACT#
AT9
DDR1_CAA_9/DDR1_BG_1
AR7
DDR1_CAA_4/DDR1_MA_7
AN10
DDR1_CAB_3/DDR1_MA_16
AH10
DDR1_CAB_0/DDR1_MA_13
AF9
DDR1_DQ_37/DDR1_DQ_21
AA8
DDR1_DQSN_5/DDR1_DQSN_3
W9
DDR1_DQ_61/DDR1_DQ_61
M10
DDR1_DQSP_7/DDR1_DQSP_7
L9
DDR1_DQSP_0/DDR0_DQSP_2
BP9
DDR1_CAA_1/DDR1_MA_9
AR11
DDR1_DQ_52/DDR1_DQ_52
R10
DDR1_DQ_31/DDR0_DQ_63
BB7
NC/DDR1_ECC_0
AW11
DDR1_CKE_2/DDR1_CKE_2
AT7
RC4 75_0402_ 1%
1 2
RC3 121_0402 _1%
1 2
RC5 100_0402 _1%
1 2
www.laptoprepairsecrets.com
Page 9
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Trace Width/Space: 15 mil/ 15 mil
Max Trace Length: 600 mil
To DGPU
PEG Lane Reversed
To DGPU
PEG Lane Reversed
To PCH
To PCH
PEG&DMI
DMI_CRX_PT X_P0
DMI_CRX_PT X_N0
DMI_CRX_PT X_N1
DMI_CRX_PT X_P1
DMI_CRX_PT X_P2
DMI_CRX_PT X_N2
DMI_CRX_PT X_N3
DMI_CRX_PT X_P3
DMI_CTX_PR X_P0
DMI_CTX_PR X_N0
DMI_CTX_PR X_N1
DMI_CTX_PR X_P1
DMI_CTX_PR X_P2
DMI_CTX_PR X_N2
DMI_CTX_PR X_N3
DMI_CTX_PR X_P3
PEG_RCOMP
PEG_CRX_G TX_N1
PEG_CRX_G TX_P1
PEG_CRX_G TX_P2
PEG_CRX_G TX_N2
PEG_CRX_G TX_P3
PEG_CRX_G TX_N3
PEG_CRX_G TX_N4
PEG_CRX_G TX_P4
PEG_CRX_G TX_N5
PEG_CRX_G TX_P5
PEG_CRX_G TX_N6
PEG_CRX_G TX_P6
PEG_CRX_G TX_N7
PEG_CRX_G TX_P7
PEG_CRX_G TX_N8
PEG_CRX_G TX_P8
PEG_CRX_G TX_N9
PEG_CRX_G TX_P9
PEG_CRX_G TX_N10
PEG_CRX_G TX_P10
PEG_CRX_G TX_N11
PEG_CRX_G TX_P11
PEG_CRX_G TX_N12
PEG_CRX_G TX_P12
PEG_CRX_G TX_N13
PEG_CRX_G TX_P13
PEG_CRX_G TX_N14
PEG_CRX_G TX_P14
PEG_CRX_G TX_P0
PEG_CRX_G TX_N0
PEG_CRX_G TX_N15
PEG_CRX_G TX_P15
PEG_CTX_G RX_N1
PEG_CTX_G RX_P1
PEG_CTX_G RX_N2
PEG_CTX_G RX_P2
PEG_CTX_G RX_N3
PEG_CTX_G RX_P3
PEG_CTX_G RX_N4
PEG_CTX_G RX_P4
PEG_CTX_G RX_N5
PEG_CTX_G RX_P5
PEG_CTX_G RX_N6
PEG_CTX_G RX_P6
PEG_CTX_G RX_N7
PEG_CTX_G RX_P7
PEG_CTX_G RX_N8
PEG_CTX_G RX_P8
PEG_CTX_G RX_N9
PEG_CTX_G RX_P9
PEG_CTX_G RX_N10
PEG_CTX_G RX_P10
PEG_CTX_G RX_N11
PEG_CTX_G RX_P11
PEG_CTX_G RX_N12
PEG_CTX_G RX_P12
PEG_CTX_G RX_N13
PEG_CTX_G RX_P13
PEG_CTX_G RX_N14
PEG_CTX_G RX_P14
PEG_CTX_G RX_N15
PEG_CTX_G RX_P15
PEG_CTX_G RX_N0
PEG_CTX_G RX_P0
DMI_CRX_PTX _N0<14>
DMI_CRX_PTX _P0<14>
DMI_CRX_PTX _N1<14>
DMI_CRX_PTX _P1<14>
DMI_CRX_PTX _P2<14>
DMI_CRX_PTX _N2<14>
DMI_CRX_PTX _N3<14>
DMI_CRX_PTX _P3<14>
DMI_CTX_PR X_N1 <14>
DMI_CTX_PR X_P1 <14>
DMI_CTX_PR X_N0 <14>
DMI_CTX_PR X_P0 <14>
DMI_CTX_PR X_P3 <14>
DMI_CTX_PR X_N3 <14>
DMI_CTX_PR X_N2 <14>
DMI_CTX_PR X_P2 <14>
PEG_CRX_ C_GTX_P0<27>
PEG_CRX_ C_GTX_N0<27>
PEG_CRX_ C_GTX_P1<27>
PEG_CRX_ C_GTX_N1<27>
PEG_CRX_ C_GTX_P2<27>
PEG_CRX_ C_GTX_N2<27>
PEG_CRX_ C_GTX_N3<27>
PEG_CRX_ C_GTX_P3<27>
PEG_CRX_ C_GTX_P4<27>
PEG_CRX_ C_GTX_N4<27>
PEG_CRX_ C_GTX_P5<27>
PEG_CRX_ C_GTX_N5<27>
PEG_CRX_ C_GTX_N6<27>
PEG_CRX_ C_GTX_P6<27>
PEG_CRX_ C_GTX_P7<27>
PEG_CRX_ C_GTX_N7<27>
PEG_CRX_ C_GTX_N8<27>
PEG_CRX_ C_GTX_P8<27>
PEG_CRX_ C_GTX_P9<27>
PEG_CRX_ C_GTX_N9<27>
PEG_CRX_ C_GTX_P10<27>
PEG_CRX_ C_GTX_N10<27>
PEG_CRX_ C_GTX_N11<27>
PEG_CRX_ C_GTX_P11<27>
PEG_CRX_ C_GTX_P12<27>
PEG_CRX_ C_GTX_N12<27>
PEG_CRX_ C_GTX_P13<27>
PEG_CRX_ C_GTX_N13<27>
PEG_CRX_ C_GTX_N14<27>
PEG_CRX_ C_GTX_P14<27>
PEG_CRX_ C_GTX_P15<27>
PEG_CRX_ C_GTX_N15<27>
PEG_CTX_C_ GRX_N0 <27>
PEG_CTX_ C_GRX_P0 <27>
PEG_CTX_C_ GRX_N1 <27>
PEG_CTX_ C_GRX_P1 <27>
PEG_CTX_ C_GRX_P2 <27>
PEG_CTX_C_ GRX_N2 <27>
PEG_CTX_C_ GRX_N3 <27>
PEG_CTX_ C_GRX_P3 <27>
PEG_CTX_C_ GRX_N4 <27>
PEG_CTX_ C_GRX_P4 <27>
PEG_CTX_ C_GRX_P5 <27>
PEG_CTX_C_ GRX_N5 <27>
PEG_CTX_ C_GRX_P6 <27>
PEG_CTX_C_ GRX_N6 <27>
PEG_CTX_C_ GRX_N7 <27>
PEG_CTX_ C_GRX_P7 <27>
PEG_CTX_ C_GRX_P8 <27>
PEG_CTX_C_ GRX_N8 <27>
PEG_CTX_C_ GRX_N9 <27>
PEG_CTX_ C_GRX_P9 <27>
PEG_CTX_C_ GRX_N10 <27>
PEG_CTX_ C_GRX_P10 <27>
PEG_CTX_ C_GRX_P11 <27>
PEG_CTX_C_ GRX_N11 <27>
PEG_CTX_C_ GRX_N12 <27>
PEG_CTX_ C_GRX_P12 <27>
PEG_CTX_ C_GRX_P13 <27>
PEG_CTX_C_ GRX_N13 <27>
PEG_CTX_ C_GRX_P14 <27>
PEG_CTX_C_ GRX_N14 <27>
PEG_CTX_C_ GRX_N15 <27>
PEG_CTX_ C_GRX_P15 <27>
+VCCIO
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PEG/DMI
Custom
9 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PEG/DMI
Custom
9 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PEG/DMI
Custom
9 112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CC14 0.22U_0201_6.3V6KVGA@
1 2
CC20 0.22U_0201_6.3V6KVGA@
1 2
CC130.22U_020 1_6.3V6K VGA@
12
CC57 0.22U_0201_6.3V6KVGA@
1 2
CC180.22U_020 1_6.3V6K VGA@
12
CC620.22U_020 1_6.3V6K VGA@
12
CC25 0.22U_0201_6.3V6KVGA@
1 2
CC17 0.22U_0201_6.3V6KVGA@
1 2
CC260.22U_020 1_6.3V6K VGA@
12
CC39 0.22U_0201_6.3V6KVGA@
1 2
CC640.22U_020 1_6.3V6K VGA@
12
CC560.22U_020 1_6.3V6K VGA@
12
CC27 0.22U_0201_6.3V6KVGA@
1 2
CC35 0.22U_0201_6.3V6KVGA@
1 2
CC540.22U_020 1_6.3V6K VGA@
12
CC63 0.22U_0201_6.3V6KVGA@
1 2
CC420.22U_020 1_6.3V6K VGA@
12
CC110.22U_020 1_6.3V6K VGA@
12
CC53 0.22U_0201_6.3V6KVGA@
1 2
CC43 0.22U_0201_6.3V6KVGA@
1 2
CC280.22U_020 1_6.3V6K VGA@
12
CC23 0.22U_0201_6.3V6KVGA@
1 2
CC240.22U_020 1_6.3V6K VGA@
12
CC480.22U_020 1_6.3V6K VGA@
12
CC59 0.22U_0201_6.3V6KVGA@
1 2
CC55 0.22U_0201_6.3V6KVGA@
1 2
CC400.22U_020 1_6.3V6K VGA@
12
CC19 0.22U_0201_6.3V6KVGA@
1 2
CC600.22U_020 1_6.3V6K VGA@
12
CC440.22U_0201 _6.3V6K VGA@
12
CC51 0.22U_0201_6.3V6KVGA@
1 2
CC16 0.22U_0201_6.3V6KVGA@
1 2
CC520.22U_0201 _6.3V6K VGA@
12
CC29 0.22U_0201_6.3V6KVGA@
1 2
CC210.22U_0201 _6.3V6K VGA@
12
CC340.22U_0201 _6.3V6K VGA@
12
3 OF 13
CFL-H
UC1C
CFL-H_BGA144 0
@
PEG_RXP_0
E25
PEG_RXN_0
D25
PEG_RXP_1
E24
PEG_RXN_1
F24
PEG_RXP_2
E23
PEG_RXN_2
D23
PEG_RXP_3
E22
PEG_RXN_3
F22
PEG_RXP_4
E21
PEG_RXN_4
D21
PEG_RXP_5
E20
PEG_RXN_5
F20
PEG_RXP_6
E19
PEG_RXN_6
D19
PEG_RXP_7
E18
PEG_RXN_7
F18
PEG_RXP_8
D17
PEG_RXN_8
E17
PEG_RXP_9
F16
PEG_RXN_9
E16
PEG_RXP_10
D15
PEG_RXN_10
E15
PEG_RXP_11
F14
PEG_RXN_11
E14
PEG_RXP_12
D13
PEG_RXN_12
E13
PEG_RXP_13
F12
PEG_RXN_13
E12
PEG_RXP_14
D11
PEG_RXN_14
E11
PEG_RXP_15
F10
PEG_RXN_15
E10
DMI_RXP_0
D8
DMI_RXN_0
E8
DMI_RXP_1
E6
DMI_RXN_1
F6
DMI_RXP_2
D5
DMI_RXN_2
E5
DMI_RXP_3
J8
DMI_RXN_3
J9
PEG_TXP_0
B25
PEG_TXN_0
A25
PEG_TXP_1
B24
PEG_TXN_1
C24
PEG_TXP_2
B23
PEG_TXN_2
A23
PEG_TXP_3
B22
PEG_TXN_3
C22
PEG_TXP_4
B21
PEG_TXN_4
A21
PEG_TXP_5
B20
PEG_TXN_5
C20
PEG_TXP_6
B19
PEG_TXN_6
A19
PEG_TXP_7
B18
PEG_TXN_7
C18
PEG_TXP_8
A17
PEG_TXN_8
B17
PEG_TXP_9
C16
PEG_TXN_9
B16
PEG_TXP_10
A15
PEG_TXN_10
B15
PEG_TXP_11
C14
PEG_TXN_11
B14
PEG_TXP_12
A13
PEG_TXN_12
B13
PEG_TXP_13
C12
PEG_TXN_13
B12
PEG_TXP_14
A11
PEG_TXN_14
B11
PEG_TXP_15
C10
PEG_TXN_15
B10
DMI_TXP_0
B8
DMI_TXN_0
A8
DMI_TXP_1
C6
DMI_TXN_1
B6
DMI_TXP_2
B5
DMI_TXN_2
A5
DMI_TXP_3
D4
DMI_TXN_3
B4
PEG_RCOMP
G2
CC47 0.22U_0201_6.3V6KVGA@
1 2
CC3 0.22U_0 201_6.3V6KVGA@
1 2
CC500.22U_0201 _6.3V6K VGA@
12
CC61 0.22U_0201_6.3V6KVGA@
1 2
CC150.22U_0201 _6.3V6K VGA@
12
CC120.22U_0201 _6.3V6K VGA@
12
CC37 0.22U_0201_6.3V6KVGA@
1 2
CC31 0.22U_0201_6.3V6KVGA@
1 2
CC49 0.22U_0201_6.3V6KVGA@
1 2
CC220.22U_0201 _6.3V6K VGA@
12
CC300.22U_0201 _6.3V6K VGA@
12
CC6 0.22U_0 201_6.3V6KVGA@
1 2
CC41 0.22U_0201_6.3V6KVGA@
1 2
CC5 0.22U_0 201_6.3V6KVGA@
1 2
CC320.22U_0201 _6.3V6K VGA@
12
CC460.22U_0201 _6.3V6K VGA@
12
CC10 0.22U_0201_6.3V6KVGA@
1 2
CC580.22U_0201 _6.3V6K VGA@
12
CC1 0.22U_0 201_6.3V6KVGA@
1 2
CC7 0.22U_0 201_6.3V6KVGA@
1 2
CC380.22U_0201 _6.3V6K VGA@
12
CC40.22U_0201 _6.3V6K VGA@
12
CC20.22U_0201 _6.3V6K VGA@
12
CC33 0.22U_0201_6.3V6KVGA@
1 2
CC45 0.22U_0201_6.3V6KVGA@
1 2
CC90.22U_020 1_6.3V6K VGA@
12
RC6 24.9_0402_ 1%
1 2
CC360.22U_020 1_6.3V6K VGA@
12
CC80.22U_020 1_6.3V6K VGA@
12
www.laptoprepairsecrets.com
Page 10
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Trace Width/Space: 4 mil/ 12 mil
Max Trace Length: 600 mil
CFG[0]: Stall reset sequence after PCU PLL lock until de-asserted
1 = (Default) Normal Operation;
0 = Stall.
1 = Normal operation
0 = Lane numbers reversed.
CFG[2]: PCI Express* Static x16 Lane Numbering Reversal.
CFG[4]: eDP enable:
1 = Disabled.
0 = Enabled.
CFG[6:5]: PCI Express* Bifurcation:
00 = 1 x8, 2 x4 PCI Express*
01 = reserved
10 = 2 x8 PCI Express*
11 = 1 x16 PCI Express*
CFG[7]: PEG Training:
1 = (default) PEG Train immediately following RESET# de assertion.
0 = PEG Wait for BIOS for training.
The CFG signals have a default value of '1' if not terminated on the board.
*CFG Pin Use CMC debug on DDX03 R02 Schematic.
To be confirm
SVID
Sensitive
Sensitive
571391_CFL_H_P DG_Rev0p5
1. The total Length of Data and Clock (from CPU to each VR) must be equal (± 0.1 inch).
2. Route the Alert signal between the Clock and the Data signals.
3. Place those resistors close CPU side.
8/21 follow 1050 Request
Near CPU side
20191024
PROC_SELECT#
> should be unconnected on CFL/CML processor
*20191024
- CML RCP/PDG/ Check list , PROC_TDO PU 10 0 ohm to VCCX T
*20191104
- CMC@ change to always pop (RC76/77/78/7 9)
Place to CPU side
*
*
*
*
*
8/21 PU 330K follow CRB
Place to CPU side
PCH_CPU_BCL K_P
PCH_CPU_BCL K_N
PCH_CPU_PCIBC LK_P
PCH_CPU_PCIBC LK_N
PCH_CPU_24 M_CLK_P
PCH_CPU_24 M_CLK_N
CFG_RCOMP
CATERR#
CPU_SVID_ ALERT#
CPU_SVID_ DAT_R
CPU_SVID_ CLK_R
XDP_BPM# 0
XDP_BPM# 1
XDP_BPM# 2
XDP_BPM# 3
H_PROCHO T#_R
CPU_XDP_TC K0
CPU_XDP_TM S
CPU_XDP_T DI
CPU_XDP_T RST#
CPU_XDP_T DO
XDP_PRDY#
XDP_PRE Q#
DDR_PG_C TRL
H_CPUPWRG D
H_PLTRST _CPU#
H_PM_SYNC _R
H_PM_DOWN
H_PECI
H_THERMTR IP#
SKTOCC#
CFG0
CFG4
CFG2
CFG7
CFG6
CFG5
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7
EC_VCCST _PG
H_THERMT RIP#
EC_VCCST_ PG
H_CPUPWRG D
H_THERMTR IP#
H_PROCHOT #_R
EC_VCCST_P G
H_PM_DOWN CPU_SVID_A LERT#
CPU_SVID_DA T_R
CPU_XDP_TDO
CPU_XDP_ TMS
CPU_XDP_ TDI
CPU_XDP_T CK0
PCH_JTAG_T CK1
CPU_XDP_T RST#
H_PROCHO T#_R
XDP_PREQ #
XDP_PRDY #
DDR_PG_CTRL
PCH_CPU_P CIBCLK_P<15>
PCH_CPU_BC LK_N<15>
PCH_CPU_BC LK_P<15>
PCH_CPU_ 24M_CLK_N<15>
PCH_CPU_ 24M_CLK_P<15>
PCH_CPU_P CIBCLK_N<15 >
CPU_XDP_TDI <18>
CPU_XDP_TMS <18>
CPU_XDP_TCK0 <18>
CPU_XDP_TRST# <21>
CPU_XDP_TD O <18>
H_CPUPWRGD<18>
H_PLTRST_C PU#<17>
H_PM_SYNC_R<17>
PCH_THERM TRIP#_R< 17>
H_PECI<17,58>
H_PROCHO T#<58,85>
EC_VCCST_ PG_R<58,78>
H_PM_DOWN_ R<17>
CPU_SVID_ALERT#_R<91>
CPU_SVID_CLK _R<91>
CPU_SVID_DA T_R<91>
PCH_JTAG_T CK1 <18>
XDP_PREQ# <21>
XDP_PRDY# <21>
SM_PG_CTR L <88>
+1.05V_VCCS T
+1.05VS_V CCSTG
+1.05V_VCC ST
+1.05V_VCCS T
+1.05VS_V CCSTG
+1.2V_VDDQ
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(5/8)CFG,SVID
Custom
10 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(5/8)CFG,SVID
Custom
10 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(5/8)CFG,SVID
Custom
10 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RC18
49.9_0402 _1%
1 2
RC16 20_0402_5 %
1 2
TC1 @
RC17 0_0402_5 %@
1 2
CC681000P_0402_50V 7K
ESD@
1 2
CC670.1U_0201_ 10V6K
XESD@
1 2
TC3 @
RC23
330K_0402 _5%
12
RC12 1K_0402_5 %@
1 2
RC14 499_0402_ 1%
1 2
RC80 51_ 0402_5%@
12
UC3
74AUP1G07 SE-7_SOT353-5
2
A4Y
5
Vcc
1
NC
3
G
RC7 1K_0402_5 %@
1 2
RC21
1K_0402_5 %
12
TC4 @
RC13 220_0402_ 5%
1 2
RC78 51_ 0402_5%
12
RC10 1K_0402_5 %@
1 2
RC76 51_ 0402_5%
12
TC2 @
RC9 1K_0402_5 %
1 2
RC81 51_ 0402_5%@
12
RC22
1K_0402_5 %
12
CC661000P_0402_50V 7K
ESD@
1 2
CC69
0.1U_0201_1 0V6K
12
RC15 60.4_0402_ 1%
1 2
TC5@
5 OF 13
CFL-H
UC1E
CFL-H_BGA1 440
@
VIDSOUT
BH29
DDR_VTT_CNTL
BT13
VCCST_PWRGD
H13
PM_SYNC
BM34
PM_DOWN
BP31
PECI
BT34
CFG_18
BN22
PROC_TCK
BR28
CFG_19
BP22
THERMTRIP#
J31
PROC_TDO
BT28
CFG_0
BN25
PROC_TRST#
BP30
CFG_1
BN27
PROC_SELECT#
BN1
ZVM#
AT13
SKTOCC#
BR33
CFG_2
BN26
CFG_RCOMP
BT25
CFG_3
BN28
PROC_PREQ#
BL30
CFG_4
BR20
CFG_10
BT23
RESET#
BP35
CFG_5
BM20
CLK24N
D31
PROCPWRGD
BT31
CFG_11
BT22
CFG_6
BT20
BPM#_0
BR27
VIDSCK
BH32
BCLKN
A32
PCI_BCLKN
C36
BPM#_1
BT27
CFG_7
BP20
CFG_12
BM19
CLK24P
E31
CFG_8
BR23
CFG_13
BR19
BPM#_2
BM31
BCLKP
B31
PCI_BCLKP
D35
BPM#_3
BT30
PROCHOT#
BR30
CFG_9
BR22
CFG_14
BP19
RSVD2
AY13
CFG_15
BT19
RSVD1
AU13
PROC_PRDY#
BP27
CFG_16
BP23
CATERR#
BM30
PROC_TDI
BL32
MSM#
AW13
PROC_TMS
BP28
CFG_17
BN23
VIDALERT#
BH31
RC77 51_ 0402_5%
12
TC6@
RC11 1K_0402_5 %@
1 2
CC650.1U_0201_ 10V6K
XESD@
1 2
RC79 51_ 0402_5%
12
TC19 @
RH2
13_0402_ 5%
@
12
RC20
100_0402 _1%
12
RC19
56_0402_ 1%
12
RC8 1K_0402_5 %
1 2
RH1 1K_0402_ 5%
1 2
TC20 @
www.laptoprepairsecrets.com
Page 11
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
1. Vcc_SENSE/ Vss_SENSE Tr ace Length Ma tch < 25 mils
2. Maintain 2 5-mil separat ion distance away from any other dynamic s ignals.
1. VccGT_SENS E / VssGT_SENS E Trace Lengt h Match < 25 m ils
2. Maintain 2 5-mil separati on distance a way from any o ther dynamic si gnals.
128000mA(Hexa Core GT2)
GT
32000mA(Hexa Core GT2)
0926
Modify net by power
VCC_SENSE_ IA
VSS_SENSE_ IA
VCC_SENSE _GT
VSS_SENSE _GT
VSS_SENSE _IA <91>
VCC_SENSE_IA <91>
VSS_SENSE _GT <91>
VCC_SENSE_ GT <91>
+VCC_CORE +VCC_CORE +VCC_CORE +VCC_CORE
+VCC_GT+VCC_GT
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(6/8)VCC_CORE/GT
Custom
11 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(6/8)VCC_CORE/GT
Custom
11 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(6/8)VCC_CORE/GT
Custom
11 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
10 OF 13
CFL-H
UC1J
CFL-H_BGA1 440
@
VCC71
Y32
VCC60
W29
VCC5
N14
VCC70
Y31
VCC4
N13
VCC3
L14
VCC19
P33
VCC2
L13
VCC29
R36
VCC18
P32
VCC1
K14
VCC39
T38
VCC28
R35
VCC17
P31
VCC49
V14
VCC38
T37
VCC27
R34
VCC16
P30
VCC59
W14
VCC48
V13
VCC37
T36
VCC26
R33
VCC15
P29
VCC69
Y30
VCC58
W13
VCC47
U36
VCC36
T35
VCC25
R32
VCC14
P14
VCC68
Y29
VCC57
V38
VCC46
U35
VCC35
T32
VCC24
R31
VCC13
P13
VCC67
W38
VCC56
V37
VCC45
U34
VCC34
T31
VCC23
R13
VCC12
N38
VCC66
W37
VCC55
V36
VCC44
U33
VCC33
T30
VCC22
P36
VCC11
N37
VCC65
W36
VCC54
V35
VCC43
U32
VCC32
T29
VCC21
P35
VCC10
N36
VCC75
Y36
VCC64
W35
VCC53
V34
VCC42
U31
VCC31
R38
VCC20
P34
VCC9
N35
VCC74
Y35
VCC63
W32
VCC52
V33
VCC41
U30
VCC30
R37
VCC8
N32
VCC73
Y34
VCC62
W31
VCC51
V32
VCC40
U29
VCC7
N31
VCC72
Y33
VCC61
W30
VCC50
V31
VCC6
N30
11 OF 13
CFL-H
UC1K
CFL-H_BGA1 440
@
VCCGT63
BB38
VCCGT64
BC29
VCCGT65
BC30
VCCGT66
BC31
VCCGT67
BC32
VCCGT68
BC35
VCCGT69
BC36
VCCGT70
BC37
VCCGT71
BC38
VCCGT72
BD13
VCCGT73
BD14
VCCGT74
BD29
VCCGT75
BD30
VCCGT76
BD31
VCCGT77
BD32
VCCGT78
BD33
VCCGT79
BD34
VCCGT80
BD35
VCCGT81
BD36
VCCGT82
BE31
VCCGT83
BE32
VCCGT84
BE33
VCCGT129
BK21
VCCGT130
BK23
VCCGT131
BK24
VCCGT132
BK26
VCCGT133
BK27
VCCGT134
BL15
VCCGT135
BL16
VCCGT136
BL17
VCCGT137
BL23
VCCGT138
BL24
VCCGT143
BL36
VCCGT148
BM36
VCCGT149
BM37
VCCGT150
BN15
VCCGT151
BN16
VCCGT152
BN17
VCCGT153
BN36
VCCGT154
BN37
VCCGT155
BN38
VCCGT156
BP15
VCCGT157
BP16
VCCGT158
BP17
VCCGT159
BP37
VCCGT160
BP38
VCCGT161
BR15
VCCGT162
BR16
VCCGT163
BR17
VCCGT164
BR37
VCCGT165
BT15
VCCGT166
BT16
VCCGT167
BT17
VCCGT168
BT37
VCCGT_SENSE
AH38
VSSGT_SENSE
AH37
VCCGT141
BL27
VCCGT57
BB32
VCCGT46
BA29
VCCGT35
AW38
VCCGT24
AV34
VCCGT13
AU31
VCCGT2
AT31
VCCGT140
BL26
VCCGT89
BE38
VCCGT56
BB31
VCCGT45
BA14
VCCGT34
AW37
VCCGT23
AV33
VCCGT12
AU30
VCCGT1
AT14
VCCGT99
BF38
VCCGT88
BE37
VCCGT55
BB14
VCCGT44
BA13
VCCGT33
AW36
VCCGT22
AV32
VCCGT11
AU29
VCCGT98
BF37
VCCGT87
BE36
VCCGT54
BB13
VCCGT43
AY38
VCCGT32
AW35
VCCGT21
AV31
VCCGT10
AU14
VCCGT97
BF36
VCCGT86
BE35
VCCGT53
BA36
VCCGT42
AY37
VCCGT31
AW34
VCCGT20
AV30
VCCGT109
BH34
VCCGT96
BF35
VCCGT85
BE34
VCCGT52
BA35
VCCGT41
AY36
VCCGT30
AW33
VCCGT119
BJ23
VCCGT108
BH33
VCCGT95
BF32
VCCGT62
BB37
VCCGT51
BA34
VCCGT40
AY35
VCCGT118
BJ21
VCCGT107
BG36
VCCGT94
BF31
VCCGT61
BB36
VCCGT50
BA33
VCCGT139
BL25
VCCGT128
BK20
VCCGT117
BJ20
VCCGT106
BG35
VCCGT93
BF30
VCCGT60
BB35
VCCGT127
BK19
VCCGT116
BJ19
VCCGT105
BG34
VCCGT92
BF29
VCCGT126
BK17
VCCGT115
BJ17
VCCGT104
BG33
VCCGT91
BF14
VCCGT9
AT38
VCCGT147
BM17
VCCGT125
BK16
VCCGT114
BJ16
VCCGT103
BG32
VCCGT90
BF13
VCCGT19
AV29
VCCGT8
AT37
VCCGT146
BM16
VCCGT124
BJ38
VCCGT113
BH38
VCCGT102
BG31
VCCGT29
AW32
VCCGT18
AU38
VCCGT7
AT36
VCCGT145
BM15
VCCGT123
BJ37
VCCGT112
BH37
VCCGT101
BG30
VCCGT39
AY32
VCCGT28
AW31
VCCGT17
AU37
VCCGT6
AT35
VCCGT144
BL37
VCCGT122
BJ27
VCCGT111
BH36
VCCGT100
BG29
VCCGT49
BA32
VCCGT38
AY31
VCCGT27
AW14
VCCGT16
AU36
VCCGT5
AT34
VCCGT121
BJ26
VCCGT110
BH35
VCCGT59
BB34
VCCGT48
BA31
VCCGT37
AY30
VCCGT26
AV36
VCCGT15
AU35
VCCGT4
AT33
VCCGT142
BL28
VCCGT120
BJ24
VCCGT58
BB33
VCCGT47
BA30
VCCGT36
AY29
VCCGT25
AV35
VCCGT14
AU32
VCCGT3
AT32
9 OF 13
CFL-H
UC1I
CFL-H_BGA14 40
@
VCC93
AL36
VCC82
AK34
VCC71
AJ29
VCC60
AG33
VCC5
AA34
VCC92
AL35
VCC81
AK33
VCC70
AJ14
VCC4
AA33
VCC91
AL32
VCC80
AK32
VCC3
AA32
VCC90
AL31
VCC_SENSE
AG37
VCC19
AC14
VCC2
AA31
VCC29
AD14
VCC18
AC13
VCC1
AA13
VCC109
AN32
VCC39
AE14
VCC28
AD13
VCC17
AB38
VCC119
AP32
VCC108
AN31
VCC49
AF31
VCC38
AE13
VCC27
AC36
VCC16
AB37
VCC118
AP31
VCC107
AN14
VCC59
AG32
VCC48
AF30
VCC37
AD38
VCC26
AC35
VCC15
AB36
VCC117
AP30
VCC106
AN13
VCC69
AH32
VCC58
AG31
VCC47
AF29
VCC36
AD37
VCC25
AC34
VCC14
AB35
VCC116
AP13
VCC105
AM36
VCC79
AK31
VCC68
AH31
VCC57
AG14
VCC46
AE38
VCC35
AD36
VCC24
AC33
VCC13
AB32
VCC115
AN38
VCC104
AM35
VCC89
AL30
VCC78
AJ36
VCC67
AH30
VSS_SENSE
AG38
VCC56
AF38
VCC45
AE37
VCC34
AD35
VCC23
AC32
VCC12
AB31
VCC114
AN37
VCC103
AM34
VCC99
AM30
VCC88
AL29
VCC77
AJ35
VCC66
AH29
VCC55
AF37
VCC44
AE36
VCC33
AD34
VCC22
AC31
VCC11
AB30
VCC124
K13
VCC113
AN36
VCC102
AM33
VCC98
AM29
VCC87
AL13
VCC76
AJ34
VCC65
AH14
VCC54
AF36
VCC43
AE35
VCC32
AD33
VCC21
AC30
VCC10
AB29
VCC123
AP38
VCC112
AN35
VCC101
AM32
VCC97
AM14
VCC86
AK38
VCC75
AJ33
VCC64
AH13
VCC53
AF35
VCC42
AE32
VCC31
AD32
VCC20
AC29
VCC9
AA38
VCC122
AP37
VCC111
AN34
VCC100
AM31
VCC96
AM13
VCC85
AK37
VCC74
AJ32
VCC63
AG36
VCC52
AF34
VCC41
AE31
VCC30
AD31
VCC8
AA37
VCC121
AP36
VCC110
AN33
VCC95
AL38
VCC84
AK36
VCC73
AJ31
VCC62
AG35
VCC51
AF33
VCC40
AE30
VCC7
AA36
VCC120
AP35
VCC94
AL37
VCC83
AK35
VCC72
AJ30
VCC61
AG34
VCC50
AF32
VCC6
AA35
www.laptoprepairsecrets.com
Page 12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+1.2V_VDDQ
Max: 3300mA
+VCC_IO
Max: 6400mA
1. VccGT_SENSE / VssGT_SENS E Trace Lengt h Match < 25 m ils
2. Maintain 25 -mil separati on distance a way from any o ther dynamic si gnals.
+1.2V_VCCPLL_OC
Max: 130mA
Max: 150mA
Max: 60mA
Max: 20mA
571483_CFL_H_RVP_CRB_TDK_Rev0p5
+1.2V_VDDQ_CPU: 10uF * 12 22uF * 4
571483_CFL_H_RVP_CRB_TDK_Rev0p5
+1.05V_VCCST: 1uF * 1
571483_CFL_H_RVP_CRB_TDK_Rev0p5
+0.95VS_VCCIO: 10uF * 12 22uF * 4
571483_CFL_H_RVP_CRB_TDK_Rev0p5
+1.05V_VCCSFR: 1uF * 1
571483_CFL_H_RVP_CRB_TDK_Rev0p5
+1.05VS_VCCSTG: 1uF * 1
PLACE CAP BACKSIDE
150mA
PLACE CAP BACKSIDE PLACE CAP BACKSIDE
+VCC_SA
Max: 11100mA
PLACE CAP BACKSIDE
571483_CFL_H_RVP_CRB_TDK_Rev0p5
+1.2V_VCCPLL_OC: 1uF * 2
VSS_SENSE _SA
VCC_SENS E_SA
VCC_SENS E_VCCIO
VSSIO_SENS E
VCC_SENSE _SA <91>
VSS_SENSE_ SA <91>
VCC_SENSE _VCCIO <90>
VSS_SENSE_ VCCIO <90>
+VCC_SA
+VCCIO
+1.2V_VDDQ
+1.2V_VCCP LL_OC
+1.05V_VCC ST
+1.05VS_VC CSTG
+1.05V_VCC SFR
+1.2V_VDDQ
+1.05V_VCC ST
+VCCIO
+1.05V_VCC SFR
+1.05VS_ VCCSTG
+1.2V_VCCP LL_OC+1.2V_VDDQ
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(7/8)VCCSA/VCCIO/VDDQ
Custom
12 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(7/8)VCCSA/VCCIO/VDDQ
Custom
12 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(7/8)VCCSA/VCCIO/VDDQ
Custom
12 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
C
C
9
4
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
C
9
2
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
C
7
3
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
RC24 0_0402_5%@
1 2
C
C
8
4
2
2
U
_
0
6
0
3
_
6
.
3
V
6
M
1
2
C
C
7
4
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
C
7
1
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
C
8
1
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
C
8
9
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
C
8
2
2
2
U
_
0
6
0
3
_
6
.
3
V
6
M
1
2
C
C
7
8
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
C
7
2
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12 OF 13
CFL-H
UC1L
CFL-H_BGA144 0
@
VCCSA1
J30
VCCSA2
K29
VCCSA3
K30
VCCSA4
K31
VCCSA5
K32
VCCSA6
K33
VCCSA7
K34
VCCSA8
K35
VCCSA9
L31
VCCSA10
L32
VCCSA11
L35
VCCSA12
L36
VCCSA13
L37
VCCSA14
L38
VCCSA15
M29
VCCSA16
M30
VCCSA17
M31
VCCSA18
M32
VCCSA19
M33
VCCSA20
M34
VCCSA21
M35
VCCSA22
M36
VCCIO1
AG12
VCCIO2
G15
VCCIO3
G17
VCCIO4
G19
VCCIO5
G21
VCCIO6
H15
VCCIO7
H16
VCCIO8
H17
VCCIO9
H19
VCCIO10
H20
VCCIO11
H21
VCCIO12
H26
VCCIO13
H27
VCCIO14
J15
VCCIO15
J16
VCCIO16
J17
VCCIO17
J19
VCCIO18
J20
VCCIO19
J21
VCCIO20
J26
VCCIO21
J27
VCCST
H30
VCCSA_SENSE
M38
VCCIO_SENSE
H14
VDDQ18
K12
VDDQ2
AE12
VDDQ17
J6
VDDQ1
AA6
VDDQ16
J5
VDDQ15
AY6
VDDQ25
Y12
VDDQ14
AW6
VDDQ24
W6
VDDQ13
AT12
VDDQ23
T6
VCCSTG2
H29
VDDQ12
AR6
VDDQ22
R6
VCCSTG1
G30
VDDQ11
AR12
VDDQ21
L6
VDDQ10
AP7
VDDQ20
L12
VCCPLL_OC3
G11
VCCPLL_OC2
BJ13
VDDQ9
AP6
VCCPLL_OC1
BH13
VDDQ8
AL11
VDDQ7
AJ12
VCCPLL2
J28
VDDQ6
AG9
VCCPLL1
H28
VDDQ5
AG5
VSSSA_SENSE
M37
VSSIO_SENSE
J14
VDDQ4
AF6
VDDQ19
K6
VDDQ3
AF5
C
C
7
6
1
0
U
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4
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RC25 0_0402_5 %@
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www.laptoprepairsecrets.com
Page 13
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Impedance Spectrum Tool Trigger
Add for Corner NCTF testing
PCH_TRIGOUT _R
CPU_TRIGOUT
IST_TRIG
PCH_TRIGOUT _R<21>
CPU_TRIGOUT_ R<21>
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(8/8)GND/RSVD
Custom
13 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(8/8)GND/RSVD
Custom
13 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CFL-H(8/8)GND/RSVD
Custom
13 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
TC11@
TC10@
TC9@
TC8@
8 OF 13
CFL-H
UC1H
CFL-H_BGA14 40
@
VSS_325
BN4
VSS_326
BN7
VSS_327
BP12
VSS_328
BP14
VSS_329
BP18
VSS_330
BP21
VSS_331
BP24
VSS_332
BP25
VSS_333
BP26
VSS_334
BP29
VSS_335
BP33
VSS_336
BP34
VSS_337
BP7
VSS_338
BR12
VSS_339
BR14
VSS_340
BR18
VSS_341
BR21
VSS_342
BR24
VSS_343
BR25
VSS_344
BR26
VSS_345
BR29
VSS_346
BR34
VSS_347
BR36
VSS_348
BR7
VSS_349
BT12
VSS_350
BT14
VSS_351
BT18
VSS_352
BT21
VSS_353
BT24
VSS_354
BT26
VSS_355
BT29
VSS_356
BT32
VSS_357
BT5
VSS_358
C11
VSS_359
C13
VSS_360
C15
VSS_361
C17
VSS_362
C19
VSS_363
C21
VSS_364
C23
VSS_365
C25
VSS_366
C27
VSS_367
C29
VSS_368
C31
VSS_369
C37
VSS_370
C5
VSS_371
C8
VSS_372
C9
VSS_373
D10
VSS_374
D12
VSS_375
D14
VSS_376
D16
VSS_377
D18
VSS_378
D20
VSS_379
D22
VSS_380
D24
VSS_381
D26
VSS_382
D28
VSS_383
D3
VSS_384
D30
VSS_385
D33
VSS_386
D6
VSS_387
D9
VSS_388
E34
VSS_389
E35
VSS_390
E38
VSS_391
E4
VSS_392
E9
VSS_393
N3
VSS_394
N33
VSS_395
N34
VSS_396
N4
VSS_397
N5
VSS_398
N6
VSS_399
N7
VSS_400
N8
VSS_401
N9
VSS_402
P12
VSS_403
P37
VSS_404
M14
VSS_405
M6
VSS_406
N1
VSS_407
F11
VSS_408
F13
VSS_409
F15
VSS_410
F17
VSS_411
F19
VSS_412
F2
VSS_413
F21
VSS_414
F23
VSS_415
F25
VSS_416
F27
VSS_417
F29
VSS_418
F3
VSS_419
F31
VSS_420
F36
VSS_421
F4
VSS_422
F5
VSS_423
F8
VSS_424
F9
VSS_425
G10
VSS_426
G12
VSS_427
G14
VSS_428
G16
VSS_429
G18
VSS_430
G20
VSS_431
G22
VSS_432
G23
VSS_433
G24
VSS_434
G26
VSS_435
G28
VSS_436
G4
VSS_437
G5
VSS_438
G6
VSS_439
G8
VSS_440
G9
VSS_441
H11
VSS_442
H12
VSS_443
H18
VSS_444
H22
VSS_445
H25
VSS_446
H32
VSS_447
H35
VSS_448
J10
VSS_449
J18
VSS_450
J22
VSS_451
J25
VSS_452
J32
VSS_453
J33
VSS_454
J36
VSS_455
J4
VSS_456
J7
VSS_457
K1
VSS_458
K10
VSS_459
K11
VSS_460
K2
VSS_461
K3
VSS_462
K38
VSS_463
K4
VSS_464
K5
VSS_465
K7
VSS_466
K8
VSS_467
K9
VSS_468
L29
VSS_469
L30
VSS_470
L33
VSS_471
L34
VSS_472
M12
VSS_473
M13
VSS_474
N10
VSS_475
N11
VSS_476
N12
VSS_477
N2
VSS_478
BT8
VSS_479
BR9
VSS_BT35
BT35
VSS_BT36
BT36
VSS_BR38
BR38
VSS_B37
B37
VSS_D38
D38
VSS_C2
C2
VSS_B3
B3
VSS_A3
A3
VSS_A4
A4
VSS_A34
A34
VSS_BT3
BT3
VSS_BT4
BT4
TC18 @
TC14 @
TC13 @
TC17 @
TC16 @
TC15 @
TC12@
TC7@
7 OF 13
CFL-H
UC1G
CFL-H_BGA14 40
@
VSS_163
AW5
VSS_164
AY12
VSS_165
AY33
VSS_166
AY34
VSS_167
B9
VSS_168
BA10
VSS_169
BA11
VSS_170
BA12
VSS_171
BA37
VSS_172
BA38
VSS_173
BA6
VSS_174
BA7
VSS_175
BA8
VSS_176
BA9
VSS_177
BB1
VSS_178
BB12
VSS_179
BB2
VSS_180
BB29
VSS_181
BB3
VSS_182
BB30
VSS_183
BB4
VSS_184
BB5
VSS_185
BB6
VSS_186
BC12
VSS_187
BC13
VSS_188
BC14
VSS_189
BC33
VSS_190
BC34
VSS_191
BC6
VSS_192
BD10
VSS_193
BD11
VSS_194
BD12
VSS_195
BD37
VSS_196
BD6
VSS_197
BD7
VSS_198
BD8
VSS_199
BD9
VSS_200
BE1
VSS_201
BE2
VSS_202
BE29
VSS_203
BE3
VSS_204
BE30
VSS_205
BE4
VSS_206
BE5
VSS_207
BE6
VSS_208
BF12
VSS_209
BF33
VSS_210
BF34
VSS_211
BF6
VSS_212
BG12
VSS_213
BG13
VSS_214
BG14
VSS_215
BG37
VSS_216
BG38
VSS_217
BG6
VSS_218
BH1
VSS_219
BH10
VSS_220
BH11
VSS_221
BH12
VSS_222
BH14
VSS_223
BH2
VSS_224
BH3
VSS_225
BH4
VSS_226
BH5
VSS_227
BH6
VSS_228
BH7
VSS_229
BH8
VSS_230
BH9
VSS_231
T2
VSS_232
T3
VSS_233
T33
VSS_234
T34
VSS_235
T4
VSS_236
T5
VSS_237
T7
VSS_238
T8
VSS_239
T9
VSS_240
U37
VSS_241
U38
VSS_242
BJ12
VSS_243
BJ14
VSS_244
BJ15
VSS_245
BJ18
VSS_246
BJ22
VSS_247
BJ25
VSS_248
BJ29
VSS_249
BJ30
VSS_250
BJ31
VSS_251
BJ32
VSS_252
BJ33
VSS_253
BJ34
VSS_254
BJ35
VSS_255
BJ36
VSS_256
BK13
VSS_257
BK14
VSS_258
BK15
VSS_259
BK18
VSS_260
BK22
VSS_261
BK25
VSS_262
BK29
VSS_263
BK6
VSS_264
BL13
VSS_265
BL14
VSS_266
BL18
VSS_267
BL19
VSS_268
BL20
VSS_269
BL21
VSS_270
BL22
VSS_271
BL29
VSS_272
BL33
VSS_273
BL35
VSS_274
BL38
VSS_275
BL6
VSS_276
BM11
VSS_277
BM12
VSS_278
BM13
VSS_279
BM14
VSS_280
BM18
VSS_281
BM2
VSS_282
BM21
VSS_283
BM22
VSS_284
BM23
VSS_285
BM24
VSS_286
BM25
VSS_287
BM26
VSS_288
BM27
VSS_289
BM28
VSS_290
BM29
VSS_291
BM3
VSS_292
BM33
VSS_293
BM35
VSS_294
BM38
VSS_295
BM5
VSS_296
BM6
VSS_297
BM7
VSS_298
BM8
VSS_299
BM9
VSS_300
BN12
VSS_301
BN14
VSS_302
BN18
VSS_303
BN19
VSS_304
BN2
VSS_305
BN20
VSS_306
BN21
VSS_307
BN24
VSS_308
BN29
VSS_309
BN30
VSS_310
BN31
VSS_311
BN34
VSS_312
P38
VSS_313
P6
VSS_314
R12
VSS_315
R29
VSS_316
AY14
VSS_317
BD38
VSS_318
R30
VSS_319
T1
VSS_320
T10
VSS_321
T11
VSS_322
T12
VSS_323
T13
VSS_324
T14
13 OF 13
CFL-H
UC1M
CFL-H_BGA14 40
@
VSS_A37
A37
RSVD19
BR35
RSVD29
J3
RSVD18
BR31
RSVD9
BH30
RSVD28
J24
RSVD_TP5
E2
RSVD17
BR2
RSVD8
B38
RSVD27
H24
RSVD_TP4
E1
RSVD16
BP1
RSVD7
B30
RSVD26
G3
RSVD_TP3
D1
RSVD15
BN35
RSVD6
B2
RSVD25
G13
RSVD_TP2
BT2
RSVD14
BN33
RSVD5
AP29
RSVD24
F30
RSVD_TP1
BR1
RSVD13
BL34
RSVD4
AP14
RSVD23
E30
RSVD12
BL31
RSVD3
AJ8
RSVD22
C38
RSVD11
BK28
RSVD2
AE29
PROC_TRIGOUT
J23
RSVD21
C30
RSVD10
BJ28
RSVD1
AA14
RSVD31
R14
PROC_TRIGIN
H23
IST_TRIG
E3
RSVD20
C1
RSVD30
N29
VSS_A36
A36
RC26 30_0402_5 %
1 2
6 OF 13
CFL-H
UC1F
CFL-H_BGA1 440
@
VSS_1
A10
VSS_2
A12
VSS_3
A16
VSS_4
A18
VSS_5
A20
VSS_6
A22
VSS_7
A24
VSS_8
A26
VSS_9
A28
VSS_10
A30
VSS_11
A6
VSS_12
A9
VSS_13
AA12
VSS_14
AA29
VSS_15
AA30
VSS_16
AB33
VSS_17
AB34
VSS_18
AB6
VSS_19
AC1
VSS_20
AC12
VSS_21
AC2
VSS_22
AC3
VSS_23
AC37
VSS_24
AC38
VSS_25
AC4
VSS_26
AC5
VSS_27
AC6
VSS_28
AD10
VSS_29
AD11
VSS_30
AD12
VSS_31
AD29
VSS_32
AD30
VSS_33
AD6
VSS_34
AD8
VSS_35
AD9
VSS_36
AE33
VSS_37
AE34
VSS_38
AE6
VSS_39
AF1
VSS_40
AF12
VSS_41
AF13
VSS_42
AF14
VSS_43
AF2
VSS_44
AF3
VSS_45
AF4
VSS_46
AG10
VSS_47
AG11
VSS_48
AG13
VSS_49
AG29
VSS_50
AG30
VSS_51
AG6
VSS_52
AG7
VSS_53
AG8
VSS_54
AH12
VSS_55
AH33
VSS_56
AH34
VSS_57
AH35
VSS_58
AH36
VSS_59
AH6
VSS_60
AJ1
VSS_61
AJ13
VSS_62
AJ2
VSS_63
AJ3
VSS_64
AJ37
VSS_65
AJ38
VSS_66
AJ4
VSS_67
AJ5
VSS_68
AJ6
VSS_69
W4
VSS_70
W5
VSS_71
Y10
VSS_72
Y11
VSS_73
Y13
VSS_74
Y14
VSS_75
Y37
VSS_76
Y38
VSS_77
Y7
VSS_78
Y8
VSS_79
Y9
VSS_80
AK29
VSS_81
AK30
VSS_82
AK4
VSS_83
AL10
VSS_84
AL12
VSS_85
AL14
VSS_86
AL33
VSS_87
AL34
VSS_88
AL4
VSS_89
AL7
VSS_90
AL8
VSS_91
AL9
VSS_92
AM1
VSS_93
AM12
VSS_94
AM2
VSS_95
AM3
VSS_96
AM37
VSS_97
AM38
VSS_98
AM4
VSS_99
AM5
VSS_100
AN12
VSS_101
AN29
VSS_102
AN30
VSS_103
AN5
VSS_104
AN6
VSS_105
AP10
VSS_106
AP11
VSS_107
AP12
VSS_108
AP33
VSS_109
AP34
VSS_110
AP8
VSS_111
AP9
VSS_112
AR1
VSS_113
AR13
VSS_114
AR14
VSS_115
AR2
VSS_116
AR29
VSS_117
AR3
VSS_118
AR30
VSS_119
AR31
VSS_120
AR32
VSS_121
AR33
VSS_122
AR34
VSS_123
AR35
VSS_124
AR36
VSS_125
AR37
VSS_126
AR38
VSS_127
AR4
VSS_128
AR5
VSS_129
AT29
VSS_130
AT30
VSS_131
AT6
VSS_132
AU10
VSS_133
AU11
VSS_134
AU12
VSS_135
AU33
VSS_136
AU34
VSS_137
AU6
VSS_138
AU7
VSS_139
AU8
VSS_140
AU9
VSS_141
AV37
VSS_142
AV38
VSS_143
AW1
VSS_144
AW12
VSS_145
AW2
VSS_146
AW29
VSS_147
AW3
VSS_148
AW30
VSS_149
AW4
VSS_150
U6
VSS_151
V12
VSS_152
V29
VSS_153
V30
VSS_154
A14
VSS_155
AD7
VSS_156
V6
VSS_157
W1
VSS_158
W12
VSS_159
W2
VSS_160
W3
VSS_161
W33
VSS_162
W34
www.laptoprepairsecrets.com
Page 14
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C
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E
E
1 1
2 2
3 3
4 4
The 30 HSIO la nes on PCH-H supports the f ollowing confi gurations:
1. Up to 24 PC Ie* Lanes
— A maximum o f 16 PCIe* Por ts (or device s) can be enabl ed
When a GbE Po rt is enabled , the maximum number of PCIe * Ports (or
‧
devices) that can be enable d reduces base d off the foll owing:
Max PCIe* Port s (or devices ) = 16 - GbE ( 0 or 1)
— PCIe* Lanes 1-4 (PCIe* C ontroller #1), 5-8 (PCIe* Co ntroller #2), 9 -12 (PCIe*
Controller #3) , 13-16 (PCIe * Controller # 4), 17-20 (PC Ie* Controller #5), and
21-24 (PCIe* C ontroller #6) can be indivi dually configu red
2. Up to 6 SAT A Lanes
— A maximum o f 6 SATA Port s (or devices) can be enable d
— SATA Lane 0 has the flexibility to be mapped to Flex I/O Lane 16 or 18
— SATA Lane 1 has the flexibility to be mapped to Flex I/O Lane 17 or 19
3. Up to 10 USB 3.1 Lanes
— A maximum of 10 USB 3.1 Ports (or devices) can be enabled
4. Up to 4 GbE Lanes
— A maximum of 1 GbE Port (or device) can be enabled
5. Supports up to 3 Remapped (IntelR Rapid Storage Technology) PCIe* storage
devices
— x2 and x4 PCIe* NVMe SSD
— x2 IntelR Optane? Memory Device
— See the “ PCI Express* (PCIe*)” chapter for the PCH PCIe* Controllers,configurations
, and lanes that can be used for IntelR Rapid Storage Technology PCIe* storage support
6. For unused SATA/PCIe* Combo Lanes, Flex I/O Lanes that can be configured as PCIe* or SATA,
the lanes must be statically assigned to SATA or PCIe* via the SATA/PCIe Combo Port Soft
Straps discussed in the SPI Programming Guide and
through the IntelR Flash Image Tool (FIT) tool.
X'tal Input:
High: Different ial
Low: Single en ded
For CNVI follow 571906_CNL_PCH_TA_WW11.pdf
STRAP
USB3 MB
Camera
TS
FingerPrint
BT
USB2 (SUB/B)
TYPE C
USB2 (SUB/B)
M.2 SSD1 PCIE L0
M.2 SSD1 PCIE L1
M.2 SSD1 PCIE L2
M.2 SSD1 PCIE L3
DMI_CTX_PRX_ N0
DMI_CTX_PRX_ P0
DMI_CRX_PTX_ N0
DMI_CRX_PTX_ P0
DMI_CTX_PRX_ P1
DMI_CTX_PRX_ N1
DMI_CRX_PTX_ N1
DMI_CRX_PTX_ P1
DMI_CTX_PRX_ P2
DMI_CTX_PRX_ N2
DMI_CRX_PTX_ N2
DMI_CRX_PTX_ P2
DMI_CTX_PRX_ P3
DMI_CTX_PRX_ N3
DMI_CRX_PTX_ P3
DMI_CRX_PTX_ N3
USB2_RCOM P
USB2_VBUS_S ENSE
USB2_ID
GPD_7
USB_OC0 #
USB_OC1 #
GPD_7
USB20_P1
USB20_N1
USB20_P2
USB20_N2
USB20_P3
USB20_N3
USB20_N4
USB20_P4
USB20_P5
USB20_N5
USB20_N6
USB20_P6
USB20_N8
USB20_P8
USB20_N1 4
USB20_P14
USB_OC1#
USB_OC0#
DMI_CTX_PRX _N0<9>
DMI_CTX_PRX _P0< 9>
DMI_CRX_PTX_ P0<9 >
DMI_CRX_PTX _N0<9>
DMI_CTX_PRX _P1< 9>
DMI_CTX_PRX _N1<9>
DMI_CTX_PRX _P2< 9>
DMI_CTX_PRX _N2<9>
DMI_CTX_PRX _P3< 9>
DMI_CTX_PRX _N3<9>
DMI_CRX_PTX_ P1<9 >
DMI_CRX_PTX _N1<9>
DMI_CRX_PTX_ P2<9 >
DMI_CRX_PTX _N2<9>
DMI_CRX_PTX_ P3<9 >
DMI_CRX_PTX _N3<9>
USB_OC1# <71>
USB20_P1 < 71>
USB20_N1 <71>
USB20_N2 <73>
USB20_P2 < 73>
USB20_N3 <73>
USB20_P3 < 73>
USB20_P4 < 43>
USB20_N4 <43>
USB20_P5 < 38>
USB20_N5 <38>
USB20_N6 <38>
USB20_P6 < 38>
USB20_N8 <66>
USB20_P8 < 66>
USB20_N1 4 < 52>
USB20_P14 <52>
USB_OC0# <43>
PCIE_PRX_DT X_P24 <68>
PCIE_PTX_DR X_N24 <68>
PCIE_PTX_DR X_P24 <68>
PCIE_PRX_DT X_N24 <68>
PCIE_PRX_DT X_P23 <68>
PCIE_PTX_DR X_N23 <68>
PCIE_PTX_DR X_P23 <68>
PCIE_PRX_DT X_N23 <68>
PCIE_PRX_DT X_P22 <68>
PCIE_PTX_DR X_N22 <68>
PCIE_PTX_DR X_P22 <68>
PCIE_PRX_DT X_N22 <68>
PCIE_PRX_DT X_P21 <68>
PCIE_PTX_DR X_N21 <68>
PCIE_PTX_DR X_P21 <68>
PCIE_PRX_DT X_N21 <68>
+3VALW
+3VALW
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(1/8)DMI/PCIE/USB2
Custom
14 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(1/8)DMI/PCIE/USB2
Custom
14 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(1/8)DMI/PCIE/USB2
Custom
14 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RH200 10K_04 02_5%
1 2
RH3
10K_0402 _5%
12
RH201 10K_04 02_5%
1 2
RH5 0_0402_5%@
1 2
RH6 0_0402_5%@
1 2
RH4 113_0402_1%
1 2
2 OF 13
CNP-H
Rev1.0
UH1B
CNP-H_BGA87 4
@
USB2N_1
J3
USB2P_1
J2
USB2N_2
N13
USB2P_2
N15
USB2N_3
K4
USB2P_3
K3
USB2N_4
M10
USB2P_4
L9
USB2N_5
M1
USB2P_5
L2
USB2N_6
K7
USB2P_6
K6
USB2N_7
L4
USB2P_7
L3
USB2N_8
G4
USB2P_8
G5
USB2N_9
M6
USB2P_9
N8
USB2N_10
H3
USB2P_10
H2
USB2N_11
R10
USB2P_11
P9
USB2N_12
G1
USB2P_12
G2
USB2N_13
N3
USB2P_13
N2
USB2N_14
E5
USB2P_14
F6
USB2_COMP
F4
USB2_VBUSSENSE
F3
USB2_ID
G3
RSVD
K29
RSVD
G26
RSVD
E28
DMI2_TXP
B31
PCIE1_TXN/USB31_7_TXN
A17
RSVD
R24
RSVD
L26
RSVD
C27
DMI3_TXP
B29
PCIE4_RXP/USB31_10_RXP
R18
RSVD
F26
RSVD
D29
RSVD
B26
GPP_F17/USB2_OC6#
AR37
RSVD
P24
PCIE3_RXP/USB31_9_RXP
J18
RSVD
B27
RSVD
B25
RSVD
C26
PCIE3_TXP/USB31_9_TXP
C19
RSVD
A25
PCIE21_RXN
T43
PCIE3_RXN/USB31_9_RXN
K18
GPP_E10/USB2_OC1#
AL40
GPP_E9/USB2_OC0#
AH36
PCIE22_RXN
U40
PCIE2_RXP/USB31_8_RXP
P21
PCIE5_RXN
F20
PCIE23_RXN
W43
PCIE21_RXP
R44
PCIE6_RXN
K21
PCIE21_TXN
G47
PCIE4_TXN/USB31_10_TXN
D20
PCIE3_TXN/USB31_9_TXN
B19
GPP_F16/USB2_OC5#
AR35
PCIE24_RXN
Y40
PCIE22_RXP
U41
PCIE7_RXN
L24
PCIE22_TXN
H47
PCIE5_RXP
G20
PCIE2_TXP/USB31_8_TXP
C18
PCIE5_TXN
B21
PCIE23_RXP
W44
PCIE6_RXP
J21
PCIE23_TXN
G49
PCIE21_TXP
F46
PCIE8_RXN
F24
PCIE6_TXN
D21
GPP_E12/USB2_OC3#
AL41
PCIE24_RXP
Y41
PCIE2_RXN/USB31_8_RXN
R21
DMI0_RXN
K34
PCIE7_RXP
J24
PCIE22_TXP
H48
PCIE24_TXN
G46
PCIE7_TXN
C23
PCIE5_TXP
A22
PCIE23_TXP
G48
DMI1_RXN
G33
PCIE8_RXP
G24
PCIE1_RXP/USB31_7_RXP
F16
PCIE6_TXP
C21
PCIE4_TXP/USB31_10_TXP
C20
PCIE8_TXN
B24
GPP_F18/USB2_OC7#
AV43
DMI2_RXN
K32
DMI0_RXP
J35
PCIE24_TXP
G45
DMI0_TXN
C33
GPD7
BE41
PCIE7_TXP
B23
PCIE2_TXN/USB31_8_TXN
B18
PCIE1_TXP/USB31_7_TXP
B17
DMI3_RXN
G30
DMI1_RXP
F34
DMI1_TXN
C32
PCIE8_TXP
C24
RSVD1
U13
PCIE4_RXN/USB31_10_RXN
N18
RSVD
M29
DMI2_RXP
J32
PCIE1_RXN/USB31_7_RXN
G17
DMI2_TXN
C31
DMI0_TXP
B33
GPP_F15/USB2_OC4#
AV47
RSVD
M26
DMI3_RXP
F30
DMI3_TXN
C29
DMI1_TXP
B32
GPP_E11/USB2_OC2#
AJ44
RH7
10K_0402 _5%
@
12
www.laptoprepairsecrets.com
Page 15
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D
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E
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1 1
2 2
3 3
4 4
Trace Space: 15 mil
Max Trace Length: 1000 mil
XCLK_BIASREF (PDG)
Trace Width/Space: 15mil /15 mil
Max Trace Length: 1000 mil
8/24
#571483_CFL_H_RVP_CRB_TDK_Rev0p5
Recommend external test point
This signal has a weak internal pull-down 20K.
0 = 38.4/19.2MHz XTAL frequency selected.
1 = 24MHz XTAL frequency selected. (DDX03)
Notes:
1. The internal pull-down is disabled after RSMRST#
de-asserts.
2. This signal is in the primary well.
For DDX03 R02
The signal has a weak internal pull-down 20K
0 = VCCPSPI is connected to 3.3V rail
1 = VCCPSPI is connected to 1.8V rail
Note: If VCCPSPI is connected to 1.8V rail, this pin
strap must be a ‘ 1’ for the proper functionality
of the SPI (Flash) I/Os
1.8V
3.3V
STRAP
STRAP
STRAP
An external pull-up or pull-down is required.
0 = Integrated CNVi enable.
1 = Integrated CNVi disable.
XTAL Frequency Select
M.2 CNV Mode Select
PCH-H XTAL_IN/OUT POR is 24MHz for 571697_CNL_MOW_WW16_2017.pdf
571391_CFL_H_PDG_Rev0p71
To avoid floating input at the I/O pin BRI_RSP and RGI_RSP it is recommended to add
a weak pull up resistor to the SoC pin with a recommended value of 20K ohm.
Pulled down by CRF CNVi RGI_DT pin
VCCPSPI Select
DGPU
GLAN
NGFF WL+BT(KEY E)
remove CPU_C10_GATE#
M2 SSD1
remove no use srcclkreq
remove SD signal from PCH
remove TP as C5PRH
use same part w C5MMH
M2 SSD2
M2 SSD3
20190927
20191024
- CML Check list OK
20190918 SSD2&3 Change
20191209
> SSD1 - GPP_B9/CLKREQ4# (PCIE only) (2018 @SSD2)
> SSD2 - GPP_B8/CLKREQ3# (PCIE/SATA) (2018 @SSD1)
> SSD3 - GPP_B10/CLKREQ5# (PCIE/SATA) (2019 NEW)
20191210C
- RH22 change to 20K for CNVI review
20200114
- CH7/CH8 Chan ge to SE17310 0J80
PCH_CPU_ 24M_CLK_P
PCH_CPU_ 24M_CLK_N
PCH_CPU_ BCLK_N
PCH_CPU_ BCLK_P
XTAL_24M _PCH_OUT_R
XTAL_24M _PCH_IN_R
XTAL_24M_ PCH_OUT
PCH_RTCX1
PCH_RTCX2
PCH_RTCX2
PCH_RTCX1
XCLK_BIASR EF
PCIE_RCOMPN
PCIE_RCOMPP
SD_RCOMP_1 P8
SD_RCOMP_3 P3
GPPJ_RCOMP _1P8
CNV_WT_R COMP
CNV_BRI_PTX _DRX
GPP_J9
GPP_J9
VGA_CLKRE Q#
XTAL_24M_ PCH_IN
XTAL_24M_P CH_OUT_R
XTAL_24M_P CH_IN_R
CLK_CNV_P TX_DRX_N
CLK_CNV_P TX_DRX_P
CLK_CNV_PRX _DTX_N
CLK_CNV_PRX _DTX_P
CNV_PRX_D TX_N0
CNV_PRX_D TX_P0
CNV_PRX_D TX_N1
CNV_PRX_D TX_P1
CNV_PTX_D RX_N0
CNV_PTX_D RX_P0
CNV_PTX_D RX_N1
CNV_PTX_D RX_P1
CNV_BRI_P RX_DTX
CNV_RGI_PT X_DRX
CNV_RGI_PR X_DTX
CNV_BRI_P TX_DRX
LAN_CLK REQ#
WLAN_CLK REQ#
SSD2_CL KREQ#
SSD3_CL KREQ#
SSD1_CL KREQ#
I2C_TS_INT #
I2C_TS_RS T#
CNV_RGI_PTX _DRX
CNV_BRI_PRX _DTX
CNV_RGI_P RX_DTX
PCH_CPU_2 4M_CLK_P<10>
PCH_CPU_2 4M_CLK_N<10>
PCH_CPU_B CLK_P<10>
PCH_CPU_B CLK_N<10> PCH_CPU_PC IBCLK_P <10>
PCH_CPU_PC IBCLK_N <10>
LAN_CLK REQ#<73>
WLAN_CLKR EQ#<52>
CLK_CNV_P RX_DTX_N <52>
CLK_CNV_P RX_DTX_P <52>
CNV_PRX_DT X_N0 <52>
CNV_PRX_DT X_P0 <52>
CNV_PRX_DT X_N1 <52>
CNV_PRX_DT X_P1 <52>
CLK_CNV_PTX _DRX_N <52>
CLK_CNV_PTX _DRX_P <52>
CNV_PTX_D RX_N0 <52>
CNV_PTX_D RX_P0 <52>
CNV_PTX_D RX_N1 <52>
CNV_PTX_D RX_P1 <52>
REFCLK_C NV <5 2>
CNV_BRI_PRX _DTX<52>
CNV_RGI_P TX_DRX<52>
CNV_RGI_PRX _DTX<52>
CNV_BRI_P TX_DRX<52>
SSD2_CLKRE Q#<68>
CLK_PEG_VGA <27>
CLK_PEG_VGA# <27>
CLK_PCIE_L AN <73>
CLK_PCIE_L AN# <7 3>
CLK_PCIE_W LAN# <52>
CLK_PCIE_WL AN <52>
CLK_PCIE_NGF F1 <68>
CLK_PCIE_NGF F1# <68>
VGA_CLKR EQ# <27>
CLK_PCIE_NGF F2 <69>
CLK_PCIE_NGF F2# <69>
CLK_PCIE_NGF F3 <68>
CLK_PCIE_NGF F3# <68>
SSD3_CLKRE Q#<69>
SSD1_CLKRE Q#<68>
I2C_TS_INT#<38>
I2C_TS_RST#<38>
+1.8VALW_PR IM
+1.8VALW_PR IM
+3VS
+1.8VALW_PR IM
+1.8VALW_PR IM
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(2/8)CLK/CNVI/SD
Custom
15 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(2/8)CLK/CNVI/SD
Custom
15 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(2/8)CLK/CNVI/SD
Custom
15 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
C
H
5
3
3
P
_
0
4
0
2
_
5
0
V
8
J
RH300 10K_040 2_5%
1 2
C
H
6
1
8
P
_
0
4
0
2
_
5
0
V
8
J
C
H
8
1
0
P
_
0
2
0
1
_
5
0
V
8
J
1
2
RH220 10K_040 2_5%
1 2
7 OF 13
CNP-H
Rev1.0
UH1G
CNP-H_BGA8 74
@
CLKOUT_CPUNSSC_P
D7
CLKOUT_CPUBCLK_P
B8
XTAL_OUT
U9
XTAL_IN
U10
XCLK_BIASREF
T3
RTCX1
BA49
RTCX2
BA48
CLKOUT_ITPXDP_P
Y4
CLKOUT_CPUPCIBCLK_P
A6
CLKOUT_CPUBCLK#
C8
CLKOUT_CPUNSSC#
C6
CLKOUT_CPUPCIBCLK#
B6
CLKOUT_ITPXDP#
Y3
CLKOUT_PCIE_P15
V3
GPP_B10/SRCCLKREQ5#
AN29
GPP_H0/SRCCLKREQ6#
AE47
GPP_B6/SRCCLKREQ1#
BE31
CLKOUT_PCIE_P0
AJ7
CLKOUT_PCIE_P1
AH10
CLKOUT_PCIE_N0
AJ6
CLKOUT_PCIE_P2
AE15
CLKOUT_PCIE_N1
AH9
CLKOUT_PCIE_P3
AE7
GPP_B7/SRCCLKREQ2#
AR32
CLKOUT_PCIE_N2
AE14
GPP_H1/SRCCLKREQ7#
AC48
CLKOUT_PCIE_P4
AC3
CLKIN_XTAL
R6
CLKOUT_PCIE_N3
AE6
CLKOUT_PCIE_P5
AB3
CLKOUT_PCIE_P6
W3
CLKOUT_PCIE_N4
AC2
CLKOUT_PCIE_P7
W6
GPP_H9/SRCCLKREQ15#
AC43
CLKOUT_PCIE_N5
AB2
CLKOUT_PCIE_N6
W4
GPP_H6/SRCCLKREQ12#
AE39
CLKOUT_PCIE_N10
AC9
GPP_H8/SRCCLKREQ14#
AC44
GPP_H5/SRCCLKREQ11#
AC39
CLKOUT_PCIE_P8
AC15
GPP_H7/SRCCLKREQ13#
AB48
CLKOUT_PCIE_N7
W7
CLKOUT_PCIE_P9
U3
GPP_B8/SRCCLKREQ3#
BB30
CLKOUT_PCIE_N11
AE9
GPP_H2/SRCCLKREQ8#
AE41
GPP_H4/SRCCLKREQ10#
AC41
GPP_A16/CLKOUT_48
BE33
CLKOUT_PCIE_N12
AC7
CLKOUT_PCIE_N8
AC14
CLKOUT_PCIE_P10
AC11
CLKOUT_PCIE_N9
U2
CLKOUT_PCIE_P11
AE11
CLKOUT_PCIE_N13
AA1
CLKOUT_PCIE_N14
T2
GPP_B5/SRCCLKREQ0#
BF31
CLKOUT_PCIE_P12
AC6
CLKOUT_PCIE_P13
Y2
CLKOUT_PCIE_N15
V2
GPP_H3/SRCCLKREQ9#
AF48
CLKOUT_PCIE_P14
T1
GPP_B9/SRCCLKREQ4#
BA30
RH10 60.4_0402 _1%
1 2
RH20 200_0402_ 1%
1 2
RH181 20K_040 2_1%CNVI@
1 2
RH9 33_0 402_1%
EMI@
1 2
RH17 100_0402_ 1%
1 2
RH182 20K_040 2_1%CNVI@
1 2
RH23 10K_0402_5%@
12
RH11 33_0 402_1%
EMI@
1 2
TH2@
RH12 10M_0402_5%
1 2
RH22 20K_0402_1%
1 2
RH16
150_0402_ 1%
1 2
RH15 4.7K_040 2_5%
1 2
RH14
10K_040 2_5%
12
RH19 200_0402 _1%
1 2
YH1
24MHZ_18P F_7R24000001
NC
2
3
3
1
1
NC
4
C
H
7
1
0
P
_
0
2
0
1
_
5
0
V
8
J
1
2
TH3@
YH2
32.768KHZ_ 9PF_X1A000141000 200
1 2
13 OF 13
CNP-H
Rev1.0
UH1M
CNP-H_BGA87 4
@
GPP_J_2
AW3
GPP_J_3
AT10
GPP_J4/CNV_BRI_DT/UART0B_RTS#
AV4
CNV_WR_CLKN
BD4
CNV_WR_CLKP
BE3
CNV_WR_D0N
BB3
CNV_WR_D0P
BB4
CNV_WR_D1N
BA3
CNV_WR_D1P
BA2
CNV_WT_CLKN
BC5
CNV_WT_CLKP
BB6
CNV_WT_D0N
BE6
CNV_WT_D0P
BD7
CNV_WT_D1N
BG6
CNV_WT_D1P
BF6
CNV_WT_RCOMP
BA1
GPPJ_RCOMP_1P81
BD1
GPPJ_RCOMP_1P82
BE1
GPPJ_RCOMP_1P83
BE2
GPP_J0/CNV_PA_BLANKING
AV6
GPP_I11/M2_SKT2_CFG0
AP3
GPP_G1/SD_DATA0
BE9
GPP_G7/SD_WP
AV13
GPP_G5/SD_CD#
BE8
GPP_I12/M2_SKT2_CFG1
AP2
GPP_G2/SD_DATA1
BF8
PCIE_RCOMPN
B12
GPP_G3/SD_DATA2
BF9
GPP_J9/CNV_MFUART2_TXD
AU9
GPP_I13/M2_SKT2_CFG2
AN4
GPP_I14/M2_SKT2_CFG3
AM7
PCIE_RCOMPP
A13
GPP_G4/SD_DATA3
BG8
GPP_G6/SD_CLK
BD8
GPP_J1/CPU_C10_GATE#
AY3
GPP_J7/CNV_RGI_RSP/UART0B_CTS#
AV3
GPP_J8/CNV_MFUART2_RXD
AW2
GPP_J10
AV7
SD_3P3_RCOMP
BE4
RSVD3
Y36
GPP_J5/CNV_BRI_RSP/UART0B_RXD
AY2
GPP_J6/CNV_RGI_DT/UART0B_TXD
BA4
TP
AL35
RSVD2
Y35
SD_1P8_RCOMP
BE5
GPP_J11/A4WP_PRESENT
AR13
RSVD1
BC1
GPP_G0/SD_CMD
AW13
RH205 10K_040 2_5%
1 2
RH18 200_0402_1 %
1 2
RH204 10K_040 2_5%
1 2
RH8 1M_0402_5%
1 2
TH4@
RH206 10K_040 2_5%
1 2
RH21 4.7K_040 2_5%
@
1 2
RH207 10K_040 2_5%
1 2
www.laptoprepairsecrets.com
Page 16
A
A
1 1
RVP: 330K
A 1 M pull-up is used on the customer reference
board (CRB). This is needed to reduce leakage
from Coin Cell Battery in G3 state.
GPIO Serial Expander (GSX) is the capability
provided by the PCH to expand the GPIOs
on a platform that needs more GPIOs than the
ones provided by the PCH.
DDP[B..F]CTRLDATA
This signal has a weak internal Pull-down.
0 = Port B~D is not detected.
1 = Port B,C,D is detected. (Default)
Notes:
1. The internal Pull-down is disabled after
PCH_PWROK de-asserts.
2. This signal is in the primary well.
#571182_CNL_PCH_H_EDS_V1_Rev0.7
External pull-up is required. Recommend 100K if pulled
up to 3.3V or 75K if pulled up to 1.8V.
571007_CFL_MOW_Archive_WW22_2017
STUFF R on GPP_H15
#571391_CFL_H_PDG_Rev0p71
STRAP
SPI ROM ( 16MByte )
XMC P/N: SA0000B8400
can remove if no use DP
08/18
CRB connect GND
no follow naming
remove CIO_PLUG_EVENT#
remove PCH DP SCLK/SDATA
#571182_CFL_PC H_EDS_Rev1.0 recommend 1 00k
CRB PU 20k
PDG P348 quad mode support PH1K
* wait confirm CG7
intel critical net recommend
intel critical net recommend
PCH PLTRST Buffer
20191016
- BT_ON For Intel (GPP_B3)
- TP_INT# change to GPP_B4
*20191024
- CML RVP PU 330K
20191206
- RH304 pop
SM_INTRUDER#
PCH_SPI_SI_R
GPP_H15
GPP_H15
GPP_H12
PLT_RST#
PCH_SPI_C S#0
PCH_SPI_CLK _0_R
PCH_SPI_CS #0
PCH_SPI_SI_0_ R
PCH_SPI_IO3_0_ RPCH_SPI_SO_ 0_R
PCH_SPI_IO2_0 _R
PCH_SPI_CLK_ 0_R
PCH_SPI_CS# 0
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
EC_PME#_R PLT_RST #
PCH_SPI_IO3
PCH_SPI_IO2
PCH_SPI_IO2PCH_SPI_IO2_0 _R
PCH_SPI_SI_0_ R
PCH_SPI_SO_ 0_R
PCH_SPI_IO3_0 _R
PCH_SPI_C LK_0_R
PCH_SPI_SI_R
PCH_SPI_SO _R
PCH_SPI_IO3
PCH_SPI_C LK_R
PCH_SPI_CLK _R
PLT_RST#
PCH_SPI_SO_ 0_R
PCH_SPI_IO2 _0_R
PCH_SPI_SI_0_ R
PCH_SPI_CLK _0_R
PCH_SPI_IO3 _0_R
PCH_SPI_CS# 0
TP_INT# EC_TP_INT#
BT_ON
GPP_B3
TP_INT#
GPP_B3
GPP_H12 <19 >
EC_PME#<58,73> PLT_RST# < 27,58,66>
EDP_HPD<38>
HDMI_HPD _PCH<27,40>
PCH_SPI_CS#2<66>
PCH_SPI_SI_R<66>
PCH_SPI_SO_ R<66>
PCH_SPI_CL K_R<66>
PLT_RST_B UF# <52,68,69,73>
DP0_HPD_P CH<27,39>
EC_TP_INT# <58,63>
BT_ON <52,5 8>
+RTCVCC
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(3/8)DDC/SPI
Custom
16 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(3/8)DDC/SPI
Custom
16 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(3/8)DDC/SPI
Custom
16 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CH12
68P_0402 _50V8J
XEMI@
1 2
RH195 100K_020 1_5%@
1 2
RH26 1K_0 402_5%
12
RH259 0_0402 _5%NTPM@
1 2
CH10 0.1U_0201_10V6K
1 2
RH258 0_0402 _5%NTPM@
1 2
RH28 100K_04 02_5%
12
RH304 0_040 2_5%
1 2
RH107 33_04 02_1%
1 2
RH24 0_0 402_5%
@
1 2
RH198 100K_020 1_5%
1 2
RH260 0_0402 _5%NTPM@
1 2
UH2
W25Q128FVS IQ_SO8
/CS
1
DO(IO1)
2
/WP(IO2)
3
GND
4
DI(IO0)
5
CLK
6
/HOLD(IO3)
7
VCC
8
RH108 33_04 02_1%
1 2
TH6 @
RH186 0_0402_ 5%@
1 2
RH27 1K_0 402_5%
12
RH109 33_04 02_1%
1 2
JC1
ACES_9196 0-0084N_MX25L3206 EM2I
CONN@
CS#
1
SO/SIO1
2
WP#
3
GND
4
VCC
8
HOLD#
7
SCLK
6
SI/SIO0
5
RH29 100K_040 2_5%
12
CH11
0.1U_0201 _10V6K
1 2
1 OF 13
CNP-H
Rev1.0
UH1A
CNP-H_BGA87 4
@
SPI0_CLK
AW47
GPP_D22/SPI1_IO3
BC17
SPI0_MISO
BA45
SPI0_MOSI
AU41
VSS
AL37
GPP_K14/GSXDIN
W46
GPP_D2/SPI1_MISO/SBK2_BK2
BE18
GPP_E3/CPU_GP0
AL47
GPP_H16/SML4CLK
AE43
GPP_B4/CPU_GP3
BC33
GPP_K16/GSXCLK
Y47
GPP_B3/CPU_GP2
BF32
GPP_E7/CPU_GP1
AM45
GPP_H17/SML4DATA
AJ46
SPI0_IO2
AY48
GPP_B13/PLTRST#
AV29
GPP_H14/SML3DATA
AD48
SPI0_IO3
BA46
SPI0_CS2#
AT40
GPP_H10/SML2CLK
AE48
GPP_H11/SML2DATA
AD47
SPI0_CS1#
AW48
GPP_K12/GSXDOUT
Y46
GPP_D21/SPI1_IO2
BD17
SPI0_CS0#
AY47
GPP_H18/SML4ALERT#
AE44
GPP_D0/SPI1_CS#/SBK0_BK0
BF19
GPP_D1/SPI1_CLK/SBK1_BK1
BE19
TP
AN35
RSVD2
R15
GPP_H15/SML3ALERT#
AC47
GPP_K15/GSXSRESET#
AA45
GPP_K13/GSXSLOAD
Y48
RSVD1
R13
GPP_H13/SML3CLK
AF47
GPP_D3/SPI1_MOSI/SBK3_BK3
BF18
GPP_H12/SML2ALERT#
AB47
GPP_A11/PME#/SD_VDD2_PWR_EN#
BE36
INTRUDER#
BB44
RH110 33_04 02_1%
1 2
DH1
RB751V-40_S OD323-2
12
RH305 100K_04 02_5%@
12
RH32 0_0402_5 %@
1 2
5 OF 13
CNP-H
Rev1.0
UH1E
CNP-H_BGA87 4
@
GPP_K22/IMGCLKOUT0
L48
GPP_F14/PS_ON#
AP41
GPP_F22/DDPF_CTRLCLK
AT49
GPP_I1/DDPC_HPD1/DISP_MISC1
AN10
GPP_I10/DDPD_CTRLDATA
AR3
GPP_K23/IMGCLKOUT1
M45
GPP_I6/DDPB_CTRLDATA
AR8
GPP_I2/DDPD_HPD2/DISP_MISC2
AP9
GPP_I9/DDPD_CTRLCLK
AL9
GPP_I0/DDPB_HPD0/DISP_MISC0
AT6
GPP_I4/EDP_HPD/DISP_MISC4
AN6
GPP_F23/DDPF_CTRLDATA
AN40
GPP_I7/DDPC_CTRLCLK
AN13
GPP_K20
T46
GPP_I8/DDPC_CTRLDATA
AL10
GPP_K21
T45
GPP_I5/DDPB_CTRLCLK
AL13
GPP_H23/TIME_SYNC0
AJ47
GPP_I3/DDPF_HPD3/DISP_MISC3
AL15
RH111 33_04 02_1%
1 2
RH33
0_0402_5%
XEMI@
1 2
RH199
100K_020 1_5%
@
12
RH258
4.99_0402_1%
TPM@
SD034499B80
RH301M_0402_5 %
12
RH25 1K_0 402_5%
12
UH3
MC74VHC1 G08DFT2G_SC70-5
IN1
1
IN2
2
OUT
4
VCC
5
GND
3
RH31 4.7K _0402_5%
@
1 2
RH259
4.99_0402_1%
TPM@
SD034499B80
CH9 100 P_0402_50V8J
XESD@
1 2
RH260
4.99_0402_1%
TPM@
SD034499B80
www.laptoprepairsecrets.com
Page 17
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
For Intel CLINK
#571391_CFL_H_PDG_Rev0p5
eSPI clock and eSPI data mismatched: <500 mils.
‧
eSPI clock and eSPI chip select mismatched: <500 mils.
‧
eSPI signal maximum 9 Vias
‧
* If DATA signals are entirely routed on MS, stuff the resistor with 15 Ohm.
#571391_CFL_H_PDG_Rev0p5.pdf
1.8V
(eSPI)
LPC Bus
LPC : +3.3V
check straps
DGPU_PRSNT#
UMA
DIS,Optimus10
GPP_F13
USB3 MB
NGFF
WL+BT(KEY E)
M.2 SSD2 PCIE L0
M.2 SSD2 PCIE L1
M.2 SSD2 PCIE L2
M.2 SSD2 PCIE L3
GLAN
20190924
20190918 Port4 change to Port3
M.2 SSD PCIE/SATA select pin
20190918
20190918
USB3 IO/B
USB3 IO/B
USB3 Type C
20191016
USB3 Type C
20191016
HDD
20191016
- HDD change to Port 0B
20191025
- SATA Port 4
20191206
- JSSD3 detect pin change to SATA_GP4
M.2 SSD3 PCIE L3
M.2 SSD3 PCIE L2
M.2 SSD3 PCIE L1
M.2 SSD3 PCIE L0
CL_CLK
CL_DATA
CL_RST#
H_PECI
H_PM_DOWN_ R
H_PM_SYNC _R
ENBKL
PCH_BKL_PW M
PCH_ENVD D
PCH_PECI
H_PLTRST_C PU#
H_PM_SYNC
SATA_GP5
PCH_THERM TRIP#
TPM_SERIRQ
LPC_PIRQA#
LPC_AD2
LPC_AD0
LPC_AD3
LPC_AD1
CLK_LPC
ESPI_RST#
TPM_SERIRQ
LPC_FRAM E#
LPC_PIRQA#
DGPU_PRSNT #
DGPU_PRSNT #
PCIE_PRX_DT X_P15
PCIE_PRX_DT X_N15
PCIE_PTX_DR X_N15
PCIE_PTX_DR X_P15
H_PECI
PCIE_PRX_DT X_N9
PCIE_PRX_DT X_P9
PCIE_PTX_DR X_N9
PCIE_PTX_DR X_P9
PCIE_PRX_DT X_N10
PCIE_PRX_DT X_P10
PCIE_PTX_DR X_P10
PCIE_PTX_DR X_N10
SATA_GP1
SSD_DEVSLP 1
RCIN#
RCIN#
PCIE_PRX_ DTX_P14
PCIE_PRX_ DTX_N14
PCIE_PTX_ DRX_N14
PCIE_PTX_ DRX_P14
USB3_PTX _DRX_P4
USB3_PTX _DRX_N4
USB3_PRX _DTX_P4
USB3_PRX _DTX_N4
PCIE_PRX_DT X_N17
PCIE_PRX_DT X_P17
PCIE_PTX_DR X_P17
PCIE_PTX_DR X_N17
PCIE_PRX_DT X_N18
PCIE_PRX_DT X_P18
PCIE_PTX_DR X_P18
PCIE_PTX_DR X_N18
PCIE_PRX_DTX _N19
PCIE_PRX_DTX _P19
PCIE_PTX_D RX_N19
PCIE_PTX_D RX_P19
SATA_GP1
PCIE_PRX_DTX _N20
PCIE_PRX_DTX _P20
PCIE_PTX_D RX_N20
PCIE_PTX_D RX_P20
SATA_GP2
SATA_GP4
USB3_PTX _DRX_P5
USB3_PRX _DTX_P5
USB3_PTX _DRX_N5
USB3_PRX _DTX_N5
SATA_PTX_ DRX_N0B
SATA_PTX_ DRX_P0B
SATA_PRX_D TX_N0B
SATA_PRX_D TX_P0B
SSD_DEVSLP 4
SATA_GP4
H_PLTRST _CPU# <10>
H_PECI <10,58>
H_PM_DOW N_R <10>
H_PM_SYNC _R < 10>
PCH_THERM TRIP#_R <10>
ENBKL <58>
PCH_BKL_ PWM <38>
PCH_ENVDD <38>
USB3_PRX_D TX_P2<73>
USB3_PRX_D TX_N2<73>
USB3_PTX_D RX_N2<73>
USB3_PTX_D RX_P2<73>
LPC_AD3 <58>
LPC_AD0 <58>
LPC_AD2 <58>
LPC_AD1 <58>
CLK_LPC_R <58>
LPC_FRAM E# <58>
TPM_SERIRQ <58,66>
PCIE_PRX_DTX_N15 <52>
PCIE_PRX_DTX_P15 <52>
PCIE_PTX_C_D RX_N15 <52>
PCIE_PTX_C_ DRX_P15 <52>
USB3_PRX_D TX_N3<43>
USB3_PRX_D TX_P3<43>
USB3_PTX_D RX_N3<43>
USB3_PTX_D RX_P3<43>
USB3_PRX_D TX_N1<71>
USB3_PRX_D TX_P1<71>
USB3_PTX_D RX_N1<71>
USB3_PTX_D RX_P1<71>
PCIE_PRX_D TX_N9 <68>
PCIE_PRX_D TX_P9 <68>
PCIE_PTX_DR X_P9 <68>
PCIE_PTX_D RX_N9 <68>
PCIE_PTX_DR X_P10 <68>
PCIE_PRX_D TX_N10 <68>
PCIE_PRX_D TX_P10 <68>
PCIE_PTX_D RX_N10 <68>
PCIE_PTX_D RX_P12<68>
PCIE_PTX_D RX_N12<68>
PCIE_PRX_D TX_P12<68>
PCIE_PRX_DT X_N12<68>
PCIE_PTX_D RX_N11<68>
PCIE_PTX_D RX_P11<68>
PCIE_PRX_D TX_P11<68>
PCIE_PRX_DT X_N11<68>
SATA_GP1 <6 8>
SSD_DEVSL P1 <68>
OVRM_EN <3 6,58>
PCIE_PRX_DTX_N14<73>
PCIE_PRX_DTX_P14<73>
PCIE_PTX_DR X_N14<73>
PCIE_PTX_DR X_P14<73>
USB3_PRX_D TX_N4<43>
USB3_PRX_D TX_P4<43>
USB3_PTX_D RX_N4<43>
USB3_PTX_D RX_P4<43>
PCIE_PTX_DR X_P17 <69>
PCIE_PRX_D TX_N17 <69>
PCIE_PRX_D TX_P17 <69>
PCIE_PTX_D RX_N17 <69>
PCIE_PTX_DR X_P18 <69>
PCIE_PRX_D TX_N18 <69>
PCIE_PRX_D TX_P18 <69>
PCIE_PTX_D RX_N18 <69>
PCIE_PTX_ DRX_P19<69>
PCIE_PTX_ DRX_N19<69>
PCIE_PRX_D TX_P19<69>
PCIE_PRX_DT X_N19<69>
PCIE_PTX_ DRX_P20<69>
PCIE_PTX_ DRX_N20<69>
PCIE_PRX_D TX_P20<69>
PCIE_PRX_DT X_N20<69>
USB3_PRX_D TX_P5<73>
USB3_PTX_D RX_P5<73>
USB3_PTX_D RX_N5<73>
USB3_PRX_D TX_N5<73>
SATA_PTX_D RX_P0B<67>
SATA_PTX_D RX_N0B<67>
SATA_PRX_D TX_N0B< 67>
SATA_PRX_ DTX_P0B<67>
SSD_DEVSL P4 <69>
SATA_GP4 <6 9>
+3VS
+3VALW
+3VS
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCIE/SATA/USB3/eSPI
Custom
17 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCIE/SATA/USB3/eSPI
Custom
17 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCIE/SATA/USB3/eSPI
Custom
17 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
TH10 @
RH43
10K_040 2_5%
UMA@
12
CH1.1U_0402_16 V7K
1 2
RH44
10K_040 2_5%
VGA@
12
TH12 @
RH42 30_0402_5 %
1 2
3 OF 13
CNP-H
Rev1.0
UH1C
CNP-H_BGA87 4
@
PCIE_15_SATA_2_TXN
B40
PECI
AF2
PM_SYNC
AF3
PM_DOWN
AE2
GPP_K3
U47
PCIE12_RXN/SATA1A_RXN
H42
PCIE20_TXP/SATA7_TXP
B44
PCIE16_TXN/SATA3_TXN
B41
GPP_K4
N48
PCIE13_RXP/SATA0B_RXP
C46
PCIE17_TXP/SATA4_TXP
B42
PCIE11_TXN/SATA0A_TXN
B36
GPP_F19/EDP_VDDEN
AV44
CL_RST#
AU4
GPP_K5
N47
PCIE19_TXP/SATA6_TXP
D43
PCIE18_TXN/SATA5_TXN
C42
GPP_E2/SATAXPCIE2/SATAGP2
AK47
GPP_E0/SATAXPCIE0/SATAGP0
AH41
GPP_K6
P47
PCIE15_RXP/SATA2_RXP
E45
PCIE14_RXP/SATA1B_RXP
C47
GPP_K7
R46
PCIE20_RXP/SATA7_RXP
R37
PCIE16_RXN/SATA3_RXN
L41
PCIE17_RXP/SATA4_RXP
K44
PCIE12_TXN/SATA1A_TXN
D38
PCIE13_TXP/SATA0B_TXP
C38
GPP_F12/SATA_SDATAOUT1
AU46
THRMTRIP#
AD3
GPP_K8
P48
GPP_F10/SATA_SCLOCK
AR42
GPP_K9
V47
PCIE18_RXN/SATA5_RXN
P41
PCIE19_RXP/SATA6_RXP
N42
PCIE10_RXN
K37
PCIE13_RXN/SATA0B_RXN
C45
GPP_F21/EDP_BKLTCTL
AU48
PCIE14_TXP/SATA1B_TXP
D39
GPP_F13/SATA_SDATAOUT0
AU47
GPP_F2/SATAXPCIE5/SATAGP5
AM43
PLTRST_CPU#
AG5
PCIE10_RXP
J37
PCIE16_TXP/SATA3_TXP
C41
PCIE10_TXN
C35
GPP_F4/SATAXPCIE7/SATAGP7
AM48
PCIE11_RXP/SATA0A_RXP
F39
PCIE14_RXN/SATA1B_RXN
D46
PCIE13_TXN/SATA0B_TXN
B38
GPP_F11/SATA_SLOAD
AR48
PCIE20_TXN/SATA7_TXN
A44
PCIE18_TXP/SATA5_TXP
D42
PCIE10_TXP
B35
GPP_F20/EDP_BKLTEN
AV46
CL_DATA
AT5
GPP_E8/SATA_LED#
AK48
GPP_E1/SATAXPCIE1/SATAGP1
AJ43
PCIE17_TXN/SATA4_TXN
A42
GPP_K10
V48
PCIE9_RXN
G36
PCIE19_TXN/SATA6_TXN
C44
GPP_K11
W47
PCIE16_RXP/SATA3_RXP
M40
PCIE15_RXN/SATA2_RXN
F44
PCIE14_TXN/SATA1B_TXN
C39
PCIE11_TXP/SATA0A_TXP
C36
PCIE20_RXN/SATA7_RXN
R35
PCIE17_RXN/SATA4_RXN
K43
PCIE12_RXP/SATA_1A_RXP
J41
PCIE9_RXP
F36
PCIE9_TXN
C34
PCIE18_RXP/SATA5_RXP
R40
GPP_K0
L47
PCIE11_RXN/SATA0A_RXN
G38
CL_CLK
AR2
GPP_F0/SATAXPCIE3/SATAGP_3
AN47
PCIE19_RXN/SATA6_RXN
M44
GPP_K1
L46
PCIE12_TXP/SATA1A_TXP
E37
PCIE9_TXP
D34
GPP_K2
U48
PCIE15_TXP/SATA2_TXP
C40
GPP_F3/SATAXPCIE6/SATAGP6
AM47
GPP_F1/SATAXPCIE4/SATAGP4
AM46
6 OF 13
CNP-H
Rev1.0
UH1F
CNP-H_BGA87 4
@
USB31_1_TXN
F9
USB31_1_TXP
F7
USB31_1_RXN
D11
USB31_1_RXP
C11
USB31_2_TXN
C3
USB31_2_TXP
D4
USB31_2_RXN
B9
USB31_2_RXP
C9
USB31_6_TXN
C17
USB31_6_TXP
C16
USB31_6_RXN
G14
USB31_6_RXP
F14
USB31_5_TXN
C15
USB31_5_TXP
B15
USB31_5_RXN
J13
USB31_5_RXP
K13
USB31_3_TXP
G12
USB31_3_TXN
F11
USB31_3_RXP
C10
USB31_3_RXN
B10
USB31_4_TXP
C14
USB31_4_TXN
B14
USB31_4_RXP
J15
USB31_4_RXN
K16
GPP_A1/LAD0/ESPI_IO0
BB39
GPP_K18/NMI#
T47
GPP_A6/SERIRQ/ESPI_CS1#
AW35
GPP_A14/SUS_STAT#/ESPI_RESET#
BF38
GPP_F5/SATA_DEVSLP3
AP48
GPP_A4/LAD3/ESPI_IO3
BA38
GPP_F6/SATA_DEVSLP4
AR47
GPP_A9/CLKOUT_LPC0/ESPI_CLK
BB36
GPP_F7/SATA_DEVSLP5
AN46
GPP_A3/LAD2/ESPI_IO2
AV37
GPP_A5/LFRAME#/ESPI_CS0#
BE38
GPP_F8/SATA_DEVSLP6
AN37
GPP_E4/SATA_DEVSLP0
AL48
GPP_A10/CLKOUT_LPC1
BB34
GPP_E5/SATA_DEVSLP1
AH35
GPP_A0/RCIN#/ESPI_ALERT1#
BE39
GPP_A7/PIRQA#/ESPI_ALERT0#
BA36
GPP_A2/LAD1/ESPI_IO1
AW37
GPP_F9/SATA_DEVSLP7
AP47
GPP_K19/SMI#
T48
GPP_E6/SATA_DEVSLP2
AH40
RH37
10K_0402_ 5%
12
RH40 620_040 2_5%
1 2
RH35 22_0402_5 %
12
TH13
@
RH219
10K_0402_ 5%
12
RH38
10K_0402_ 5%
1 2
RH41 13_0402 _5%@
1 2
RH187 10K_0402_5%PBA@
1 2
TH50
@
RH261 0_040 2_5%@
1 2
RH39 10K_0402_ 5%
12
CH500.1U_0201_1 0V6K
XESD@
1 2
TH11 @
CH2.1U_0402_16V 7K
1 2
RH303 10K_040 2_5%
12
www.laptoprepairsecrets.com
Page 18
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CLR ME
Delay 18~25 ms
ECLR CMOS
Delay 18~25 ms
Connect CPU & PCH
--No Support Deep Sx
FOR Jefferson Peak RESET pin is glitch free,it
is recommended that a pull-down resistor of 75K
ohm on GPP_D5(CNV_RF_RESET#)
From ESD Team Request
Near PCH side
1.8V
(EC,VGA,Thermal Sensor)
del RF reserve cap on HDA
intel critical net recommend
intel critical net recommend
(DDR,G-Sensor)
UART BT (20191014)
- RH301 change to 100K
HDA_BIT_CL K
HDA_RST#
HDA_SDIN0
HDA_SDOUT
HDA_SYNC
CPU_DISPA_SD O
CPU_DISPA_SD I_R
CPU_DISPA_BC LK
PCH_SRTCR ST#
PCH_RTCRS T#
PCH_SRTCRS T#
SLP_WLAN#
LAN_DISABL E_N
WAKE#
DRAM_RESET #
DRAM_RESE T#
PCH_VRALE RT#
SYS_PWROK
PCH_GPP_K 17
PCH_GPP_B 11
PM_SLP_A#
SLP_LAN#
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
PM_SLP_S0#
SUSCLK
PM_BATLOW#
PM_BATLOW #
SUSACK#_ R
PM_CLKRUN #
PM_CLKRU N#
LAN_WAKE#
SLP_SUS#
AC_PRESEN T_R
PBTN_OUT# _R
SYS_RESET#
H_CPUPWRGD
PCH_SPKR
PCH_PWROK
EC_RSMRST #
PCH_DPWROK
PCH_DPWRO K
PCH_DPWROK
PCH_SML0A LERT#
PCH_SML0CLK
PCH_SML0DA TA
PCH_SML1A LERT#
PCH_SML1CLK
PCH_SML1DA TA
PCH_SMBAL ERT#
XDP_ITP_PMO DE
CPU_XDP_T CK0
CPU_XDP_T MS
CPU_XDP_T DI
CPU_XDP_T DO
SYS_RESET #
SYS_PWROK
PCH_PWROK
PCH_SMBCLK
PCH_SMBDAT A
PCH_SMBC LK
PCH_SMBD ATA
WAKE#
PCH_RTCRS T#
EC_RSMRST#
PCH_VRALE RT#
TYPEC_3A
PCH_SML0 CLK
PCH_SML0 DATA
D_CK_SCLK
D_CK_SDAT A
CNV_RF_RE SET#
CLKREQ_CN V#
PCH_JTAG_T CK1
PM_SLP_S3 #
PM_SLP_S4 #
SYS_RESET #
SYS_PWROK
EC_RSMRST#
HDA_BIT_CL K
HDA_RST#
HDA_BIT_CLK
HDA_SDOUT
HDA_SYNC
HDA_RST#
LAN_WAKE#
PCH_PWROK
EC_RSMRST#
AC_PRESENT _R
PBTN_OUT#_ R
PCM_OUT
PCM_CLK
D_CK_SCLK
D_CK_SDAT APCH_SMBD ATA
PCH_SMBC LK
PCH_SMBA LERT#UART_WAK E#
CPU_DISPA_SD O_R<6 >
CPU_DISPA_BC LK_R<6>
CPU_DISPA_SD I_R<6>
HDA_SDIN0<56>
PCH_DMIC_CL K0<56>
PCH_DMIC_DAT A0<56>
DDR_DRAMR ST#_R <23,24>
SYS_PWROK <5 8,78>
PM_SLP_S3# <58,78>
PM_SLP_S4# <58,78>
SUSCLK <5 2,68,69>
AC_PRESENT <58>
PBTN_OUT# < 58>
H_CPUPWRG D <10>
PCH_SPKR <19,56>
PCH_PWROK<5 8,78>
CPU_XDP_T CK0 <10>
CPU_XDP_T DI <10>
CPU_XDP_ TDO <10>
CPU_XDP_ TMS <10>
PCH_RTCRS T#<58>
TYPEC_3A < 43>
SUSPWRDNA CK <58>
EC_RSMRST#<58>
PCH_SMBALE RT#<19>
PCH_SML0AL ERT#<19>
PCH_SML1A LERT#<19>
CLKREQ_ CNV#< 52>
CNV_RF_ RESET#<52>
PCH_JTAG_T CK1 <10>
HDA_BIT_CL K_R<5 6>
HDA_SDOU T_R<56>
HDA_SYNC_ R< 56>
HDA_RST# _R<56>
ME_EN<58>
PCH_SML1CL K <27,58,66>
PCH_SML1DA TA <27,58,66>
PCM_CLK<52>
PCM_OUT<52>
D_CK_SCLK < 23,24>
D_CK_SDATA <23,24>
UART_WAKE#<52>
+RTCVCC
+1.2V_VDDQ
+3VALW_DSW
+3VS
+3VALW
+3VALW
+3VALW
+3VALW_DSW
+3VS
+3VALW
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(5/8)PMU/HDA/SMBUS/DMIC
Custom
18 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(5/8)PMU/HDA/SMBUS/DMIC
Custom
18 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(5/8)PMU/HDA/SMBUS/DMIC
Custom
18 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RH193 100K_02 01_5%
1 2
CH13 0.1U_0201 _10V6K
@
12
RH63 499_0402_ 1%
1 2
RH183 10 K_0402_5%
12
RH46
470_0402_ 1%
1 2
RH49
30_0402_5%
1 2
RH251 2.2K_040 2_5%
12
RH208 33_040 2_5%
1 2
RH194 100K_02 01_5%
1 2
RH51 0_0 402_5%
@
1 2
RH50 20K_0402_ 1%
1 2
TH37@
G
D
S
QH7B
2N7002KD W_SOT363-6
5
3 4
RH254 2.2K_040 2_5%
12
CH200.1U_0201_ 10V6K
XESD@
1 2
RH209 33_040 2_5%
1 2
TH21@
G
D
S
QH7A
2N7002KDW _SOT363-6
2
6 1
RH210 33_040 2_5%
1 2
CH210.1U_0201_ 10V6K
XESD@
1 2
RH57 100K_040 2_5%@
1 2
RH62 10K_0402 _5%@
12
RH52 20K_0402_ 1%
1 2
RH60 8.2K_0402_5 %
12
RH192 2.2K_040 2_5%
12
RH55 1K_0402_ 5%
12
TH20@
CH51100P_0402_50V8 J
XESD@
1 2
RH211 33_040 2_5%
1 2
CH220.1U_0201_ 10V6K
XESD@
1 2
RH58 100K_040 2_5%@
1 2
TH22 @
RH53 0_0402_5%@
1 2
RH252 2.2K_040 2_5%
12
RH61100K_0402_5% @
1 2
TH19@
RH48
30_0402_5%
1 2
T209
@
TH24 @
TH38@
T207@
JCMOS1 0_0603_5%@
1 2
RH184100K_040 2_5% @
1 2
RH196100K_0201_5%
12
TH14@
T208
@
RH213 10K_04 02_5%
1 2
TH15@
RH56 8.2K_0402_ 5%
12
CH19 1U_0201_6 .3V6M
1 2
TH23@
RH197100K_0201_5%
12
RH191 2.2K_040 2_5%
12
RH212 10K_0402 _5%
1 2
RH253 2.2K_040 2_5%
12
RH301 100K_0 402_5%
UART_BT@
1 2
RH47 0_0402_5 %
@
1 2
RH45 0_0 402_5%
@
1 2
RH54
0_0402_5%@
1 2
4 OF 13
CNP-H
Rev1.0
UH1D
CNP-H_BGA87 4 @
HDACPU_SDO
AM2
HDACPU_SDI
AN3
HDACPU_SCLK
AM3
PCH_PWROK
AY42
DSW_PWROK
AW41
SYS_PWROK
AU3
CPUPWRGD
AE3
ITP_PMODE
AL3
GPD0/BATLOW#
BF44
GPD3/PWRBTN#
BE46
GPD5/SLP_S4#
BE42
GPP_C4/SML0DATA
BE24
GPP_D19/DMIC_CLK0/SNDW4_CLK
BD16
I2S1_SFRM/SNDW2_CLK
BD12
GPP_B11/I2S_MCLK
AP29
HDA_BCLK/I2S0_SCLK
BD11
HDA_SDO/I2S0_TXD
BF12
SRTCRST#
BD46
RSMRST#
BA47
GPP_D17/DMIC_CLK1/SNDW3_CLK
AW15
GPP_D8/I2S2_SCLK
AV18
GPD4/SLP_S3#
BF42
GPP_C3/SML0CLK
BF25
GPD11/LANPHYPC
BF41
PCH_JTAGX
AH4
HDA_SYNC/I2S0_SFRM
BG13
GPP_C0/SMBCLK
BE26
HDA_RST#/I2S1_SCLK
BE10
SYS_RESET#
AU2
GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
BF36
HDA_SDI0/I2S0_RXD
BE11
GPD9/SLP_WLAN#
BD42
SLP_LAN#
BF40
GPP_C5/SML0ALERT#
BF24
GPP_D20/DMIC_DATA0/SNDW4_DATA
BF15
GPP_D6/I2S2_TXD/MODEM_CLKREQ
BA17
RTCRST#
BE47
GPD6/SLP_A#
BE40
GPP_A15/SUSACK#
BE35
GPP_B2/VRALERT#
BE32
GPP_D5/I2S2_SFRM/CNV_RF_RESET#
BE16
GPP_B1/GSPI1_CS1#/TIME_SYNC1
BF33
GPP_C6/SML1CLK
BF27
GPD10/SLP_S5#
BC42
GPP_A8/CLKRUN#
AV32
PCH_JTAG_TDI
AH2
GPD8/SUSCLK
BE45
GPP_C2/SMBALERT#
BE25
PCH_JTAG_TMS
AJ4
GPP_K17/ADR_COMPLETE
R47
GPP_C1/SMBDATA
BF26
GPP_B23/SML1ALERT#/PCHHOT#
BD33
WAKE#
BB47
DRAM_RESET#
BB46
GPP_D18/DMIC_DATA1/SNDW3_DATA
AV16
HDA_SDI1/I2S1_RXD
BF10
PCH_JTAG_TCK
AJ3
GPP_B0/GSPI0_CS1#
BE29
GPP_B14/SPKR
AW29
GPD2/LAN_WAKE#
BG44
GPD1/ACPRESENT
BG42
GPP_C7/SML1DATA
BE27
I2S1_TXD/SNDW2_DATA
BE12
SLP_SUS#
BD39
GPP_A13/SUSWARN#/SUSPWRDNACK
BC37
GPP_B12/SLP_S0#
BC28
GPP_D7/I2S2_RXD
AW18
PCH_JTAG_TDO
AH3
RH64 499_0402_ 1%
1 2
RH214 10K_04 02_5%
1 2
CH18 1U_0201_6 .3V6M
1 2
RH302 0_0402_5 %
UART_BT@
1 2
RH59 0_0 402_5%
@
1 2
www.laptoprepairsecrets.com
Page 19
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SCI capability is available on all GPIOs
PCH GPIOs that can be routed to generate SMI# or NMI:
GPP_B14, GPP_B20, GPP_B23
‧
GPP_C[23:22]
‧
GPP_D[4:0]
‧
GPP_E[8:0]
‧
GPP_I[3:0]
‧
GPP_G[7:0] (support SMI# only).
‧
The voltage of all GPIO pads in each GPP group is determined by the voltage supplied to the group (either 3.3V or 1.8V),
except for GPP_I and GPD group, (which are 3.3V only), and GPP_J group (which is 1.8V only).
All GPIOs have programmable internal pull-up/pull-down resistors which are off by default.
The internal pull-up/pull-down for each GPIO can be enabled by BIOS programming.
The signal has a weak internal Pull-down.
0 = Disable “ No Reboot” mode. (Default)
1 = Enable “ No Reboot” mode (PCH will disable the
TCO Timer system reboot feature). This function is
useful when running ITP/XDP.
Notes:
1. The internal Pull-down is disabled after
PCH_PWROK is high.
2. This signal is in the primary well.
This Signal has a weak internal Pull-down.
0: SPI (Default)
1: LPC
Notes:
1. The internal Pull-down is disabled after PCH_PWROK is high.
2. This signal is in the primary well.
Top Swap Override
0 = Disable “ Top Swap” mode. (Default)
1 = Enable “ Top Swap” mode.
The internal Pull-down is disabled after PCH_PWROK is high.
This signal has a weak internal pull-down.
0 = Master Attached Flash Sharing (MAFS) enabled (Default)
1 = Slave Attached Flash Sharing (SAFS) enabled.
Notes:
1. This signal is in the primary well.
Warning: This strap must be configured to ‘ 0’ if the
eSPI or LPC strap is configured to ‘ 0’
STRAP
STRAP
STRAP
STRAP
CG11 connect to GPP_B15
<Touch PAD>
check needed?
SMBALERT# / GPP_C2 has a weak internal Pull-down.
0 = Disable Intel ME (TLS) (Default)
1 = Enable Intel ME (TLS)
SML0ALERT# / GPP_C5 has a weak internal Pull-down.
0 = LPC is selected (for EC 9022).
1 = eSPI is selected
SML1ALERT# / GPP_B23 has an internal pull-down.
0 = Disable IntelR DCI-OOB (Default)
1 = Enable IntelR DCI-OOB
STRAP
check for remove (PCH or Both)
*
Reserved
Reserved
Reserved 0
00
for 8 Layer
GPP_D10 GPP_D9
01
1
11
0 0
0
0
Project ID
GPP_D11GPP_D12
1
1
1 1
Project_ID0Project_ID1
20190927
<EMR>
2020 A7
2020 Gaming 60
*
2020 Gaming 50
20190506
- defined as Project
NA
UART_2_PT XD_DRXD
UART_2_PR XD_DTXD
UART_2_PR TS_DCTS
UART_2_PC TS_DRTS
DGPU_PWR_ EN
GSPI0_MOSI
GSPI0_MOSI
GSPI1_MOSI
GSPI1_MOSI
PCH_SPKR
GPP_H12
EC_SCI#
UART_2_PR XD_DTXD
UART_2_PT XD_DRXD
UART_2_PC TS_DRTS
UART_2_PR TS_DCTS
I2C_1_SCL
I2C_1_SDA
TS_EN
GPU_EVENT#
DGPU_AC_D ETECT
EC_SCI# GC6_FB_E N3V3 GC6_FB_E N
DGPU_HOLD_ RST#
DGPU_PWR_EN
DGPU_HOLD_ RST#
GPP_D10
GPP_D9
PROJECT_ID0
PROJECT_ID1
GPP_D9
GPP_D10
I2C_0_SCL
I2C_0_SDA
CPU_ID
SUB_DET
PROJECT_ ID0
PROJECT_ID1
I2C_1_SCL
I2C_1_SDA
I2C_0_SCL
I2C_0_SDA
SUB_DET
CPU_ID
I2C_SCL_T S
I2C_SDA_T S
PEN_IRQ#
PEN_PDCT #
PEN_RST#
WAKE_BT
PCH_SPKR <1 8,56>
GPP_H12 <1 6>
EC_SCI#<58>
I2C_1_SDA<63>
I2C_1_SCL<63 >
TS_EN<38,58>
GPU_EVENT#<27>
GC6_FB_E N3V3<27>
DGPU_AC_DE TECT<27,58,85>
DGPU_HOLD _RST#<27>
DGPU_PWR_E N<27>
UART_2_PT XD_DRXD<52>
UART_2_PR XD_DTXD<52>
PCH_SMBALE RT# <18>
PCH_SML0A LERT# <18>
PCH_SML1A LERT# <18>
PANEL_OD _EN <38>
I2C_SCL_TS<38>
I2C_SDA_T S<38>
I2C_0_SCL<64 >
I2C_0_SDA<64>
PEN_IRQ# <64>
PEN_PDCT#<64>
PEN_RST#<64>
WAKE_BT<5 2>
+3VS
+3VS
+3VALW
+3VALW
+1.8VALW_P RIM
+1.8VALW_PRIM
+1.8VALW_PR IM
+3VALW
+1.8VALW_PR IM
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(6/8)GPIO/I2C/UART/STRAP
Custom
19 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(6/8)GPIO/I2C/UART/STRAP
Custom
19 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(6/8)GPIO/I2C/UART/STRAP
Custom
19 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RH86 1K_0402_5%@
1 2
RH255 1K_040 2_5%H82@
1 2
RH113 4.7K_0402 _5%@
1 2
RH70 49.9K_0402_ 1%@
12
RH256 10K_04 02_5%H6 2@
1 2
RH72 10K_0402_ 5%VGA@
1 2
RH185 1K_04 02_5%@
1 2
RH83 100K_0402 _5%@
12
RH114 150K_04 02_1%
1 2
RH77 4.7K_0402 _5%@
1 2
RH88 1K_0402_5%@
1 2
RH68 49.9K_0402_ 1%
12
RH89 10K_0402_5%
1 2
RH85 10K_0402_5%
1 2
RH73 10K_0402_ 5%VGA@
1 2
RH87 10K_0402_5%
1 2
RH90 1K_0402_5%
1 2
RH91 10K_0402_5%@
1 2
RH66 10K_0402_ 5%@
12
RH215 2.2K_04 02_5%
1 2
RH71 49.9K_0402_ 1%@
12
RH80 150K_04 02_1%
@
1 2
RH69 49.9K_0402_ 1%
12
RH216 2.2K_04 02_5%
1 2
RH67 0_0402_5%@
1 2
RH74 4.7K_0402_ 5%@
1 2
RH217 2.2K_04 02_5%
1 2
RH112 4.7K_040 2_5%@
1 2
11 OF 13
CNP-H
Rev1.0
UH1K
CNP-H_BGA87 4
@
GPP_B21/GSPI1_MISO
BD30
GPP_C22/UART2_RTS#
AW21
GPP_C8/UART0A_RXD
BE23
GPP_C20/UART2_RXD
BD20
GPP_D13/ISH_UART0_RXD/I2C2_SDA
BE17
GPP_C10/UART0A_RTS#
BA24
GPP_C23/UART2_CTS#
AV21
GPP_B22/GSPI1_MOSI
BA26
GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI
AN18
GPP_C18/I2C1_SDA
BF21
GPP_C19/I2C1_SCL
BE21
GPP_C11/UART0A_CTS#
AP24
GPP_C13/UART1_TXD/ISH_UART1_TXD
AP21
GPP_D14/ISH_UART0_TXD/I2C2_SCL
BF17
GPP_H20/ISH_I2C0_SCL
AG45
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
BD38
GPP_B17/GSPI0_MISO
BD29
GPP_C12/UART1_RXD/ISH_UART1_RXD
AU24
GPP_B16/GSPI0_CLK
BF29
GPP_D16/ISH_UART0_CTS#/CNV_WCEN
BF14
GPP_B15/GSPI0_CS0#
BB26
GPP_A23/ISH_GP5
AV34
GPP_D10/ISH_SPI_CLK/GSPI2_CLK
BB20
GPP_B19/GSPI1_CS0#
AW26
GPP_H22/ISH_I2C1_SCL
AH47
GPP_A22/ISH_GP4
AW32
GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN
AR18
GPP_H19/ISH_I2C0_SDA
AH46
GPP_B18/GSPI0_MOSI
BE30
GPP_C17/I2C0_SCL
BC22
GPP_C16/I2C0_SDA
BF23
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
BE14
GPP_A19/ISH_GP1
BD34
GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO
BB16
GPP_A21/ISH_GP3
BA33
GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
BA20
GPP_B20/GSPI1_CLK
AU26
GPP_H21/ISH_I2C1_SDA
AH48
GPP_C21/UART2_TXD
BE20
GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
BE15
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
BD21
GPP_C9/UART0A_TXD
BB24
GPP_A18/ISH_GP0
BF35
GPP_A20/ISH_GP2
BE34
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AW24
RH218 2.2K_04 02_5%
1 2
RH84 1K_0402_5%@
1 2
www.laptoprepairsecrets.com
Page 20
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
5.95A
3-5MM FROM PACKAGE EDGE
6.6A
GPPH
3.3V Only
3.3V
GPPA
GPPB
GPPC
GPIO Group Volta ge
3.3V
3.3V
GPPD
GPPE
GPPF
GPPG
3.3V
3.3V
GPPK
1.8V Only
GPPI
GPPJ
GPD
3.3V Only
SP02000RO00
0.0895A
0.14A
0.343A
0.101A
0.766A
RH174 for 571391_CFL_H_PDG_Rev0p71.pdf
0.113A
0.00767A
0.106A
0.145A
0.97A
0.262A
0.174A
Close to BB11
0.05A
For DDX03 R02
Internal LDO
Short pins AJ22,AJ23,AK22,AK23 together
at surface layer from PDG Rev0.71
VCCPHVLDO_1P8
(External VRM mode RH172 unmount)
0.182A
0.095A
0.882A
0.193A
0.00428A
6.6A
0.169A
0.0085A
0.0198A
0.021A
0.2A
0.42A
0.109A
0.015A
0.213A
HSIO for DMIU/USB3.1/PCIE=4162mA
5.95A
0.0012A
1-3MM FROM PACKAGE EDGE
1-3MM FROM PACKAGE
VCCPRIM_MPHY W31
1-3MM FROM PACKAGE EDGE
1uF 1-3MM FROM PACKAGE EDGE
LC filter close to pin
1-5MM FROM PACKAGE EDGE
FOR VCCAPLL C1/C2
1-3MM FROM PACKAGE EDGE
FOR VCCA_BCLK V19
1-5MM FROM PACKAGE EDGE
FOR VCCAPLL B1/B2/B3
place near VCCDUSB
FOR W22/W23
1-3MM FROM PACKAGE
FOR VCCPRIM AY8/BB7
1-3MM FROM PACKAGE
FOR PGPPHK AC35/AC36
1-3MM FROM PACKAGE
FOR PGPPEF AE35/AE37
reserve filter follow CRB
8/21
change to 10k
3.3V
1.8V
*
Place Near UH1 VCCPRIM_1_0523~29
reserved for cnvi
near AG19/AG20
20200114
- RH100 Change to R-short
VCCMPHY_SENSE
VSSMPHY_SENSE
+1.8V_PHVLDO
+VCCRTCEXT
+1.05VALW_PCH +1.05V_VCCDSW
+1.05VALW_VCCAMPHYPLL
+1.05VALW_VCCAZPLL
+1.05VALW_XTAL
+1.05VALW_PCH
+1.05VALW_PCH
+1.05VALW_PCH
+RTCVCC
+RTCBATT
+CHGRTC
+3VALW
+3VALW+3VALW
+3VALW_DSW
+1.05VALW
+1.05VALW_PCH_PRIM
+1.05VALW
+1.05VALW_PCH
+1.05VALW_PCH
+1.05VALW_PCH
+3VALW
+1.8VALW_PRIM+1.8VALW
+3VALW_HDA
+RTCBATT
+RTCVCC
+3VALW_DSW
+1.24V_VCCLDOSRAM_IN
+1.24V_PRIM_DPHY
+VCCRTCEXT
+1.24V_PRIM_MAR
+1.24V_PRIM_MAR
+3VALW
+3VALW_HDA
+1.05VALW_PCH
+1.05VALW_PCH
+1.8V_PHVLDO
+1.24V_VCCLDOSRAM_IN +1.24V_PRIM_DPHY
+1.05VALW
+1.05V_VCCDSW
+1.05VALW_VCCAMPHYPLL
+1.05VALW_VCCAZPLL
+1.05VALW_XTAL
+1.05VALW_PCH_PRIM
+1.05VALW_PCH
+3VALW
+1.8VALW_PRIM
+1.8VALW_PRIM
+1.8VALW_PRIM
+1.8VALW_PRIM
+1.8VALW_PRIM +1.8VALW_PRIM
+VCCRTCEXT
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(7/8)Power
Custom
20 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(7/8)Power
Custom
20 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(7/8)Power
Custom
20 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
C
H
4
6
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
H
2
3
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
H
4
3
1
P
_
0
4
0
2
_
5
0
V
8
@
1
2
C
H
3
4
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
C
H
3
6
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
@
1
2
C
H
2
4
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RH94 0_0603_5%@
1 2
C
H
4
0
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
8 OF 13
CNP-H
Rev1.0
UH1H
CNP-H_BGA874
@
VCCPRIM_1P051
AA22
VCCPRIM_1P052
AA23
VCCPRIM_1P053
AB20
VCCPRIM_1P054
AB22
VCCPRIM_1P055
AB23
VCCPRIM_1P056
AB27
VCCPRIM_1P057
AB28
VCCPRIM_1P058
AB30
VCCPRIM_1P059
AD20
VCCPRIM_1P0510
AD23
VCCPRIM_1P0511
AD27
VCCPRIM_1P0512
AD28
VCCPRIM_1P0513
AD30
VCCPRIM_1P0514
AD31
VCCPRIM_1P0515
AE17
VCCPRIM_1P0516
AF23
VCCDUSB_1P051
W22
VCCDUSB_1P052
W23
VCCDSW_1P051
BG45
VCCDSW_1P052
BG46
VCCAMPHYPLL_1P051
C49
VCCAMPHYPLL_1P052
D49
VCCAMPHYPLL_1P053
E49
VCCA_XTAL_1P051
P2
VCCA_XTAL_1P052
P3
VCCA_SRC_1P051
W19
VCCA_SRC_1P052
W20
VCCPGPPHK1
AC35
VCCPGPPHK2
AC36
VCCPGPPEF1
AE35
VCCPGPPEF2
AE36
VCCPGPPD
AN24
VCCPGPPBC1
AN26
VCCPGPPBC2
AP26
VCCPGPPA
AN32
VCCPRIM_1P81
AF19
VCCPRIM_1P82
AF20
VCCPRIM_1P83
AG19
VCCPRIM_1P84
AG20
VCCPRIM_1P85
AN15
VCCDPHY_1P241
AJ22
VCCDPHY_1P242
AJ23
VCCDPHY_1P243
BG5
VCCMPHY_SENSE
K47
VSSMPHY_SENSE
K46
VCCAPLL_1P055
C2
VCCDSW_3P32
BE49
VCCHDA
BB14
VCCAPLL_1P054
C1
VCCDSW_3P31
BE48
VCCAPLL_1P053
B3
VCCAPLL_1P052
B2
VCCPRIM_MPHY_1P05
W31
VCCAPLL_1P051
B1
VCCPRIM_1P0519
AF31
VCCPRIM_1P0529
V31
VCCPRIM_1P0518
AF30
VCCPRIM_1P0528
V30
VCCPRIM_1P0517
AF27
VCCPRIM_1P0527
V28
VCCPRIM_1P87
BB11
VCCSPI
AN44
VCCPRIM_1P0526
V27
VCCPRIM_1P86
AR15
VCCPRIM_1P0525
V25
VCCPRIM_1P0524
U29
VCCPRIM_1P0523
U26
VCCRTC2
BD49
VCCPRIM_3P35
V23
VCCRTC1
BC49
VCCPRIM_1P0522
E1
VCCPRIM_3P34
BB7
VCCPGPPG_3P3
AN21
VCCPRIM_1P0521
D1
DCPRTC2
BG47
VCCPRIM_3P33
AY8
VCCPRIM_1P0520
AG31
DCPRTC1
BF47
VCCPRIM_3P32
AW9
VCCA_BCLK_1P05
V19
VCCPRIM_3P31
AT44
VCCPRIM_1P242
AK23
VCCPRIM_1P241
AK22
RH101 0_0402_5%@
12
C
H
5
4
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
C
H
2
7
4
.
7
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
H
4
9
2
2
U
_
0
6
0
3
_
6
.
3
V
6
M
1
2
C
H
3
8
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RH104 1K_0402_5%
12
TH28@
C
H
3
1
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
H
3
3
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
RH105 0_0402_5%@
1 2
C
H
2
6
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
H
3
2
4
.
7
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
JPH1
JUMP_43X79
@
112
2
C
H
5
3
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
@
1
2
RH100 0_0603_5%@
1 2
TH27@
C
H
5
2
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
JRTC1
ACES_50271-0020N-001
CONN@
1
1
2
2
GND
3
GND
4
BAV70W_SOT323-3
DH2
2
3
1
RH96 0_0402_5%@
1 2
C
H
4
2
1
P
_
0
4
0
2
_
5
0
V
8
@
1
2
C
H
3
7
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
H
4
7
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
RH103 0_0402_5%@
1 2
C
H
3
9
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
@
1
2
C
H
3
0
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RH99 0_0402_5%@
1 2
C
H
2
9
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
C
H
2
8
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
H
4
8
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RH102 0_0402_5%@
1 2
C
H
4
5
2
2
U
_
0
6
0
3
_
6
.
3
V
6
M
1
2
C
H
4
4
1
P
_
0
4
0
2
_
5
0
V
8
@
1
2
RH95 0_0402_5%@
1 2
C
H
4
1
1
P
_
0
4
0
2
_
5
0
V
8
@
1
2
C
H
3
5
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
H
2
5
2
2
U
_
0
6
0
3
_
6
.
3
V
6
M
1
2
www.laptoprepairsecrets.com
Page 21
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CPU_TRIGOUT _R
PCH_TRIGOUT PCH_TRIGOUT_ R
CPU_XDP_ TRST#
XDP_PREQ #
XDP_PRDY #
CPU_TRIGOU T_R <13>
PCH_TRIGOU T_R <13>
XDP_PRDY# <10>
CPU_XDP_TR ST# <10>
XDP_PREQ # <10>
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(8/8)GND/RSVD
Custom
21 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(8/8)GND/RSVD
Custom
21 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PCH(8/8)GND/RSVD
Custom
21 11 2Tuesday, F ebruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RH106 30_0402 _5%
1 2
10 OF 13
CNP-H
Rev1.0
UH1J
CNP-H_BGA87 4
@
TRIGGER_OUT
AK3
TRIGGER_IN
AK2
CPU_TRST#
AM4
PREQ#
AL2
RSVD8
Y15
RSVD7
Y14
RSVD6
U37
RSVD5
U35
RSVD4
R32
RSVD3
N32
PRDY#
AM5
RSVD2
AH15
RSVD1
AH14
9 OF 13
CNP-H
Rev1.0
UH1I
CNP-H_BGA87 4
@
VSS
BF2
VSS
BC19
VSS
BA12
VSS
AT34
VSS
AP46
VSS
AA31
VSS
BF3
VSS
BC24
VSS
BA14
VSS
AT45
VSS
AR12
VSS
AL38
VSS
BF48
VSS
BC26
VSS
BA44
VSS
AV11
VSS
AR16
VSS
AM1
VSS
AK31
VSS
BF49
VSS
BC31
VSS
BA5
VSS
AV39
VSS
AR34
VSS
AM18
VSS
AK4
VSS
AJ27
VSS
BC35
VSS
BA6
VSS
AW10
VSS
AR38
VSS
AM32
VSS
AK46
VSS
AJ28
VSS
AG28
VSS
BB41
VSS
AW4
VSS
AT1
VSS
AM49
VSS
AL12
VSS
AJ30
VSS
AG30
VSS
AE4
VSS
AW40
VSS
AT16
VSS
AN12
VSS
AL17
VSS
AJ31
VSS
AG49
VSS
AE46
VSS
AC46
VSS
A2
VSS
AT18
VSS
AN16
VSS
AL21
VSS
AK19
VSS
AH12
VSS
AF22
VSS
AD1
VSS
AA49
VSS
A28
VSS
AT21
VSS
AN34
VSS
AL24
VSS
AK20
VSS
AH17
VSS
AF25
VSS
AD19
VSS
AA5
VSS
A48
VSS
A3
VSS
AT24
VSS
AN38
VSS
AL26
VSS
AK25
VSS
AH33
VSS
AF28
VSS
AD2
VSS
AB19
VSS
A5
VSS
A33
VSS
BG17
VSS
AP4
VSS
AL29
VSS
AK27
VSS
AH38
VSS
AG1
VSS
AD22
VSS
AB25
VSS
A8
VSS
A37
VSS
BG2
VSS
BC40
VSS
AL33
VSS
AK28
VSS
AJ19
VSS
AG22
VSS
AD25
VSS
AB31
VSS
AA19
VSS
A4
VSS
BG22
VSS
BC45
VSS
BB43
VSS
AK30
VSS
AJ20
VSS
AG23
VSS
AD49
VSS
AC12
VSS
AA20
VSS
A45
VSS
BG25
VSS
BC8
VSS
BB9
VSS
AW46
VSS
AJ25
VSS
AG25
VSS
AE12
VSS
AC17
VSS
AA25
VSS
A46
VSS
BG28
VSS
BD43
VSS
BC10
VSS
B47
VSS
AT26
VSS
AG27
VSS
AE33
VSS
AC33
VSS
AA27
VSS
A47
VSS
BE44
VSS
BC13
VSS
B48
VSS
AT29
VSS
AE38
VSS
AC38
VSS
AA28
VSS
BF1
VSS
BC15
VSS
B49
VSS
AT32
VSS
AC4
VSS
AA30
12 OF 13
CNP-H
Rev1.0
UH1L
CNP-H_BGA8 74
@
VSS
Y9
VSS
V4
VSS
T5
VSS
R26
VSS
N16
VSS
E26
VSS
D17
VSS
BG37
VSS
V46
VSS
T7
VSS
R29
VSS
N34
VSS
D30
VSS
BG4
VSS
W25
VSS
U12
VSS
R3
VSS
N35
VSS
BG48
VSS
W27
VSS
U15
VSS
R34
VSS
N37
VSS
W28
VSS
U17
VSS
R38
VSS
N38
VSS
U21
VSS
R4
VSS
P26
VSS
J9
VSS
T17
VSS
P29
VSS
K11
VSS
G6
VSS
P4
VSS
K39
VSS
H8
VSS
E31
VSS
M16
VSS
J10
VSS
E33
VSS
D33
VSS
M18
VSS
J26
VSS
E35
VSS
D8
VSS
C12
VSS
J29
VSS
E40
VSS
E10
VSS
C25
VSS
M21
VSS
W30
VSS
J4
VSS
E42
VSS
E13
VSS
C30
VSS
M24
VSS
Y10
VSS
U24
VSS
M32
VSS
J40
VSS
E8
VSS
E15
VSS
C4
VSS
Y12
VSS
U33
VSS
T18
VSS
M34
VSS
J46
VSS
F41
VSS
E17
VSS
C48
VSS
Y17
VSS
U38
VSS
T32
VSS
P46
VSS
M49
VSS
J47
VSS
F43
VSS
E19
VSS
C5
VSS
Y33
VSS
V20
VSS
T4
VSS
R12
VSS
M5
VSS
J48
VSS
F47
VSS
E22
VSS
D12
VSS
BG3
VSS
Y38
VSS
V22
VSS
T49
VSS
R16
VSS
N12
VSS
G44
VSS
E24
VSS
D16
VSS
BG33
www.laptoprepairsecrets.com
Page 22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Layout Note:
PLACE THE CAP near JDIMM1. 164
10uF*6
1uF*8
330uF*1
DIMM Side
SPD ADDRESS FOR CHANNEL A :
WRITE ADDRESS: 0XA0
READ ADDRESS: 0XA1
SA0 = 0; SA1 = 0; SA2 = 0.
DDR4 POR OPERATING SPEED: 1867 MT/S
STRETCH GOAL IS 2133 MT/S
Layout Note:
Place near JDIMM1
Layout Note:
Place near JDIMM1.257,259
Layout Note:
Place near JDIMM1.258
CPU Side
CHANNEL-A ( Interleaved Memory )
> BOT : Reverse type (4mm)
> Non-ECC SO-DIMM
10uF*2
1uF*2
10uF*2
1uF*1
2.2uF*1
0.1uF*1
For ECC DIMM
PLACE NEAR TO PIN
PLACE NEAR TO SODIMM
VREF traces should be at least 20 mils
wide with 20 mils spacing to other
signals
Part Number: SP07001CY00
Part Value: S SOCKET LOTES ADDR0206-P001A 260P DDR4
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK1
DDR_A_CLK#1
DDR_A_CKE0
DDR_A_CKE1
DDR_A_CS#0
DDR_A_CS#1
DDR_A_ODT0
DDR_A_ODT1
DDR_A_BG1
DDR_A_BG0
DDR_A_BA1
DDR_A_BA0
DDR_A_MA1
DDR_A_MA0
DDR_A_MA3
DDR_A_MA2
DDR_A_MA5
DDR_A_MA4
DDR_A_MA7
DDR_A_MA6
DDR_A_MA9
DDR_A_MA8
DDR_A_MA10
DDR_A_MA12
DDR_A_MA11
DDR_A_MA13
DDR_A_MA14_WE#
DDR_A_MA15_CAS#
DDR_A_MA16_RAS#
DDR_A_ACT#
DDR_A_ALERT#
DDR_A_PAR
DIMM1_CHA_EVENT#
DDR_DRAMRST#_R
DDR_DRAMRST#_R
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D15
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D7
DDR_A_D14
DDR_A_D13
DDR_A_D12
DDR_A_D46
DDR_A_D17
DDR_A_D16
DDR_A_D19
DDR_A_D18
DDR_A_D47
DDR_A_D48
DDR_A_D24
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_D49
DDR_A_D10
DDR_A_D11
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D20
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D21
DDR_A_D61
DDR_A_D22
DDR_A_D62
DDR_A_D63
DDR_A_D23
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_CLK0<7>
DDR_A_CLK#0<7>
DDR_A_CLK1<7>
DDR_A_CLK#1<7>
DDR_A_CKE0<7>
DDR_A_CKE1<7>
DDR_A_CS#0<7>
DDR_A_CS#1<7>
DDR_A_ODT0<7>
DDR_A_ODT1<7>
DDR_A_D[48..63]<7>
DDR_A_D[0..15]<7>
DDR_A_D[16..31]<7>
DDR_A_D[32..47]<7>
DDR_A_BG0<7>
DDR_A_BG1<7>
DDR_A_BA0<7>
DDR_A_BA1<7>
DDR_A_MA0<7>
DDR_A_MA1<7>
DDR_A_MA2<7>
DDR_A_MA3<7>
DDR_A_MA4<7>
DDR_A_MA5<7>
DDR_A_MA6<7>
DDR_A_MA7<7>
DDR_A_MA8<7>
DDR_A_MA9<7>
DDR_A_MA10<7>
DDR_A_MA11<7>
DDR_A_MA12<7>
DDR_A_MA13<7>
DDR_A_MA14_WE#<7>
DDR_A_MA15_CAS#<7>
DDR_A_MA16_RAS#<7>
DDR_A_ACT#<7>
DDR_A_PAR<7>
DDR_A_ALERT#<7>
DDR_A_DQS0 <7>
DDR_A_DQS#0 <7>
DDR_A_DQS1 <7>
DDR_A_DQS#1 <7>
DDR_A_DQS2 <7>
DDR_A_DQS#2 <7>
DDR_A_DQS3 <7>
DDR_A_DQS#3 <7>
DDR_A_DQS4 <7>
DDR_A_DQS#4 <7>
DDR_A_DQS5 <7>
DDR_A_DQS#5 <7>
DDR_A_DQS6 <7>
DDR_A_DQS#6 <7>
DDR_A_DQS7 <7>
DDR_A_DQS#7 <7>
DDR_DRAMRST#_R<18,24>
D_CK_SCLK<18,24>
D_CK_SDATA<18,24>
+0.6V_DDR_VREFCA
+1.2V_VDDQ+1.2V_VDDQ
+1.2V_VDDQ
+1.2V_VDDQ
+0.6V_DDR_VREFCA
+2.5V +0.6VS_VTT
+0.6V_VREFCA
+0.6V_DDR_VREFCA
+1.2V_VDDQ
+0.6VS_VTT
+2.5V
+3VS
+1.2V_VDDQ
+1.2V_VDDQ
+1.2V_VDDQ
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
23 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
DDRIV_CHA: DIMM0
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
23 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
DDRIV_CHA: DIMM0
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
23 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
DDRIV_CHA: DIMM0
C
D
2
3
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
@
1
2
C
D
3
1
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
4
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
REVERSE
JDIMM1B
LOTES_ADDR0206-P001A
CONN@
VDD1
111
VDD2
112
VDD3
117
VDD4
118
VDD5
123
VDD6
124
VDD7
129
VDD8
130
VDD9
135
VDD10
136
VDDSPD
255
VREFCA
164
VSS
1
VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
GND
262
VDD11
141
VDD12
142
VDD13
147
VDD14
148
VDD15
153
VDD16
154
VDD17
159
VDD18
160
VDD19
163
VTT
258
VPP1
257
VPP2
259
VSS
99
VSS
102
VSS
103
VSS
106
VSS
107
VSS
167
VSS
168
VSS
171
VSS
172
VSS
175
VSS
176
VSS
180
VSS
181
VSS
184
VSS
185
VSS
188
VSS
189
VSS
192
VSS
193
VSS
196
VSS
197
VSS
201
VSS
202
VSS
205
VSS
206
VSS
209
VSS
210
VSS
213
VSS
214
VSS
217
VSS
218
VSS
222
VSS
223
VSS
226
VSS
227
VSS
230
VSS
231
VSS
234
VSS
235
VSS
238
VSS
239
VSS
243
VSS
244
VSS
247
VSS
248
VSS
251
VSS
252
GND
261
C
D
3
0
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
CD15
0.022U_0402_16V7K
1
2
C
D
7
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
RD8
1K_0402_1%
1 2
RD10
1K_0402_1%
1 2
C
D
1
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
C
D
2
5
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
2
9
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
2
6
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
9
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
CD10
33P_0201_50V8J
ESD@
1
2
CD14
0.1U_0201_10V6K
1
2
RD9
2_0402_1%
1 2
RD11
24.9_0402_1%
1 2
C
D
1
9
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
+
CD32
330U_D2_2V_Y
1
2
C
D
2
1
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
CD12
2.2U_0402_6.3V6M
1
2
C
D
2
2
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
@
1
2
C
D
3
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
2
0
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
8
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
2
2
.
2
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
6
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
1
8
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
RD7 240_0402_1%
12
C
D
2
7
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
CD11
0.1U_0201_10V6K
1
2
C
D
2
4
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
1
7
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
CD13
0.1U_0201_10V6K
@
1
2
REVERSE
JDIMM1A
LOTES_ADDR0206-P001A
CONN@
ACT#
114
ALERT#
116
BA0
150
BA1
145
BG0
115
BG1
113
CB0_NC
92
CB1_NC
91
CB2_NC
101
CB3_NC
105
CB4_NC
88
CB5_NC
87
CB6_NC
100
CB7_NC
104
CK0#(C)
139
CK0(T)
137
CK1#(C)
140
CK1(T)
138
CKE0
109
CKE1
110
DM0#/DBI0#
12
DM1#/DBI1#
33
DM2#/DBI2#
54
DM3#/DBI3#
75
DM4#/DBI4#
178
DM5#/DBI5#
199
DM6#/DBI6#
220
DM7#/DBI7#
241
DM8#/DBI8#
96
DQS8#(C)
95
DQS8(T)
97
ODT0
155
ODT1
161
PARITY
143
S0#
149
S1#
157
S3#/C1
165
SCL
253
A0
144
A1
133
A10_AP
146
A11
120
A12
119
A13
158
A14_WE#
151
A15_CAS#
156
A16_RAS#
152
A2
132
A3
131
A4
128
A5
126
A6
127
A7
122
A8
125
A9
121
DQ0
8
DQ1
7
DQ10
41
DQ11
42
DQ12
24
DQ13
25
DQ14
38
DQ15
37
DQ16
50
DQ17
49
DQ18
62
DQ19
63
DQ2
20
DQ20
46
DQ21
45
DQ22
58
DQ23
59
DQ24
70
DQ25
71
DQ26
83
DQ27
84
DQ28
66
DQ29
67
DQ3
21
DQ30
79
DQ31
80
DQ32
174
DQ33
173
DQ34
187
DQ35
186
DQ36
170
DQ37
169
DQ38
183
DQ39
182
DQ4
4
DQ40
195
DQ41
194
DQ42
207
DQ43
208
DQ44
191
DQ45
190
DQ46
203
DQ47
204
DQ48
216
DQ49
215
DQ5
3
DQ50
228
DQ51
229
DQ52
211
DQ53
212
DQ54
224
DQ55
225
DQ56
237
DQ57
236
DQ58
249
DQ59
250
DQ6
16
DQ60
232
DQ61
233
DQ62
245
DQ63
246
DQ7
17
DQ8
28
DQ9
29
DQS0#(C)
11
DQS0(T)
13
DQS1#(C)
32
DQS1(T)
34
DQS2#(C)
53
DQS2(T)
55
DQS3#(C)
74
DQS3(T)
76
DQS4#(C)
177
DQS4(T)
179
DQS5#(C)
198
DQS5(T)
200
DQS6#(C)
219
DQS6(T)
221
DQS7#(C)
240
DQS7(T)
242
EVENT#
134
RESET#
108
S2#/C0
162
SA0
256
SA1
260
SA2
166
SDA
254
C
D
1
6
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
5
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
2
8
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
www.laptoprepairsecrets.com
Page 23
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPD ADDRESS FOR CHANNEL B :
WRITE ADDRESS: 0XA4
READ ADDRESS: 0XA3
SA0 = 0; SA1 = 1; SA2 = 0.
DDR4 POR OPERATING SPEED: 1867 MT/S
STRETCH GOAL IS 2133 MT/S
10uF*6
1uF*8
330uF*1
Layout Note:
Place near JDIMM3
Layout Note:
Place near JDIMM3.257,259
Layout Note:
Place near JDIMM3.258
Layout Note:
PLACE THE CAP WITHIN 200 MILS
FROM THE JDIMM3
CPU Side
DIMM Side
10uF*2
1uF*2
10uF*2
1uF*1
2.2uF*1
0.1uF*1
For ECC DIMM
PLACE NEAR TO PIN
VREF traces should be at least 20 mils
wide with 20 mils spacing to other
signals
Part Number: SP07001HW00
Part Value: S SOCKET LOTES ADDR0205-P001A DDR4 STD
CHANNEL-B ( Interleaved Memory )
> BOT : STD type (4mm)
> Non-ECC SO-DIMM
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK1
DDR_B_CLK#1
DDR_B_CKE0
DDR_B_CKE1
DDR_B_CS#0
DDR_B_CS#1
DDR_B_ODT0
DDR_B_ODT1
DIMM3_CHB_EVENT#
DDR_DRAMRST#_R
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_BG1
DDR_B_BG0
DDR_B_BA1
DDR_B_BA0
DDR_B_MA1
DDR_B_MA0
DDR_B_MA3
DDR_B_MA2
DDR_B_MA5
DDR_B_MA4
DDR_B_MA7
DDR_B_MA6
DDR_B_MA9
DDR_B_MA8
DDR_B_MA10
DDR_B_MA12
DDR_B_MA11
DDR_B_MA13
DDR_B_MA14_WE#
DDR_B_MA15_CAS#
DDR_B_MA16_RAS#
DDR_B_ACT#
DDR_B_ALERT#
DDR_B_PAR
DDR_B_D31
DDR_B_D63
DDR_B_D58
DDR_B_D50
DDR_B_D38
DDR_B_D60
DDR_B_D39
DDR_B_D35
DDR_B_D34
DDR_B_D2
DDR_B_D33
DDR_B_D3
DDR_B_D4
DDR_B_D37
DDR_B_D5
DDR_B_D6
DDR_B_D36
DDR_B_D32
DDR_B_D49
DDR_B_D53
DDR_B_D51
DDR_B_D54
DDR_B_D52
DDR_B_D55
DDR_B_D56
DDR_B_D59
DDR_B_D16
DDR_B_D61
DDR_B_D17
DDR_B_D14
DDR_B_D62
DDR_B_D10
DDR_B_D13
DDR_B_D12
DDR_B_D11
DDR_B_D15
DDR_B_D9
DDR_B_D8
DDR_B_D18
DDR_B_D40
DDR_B_D22
DDR_B_D41
DDR_B_D42
DDR_B_D23
DDR_B_D43
DDR_B_D44
DDR_B_D21
DDR_B_D45
DDR_B_D46
DDR_B_D19
DDR_B_D7
DDR_B_D47
DDR_B_D48
DDR_B_D0
DDR_B_D1
DDR_B_D20
DDR_B_D57
DDR_B_D24
DDR_B_D25
DDR_B_D29
DDR_B_D30
DDR_B_D27
DDR_B_D26
DDR_B_D28
DDR_B_CLK0<8>
DDR_B_CLK#0<8>
DDR_B_CLK1<8>
DDR_B_CLK#1<8>
DDR_B_CKE0<8>
DDR_B_CKE1<8>
DDR_B_CS#0<8>
DDR_B_CS#1<8>
DDR_B_ODT0<8>
DDR_B_ODT1<8>
DDR_B_D[16..31]<8>
DDR_B_D[0..15]<8>
DDR_B_D[48..63]<8>
DDR_B_D[32..47]<8>
DDR_B_DQS0 <8>
DDR_B_DQS#0 <8>
DDR_B_DQS1 <8>
DDR_B_DQS#1 <8>
DDR_B_DQS2 <8>
DDR_B_DQS#2 <8>
DDR_B_DQS3 <8>
DDR_B_DQS#3 <8>
DDR_B_DQS4 <8>
DDR_B_DQS#4 <8>
DDR_B_DQS5 <8>
DDR_B_DQS#5 <8>
DDR_B_DQS6 <8>
DDR_B_DQS#6 <8>
DDR_B_DQS7 <8>
DDR_B_DQS#7 <8>
DDR_B_BG0<8>
DDR_B_BG1<8>
DDR_B_BA0<8>
DDR_B_BA1<8>
DDR_B_MA14_WE#<8>
DDR_B_MA15_CAS#<8>
DDR_B_MA16_RAS#<8>
DDR_B_MA0<8>
DDR_B_MA1<8>
DDR_B_MA2<8>
DDR_B_MA3<8>
DDR_B_MA4<8>
DDR_B_MA5<8>
DDR_B_MA6<8>
DDR_B_MA7<8>
DDR_B_MA8<8>
DDR_B_MA9<8>
DDR_B_MA10<8>
DDR_B_MA11<8>
DDR_B_MA12<8>
DDR_B_MA13<8>
DDR_B_ACT#<8>
DDR_B_PAR<8>
DDR_B_ALERT#<8>
DDR_DRAMRST#_R<18,23>
D_CK_SCLK<18,23>
D_CK_SDATA<18,23>
+0.6V_DDRB_VREFCA
+1.2V_VDDQ
+0.6V_DDRB_VREFCA
+1.2V_VDDQ+1.2V_VDDQ
+0.6VS_VTT+2.5V
+0.6V_B_VREFDQ
+0.6V_DDRB_VREFCA
+1.2V_VDDQ
+0.6VS_VTT
+2.5V
+3VS
+1.2V_VDDQ
+1.2V_VDDQ
+1.2V_VDDQ
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
24 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
DDRIV_CHB: DIMM0
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
24 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
DDRIV_CHB: DIMM0
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
24 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
DDRIV_CHB: DIMM0
C
D
4
8
1
0
U
_
0
4
0
2
_
6
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3
V
6
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1
2
C
D
3
4
2
.
2
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
CD55
0.022U_0402_16V7K
1
2
C
D
4
9
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
3
6
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
3
3
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
C
D
5
0
1
0
U
_
0
4
0
2
_
6
.
3
V
6
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1
2
CD43
2.2U_0402_6.3V6M
1
2
C
D
3
5
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
RD19
1K_0402_1%
1 2
C
D
5
7
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
CD51
0.1U_0201_10V6K
1
2
C
D
3
8
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
4
7
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
RD22
24.9_0402_1%
1 2
C
D
6
0
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
5
2
1
0
U
_
0
4
0
2
_
6
.
3
V
6
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1
2
C
D
4
6
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
CD45
0.1U_0201_10V6K
1
2
C
D
3
9
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
5
8
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
5
3
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
@
1
2
RD20
2_0402_1%
1 2
C
D
6
1
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
RD18
240_0402_1%
12
C
D
4
1
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
5
4
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
@
1
2
C
D
4
0
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
C
D
6
3
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
3
7
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
STD
JDIMM2A
LOTES_ADDR0205-P001A
CONN@
ACT#
114
ALERT#
116
BA0
150
BA1
145
BG0
115
BG1
113
CB0_NC
92
CB1_NC
91
CB2_NC
101
CB3_NC
105
CB4_NC
88
CB5_NC
87
CB6_NC
100
CB7_NC
104
CK0#(C)
139
CK0(T)
137
CK1#(C)
140
CK1(T)
138
CKE0
109
CKE1
110
DM0#/DBI0#
12
DM1#/DBI1#
33
DM2#/DBI2#
54
DM3#/DBI3#
75
DM4#/DBI4#
178
DM5#/DBI5#
199
DM6#/DBI6#
220
DM7#/DBI7#
241
DM8#/DBI8#
96
DQS8#(C)
95
DQS8(T)
97
ODT0
155
ODT1
161
PARITY
143
S0#
149
S1#
157
S3#/C1
165
SCL
253
A0
144
A1
133
A10_AP
146
A11
120
A12
119
A13
158
A14_WE#
151
A15_CAS#
156
A16_RAS#
152
A2
132
A3
131
A4
128
A5
126
A6
127
A7
122
A8
125
A9
121
DQ0
8
DQ1
7
DQ10
41
DQ11
42
DQ12
24
DQ13
25
DQ14
38
DQ15
37
DQ16
50
DQ17
49
DQ18
62
DQ19
63
DQ2
20
DQ20
46
DQ21
45
DQ22
58
DQ23
59
DQ24
70
DQ25
71
DQ26
83
DQ27
84
DQ28
66
DQ29
67
DQ3
21
DQ30
79
DQ31
80
DQ32
174
DQ33
173
DQ34
187
DQ35
186
DQ36
170
DQ37
169
DQ38
183
DQ39
182
DQ4
4
DQ40
195
DQ41
194
DQ42
207
DQ43
208
DQ44
191
DQ45
190
DQ46
203
DQ47
204
DQ48
216
DQ49
215
DQ5
3
DQ50
228
DQ51
229
DQ52
211
DQ53
212
DQ54
224
DQ55
225
DQ56
237
DQ57
236
DQ58
249
DQ59
250
DQ6
16
DQ60
232
DQ61
233
DQ62
245
DQ63
246
DQ7
17
DQ8
28
DQ9
29
DQS0#(C)
11
DQS0(T)
13
DQS1#(C)
32
DQS1(T)
34
DQS2#(C)
53
DQS2(T)
55
DQS3#(C)
74
DQS3(T)
76
DQS4#(C)
177
DQS4(T)
179
DQS5#(C)
198
DQS5(T)
200
DQS6#(C)
219
DQS6(T)
221
DQS7#(C)
240
DQS7(T)
242
EVENT#
134
RESET#
108
S2#/C0
162
SA0
256
SA1
260
SA2
166
SDA
254
GND1
261
GND2
262
STD
JDIMM2B
LOTES_ADDR0205-P001A
CONN@
VDD1
111
VDD2
112
VDD3
117
VDD4
118
VDD5
123
VDD6
124
VDD7
129
VDD8
130
VDD9
135
VDD10
136
VDDSPD
255
VREFCA
164
VSS
1
VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
GND
262
VDD11
141
VDD12
142
VDD13
147
VDD14
148
VDD15
153
VDD16
154
VDD17
159
VDD18
160
VDD19
163
VTT
258
VPP1
257
VPP2
259
VSS
99
VSS
102
VSS
103
VSS
106
VSS
107
VSS
167
VSS
168
VSS
171
VSS
172
VSS
175
VSS
176
VSS
180
VSS
181
VSS
184
VSS
185
VSS
188
VSS
189
VSS
192
VSS
193
VSS
196
VSS
197
VSS
201
VSS
202
VSS
205
VSS
206
VSS
209
VSS
210
VSS
213
VSS
214
VSS
217
VSS
218
VSS
222
VSS
223
VSS
226
VSS
227
VSS
230
VSS
231
VSS
234
VSS
235
VSS
238
VSS
239
VSS
243
VSS
244
VSS
247
VSS
248
VSS
251
VSS
252
GND
261
CD42
0.1U_0201_10V6K
1
2
C
D
5
9
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
RD21
1K_0402_1%
1 2
C
D
5
6
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
C
D
6
2
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
CD44
0.1U_0201_10V6K
@
1
2
www.laptoprepairsecrets.com
Page 24
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Near
GPU
Crystals must have a max ESR of 80 ohm
Near
AD8
Near
AD7
Near
AE8
SM01000JX00
3000ma 33ohm@100mhz DCR 0.04
PU at PCH side
unused pin PH 2K to 1V8AON
No support S0ix
Near
H26
20191016
- DP HPD change to GPIO18 for Port E
RV10 as close as possible to GPU
N18P-G61/G62
20190906
- RV83 change to pop (VGA@)
- CV226 change to unpop
ACIN_BUF
VGA_ALERT#
FRM_LCK#
VRAM_VREF_CTL
1.8VSDGPU_MAIN_EN
NVVDD_PSI
VGA_I2CS_SCL
XTALIN
XTALOUT
VGA_I2CS_SDA
XTALIN
1.8VSDGPU_MAIN_EN
GC6_FB_EN1V8
GPU_EVENT#_1
SYS_PEX_RST_MON#
XTAL_OUTBUFF
XTAL_SSIN
XTALOUT_R
XTALOUT
GPU_PEX_RST_HOLD#
ALL_GPWRGD
PLTRST_VGA#_1V8
HDMI_HPD_GPU#
HDMI_HPD_GPU#
VGA_CLKREQ#_R
VGA_I2CS_SCL
VGA_I2CS_SDA
VRAM_VREF_CTL
GC6_FB_EN1V8
VGA_OVERT#
VGA_ALERT#
ACIN_BUF
FRM_LCK#
GPU_EVENT#_1
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
FBVDDQ_PSI
VGA_I2CC_SCL
VGA_I2CC_SDA
VGA_I2CC_SCL
VGA_I2CC_SDA
VGA_I2CS_SCL
VGA_I2CS_SDA
VGA_I2CC_SCL
VGA_I2CC_SDA
TS_AVDD
VGA_CLKREQ#_R
PLTRST_VGA#_1V8
PEX_TREMP
GPIO22_OC_WARN#
GPU_PEX_RST_HOLD#
NVVDD_PSI
DP0_HPD_PCH
GPU_DP0_HPD#
PLTRST_VGA#_1V8
PLTRST_VGA#_1V8
1.8VSDGPU_MAIN_EN
GC6_FB_EN1V8
VGA_OVERT#
PLTRST_VGA#_1V8
ALL_GPWRGD
VGA_OVERT#
1.8VSDGPU_MAIN_EN
GPU_DP0_HPD#
PEG_CTX_C_GRX_P0<9>
PEG_CTX_C_GRX_N0<9>
PEG_CTX_C_GRX_N1<9>
PEG_CTX_C_GRX_P1<9>
PEG_CTX_C_GRX_N2<9>
PEG_CTX_C_GRX_P2<9>
PEG_CTX_C_GRX_N3<9>
PEG_CTX_C_GRX_P3<9>
PEG_CTX_C_GRX_N4<9>
PEG_CTX_C_GRX_P4<9>
PEG_CRX_C_GTX_P0<9>
PEG_CRX_C_GTX_N0<9>
PEG_CTX_C_GRX_N5<9>
PEG_CTX_C_GRX_P5<9>
PEG_CTX_C_GRX_N6<9>
PEG_CTX_C_GRX_P6<9>
PEG_CTX_C_GRX_N7<9>
PEG_CTX_C_GRX_P7<9>
PEG_CRX_C_GTX_N1<9>
PEG_CRX_C_GTX_P1<9>
PEG_CRX_C_GTX_P6<9>
PEG_CRX_C_GTX_N6<9>
PEG_CRX_C_GTX_P7<9>
PEG_CRX_C_GTX_N7<9>
PEG_CRX_C_GTX_P5<9>
PEG_CRX_C_GTX_N5<9>
PEG_CRX_C_GTX_P4<9>
PEG_CRX_C_GTX_N4<9>
PEG_CRX_C_GTX_P3<9>
PEG_CRX_C_GTX_N3<9>
PEG_CRX_C_GTX_P2<9>
PEG_CRX_C_GTX_N2<9>
DGPU_AC_DETECT <19,58,85>
PCH_SML1CLK < 18,58,66>
PCH_SML1DATA <1 8,58,66>
PEG_CTX_C_GRX_P8<9>
PEG_CTX_C_GRX_N8<9>
PEG_CTX_C_GRX_N9<9>
PEG_CTX_C_GRX_P9<9>
PEG_CTX_C_GRX_N10<9>
PEG_CTX_C_GRX_P10<9>
PEG_CTX_C_GRX_N11<9>
PEG_CTX_C_GRX_P11<9>
PEG_CTX_C_GRX_N12<9>
PEG_CTX_C_GRX_P12<9>
PEG_CTX_C_GRX_N13<9>
PEG_CTX_C_GRX_P13<9>
PEG_CTX_C_GRX_N14<9>
PEG_CTX_C_GRX_P14<9>
PEG_CTX_C_GRX_N15<9>
PEG_CTX_C_GRX_P15<9>
PEG_CRX_C_GTX_P8<9>
PEG_CRX_C_GTX_N8<9>
PEG_CRX_C_GTX_N9<9>
PEG_CRX_C_GTX_P9<9>
PEG_CRX_C_GTX_P14<9>
PEG_CRX_C_GTX_N14<9>
PEG_CRX_C_GTX_P15<9>
PEG_CRX_C_GTX_N15<9>
PEG_CRX_C_GTX_P13<9>
PEG_CRX_C_GTX_N13<9>
PEG_CRX_C_GTX_P12<9>
PEG_CRX_C_GTX_N12<9>
PEG_CRX_C_GTX_P11<9>
PEG_CRX_C_GTX_N11<9>
PEG_CRX_C_GTX_P10<9>
PEG_CRX_C_GTX_N10<9>
NVVDD_PSI <96>
GPU_EVENT# <19>
VRAM_VDD_CTL <100>
HDMI_HPD_PCH<16,40>
NVVDD_VID <96>
VGA_CLKREQ# <15>
VGA_I2CC_SCL_PWR <96>
VGA_I2CC_SDA_PWR <96>
ADC_IN_P <36>
ADC_IN_N <36>
CLK_PEG_VGA<15>
CLK_PEG_VGA#<15>
GPIO22_OC_WARN# < 36>
GPIO26_FP_FUSE <37>
FBVDDQ_PSI <100>
DP0_HPD_PCH<16,39>
DGPU_PWR_EN<19>
PG_1VSDGPU<102>
GC6_FB_EN3V3<19>
1.35VSDGPU_PG<100>
VGA_OVERT#<29>
DGPU_HOLD_RST#<19>
PLT_RST#<16,58,66>
1.8VSDGPU_MAIN_EN3V3 <37>
1VSDGPU_EN <37,102>
1.35VSDGPU_EN <37,100>
3VSDGPU_EN <37,39>
GPU_OVERT# <58>
1V8_AON_EN <37>
NVVDD1_EN <37,96>
+1.8VSDGPU_AON
+1.8VSDGPU_MAIN
+GPU_PLLVDD
+1.8VSDGPU_AON
+1.8VSDGPU_AON +1.8VSDGPU_AON
+1.8VSDGPU_MAIN+1.8VSDGPU_MAIN
+1.8VSDGPU_AON
+1.8VSDGPU_AON
+1.8VSDGPU_AON
+1.8VSDGPU_AON
+1.8VSDGPU_AON
+1.8VSDGPU_AON
+3VS
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(1/11)-G61/G62 PEG
Custom
27 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(1/11)-G61/G62 PEG
Custom
27 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(1/11)-G61/G62 PEG
Custom
27 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
QG5
LBSS139WT1G_SC70-3
DP@
Gate
2
Source
3
Drain
1
CV5420.1U_0201_10V6K
@
12
UV1
S IC N18P-G61-MP2-A1 BGA 960P GPU
VGAG61@
SA0000CZO50
CV42
4
.
7
U
_
0
4
0
2
_
6
.
3
V
6
M
VGA@
1
2
RV80
470_0402_1%
VGA@
12
RG180
10K_0201_5%
VGA@
12
RV100 10K_0201_5%VGA@
1 2
CG341
0.1U_0201_10V6K
DP@
12
CV1
18P_0402_50V8J
VGA@
1
2
G
S
D
QV13B
PJT138KA 2N SOT363-6
N18P@
61
2
S
G
D
QV5A
PJT138KA 2N SOT363-6
VGA@
5
34
UV1
S IC N18P-G62-A1 BGA 960P GPU
VGAG62@
SA0000CZP30
RV3 1.8K_0402 _1%VGA@
1 2
RV83
10K_0201_5%
VGA@
1 2
RV9 100K_0201_5%VGA@
1 2
RV396 100K_0201_5%N18P@
12
XV1
27MHZ_10PF_XRCGB27M000F2P18R0
VGA@
NC
2
3
3
1
1
NC
4
CG340
0.1U_0201_10V6K
VGA@
12
UG28
NL17SZ08DFT2G_SC70-5
VGA@
IN B
1
IN A
2
OUT Y
4
VCC
5
GND
3
RV335 10K_0201_5%N18P@
12
SGD
QV13A
PJT138KA 2N SOT363-6
N18P@
5
34
RV5 2K_0402 _5%VGA@
1 2
RV11 10K_0201_5%VGA@
1 2
RV82 10K_0201_5%N17P@
12
RG2840
10K_0402_5%
DP@
12
CV226
0.1U_0201_10V6K
@
1
2
RV4 10K_020 1_5%VGA@
12
RV10
2.49K_0402_1%
VGA@
1 2
RV332 10K_0201_5%N17P@
12
C
V
6
1
U
_
0
2
0
1
_
6
.
3
V
6
M
V
G
A
@
1
2
RV398 10K_0201_5%@
12
C
V
5
1
U
_
0
2
0
1
_
6
.
3
V
6
M
V
G
A
@
1
2
G
S
D
QV5B
PJT138KA 2N SOT363-6
VGA@
61
2
RV329 10K_0201_5%VGA@
12
C
V
3
1
U
_
0
2
0
1
_
6
.
3
V
6
M
V
G
A
@
1
2
CV377 1U_0201_6.3V6M
N18P@
1 2
RV2 1. 8K_0402_1%VGA@
1 2
RV85 2K_0402_5%VGA@
1 2
RV386 10K_0201_5%N18P@
12
DV2
RB751S40T1G_SOD523-2
VGA@
12
SLG4U43589VTR_STQFN20_3X2
UV51
VGA@
SA0000DH100
GND
11
DGPU_HOLD_RST#
9
FB_VDD_PG
7
PLT_RST#
10
GC6_FB_EN_GPU
4
OVERT#
14
FB_VDD_EN
17
PEX_VDD_PG
5
ALL_GPU_PWR_OK
15
GC6_FB_EN
6
OVERT#_GPU
8
VDD
1
NVVDD_EN
12
DGPU_PWR_EN
3
1V8_MAIN_EN_GPU
2
3V3_SYS_EN
16
1V8_AON_EN
13
PEX_VDD_EN
18
PEGX_RST#
19
1V8_MAIN_EN
20
UG29
NL17SZ08DFT2G_SC70-5
DP@
IN B
1
IN A
2
OUT Y
4
VCC
5
GND
3
LV1
TAI-TECH HCB1608KF-330T30
VGA@
SM01000JX00
1 2
RV333 100K_0201_5%VGA@
12
DV8
RB751S40T1G_SOD523-2
VGA@
12
G
S
D
QV2B
PJT138KA 2N SOT363-6
VGA@
61
2
CV2000.1U_0201_10V6K
@
12
RV385 0_0402_5%N18P@
1 2
RV330 10K_0201_5%VGA@
12
CV5430.1U_0201_10V6K
@
12
RV7 10K_0201_5%VGA@
1 2
RV331 10K_0201_5%VGA@
12
CV4
2
2
U
_
0
6
0
3
_
6
.
3
V
6
M
VGA@
1
2
PCI EXPRESS
CLK
Part 1 of 7
RESI2C
GPIO
OVR-M
Thermal Sensor
UV1A
N18P-G0_FCBGA960~D
@
PEX_RX0
AN12
PEX_RX0_N
AM12
PEX_RX1
AN14
PEX_RX1_N
AM14
PEX_RX2
AP14
PEX_RX2_N
AP15
PEX_RX3
AN15
PEX_RX3_N
AM15
PEX_RX4
AN17
PEX_RX4_N
AM17
PEX_RX5
AP17
PEX_RX5_N
AP18
PEX_RX6
AN18
PEX_RX6_N
AM18
PEX_RX7
AN20
PEX_RX7_N
AM20
PEX_RX8
AP20
PEX_RX8_N
AP21
PEX_RX9
AN21
PEX_RX9_N
AM21
PEX_RX10
AN23
PEX_RX10_N
AM23
PEX_RX11
AP23
PEX_RX11_N
AP24
PEX_RX12
AN24
PEX_RX12_N
AM24
PEX_RX13
AN26
PEX_RX13_N
AM26
PEX_RX14
AP26
PEX_RX14_N
AP27
PEX_RX15
AN27
PEX_RX15_N
AM27
PEX_TX0
AK14
PEX_TX0_N
AJ14
PEX_TX1
AH14
PEX_TX1_N
AG14
PEX_TX2
AK15
PEX_TX2_N
AJ15
PEX_TX3
AL16
PEX_TX3_N
AK16
PEX_TX4
AK17
PEX_TX4_N
AJ17
PEX_TX5
AH17
PEX_TX5_N
AG17
PEX_TX6
AK18
PEX_TX6_N
AJ18
PEX_TX7
AL19
PEX_TX7_N
AK19
PEX_TX8
AK20
PEX_TX8_N
AJ20
PEX_TX9
AH20
PEX_TX9_N
AG20
PEX_TX10
AK21
PEX_TX10_N
AJ21
PEX_TX11
AL22
PEX_TX11_N
AK22
PEX_TX12
AK23
PEX_TX12_N
AJ23
PEX_TX13
AH23
PEX_TX13_N
AG23
PEX_TX14
AK24
PEX_TX14_N
AJ24
PEX_TX15
AL25
PEX_TX15_N
AK25
PEX_REFCLK
AL13
PEX_REFCLK_N
AK13
PEX_RST_N
AJ12
NC
AJ26
NC
AK26
PEX_TERMP
AP29
PEX_CLKREQ_N
AK12
PEX_WAKE#
AJ11
GPIO0
P6
GPIO1
M3
GPIO2
L6
GPIO3
P5
GPIO4
P7
GPIO5
L7
GPIO6
M7
GPIO7
N8
GPIO8
L3
GPIO9
M2
GPIO10
L1
GPIO11
M5
GPIO12
N3
GPIO13
M4
GPIO14
N4
GPIO15
P2
GPIO16
R8
GPIO17
M6
GPIO18
R1
GPIO19
P3
GPIO20
P4
GPIO21
P1
I2CS_SCL
T4
I2CS_SDA
T3
I2CC_SCL
R2
I2CC_SDA
R3
I2CB_SCL
R7
I2CB_SDA
R6
GPIO25
R4
GPIO26
R5
XSN_PLLVDD
AD8
SP_PLLVDD
AE8
VID_PLLVDD
AD7
EXT_REFCLK_FL
H1
XTAL_IN
H3
XTAL_OUTBUFF
J4
XTAL_OUT
H2
GPIO22
P8
GPIO23
T8
GPIO24
L2
GPIO27
U3
GPCPLL_AVDD
H26
ADC_IN_N
AM9
ADC_IN
AN9
TS_AVDD
AG10
RES
AP8
RES
AL10
RES
AK9
RES
AL9
TS_VREF
AP9
CV5410.1U_0201_10V6K
VGA@
12
RV327 10K_0201_5%VGA@
12
CV2
18P_0402_50V8J
VGA@
1
2
RV328 10K_0201_5%VGA@
12
RV6 2K_0 402_5%VGA@
1 2
RV1 10K_ 0201_5%VGA@
12
RV334 10K_0201_5%VGA@
12
C
V
1
9
5
1
U
_
0
2
0
1
_
6
.
3
V
6
M
V
G
A
@
1
2
CV201
0.1U_0201_10V6K
@
1
2
RV86 2K_0402_5%VGA@
1 2
SGD
QV2A
PJT138KA 2N SOT363-6
VGA@
5
34
www.laptoprepairsecrets.com
Page 25
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
add for GDDR6 add for GDDR6
change for GDDR6
change for GDDR6
Near
U27
Near
K27
Near
H17
CKE
signal
RST
signal
SM01000JX00
3000ma 33ohm@100mhz DCR 0.04
FBA_CMD7
FBA_CMD2
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD33
FBA_CMD18
FBA_DEBUG0
FBA_DEBUG1
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
+FB_PLLAVDD +FB_PLLAVDD
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
FBA_D33
FBA_D28
FBA_D20
FBB_CMD7
FBA_D23
FBA_D30
FBA_D31
FBA_D32
FBA_D21
FBA_D25
FBB_CMD2
FBA_D22
FBA_D26
FBA_D24
FBA_D29
FBA_D2
FBA_D15
FBA_D13
FBA_D27
FBA_D0
FBA_D18
FBB_CMD33
FBA_D9
FBA_D8
FBA_D12
FBA_D1
FBA_D3
FBA_D16
FBB_CMD18
FBA_D11
FBA_D10
FBA_D5
FBA_D7
FBA_D14
FBA_D19
FBA_D6
FBA_D17
FBA_D4
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D45
FBA_D40
FBA_D42
FBA_D43
FBA_D44
FBA_D38
FBA_D41
FBA_D39
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D57
FBA_D52
FBA_D54
FBA_D55
FBA_D56
FBA_D50
FBA_D53
FBA_D51
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7
FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7
FBB_EDC3
FBB_EDC2
FBB_EDC1
FBB_EDC0
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7
FBA_EDC3
FBA_EDC5
FBA_EDC4
FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC7
FBA_EDC6
FBA_CMD32
FBA_CMD33
FB_VREF
FB_VREF
FBB_DEBUG0
FBB_DEBUG1
FBB_CMD32
FBB_CMD33
FBA_D[63..0]<32>
FBA_DBI[7..0]<32>
FBA_EDC[7..0]<32>
FBA_CLKA0 <32>
FBA_CLKA0# <32>
FBA_CLKA1# <32>
FBA_CLKA1 <32>
FBA_WCK01 <32>
FBA_WCK01# <32>
FBA_WCK23# <32>
FBA_WCK23 <32>
FBA_WCK45 <32>
FBA_WCK45# <32>
FBA_WCK67# <32>
FBA_WCK67 <32>
FBA_CMD[33..0] <32> FBB_D[63..0]<33>
FBB_DBI[7..0]<33>
FBB_EDC[7..0]<33>
FBB_CMD[33..0] <33>
FBB_CLKA0 <33>
FBB_CLKA0# <33>
FBB_CLKA1# <33>
FBB_CLKA1 <33>
FBB_WCK01 <33>
FBB_WCK01# <33>
FBB_WCK23# <33>
FBB_WCK23 <33>
FBB_WCK45 <33>
FBB_WCK45# <33>
FBB_WCK67# <33>
FBB_WCK67 <33>
FBA_WCKB01# <32>
FBA_WCKB01 <32>
FBA_WCKB23 <32>
FBA_WCKB23# <32>
FBA_WCKB45# <32>
FBA_WCKB45 <32>
FBA_WCKB67 <32>
FBA_WCKB67# <32>
FBB_WCKB01 <33>
FBB_WCKB01# <33>
FBB_WCKB23# <33>
FBB_WCKB23 <33>
FBB_WCKB45# <33>
FBB_WCKB45 <33>
FBB_WCKB67 <33>
FBB_WCKB67# <33>
+1.35VSDGPU +1.35VSDGPU
+1.8VSDGPU_MAIN
+1.35VSDGPU +1.35VSDGPU
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(2/11)-G61/G62 VRAM
Custom
28 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(2/11)-G61/G62 VRAM
Custom
28 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(2/11)-G61/G62 VRAM
Custom
28 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RV87 10K_0402_5%
VGA@
12
LV3
TAI-TECH HCB1608KF-330T30
VGA@
SM01000JX00
1 2
MEMORY INTERFACE B
Part 3 of 7
UV1C
N18P-G0_FCBGA960~D
@
FBB_D0
G9
FBB_D1
E9
FBB_D2
G8
FBB_D3
F9
FBB_D4
F11
FBB_D5
G11
FBB_D6
F12
FBB_D7
G12
FBB_D8
G6
FBB_D9
F5
FBB_D10
E6
FBB_D11
F6
FBB_D12
F4
FBB_D13
G4
FBB_D14
E2
FBB_D15
F3
FBB_D16
C2
FBB_D17
D4
FBB_D18
D3
FBB_D19
C1
FBB_D20
B3
FBB_D21
C4
FBB_D22
B5
FBB_D23
C5
FBB_D24
A11
FBB_D25
C11
FBB_D26
D11
FBB_D27
B11
FBB_D28
D8
FBB_D29
A8
FBB_D30
C8
FBB_D31
B8
FBB_D32
F24
FBB_D33
G23
FBB_D34
E24
FBB_D35
G24
FBB_D36
D21
FBB_D37
E21
FBB_D38
G21
FBB_D39
F21
FBB_D40
G27
FBB_D41
D27
FBB_D42
G26
FBB_D43
E27
FBB_D44
E29
FBB_D45
F29
FBB_D46
E30
FBB_D47
D30
FBB_D48
A32
FBB_D49
C31
FBB_D50
C32
FBB_D51
B32
FBB_D52
D29
FBB_D53
A29
FBB_D54
C29
FBB_D55
B29
FBB_D56
B21
FBB_D57
C23
FBB_D58
A21
FBB_D59
C21
FBB_D60
B24
FBB_D61
C24
FBB_D62
B26
FBB_D63
C26
FBB_DQM0
E11
FBB_DQM1
E3
FBB_DQM2
A3
FBB_DQM3
C9
FBB_DQM4
F23
FBB_DQM5
F27
FBB_DQM6
C30
FBB_DQM7
A24
FBB_DQS_WP0
D10
FBB_DQS_WP1
D5
FBB_DQS_WP2
C3
FBB_DQS_WP3
B9
FBB_DQS_WP4
E23
FBB_DQS_WP5
E28
FBB_DQS_WP6
B30
FBB_DQS_WP7
A23
RES
D9
RES
E4
RES
B2
RES
A9
RES
D22
RES
D28
RES
A30
RES
B23
FBB_PLL_AVDD
H17
FBB_WCKB01
D6
FBB_WCKB01_N
D7
FBB_WCKB23
C6
FBB_WCKB23_N
B6
FBB_WCKB45
F26
FBB_WCKB45_N
E26
FBB_WCKB67
A26
FBB_WCKB67_N
A27
FBB_WCK01
F8
FBB_WCK01_N
E8
FBB_WCK23
A5
FBB_WCK23_N
A6
FBB_WCK45
D24
FBB_WCK45_N
D25
FBB_WCK67
B27
FBB_WCK67_N
C27
FBB_CLK0
D12
FBB_CLK0_N
E12
FBB_CLK1
E20
FBB_CLK1_N
F20
FBB_CMD0
D13
FBB_CMD1
E14
FBB_CMD2
F14
FBB_CMD3
A12
FBB_CMD4
B12
FBB_CMD5
C14
FBB_CMD6
B14
FBB_CMD7
G15
FBB_CMD8
F15
FBB_CMD9
E15
FBB_CMD10
D15
FBB_CMD11
A14
FBB_CMD12
D14
FBB_CMD13
A15
FBB_CMD14
B15
FBB_CMD15
C17
FBB_CMD16
D18
FBB_CMD17
E18
FBB_CMD18
F18
FBB_CMD19
A20
FBB_CMD20
B20
FBB_CMD21
C18
FBB_CMD22
B18
FBB_CMD23
G18
FBB_CMD24
G17
FBB_CMD25
F17
FBB_CMD26
D16
FBB_CMD27
A18
FBB_CMD28
D17
FBB_CMD29
A17
FBB_CMD30
B17
FBB_CMD31
E17
FBB_CMD32
G14
FBB_CMD33
G20
FBB_CMD34
C12
FBB_CMD35
C20
MEMORY INTERFACE
A
Part 2 of 7
UV1B
N18P-G0_FCBGA960~D
@
FBA_D0
L28
FBA_D1
M29
FBA_D2
L29
FBA_D3
M28
FBA_D4
N31
FBA_D5
P29
FBA_D6
R29
FBA_D7
P28
FBA_D8
J28
FBA_D9
H29
FBA_D10
J29
FBA_D11
H28
FBA_D12
G29
FBA_D13
E31
FBA_D14
E32
FBA_D15
F30
FBA_D16
C34
FBA_D17
D32
FBA_D18
B33
FBA_D19
C33
FBA_D20
F33
FBA_D21
F32
FBA_D22
H33
FBA_D23
H32
FBA_D24
P34
FBA_D25
P32
FBA_D26
P31
FBA_D27
P33
FBA_D28
L31
FBA_D29
L34
FBA_D30
L32
FBA_D31
L33
FBA_D32
AG28
FBA_D33
AF29
FBA_D34
AG29
FBA_D35
AF28
FBA_D36
AD30
FBA_D37
AD29
FBA_D38
AC29
FBA_D39
AD28
FBA_D40
AJ29
FBA_D41
AK29
FBA_D42
AJ30
FBA_D43
AK28
FBA_D44
AM29
FBA_D45
AM31
FBA_D46
AN29
FBA_D47
AM30
FBA_D48
AN31
FBA_D49
AN32
FBA_D50
AP30
FBA_D51
AP32
FBA_D52
AM33
FBA_D53
AL31
FBA_D54
AK33
FBA_D55
AK32
FBA_D56
AD34
FBA_D57
AD32
FBA_D58
AC30
FBA_D59
AD33
FBA_D60
AF31
FBA_D61
AG34
FBA_D62
AG32
FBA_D63
AG33
FBA_CMD3
R34
FBA_CMD8
V28
FBA_CMD2
U29
FBA_CMD21
AA32
FBA_CMD24
Y29
FBA_CMD23
Y28
FBA_CMD26
Y30
FBA_CMD7
U28
FBA_CMD15
Y32
FBA_CMD13
V34
FBA_CMD4
R33
FBA_CMD18
AA28
FBA_CMD29
Y34
FBA_CMD27
AA34
FBA_CMD6
U33
FBA_CMD17
AA29
FBA_CMD19
AC34
FBA_CMD22
AA33
FBA_CMD12
U31
FBA_CMD28
Y31
FBA_CMD10
V30
FBA_CMD25
W31
FBA_CMD9
V29
FBA_CMD1
T31
FBA_CMD11
U34
FBA_CMD0
U30
FBA_CMD5
U32
FBA_DQM0
P30
FBA_DQM1
F31
FBA_DQM2
F34
FBA_DQM3
M32
FBA_DQM4
AD31
FBA_DQM5
AL29
FBA_DQM6
AM32
FBA_DQM7
AF34
RES
M30
RES
H30
RES
E34
RES
M34
RES
AF30
RES
AK31
RES
AM34
RES
AF32
FBA_DQS_WP0
M31
FBA_DQS_WP1
G31
FBA_DQS_WP2
E33
FBA_DQS_WP3
M33
FBA_DQS_WP4
AE31
FBA_DQS_WP5
AK30
FBA_DQS_WP6
AN33
FBA_DQS_WP7
AF33
FBA_CMD16
AA31
FBA_CMD20
AC33
FBA_CMD14
V33
FBA_CMD30
Y33
FBA_CMD31
V31
FBA_CLK0_N
R31
FBA_WCK45_N
AG31
FBA_CLK0
R30
FBA_WCK67
AJ34
FBA_WCK23
H34
FBA_WCK01_N
L30
FBA_WCK01
K31
FBA_WCK67_N
AK34
FBA_WCK23_N
J34
FBA_CLK1_N
AC31
FBA_WCK45
AG30
FBA_CLK1
AB31
FBA_WCKB01
J30
FBA_WCKB01_N
J31
FBA_WCKB23
J32
FBA_WCKB23_N
J33
FBA_WCKB45
AH31
FBA_WCKB45_N
AJ31
FBA_WCKB67
AJ32
FBA_WCKB67_N
AJ33
FBA_PLL_AVDD
U27
FBA_CMD34
R32
FBA_CMD35
AC32
FB_VREF
H31
FB_REFPLL_AVDD
K27
FBA_CMD32
R28
FBA_CMD33
AC28
RG3019 60.4_0201_1%@
12
C
V
1
0
1
U
_
0
2
0
1
_
6
.
3
V
6
M
V
G
A
@
1
2
C
V
3
7
9
4
.
7
U
_
0
4
0
2
_
6
.
3
V
6
M
V
G
A
@
1
2
RG3018 60.4_0201_1%@
12
C
V
3
7
8
3
.
9
P
_
0
4
0
2
_
5
0
V
8
C
N
1
8
P
@
1
2
C
V
7
1
U
_
0
2
0
1
_
6
.
3
V
6
M
V
G
A
@
1
2
RG2931 60.4_0201_1%@
12
RV89 10K_0402_5%
VGA@
12
R
V
3
9
3
4
9
.
9
_
0
4
0
2
_
1
%
N
1
8
P
@
12
C
V
9
1
U
_
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6
.
3
V
6
M
V
G
A
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C
V
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.
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U
_
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_
6
.
3
V
6
M
V
G
A
@
1
2
RV94 10K_0402_5%
VGA@
12
C
V
1
1
2
2
U
_
0
6
0
3
_
6
.
3
V
6
M
V
G
A
@
1
2
RV91 10K_0402_5%
VGA@
12
RV88 10K_0402_5%
VGA@
12
RV90 10K_0402_5%
VGA@
12
RV92 10K_0402_5%
VGA@
12
RV93 10K_0402_5%
VGA@
12
RG2930 60.4_0201_1%@
12
www.laptoprepairsecrets.com
Page 26
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
strap4
MULTI LEVEL
STRAPS
strap3strap2strap1strap0 strap5
HDMI
2.0
X76 BOM
20190921
mDP
1007
- DP Change to Port-E
- Pin NAME no change
1007
- DP Change to Port-E
- Pin NAME no change
X76 BOM
DGPU VBIOS ROM 8Mb
SMB_ATL_ADDR
LOW
High
Single GPU
Dual GPU
DEVID_SEL
LOW
High
Orig. Device ID
Support G-Sync GPUID
VGA_DEVICE
LOW
High
3D Device
VGA Device
PCIE_CFG
LOW
High
Normal signal swing
Reduce the signal amplitude
*
*
*
*
STRAP2
STRAP3
STRAP0
STRAP4
STRAP1
ROM_SI
ROM_SO
ROM_SCLK
STRAP5
VCC_SENSE_NVVDD1
VSS_SENSE_NVVDD1
GPU_BUFRST#
JTAG_TCK_VGA
JTAG_RST
JTAG_TDI
JTAG_TDO
JTAG_TMS
TESTMODE
ROM_CS#
ROM_SCLK
ROM_SO
ROM_SI
STRAP5
STRAP2
STRAP3
STRAP0
STRAP4
STRAP1
DP0_AUXN
DP0_AUXP
ROM_SO
ROM_CS#
ROM_SO_R
ROM_SCLK
ROM_SI_R
ROM_SCLK_R
ROM_SI
ROM_CS_R#
GPU_DP2_P0<40>
GPU_DP2_N0<40>
GPU_DP2_P1<40>
GPU_DP2_N1<40>
GPU_DP2_P2<40>
GPU_DP2_N2<40>
GPU_DP2_N3<40>
GPU_DP2_P3<40>
VCC_SENSE_NVVDD1 <96>
VSS_SENSE_NVVDD1 <96>
VGA_OVERT# <27>
GPU_DP2_CTRL_DAT<40>
GPU_DP2_CTRL_CLK<40>
DP0_AUXP<39>
DP0_AUXN<39>
DP0_TXN0<39>
DP0_TXP0<39>
DP0_TXN1<39>
DP0_TXP1<39>
DP0_TXP2<39>
DP0_TXN2<39>
DP0_TXN3<39>
DP0_TXP3<39>
+1.8VSDGPU_AON
+1.8VSDGPU_MAIN
+1.8VSDGPU_AON
+1.8VSDGPU_AON
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(3/11)-G61/G62 STRAP
Custom
29 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(3/11)-G61/G62 STRAP
Custom
29 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(3/11)-G61/G62 STRAP
Custom
29 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
UV49
W25Q80EWSSIG_SO8
N18P@
SA00009QP00
CS#
1
DO(IO1)
2
WP#(IO2)
3
GND
4
VCC
8
HOLD#(IO3)
7
CLK
6
DI(IO0)
5
RV41
100K_0201_5%
N18P@
1 2
RV28
100K_0201_5%
@
1 2
UV4
S IC D6 256M32 K4Z80325BC-HC14 FBGA 1.2V
X76SAM@
SA0000C6280
RV338
0_0402_5%
@
1 2
RV27
100K_0402_5%
@
1 2
RV79
100K_0402_5%
VGA@
1 2
UV5
S IC D6 256M32 K4Z80325BC-HC14 FBGA 1.2V
X76SAM@
SA0000C6280
RV337
33_0402_5%
N18P@
1 2
RV29
100K_0201_5%
VGA@
1 2
TV5@
UV6
S IC D6 256M32 K4Z80325BC-HC14 FBGA 1.2V
X76SAM@
SA0000C6280
RV340
33_0402_5%
N18P@
1 2
RV32
100K_0402_5%
N17P@
1 2
Part 4 of 7
TMDS
NC
GENERAL
SERIAL
TEST
UV1D
N18P-G0_FCBGA960~D
@
IFPA_L3
AM6
IFPA_L3_N
AN6
IFPA_L2
AP3
IFPA_L2_N
AN3
IFPA_L1
AN5
IFPA_L1_N
AM5
IFPA_L0
AL6
IFPA_L0_N
AK6
IFPA_AUX_SCL
AJ6
IFPA_AUX_SDA_N
AH6
IFPB_L3
AJ9
IFPB_L3_N
AH9
IFPB_L2
AP6
IFPB_L2_N
AP5
IFPB_L1
AM7
IFPB_L1_N
AL7
IFPB_L0
AN8
IFPB_L0_N
AM8
IFPB_AUX_SCL
AK8
IFPB_AUX_SDA_N
AL8
IFPC_L0
AK1
IFPC_L0_N
AJ1
IFPC_L1
AJ3
IFPC_L1_N
AJ2
IFPC_L2
AH3
IFPC_L2_N
AH4
IFPC_L3
AG5
IFPC_L3_N
AG4
IFPD_L0
AM1
IFPD_L0_N
AM2
IFPD_L1
AM3
IFPD_L1_N
AM4
IFPD_L2
AL3
IFPD_L2_N
AL4
IFPD_L3
AK4
IFPD_L3_N
AK5
IFPE_L0
AD2
IFPE_L0_N
AD3
IFPE_L1
AD1
IFPE_L1_N
AC1
IFPE_L2
AC2
IFPE_L2_N
AC3
IFPE_L3
AC4
IFPE_L3_N
AC5
NC
AE3
NC
AE4
NC
AF4
NC
AF5
NC
AD4
NC
AD5
NC
AG1
NC
AF1
IFPC_AUX_SCL
AG3
IFPC_AUX_SDA_N
AG2
IFPD_AUX_SCL
AK3
IFPD_AUX_SDA_N
AK2
IFPE_AUX_SCL
AB3
IFPE_AUX_SDA_N
AB4
NC
AF3
NC
AF2
NC
AC6
NC
AJ28
NC
AJ4
NC
AJ5
NC
AL11
NC
C15
NC
D19
NC
D20
NC
D23
NC
D26
NC
V32
VDD_SENSE
L4
GND_SENSE
L5
NVJTAG_SEL
AK11
JTAG_TCK
AM10
JTAG_TDI
AM11
JTAG_TDO
AP12
JTAG_TMS
AP11
JTAG_TRST_N
AN11
ROM_CS_N
H6
ROM_SCLK
H4
ROM_SI
H5
ROM_SO
H7
BUFRST_N
E1
OVERT
M1
STRAP0
J2
STRAP1
J7
STRAP2
J6
STRAP3
J5
STRAP4
J3
STRAP5
J1
THERMDP
K3
THERMDN
K4
UV4
S IC D6 256M32 K4Z80325BC-HC14 FBGA 1 .2V
X76MIC@
SA0000BND80
RV43 10K_0402_5%VGA@
1 2
RV336
10K_0402_5%
N18P@
12
UV7
S IC D6 256M32 K4Z80325BC-HC14 FBGA 1.2V
X76SAM@
SA0000C6280
RV37
100K_0201_5%
@
1 2
RV26
100K_0402_5%
X76MIC@
1 2
UV5
S IC D6 256M32 K4Z80325BC-HC14 FBGA 1 .2V
X76MIC@
SA0000BND80
RV42 10K_0402_5%VGA@
1 2
UV6
S IC D6 256M32 K4Z80325BC-HC14 FBGA 1 .2V
X76MIC@
SA0000BND80
RG2839
100K_0402_5%
VGA@
12
TV9@
UV7
S IC D6 256M32 K4Z80325BC-HC14 FBGA 1.2V
X76MIC@
SA0000BND80
TV6@
RV36
100K_0201_5%
VGA@
1 2
RV30
100K_0201_5%
@
1 2
RG2838
100K_0402_5%
VGA@
12
RV35
100K_0402_5%
VGA@
1 2
RV39
100K_0402_5%
N18P@
1 2
CV355
0.1U_0201_10V6K
N18P@
1
2
RV33
100K_0201_5%
N17P@
1 2
RV40
10K_0402_5%
N18P@
1 2
RV78
100K_0402_5%
@
1 2
RV34
100K_0402_5%
X76SAM@
1 2
RV339
33_0402_5%
N18P@
1 2
TV7@
RV31
100K_0402_5%
N17P@
1 2
TV8@
RV38
100K_0201_5%
VGA@
1 2
www.laptoprepairsecrets.com
Page 27
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Under
GPU
Under
GPU
Near
GPU
Under
GPU
Near
GPU
Place close to
GPU
CHA
/6*1uF+2*10uF
GPU
/5*22uF+2*10uF
2*22uF+3*10uF+3*4.7uF+6*1uF
CHB
/6*1uF+2*10uF
2*22uF+3*10uF+3*4.7uF+7*1uF
3*4.7uF+5*1uF
Under
GPU
Near
GPU
Under
GPU
Near
GPU
2*4.7uF+1*1uF+2*0.1uF
Near
GPU
Near
GPU
Under GPU 1
per ball
Under GPU
1 per ball
3*4.7uF+9*1uF
near GPU for NV u pdate spec 1210
12mils
reserve
reserve
20191016
- DP change to Port E
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_VDDQ_SENSE
FB_CAL_TERM_GND
FB_GND_SENSE
FB_VDDQ_SENSE<100>
+1.35VSDGPU
+1.35VSDGPU
+1.8VSDGPU_MAIN
+1.0VSDGPU
+1.35VSDGPU
+1.8VSDGPU_MAIN
+1.8VSDGPU_AON
+1.8VSDGPU_MAIN
+1.0VSDGPU
+GPU_PLLVDD
+FP_FUSE_GPU
+1.8VSDGPU_MAIN
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(4/11)-G61/G62 POWER
Custom
30 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(4/11)-G61/G62 POWER
Custom
30 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(4/11)-G61/G62 POWER
Custom
30 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
C
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RV49
40.2_0402_1%
N18P@
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C
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RV394 0_0402_5%N17P@
12
Part 5 of 7
POWER
UV1E
N18P-G0_FCBGA960~D
@
PEX_HVDD_0
AG13
PEX_HVDD_1
AG15
PEX_HVDD_2
AG16
PEX_HVDD_3
AG18
PEX_HVDD_4
AG25
PEX_HVDD_5
AH15
PEX_HVDD_6
AH18
PEX_HVDD_7
AH26
PEX_HVDD_8
AH27
PEX_HVDD_9
AJ27
PEX_HVDD_10
AK27
PEX_HVDD_11
AL27
PEX_HVDD_12
AM28
PEX_HVDD_13
AN28
PEX_DVDD_0
AG19
PEX_DVDD_1
AG21
PEX_DVDD_2
AG22
PEX_DVDD_3
AG24
PEX_DVDD_4
AH21
FP_FUSE_SRC
AG12
1V8_AON
J8
1V8_AON
K8
NC
L8
NC
M8
PEX_PLL_HVDD
AH12
FBVDDQ_0
AA27
FBVDDQ_1
AA30
FBVDDQ_2
AB27
FBVDDQ_3
AB33
FBVDDQ_4
AC27
FBVDDQ_5
AD27
FBVDDQ_6
AE27
FBVDDQ_7
AF27
FBVDDQ_8
AG27
FBVDDQ_9
B13
FBVDDQ
B16
FBVDDQ_11
B19
FBVDDQ_12
E13
FBVDDQ
E16
FBVDDQ_14
E19
FBVDDQ_15
H10
FBVDDQ_16
H11
FBVDDQ_17
H12
FBVDDQ_18
H13
FBVDDQ_19
H14
FBVDDQ
H15
FBVDDQ
H16
FBVDDQ_22
H18
FBVDDQ_23
H19
FBVDDQ_24
H20
FBVDDQ_25
H21
FBVDDQ_26
H22
FBVDDQ_27
H23
FBVDDQ_28
H24
FBVDDQ_29
H8
FBVDDQ_30
H9
FBVDDQ_31
L27
FBVDDQ_32
M27
FBVDDQ_33
N27
FBVDDQ_34
P27
FBVDDQ_35
R27
FBVDDQ_36
T27
FBVDDQ_37
T30
FBVDDQ_38
T33
FBVDDQ
V27
FBVDDQ
W27
FBVDDQ
W30
FBVDDQ
W33
FBVDDQ_43
Y27
PEX_DVDD_5
AH25
NC
AG26
IFP_IOVDD
AG8
IFP_IOVDD
AG9
IFPAB_PLLVDD
AH8
IFPAB_RSET
AJ8
IFP_IOVDD
AF6
IFPCD_PLLVDD
AF7
IFPCD_RSET
AF8
IFP_IOVDD
AG6
NC
AG7
NC
AN2
IFP_IOVDD
AC7
IFPE_PLLVDD
AB8
IFPE_RSET
AD6
IFP_IOVDD
AC8
FBVDDQ_SENSE
F1
PROBE_FB_GND
F2
FB_CAL_PD_VDDQ
J27
FB_CAL_PU_GND
H27
FB_CAL_TERM_GND
H25
RG3020 1K_0402_1%
VGA@
12
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RG2841 1K_0402_1%
VGA@
12
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@
1
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www.laptoprepairsecrets.com
Page 28
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
N17P VDDS
1uF*5/4.7uF*5 (under GPU)
330uF*1/22uF*3/10uF*2/4.7uF*2
NVVDD & NVVDDS merge
confirm NV nc or not
+NVVDD1
+NVVDD1
+NVVDD1
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(5/11)-G61/G62 POWER & GND
Custom
31 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(5/11)-G61/G62 POWER & GND
Custom
31 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(5/11)-G61/G62 POWER & GND
Custom
31 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
GND
Part 6 of 7
UV1F
N18P-G0_FCBGA960~D
@
GND_0
A2
GND_1
AA17
GND_2
AA18
GND_3
AA20
GND_4
AA22
GND_5
AB12
GND_6
AB14
GND_7
AB16
GND_8
AB19
GND_9
AB2
GND_10
AB21
GND_11
A33
GND_12
AB23
GND_13
AB28
GND_14
AB30
GND_15
AB32
GND_16
AB5
GND_17
AB7
GND_18
AC13
GND_19
AC15
GND_20
AC17
GND_21
AC18
GND_22
AA13
GND_23
AC20
GND_24
AC22
GND_25
AE2
GND_26
AE28
GND_27
AE30
GND_28
AE32
GND_29
AE33
GND_30
AE5
GND_31
AE7
GND_32
AH10
GND_33
AA15
GND_34
AH13
GND_35
AH16
GND_36
AH19
GND_37
AH2
GND_38
AH22
GND_39
AH24
GND_40
AH28
GND_41
AH29
GND_42
AH30
GND_43
AH32
GND_44
AH33
GND_45
AH5
GND_46
AH7
GND_47
AJ7
GND_48
AK10
GND_49
AK7
GND_50
AL12
GND_51
AL14
GND_52
AL15
GND_53
AL17
GND_54
AL18
GND_55
AL2
GND_56
AL20
GND_57
AL21
GND_58
AL23
GND_59
AL24
GND_60
AL26
GND_61
AL28
GND_62
AL30
GND_63
AL32
GND_64
AL33
GND_65
AL5
GND_66
AM13
GND_67
AM16
GND_68
AM19
GND_69
AM22
GND_70
AM25
GND_71
AN1
GND_72
AN10
GND_73
AN13
GND_74
AN16
GND_75
AN19
GND_76
AN22
GND_77
AN25
GND_78
AN30
GND_79
AN34
GND_80
AN4
GND_81
AN7
GND_82
AP2
GND_83
AP33
GND_84
B1
GND_85
B10
GND_86
B22
GND_87
B25
GND_88
B28
GND_89
B31
GND_90
B34
GND_91
B4
GND_92
B7
GND_93
C10
GND_94
C13
GND_95
C19
GND_96
C22
GND_97
C25
GND_98
C28
GND_99
C7
GND_100
D2
GND_101
D31
GND_102
D33
GND_103
E10
GND_104
E22
GND_105
E25
GND_106
E5
GND_107
E7
GND_108
F28
GND_109
F7
GND_110
G10
GND_111
G13
GND_112
G16
GND_113
G19
GND_114
G2
GND_115
G22
GND_116
G25
GND_117
G28
GND_118
G3
GND_119
G30
GND_120
G32
GND_121
G33
GND_122
G5
GND_123
G7
GND_124
K2
GND_125
K28
GND_126
K30
GND_127
K32
GND_128
K33
GND_129
K5
GND_130
K7
GND_131
M13
GND_132
M15
GND_133
M17
GND_134
M18
GND_135
M20
GND_136
M22
GND_137
N12
GND_138
N14
GND_139
N16
GND_140
N19
GND_141
N2
GND_142
N21
GND_143
N23
GND_144
N28
GND_145
N30
GND_146
N32
GND_147
N33
GND_148
N5
GND_149
N7
GND_150
P13
GND_151
P15
GND_152
P17
GND_153
P18
GND_154
P20
GND_155
P22
GND_156
R12
GND_157
R14
GND_158
R16
GND_159
R19
GND_160
R21
GND_161
R23
GND_162
T13
GND_163
T15
GND_164
T17
GND_165
T18
GND_166
T2
GND_167
T20
GND_168
T22
GND_169
AG11
GND_170
T28
GND_171
T32
GND_172
T5
GND_173
T7
GND_174
U12
GND_175
U14
GND_176
U16
GND_177
U19
GND_178
U21
GND_179
U23
GND_180
V12
GND_181
V14
GND_182
V16
GND_183
V19
GND_184
V21
GND_185
V23
GND_186
W13
GND_187
W15
GND_188
W17
GND_189
W18
GND_190
W20
GND_191
W22
GND_192
W28
GND_193
Y12
GND_194
Y14
GND_195
Y16
GND_196
Y19
GND_197
Y21
GND_198
Y23
NC
AH11
GND_OPT
C16
GND_OPT
W32
GND_200
AA11
GND_201
AA24
GND_202
AC11
GND_203
AC24
GND_204
AD12
GND_205
AD14
GND_206
AD16
GND_207
AD19
GND_208
AD21
GND_209
AD23
GND_210
L12
GND_211
L14
GND_212
L16
GND_213
L19
GND_214
L21
GND_215
L23
GND_216
M11
GND_217
M24
GND_218
P11
GND_219
T11
GND_220
T24
GND_221
W11
GND_222
W24
GND_223
P24
POWER
Part 7 of 7
UV1G
N18P-G0_FCBGA960~D
@
VDD_1
AA14
VDD_4
AA21
VDD_6
AB13
VDD_7
AB15
VDD_8
AB17
VDD_9
AB18
VDD_10
AB20
VDD_11
AB22
VDD_12
AC12
VDD_14
AC16
VDD_15
AC19
VDD_17
AC23
VDD_18
M12
VDD_20
M16
VDD_21
M19
VDD_23
M23
VDD_24
N13
VDD_25
N15
VDD_26
N17
VDD_27
N18
VDD_28
N20
VDD_29
N22
VDD_31
P14
VDD_34
P21
VDD_36
R13
VDD_37
R15
VDD_38
R17
VDD_39
R18
VDD_40
R20
VDD_41
R22
VDD_42
T12
VDD_44
T16
VDD_45
T19
VDD_47
T23
VDD_48
U13
VDD_49
U15
VDD_51
U18
VDD_52
U20
VDD_53
U22
VDD_54
V13
VDD_55
V15
VDD_72
AA12
VDD_73
AA16
VDD_74
AA19
VDD_75
AA23
VDD_76
AC14
VDD_77
AC21
VDD_78
M14
VDD_79
M21
VDD_80
P12
VDD_81
P16
VDD_82
P19
VDD_83
P23
VDD_84
T14
VDD_85
T21
VDD_86
U17
VDD_87
V18
VDD_88
W14
VDD_89
W21
VDD_56
V17
VDD_58
V20
VDD_59
V22
VDD_60
W12
VDD_62
W16
VDD_63
W19
VDD_65
W23
VDD_66
Y13
VDD_67
Y15
VDD_68
Y17
VDD_69
Y18
VDD_70
Y20
VDD_71
Y22
RSVD_VDDS_SENSE
U1
RSVD_GNDS_SENSE
U2
XVDD_4
U4
XVDD_5
U5
XVDD_6
U6
XVDD_7
U7
XVDD_8
U8
XVDD_9
V1
XVDD_10
V2
XVDD_11
V3
XVDD_12
V4
XVDD_13
V5
XVDD_14
V6
XVDD_15
V7
XVDD_16
V8
XVDD_17
W2
XVDD_18
W3
XVDD_19
W4
XVDD_20
W5
XVDD_21
W7
XVDD_22
W8
XVDD_20
Y1
XVDD_21
Y2
XVDD_22
Y3
XVDD_23
Y4
XVDD_24
Y5
XVDD_25
Y6
XVDD_26
Y7
XVDD_27
Y8
XVDD_28
AA1
XVDD_29
AA2
XVDD_30
AA3
XVDD_31
AA4
XVDD_32
AA5
XVDD_33
AA6
XVDD_34
AA7
XVDD_35
AA8
VDD_90
AB11
VDD_91
AB24
VDD_92
AD11
VDD_93
AD13
VDD_94
AD15
VDD_95
AD17
VDD_96
AD18
VDD_97
AD20
VDD_98
AD22
VDD_95
AD24
VDD_96
L11
VDD_97
L13
VDD_98
L15
VDD_99
L17
VDD_100
L18
VDD_101
L20
VDD_102
L22
VDD_103
L24
VDD_106
R11
VDD_107
R24
VDD_105
N24
VDD_104
N11
VDD_108
U11
VDD_109
U24
VDD_110
V11
VDD_111
V24
VDD_112
Y11
VDD_113
Y24
RV395 0_0402_5%N17P@
12
www.DeviceDB.xyz || Telegram: https://t.me/DeviceDB
www.laptoprepairsecrets.com
Page 29
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
change for GDDR6
change for GDDR6
Close to DRAM
Close to DRAMClose to DRAM
EH50F remove all reserve MEM_VREF schemat i c W=16mils
MF=1
around DRAM
Right under DRAM
W=16mils
MF=2
change for GDDR6
change for GDDR6
Close to DRAM
Close to DRAM
Close to DRAM
around DRAM
Right under DRAM
+FBAA_VREFC
FBA_CMD12
FBA_CMD11
FBA_CMD3
FBA_CMD6
FBA_CMD4
FBA_CMD5
FBA_WCKB01#
FBA_WCKB01
FBA_WCKB23#
FBA_WCKB23
+FBAA_VREFC
FBA_WCK23#
FBA_WCK23
FBA_WCK01
FBA_WCK01#
+FBAB_VREFC
FBA_CMD24
FBA_CMD23
FBA_CMD22
FBA_CMD21
FBA_CMD26
FBA_CMD17
+FBAB_VREFC
FBA_DBI3<28>
FBA_EDC3<28>
FBA_DBI0<28>
FBA_DBI1<28>
FBA_DBI2<28>
FBA_CMD8<28>
FBA_EDC0<28>
FBA_EDC1<28>
FBA_EDC2<28>
FBA_WCK01<28>
FBA_WCK23#<28>
FBA_WCK23<28>
FBA_CMD7<28>
FBA_D12 <28>
FBA_CLKA0#<28>
FBA_CLKA0<28>
FBA_WCK01#<28>
FBA_D1 <28>
FBA_D11 <28>
FBA_D9 <28>
FBA_D10 <28>
FBA_D0 <28>
FBA_D6 <28>
FBA_D3 <28>
FBA_D7 <28>
FBA_D13 <28>
FBA_D8 <28>
FBA_D4 <28>
FBA_D5 <28>
FBA_D2 <28>
FBA_CMD2<28>
FBA_D15 <28>
FBA_D14 <28>
FBA_D24 <28>
FBA_D26 <28>
FBA_D27 <28>
FBA_D25 <28>
FBA_D30 <28>
FBA_D28 <28>
FBA_D29 <28>
FBA_D31 <28>
FBA_D19 <28>
FBA_D17 <28>
FBA_D16 <28>
FBA_D18 <28>
FBA_D23 <28>
FBA_D22 <28>
FBA_D20 <28>
FBA_D21 <28>
FBA_CMD10 <28>
FBA_CMD4 <28>
FBA_CMD12 <2 8>
FBA_CMD1 <28>
FBA_CMD11 <28>
FBA_CMD6 <28>
FBA_CMD5 <28>
FBA_CMD32 <28>
FBA_CMD15 <28>
FBA_CMD13 <28>
FBA_CMD3 <28>
FBA_CMD14 <2 8>
FBA_CMD9 <28>
FBA_CMD0 <28>
FBA_WCKB01# <28>
FBA_WCKB23# <28>
FBA_WCKB23 <28>
FBA_WCKB01 <28>
FBA_D46 <28>
FBA_D47 <28>
FBA_D32 <28>
FBA_D36 <28>
FBA_D35 <28>
FBA_D39 <28>
FBA_D37 <28>
FBA_D38 <28>
FBA_D33 <28>
FBA_D34 <28>
FBA_D60 <28>
FBA_D59 <28>
FBA_D63 <28>
FBA_D62 <28>
FBA_D53 <28>
FBA_D52 <28>
FBA_D55 <28>
FBA_D54 <28>
FBA_D49 <28>
FBA_D50 <28>
FBA_D51 <28>
FBA_D48 <28>
FBA_D56 <28>
FBA_D58 <28>
FBA_D57 <28>
FBA_D61 <28>
FBA_D44 <28>
FBA_CMD27 < 28>
FBA_CMD23 <28>
FBA_CMD21 <28>
FBA_CMD28 <28>
FBA_CMD26 < 28>
FBA_CMD17 < 28>
FBA_CMD19 < 28>
FBA_CMD24 <28>
FBA_CMD20 <28>
FBA_CMD22 < 28>
FBA_CMD29 < 28>
FBA_CMD31 < 28>
FBA_CMD16 < 28>
FBA_CMD18<28>
FBA_CMD25 < 28>
FBA_DBI5<28>
FBA_DBI4<28>
FBA_DBI7<28>
FBA_DBI6<28>
FBA_EDC5<28>
FBA_EDC4<28>
FBA_EDC7<28>
FBA_EDC6<28>
FBA_CMD30<28>
FBA_CMD33<28>
FBA_WCKB67#<28>
FBA_WCKB67<28>
FBA_WCKB45#<28>
FBA_WCKB45<28>
FBA_CLKA1#<28>
FBA_CLKA1<28>
FBA_D40 <28>
FBA_D41 <28>
FBA_D42 <28>
FBA_D43 <28>
FBA_D45 <28>
FBA_WCK67 <28>
FBA_WCK67# <28>
FBA_WCK45# <28>
FBA_WCK45 <28>
+1.35VSDGPU
+1.35VSDGPU
+1.8VSDGPU_AON+1.35VSDGPU
+1.35VSDGPU
+1.35VSDGPU
+1.8VSDGPU_AON
+1.35VSDGPU
+1.35VSDGPU
+1.35VSDGPU
+1.8VSDGPU_AON
+1.35VSDGPU +1.8VSDGPU_AON
+1.35VSDGPU
+1.35VSDGPU
+1.35VSDGPU+1.35VSDGPU
+1.35VSDGPU
Title
Size
Document Num ber R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(6/11)-G61 /G62 GDDR6 CHA
D
32 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document N umber R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(6/11)-G61 /G62 GDDR6 CHA
D
32 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document N umber R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(6/11)-G61 /G62 GDDR6 CHA
D
32 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CV577
22U_0603_6.3V6M
VGA@
12
CV600
1U_0201_6.3V6M
VGA@
1
2
RV3664 121_0402_1%VGA@
12
CV606
1U_0201_6.3V6M
VGA@
1
2
CV594
1U_0201_6.3V6M
VGA@
1
2
CV564
10U_0402_6.3V6M
VGA@
1
2
CV571
1U_0201_6.3V6M
VGA@
1
2
CV546
1U_0201_6.3V6M
VGA@
1
2
CV552
1U_0201_6.3V6M
VGA@
1
2
CV613
1U_0201_6.3V6M
VGA@
1
2
CV610
1U_0201_6.3V6M
VGA@
1
2
CV544
1U_0201_6.3V6M
VGA@
1
2
CV554
1U_0201_6.3V6M
VGA@
1
2
CV560
10U_0402_6.3V6M
VGA@
1
2
CV556
10U_0402_6.3V6M
VGA@
1
2
CV566
10U_0402_6.3V6M
VGA@
1
2
CV572
1U_0201_6.3V6M
VGA@
1
2
180-BALL
SGRAM GDDR6
UV5
K4Z80325BC-HC14_FBGA180~D@
CKE#_A
G10
CK
J10
CK#
K10
ZQ_B
K14
RESET#
J1
WCK#_A
D5
WCK_B
R11
WCK#_B
R10
WCK_A
D4
CABI#_A
J5
CABI#_B
K5
DBI0#_A
D2
DBI0#_B
R2
DBI1#_A
D13
DBI1#_B
R13
VREFC
K1
VDDQ1
C1
VDDQ2
E1
VDDQ3
H1
VDDQ4
L1
VDDQ5
P1
VDDQ6
T1
VDDQ7
J2
VDDQ8
K2
VDDQ9
C4
VDDQ10
F4
VDDQ11
N4
VDDQ12
T4
VDDQ13
B5
VDDQ14
U5
VDDQ15
B10
VDDQ16
U10
VDDQ17
C11
VDDQ18
F11
VDDQ19
N11
VDDQ20
T11
VDDQ21
J13
VDDQ22
K13
VDDQ23
C14
VDDQ24
E14
VDDQ25
H14
VDDQ26
L14
VDDQ27
P14
VDDQ28
T14
VSS1
B1
VSS2
D1
VSS3
F1
VSS4
G1
VSS5
M1
VSS6
N1
VSS7
R1
VSS8
U1
VSS9
A2
VSS10
V2
VSS11
C3
VSS12
D3
VSS13
F3
VSS14
G3
VSS15
M3
VSS16
N3
VSS17
R3
VSS18
T3
VSS19
A4
VSS20
E4
VSS21
H4
VSS22
L4
VSS23
P4
VSS24
V4
VSS25
C5
VSS26
T5
VSS27
C10
VSS28
T10
VSS29
A11
DQ0_A
B4
DQ1_A
A3
DQ1_B
V3
DQ2_A
B3
DQ2_B
U3
DQ3_A
B2
DQ3_B
U2
DQ4_A
E3
DQ5_A
E2
DQ4_B
P3
DQ5_B
P2
DQ6_A
F2
DQ6_B
N2
DQ7_A
G2
DQ7_B
M2
DQ8_A
B11
DQ8_B
U11
DQ9_A
A12
DQ9_B
V12
DQ10_A
B12
DQ10_B
U12
DQ11_A
B13
DQ11_B
U13
DQ12_A
E12
DQ12_B
P12
DQ13_A
E13
DQ13_B
P13
DQ14_A
F13
DQ14_B
N13
DQ15_A
G13
DQ15_B
M13
EDC0_A
C2
EDC0_B
T2
EDC1_A
C13
EDC1_B
T13
TCK
N5
TDI
F10
TDO
N10
TMS
F5
VSS30
E11
VSS31
H11
VSS32
L11
VSS33
P11
VSS34
V11
VSS35
C12
VSS36
D12
VSS37
F12
VSS38
G12
VSS39
M12
VSS40
N12
VSS41
R12
VSS43
A13
VSS42
T12
VSS44
V13
VSS45
B14
VSS46
D14
VSS47
F14
VSS48
G14
VSS49
M14
VSS50
N14
VSS51
R14
VSS52
U14
WCK0_t_B,NC
R4
WCK1_t_A,NC
D11
RFU_B,NC
M5
RFU_A,NC
G5
WCK0_c_B,NC
R5
WCK1_c_A,NC
D10
VDD1
A1
VDD2
V1
VDD3
H2
VDD4
L2
VDD5
E5
VDD6
P5
VDD7
E10
VDD8
P10
VDD9
H13
VDD10
L13
VDD11
A14
VDD12
V14
VPP1
A5
VPP2
V5
VPP3
A10
VPP4
V10
DQ0_B
U4
ZQ_A
J14
CA0_A
H3
CA0_B
L3
CA1_A
G11
CA1_B
M11
CA2_A
G4
CA2_B
M4
CA3_A
H12
CA3_B
L12
CA4_A
H5
CA5_A
H10
CA4_B
L5
CA5_B
L10
CA6_A
J12
CA6_B
K12
CA7_A
J11
CA7_B
K11
CA8_A
J4
CA8_B
K4
CA9_A
J3
CA9_B
K3
CKE#_B
M10
CV559
10U_0402_6.3V6M
VGA@
1
2
RV3663 121_0402_1%VGA@
12
RV3665 121_0402_1%VGA@
12
CV568
10U_0402_6.3V6M
VGA@
1
2
CV604
1U_0201_6.3V6M
VGA@
1
2
CV582
1U_0201_6.3V6M
VGA@
1
2
CV603
1U_0201_6.3V6M
VGA@
1
2
RV3662 121_0402_1%VGA@
12
CV590
22U_0603_6.3V6M
VGA@
12
CV587
22U_0603_6.3V6M
VGA@
12
CV574
1U_0201_6.3V6M
VGA@
1
2
CV578
22U_0603_6.3V6M
VGA@
12
CV570
1U_0201_6.3V6M
VGA@
1
2
RV3667
1K_0402_5%
VGA@
1 2
CV601
1U_0201_6.3V6M
VGA@
1
2
CV588
22U_0603_6.3V6M
VGA@
12
CV561
10U_0402_6.3V6M
VGA@
1
2
CV585
1U_0201_6.3V6M
VGA@
1
2
CV565
10U_0402_6.3V6M
VGA@
1
2
CV558
10U_0402_6.3V6M
VGA@
1
2
CV575
1U_0201_6.3V6M
VGA@
1
2
CV553
1U_0201_6.3V6M
VGA@
1
2
CV576
22U_0603_6.3V6M
VGA@
12
CV562
1U_0201_6.3V6M
VGA@
1
2
CV589
22U_0603_6.3V6M
VGA@
12
CV550
1U_0201_6.3V6M
VGA@
1
2
CV563
10U_0402_6.3V6M
VGA@
1
2
CV592
1U_0201_6.3V6M
VGA@
1
2
180-BALL
SGRAM GDDR6
UV4
K4Z80325BC-HC14_FBGA180~D@
CKE#_A
G10
CK
J10
CK#
K10
ZQ_B
K14
RESET#
J1
WCK#_A
D5
WCK_B
R11
WCK#_B
R10
WCK_A
D4
CABI#_A
J5
CABI#_B
K5
DBI0#_A
D2
DBI0#_B
R2
DBI1#_A
D13
DBI1#_B
R13
VREFC
K1
VDDQ1
C1
VDDQ2
E1
VDDQ3
H1
VDDQ4
L1
VDDQ5
P1
VDDQ6
T1
VDDQ7
J2
VDDQ8
K2
VDDQ9
C4
VDDQ10
F4
VDDQ11
N4
VDDQ12
T4
VDDQ13
B5
VDDQ14
U5
VDDQ15
B10
VDDQ16
U10
VDDQ17
C11
VDDQ18
F11
VDDQ19
N11
VDDQ20
T11
VDDQ21
J13
VDDQ22
K13
VDDQ23
C14
VDDQ24
E14
VDDQ25
H14
VDDQ26
L14
VDDQ27
P14
VDDQ28
T14
VSS1
B1
VSS2
D1
VSS3
F1
VSS4
G1
VSS5
M1
VSS6
N1
VSS7
R1
VSS8
U1
VSS9
A2
VSS10
V2
VSS11
C3
VSS12
D3
VSS13
F3
VSS14
G3
VSS15
M3
VSS16
N3
VSS17
R3
VSS18
T3
VSS19
A4
VSS20
E4
VSS21
H4
VSS22
L4
VSS23
P4
VSS24
V4
VSS25
C5
VSS26
T5
VSS27
C10
VSS28
T10
VSS29
A11
DQ0_A
B4
DQ1_A
A3
DQ1_B
V3
DQ2_A
B3
DQ2_B
U3
DQ3_A
B2
DQ3_B
U2
DQ4_A
E3
DQ5_A
E2
DQ4_B
P3
DQ5_B
P2
DQ6_A
F2
DQ6_B
N2
DQ7_A
G2
DQ7_B
M2
DQ8_A
B11
DQ8_B
U11
DQ9_A
A12
DQ9_B
V12
DQ10_A
B12
DQ10_B
U12
DQ11_A
B13
DQ11_B
U13
DQ12_A
E12
DQ12_B
P12
DQ13_A
E13
DQ13_B
P13
DQ14_A
F13
DQ14_B
N13
DQ15_A
G13
DQ15_B
M13
EDC0_A
C2
EDC0_B
T2
EDC1_A
C13
EDC1_B
T13
TCK
N5
TDI
F10
TDO
N10
TMS
F5
VSS30
E11
VSS31
H11
VSS32
L11
VSS33
P11
VSS34
V11
VSS35
C12
VSS36
D12
VSS37
F12
VSS38
G12
VSS39
M12
VSS40
N12
VSS41
R12
VSS43
A13
VSS42
T12
VSS44
V13
VSS45
B14
VSS46
D14
VSS47
F14
VSS48
G14
VSS49
M14
VSS50
N14
VSS51
R14
VSS52
U14
WCK0_t_B,NC
R4
WCK1_t_A,NC
D11
RFU_B,NC
M5
RFU_A,NC
G5
WCK0_c_B,NC
R5
WCK1_c_A,NC
D10
VDD1
A1
VDD2
V1
VDD3
H2
VDD4
L2
VDD5
E5
VDD6
P5
VDD7
E10
VDD8
P10
VDD9
H13
VDD10
L13
VDD11
A14
VDD12
V14
VPP1
A5
VPP2
V5
VPP3
A10
VPP4
V10
DQ0_B
U4
ZQ_A
J14
CA0_A
H3
CA0_B
L3
CA1_A
G11
CA1_B
M11
CA2_A
G4
CA2_B
M4
CA3_A
H12
CA3_B
L12
CA4_A
H5
CA5_A
H10
CA4_B
L5
CA5_B
L10
CA6_A
J12
CA6_B
K12
CA7_A
J11
CA7_B
K11
CA8_A
J4
CA8_B
K4
CA9_A
J3
CA9_B
K3
CKE#_B
M10
CV583
1U_0201_6.3V6M
VGA@
1
2
CV605
1U_0201_6.3V6M
VGA@
1
2
CV545
1U_0201_6.3V6M
VGA@
1
2
CV597
4.7U_0402_6.3V6M
VGA@
1
2
CV602
1U_0201_6.3V6M
VGA@
1
2
CV548
1U_0201_6.3V6M
VGA@
1
2
CV611
1U_0201_6.3V6M
VGA@
1
2
CV567
10U_0402_6.3V6M
VGA@
1
2
CV555
1U_0201_6.3V6M
VGA@
1
2
RV3666
1K_0402_5%
VGA@
1 2
CV598
1U_0201_6.3V6M
VGA@
1
2
CV599
1U_0201_6.3V6M
VGA@
1
2
CV580
22U_0603_6.3V6M
VGA@
12
CV579
22U_0603_6.3V6M
VGA@
12
CV595
1U_0201_6.3V6M
VGA@
1
2
CV596
1U_0201_6.3V6M
VGA@
1
2
CV581
22U_0603_6.3V6M
VGA@
12
CV609
4.7U_0402_6.3V6M
VGA@
1
2
CV547
1U_0201_6.3V6M
VGA@
1
2
CV584
1U_0201_6.3V6M
VGA@
1
2
CV557
10U_0402_6.3V6M
VGA@
1
2
CV549
1U_0201_6.3V6M
VGA@
1
2
CV607
1U_0201_6.3V6M
VGA@
1
2
CV608
1U_0201_6.3V6M
VGA@
1
2
CV591
22U_0603_6.3V6M
VGA@
12
CV551
1U_0201_6.3V6M
VGA@
1
2
CV593
1U_0201_6.3V6M
VGA@
1
2
CV612
1U_0201_6.3V6M
VGA@
1
2
CV586
22U_0603_6.3V6M
VGA@
12
CV573
1U_0201_6.3V6M
VGA@
1
2
CV569
1U_0201_6.3V6M
VGA@
1
2
www.laptoprepairsecrets.com
Page 30
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Close to DRAM
Close to DRAM
Close to DRAM
around DRAM
Right under DRAM
Close to DRAM
Close to DRAM
Close to DRAM
around DRAM
Right under DRAM
change for GDDR6
change for GDDR6
change for GDDR6 change for GDDR6
MF=1
MF=2
W=16mils
W=16mils
FBB_CMD24
FBB_CMD23
FBB_CMD22
FBB_CMD21
FBB_CMD26
FBB_CMD17
FBB_CMD11
FBB_CMD12
FBB_CMD3
FBB_CMD4
FBB_CMD6
FBB_CMD5
FBB_WCKB23
FBB_WCKB23#
FBB_WCKB01
FBB_WCKB01#
+FBBA_VREFC
FBB_WCK23
FBB_WCK23#
FBB_WCK01
FBB_WCK01#
+FBBB_VREFC
+FBBA_VREFC
+FBBB_VREFC
FBB_DBI3<28>
FBB_DBI2<28>
FBB_DBI1<28>
FBB_DBI0<28>
FBB_EDC3<28>
FBB_EDC2<28>
FBB_EDC1<28>
FBB_EDC0<28>
FBB_CMD8<28>
FBB_CMD7<28>
FBB_WCK23<28>
FBB_WCK23#<28>
FBB_WCK01<28>
FBB_WCK01#<28>
FBB_CLKA0<2 8>
FBB_CLKA0#<28>
FBB_D12 <28>
FBB_D8 <28>
FBB_D9 <28>
FBB_D11 <28>
FBB_D3 <28>
FBB_D5 <28>
FBB_D1 <28>
FBB_D7 <28>
FBB_D2 <28>
FBB_D6 <28>
FBB_D4 <28>
FBB_D10 <28>
FBB_D13 <28>
FBB_D14 <28>
FBB_D15 <28>
FBB_CMD2<28>
FBB_D0 <28>
FBB_D26 <28>
FBB_D27 <28>
FBB_D25 <28>
FBB_D24 <28>
FBB_D29 <28>
FBB_D31 <28>
FBB_D28 <28>
FBB_D30 <28>
FBB_D18 <28>
FBB_D17 <28>
FBB_D19 <28>
FBB_D16 <28>
FBB_D20 <28>
FBB_D21 <28>
FBB_D22 <28>
FBB_D23 <28>
FBB_CMD1 < 28>
FBB_CMD12 <28>
FBB_CMD4 < 28>
FBB_CMD10 <28>
FBB_CMD32 <28>
FBB_CMD5 <28>
FBB_CMD6 <28>
FBB_CMD11 < 28>
FBB_CMD14 <28>
FBB_CMD3 < 28>
FBB_CMD13 < 28>
FBB_CMD15 < 28>
FBB_CMD0 <28>
FBB_CMD9 <28>
FBB_D45 <28>
FBB_D46 <28>
FBB_D32 <28>
FBB_D36 <28>
FBB_D35 <28>
FBB_D38 <28>
FBB_D37 <28>
FBB_D39 <28>
FBB_D33 <28>
FBB_D34 <28>
FBB_D61 <28>
FBB_D58 <28>
FBB_D63 <28>
FBB_D62 <28>
FBB_D55 <28>
FBB_D52 <28>
FBB_D54 <28>
FBB_D53 <28>
FBB_D49 <28>
FBB_D50 <28>
FBB_D48 <28>
FBB_D51 <28>
FBB_D59 <28>
FBB_D57 <28>
FBB_D56 <28>
FBB_D60 <28>
FBB_D47 <28>
FBB_CMD27 < 28>
FBB_CMD23 <28>
FBB_CMD21 <28>
FBB_CMD28 <28>
FBB_CMD26 < 28>
FBB_CMD17 < 28>
FBB_CMD19 < 28>
FBB_CMD24 <28>
FBB_CMD20 <28>
FBB_CMD22 < 28>
FBB_CMD29 < 28>
FBB_CMD31 < 28>
FBB_CMD16 < 28>
FBB_CMD18<28>
FBB_CMD25 < 28>
FBB_DBI5<28>
FBB_DBI4<28>
FBB_DBI7<28>
FBB_DBI6<28>
FBB_EDC5<28>
FBB_EDC4<28>
FBB_EDC7<28>
FBB_EDC6<28>
FBB_CMD30<28>
FBB_CMD33<28>
FBB_WCKB67#<28>
FBB_WCKB67<28>
FBB_WCKB45#<28>
FBB_WCKB45<28>
FBB_CLKA1#<28>
FBB_CLKA1<28>
FBB_D42 <28>
FBB_D43 <28>
FBB_D40 <28>
FBB_D41 <28>
FBB_D44 <28>
FBB_WCKB23 <28>
FBB_WCKB23# <28>
FBB_WCKB01# <28>
FBB_WCKB01 <28>
FBB_WCK67 <28>
FBB_WCK67# <28>
FBB_WCK45# <28>
FBB_WCK45 <28>
+1.35VSDGPU
+1.8VSDGPU_AON
+1.35VSDGPU
+1.8VSDGPU_AON
+1.35VSDGPU +1.8VSDGPU_AON
+1.35VSDGPU
+1.35VSDGPU
+1.35VSDGPU+1.35VSDGPU
+1.35VSDGPU
+1.35VSDGPU +1.8VSDGPU_AON
+1.35VSDGPU
+1.35VSDGPU
+1.35VSDGPU+1.35VSDGPU
+1.35VSDGPU
Title
Size
Document Num ber R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(7/11)-G61 /G62 GDDR6 CHB
D
33 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document N umber R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(7/11)-G61 /G62 GDDR6 CHB
D
33 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document N umber R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
N18P(7/11)-G61 /G62 GDDR6 CHB
D
33 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CV656
22U_0603_6.3V6M
VGA@
12
CV651
1U_0201_6.3V6M
VGA@
1
2
CV672
1U_0201_6.3V6M
VGA@
1
2
CV670
1U_0201_6.3V6M
VGA@
1
2
CV653
1U_0201_6.3V6M
VGA@
1
2
CV617
10U_0402_6.3V6M
VGA@
1
2
CV655
1U_0201_6.3V6M
VGA@
1
2
CV662
1U_0201_6.3V6M
VGA@
1
2
CV623
1U_0201_6.3V6M
VGA@
1
2
RV3670 121_0402_1%VGA@
12
CV640
1U_0201_6.3V6M
VGA@
1
2
CV626
1U_0201_6.3V6M
VGA@
1
2
CV660
22U_0603_6.3V6M
VGA@
12
CV639
1U_0201_6.3V6M
VGA@
1
2
CV622
10U_0402_6.3V6M
VGA@
1
2
CV665
1U_0201_6.3V6M
VGA@
1
2
CV678
1U_0201_6.3V6M
VGA@
1
2
CV654
1U_0201_6.3V6M
VGA@
1
2
RV3672
1K_0402_5%
VGA@
1 2
CV641
1U_0201_6.3V6M
VGA@
1
2
CV667
1U_0201_6.3V6M
VGA@
1
2
CV666
1U_0201_6.3V6M
VGA@
1
2
CV677
1U_0201_6.3V6M
VGA@
1
2
CV675
1U_0201_6.3V6M
VGA@
1
2
CV658
22U_0603_6.3V6M
VGA@
12
RV3669 121_0402_1%VGA@
12
CV624
1U_0201_6.3V6M
VGA@
1
2
CV631
10U_0402_6.3V6M
VGA@
1
2
180-BALL
SGRAM GDDR6
UV6
K4Z80325BC-HC14_FBGA180~D@
CKE#_A
G10
CK
J10
CK#
K10
ZQ_B
K14
RESET#
J1
WCK#_A
D5
WCK_B
R11
WCK#_B
R10
WCK_A
D4
CABI#_A
J5
CABI#_B
K5
DBI0#_A
D2
DBI0#_B
R2
DBI1#_A
D13
DBI1#_B
R13
VREFC
K1
VDDQ1
C1
VDDQ2
E1
VDDQ3
H1
VDDQ4
L1
VDDQ5
P1
VDDQ6
T1
VDDQ7
J2
VDDQ8
K2
VDDQ9
C4
VDDQ10
F4
VDDQ11
N4
VDDQ12
T4
VDDQ13
B5
VDDQ14
U5
VDDQ15
B10
VDDQ16
U10
VDDQ17
C11
VDDQ18
F11
VDDQ19
N11
VDDQ20
T11
VDDQ21
J13
VDDQ22
K13
VDDQ23
C14
VDDQ24
E14
VDDQ25
H14
VDDQ26
L14
VDDQ27
P14
VDDQ28
T14
VSS1
B1
VSS2
D1
VSS3
F1
VSS4
G1
VSS5
M1
VSS6
N1
VSS7
R1
VSS8
U1
VSS9
A2
VSS10
V2
VSS11
C3
VSS12
D3
VSS13
F3
VSS14
G3
VSS15
M3
VSS16
N3
VSS17
R3
VSS18
T3
VSS19
A4
VSS20
E4
VSS21
H4
VSS22
L4
VSS23
P4
VSS24
V4
VSS25
C5
VSS26
T5
VSS27
C10
VSS28
T10
VSS29
A11
DQ0_A
B4
DQ1_A
A3
DQ1_B
V3
DQ2_A
B3
DQ2_B
U3
DQ3_A
B2
DQ3_B
U2
DQ4_A
E3
DQ5_A
E2
DQ4_B
P3
DQ5_B
P2
DQ6_A
F2
DQ6_B
N2
DQ7_A
G2
DQ7_B
M2
DQ8_A
B11
DQ8_B
U11
DQ9_A
A12
DQ9_B
V12
DQ10_A
B12
DQ10_B
U12
DQ11_A
B13
DQ11_B
U13
DQ12_A
E12
DQ12_B
P12
DQ13_A
E13
DQ13_B
P13
DQ14_A
F13
DQ14_B
N13
DQ15_A
G13
DQ15_B
M13
EDC0_A
C2
EDC0_B
T2
EDC1_A
C13
EDC1_B
T13
TCK
N5
TDI
F10
TDO
N10
TMS
F5
VSS30
E11
VSS31
H11
VSS32
L11
VSS33
P11
VSS34
V11
VSS35
C12
VSS36
D12
VSS37
F12
VSS38
G12
VSS39
M12
VSS40
N12
VSS41
R12
VSS43
A13
VSS42
T12
VSS44
V13
VSS45
B14
VSS46
D14
VSS47
F14
VSS48
G14
VSS49
M14
VSS50
N14
VSS51
R14
VSS52
U14
WCK0_t_B,NC
R4
WCK1_t_A,NC
D11
RFU_B,NC
M5
RFU_A,NC
G5
WCK0_c_B,NC
R5
WCK1_c_A,NC
D10
VDD1
A1
VDD2
V1
VDD3
H2
VDD4
L2
VDD5
E5
VDD6
P5
VDD7
E10
VDD8
P10
VDD9
H13
VDD10
L13
VDD11
A14
VDD12
V14
VPP1
A5
VPP2
V5
VPP3
A10
VPP4
V10
DQ0_B
U4
ZQ_A
J14
CA0_A
H3
CA0_B
L3
CA1_A
G11
CA1_B
M11
CA2_A
G4
CA2_B
M4
CA3_A
H12
CA3_B
L12
CA4_A
H5
CA5_A
H10
CA4_B
L5
CA5_B
L10
CA6_A
J12
CA6_B
K12
CA7_A
J11
CA7_B
K11
CA8_A
J4
CA8_B
K4
CA9_A
J3
CA9_B
K3
CKE#_B
M10
CV615
1U_0201_6.3V6M
VGA@
1
2
CV634
1U_0201_6.3V6M
VGA@
1
2
CV683
1U_0201_6.3V6M
VGA@
1
2
CV627
1U_0201_6.3V6M
VGA@
1
2
CV652
1U_0201_6.3V6M
VGA@
1
2
CV647
22U_0603_6.3V6M
VGA@
12
RV3673
1K_0402_5%
VGA@
1 2
CV661
22U_0603_6.3V6M
VGA@
12
CV619
10U_0402_6.3V6M
VGA@
1
2
CV633
10U_0402_6.3V6M
VGA@
1
2
CV629
10U_0402_6.3V6M
VGA@
1
2
CV649
1U_0201_6.3V6M
VGA@
1
2
CV664
1U_0201_6.3V6M
VGA@
1
2
CV679
4.7U_0402_6.3V6M
VGA@
1
2
CV643
22U_0603_6.3V6M
VGA@
12
CV668
4.7U_0402_6.3V6M
VGA@
1
2
CV618
10U_0402_6.3V6M
VGA@
1
2
CV682
1U_0201_6.3V6M
VGA@
1
2
CV659
22U_0603_6.3V6M
VGA@
12
CV630
10U_0402_6.3V6M
VGA@
1
2
CV628
10U_0402_6.3V6M
VGA@
1
2
CV625
1U_0201_6.3V6M
VGA@
1
2
CV614
1U_0201_6.3V6M
VGA@
1
2
CV676
1U_0201_6.3V6M
VGA@
1
2
RV3671 121_0402_1%V GA@
12
CV650
1U_0201_6.3V6M
VGA@
1
2
CV636
1U_0201_6.3V6M
VGA@
1
2
180-BALL
SGRAM GDDR6
UV7
K4Z80325BC-HC14_FBGA180~D@
CKE#_A
G10
CK
J10
CK#
K10
ZQ_B
K14
RESET#
J1
WCK#_A
D5
WCK_B
R11
WCK#_B
R10
WCK_A
D4
CABI#_A
J5
CABI#_B
K5
DBI0#_A
D2
DBI0#_B
R2
DBI1#_A
D13
DBI1#_B
R13
VREFC
K1
VDDQ1
C1
VDDQ2
E1
VDDQ3
H1
VDDQ4
L1
VDDQ5
P1
VDDQ6
T1
VDDQ7
J2
VDDQ8
K2
VDDQ9
C4
VDDQ10
F4
VDDQ11
N4
VDDQ12
T4
VDDQ13
B5
VDDQ14
U5
VDDQ15
B10
VDDQ16
U10
VDDQ17
C11
VDDQ18
F11
VDDQ19
N11
VDDQ20
T11
VDDQ21
J13
VDDQ22
K13
VDDQ23
C14
VDDQ24
E14
VDDQ25
H14
VDDQ26
L14
VDDQ27
P14
VDDQ28
T14
VSS1
B1
VSS2
D1
VSS3
F1
VSS4
G1
VSS5
M1
VSS6
N1
VSS7
R1
VSS8
U1
VSS9
A2
VSS10
V2
VSS11
C3
VSS12
D3
VSS13
F3
VSS14
G3
VSS15
M3
VSS16
N3
VSS17
R3
VSS18
T3
VSS19
A4
VSS20
E4
VSS21
H4
VSS22
L4
VSS23
P4
VSS24
V4
VSS25
C5
VSS26
T5
VSS27
C10
VSS28
T10
VSS29
A11
DQ0_A
B4
DQ1_A
A3
DQ1_B
V3
DQ2_A
B3
DQ2_B
U3
DQ3_A
B2
DQ3_B
U2
DQ4_A
E3
DQ5_A
E2
DQ4_B
P3
DQ5_B
P2
DQ6_A
F2
DQ6_B
N2
DQ7_A
G2
DQ7_B
M2
DQ8_A
B11
DQ8_B
U11
DQ9_A
A12
DQ9_B
V12
DQ10_A
B12
DQ10_B
U12
DQ11_A
B13
DQ11_B
U13
DQ12_A
E12
DQ12_B
P12
DQ13_A
E13
DQ13_B
P13
DQ14_A
F13
DQ14_B
N13
DQ15_A
G13
DQ15_B
M13
EDC0_A
C2
EDC0_B
T2
EDC1_A
C13
EDC1_B
T13
TCK
N5
TDI
F10
TDO
N10
TMS
F5
VSS30
E11
VSS31
H11
VSS32
L11
VSS33
P11
VSS34
V11
VSS35
C12
VSS36
D12
VSS37
F12
VSS38
G12
VSS39
M12
VSS40
N12
VSS41
R12
VSS43
A13
VSS42
T12
VSS44
V13
VSS45
B14
VSS46
D14
VSS47
F14
VSS48
G14
VSS49
M14
VSS50
N14
VSS51
R14
VSS52
U14
WCK0_t_B,NC
R4
WCK1_t_A,NC
D11
RFU_B,NC
M5
RFU_A,NC
G5
WCK0_c_B,NC
R5
WCK1_c_A,NC
D10
VDD1
A1
VDD2
V1
VDD3
H2
VDD4
L2
VDD5
E5
VDD6
P5
VDD7
E10
VDD8
P10
VDD9
H13
VDD10
L13
VDD11
A14
VDD12
V14
VPP1
A5
VPP2
V5
VPP3
A10
VPP4
V10
DQ0_B
U4
ZQ_A
J14
CA0_A
H3
CA0_B
L3
CA1_A
G11
CA1_B
M11
CA2_A
G4
CA2_B
M4
CA3_A
H12
CA3_B
L12
CA4_A
H5
CA5_A
H10
CA4_B
L5
CA5_B
L10
CA6_A
J12
CA6_B
K12
CA7_A
J11
CA7_B
K11
CA8_A
J4
CA8_B
K4
CA9_A
J3
CA9_B
K3
CKE#_B
M10
CV621
10U_0402_6.3V6M
VGA@
1
2
CV644
22U_0603_6.3V6M
VGA@
12
CV648
22U_0603_6.3V6M
VGA@
12
CV632
10U_0402_6.3V6M
VGA@
1
2
CV681
1U_0201_6.3V6M
VGA@
1
2
CV635
1U_0201_6.3V6M
VGA@
1
2
CV646
22U_0603_6.3V6M
VGA@
12
CV671
1U_0201_6.3V6M
VGA@
1
2
CV616
1U_0201_6.3V6M
VGA@
1
2
CV673
1U_0201_6.3V6M
VGA@
1
2
CV657
22U_0603_6.3V6M
VGA@
12
CV638
1U_0201_6.3V6M
VGA@
1
2
CV637
1U_0201_6.3V6M
VGA@
1
2
CV680
1U_0201_6.3V6M
VGA@
1
2
CV663
1U_0201_6.3V6M
VGA@
1
2
CV645
22U_0603_6.3V6M
VGA@
12
RV3668 121_0402_1%VGA@
12
CV642
1U_0201_6.3V6M
VGA@
1
2
CV620
10U_0402_6.3V6M
VGA@
1
2
CV674
1U_0201_6.3V6M
VGA@
1
2
CV669
1U_0201_6.3V6M
VGA@
1
2
www.laptoprepairsecrets.com
Page 31
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
0727 FAE CF suggest
0730 FAE CF suggest
0730 FAE CF suggest , reserve pull high only
20191015
- Add test point
CSSP_B+
PFM_FILTER_G ND_FET
CSSP_NVVD D
PFM_CH1_ BS_IN1
PFM_CH1_ BS_IN2
PFM_CH1_BS_ IN3
PFM_CH1_BS_ IN4
PFM_ADC_M UX_SEL_R
PFM_ADC_F ILTER_EN
PFM_SKIP_R
PFM_ADC_F ILTER_MODE
PFM_ADC_F ILTER_MODE
PFM_SKIP_R
PFM_CH1_ SH_IN_P1 CSSP_B+
PFM_CH1_ SH_IN_N1 CSSN_B+
PFM_CH1_ SH_IN_P2 CSSP_ NVVDD
PFM_CH1_ SH_IN_N2 CSSN_NVVD D
PFM_CH1_ SH_IN_P3
PFM_CH1_ SH_IN_N3
SNN_PFM_C H1_SH_IN_P4
SNN_PFM_C H1_SH_IN_N4
ADC_IN_P
ADC_IN_N
PFM_PF_BSO K_R
PFM_PF_BS OK_R
SNN_ADC_ CUSTOM8
SNN_ADC_ CUSTOM18
SNN_ADC_ CUSTOM21
SNN_ADC_ CUSTOM31
PFM_BG_RE F_OUT
PFM_BS_RE F
PFM_CM_RE F_IN
PFM_CH1_ SH_IN_P3
SNN_PFM_C H1_SH_IN_P4
PFM_CH1_ SH_IN_N3
SNN_PFM_C H1_SH_IN_N4
PFM_ADC_F ILTER_EN
ADC_IN_P <2 7>
ADC_IN_N <27>
CSSP_B+ <97 >
CSSN_B+ <97>
CSSP_NVVDD <97>
CSSN_NVVD D < 97>
GPIO22_OC_W ARN#<27>
OVRM_EN <17 ,58>
+3V_OVR M
+3V_OVRM
+3V_OVR M
+3V_OVRM
+3V_OVRM
+3VSDGPU
+3VLP
+3V_OVRM
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
1.0
N18P(10/11)-G61/G62 OVR-M
Custom
36 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
1.0
N18P(10/11)-G61/G62 OVR-M
Custom
36 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
1.0
N18P(10/11)-G61/G62 OVR-M
Custom
36 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
FH51M M/B LA-J871P
CV362
1000P_040 2_50V7K
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SD034324380
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RV354
0_0402_5%
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1 2
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RV371
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487_0402_1%
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CV361
1000P_04 02_50V7K
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SA0000CMA00
S IC US5650QQK I WQFN 32P POWER MONITOR
CV363
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1 2
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1 2
RV344
649_0402 _1%
ON_X76@
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RV351 0_0 402_5%uPI_X76@
1 2
G
D
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TH46
@
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V
3
6
8
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1
K
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%
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1
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P
@
12
UV47
NCP4549 1XMNTWG_QFN32_4X4
SA0000C9Q00
ON_X76@
BS_IN2
6
SH_IN_N1
1
SH_IN_P1
2
SKIP
25
SH_O3
10
ENABLE
28
BS_IN3
11
SH_O1
32
MUX_SEL
29
NC
18
GND_FET
9
BS_IN1
3
SH_IN_N2
4
SH_IN_P2
5
VCC
27
SH_IN_N4
16
BS_IN4
14
SH_IN_P4
15
NC
8
MODE_SEL
26
BS_REF
24
DIFF_OUT_P
20
DIFF_OUT_N
19
SH_O4
17
SH_O2
7
BG_REF_OUT
23
CM_REF_IN
22
NC
21
SH_IN_N3
13
SH_IN_P3
12
GND
33
BS_OK
30
NC
31
C
V
3
7
1
1
0
0
0
P
_
0
4
0
2
_
5
0
V
7
K
N18P@
1
2
RV359
357_0402_1%
uPI_X76@
SD034357080
RV364 0_04 02_5%@
1 2
RV360 475_ 0402_1%ON_X76@
1 2
R
V
3
4
6
2
K
_
0
4
0
2
_
5
%
N18P@
12
TH47
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RV375
10K_0402_ 1%
@
12
C
V
6
8
6
0
.
0
1
5
U
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0
4
0
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1
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N18P@
1 2
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12
www.laptoprepairsecrets.com
Page 32
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8V_AON/+3VSDGPU
+1.8V_MAIN
12mils
1V8_AON_EN
1VSDGPU_EN# NVVDD_EN#
1.35VSDGPU_EN#
3VSDGPU_EN#
3VSDGPU_EN
3VSDGPU_EN
3VSDGPU_EN
1V8_AON_EN
GPIO26_FP_FUSE_R
1VSDGPU_EN<27,102>
1.35VSDGPU_EN<27,100>
NVVDD1_EN<27,96>
1.8VSDGPU_MAIN_EN3V3<27>
1V8_AON_EN<27>
3VSDGPU_EN<27,39>
GPIO26_FP_FUSE<27>
+1.8VALW
+1.8VALW
+1.8VSDGPU_AON
+5VS
+1.0VSDGPU
+5VALW
+5VS
+NVVDD1
+5VS
+1.35VSDGPU
+5VALW
+5VS
+3VSDGPU
+3VSDGPU
+3VS
+1.8VALW
+1.8VSDGPU_MAIN
+1.8VSDGPU_AON
+5VALW
+FP_FUSE_GPU
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
37 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18P(11/11)-DC INTERFACE
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
37 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18P(11/11)-DC INTERFACE
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
37 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18P(11/11)-DC INTERFACE
CV376
2.2U_0402_6.3V6M
N18P@
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1
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UV50
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SA000070V00
GND
5
ON
4
VOUT
6
VIN2
2
VBIAS
3
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7
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11
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VBIAS
4
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VOUT2
9
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CT1
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VOUT2
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GND
5
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7
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2
www.laptoprepairsecrets.com
Page 33
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LCD POWER CIRCUIT
USB/I2C Touch Screen Co-Lay
W=60mils
SM01000EJ00 3000ma
220ohm@100mhz DCR
0.04
W=60mils
W=60mils
LCD enable signal
For
Camera
W=60mils
LED PANEL Conn.
Touch
Screen
Place closed to JEDP1
Panel OD
CAMERA
near JEDP1
near JEDP1
20190921
20190927
20191014
- Change to +19VB
20191014
- CX0/CX10 change to SE082221J80
20191016
- change to 0-ohm for EMI test
20190506
- RX11 change to unpop
- BIOS needs to detect panel
to select H or L .
20200114
- RX8/RX9 Change to R-short
BKOFF#
PCH_BKL_P WM
EDP_HPD_R
PANEL_OD_ EN
EDP_AUXP_ C
EDP_AUXN_ C
EDP_TXP1_C
EDP_TXP3_C
EDP_TXN3_C
EDP_TXN2_C
EDP_TXP2_C
EDP_TXN0_C
EDP_TXP0_C
EDP_TXN1_C
PCH_BKL_PWM
BKOFF#
EDP_HPD_R
TS_EN
USB20_N5_C AMERA
USB20_P5_C AMERA
DMIC_DATA_R
DMIC_CLK_R
EDP_TXP 0
EDP_TXN0
EDP_TXP 1
EDP_TXN1
EDP_TXP 2
EDP_TXN2
EDP_TXP 3
EDP_TXN3
EDP_AUXP
EDP_AUXN
PANEL_OD_ EN
DMIC_CLK_R
DMIC_DATA_ R
TS_USBP_I2 C_CLK
TS_USBN_I2C_ DA
USB20_P6
USB20_N6
I2C_SCL_TS
I2C_SDA_TS
TS_USBP _I2C_CLK
TS_USBN_I 2C_DA
TS_I2C_INT#_G ND
TS_I2C_RST #_GND
USB20_P5_ CAMERA
USB20_N5_ CAMERAUSB20_N5
USB20_P5
I2C_SDA_TS
I2C_SCL_TS
I2C_TS_INT #
I2C_TS_RST#
TS_I2C_INT#_G ND
TS_I2C_RST# _GND
I2C_TS_INT#
I2C_TS_RST#
PCH_ENVDD<1 7>
BKOFF#<58>
PCH_BKL_PW M<17>
EDP_HPD<16>
TS_EN<19,58>
DMIC_DATA_ R<56>
DMIC_CLK_R<56>
EDP_TXP0<6>
EDP_TXN0<6>
EDP_TXP1<6>
EDP_TXN1<6>
EDP_TXP2<6>
EDP_TXN2<6>
EDP_TXP3<6>
EDP_TXN3<6>
EDP_AUXP<6>
EDP_AUXN<6>
PANEL_OD_ EN<19>
USB20_P6<14>
USB20_N6<1 4>
I2C_SCL_T S<1 9>
I2C_SDA_TS< 19>
USB20_N5<14>
USB20_P5<14>
I2C_TS_INT#<15>
I2C_TS_RST #<15>
+LCDVDD+3VS +INVPWR_B+
+LCDVDD
+TS_PWR
+3VS
+INVPWR_B+
+LCDVDD
+LCDVDD
+3VS
+5VS
+TS_PWR
+3VS
+3VS
+19VB
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
eDP CONN.
Custom
38 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
eDP CONN.
Custom
38 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
eDP CONN.
Custom
38 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CX14 0.1U_0201_1 0V6K
1 2
CX9 220P_ 0402_50V8J
XESD@
1 2
CX6
1000P_0 402_50V7K
EMI@
1
2
C
X
3
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
CX15 0.1U_0201_1 0V6K
1 2
C
X
2
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
RX6 0_0603_ 5%@
1 2
RX305 100K _0402_5%
1 2
CX16 0.1U_0201_1 0V6K
1 2
RX20 0_040 2_5%TS_I2C@
1 2
RX21 0_040 2_5%TS_I2C@
1 2
RX7 0_0603_ 5%
1 2
CX17 0.1U_0201_1 0V6K
1 2
JEDP1
ACES_5020 3-04001-002
CONN@
SP010014B10
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
GND
41
GND
42
GND
43
GND
44
GND
45
GND
46
RX5 10K_0 402_5%@
1 2
RX302 1K_ 0402_5%
1 2
CX11 0.1U_0201_10 V6K
1 2
C
X
8
0.1U_0201_ 10V6K
@
1
2
CX18 0.1U_0201_10 V6K
1 2
RX8 0_04 02_5%@
1 2
C
X
4
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
@
1
2
RX303 1K_ 0402_5%
1 2
DX1
YSLC05CH_S OT23-3
XESD@
1
2
3
RX304 100K _0402_5%
1 2
C
X
7
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RX10 100K_ 0402_5%@
1 2
RX1
100K_040 2_5%
12
CX10 220P_ 0402_50V8J
XESD@
1 2
RX22 0_040 2_5%
TS_I2C@
1 2
CX12 0.1U_0201_10 V6K
1 2
CX19 0.1U_0201_10 V6K
1 2
RX3
0_0402_ 5%
@
1 2
RX12
10K_0402_ 5%
@
12
RX9 0_04 02_5%@
1 2
RX23 0_0402 _5%
TS_I2C@
1 2
UX1
SY6288C20A AC_SOT23-5
OUT
1
OC
3
GND
2
EN
4
IN
5
RX13 0_040 2_5%TS_USB@
1 2
RX4
100K_0402 _5%
12
CX13 0.1U_0201_10 V6K
1 2
CX20 0.1U_0201_10 V6K
1 2
LX1
HCB2012K F-221T30_0805
EMI@
1 2
RX25
0_0402_ 5%
NONTS_I2C@
12
RX11
133K_0402 _1%
@
12
C
X
1
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
RX19 0_040 2_5%TS_USB@
1 2
CX5
68P_0402_ 50V8J
XEMI@
1
2
RX24
0_0402_ 5%
NONTS_I2C@
12
www.laptoprepairsecrets.com
Page 34
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
0:DP
1:HDMI
Function
INPUT/OUTPUT A
OE#
A=B1B1
S
L
LHH
L
X
B2
Z
A=B2
NC
I2C Programmin g or pin stra p programming select.
I2C is only di sable when th is pin is '0'
0 : Pin Strap( I2C disable)( Default)
R : TI test mo de(I2C enable at 3.3V)
F : I2C enable d at 1.8V
1 : I2C enable d at 3.3V
DPEQ0,DPEQ1 : DP Receiver e qualization ga in
F,F(Default)
When I2C_EN is not '0' DPEQ 0 sets I2C adr ess
SSEQ0,SSEQ1 : USB receiver equalizer gain
for upstream f acing SSTXP/N
F,F(Default)
When I2C_EN is not '0' SSEQ 0 sets I2C adr ess
W=40mils
0921 change souce to +3VALW, CTRL to SUSP#
To PCH
need check pin4 CFG1
W=40mils
20190924 Vender
DP0_AUXP_C
DP0_AUXN_ C
DP_CA_DET
DP0_AUXP_C _SW
DP0_AUXN_C_ SW
DP0_AUXN_ PROT
DP0_AUXP_PR OT
DP0_AUXN_ PROT
DP0_AUXP _PROTDP0_AUX P
DP_AUX_PR OT
DP0_AUX N
DP_AUX_P ROT
DP0_RD_T XN3
DP0_RD_T XP3
DP0_RD_T XP0
DP0_RD_T XN0
CTL0_TBT _SDA
CTL1_TBT _HPDIN
DP0_HPD GPU_DP_HPD_RD
DP0_RD_TXP 1
DP0_RD_TXN 1
DP0_RD_TXN 2
DP0_RD_TXP 2
GPU_DP_AUX N_C
GPU_DP_AUX P_C
I2C_EN_TB T
DPEQ1_T BT
DPEQ0_A1_ TBT
A0_TBT
FLIP_TBT _CLK
DP0_TXN0_ C
DP0_TXP0 _C
DP0_TXN1_ C
DP0_TXP1 _C
DP0_TXN2_ C
DP0_TXP2 _C
DP0_TXP3 _C
DP0_TXN3_ C
I2C_EN_TBT
DPEQ1_T BT
DPEQ0_A1_ TBT
A0_TBT
FLIP_TBT_C LK
CTL0_TBT _SDA
CTL1_TBT _HPDIN
SUSP#
DP0_HPD
DP0_AUXP_C _SW
DP0_AUXN_C_ SW
DP0_RD_TXN 2_C
DP0_RD_TXP2 _C
DP0_RD_TXN3 _C
DP0_RD_TXP3 _C
DP0_RD_TXN1 _C
DP0_RD_TXP1 _C
DP0_RD_TX P0_C
DP0_RD_TXN0 _C
DP0_HPD
DP0_RD_TXN 2
DP0_RD_TXP 2
DP_CA_DET
DP0_RD_TXN 3
DP0_RD_TXN 1
DP0_RD_TXP 1
DP0_RD_TXP 3
DP0_RD_TXN 0
DP0_RD_TXP 0
GPU_DP_AUXN _C
GPU_DP_AUXP _C
DP0_AUXP<29>
DP0_AUXN<29>
3VSDGPU_EN<27,37>
DP0_TXN0<29>
DP0_TXP0<29>
DP0_TXN1<29>
DP0_TXP1<29>
DP0_TXN2<29>
DP0_TXP2<29>
DP0_TXP3<29>
DP0_TXN3<29>
SUSP#<58,68,78,85,88 ,90>
DP0_HPD_P CH<16,27>
+5VS
+3VSDGPU
+5VS
+5VS
+3VS_DP
+3VS_DP
+3VS_DP
+3VS_DP
+3VS_DP
+3VS_DP
+3VS_DP
+3VS_DP
+3VS_DP
+3VS_DP
+3VALW
+3VS+3VS
+3VS_DP
+3VS_DP
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
DP CONN (TUSB546)
Custom
39 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
DP CONN (TUSB546)
Custom
39 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
DP CONN (TUSB546)
Custom
39 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CV405 .1U_0402_16V 7KDP@
12
RV315 1K_04 02_5%DP@
1 2
RY35
1M_0402_5%
DP@
12
RV311 1K_0 402_5%@
1 2
C
V
3
0
9
1
U
_
0
2
0
1
_
6
.
3
V
6
M
@
1
2
R
V
3
1
9
1
0
0
K
_
0
4
0
2
_
5
%
D
P
@
12
CV407 .1U_0402_16V 7KDP@
12
E
B
C
Q45
MMBT3904_S OT23-3
DP@
2
13
CV693 .1U_0402_16 V7KDP@
12
R
V
3
1
8
1
0
0
K
_
0
4
0
2
_
5
%
D
P
@
12
RV907 1M_ 0402_5%DP@
1 2
UV3
SY6288C20A AC_SOT23-5
DP@
OUT
1
OC
3
GND
2
EN
4
IN
5
CV691 .1U_0402_16 V7KDP@
12
CV338 0.1U_0201 _10V6KDP@
1 2
RV302 0_0402_5%
DP@
1 2
E
B
C
Q46
MMBT3904_ SOT23-3
DP@
2
13
C
V
3
1
3
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
DP@
1
2
RV301 4.7K_ 0402_5%
@
1 2
RY25
100K_040 2_5%
DP@
1 2
CV404 .1U_0402_16V 7KDP@
12
C
V
3
1
0
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
DP@
1
2
RV300 4.7K_0 402_5%DP@
1 2
RV1654
100K_0402 _5%
@
12
JDP1
SDAN_613 007-020231
CONN@
DC06000AIB0
DP_PWR
20
GND
19
AUX_CH-
18
LAN2-
17
AUX_CH+
16
LAN2+
15
GND
14
GND
13
LAN3-
12
LAN1-
11
LAN3+
10
LAN1+
9
GND
8
GND
7
CA_DET
6
LAN0-
5
CFG1
4
LAN0+
3
HP_DET
2
GND
1
GND
24
GND
23
GND
22
GND
21
RV321
100K_0402 _5%
DP@
12
RY26
1M_0402_ 5%
1 2
CV408 .1U_0402_16V 7KDP@
12
UT1
TUSB546_Q FN40_4X6
DP@
PAD
41
VCC
1
VCC
6
VCC
20
VCC
28
DP0p
9
DP0n
10
DP1p
12
DP1n
13
DP2p
15
DP2n
16
DP3p
18
DP3n
19
RX1n
31
RX1p
30
RX2n
39
RX2p
40
TX1n
34
TX1p
33
TX2p
37
TX2n
36
SSTXp
8
SSTXn
7
SSRXp
5
SSRXn
4
EQ1
35
EQ0
38
RESVD1
29
RESVD2
32
I2C_EN
17
DPEQ1
2
DPEQ0/A1
14
SSEQ1
3
SSEQ0/A0
11
SBU1
27
SBU2
26
AUXp
24
AUXn
25
FLIP/SCL
21
CTL0/SDA
22
CTL1
23
RV307 1K_04 02_5%DP@
1 2
C
V
3
0
8
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
DP@
1
2
R
V
3
2
0
1
0
0
K
_
0
4
0
2
_
5
%
D
P
@
12
RV313 1K_0 402_5%DP@
1 2
R521
10K_0402_ 5%
DP@
1 2
QY3
LBSS139WT 1G_SC70-3
DP@
Gate
2
Source
3
Drain
1
CV696 .1U_0402_16V 7KDP@
12
TH40 TP@
C
V
3
1
2
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
DP@
1
2
RV304 1K_04 02_5%DP@
1 2
RV908
100K_0402 _5%
DP@
12
RV306 1K_04 02_5%@
1 2
TH43 TP@
C2776
0.01U_020 1_6.3V7K
DP@
1
2
CV692 .1U_0402_16V 7KDP@
12
CV403 .1U_0402_16V 7KDP@
12
RV305 1K_04 02_5%@
1 2
CV690 .1U_0402_16V 7KDP@
12
RV309 1K_0 402_5%DP@
1 2
CV410
0.1U_0201_ 10V6K
DP@
12
UV42
SN74CBT325 7CRGYR_QFN16_4X3P5
DP@
S
1
1B1
2
1B2
3
2B1
5
2B2
6
1A
4
2A
7
GND
8
3A
9
3B2
10
3B1
11
4A
12
4B2
13
4B1
14
OE
15
Vcc
16
T-PAD
17
G
D
S
QY4A
2N7002KDW_ SOT363-6
DP@
2
61
C
V
3
1
1
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
DP@
1
2
CV406 .1U_0402_16V 7KDP@
12
CV697 .1U_0402_16V 7KDP@
12
CV402 .1U_0402_16V 7KDP@
12
RV312 1K_0 402_5%@
1 2
RV317 1K_0 402_5%DP@
1 2
CV694 .1U_0402_16V 7KDP@
12
CV339
0.1U_0201_ 10V6K
DP@
1 2
C
V
4
0
1
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
D
P
@
1
2
CV409 .1U_0402_16V 7KDP@
12
RV316 1K_0 402_5%@
1 2
TH45 TP@
RV308 1K_0 402_5%@
1 2
R4080
10K_040 2_5%
DP@
12
CV695 .1U_0402_16V 7KDP@
12
CV337 0.1U_0201 _10V6KDP@
1 2
G
D
S
QY4B
2N7002KDW _SOT363-6
DP@
5
34
TH42 TP@
RV314 1K_0 402_5%@
1 2
R4081
10K_0402 _5%
DP@
12
RV310 1K_0 402_5%DP@
1 2
R
V
3
2
2
1
0
0
K
_
0
4
0
2
_
5
%
DP@
12
TH44 TP@
www.laptoprepairsecrets.com
Page 35
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HDMI connector
Enhance Vswing
HPD_SNK intern al PD 150K oh m
Placed close to REXT pin.
HDMI_ID enable ; Internal pull down;3.3V I/O
L: Default, HDMI ID enable
H: HDMI ID disable
Output pre-emphasis setting;Internal pull-up 3.3V I/O
L: Pre-emphasis =2.5dB
H: Default, No Pre-emphasis
I2C Slave Address selection; Internal pull down;3.3V I/O
L: Default, Slave address 0x10-0x2F.
H: Alternative salve address 0x90-0x9F, 0xD0-0xDF.
Receiver equalization setting(Internal 150K PD)
(*) L: programmable EQ for channel loss up to 5.3dB
( ) H: programmable EQ for channel loss up to 10dB
( ) M: programmable EQ for channel loss up to 14dB
DC coupling enable; Internal pull up, 3.3V I/O.
L: DC coupling input
H: Default,AC coupling input
RY11 design guide rev 2.0
use 20K pull down.
3ohm/10pF
W=40mils
20191016
- Add for EMI test
20191016
- Add for EMI test
20191030
- Vender confirm
20191030
20191105
- DY1 DY2 DY3 for EE LL
20191206
- Remove RY53/RY52/CY27
- LS15 change to pop (EMI@)
HDMI_RT_CLK N
HDMI_RT_CLK P
HDMI_RT_TX_ P0
HDMI_RT_TX_ N0
HDMI_RT_TX_ P1
HDMI_RT_TX_ N1
HDMI_RT_TX_ N2
HDMI_RT_TX_ P2
HDMI_RT_HPD
HDMI_CTRL_C LK
HDMI_CTRL_D AT
HDMI_HPD
HDMI_EQ
HDMI_I2C_ADD R
RESET#
HDMI_ID
HDMI_RT_HPD
HDMI_RT_R_C LKN
HDMI_RT_R_C LKP
HDMI_RT_R_T X_P0
HDMI_RT_R_T X_N1
HDMI_RT_R_T X_P1
HDMI_RT_R_T X_N2
HDMI_RT_R_T X_P2
HDMI_DCIN_EN
HDMI_PRE
HDMI_CLKN
HDMI_CLKP
HDMI_TX_P0
HDMI_TX_N0
HDMI_TX_P1
HDMI_TX_N1
HDMI_TX_P2
HDMI_TX_N2
HDMI_ID
HDMI_PRE
HDMI_I2C_AD DR
HDMI_EQ
HDMI_DCIN_E N
HDMI_HPD
GPU_DP2_C TRL_DAT
GPU_DP2_C TRL_CLK
HDMI_CTRL_ CLK
HDMI_CTRL_ DAT
RESET#
HDMI_RT_TX _P1
HDMI_RT_TX _N1
HDMI_RT_TX _P2
HDMI_RT_TX _N2
HDMI_RT_TX_ P1
HDMI_RT_TX_ N1
HDMI_RT_TX_ P2
HDMI_RT_TX_ N2
HDMI_RT_TX _P0
HDMI_RT_TX _N0
HDMI_RT_CL KP
HDMI_RT_CL KN
HDMI_RT_TX_ P0
HDMI_RT_TX_ N0
HDMI_RT_CLK P
HDMI_RT_CLK N
HDMI_RT_HPD
HDMI_CTRL_C LK
HDMI_CTRL_ DAT
HDMI_RT_TX_ N0
HDMI_RT_TX_ P0
HDMI_RT_TX_ N1
HDMI_RT_TX_ P1
HDMI_RT_TX_ N2
HDMI_RT_TX_ P2
HDMI_RT_R_ TX_N0
HDMI_RT_R_C LKN
HDMI_RT_R_C LKP HDMI_RT_CL KP
HDMI_RT_CL KN
HDMI_CTRL_ DAT
HDMI_CTRL_ CLK
HDMI_CTRL_ DAT
HDMI_CTRL_ CLK
GPU_DP2_P3<29>
GPU_DP2_N3<29>
GPU_DP2_P2<29>
GPU_DP2_N2<29>
GPU_DP2_P1<29>
GPU_DP2_N1<29>
GPU_DP2_P0<29>
GPU_DP2_N0<29>
HDMI_HPD_P CH<1 6,27>
GPU_DP2_CTR L_CLK<2 9>
GPU_DP2_CTR L_DAT<29>
+HDMI_5V_OU T
+3VS
+1.2V_HDMI
+5VALW
+3VS
+1.2V_HDM I
+3VS
+3VS
+3VS
+3VS+3VS
+1.8VSDGPU_ AON
+HDMI_5V_OU T
+1.8VSDGPU_A ON
+3VS
+HDMI_5V_O UT
+5VS +HDMI_5V_OU T
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
HDMI CONN.
Custom
40 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
HDMI CONN.
Custom
40 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
HDMI CONN.
Custom
40 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RY40 2.2K_040 2_5%
1 2
CV434
0.1U_0201_ 10V6K
1
2
CY16 .1U_0402 _16V7K
1 2
U15
PS8409AQFN4 8GTR2-A0_QFN48_6X 6
SA0000AC320
S IC PS8409AQFN48GTR2-A2 Q FN48P REPEATER
VDD12
6
VDD12
30
VDDA12
11
VDDRX12
46
VDD33
1
IN_D2p
38
IN_D2n
39
IN_D1p
41
IN_D1n
42
IN_D0p
44
IN_D0n
45
IN_CLKp
47
IN_CLKn
48
DCIN_ENB
3
EQ
5
I2C_ADDR
31
HPD_SNK
21
REXT
36
PDB
4
RESETB
35
PRE
27
OUT_D2p
23
OUT_D2n
22
OUT_D1n
19
OUT_D1p
20
OUT_D0n
16
OUT_D0p
17
OUT_CLKn
13
OUT_CLKp
14
SCL_SRC/AUXP
34
SDA_SRC/AUXN
33
SCL_SNK
7
SDA_SNK
8
HPD_SRC
40
VDDRX12
43
VDD33
24
EPAD
49
VDDTX12
15
VDDTX12
18
RSV1
10
NC
25
RSV2
26
TESTMODEB
2
HDMI_ID
32
HDMI_CEC
9
POWERSWITCH
37
CSCL
29
CSDA
28
CEC_EN
12
RY24
1M_0402_ 5%
1 2
RV435
4.99K_0402_ 1%
12
CV427
0.1U_0201_ 10V6K
1
2
CY17 .1U_0402 _16V7K
1 2
RV438 4.99 K_0402_1%
1 2
RV445
4.7K_0402_ 5%
@
12
UY2
AP2330W-7_ SC59-3
GND
2
OUT
3
IN
1
RV436
10K_0402_1 %
12
CV432
0.01U_0402_ 16V7K
1
2
RY42 2.2K_040 2_5%
1 2
G
D
S
QY2A
2N7002KDW_ SOT363-6
2
61
CV433
0.01U_0402_ 16V7K
1
2
RV442
4.7K_0402_ 5%
@
12
CV438
10U_0402_ 6.3V6M
1
2
CY18 .1U_0402 _16V7K
1 2
CY23
0.1U_0201_ 10V6K
1
2
JHDMI1
ACON_HMR2 E-AK120D
CONN@
DC232000Y00
D2+
1
D2_shield
2
D2-
3
D1+
4
D1_shield
5
D1-
6
D0+
7
D0_shield
8
D0-
9
CK+
10
CK_shield
11
CK-
12
CEC
13
Reserved
14
SCL
15
SDA
16
DDC/CEC_GND
17
+5V
18
HP_DET
19
GND
20
GND
21
GND
22
GND
23
RV443
4.7K_0402_ 5%
@
12
RY41 2.2K_0 402_5%
1 2
CV429
0.01U_0402 _16V7K
1
2
T212
TP@
RV441
4.7K_0402_ 5%
@
12
CY19 .1U_0402 _16V7K
1 2
CV426
0.1U_0201_ 10V6K
1
2
U14
RT9059GQW_W DFN10_3X3
SA000071S00
S IC RT9059GQW WDFN 10P LDO
PGOOD
5
ADJ/NC
4
VOUT
1
VOUT
2
VOUT
3
VIN
9
VIN
7
VIN
8
EN
6
VDD
10
PAD
11
T213
TP@
T4
TP@
RY43 2.2K_0 402_5%
1 2
DY1
AZC099-04 S.R7G_SOT23-6
XESD@
SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
RY46 0_0402_5%
1 2
CV428
0.01U_0402_ 16V7K
1
2
CY24 .1U_04 02_16V7K
1 2
CY20 .1U_04 02_16V7K
1 2
RY45 0_0402_5%
1 2
CV437
22P_0402_5 0V8J
@
1
2
RY44 0_0402_5%
1 2
CV430
0.01U_0402_ 16V7K
1
2
DY2
TVWDF100 4AD0_DFN9
XESD@
SC300003Z00
4
5
1
6
2
7
9
8
3
CY21 .1U_04 02_16V7K
1 2
RY47 0_0402_5%
1 2
CV436
10U_0402 _6.3V6M
12
RV440
4.7K_0402_ 5%
12
CY22 .1U_04 02_16V7K
1 2
SGD
QY1A
PJT138KA_S OT363-6
5
34
RY48 0_0402_5%
1 2
RV444
4.7K_0402_ 5%
@
12
DY3
TVWDF100 4AD0_DFN9
XESD@
SC300003Z00
4
5
1
6
2
7
9
8
3
CV425
0.1U_0201_ 10V6K
1
2
CV435
1U_0201_6 .3V6M
12
RY11
100K_0402 _5%
1 2
RY49 0_0402_5%
1 2
CV431
1U_0201_6 .3V6M
1
2
T3
TP@
G
D
S
QY2B
2N7002KD W_SOT363-6
5
34
RV437
10K_0402_ 5%
1 2
G
S
D
QY1B
PJT138KA _SOT363-6
61
2
CV439
10U_0402_ 6.3V6M
1
2
LS15
HCM1012GH 900BP_4P
SM070003V00
EMI@
12
3 4
www.laptoprepairsecrets.com
Page 36
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
confirm realtek hand-shake
L
L
H
H
H
5441E Current Limit
MODE
3A
0.9A
1.5A
M0M1
H
L
3.5A
limit point
1.92A
H
RTS5441 M0 truth table by 2018 BIOS spec
MODE
1.5A
3A
Condition
Battery <30% when DC mode
AC mode or Battery >30%
TYPEC_1P5A_EC
Close to Pin13
20191014
- Change to "with no Dual Role support"
- 5441E only uses the function of CC & Power SW
Close to Pin19
PLUG_ORI
M1 M0
OCP_DET#
VMON
CC1_VCONN
CC2_VCONN
PLUG_ORI
M0
M1
VMON
USBC_EN
OCP_DET#
CC1_VCONN
CC2_VCONN
TYPEC_1 P5A_EC <43,58>
CC1_VCONN <43>
CC2_VCON N <43>
USBC_EN<43>
OCP_DET#<43>
USB_TYPE C_EN<58>
+3VO_MUX +3VO_MUX
+5VALW_M UX +USB3_VCCC
+5VALW_MU X+ 3VO_MUX
+5VALW +5VALW_MUX
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMP ETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CC+USB TYPE C
Custom
42
112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CC+USB TYPE C
Custom
42
112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CC+USB TYPE C
Custom
42
112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CS14
4.7U_0402_ 6.3V6M
1
2
RS20
4.7K_0402_5 %
12
RS135
10K_0402_ 1%
12
RS4
10K_0402_ 5%
@
12
RS128
10K_0402_ 5%
12
RS3
10K_0402_ 5%
12
RS134
200K_0402 _1%
12
C
S
1
5
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RS2
10K_0402_5 %
@
12
RS137 0_0 402_5%
@
1 2
RS1
10K_0402_5 %
12
C
S
1
1
6
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
US14
SY6288C20A AC_SOT23-5
OUT
1
OC
3
GND
2
EN
4
IN
5
CS130 220P_040 2_50V8J
1 2
10 Gbps 2:1 MUX
Type-C Port Side
System side
US3
RTS5441E -GRT_QFN24 _4X4
SA0000C3L00
VBUS_EN
15
CURRENT_M0
22
SSTX_1N/2P
7
SSRX_1P/2N
4
SSRX_1N/2P
5
REXT
18
GPIO
23
E-PAD
25
LDO_3V3
20
CURRENT_M1
21
5V_IN19VCON_IN
13
SSTX_1P/2N
6
OCP_DET
16
VMON
17
CC1
12
CC2
14
C_TX2_1N/2P
10
C_TX2_1P/2N
11
C_RX2_1P/2N
24
C_RX2_1N/2P
1
C_TX1_1P/2N
8
C_TX1_1N/2P
9
C_RX1_1P/2N
2
C_RX1_1N/2P
3
CS129 220P_040 2_50V8J
1 2
RS114
10K_0402 _5%
@
12
RS115
10K_0402 _5%
12
RS129
6.2K_0402_ 1%
12
CS117
0.1U_0201_ 10V6K
1
2
www.laptoprepairsecrets.com
Page 37
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SM070005U00
20191015 - Pin SWAP for lay out
20191016 For E SD request - Gen2 Solution SC300006T00
CC1_VCONN & CC2_VCONN need 20miil trace width.
Footprint : G518
PN : SA0000BDN00
(SILERGY SY6861B1)
check bios
1050 is use PCH output
2.54
3.53
6.2
2.67A
3.5A
1.94
limit point
1.09A
1.92A
LL
*H
H
L
H
L
H
GPP_B1
(TYPEC_1P5A)
G518 MOS Current Limit
MODERSET(kΩ )
1.5A
0.9A
2A
3A
GPP_B4
(TYPEC_3A)
20191014
- Change to "with no Dual Role support"
- CS112/113/114/115 change to 0.33U
20191016
- USB3 Port5 change to Port3
20200114
-RS112 Change to R-short
TBTA_SBU2TBTA_SBU2
CC2_VCON NCC2_VCON N
CC1_VCON NCC1_VCON N
TBTA_SBU1TBTA_SBU1
USB3_CC_T X_N3_C
USB3_CC_T X_P3_C USB3_CC_T X_P3_C
USB3_CC_T X_N3_C
USB3_CC_T X_P4_C
USB3_CC_T X_N4_C
USB3_CC_R X_P3_C
USB3_CC_R X_N3_CUSB3_CC_R X_N3_C
USB3_CC_R X_P3_C
USB3_CC_TX _P4_C
USB3_CC_TX _N4_C
TBTA_SBU1
TBTA_SBU2
USB20_P 4_L
USB20_N 4_L USB20_P4_ L
USB20_N4 _L
USB3_CC_RX _N3_C
USB3_CC_RX _P3_C USB3_CC_T X_P3_C
USB3_CC_T X_N3_C
USB3_CC_R X_P4_C
USB3_CC_R X_N4_C
USB3_CC_TX _P4_C
USB3_CC_TX _N4_C
RSET
RSET
USB3_CC_R X_N3_C
USB3_CC_R X_P3_C
USB3_CC_T X_P3_C
USB3_CC_T X_N3_C
USB3_CC_T X_N4_C
USB3_CC_T X_P4_C
USB3_CC_R X_P4_C
USB3_CC_R X_N4_C
USB3_CC_R X_P3_C
USB3_CC_R X_N3_C
USB3_PTX_D RX_P4
USB3_PTX_D RX_N4
USB3_PRX_D TX_N4
USB3_PRX_D TX_P4
USB3_CC_R X_N4_C
USB3_CC_R X_P4_C
USB3_CC_RX _N4_C
USB3_CC_RX _P4_C
USB3_CC_R X_N4_C
USB3_CC_R X_P4_C
USB20_P4_ L
USB20_N4_ L
USB20_P4_ L
USB20_N4_ L
USB20_P4_L
USB20_N4_L
USB20_P4
USB20_N4
USB3_PTX_D RX_P3
USB3_PTX_D RX_N3
USB3_PRX_D TX_P3
USB3_PRX_D TX_N3
CC1_VCONN<42 >
CC2_VCONN <42>
USBC_EN<42> USB_OC0# <14>
OCP_DET# <4 2>
TYPEC_1P5A _EC <42,58>
TYPEC_3A <1 8>
USB3_PTX_D RX_P4<17>
USB3_PTX_D RX_N4<17>
USB3_PRX_DT X_N4<17>
USB3_PRX_DT X_P4<17>
USB20_P4<14>
USB20_N4<1 4>
USB3_PTX_D RX_P3<17>
USB3_PTX_D RX_N3<17>
USB3_PRX_ DTX_P3<17>
USB3_PRX_ DTX_N3<17>
+USB3_VCC C +USB3_VCCC
+5VALW +USB3_VCCC
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CC+USB TYPE C
Custom
43
112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CC+USB TYPE C
Custom
43
112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
CC+USB TYPE C
Custom
43
112Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CS114 0.33U_020 1_6.3V6M
1 2
DS3
TVWDF1004 AD0_DFN9
ESD@
SC300006T 00
4
5
1
6
2
7
9
8
3
CS122 0.33U_0201_6 .3V6M
1 2
RS109
4.3K_0402_ 5%
12
C
S
9
8
2
2
U
_
0
8
0
5
_
2
5
V
6
M
@
1
2
LS10
DLM0NSN90 0HY2D_4P
EMI@
1
1
4
4
3
3
2
2
CS840.1U_0 402_25V6
12
CS115 0.33U_020 1_6.3V6M
1 2
CS13
10U_0603_ 25V6M
1
2
CS121 0.33U_0201_6 .3V6M
1 2
CS87 0.1U_0402 _25V6
1 2
RB77
47K_0402_ 5%
12
CS86
0.1U_0402 _25V6
12
C
S
9
9
2
2
U
_
0
8
0
5
_
2
5
V
6
M
@
1
2
G
D
S
QS2B
2N7002KDW _SOT363-6
5
34
C
S
9
6
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
G
D
S
QS2A
2N7002KDW _SOT363-6
2
61
C
S
9
7
0
.
1
U
_
0
4
0
2
_
2
5
V
6
@
1
2
RS133
220K_020 1_1%
1 2
CS123 0.33U_0201_6 .3V6M
1 2
DS6
TVWDF1004 AD0_DFN9
ESD@
SC300006T 00
4
5
1
6
2
7
9
8
3
DS4
TVWDF1004 AD0_DFN9
ESD@
SC300006T 00
4
5
1
6
2
7
9
8
3
RS132
220K_0201 _1%
1 2
CS112 0.33U_020 1_6.3V6M
1 2
CS85 0.1U_0402_ 25V6
1 2
RS112 0_ 0402_5%
@
1 2
RS130
220K_0201 _1%
1 2
CS124 0.33U_0201_6 .3V6M
1 2
CS113 0.33U_020 1_6.3V6M
1 2
DS5
TVWDF1004 AD0_DFN9
ESD@
SC300006T 00
4
5
1
6
2
7
9
8
3
+
C
S
9
5
1
5
0
U
_
D
2
_
6
.
3
V
Y
_
R
1
5
M
S
G
A
0
0
0
0
3
7
0
0
1
2
RS131
220K_0201 _1%
1 2
US11
G518B1TP1 U_TSOT23-6
OUT
1
GND
2
FLAG
3
EN
4
SET
5
IN
6
RS110
8.2K_0402_5 %
12
DS19
PESD24VS2 UT_SOT23-3
ESD@
SCA00004 500
2
3
1
JTYPEC1
SINGA_2UB3C 02-008111F
CONN@
DC23300TZA0
SINGA_2UB3C02-008111F_24P-T
SSRXN2
A10
SSRXP2
A11
GND
A12
DP1
A6
SSTXP1
A2
SSRXP1
B11
VBUS
A9
GND
A1
SSTXN1
A3
GND
B1
SSRXN1
B10
VBUS
B4
SSTXN2
B3
DP2
B6
DN2
B7
CC2
B5
CC1
A5
VBUS
A4
RFU2
B8
RFU1
A8
GND
B12
DN1
A7
SSTXP2
B2
VBUS
B9
GND
1
GND
4
GND
3
GND
2
GND
9
GND
10
GND
7
GND
8
GND
5
GND
6
CS100
0.1U_0201_1 0V6K
1
2
RS136 0_ 0402_5%
@
1 2
RS113
6.2K_0402_1 %
12
www.laptoprepairsecrets.com
Page 38
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
20190918
LAN more to IO/B
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
51 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
LAN Killer-E2600
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
51 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
LAN Killer-E2600
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
51 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
LAN Killer-E2600
www.laptoprepairsecrets.com
Page 39
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
60mil
W=60mils
Wireless LAN
NGFF WL+BT (KEY E)
KEY E
PCIE X1
(link to PICE Port 3)
(From PCH CLKOUT2)
PCIE CLK
(For BT)
For CNVi Feature
For ESD req reserve LC filter
close PCH
reserve for BT_ON OD pull high (1.0)
reserve 1000p for cnvi
reserve for cnvi
Co-layout with CNVi for SW debug
20191007
- Add RM62/63/64/65
UART BT
20191205 [FH5VF CNVi review]
Pin10 - RM41 Close to PCH
Pin14 - CLKREQ_CNV# PD RM69(71.5K) (Reserve)
Pin20 - UART_WAKE PU RM70(4.7K) (Reserve)
Pin22 - [email protected] / RH181@PCH
Pin32 - RM37@PCH / [email protected]
Pin34 - [email protected] / RH182@PCH
Pin36 - RM68@PCH / [email protected]
20191205
- RM66 Change to @ for Vender review
20191210C [FH51M CNVi review]
> RM69 change to 71.5k & CNVI@
> RM70 set CNVI@
> RH22 change to 20K
> RM36/RM37/RM67/RM68 change to 22 ohm
> RM16 recommend to 4.7K (no action)
> RM199 recommend to pop (no action)
> RM45 recommend to10K (no action)
> WL_OFF# recommend to PU 10K (no action)
20200114 - For CNVi
- CM51/CM53 Close to JNGFF1 Pin 2,4
- CM52/CM54 Close to JNGFF1 Pin 64,66
E51TXD_P8 0DATA_R
BT_ON
WLAN_PME#
WL_RST#_R
WL_OFF#
SUSCLK_R
E51TXD_P8 0DATA_R
E51RXD_P8 0CLK_R
WLAN_PME#
REFCLK_CNV _R
UART_2_PRX D_R_DTXD
UART_2_PTX D_R_DRXD
CLKREQ_CNV# _R
CNV_RF_RES ET#_R
BT_ON
UART_2_PRX D_R_DTXD
UART_2_PT XD_R_DRXD
PCM_OUT
PCM_CLK
UART_WAKE#
WAKE_BT
WAKE_BT_ R
WAKE_BT_ R
UART_WAK E#_R
PCM_CLK_R
PCM_CLK_R
PCM_OUT_R
PCM_OUT_R
UART_WAKE #_R
CNV_RGI_P RX_R_DTX
CNV_BRI_P TX_R_DRX
CLKREQ_CN V#
UART_WAKE #_R
WLAN_ON<58>
PCIE_PRX_DT X_N15<17>
PCIE_PRX_DT X_P15<17>
CLK_PCIE_WL AN<15>
WLAN_CLKR EQ#<15>
USB20_P14<14>
CLK_PCIE_WL AN#<15>
USB20_N14<14>
WL_OFF# <58>
PLT_RST_B UF# <16,68,69,73>
E51TXD_P8 0DATA <58>PCIE_PTX_C_ DRX_N15<17>
PCIE_PTX_C_D RX_P15<17>
SUSCLK <18, 68,69>
E51RXD_P8 0CLK <58>
BT_ON <16,5 8>
CNV_BRI_PRX _DTX <15>
CNV_RGI_PRX_ DTX <15>
CNV_BRI_P TX_DRX <15>
CNV_RGI_PT X_DRX <15>
REFCLK_CNV <15>
CLKREQ_CN V# <18 >
CNV_RF_RE SET# <1 8>
CLK_CNV_PRX _DTX_N<15 >
CLK_CNV_PRX _DTX_P<15>
CNV_PRX_D TX_N1<15>
CNV_PRX_D TX_P1<15>
CNV_PRX_D TX_N0<15>
CNV_PRX_D TX_P0<15>
CLK_CNV_PTX _DRX_N<15 >
CLK_CNV_PTX _DRX_P<15>
CNV_PTX_D RX_N1< 15>
CNV_PTX_D RX_P1<15>
CNV_PTX_D RX_N0< 15>
CNV_PTX_D RX_P0<15>
UART_2_PR XD_DTXD <19>
UART_2_PTXD _DRXD <19>
PCM_OUT <18 >
PCM_CLK <18 >
UART_WAKE# <18>
WAKE_BT <1 9>
+3VS
+3VS_WLAN
+3VALW +3VS_WLAN
+3VS_WLAN
+3VS_WLAN
+3VALW
+3VS_WLA N
+3VS_WLAN
+3VS_WLAN
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
M.2 Key E (WLAN)
Custom
52 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
M.2 Key E (WLAN)
Custom
52 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
M.2 Key E (WLAN)
Custom
52 112Tue sday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RM35 0 _0201_5%@
1 2
RM36 22_0402_5%CNVI@
1 2
RM16 10 K_0402_5%
12
RM66 0_0402_5%@
1 2
RM15 0_0201_5%@
1 2
C
M
5
3
0
.
0
1
U
_
0
2
0
1
_
6
.
3
V
7
K
@
1
2
C
M
1
4
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RM69 71.5K_0402 _1%CNVI@
1 2
CM18 100 0P_0402_50V7K
@
1 2
UM1
SY6288C20 AAC_SOT23-5
IOAC@
OUT
1
OC
3
GND
2
EN
4
IN
5
C
M
5
4
0
.
0
1
U
_
0
2
0
1
_
6
.
3
V
7
K
@
1
2
RM42 0_0402_5%UAR T@
1 2
CM17
0.1U_0201 _10V6K
XESD@
1
2
RM44 0 _0805_5%@
1 2
CM19
4.7U_0402 _6.3V6M
@
1
2
T53@
RM68 22_0402_5%CNVI@
1 2
C
M
5
1
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
@
1
2
RM43 0_0402_5%UAR T@
1 2
RM19
100K_040 2_5%
12
CM12
4.7U_0402_6 .3V6M
1
2
JNGFF1
BELLW_801 52-3221
CONN@
SP070013E00
GND_1
1
USB_D+
3
USB_D-
5
GND_7
7
SDIO_CLK
9
SDIO_CMD
11
SDIO_DAT0
13
SDIO_DAT1
15
SDIO_DAT2
17
SDIO_DAT3
19
SDIO_WAKE
21
SDIO_RST
23
GND_33
25
PET_RX_P0
27
PET_RX_N0
29
GND_39
31
PER_TX_P0
33
PER_TX_N0
35
GND_45
37
REFCLK_P0
39
REFCLK_N0
41
GND_51
43
CLKREQ0#
45
PEWAKE0#
47
GND_57
49
RSVD/PCIE_RX_P1
51
RSVD/PCIE_RX_N1
53
GND_63
55
RSVD/PCIE_TX_P1
57
RSVD/PCIE_TX_N1
59
GND_69
61
RSVD_71
63
RSVD_73
65
GND_75
67
3.3VAUX_2
2
3.3VAUX_4
4
LED1#
6
PCM_CLK
8
PCM_SYNC
10
PCM_OUT
12
PCM_IN
14
LED2#
16
GND_18
18
UART_WAKE
20
UART_TX
22
UART_RX
24
UART_RTS
26
UART_CTS
28
CLink_RST
30
CLink_DATA
32
CLink_CLK
34
COEX3
36
COEX2
38
COEX1
40
SUSCLK(32KHz)
42
PERST0#
44
W_DISABLE2#
46
W_DISABLE1#
48
I2C_DAT
50
I2C_CLK
52
I2C_IRQ
54
RSVD_64
56
RSVD_66
58
RSVD_68
60
RSVD_70
62
3.3VAUX_72
64
3.3VAUX_74
66
GND2
69
GND1
68
RM11 0 _0805_5%NIOAC@
1 2
C
M
1
3
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
@
1
2
C
M
1
5
1
U
_
0
2
0
1
_
6
.
3
V
6
M
@
1
2
RM40 0_0402_5%ESD@
1 2
C
M
5
2
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
@
1
2
RM12 0 _0201_5%@
1 2
RM62 0 _0402_5%UART_BT@
1 2
RM67 2 2_0402_5%CNVI@
1 2
RM41
75K_0402_1 %
CNVI@
1 2
RM34 0_0201_5%@
1 2
RM70 4.7K_0402 _5%C NVI@
1 2
T52@
RM37 2 2_0402_5%CNVI@
1 2
RM13 0 _0201_5%@
1 2
RM63 0_0402_5%UART_BT@
1 2
RM65 0_0402_5%UART_BT@
1 2
RM64 0_0402_5%UART_BT@
1 2
RM458.2K_0402_5 %
@
1 2
www.laptoprepairsecrets.com
Page 40
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Change PN to SM01000Q500
TO eDP cable
Fallow Raptor
Digital MIC
Headphone Out
Near pin 48
TO Audio Jack
LINE1-JD
100K
HP-JD
200K
RA21
Speaker
near
Pin41
near
Pin18
SM01000EJ00
3000ma 220ohm@100mhz
DCR 0.04
near
Pin20
SM01000EJ00
3000ma 220ohm@100mhz
DCR 0.05
near
Pin40
near
Pin46
ALC295 use ALC299 symbol
near
Pin3
M/B
IO/B
Raptor:289
MUTE#
BEEP
0926 1004
20191008
- RA39/RA38 change to 22k
- RA40 change to 5.1k
20191008
- change to unpop
20191016
- RA14 change to 0-ohm
20191025
- CA25 Change to 0201 SE00000UC00
20191025
- CA32 Change to 0201 SE00000UC00
20191104
- Config change to @
PCH_DMIC_DATA0
PCH_DMIC_CLK0
DMIC_DATA
DMIC_CLK DMIC_CLK_R
DMIC_DATA_R
RING2
SLEEVE
HPOUT_R
HPOUT_L
LINE1_L
HPOUT_L_1
HPOUT_R_1
LINE1_R
HP_PLUG#SENSE_A
HDA_SYNC_R
HDA_SDIN0_AUDIO
HDA_BITCLK_AUDIO
HDA_SDOUT_R
CPVEE
LINE1_R
LINE1_L
CODEC_VREF
+3VS_DVDDIO
SENSE_A
DMIC_CLK
DMIC_DATA
MONO_IN
+1.8VS_AVDD
MUTE#
HPOUT_L
HPOUT_R
SPKL-
SPKR-
SPKR+
SPKL+
RING2
SLEEVE
HDA_BITCLK_AUDIO
SPK_R+
SPK_R-
SPKR+
SPKR-
SPKL+
SPKL-
MUTE#
MONO_INBEEP#_R
PCH_DMIC_CLK0<18>
PCH_DMIC_DATA0<18>
DMIC_DATA_R <38>
DMIC_CLK_R <38>
RING2 <73>
SLEEVE <73>
HPOUT_R_1 <73>
HPOUT_L_1 <73>
HP_PLUG# <73>
HDA_SDOUT_R <18>
HDA_SYNC_R <18>
HDA_BIT_CLK_R <18>
HDA_SDIN0 <18>
SPKL+ <73>
SPKL- <73>
EC_MUTE#<58>
HDA_RST#_R<18>
PCH_SPKR<18,19>
BEEP#<58>
+MIC2_VREFO_L
+MIC2_VREFO_R
GNDA GND
+3VS_DVDD
+3VS
+3VS_DVDD
+5VS_PVDD +5VS_AVDD
GNDA GNDAGNDA
GNDA GNDA
GNDA
GNDA
+MIC2_VREFO_R
+MIC2_VREFO_L
GNDA
+3VS
+1.8VS
+5VALW
+3VS_DVDD
GNDAG ND
+5VS +5VS
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Audio Code ALC295
Custom
56 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Audio Code ALC295
Custom
56 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
Audio Code ALC295
Custom
56 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CA17 10U_0402_6.3V6M
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CONN@
SP02001CK00
1
1
2
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3
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12
UA1
ALC299-CG_MQFN48_6X6
SA0000A5L00
AVSS1
37
AVDD1
40
MIC2-CAP
32
VREF
38
MIC2-VREFO-R
29
HPOUT-L(PORT-I-L)
27
HPOUT-R(PORT-I-R)
26
PVDD1
41
CPVDD/AVDD2
20
LDO2-CAP
21
AVSS2
22
CBP
23
CBN
24
CPVEE
25
SPK-OUT-L+
42
SPK-OUT-L-
43
SPK-OUT-R-
44
SPK-OUT-R+
45
PVDD2
46
PDB
2
LINE1-L(PORT-C-L)
36
LINE1-R(PORT-C-R)
35
MIC2-R(PORT-F-R) /SLEEVE
31
MIC2-L(PORT-F-L) /RING2
30
DC-DET/EAPD
13
GPIO1/DMIC-CLK
5
I2C-CLK
7
I2C-DATA
6
AUDIOLINK:BCLK
14
DVDD-IO
18
I2S-IN
8
LDO3-CAP
19
DVDD
3
GPIO2/DMIC-DATA34
1
GPIO0/DMIC-DATA12
4
I2S-BCLK
10
I2S-OUT
9
5VSTB/AUX MODE
33
I2S-MCLK
11
I2S-LRCK
12
AUDIOLINK:SYNC
15
AUDIOLINK:SDATA-IN
16
AUDIOLINK:SDATA-OUT
17
MIC2-VREFO-L
28
PCBEEP
34
LDO1-CAP
39
I2S-IN/I2S-OUT-JD(JD2)
47
HP/LINE1-JD(JD1)
48
Thermal Pad
49
C
A
2
7
3
3
0
P
_
0
4
0
2
_
5
0
V
7
K
@
1
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5.1K_0402_1%
12
C
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1
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0
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1
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_
0
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6
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1
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@
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3
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7
K
@
1
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100P_0402_50V8J
@
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@
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12
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A
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_
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3
V
6
M
1
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RA22
10K_0402_5%
12
LA7 HCB1608KF-121T30_0603
EMI@
1 2
C
A
3
1
1
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_
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@
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3
5
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.
1
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6
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1
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A
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0
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1
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1 2
LA6 HCB1608KF-121T30_0603
EMI@
1 2
LA3 BLM15PX221SN1D_2PEMI@
SM01000Q500
12
RA17 47_0402_5%
1 2
C
A
4
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_
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1
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7
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@
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12
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A
8
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_
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0
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.
3
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6
M
1
2
CA24 4.7U_0402_6.3V6M
1 2
RA5 0_0402_5%
@
1 2
RA1 0_0402_5%
12
C
A
1
9
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RA31 0_0402_5%@
1 2
CA25 1U_0201_6.3V6M
1 2
RA16 47_0402_5%
1 2
CA36 0.1U_0201_10V6K
1 2
C
A
2
0
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RA30 0_0402_5%@
1 2
RA25
10K_0402_5%
@
12
C
A
1
2
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
RA9 0_0402_5%@
1 2
CA23
22P_0402_50V8J
XEMI@
1
2
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1 2
C
A
1
1
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
www.laptoprepairsecrets.com
Page 41
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
20mil
Ra
Rb
Board ID
- Analog Board ID definition,Please see page 3.
For Power consumption
Measurement
For turn off internal LPC module of KB9032
ESPI Bus Pin : 1~5.7.8.10.12.14
LPC Bus Pin : 3~5.7.8.10.12.13
CO-LAY with KB9032QA (SA000080J00)
PU at CPU side
EC Internal PU
For Thermal Portect Shu tdown
For abnormal shutdown
2015/1/9 acer require:
reserved protact circuit when
adaptor 107% happen
near SOC
20191008
- For KC3810
20191025
- Reserved Thermal_ALERT#
20191206
- RB79/RB80 change power source to +5VS
for power leakage .
20200211
- ADD PVT@ & PVTRGB@ for PVT BOM
20191211B
- CB12/CB13 change to 33p for ESD & ESD@
20200114
- CB6 Change to SE00000SE00 (0201)
20200114
- CB6 Change to SE00000SE00 (0201)
20200114
- RB87 Change to R-short
CLK_LPC_R
SYSON
KSI1
KSO9
BKOFF#
KSI7
FAN_SPEED1
LPC_AD1
AD_BID
KSI3
KSO4
PLT_RST#
EC_RSMRST#
KSO8
SUSP#
BATT_TEMP
KSI0
KSO1
TPM_SERIRQ
EC_RST#
LPC_AD2
ECAGND
KSO14
ADP_I
KSI4
EC_SCI#
LPC_AD3
MAINPWON
KSO15
KSO10
KSO0
LPC_AD0
LPC_FRAME#
AD_BID
KSO13
KSI2
KSO11
KSI6
+3VLP_ECA
KSO12
TP_CLK
KSI5
KSO7
E51TXD_P80DATA
BATT_BLUE_LED#
TP_DATA
KSO6
KSO5
PM_SLP_S3#
E51RXD_P80CLK
PWR_LED#
LID_SW#
EC_PECI
ACIN
ON/OFFBTN#
VCIN0_PH
VCIN1_ADP_PROCHOT
VCOUT1_PROCHOT
AC_PRESENT
ME_EN
EC_PME#
KSO2
KSO3
SUSPWRDNACK
SYS_PWROK_R
EC_ONPCH_PWROK
EC_VCCST_PG_R
ACIN
CLK_LPC_R
BATT_TEMP
ECAGND
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_DA1
EC_SMB_CK1
PBTN_OUT#
PM_SLP_S4#
ENBKL
KSO16
KSO17
+3VLP_LPC
PWR_SUSP_LED#
BEEP#
BATT_AMB_LED#
TP_PWR_EN
TP_EN
SYS_PWROK_R
3V_EN_R
PLT_RST#
EC_MUTE#
USB_EN
WLAN_ON
LID_SW#
GPU_OVERT#
3V_EN
MAINPWON
3V_EN_R
PCH_PWROK
EC_RSMRST#SPOK_3V5V
SW_PROCHOT#
VCOUT1_PROCHOT VCOUT1_PROCHOT
DGPU_AC_DETECT SW_PROCHOT#
VCOUT1_PROCHOT
EC_VCCST_PG_R
FP_PWR_EN
FAN_SPEED2
FAN_PWM2
VR_PWRGD
FAN_PWM1
EC_TP_INT#
DGPU_AC_DETECT
VR_ON
EC_CLR_CMOS
CHG_CTL3
CHG_CTL1
CHG_ILMSEL
SPOK_3V5V
SPOK_3V
SPOK_5V
EC_SMB_DA3
EC_SMB_CK3
SUSP#
SYSON
EC_RST#
VR_HOT#
SW_PROCHOT#H_PROCHOT#TURBO_EN#
USB_TYPEC_EN
TURBO_LED#
TURBO_EN#
ESB_CLK
ESB_DAT
TS_EN
WL_OFF#
GPIO0C
GPIO0B
GPIO0C
GPIO0B
VR_PWRGD
BT_ONBT_ON_R
IDCHG
EC_PME#
EC_CLR_CMOS
THERMAL_ALERT#
GPIO3F
GPIO3F
LPC_FRAME#<17>
LPC_AD2<17>
LPC_AD0<17>
LPC_AD3<17>
LPC_AD1<17>
TPM_SERIRQ<17,66>
ADP_I <84,85>
EC_RSMRST# <18>
SYSON <78,88>
CLK_LPC_R<17>
PCH_SML1DATA<18,27,66>
BATT_BLUE_LED# <62>
SUSP# <39,68,78,85,88,90>
EC_SCI#<19>
PLT_RST#<16,27,66>
PWR_LED# <62>
BKOFF# <38>
PCH_SML1CLK<18,27,66>
LID_SW# <66>
ME_EN <18>
AC_PRESENT<18>
TP_CLK <63>
TP_DATA <63>
ECAGND <66,84>
EC_VCCST_PG_R <10,78>
VCIN0_PH <84>
KSI[0..7]< 63>
KSO[0..17]<63>
VCIN1_ADP_PROCHOT <84>
MAINPWON <77,84,86>
EC_ON <86>
ON/OFFBTN# <63>
H_PECI <10,17>
EC_SMB_DA1<84,85>
EC_SMB_CK1<84,85>
PM_SLP_S3#<18,78>
PCH_PWROK<18,78>
ACIN <85>
BATT_TEMP <84,85>
SPOK_3V<86,89>
PBTN_OUT#<18>
PM_SLP_S4#<18,78>
ENBKL <17>
SUSPWRDNACK<18>
PWR_SUSP_LED#<62>
BEEP# <56>
BATT_AMB_LED# <62>
E51TXD_P80DATA<52>
E51RXD_P80CLK<52>
TP_PWR_EN <63>
EC_RST#<77>
TP_EN<63>
SYS_PWROK <18,78>
EC_MUTE# <56>
USB_EN <73>
WLAN_ON<52>
3V_EN <86>
FP_PWR_EN <66>
FAN_SPEED1<77>
FAN_SPEED2<77>
FAN_PWM2 <77>
FAN_PWM1 <77>
EC_TP_INT# <16,63>
DGPU_AC_DETECT <19,27,85>
VR_ON <78,90,91>
CHG_CTL3<71>
CHG_CTL1 <71>
CHG_ILMSEL < 71>
OVRM_EN<17,36>
BATT_4S <85>
VRAM_TEMP <66,84>
SPOK_5V <86>
EC_SMB_CK3 <63>
EC_SMB_DA3 <63>
CHG_EN <71>
KBL_EN<63>
TYPEC_1P5A_EC <42,43>
H_PROCHOT#< 10,85>
VR_HOT# <91>
TURBO_EN#<77>
USB_TYPEC_EN <42>
TURBO_LED# <77>
ESB_CLK<59>
ESB_DAT<59>
WL_OFF#<52>
TS_EN<19,38>
VCCCORE_VR_PWRGD<91>
BT_ON <16,52>
IDCHG <85>
EC_PME# <16,73>
PCH_RTCRST# <18>
THERMAL_ALERT# <66>
GPU_OVERT# <27>
+3VLP_EC
+3VLP_EC
+3VLP_EC
+3VLP
+3VLP_ECA
+3VLP_EC
+3VLP_EC
+3VLP_EC
+3VS
+3VALW
+5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
EC ENE-KB9022
Custom
58 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
EC ENE-KB9022
Custom
58 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
EC ENE-KB9022
Custom
58 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RB73 0_0402_5%@
1 2
RB11 2.2K_0402_5%
1 2
CB10 .1U_0402_16V7K
XESD@
1 2
RB6
33_0402_5%
XEMI@
12
RB18
0_0402_5%
@
1 2
CB6 100P_0201_50V8J
1 2
CB12
33P_0402_50V8J
ESD@
RB84 0_0402_5%@
1 2
DB1
RB751V-40_SOD323-2
1 2
RB76 0_0402_5%@
12
RB16 33_0402_1%
1 2
CB11 .1U_0402_16V7K
XESD@
1 2
CB4
0.1U_0201_10V6K
@
1
2
CB5 100P_0402_50V8J
XESD@
1 2
DB3 RB751V-40_SOD323-2
1 2
RB14
1K_0402_5%
1 2
C
B
2
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
DB2 RB751V-40_SOD323-2
1 2
RB3
S RES 1/16W 20K +-1% 0402
PVT@
SD034200280
RB1
100K_0402_1%
1 2
RB7 0_0402_5%
@
1 2
G
D
S
QB1A
2N7002KDW_SOT363-6
@
2
61
JPB1
JUMP_43X39
@
112
2
CB13
33P_0402_50V8J
ESD@
DB4 RB751V-40_SOD323-2
1 2
RB3
S RES 1/16W 43K +-1% 0402
PVTRGB@
SD034430280
RB78 10K_0402_5%
1 2
RB15
1M_0402_5%
1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
UB1
KB9022QD_LQFP128_14X14
GATEA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ
3
LPC_FRAME#
4
LPC_AD3
5
PM_SLP_S3#/GPIO04
6
LPC_AD2
7
LPC_AD1
8
VCC_LPC
9
LPC_AD0
10
GND
11
CLK_PCI_EC
12
PCIRST#/GPIO05
13
GPIO07
14
GPIO08
15
GPIO0A
16
GPIO0B
17
GPIO0C
18
AC_PRESENT/GPIO0D
19
EC_SCI#/GPIO0E
20
EC_VCCST_PG/GPIO0F
21
VCC
22
BEEP#/GPIO10
23
GND
24
PWM2/GPIO11
25
EC_FAN_PWM/GPIO12
26
AC_OFF/GPIO13
27
FAN_SPEED1/GPIO14
28
FANFB1/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
PCH_PWROK/GPIO18
32
VCC
33
SUSP_LED#/GPIO19
34
GND
35
NUM_LED#/GPIO1A
36
EC_RST#
37
CLKRUN#/GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
VCIN1_BATT_TEMP/AD0/GPIO38
63
VCIN1_BATT_DROP/AD1/GPIO39
64
ADP_I/AD2/GPIO3A
65
AD_BID/AD3/GPIO3B
66
AVCC
67
DA0/GPIO3C
68
AGND
69
EN_DFAN1/DA1/GPIO3D
70
DA2/GPIO3E
71
DA3/GPIO3F
72
EC_CIR_RX/AD6/GPIO40
73
SYS_PWROK/AD7/GPIO41
74
AD4/GPIO42
75
AD5/GPIO43
76
EC_SMB_CLK1/GPIO44
77
EC_SMB_DAT1/GPIO45
78
EC_SMB_CLK2/GPIO46
79
EC_SMB_DAT2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
EC_MUTE#/PSCLK1/GPIO4A
83
USB_EN#/PSDAT1/GPIO4B
84
PSCLK2/GPIO4C
85
PSDAT2/GPIO4D
86
TP_CLK/GPIO4E
87
TP_DATA/GPIO4F
88
GPIO50
89
BATT_CHG_LED#/GPIO52
90
CAPS_LED#/GPIO53
91
PWR_LED#/GPIO54
92
BATT_LOW_LED#/GPIO55
93
GND
94
SYSON/GPIO56
95
VCC
96
ENKBL/GPXIOA00
97
WOL_EN/GPXIOA01
98
ME_EN/GPXIOA02
99
EC_RSMRST#/GPXIOA03
100
GPXIOA04
101
VCIN1_ADP_PROCHOT/GPXIOA05
102
VCOUT1_PROCHOT#/GPXIOA06
103
VCOUT0_MAIN_PWR_ON/GPXIOA07
104
BKOFF#/GPXIOA08
105
GPXIOA09
106
PCH_PWR_EN/GPXIOA10
107
PWR_VCCST_PG/GPXIOA11
108
VCIN0_PH1/GPXIOD00
109
VCIN1_AC_IN/GPXIOD01
110
VCC0
111
EC_ON/GPXIOD02
112
GND
113
ON/OFF#/GPXIOD03
114
LID_SW#/GPXIOD04
115
SUSP#/GPXIOD05
116
GPXIOD06
117
PECI/GPXIOD07
118
MISO/GPIO5B
119
MOSI/GPIO5C
120
VR_ON/GPIO57
121
PBTN_OUT#/GPIO5D
122
PM_SLP_S4#/GPIO5E
123
V18R/VCC_IO2
124
VCC
125
SPICLK/GPIO58
126
DPWROK_EC/GPIO59
127
SPICS#/GPIO5A
128
RB79 4.7K_0402_5%
1 2
RB13 100K_0402_1%
1 2
LB2
FBMA-L11-160808-800LMT_0603
12
RB80 4.7K_0402_5%
1 2
RB87 0_0402_5%@
1 2
CB7
22P_0402_50V8J
XEMI@
12
CB8
0.1U_0201_10V6K
XESD@
1
2
RB81 0 _0402_5%
1 2
RB26
10K_0402_5%
12
RB3
0_0402_5%
@
1 2
RB19
0_0402_5%
@
1 2
LB1
FBMA-L11-160808-800LMT_0603
1 2
G
D
S
QB1B
2N7002KDW_SOT363-6
@
5
34
CB3
0.1U_0201_10V6K
1
2
G
D
S
QB6
L2N7002WT1G_SC-70-3
SB00001GE00
2
13
CB9
100P_0201_50V8J
1 2
RB4 47K_0402_5%@
1 2
RB82 0 _0402_5%
1 2
RB85 0 _0402_5%@
1 2
RB2
0_0402_5%
@
1 2
CB14 0.1U_0201_10V6K
1 2
RB10 2.2K_0402_5%
1 2
RB72 0_0402_5%@
1 2
RB86 0_0402_5%
@
1 2
RB83 0 _0402_5%@
1 2
C
B
1
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RB17
0_0402_5%
@
1 2
RB12 10K_0402_5%VGA@
1 2
www.laptoprepairsecrets.com
Page 42
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
OMEN New ESB CLK&DAT for Extend I/O
*NMI_DBG#: is a debug pin for EC to
infrom BIOS after press hot key.
ESB_CLK
ESB_DAT
KC3810_RST#
ESB_CLK
ESB_DAT
KC3810_RST#
ESB_DAT<5 8>
ESB_CLK<58>
+3VLP_EC
+3VLP_EC
+3VLP_EC
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
59 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
59 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
59 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
UK3
KC3810NF-A0_QFN24_4X4
SA00002AI00
KC3810@
GPIO0D/PWM1
19
GPIO0B
17
GPIO0A
16
GPIO09
15
GPIO08/CAS_DAT
14
GND
12
GPIO07/CAS_CLK
11
GPIO06
10
GPIO02
6
GPIO00
2
ESB_DAT
4
GPIO05
9
GPIO03
7
ESB_CLK
1
GPIO01
5
GPIO0E/PWM2
20
RST#
3
GPIO04
8
TEST_EN#
13
GPIO0C/PWM0
18
GPIO0F/PWM3
21
GPIO10/ESB_RUN#
22
GPIO11/BaseAddOpt
23
VCC
24
GND
25
RK207 4.7K_0402_5%
KC3810@
12
CK16
0.1U_0201_10V6K
KC3810@
1
2
RK208 4.7K_0402_5%
KC3810@
12
RK20
47K_0201_5%
KC3810@
12
C
K
2
0
2
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
K
C
3
8
1
0
@
1
2
www.laptoprepairsecrets.com
Page 43
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
I2CC_SCL
I2CC_SDA
TMS_SMB_CLK
TMS_SMB_DATA
(QF1)
2N7002DW
+3VS
2.2K
2.2K
+3VS
(QH7)
2N7002DW
+3VS
2.2K
2.2K
Cannonlake
PCH - H
PCH_SMBDATA
PCH_SMBCLK
2.2K
+3VALW
2.2K
Charger
2.2K
2.2K
CONN
BATTERY
EC_SMB_CK1
+3VLP_EC
KB9022
100 ohm
100 ohm
N17P-G0-K1
N18P-G0
SO-DIMM A & B
499
+3VALW
499
PCH_SML0CLK
PCH_SML0DATA
PCH_SML1CLK
PCH_SML1DATA
2.2K
+3VALW
2.2K
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK1_CHGR
0 ohm
0 ohm
EC_SMB_DA1
EC_SMB_DA1_CHGR
+3VS
D_CK_SCLK
D_CK_SDATA
(RH189/RH190)
R-short
EC_SMB_CK2
EC_SMB_DA2
(QV2)
PJT138KA
+1.8VSDGPU_MA IN
+1.8VSDGPU_A ON
1.8K
1.8K
VGA_I2CS_SCL
VGA_I2CS_SDA
I2CB_SCL
I2CB_SDA
2K
+1.8VSDGPU_ AON
2K
THERMAL SENSOR
2K
+1.8VSDGPU_ AON
2K
EC_SMB_CK1-1
EC_SMB_DA1-1
EC_SMB_CK3
EC_SMB_DA3
4.7K
+5VALW
4.7K
(QE62)
2N7002DW
+5VS_BL
EC_SMB_CK3_LEDDRV
EC_SMB_DA3_LEDDRV
2.2K
+5VS_BL
2.2K
NVVDD controller
LED driver
0 ohm
0 ohm
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
61 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N17E-GDDR5_D
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
61 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N17E-GDDR5_D
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
61 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N17E-GDDR5_D
www.laptoprepairsecrets.com
Page 44
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Power LED
Battery LED
20200211
- RG4/RG11 change to 1k
PWR_LED#
PWR_SUSP_LED#
BATT_BLUE_LED#
BATT_AMB_LED#
PWR_LED#<58>
PWR_SUSP_LED#<58>
BATT_BLUE_LED#<58>
BATT_AMB_LED#<58>
+5VALW
+5VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
62 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
LED
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
62 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
LED
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
62 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
LED
RG6
560_0402_5%
1 2
RG11
1K_0402_5%
1 2
RG10
560_0402_5%
1 2
RG4
1K_0402_5%
1 2
B
A
LED1
LTST-C295TBKF-CA_AMBER-BLUE
21
43
B
A
LED2
LTST-C295TBKF-CA_AMBER-BLUE
21
43
www.laptoprepairsecrets.com
Page 45
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
KB Conn. / Backlight
ON/OFF BTN
- For TEST
Touch Pad
PCH I2C
EC PS2
TP_PWR_EN follow SYSON behavior
LED driver
20191001
- Change to +5VS only
- KBL_EN only (Check EC Code)
- pop (Normal & RGB)
20200115
- R41/R18 change to R-short
20191016
- Remove QE62/RE70/RE69
- PU +5VALW @ EC
- Raptor: NC for 59116F
- Set RE64 to 10k / output = 1.875mA
AD3 AD2 AD1 AD0
0 0 0 1
20191017
- Add for EVT
20191206
- Add CK203 for ESD
20191211A
- CK203 change to 680p for ESD
20200114
- set EVT@
TP_CLK
TP_DATA
EC_TP_INT#
TP_EN
EC_TP_INT#
I2C_1_SDA_R
I2C_1_SCL_R
TP_DATA
TP_CLK
KSO1
KSO0
KSO5
KSO6
KSO13
KSO11
KSO2
KSO4
KSO3
KSO7
KSO8
KSO12
KSO10
KSO9
KSO15
KSO14
KSO[0..17]
KSI[0..7]
KB_A_LED_R_DRV#
KB_A_LED_B_DRV#
KB_A_LED_G_DRV#
KB_B_LED_B_DRV#
KB_B_LED_G_DRV#
KB_B_LED_R_DRV#
KB_C_LED_B_DRV#
KB_C_LED_R_DRV#
KB_C_LED_G_DRV#
KB_D_LED_B_DRV#
KB_D_LED_R_DRV#
KB_D_LED_G_DRV#
KSO16
KSO17
KSI1
KSI6
KSI5
KSI7
KSI2
KSI0
KSI3
KSI4
ON/OFFBTN#
TP_CLK
TP_DATA
EC_TP_INT#
TP_EN
I2C_1_SCL_R
I2C_1_SDA_R
ON/OFFBTN#
EC_SMB_CK3
EC_SMB_DA3
EC_SMB_CK3_LEDDRV
EC_SMB_DA3_LEDDRV
AD3
AD0
AD1
AD2
KB_A_LED_R_DRV#
KB_A_LED_B_DRV#
KB_A_LED_G_DRV#
KB_B_LED_B_DRV#
KB_B_LED_G_DRV#
KB_B_LED_R_DRV#
KB_C_LED_B_DRV#
KB_C_LED_R_DRV#
KB_C_LED_G_DRV#
KB_D_LED_B_DRV#
KB_D_LED_R_DRV#
KB_D_LED_G_DRV#
AD2
AD1
AD0
AD3
TP_EN<58>
TP_CLK <58>
TP_DATA <58>
EC_TP_INT#<16,58>
I2C_1_SCL<19>
I2C_1_SDA<19>
TP_PWR_EN<58>
KSO[0..17] <58>
KSI[0..7] <58>
ON/OFFBTN#<58>
KBL_EN<58>
EC_SMB_CK3<58>
EC_SMB_DA3<58>
+3VALW
+3V_PTP
+3VS
+3V_PTP
+3V_PTP
+3V_PTP +3V_PTP
+3VALW
+3V_PTP
+5VS_BL
+3V_PTP
+3VLP
+5VS_BL
+5VS
+5VS_BL
+5VS_BL+5VS_BL
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
KB & TP & TPM Connector
Custom
63 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
KB & TP & TPM Connector
Custom
63 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
KB & TP & TPM Connector
Custom
63 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
R18 0_0201_5%@
1 2
RK12 0_0402_5%
@
1 2
RE74
4.7K_0402_1%
LED14P@
12
RE65
4.7K_0402_1%
LED14P@
12
CK1
0.1U_0201_10V6K
@
12
G
D
S
QK1B
2N7002KDW_SOT363-6
5
3 4
RK50_0402_5%
@
12
RE64
10K_0402_5%
@
12
RE72
4.7K_0402_1%
LED14P@
12
C
K
2
4
.
7
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
RE1 0_0402_5%@
12
RK18 0_0603_5%@
1 2
RK11
4.7K_0402_5%
12
C
3
2
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
@
1
2
JBL1
ACES_51524-0040N-001
CONN@
SP010022M00
1
1
2
2
3
3
4
4
GND
5
GND
6
RK7
10K_0402_5%
1 2
RE2 0_0402_5%@
12
CK6 33P_0402_50V8J
XESD@
RE75
4.7K_0402_1%
LED14P@
12
UK1
SY6288C20AAC_SOT23-5
OUT
1
OC
3
GND
2
EN
4
IN
5
JTP1
JXT_FP202DH-008M10M
CONN@
SP010020L00
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
GND
9
GND
10
RK10
4.7K_0402_5%
12
CE3
0.1U_0201_10V6K
LED14P@
1
2
R17
100K_0402_5%
12
R41 0_0603_5%@
1 2
CK7 33P_0402_50V8J
XESD@
RK8
2.2K_0402_5%
12
CK3
1U_0201_6.3V6M
1
2
CK203
680P_0402_50V7K
ESD@
12
RK60_0402_5%
@
12
RK9
2.2K_0402_5%
12
DK2
AZC099-04S.R7G_SOT23-6
XESD@
SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
JKB1
ACES_85201-2805
CONN@
SP01000GO00
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
GND1
29
GND2
30
RK13
0_0402_5%@
1 2
SW1
TJG-533-V-T/R_6P
EVT@
3
2
1
4
5
6
JBL2
ACES_51522-01401-P01
CONN@
SP01001R800
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
GND
15
GND
16
UE4
TLC59116FIRHBR_VQFN32_5X5
LED14P@
OUT3
6
A2
1
A3
2
N.C.
12
OUT7
11
N.C.
29
RESET
24
GND
23
N.C.
30
OUT14
21
OUT6
10
OUT0
3
OUT1
4
OUT2
5
N.C.
28
Vcc
27
A0
31
A1
32
OUT5
9
N.C.
13
OUT8
14
OUT12
19
OUT13
20
OUT15
22
GND
7
OUT4
8
OUT9
15
OUT10
16
GND
18
OUT11
17
SDA
26
SCL
25
GND
33
RE73
4.7K_0402_1%
LED14P@
12
G
D
S
QK1A
2N7002KDW_SOT363-6
2
6 1
U4
SY6288C20AAC_SOT23-5
OUT
1
OC
3
GND
2
EN
4
IN
5
www.laptoprepairsecrets.com
Page 46
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3ohm/10pF
1A modify
1A modify
3V_PEN
1.8V_PEN
I2C
Default use 0ohm(WC33V@)
3ohm/10pF
MISC signal
EMR
SP01001UP00
20191008
- QY6/QY8 change to SB000016K00
20191206
- RH285/RH286/RH292 power source change to +3VALW
I2C_0_SDA_R
I2C_0_SDA_R
I2C_0_SCL_R
+3V_PEN_R
+1.8V_3V_PEN_R
PEN_PDCT_R#
PEN_PDCT_R#
PEN_IRQ_R#
PEN_PDCT#
PEN_IRQ#
PEN_RST_R#
PEN_RST#
I2C_0_SDA_R
I2C_0_SCL_R
FWE
FWE
PEN_IRQ_R#
PEN_RST_R#
I2C_0_SCL_R
PEN_IRQ_R#
PEN_PDCT_R#
PEN_RST_R#
I2C_0_SCL<19>
PEN_RST#<19>
I2C_0_SDA<19>
PEN_IRQ#<19>
PEN_PDCT#<19>
+3VALW +3VS +3V_PEN
+1.8VS+1.8VALW +1.8V_3V_PEN
+1.8V_3V_PEN
+1.8V_3V_PEN
+1.8V_3V_PEN
+3V_PEN
+1.8V_3V_PEN
+1.8V_3V_PEN
+1.8V_3V_PEN
+1.8V_3V_PEN
+1.8V_3V_PEN
+3VALW
+3VALW
+3VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
64 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
64 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
64 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
RH299 0_0402_5%@
1 2
RH293
0_0402_5%
WC33V@
1 2
G
S
D
QY6B
PJT138KA_SOT363-6
WC18V@
61
2
RH279
0_0402_5%
WC33V@
1 2
QY10
LBSS139WT1G_SC70-3
WC18V@
Gate
2
Source
3
Drain
1
RH285 2.2K_0402_5%
WC33V@
12
JEMR1
ACES_50208-01201-P01
CONN@
9
9
10
10
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
GND1
13
GND2
14
11
11
12
12
RH271 0_0402_5%
@
1 2
RH275 2.2K_0402_5%
WC18V@
12
RH290 2.2K_0402_5%
WC18V@
12
RH292 2.2K_0402_5%
WC33V@
12
RH280
0_0402_5%
WC33V@
1 2
RH286 2.2K_0402_5%
WC33V@
12
RH297 0_0402_5%
WC33V@
1 2
RH276 2.2K_0402_5%
WC18V@
12
G
S
D
QY8B
PJT138KA_SOT363-6
WC18V@
61
2
RH277 0_0402_5%
@
1 2
RH295
2.2K_0402_5%
@
12
RH287
0_0402_5%
WC33V@
1 2
RH272 0_0402_5%
WC33V@
1 2
RH283 2.2K_0402_5%
WC18V@
12
RH296
2.2K_0402_5%
WC33V@
12
SGD
QY8A
PJT138KA_SOT363-6
WC18V@
5
34
RH278 0_0402_5%
WC18V@
1 2
RH298 0_0402_5%@
1 2
RH284 2.2K_0402_5%
WC18V@
12
RH288
0_0402_5%
WC33V@
1 2
SGD
QY6A
PJT138KA_SOT363-6
WC18V@
5
34
www.laptoprepairsecrets.com
Page 47
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THERMAL SENSOR
To Hall sensor/B
1
6
2
3
7
4
5
8
+FP_VCC(5V) +FP_VCC(3V)
ETU801 FA577E-1200
PIN
USBP
USBN
GND
NC
NC
D+
DGND
NC
NC
NC
NC
Finger Print
TPM
near
pin1
near
pin8,22
SA0000AQ250, S IC NPCT750AABYX QFN 32P TPM
SMBUS ADDRESS
1001_1000b
Close to VRAM choke
20191008
- C60 change to @
20191029
- RF12 & RH250 change to unpop
- Use PH204 @ Power
SMBUS ADDRESS
1001_1010b
Close to Thermal SKIN
Close to SO-DIMM
USB20_N8_L
FP_PWR_EN
USB20_N8_L
USB20_P8_L
USB20_P8_L
USB20_N8_L
TPM_BADD
PCH_SPI_CLK_TPM_R
PCH_SPI_SI_TPM_R
PCH_SPI_SO_TPM_R
PCH_SPI_CS#2
PCH_SPI_SO_TPM_R
PCH_SPI_SI_TPM_R
PCH_SPI_CLK_TPM_R
TMS_SMB_CLK
TMS_SMB_DATA
TMS_SMB_CLK
TMS_SMB_DATA
THERMAL_ALERT#
TH_THERM#
THERMAL2_ALERT#
USB20_P8_L
TH2_THERM#
TMS_SMB_CLK
TMS_SMB_DATA
THERMAL2_ALERT#
FP_PWR_EN<58>
USB20_N8<14>
USB20_P8<14>
PLT_RST#<16,27,58>
TPM_SERIRQ<17,58>
PCH_SPI_SO_R<16>
PCH_SPI_SI_R<16>
PCH_SPI_CLK_R<16>
PCH_SPI_CS#2<16>
LID_SW#<58>
PCH_SML1CLK<18,27,58>
PCH_SML1DATA<18,27,58>
THERMAL_ALERT# <58>
VRAM_TEMP <58,84>
ECAGND <58,84>
+FP_VCC
+5VALW
+3VALW
+FP_VCC
+FP_VCC
+3VALW +3VALW_TPM +3VS +3VS_TPM
+3VALW_TPM
+3VS_TPM
+3VALW
+3VLP
+3VS + 3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VLP_ECA
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
66 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Sensors/FP/TPM
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
66 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Sensors/FP/TPM
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
66 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Sensors/FP/TPM
R45
0_0603_5%
@
1 2
RK17 0_0402_5%
@
1 2
UK2
SY6288C20AAC_SOT23-5
FP@
OUT
1
OC
3
GND
2
EN
4
IN
5
R46
0_0603_5%
@
1 2
RF26
10K_0402_5%
TMS@
12
R52 33_0402_1%TPM@
1 2
CK4
1U_0201_6.3V6M
FP@
1
2
UF2
NCT7718W_MSOP8
TMS@
SA000067P00
ALERT#
6
T_CRIT#4GND
5
D+
2
D-
3
SCL
8
SDA
7
VDD
1
DK1
AZC099-04S.R7G_SOT23-6
FPESD@
SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
G
D
S
QF1B
2N7002KDW_SOT363-6
TMS@
5
3 4
U9
NPCT750AAAYX_QFN32_5X5
TPM@
SA0000AQ250
PLTRST
17
SCS/GPIO5
20
GND
23
NC
26
MOSI/GPIO7
21
NC
27
NC
15
NC
7
NC
2
NC
3
NC
9
VSB
1
SCLK
19
VHIO
8
NC
5
GPIO4
13
NC
14
NC
10
NC
11
NC
12
PP/GPIO6
4
PIRQ/GPIO2
18
NC
25
MISO
24
GND
16
VHIO
22
NC
28
GPIO3
6
SDA/GPIO0
29
SCL/GPIO1
30
NC
31
NC
32
PGND
33
RK209 0_0402_5%@
1 2
C
5
4
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
T
P
M
@
1
2
TH41
@
G
D
S
QF1A
2N7002KDW_SOT363-6
TMS@
2
6 1
RK15 0_0402_5%FP@
1 2
RF24
10K_0402_5%
TMS@
12
UF3
G781-1P8F_MSOP8
SA00000V200
TMS@
VCC
1
DXP
2
#ALERT
6
DXN
3
#THERM4GND
5
SMBDATA
7
SMBCLK
8
C
5
6
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
TPM@
1
2
R470_0402_5% @
1 2
C
5
5
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
TPM@
1
2
CF21
0.1U_0201_10V6K
TMS@
12
RK14 0_0402_5%
@
1 2
C
5
7
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
TPM@
1
2
JHS1
ACES_51524-0040N-001
CONN@
SP010022M00
1
1
2
2
3
3
4
4
GND
5
GND
6
CF20
0.1U_0201_10V6K
TMS@
1
2
RF9
2.2K_0402_5%
TMS@
12
RF12
16.5K_0402_1%
@
12
RF25 10K_0402_5%
TMS@
1 2
JFP1
ACES_51522-00801-001
CONN@
SP01001AE00
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1
9
G2
10
C
5
8
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
TPM@
1
2
R48
10K_0402_5%
TPM@
1 2
R50 33_0402_1%TPM@
1 2
RF10
2.2K_0402_5%
TMS@
12
RF23 10K_0402_5%
TMS@
1 2
RH250
100K_0402_1%_TSM0B104F4251RZ
SL200002H00
@
12
C
6
0
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
X
E
S
D
@
1
2
CK5
4.7U_0402_6.3V6M
FP@
1
2
R51 33_0402_1%TPM@
1 2
C
5
9
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
TPM@
1
2
RK16 0_0402_5%
@
1 2
www.laptoprepairsecrets.com
Page 48
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
20190918
Remove HDD Re-driver
FFC Type
100mils
20191016 change to SATA Port 0B
20200114
- RO25 change to R-short
SATA_PRX_C_DTX_P0B
SATA_PRX_C_DTX_N0B
SATA_PTX_C_DRX_N0B
SATA_PTX_C_DRX_P0B
G_INT2_R
SATA_PRX_DTX_P0B
SATA_PTX_DRX_N0B
SATA_PTX_DRX_P0B
SATA_PRX_DTX_N0B
SATA_PRX_DTX_P0B<17>
SATA_PTX_DRX_P0B<17>
SATA_PTX_DRX_N0B<17>
SATA_PRX_DTX_N0B<17>
+5VS +5VS_HDD
+5VS_HDD
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
HDD/ Re-Driver/ G-sensor
Custom
67 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
HDD/ Re-Driver/ G-sensor
Custom
67 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
HDD/ Re-Driver/ G-sensor
Custom
67 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RO4 0_0805_5%@
1 2
RO25 0_0201_5%@
1 2
CO14 0.01U_0201_6.3V7K
12
CO15 0.01U_0201_6.3V7K
12
CO16 0.01U_0201_6.3V7K
12
CO17 0.01U_0201_6.3V7K
12
C
O
1
2
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
12
JHDD1
ACES_51625-01201-001
CONN@
SP010028W00
8
8
9
9
10
10
1
1
2
2
3
3
4
4
5
5
6
6
7
7
GND
13
GND
14
11
11
12
12
CO13
0.1U_0201_10V6K
@
1
2
www.laptoprepairsecrets.com
Page 49
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place CM33 close UM2 pin 1&2
Place CM34 close UM2 pin 6&7
Pull high at PCH side
SP07001D300
PEDET(NC-PCIE/GND-SATA)
SATA Device 0
PCIE Device 1
Place close to JSSD pin 50
ESD request to reserve.
SP07001D300
Place close to JSSD pin 50
ESD request to reserve.
M.2 SSD
20191017 Power source
> +3VS_SSD2 : JSSD2
> +3VS_SSD3 : JSSD1 & JSSD3
PCIE_PRX_DTX_P9
PCIE_PRX_DTX_N9
PCIE_PRX_DTX_N11
PCIE_PRX_DTX_P11
PCIE_PTX_C_DRX_P11
PCIE_PTX_C_DRX_N11
PCIE_PRX_DTX_N10
PCIE_PTX_C_DRX_P10
PCIE_PRX_DTX_P10
PCIE_PTX_C_DRX_N10
PCIE_PTX_C_DRX_P9
PCIE_PTX_C_DRX_N9
PCIE_PRX_DTX_N12
PCIE_PRX_DTX_P12
PCIE_PTX_C_DRX_P12
PCIE_PTX_C_DRX_N12
+3VS_SSD_2
+3VS_SSD_3
+3V_NGFF_GATE
SSD2_DET#
SUSCLK_SSD2
SSD_DEVSLP1
SSD2_CLKREQ#_R
PLT_RST_BUF#
SSD1_DET#
SUSCLK_SSD1
PLT_RST_BUF#
PLT_RST_BUF#
PCIE_PTX_C_DRX_N22
PCIE_PTX_C_DRX_P22
PCIE_PTX_C_DRX_N23
PCIE_PTX_C_DRX_P23
PCIE_PTX_C_DRX_P24
PCIE_PTX_C_DRX_N24
PCIE_PTX_C_DRX_N21
PCIE_PTX_C_DRX_P21
SSD1_CLKREQ#_R
CLK_PCIE_NGFF1#<15>
CLK_PCIE_NGFF1<15>
PCIE_PRX_DTX_N9<17>
PCIE_PRX_DTX_P9<17>
PCIE_PRX_DTX_N11<17>
PCIE_PRX_DTX_P11<17>
PCIE_PRX_DTX_N10<17>
PCIE_PRX_DTX_P10<17>
PCIE_PTX_DRX_P9<17>
PCIE_PTX_DRX_N9<17>
PCIE_PTX_DRX_N12<17>
PCIE_PTX_DRX_P12<17>
PCIE_PTX_DRX_P11<17>
PCIE_PTX_DRX_N11<17>
PCIE_PTX_DRX_N10<17>
PCIE_PTX_DRX_P10<17>
PCIE_PRX_DTX_P12<17>
PCIE_PRX_DTX_N12<17>
SUSP#<39,58,78,85,88,90>
SATA_GP1<17>
SSD2_CLKREQ# <15>
PCIE_PRX_DTX_N24<14>
PCIE_PRX_DTX_N23<14>
PCIE_PRX_DTX_P22<14>
PCIE_PRX_DTX_N22<14>
PCIE_PRX_DTX_P24<14>
PCIE_PTX_DRX_N24<14>
PCIE_PTX_DRX_P24<14>
PCIE_PRX_DTX_P23<14>
PCIE_PTX_DRX_P22<14>
PCIE_PTX_DRX_P21<14>
PCIE_PTX_DRX_N21<14>
PCIE_PTX_DRX_P23<14>
PCIE_PTX_DRX_N23<14>
PCIE_PTX_DRX_N22<14>
PCIE_PRX_DTX_P21<14>
PCIE_PRX_DTX_N21<14>
SSD1_CLKREQ# <15>
CLK_PCIE_NGFF3<15>
CLK_PCIE_NGFF3#<15>
+3VS_SSD_2 +3VS_SSD_3
+3VALW
+5VALW
+3VALW
+3VS_SSD2
+3VS_SSD3
+3VS_SSD3
+3VS_SSD2
SUSCLK <18,52,68,69>
SSD_DEVSLP1 <17>
PLT_RST_BUF# <16,52,68,69,73>
SUSCLK <18,52,68,69>
PLT_RST_BUF# <16,52,68,69,73>
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
SATA/PCIE-SSD
Custom
68 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
SATA/PCIE-SSD
Custom
68 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
SATA/PCIE-SSD
Custom
68 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CM10 0.22U_0402_16V7K
1 2
CM36
0.1U_0201_10V6K
1
2
C
M
3
3
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
CM42 0.22U_0402_16V7K
1 2
CM7 0.22U_0402_16V7K
1 2
CM1
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
JSSD2
BELLW_80159-4221
CONN@
GND
1
3.3VAUX
2
PERp3
7
3.3VAUX
4
GND
9
N/C
6
GND
3
N/C
8
PERn3
5
DAS/DSS#
10
PETn3
11
3.3VAUX
12
PETp3
13
3.3VAUX
14
GND
15
3.3VAUX
16
3.3VAUX
18
N/C
20
N/C
22
N/C
24
N/C
26
N/C
28
N/C
30
N/C
32
N/C
34
N/C
36
DEVSLP
38
N/C
40
N/C
42
N/C
44
N/C
46
N/C
48
PERST#
50
CLKREQ#
52
PEWake#
54
GND
57
N/C
56
N/C
67
N/C
58
PEDET
69
GND
71
GND
73
GND
75
SUSCLK
68
3.3VAUX
70
3.3VAUX
72
3.3VAUX
74
GND
76
GND
77
PERn2
17
PERp2
19
PETn2
23
PETp2
25
GND
27
GND
21
PERn1
29
PERp1
31
GND
33
PETn1
35
PETp1
37
GND
39
PERn0/SATA_B+
41
PERp0/SATA_B-
43
GND
45
PETn0/SATA_A-
47
PETp0/SATA_A+
49
GND
51
REFCLKn
53
REFCLKp
55
CM8 0.22U_0402_16V7K
1 2
CM2
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
CM45 0.22U_0402_16V7K
1 2
CM39 100P_0402_50V8J
XESD@
12
CM16 1 00P_0402_50V8J
XESD@
12
CM47 0.22U_0402_16V7K
1 2
CM44
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RM54 0_ 0805_5%
@
1 2
CM6 0.22U_0402_16V7K
1 2
RM7 0_0201_5%@
1 2
RM57 0_0201_5%@
1 2
+
CM3
150U_D2_6.3VY_R15M
SGA00003700
1
2
C
M
3
4
1
U
_
0
2
0
1
_
6
.
3
V
6
M
1
2
RM55 0_0805_5%
@
1 2
+
CM50
150U_D2_6.3VY_R15M
SGA00003700
1
2
CM9 0.22U_0402_16V7K
1 2
CM46
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
1
2
CM48 0.22U_0402_16V7K
1 2
CM37 10 00P_0402_50V7K
1 2
UM2
EM5209VF_DFN14_2X3
GND
11
VIN2
6
VBIAS
4
ON2
5
VOUT2
9
VIN2
7
CT1
12
VOUT1
14
VOUT2
8
VOUT1
13
VIN1
2
ON1
3
VIN1
1
CT2
10
GPAD
15
RM8 0_0201_5%@
1 2
CM38 1000P_0402_50V7K
1 2
CM49 0.22U_0402_16V7K
1 2
CM4 0.22U_0402_16V7K
1 2
RM56 0_0201_5%@
1 2
CM11 0.22U_0402_16V7K
1 2
JSSD1
BELLW_80159-4221
CONN@
GND
1
3.3VAUX
2
PERp3
7
3.3VAUX
4
GND
9
N/C
6
GND
3
N/C
8
PERn3
5
DAS/DSS#
10
PETn3
11
3.3VAUX
12
PETp3
13
3.3VAUX
14
GND
15
3.3VAUX
16
3.3VAUX
18
N/C
20
N/C
22
N/C
24
N/C
26
N/C
28
N/C
30
N/C
32
N/C
34
N/C
36
DEVSLP
38
N/C
40
N/C
42
N/C
44
N/C
46
N/C
48
PERST#
50
CLKREQ#
52
PEWake#
54
GND
57
N/C
56
N/C
67
N/C
58
PEDET
69
GND
71
GND
73
GND
75
SUSCLK
68
3.3VAUX
70
3.3VAUX
72
3.3VAUX
74
GND
76
GND
77
PERn2
17
PERp2
19
PETn2
23
PETp2
25
GND
27
GND
21
PERn1
29
PERp1
31
GND
33
PETn1
35
PETp1
37
GND
39
PERn0/SATA_B+
41
PERp0/SATA_B-
43
GND
45
PETn0/SATA_A-
47
PETp0/SATA_A+
49
GND
51
REFCLKn
53
REFCLKp
55
RM53 0_0201_5%@
1 2
T211 @
CM41 0.22U_0402_16V7K
1 2
CM35
0.1U_0201_10V6K
1
2
CM40 0.22U_0402_16V7K
1 2
RM10 0_0201_5%@
1 2
CM43 0.22U_0402_16V7K
1 2
C
M
3
2
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
@
1
2
CM5 0.22U_0402_16V7K
1 2
www.laptoprepairsecrets.com
Page 50
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place close to JSSD pin 50
ESD request to reserve.
SP07001D300
PEDET(NC-PCIE/GND-SATA)
SATA Device 0
PCIE Device 1
1004
- Remove UM3
- Power sourc e merge +3VS_ SSD3
20191025
- SATA Port 4
20191206
- PEDET change to SATA_GP4
1210B
- Add SSD3 config
PCIE_PTX_C_DRX_N18
PCIE_PTX_C_DRX_P18
PCIE_PTX_C_DRX_N19
PCIE_PTX_C_DRX_P19
PCIE_PTX_C_DRX_P20
PCIE_PTX_C_DRX_N20
PCIE_PTX_C_DRX_N17
PCIE_PTX_C_DRX_P17
PLT_RST_BUF#
SSD3_DET#
PLT_RST_BUF#
SSD_DEVSLP4
SUSCLK_SSD3
SSD3_CLKREQ#_R
SATA_GP4<17>
PCIE_PRX_DTX_N18<17>
PCIE_PRX_DTX_P18<17>
PCIE_PTX_DRX_P19<17>
PCIE_PTX_DRX_N19<17>
PCIE_PRX_DTX_P19<17>
PCIE_PRX_DTX_N19<17>
PCIE_PTX_DRX_P20<17>
PCIE_PTX_DRX_N20<17>
PCIE_PRX_DTX_P20<17>
PCIE_PRX_DTX_N20<17>
PCIE_PTX_DRX_P18<17>
PCIE_PTX_DRX_N18<17>
PCIE_PTX_DRX_P17<17>
PCIE_PTX_DRX_N17<17>
PCIE_PRX_DTX_N17<17>
PCIE_PRX_DTX_P17<17>
SSD3_CLKREQ# <15>
CLK_PCIE_NGFF2<15>
CLK_PCIE_NGFF2#<15>
+3VS_SSD3
SSD_DEVSLP4 <17>
SUSCLK <18,52,68>
PLT_RST_BUF# <16,52,68,73>
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
69 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
69 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
69 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
CM27 0.22U_0402_16V7KSSD3@
1 2
RM61 0_0201_5%@
1 2
CM30 0.22U_0402_16V7KSSD3@
1 2
CM29 0.22U_0402_16V7KSSD3@
1 2
RM48 0_0201_5%@
1 2
+
CM20
150U_B2_6.3VM_R35M
SGA00009M00
SSD3@
1
2
JSSD3
BELLW_80159-4221
CONN@
GND
1
3.3VAUX
2
PERp3
7
3.3VAUX
4
GND
9
N/C
6
GND
3
N/C
8
PERn3
5
DAS/DSS#
10
PETn3
11
3.3VAUX
12
PETp3
13
3.3VAUX
14
GND
15
3.3VAUX
16
3.3VAUX
18
N/C
20
N/C
22
N/C
24
N/C
26
N/C
28
N/C
30
N/C
32
N/C
34
N/C
36
DEVSLP
38
N/C
40
N/C
42
N/C
44
N/C
46
N/C
48
PERST#
50
CLKREQ#
52
PEWake#
54
GND
57
N/C
56
N/C
67
N/C
58
PEDET
69
GND
71
GND
73
GND
75
SUSCLK
68
3.3VAUX
70
3.3VAUX
72
3.3VAUX
74
GND
76
GND
77
PERn2
17
PERp2
19
PETn2
23
PETp2
25
GND
27
GND
21
PERn1
29
PERp1
31
GND
33
PETn1
35
PETp1
37
GND
39
PERn0/SATA_B+
41
PERp0/SATA_B-
43
GND
45
PETn0/SATA_A-
47
PETp0/SATA_A+
49
GND
51
REFCLKn
53
REFCLKp
55
CM21 100P _0402_50V8J
XESD@
12
CM22 0.22U_0402_16V7KSSD3@
1 2
C
M
2
6
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
S
S
D
3
@
1
2
CM31 0.22U_0402_16V7KSSD3@
1 2
C
M
2
8
1
0
U
_
0
4
0
2
_
6
.
3
V
6
M
S
S
D
3
@
1
2
CM24 0.22U_0402_16V7KSSD3@
1 2
RM52 0_0201_5%@
1 2
CM25 0.22U_0402_16V7KSSD3@
1 2
CM23 0.22U_0402_16V7KSSD3@
1 2
www.laptoprepairsecrets.com
Page 51
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
USB3.0 Conn.
USB3.0
W=100mils
USB Host Charger
ILM R vaule
Ios(mA)=50250/R(Kohm)
ILIM_Hi=2273mA
ILIM_L=1288mA(reserve)
0904 vendor recommend
0831 Reserve ILIM_L R as vendor recommend
CHG_EN
0
1
1
1
0
Port power off
CTL1
SDP1-OFF
USB Host Charger Truth Table
CTL2 CTL3 ILIM_SEL
MODE
Current Limit
Setting
Note
SDP1
CDP
DCP
Auto
101
0 1 1 1
1 111
0 1 10
ILIM_H
ILIM_H
ILIM_H
ILIM_H
Data Lines Disconnected
Data Lines Connected
Data Lines Connected
0911 Rerserve PU, vendor suggest to EC control
if future need support SDP2
GEN2 CONN.
20191016 For ESD request
- Gen2 Solution SC300006T00
20191014
- For SDP measure
USB3_PTX_L_DRX_P1
USB3_PTX_L_DRX_N1
CHR_USB20_N1_R
CHR_USB20_P1_R
USB3_PRX_L_DTX_P1
USB3_PRX_L_DTX_N1
CHR_USB20_P1_R
CHR_USB20_N1_R
USB3_PTX_C_DRX_P1
USB3_PTX_C_DRX_N1
USB3_PTX_L_DRX_P1
USB3_PTX_L_DRX_N1
USB3_PRX_L_DTX_P1
USB3_PRX_L_DTX_N1
CHR_USB20_N1
CHR_USB20_P1
CHG_CTL2
CHG_CTL2
CHG_ILMSEL
CHR_USB20_N1
CHR_USB20_P1
CHR_USB20_P1_R
USB3_PRX_L_DTX_N1
USB3_PRX_L_DTX_P1
USB3_PTX_L_DRX_P1
USB3_PTX_L_DRX_N1
USB3_PRX_L_DTX_N1
USB3_PRX_L_DTX_P1
USB3_PTX_L_DRX_N1
USB3_PTX_L_DRX_P1
CHR_USB20_N1_R
USB3_PRX_DTX_N1<17>
USB3_PRX_DTX_P1<17>
USB3_PTX_DRX_P1<17>
USB3_PTX_DRX_N1<17>
USB20_N1<14>
USB20_P1<14>
CHG_CTL1<58>
CHG_EN<58>
CHG_ILMSEL<58>
CHG_CTL3<58>
USB_OC1#<14>
+USB3_VCCA
+5VALW
+USB3_VCCA
+5VALW
+USB3_VCCA
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
USB3.0 Conn/USB Charger
Custom
71 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
USB3.0 Conn/USB Charger
Custom
71 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
USB3.0 Conn/USB Charger
Custom
71 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RS89 0_0402_5%@
1 2
RS91 0_0402_5%@
1 2
RS14 10K_0402_5%
1 2
R
S
1
2
2
2
.
1
K
_
0
4
0
2
_
1
%
12
RS90 0_0402_5%@
1 2
C
S
9
2
2
U
_
0
6
0
3
_
6
.
3
V
6
M
@
1
2
US12
SLGC55544CVTR_TQFN16_3X3
VIN
1
NC
9
FAULT#
13
ILIM_SEL
4
EN
5
CTL1
6
CTL2
7
CTL3
8
VOUT
12
DP_IN
10
DM_IN
11
DM_OUT
2
DP_OUT
3
ILIM_L
15
ILIM_HI
16
GND
14
Thermal Pad
17
LS3
DLM0NSN900HY2D_4P
EMI@
SM070005U00
1
1
4
4
3
3
2
2
RS15 10K_0402_5%
@
1 2
R
S
1
3
3
9
K
_
0
4
0
2
_
1
%
@
12
DS1
TVWDF1004AD0_DFN9
ESD@
SC300006T00
4
5
1
6
2
7
9
8
3
C
S
7
0
.
1
U
_
0
2
0
1
_
1
0
V
6
K
1
2
RS138
0_0402_5%
@
12
JUSB1
ACON_GTRA0-9U1391
CONN@
VBUS
1
D-
2
D+
3
GND
4
SSRX-
5
SSRX+
6
GND
7
SSTX-
8
SSTX+
9
GND
10
GND
11
GND
12
GND
13
RS11
0_0201_5%
@
12
CS3 .1U_0402_16V7K
1 2
CS2 .1U_0402_16V7K
1 2
CS6
0.1U_0201_10V6K
EMI@
1
2
RS86 0_0402_5%@
1 2
DS2
AZC099-04S.R7G_SOT23-6
ESD@
SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
+
CS5
150U_D2_6.3VY_R15M
SGA00003700
1
2
CS8
0.1U_0201_10V6K
@
1
2
www.laptoprepairsecrets.com
Page 52
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
20190918
USB3 Port3 move to IO/B
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
72 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
72 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
72 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
N18E-GDDR6_D
www.laptoprepairsecrets.com
Page 53
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
IO/B CONN
remind : if no support wake,don't monitor this pin "PME#".
20191023
- Add +3VS
20191016
- Change to Port5
20191008
- LAN PCIE&CLK Remove AC Cap > Vender confirm
(CL136/137/138/139)
1209A
- IO_B change pin define
USB20_L_ P3
USB20_L_ N3
USB20_P3
USB20_N3
USB20_L_ N2
USB20_L_ P2
USB20_N2
USB20_P2
LAN_PME#
SPKLSPKL+
HP_PLUG#
RING2
SLEEVE
HPOUT_R_1
HPOUT_L_1
LAN_CLKRE Q#
PLT_RST_BUF#
LAN_PME#
USB_EN
USB3_PRX_D TX_P5
USB3_PRX_D TX_N5
USB3_PTX_ DRX_P5
USB3_PTX_ DRX_N5
USB20_L_N 3
USB20_L_P3
USB20_L_N 2
USB20_L_P2
USB3_PTX_ DRX_N2
USB3_PTX_ DRX_P2
USB3_PRX_D TX_N2
USB3_PRX_D TX_P2
PCIE_PRX_D TX_P14
PCIE_PRX_D TX_N14
PCIE_PTX_DR X_P14
PCIE_PTX_DR X_N14
CLK_PCIE_L AN
CLK_PCIE_L AN#
USB20_N3<1 4>
USB20_P3<14>
USB20_N2<1 4>
USB20_P2<14>
SPKL-<56>
SPKL+<5 6>
HP_PLUG#<56>
RING2<56>
SLEEVE<56>
HPOUT_R_1<56>
HPOUT_L_1<56>
LAN_CLKRE Q#<1 5>
PLT_RST_BUF #<16,52,6 8,69>
EC_PME#<16 ,58>
USB_EN<58>
USB3_PRX _DTX_P5<17>
USB3_PRX _DTX_N5<17>
USB3_PTX_D RX_P5<17>
USB3_PTX_D RX_N5<17>
USB3_PTX_ DRX_N2<17>
USB3_PTX_ DRX_P2<17>
USB3_PRX_D TX_N2<17>
USB3_PRX_D TX_P2<17>
PCIE_PRX_DT X_P14<17>
PCIE_PRX_DT X_N14<17>
PCIE_PTX_D RX_P14<17>
PCIE_PTX_D RX_N14<17>
CLK_PCIE_LA N<15 >
CLK_PCIE_LA N#<15>
+3VALW
+5VALW
GNDA
+3VALW
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
IO/B_LAN E2600
Custom
73 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
IO/B_LAN E2600
Custom
73 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEE RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHEET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELEC TRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
IO/B_LAN E2600
Custom
73 11 2Tuesday, Feb ruary 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
RL1 4.7K_0 402_5%~D
1 2
LS12
DLM0NSN90 0HY2D_4P
EMI@
SM070005U00
1
1
4
4
3
3
2
2
LS13
DLM0NSN90 0HY2D_4P
EMI@
SM070005U00
1
1
4
4
3
3
2
2
JIO1
ACES_5154 0-04001-P01
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
G1
41
G2
42
JIO2
ACES_88231 -06001
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
G1
7
G2
8
www.laptoprepairsecrets.com
Page 54
FAN Conn
Reset Circuit
40mil
BI_GATE PH to +RTCVCC at PWR
side
Reset Button
change PN to SN10000CV00
Turbo Key
SP01002LG00
ClipsScrew Hole
Stand OFF
20191210B
- H6 change to GNDA for Layout
BI_GATE#
BI_GATE
FAN_PWM1
FAN_PWM2
BI_GATE BI_GATE
+VCC_FAN1
+VCC_FAN2
+VCC_FAN1
+VCC_FAN2
TURBO_EN#
TURBO_LED#
FAN_SPEED1<58>
EC_RST# <58>
BI_GATE<84>
MAINPWON <58,84,86>
FAN_SPEED2<58>
FAN_PWM1<58>
FAN_PWM2<58>
TURBO_EN#<58>
TURBO_LED#<58>
+3VS
+3VLP
+3VS
+5VS
+5VALW
GNDA
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
FAN & Screw Hole
Custom
77 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
FAN & Screw Hole
Custom
77 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
FAN & Screw Hole
Custom
77 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
CLIP11
EMIST_SUL-12A2M_1P
1
CLIP3
EMIST_SUL-12A2M_1P
1
JFAN2
ACES_50278-00401-001
CONN@
SP02000RR00
1
1
2
2
3
3
4
4
G1
5
G2
6
H5
H_3P0
@
1
C40
0.1U_0201_10V6K
1
2
CF10
1000P_0402_50V7K
XEMI@
1
2
H21
H_5P6
@
1
H16
H_3P8
@
1
H7
H_5P6
@
1
CLIP23
EMIST_SUL-12A2M_1P
1
CLIP4
EMIST_SUL-12A2M_1P
1
H13
H_3P3
@
1
R24 0_0402_5%
@
1 2
H6
H_4P0
@
1
RF3
10K_0402_5%
12
CLIP14
EMIST_SUL-12A2M_1P
1
H14
H_3P8
@
1
CLIP22
EMIST_SUL-12A2M_1P
1
CLIP13
EMIST_SUL-12A2M_1P
1
CLIP5
EMIST_SUL-12A2M_1P
1
R23 0_0402_5%
@
1 2
CF6
1000P_0402_50V7K
@
1
2
H15
H_3P8
@
1
CLIP1
EMIST_SUL-12A2M_1P
1
H20
H_3P3
@
1
H8
H_4P0
@
1
RF7 0_0603_5%
@
1 2
FD1
FIDUCIAL_C40M80
@
1
CLIP16
EMIST_SUL-12A2M_1P
1
H22
H_3P3
@
1
CLIP6
EMIST_SUL-12A2M_1P
1
RF4 0_0603_5%
@
1 2
FD2
FIDUCIAL_C40M80
@
1
H9
H_4P0
@
1
CF13
4.7U_0402_6.3V6M
1
2
H10
H_3P3
@
1
CLIP18
EMIST_SUL-12A2M_1P
1
CF7
1000P_0402_50V7K
XEMI@
1
2
FD3
FIDUCIAL_C40M80
@
1
CLIP9
EMIST_SUL-12A2M_1P
1
H2
H_3P0
@
1
R25
10K_0402_5%
1 2
CLIP15
EMIST_SUL-12A2M_1P
1
H25
H_1P4X4P6
@
1
CLIP7
EMIST_SUL-12A2M_1P
1
FD4
FIDUCIAL_C40M80
@
1
CF5
10U_0402_6.3V6M
@
1
2
H11
H_3P3
@
1
H23
H_3P0X2P5
@
1
H3
H_3P0
@
1
CLIP8
EMIST_SUL-12A2M_1P
1
H18
H_3P0
@
1
H4
H_4P0
@
1
SW3
SKRPABE010_4P
SN10000CV00
@
1 2
3 4
CLIP19
EMIST_SUL-12A2M_1P
1
CLIP12
EMIST_SUL-12A2M_1P
1
H17
H_2P5
@
1
G
D
S
Q1A
2N7002KDW_SOT363-6
2
61
CLIP17
EMIST_SUL-12A2M_1P
1
CLIP10
EMIST_SUL-12A2M_1P
1
JFAN1
ACES_50278-00401-001
CONN@
SP02000RR00
1
1
2
2
3
3
4
4
G1
5
G2
6
RF5
10K_0402_5%
12
JTURBO1
ACES_51575-00401-001
CONN@
1
1
2
2
3
3
4
4
G1
5
G2
6
CLIP21
EMIST_SUL-12A2M_1P
1
CLIP2
EMIST_SUL-12A2M_1P
1
H19
H_3P0
@
1
CF12
4.7U_0402_6.3V6M
1
2
H12
H_3P3
@
1
G
D
S
Q1B
2N7002KDW_SOT363-6
5
34
CLIP20
EMIST_SUL-12A2M_1P
1
H24
H_1P4X3P5
@
1
www.laptoprepairsecrets.com
Page 55
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
System DC inferface
For Power ON/Off Sequence
MOW14, For tPLT18 200us( max)
SLP_S3# to VCCIO VR dis able
MOW14, For tPLT17 200us( max)
SLP_S3# to IMVP VR_ON d eassertion
SLP_S3# to VCCST_PWRGD deassertion
MOW14, For tCPU28 200us (max)
MOW14, For tPLT15 200us (max)
SLP_S4# to VDDQ ramp d own
Place CQ7 close UQ1 pin 1&2
Place CQ8 close UQ1 pin 6&7
P/N: SB00000EO00 footprint use SB00000ZU00
Place CQ11 close UQ2 pin 1&2
Place CQ24 close UQ2 pin 6&7
+1.05VALW TO +1.05V_VCCST /+1.8VALW TO +1.8VS +1.05VALW TO +1.05VS_VCCSTG
+1.0VS_VCCSTG: 60mA
R ON = 4.4m ohm
VDROP= 11mV
Delay time: 9.3us
discharge
trace 20 mils
discharge
trace 20 mils
SUSP
5VS_ON
3VS_ON
SUSP#
SYSON
SYSON#
SUSP#
PM_SLP_S4
PM_SLP_S3
SYSON
SYSON#
SUSP
EN_1.0V_VCCSTU
SYSON
+1.05V_VCCST_OUT
EN_1.8VS
SUSP#
EN_1.0V_VCCSTG
SUSP#
+1.8VS_OUT
+5VS_OUT
+3VS_OUT
SYSON<58,88>
SUSP#<39,58,68,85,88,90>
VR_ON <58,90,91>
EC_VCCST_PG_R <10,58>
PCH_PWROK <18,58>
SYS_PWROK <18,58>
PM_SLP_S3#<18,58>
PM_SLP_S4#<18,58>
+0.6VS_VTT+5VALW
+5VALW
+1.2V_VDDQ+5VALW
+3VALW
+3VALW
+3VS_OUT +5VS_OUT+3VALW +5VALW
+1.05V_VCCST_OUT+1.05VALW
+5VALW
+1.05V_VCCST
+1.05VALW
+1.8VS_OUT
+1.8VALW
+1.8VALW
+1.05VALW
+5VALW
+1.05VS_VCCSTG
+1.8VS
+3VALW
+5VALW +5VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
DC Interface
Custom
78 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
DC Interface
Custom
78 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
FH51M M/B LA-J871P
1.0
DC Interface
Custom
78 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
R28
100K_0402_5%
@
1 2
CQ9
0.1U_0201_10V6K
1
2
RQ8 0_0402_5%@
1 2
CQ2 0 .1U_0201_10V6K
@
1 2
AOZ1334DI-01_DFN8-7_3X3
UC4
GND
5
ON
4
VOUT
6
VIN2
2
VBIAS
3
VIN1
1
VIN thermal
7
G
D
S
Q13B
2N7002KDW_SOT363-6
5
34
CQ14 1000P_0402_50V7K
1 2
G
D
S
Q11B
2N7002KDW_SOT363-6
5
34
UQ1
EM5209VF_DFN14_2X3
GND
11
VIN2
6
VBIAS
4
ON2
5
VOUT2
9
VIN2
7
CT1
12
VOUT1
14
VOUT2
8
VOUT1
13
VIN1
2
ON1
3
VIN1
1
CT2
10
GPAD
15
CQ7
1U_0201_6.3V6M
1
2
CQ22
0.1U_0201_10V6K
1
2
RQ9 0_0603_5%@
1 2
CQ20 0.1U_0201_10V6K
@
1 2
JPQ1
JUMP_43X118
@
112
2
CQ10
0.1U_0201_10V6K
1
2
CQ13
0.1U_0201_10V6K
@
1
2
G
D
S
Q7A
2N7002KDW_SOT363-6
@
2
61
G
D
S
Q13A
2N7002KDW_SOT363-6
2
61
UQ2
EM5209VF_DFN14_2X3
GND
11
VIN2
6
VBIAS
4
ON2
5
VOUT2
9
VIN2
7
CT1
12
VOUT1
14
VOUT2
8
VOUT1
13
VIN1
2
ON1
3
VIN1
1
CT2
10
GPAD
15
CQ5
0.1U_0201_10V6K
1
2
RQ1 0_0402_5%@
1 2
CQ8
1U_0201_6.3V6M
1
2
CQ11
1U_0201_6.3V6M
1
2
CQ15 0.1U_0201_10V6K
@
1 2
G
D
S
Q7B
2N7002KDW_SOT363-6
@
5
34
G
D
S
Q12B
2N7002KDW_SOT363-6
@
5
34
CQ3 1000P_0402_50V7K
1 2
R30
100K_0402_5%
@
1 2
CQ16 1000P_0402_50V7K
1 2
G
D
S
Q10A
2N7002KDW_SOT363-6
2
61
RQ5 0_0603_5%@
1 2
G
D
S
Q8A
2N7002KDW_SOT363-6
@
2
61
R29
100K_0402_5%
@
1 2
CQ12
1U_0201_6.3V6M
1
2
R37
100K_0402_5%
12
CQ24
1U_0201_6.3V6M
1
2
G
D
S
Q10B
2N7002KDW_SOT363-6
5
34
R32
10K_0402_5%
@
12
RQ3 0_0402_5%@
12
G
D
S
Q12A
2N7002KDW_SOT363-6
@
2
61
G
D
S
Q8B
2N7002KDW_SOT363-6
@
5
34
CQ4 0.1U_0201_10V6K
@
1 2
JPQ2
JUMP_43X118
@
112
2
R27
100K_0402_5%
@
1 2
RQ4 0_0402_5%@
1 2
CQ1 1000P_0402_50V7K
1 2
G
D
S
Q11A
2N7002KDW_SOT363-6
2
61
RQ2 0_0402_5%@
12
R38
100K_0402_5%
12
CQ6
0.1U_0201_10V6K
1
2
www.laptoprepairsecrets.com
Page 56
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Bead SM01000U600
ADAPDET <85>
+19V_VIN+19V_ADPIN
+CHGRTC
+3VLP
Title
Size
Document Number Rev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
DCIN
Custom
82 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number Rev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
DCIN
Custom
82 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number Rev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
DCIN
Custom
82 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PR102
4.7_1206_5%
12
PR101
0_0402_5%
@0@
1 2
PL103
FBMA-L11-201209-800LMA50T
EMI@
1 2
PC104
1000P_0402_50V7K
EMI@
12
PC102
100P_0402_50V8J
EMI@
12
PC105
0.1U_0603_25V7K
EMI@
12
PR103
4.7_1206_5%
12
PC101
0.1U_0603_25V7K
EMI@
12
PL102
FBMA-L11-201209-800LMA50T
EMI@
1 2
PJP101
SINGA_2DC3207-000111F
@
1
1
2
2
3
3
5
5
4
4
9
9
10
10
6
6
7
7
8
8
PL101
FBMA-L11-201209-800LMA50T
EMI@
1 2
www.laptoprepairsecrets.com
Page 57
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PC203 must close to EC pin
T202 T201 must close to PH201
PH201 is Common Part SL200002H00
RecoveryActive
89'C, 1V 56'C, 2VVCIN0_PH(V)
PH202(ohm) 8.0524K 26.11K
For KB9022
OTP
When PR204=18.7K
ADP_I=20*I(adapter)*0.01
I(adapter)=adapter(W)*130%/19
<45,47>
(Common Part)
SL200002H00
Battery Bot Side
PIN1 GND
PIN2 GND
PIN3 SMD
PIN4 SMC
PIN5 TEMP
PIN6 BI
PIN7 Batt+
PIN8 Batt+
3/27 thermal PH1 92'C ->89'C
design reserve
PH202 Near fan.
(Common Part)
SL200002H00
PH203 Near VGA CORE CHOKE.
PH204 Near VRAM CHOKE.
BI_S
MAINPWON
EC_SMB_DA1-1
EC_SMB_CK1-1
BATT_TS
BATT_B/I
VCIN0_PH <58>
ECAGND<58,66>
VCIN1_ADP_PROCHOT <58>
ADP_I <58,85>
EC_SMB_CK1 <58,85>
EC_SMB_DA1 <58,85>
BATT_TEMP <58,85>
BI_GATE<77>
MAINPWON<58,77,86>
+3VLP_ECA
+3VLP
+RTCVCC
+3VLP
+17.4V_BATT
+17.4V_BATT+
+3VLP_ECA
VRAM_TEMP<58,66>
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
BATTERY CONN/OTP
Custom
84 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
BATTERY CONN/OTP
Custom
84 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
BATTERY CONN/OTP
Custom
84 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
P
H
2
0
2
1
0
0
K
_
0
4
0
2
_
1
%
_
N
C
P
1
5
W
F
1
0
4
F
0
3
R
C
@
12
T202@
PH201
100K_0402_1%_NCP15WF104F03RC
12
P
H
2
0
3
1
0
0
K
_
0
4
0
2
_
1
%
_
N
C
P
1
5
W
F
1
0
4
F
0
3
R
C
@
V
G
A
@
12
PU201
G718TM1U_SOT23-8
@
RHYST2
5
OT1
3
OT2
4
GND
2
VCC
1
TMSNS2
6
RHYST1
7
TMSNS1
8
PR207 100_0402_1%
1 2
PR212
100K_0402_5%
12
PR205 100_0402_1%
1 2
PL201
FBMA-L11-201209-800LMA50T
EMI@
1 2
PR218
16.5K_0402_1%
VGA@
12
PR214
21.5K_0402_1%
@
12
PC201
1000P_0402_50V7K
EMI@
12
PR217
0_0402_5%
@0@
12
PR204
18.7K_0402_1%
12
PR203 1K_0402_1%
1 2
PL202
FBMA-L11-201209-800LMA50T
EMI@
1 2
P
H
2
0
4
1
0
0
K
_
0
4
0
2
_
1
%
_
N
C
P
1
5
W
F
1
0
4
F
0
3
R
C
V
G
A
@
12
PR202
200K_0402_1%
1 2
T201@
PR213
100K_0402_1%
@
12
G
D
S
PQ201
LBSS139LT1G 1N SOT-23-3
2
13
PJP201
CVILU_CI9908M2HR0-NH
@
1
1
3
3
4
4
2
2
5
5
6
6
7
7
8
8
GND
9
GND
10
PR208
10K_0402_1%
12
PC205
0.1U_0603_25V7K
@EMI@
12
PR216
10K_0402_1%
@
12
PR206
10K_0402_1%
1 2
PC202
0.01U_0402_50V7K
EMI@
12
PR215
26.7K_0402_1%
@
12
PC203
0.1U_0402_25V6
@
1 2
www.laptoprepairsecrets.com
Page 58
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
For 4S per cell 4.35V battery
H/L Side AON7506 SB000010A00
Rds(on):13~15.8mohm
Vgs=20V
Vds=30V
ID= 10.5A (Ta=70C)
Choke 4.7uH SH00000YC00 (Common Part)
(Size:6.6 x 7.3 x 3 mm)
(DCR:28m~33m)
ILIM=charge current limit
Rsr=input current sense
I(CHG_LIM)=V(ILIM)/(20*Rsr)
=(3.3*150/466)/(20*0.01)
=5.31A
Close to EC
Close to B2B first mos
H_PROCHOT#
ACIN
ACPRN_CHG
ACP
SRP
ACN
ACP_CHG
CMSRC_CHG
BATDRV_CHG
BATSRC_CHG
EC_SMB_CK1_CHG
ACPRN_CHG
BATSRC_CHG
BATDRV_CHG
SRN_CHG
SRP_CHG
ILIM_CHG
LG_CHG
LX_CHG
UG_CHG
BST_CHG
ACDRV_CHG
SNUB_CHG
CMSRC_CHG
EC_SMB_DA1_CHG
BST_CHG_R
SRN
ACN_CHG
ACDRV_CHG
ACDET
BATT_4S<58>
SUSP#<39,58,68,78,88,90>
DGPU_AC_DETECT <19,27,58>
H_PROCHOT#<10,58>
EC_SMB_DA1<58,84>
EC_SMB_CK1<58,84>
ADP_I<58,84>
ACIN<58>
BATT_TEMP<58,84>
ADAPDET<82>
IDCHG<58>
ACDET
+3VS
+19VB
+19V_VIN
+19V_P2
+6V_CHG_REGN
+19V_VIN
+17.4V_BATT_CHG
+6V_CHG_REGN
+19V_VIN
+19VB
+19V_CHG
+17.4V_BATT
+19V_P1
+3VLP
+19V_VIN
Title
Size
Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
85 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_CHARGER
Title
Size
Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
85 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_CHARGER
Title
Size
Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
85 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_CHARGER
PCB5 2200P_0402_50V7KEMI@
1 2
PRB30
10K_0402_1%
@
12
PCB14
10U_0603_25V6M
12
PRB22
0_0402_5%
@0@
1 2
PRB39
0_0402_5%
12
PCB27
0.1U_0402_25V6
12
PCB26
0.1U_0402_25V6
1 2
G
D
S
PQB7B
2N7002KDW_SOT363-6
@
5
34
PRB17 0_0402_5%
1 2
PRB35
499K_0402_1%
12
PCB6 10U_0603_25V6M
@
12
PCB10
0.1U_0603_25V7K
12
G
D
S
PQB10
L2N7002WT1G_SC70-3
2
13
PRB37
0_0402_5%
1 2
PDB1
S SCH DIO BAS40CW SOT-323
2
3
1
PRB27
10K_0402_1%
12
PRB36
215K_0402_1%
12
PCB28
0.1U_0402_25V6
12
PCB13
10U_0603_25V6M
@
12
PRB5
4.02K_0402_1%
12
PRB11
422K_0402_1%
12
PCB21
100P_0402_50V8J
@
1 2
PRB23 150K_0402_1%
1 2
PQB2
AON7380_DFN3X3-8-5
4
5
1
2
3
PRB16
0_0603_5%
1 2
PRB38
0_0402_5%
12
G
D
S
PQB11
L2N7002WT1G_SC70-3
2
13
PRB33
0_0402_5%
12
PRB1
1M_0402_1%
12
PQB5
AON7506_DFN33-8-5
4
5
123
PRB10
4.02K_0402_1%
12
PRB31
10K_0402_1%
1 2
PCB16 1U_0603_25V6K
12
PLB1
5A_Z80_0805_2P
EMI@
1 2
PCB11
0.1U_0402_25V6
1 2
PCB1
1000P_0603_50V7K
12
PQB3
EMP21N03HC_EDFN5X6-8-5
4
5
1
2
3
PCB8 0.1U_0402_25V6EMI@
12
PRB24
10_0402_1%
1 2
PLB2
4.7UH_PCMB063T-4R7MS_8A_20%
1 2
G
D
S
PQB7A
2N7002KDW_SOT363-6
@
2
61
PCB7
0.01U_0402_25V7K~N
1 2
PRB25
0_0402_5%
@0@
1 2
PCB15
1000P_0402_50V7K
@
1 2
PRB28
2M_0402_1%
12
PRB2
3M_0402_5%
12
PRB14 0_0402_5%
1 2
PQB9
RUM001L02_VMT3
@
1
2
3
PRB19
0.01_1206_1%
1
3
4
2
PQB8
LTC015EUBFS8TL_UMT3F
2
13
PRB4
4.7_0603_1%
1 2
G
D
S
PQB1
L2N7002WT1G_SC70-3
2
13
PRB32
12K_0402_1%
12
PCB9 10U_0603_25V6M
12
PRB7
4.02K_0402_1%
1 2
PCB4 0.1U_0402_25V6EMI@
12
PCB20
100P_0402_50V8J
1 2
PCB17
2.2U_0603_16V6K
1 2
PCB22
10U_0603_25V6M
12
PRB3
0.005_1206_1%
1
3
4
2
PQB4
AON7380_DFN3X3-8-5
4
5
1
2
3
PQB6
AON7506_DFN33-8-5
4
5
123
PRB12
10_0805_5%
12
PCB25
680P_0402_50V7K
EMI@
12
PCB2
0.022U_0603_25V7K
1 2
PRB9
0_0402_5%
12
PRB8
0_0402_5%
12
PRB13
66.5K_0402_1%
12
PCB19
0.047U_0603_25V7M
1 2
PRB34
100K_0402_1%
1 2
PCB18
2200P_0402_25V7K
12
PRB21 316K_0402_1%
1 2
PCB3
0.047U_0603_25V7M
12
PRB29
10K_0402_1%
@
12
PRB26
10_0402_1%
1 2
PRB18 0_0402_5%
1 2
PUB1
BQ24781RUYR_WQFN28_4X4
HIDRV
26
SRP
20
PHASE
27
BATDRV
18
SDA
11
IDCHG
8
ACDRV
4
VCC
28
CMSRC
3
ACDET
6
SCL
12
ACOK
5
IADP
7
BTST
25
BATSRC
17
GND
13
REGN
24
GND
22
ACP
2
SRN
19
ILIM
21
LODRV
23
PMON
9
/PROCHOT
10
ACN
1
NC
14
/BATPRES
15
/TB_STAT
16
PWPD
29
PRB20
4.7_1206_5%
EMI@
12
PCB23
10U_0603_25V6M
12
PCB24
10U_0603_25V6M
@
12
PRB6
10_0402_1%
12
www.laptoprepairsecrets.com
Page 59
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D
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EN1 and EN2 dont't be floating.
EN :H>0.8V ; L<0.4V
Fsw : 600K Hz
Iocp=12A
5V LDO 150mA~300mA
keep short pad,
snubber is for EMI only.
EN1 and EN2 dont't floating
3.3V LDO 150mA~300mA
Vout is 3.234V~3.366V
Choke 2.2uH SH00000YV00 (Common Part)
7x7X3
Isat:10A
DCR:13.5mΩ /15mΩ
Choke 1.5uH SH000016700 (Common Part)
7x7X3
Isat:18A
DCR:14mΩ /15mΩ
Imax=4.9A, Ipeak=7A, Iocp:8.4A
Imax=4.9A, Ipeak=7A, Iocp:8.4A
+19VB_5V
5V_EN
ENLDO_3V5V
SN_5V
BST_5V BST_5V_RBST_5V_R
5V_EN
FB_5V FB_5V_R
LX_3V
ENLDO_3V5V
SPOK_3V
SN_3V
ENLDO_3V5V
BST_3V
LX_3V
BST_3V_R
FB_3V_RFB_3V
+19VB_3V
VCC_5V
LX_5V
LX_5V
SPOK_5V<58>
3V_EN<58>
SPOK_3V<58,89>
+5VLP
+5VALWP
+3VALW+3VALWP
+5VALWP +5VALW
+19VB
+3VLP
+3VLP
+19VB
+19VB
+3VALWP
+3VALWP
EC_ON<58>
MAINPWON<58,77,84>
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
+3VALW/+5VALW
Custom
86 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
+3VALW/+5VALW
Custom
86 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
+3VALW/+5VALW
Custom
86 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PC301
0.1U_0603_25V7K
1 2
PU502
SY8288CRAC_QFN20_3X3
IN
2
EN112EN2
11
NC
10
PG
9
BS
1
LX
20
LX
19
GND
18
IN3IN4IN
5
LX
6
GND
7
GND
8
FF13OUT14LDO
15
NC
16
VCC
17
GND
21
PC509
22U_0603_6.3V6M
12
PC308
22U_0603_6.3V6M
12
PL511
FBMA-L11-201209-800LMA50T
EMI@
1 2
PC310
22U_0603_6.3V6M
@
12
PR506
1K_0402_1%
1 2
PC312
22U_0603_6.3V6M
12
PC502
10U_0603_25V6M
12
PC506
2.2U_0402_6.3V6M
1 2
PC309
22U_0603_6.3V6M
12
PC305
10U_0603_25V6M
12
PR503
100K_0402_5%
12
PC504
2200P_0402_50V7K
EMI@
12
PR502
4.7_1206_5%
@EMI@
12
PR501
0_0402_5%
@0@
1 2
PC313
4.7U_0402_6.3V6M
12
PC517
0.1U_0402_25V6
@EMI@
12
PL301
2.2UH_7.8A_20%_7X7X3_M
1 2
PR507
1M_0402_1%
12
PC307
22U_0603_6.3V6M
@
12
PJ502
JUMP_43X118
@
112
2
PL501
1.5UH_9A_20%_7X7X3_M
1 2
PR303
0_0603_5%
@0@
1 2
PR505
0_0402_5%
@0@
1 2
PC510
22U_0603_6.3V6M
12
PR304
4.7_1206_5%
@EMI@
12
PC508
22U_0603_6.3V6M
@
12
PJ302
JUMP_43X118
@
112
2
PR302
150K_0402_1%
12
PC302
0.1U_0402_25V6
EMI@
12
PC513
680P_0402_50V7K
@EMI@
12
PR504
2.2K_0402_5%
1 2
PR306
1K_0402_5%
1 2
PL311
FBMA-L11-201209-800LMA50T
EMI@
1 2
PC306
10U_0603_25V6M
12
PC503
10U_0603_25V6M
12
PC514
4.7U_0402_6.3V6M
12
PR301
499K_0402_1%
1 2
PC507
22U_0603_6.3V6M
12
PC315
1000P_0402_50V7K
1 2
PC515
1000P_0402_50V7K
1 2
PC512
22U_0603_6.3V6M
12
PR305
100K_0402_5%
12
PC511
22U_0603_6.3V6M
12
PC311
22U_0603_6.3V6M
12
PC501
0.1U_0603_25V7K
1 2
PU301
SY8288BRAC_QFN20_3X3
IN
2
EN112EN2
11
NC
10
PG
9
BS
1
LX
20
LX
19
GND
18
IN3IN4IN
5
LX
6
GND
7
GND
8
FF13OUT14NC
15
NC
16
LDO
17
GND
21
PC304
2200P_0402_50V7K
EMI@
12
PC314
680P_0402_50V7K
@EMI@
12
PC516
4.7U_0402_6.3V6M
12
www.DeviceDB.xyz
Telegram Group
@DeviceDB
www.laptoprepairsecrets.com
Page 60
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Pin19 need p ull separate fr om +1.35VP.
If you have +1.35V and +0.6 75V sequence q uestion,
you can chan ge from +1.35VP to +1.35VS.
Mode Level + 0.675VSP VTT REF_1.35V
S5 L off off
S3 L off on
S0 H on o n
Note: S3 - sle ep ; S5 - pow er off
0.6Volt +/- 5 %
TDC 0.7A
Peak Current 1A
Vout=0.75V* (1+Rup/Rdown)
=0.75*(1 +(6.19/10))
=1.214V 1.2%
Vout=0.75V* (1+Rup/Rdown)
=0.75*(1 +(8.2/10))
=1.365V 1.1%
Choke 1uH SH00 000YE00 (Comm on Part)
(Size:6.86 x 6 .47 x 3 mm)
(DCR:6.2m~7.2m Ohm)
Isat:15A
IOCP
Frequency
H/S AON7408 Rd s(on) :typ:27 m Ohm, max:34m Ohm
Idsm(TA=25)=7. 5A, Idsm(TA= 70)=5.5A
L/S AON7506 Rd s(on) :typ:13 m Ohm, max:15. 8m Ohm
Idsm(TA=25)=12 A, Idsm(TA=7 0)=10.5A
Choke: SH00000 YE00 Size:7x 7x3 (Common Pa rt)
Rdc=6.7mohm(Ty p), 7.4mohm( Max) CYNTEC
Rdc=Xmohm(Typ) , 11mohm(Max ) TOKO
Rdc=6.2mohm(Ty p), 7.2mohm( Max) Maglayer s
Rdc=8.3mohm(Ty p), 10mohm(M ax) Tai-Tech
Rdc=6.7mohm(Ty p), 7.4mohm( Max) Chilisin
Rdc=6.9± 15% Panasonic
Switching Frequency: 530kHz
Imax=A, Iocp=A
Iocp=10.63~12.76A
OVP: 110%~120%
VFB=0.607V, Vout=1.214V
Rup
Rdown Vout=0.8V* (1+Rup/Rdown )
Note:Iload( max)=4A
FB=0.8V
Vout=0.8V* (1 +(21.5/10)) = 2.52V (x1.00 8)
TON_1.2VP
LG_1.2VP
+19VB_1.2VP
BST_1.2VP
LX_1.2VP
+19VB_1.2VP
SN_1.2VP
UG_1.2VP
CS_1.2VP
LX_1.2VP
BST_1.2VP_R
VDD_1.2VP
FB_1.2VP
VTTREF_1.2VP
EN_0.6VSP
EN_1.2VP
SYSON
VIN_2.5V
FB_2.5V
EN_2.5V
SUSP#<39,58,68,78,85,90>
SYSON<58,78>
SM_PG_CTRL<10>
+1.2VP
+19VB
+5VALW
+1.2VP
+0.6VSP
+1.2VP
+1.2VP
+1.2VP
+0.6VSP
+1.2V_VDDQ
+0.6VS_VTT
+19VB_1.2VP
+5VALW
+2.5VP +2.5V
+3VALW
+5VALW
+2.5VP
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
DDR4
C
88 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
DDR4
C
88 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
DDR4
C
88 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PQM2
AON7506_DFN3X3-8-5
4
5
123
PUM1
RT8207PGQW_WQFN20_3X3
VTTSNS
2
FB
6
S5
8
PGOOD
10
VDDP
12
PHASE
16
BOOT
18
VTTREF
4
PGND
14
VTTGND
1
GND
3
VDDQ
5
S3
7
TON
9
VDD
11
CS
13
LGATE
15
UGATE
17
VTT
20
VLDOIN
19
PAD
21
PC2501
1U_0402_6.3V6K
12
PRM5
6.19K_0402_1%
1 2
PCM15
680P_0402_50V7K
@EMI@
12
PCM5
0.1U_0603_25V7K
12
PRM3
5.1_0603_5%
1 2
PC2505
22U_0603_6.3V6M
12
PCM2
2200P_0402_50V7K
EMI@
12
PCM6
22U_0603_6.3V6M
12
PQM1
AONR32320C_DFN3X3-8-5
4
5
123
PCM1222U_0603_6.3V6M
1
2
PRM9
0_0402_5%
@
1 2
PRM4
2.2_0402_1%
12
PR2502
1M_0402_5%
12
PC2506
22U_0603_6.3V6M
@
12
PLM11
HCB2012KF-121T50_0805
EMI@
1 2
PRM11
2.2_0603_5%
1 2
PC2502
22U_0603_6.3V6M
12
PJ2501
JUMP_43X39
@
1
1
2
2
PLM1
1UH_11A_20%_7X7X3_M
1 2
PC2504
0.01U_0402_25V7K
12
PC2503
0.1U_0402_16V7K
@
12
PRM1
20K_0402_1%
1 2
PCM4
10U_0603_25V6M
12
PCM18
0.1U_0402_16V7K
@
12
PJ2502
JUMP_43X39
@
112
2
PCM3
10U_0603_25V6M
12
PR2501
0_0402_5%
@0@
1 2
PDM1
30MA_30V_0.5UA_0.4V_SOD323-2
@
2 1
PCM19
0.1U_0402_16V7K
@
12
PCM8
1U_0201_6.3V6K
35.4
1 2
PRM8
0_0402_5%
@0@
1 2
PRM7
10K_0402_1%
12
PCM922U_0603_6.3V6M
1
2
PCM17
1U_0201_6.3V6K
35.4
12
PCM1422U_0603_6.3V6M
1
2
PJM2
JUMP_43X118
@
112
2
PCM1022U_0603_6.3V6M
1
2
PCM1122U_0603_6.3V6M
1
2
PRM10
0_0402_5%
@0@
1 2
PJM3
JUMP_43X39
@
112
2
G9661MF11U_SO8
PU2501
POK
1
VEN
2
VIN
3
VPP
4
GND
8
ADJ
7
VO
6
NC
5
GND
9
PRM2
4.7_1206_5%
@EMI@
12
PRM6
470K_0402_1%
1 2
PR2504
10K_0402_1%
12
PR2503
21.5K_0402_1%
12
PCM1322U_0603_6.3V6M
1
2
PCM20
0.1U_0402_25V6
EMI@
12
PCM16
0.033U_0402_16V7K
12
PCM7
10U_0603_6.3V6M
@
12
www.laptoprepairsecrets.com
Page 61
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FB = 0.6V
8288RAC
Min
ILMT='0' 8A
ILMT=Floating 12A
ILMT='1' 16A
EN pin don't floating
If have pull down resistor at HW side, pl s delete PR70 2
Rup
Rdown
Vout=0.6V* ( 1+Rup/Rdown)
=0.6*(1+ (15.4/20))
Vout=1.062V
Choke 1uH SH00 000YE00 (Comm on Part)
(Size:6.86 x 6 .47 x 3 mm)
(DCR:6.2m~7.2m Ohm)
Choke: SH00000 YE00 Size:7x 7x3 (Common Pa rt)
Rdc=6.7mohm(Ty p), 7.4mohm( Max) CYNTEC
Rdc=Xmohm(Typ) , 11mohm(Max ) TOKO
Rdc=6.2mohm(Ty p), 7.2mohm( Max) Maglayer s
Rdc=8.3mohm(Ty p), 10mohm(M ax) Tai-Tech
Rdc=6.7mohm(Ty p), 7.4mohm( Max) Chilisin
Rdc=6.9± 15% Panasonic
(R2)
FB = 0.6V
8288RAC
Min
ILMT='0' 8A
ILMT=Floati ng 12A
ILMT='1' 16A
Vout=0.6V* (1+Rup/Rdown)
Vout=0.6V*(1 +20.5/10)
=1.83V (x1.017)
(R1)
Choke 1uH S H00000Z200 (Co mmon Part)
5x5x3
Isat:11A
DCR:13mΩ /14 mΩ
Imax=2.16A, Ipeak=3.09A, Iocp:6.2A
FB_1VALW
SNUB_1VALW
EN_1VALW
ILMT_1VALW
ILMT_1VALW
LDO_3V_1VALW
BST_1VALW_RBST_1VALW
+19VB_1VALW
PG_1.8VALWP
EN_1VALW
LX_1VALW
SNB_1.8VALWP
+19VB_1.8VALWP
BST_1.8VALWP
LDO_1.8VALWP
ILMT_1.8VALWP
PG_1.8VALWP
ILMT_1.8VALWP
LX_1.8VALWP
FB_1.8VALWP
+3VALW
+19VB
+1.05VALWP
LDO_3V_1VALW
+1.05VALWP
+1.05VALW
+3VALW
+19VB_1VALW
+3VALW
+1.8VALWP +1.8 VALW
+3VALW
+1.8VALWP
+19VB
LDO_1.8VALWP
SPOK_3V<58,86>
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
1V
C
89 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
1V
C
89 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
1V
C
89 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PR1107
10K_0402_1%
1 2
PR1106
20K_0402_1%
12
PR1806
0_0402_5%
@
12
PC1815
2200P_0402_50V7K
EMI@
12
PC1806
680P_0402_50V7K
@EMI@
1 2
PL1101
1UH_6.6A_20%_5X5X3_M
1 2
PR1810
1K_0402_1%
1 2
PR1802
4.7_1206_5%
@EMI@
1 2
PR1808
0_0603_5%
@0@
1 2
PC1111
22U_0603_6.3V6M
12
PC1812
22U_0603_6.3V6M
12
PR1801
0_0402_5%
@0@
1 2
PC1103
2200P_0402_50V7K
EMI@
12
PU1801
SY8286RAC_QFN20_3X3
IN
2
LX
6
GND
8
NC
10
NC
12
NC
16
GND
18
IN
4
FB
14
BS
1
IN
3
IN
5
GND
7
PG
9
EN
11
ILMT
13
BYP
15
VCC
17
LX
20
LX
19
PAD
21
PJ1101
JUMP_43X118
@
112
2
PC1809
2.2U_0402_6.3V6M
12
PC1107
330P_0402_50V7K
12
PL1802
FBMA-L11-201209-800LMA50T
EMI@
1 2
PC1108
22U_0603_6.3V6M
12
PJ1801
JUMP_43X79
@
112
2
PR1104
15.4K_0402_1%
12
PC1805
22U_0603_6.3V6M
@
12
PR1102
0_0603_5%
@0@
1 2
PC1813
22U_0603_6.3V6M
12
PC1101
680P_0402_50V7K
@EMI@
1 2
PC1810
0.1U_0603_25V7K
1 2
PC1110
22U_0603_6.3V6M
12
PC1807
1U_0201_6.3V6M
12
PR1809
100K_0402_5%
12
PC1115
0.22U_0402_16V7K
@
12
PL1801
1UH_6.6A_20%_5X5X3_M
1 2
PJ1102
JUMP_43X79
@
112
2
PC1804
22U_0603_6.3V6M
12
PC1114
1U_0201_6.3V6M
12
PC1816
0.1U_0402_25V6
EMI@
12
PR1101
4.7_1206_5%
@EMI@
1 2
PC1102
0.1U_0603_25V7K
EMI@
12
PR1805
1M_0402_1%
12
PR1108
10K_0402_1%
@
1 2
PC1106
0.1U_0603_25V7K
1 2
PU1101
SY8288RAC_QFN20_3X3
IN
2
LX
6
GND
8
NC
10
NC
12
NC
16
GND
18
IN
4
FB
14
BS
1
IN
3
IN
5
GND
7
PG
9
EN
11
ILMT
13
BYP
15
VCC
17
LX
20
LX
19
PAD
21
PC1113
2.2U_0402_6.3V6M
12
PR1804
10K_0402_1%
12
PC1801
10U_0603_25V6M
12
PR1807
0_0402_5%
@0@
12
PR1103
0_0402_5%
@0@
12
PR1110
1K_0402_1%
1 2
PR1105
0_0402_5%
@
12
PC1105
10U_0603_25V6M
12
PR1109
1M_0402_1%
12
PC1803
330P_0402_50V7K
12
PC1811
0.47U_0402_6.3V6K
@
12
PR1803
20.5K_0402_1%
12
PC1109
22U_0603_6.3V6M
12
www.laptoprepairsecrets.com
Page 62
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IOCP=7A~8A( typ)
Note:Iload( max)=5.5A
Rup
Rdown
check delay time with HW
Vout=0.6V* ( 1+Rup/Rdown)
=0.6*(1+ (12k/20.5k))
OVP=0.95V*115 %=1.0925V
Vout=0.951 V 2%
FB = 0.6V
Pin 7 BYP i s for CS.
Common NB c an delete +3VA LW and PC15
8286RAC
Min Typ Max
ILMT='0' 6.5A 7.5A 8.5 A
ILMT=Floati ng 9.5A 10.5A 11. 5A
ILMT='1' 12.5A 13.5A 14. 5A
Choke: SH00000 Z300 (Common Part)
Isat=14A
Rdc=10mohm(Typ ), 12mohm(Max ) Size:6*5.4*3 Tai-Tech
Rdc=11mohm(Typ ), 12mohm(Ma x) Size:5.3*4 .9*3 Maglaye rs
can improve CNVI lose issue
VCC_SENSE_VCCIO_R
VSS_SENSE_VCCIO
VCC_SENSE_VCCIO
SUSP#
VR_ON
EN_VCCIOP
EN_VCCIOP
ILMT_VCCIOP
ILMT_VCCIOP
LDO_3V_VCCIOP
FB_VCCIOP
SNB_VCCIOP
LX_VCCIOP
+19VB_VCCIOP
BST_VCCIOP BST_VCCIOP_R
SUSP#<39,58,68,78,85,88>
VR_ON<58,78,91>
+1.0VS_VCCIOP +VCCIO
+19VB
+3VALW
+1.0VS_VCCIOP
LDO_3V_VCCIOP
VCC_SENSE_VCCIO <12>
VSS_SENSE_VCCIO <12>
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0C
90 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
1.0VS_VCCIO
FXXXX M/B LA-J871P
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0C
90 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
1.0VS_VCCIO
FXXXX M/B LA-J871P
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0C
90 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
1.0VS_VCCIO
FXXXX M/B LA-J871P
PRH9
0_0402_5%
@
1 2
PRH4
1K_0402_1%
@
1 2
PCH6
22U_0603_6.3V6M
12
PCH8
22U_0603_6.3V6M
12
PRH3
10_0402_1%
12
PCH4
0.1U_0603_25V7K
1 2
PRH1
4.7_1206_5%
@EMI@
1 2
PCH1
680P_0402_50V7K
@EMI@
1 2
PCH3
0.1U_0402_25V6
@EMI@
12
PRH12
0_0402_5%
@
12
PCH10
330P_0402_50V7K
@
12
PJH1
JUMP_43X118
@
112
2
PCH5
10U_0603_25V6M
12
PLH11
HCB2012KF-121T50_0805
EMI@
1 2
PLH1
0.68UH_7.9A_20%_5X5X3_M
1 2
PCH14
1U_0201_6.3V6M
12
PCH2
2200P_0402_50V7K
EMI@
12
PRH10
0_0402_5%
@
12
PCH7
22U_0603_6.3V6M
12
PUH1
SY8286RAC_QFN20_3X3
IN
2
LX
6
GND
8
NC
10
NC
12
NC
16
GND
18
IN
4
FB
14
BS
1
IN
3
IN
5
GND
7
PG
9
EN
11
ILMT
13
BYP
15
VCC
17
LX
20
LX
19
PAD
21
PCH13
2.2U_0402_6.3V6M
12
PRH6
20.5K_0402_1%
12
PRH5
12K_0402_1%
1 2
PCH15
0.1U_0402_25V6
12
PCH12
22U_0603_6.3V6M
@
12
PCH11
22U_0603_6.3V6M
12
PRH11
1K_0402_5%
1 2
PRH13
1M_0402_5%
1
2
PRH2
0_0603_5%
@0@
1 2
PCH9
22U_0603_6.3V6M
12
PRH8 0_0402_5%@0@
1 2
PRH7 0_0402_5%@0@
1 2
www.laptoprepairsecrets.com
Page 63
1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
CFL_H 42
Compal Electronics, Inc.
PR1199 NA, ne ed confirm
Place close to H-side,L-side MOS
in VCORE first phase
Place close t o Choke in VC ORE
first phase ci rcuit
Place close t o Choke in VCC SA first phase circuit
Place close t o Choke in VC CGT first phase circuit
Place close to H-side,L-side MOS
in VCCGT first phase
LA-F611PR01_0531D.DSN
PROCHOT# change to H_PROCHOT#(P.72 PUZ01.39)
LA-F611PR01_0531C.DSN
IMVP_VR_ON change to VR_ON(P.72 PUZ01.43)
LA-F611PR01_0531C.DSN
PCH_PWROK change to IMVP_VR_PG(P.72 PUZ01.45)
CSREF_2PH
CSP1_2PH
TSENSE_2PH
CSP4_4PH
SVID_DAT_PWR_CPU
SVID_CLK_PWR_CPU
SVID_ALERT#_PWR_CPU
CSCOMP_2PH
FB_2PH
DIFFOUT_2PH
TSENSE_4PH
VSP_4PH
DIFFOUT_4PH
VSN_1PH
CPU_EN
TSENSE_4PH
VSN_2PH
VSP_2PH
CSP1_2PH
SVID_ALERT#_PWR_CPU
CSN_1PH_R
CSP_1PH
COMP_1PH
ILIM_1PH
VSP_1PH
VSN_1PH
VSP_4PH
VSN_4PH
SVID_DAT_PWR_CPU
SVID_CLK_PWR_CPU
81215_VR_HOT
ILIM_4PH
81215_VR_HOT
ILIM_2PHCSCOMP_4PH
CSSUM_2PH
COMP_2PH
CSSUM_4PH
COMP_4PH
CSREF_4PH
CSP4_4PH
FB_4PH
CSREF_4PH
PWM2_2PH/ROSC1
CSP1_4PH
CSREF_4PH
CSP2_4PH
CSREF_4PH
CSP3_4PH
VSP_1PH
TSENSE_2PH
CSREF_4PH
VSN_4PH
CSP3_4PH
CSP2_4PH
CSREF_2PH
CSP1_4PH
I
M
O
N
_
1
P
H
+5VALW
+19VB_CPU
+1.05V_VCCST
+5VALW
+5VALW
+3VS
+VCC_SA
+VCC_CORE
+VCC_GT
PWM1_4PH/ICCMAX4<92>
PWM4_4PH/ROSCM<92>
PWM1_2PH/ICCMAX2 <93>
PWM2_4PH/ADDR<92>
PWM1_1PH/ICCMAX1 <93>
CSREF_4PH< 92>
PWM3_4PH/VBOOT<92>
VCC_SENSE_IA<11>
SW3_4PH< 91,92>
SW2_4PH< 91,92>
SW1_4PH< 91,92>
VSS_SENSE_GT <11>
VCC_SENSE_GT <11>
VSS_SENSE_IA< 11>
SW1_2PH <91,93>
VCC_SENSE_SA<12>
VSS_SENSE_SA<12>
SW_1PH <93>
VR_ON <58,78,90>
CSREF_2PH <93>
CPU_SVID_ALERT#_R <10 >
CPU_SVID_DAT_R <10>
SW1_2PH <91,93>
VCCCORE_VR_PWRGD<58>
DRVON<92,93>
CPU_SVID_CLK_R <1 0>
SW1_4PH< 91,92>
SW4_4PH< 91,92>
VR_HOT# <58>
SW4_4PH< 91,92>
SW3_4PH< 91,92>
SW2_4PH< 91,92>
CSN_1PH<93>
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
CPU IC
Custom
91 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
CPU IC
Custom
91 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
CPU IC
Custom
91 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
PRZ35
26.1K_0402_1%
12
PRZ63
24.9K_0402_1%
12
PRZ58
25.5K_0402_1%
1 2
PRZ45
75K_0402_1%
12
PRZ9
0_0402_5%
@0@
1 2
PRZ10
1K_0402_5%
1 2
PRZ51
80.6K_0603_1%
1 2
PRZ6
100_0402_1%
1 2
PRZ25
0_0402_5%
@0@
1 2
PCZ12
1000P_0402_50V7K
1 2
PRZ4
10_0402_1%
12
PRZ41
3.65K_0402_1%
1 2
PRZ8
45.3_0402_1%
12
PCZ21
470P_0402_50V8J
12
PRZ70
100K_0402_1%
@
1 2
PHZ3
220K_0402_5%_ERTJ0EV224J
12
PRZ69
3.74K_0402_1%
1 2
PCZ30
0.1U_0402_25V6
12
PCZ11
15P_0402_50V8J
1 2
PHZ4
220K_0402_5%_ERTJ0EV224J
12
PCZ10
0.01U_0402_25V7K
12
PRZ61
110K_0402_1%
12
PRZ22
1.5K_0402_1%
12
PRZ36
3.65K_0402_1%
1 2
PRZ62
4.32K_0402_1%
12
PCZ14
1000P_0402_50V7K
12
PRZ74
100K_0402_1%
@
1 2
PRZ38
49.9_0402_1%
1 2
PRZ59
3.74K_0402_1%
1 2
PCZ32
0.1U_0402_25V6
1 2
PRZ57
24.9K_0402_1%
1 2
PRZ30
0_0402_5%
@0@
1 2
PCZ18
2200P_0402_50V7K
1 2
PCZ6
2200P_0402_50V7K
1 2
PRZ43 12K_0402 _1%
1 2
PCZ28
680P_0402_50V7K
12
PRZ65
97.6K_0402_1%
12
PRZ47
118K_0603_1%
CFL@
1 2
PRZ75
61.9K_0402_1%
12
PCZ33
1U_0402_6.3V6K
12
PRZ3 100_0402_1%
1 2
PCZ24
82P_0402_50V8J
12
PRZ52
191K_0603_1%
CML@
PRZ72
0_0402_5%
@0@
12
PCZ15
2200P_0402_50V7K
1 2
PRZ21 100_0402_1%
1 2
PRZ24
0_0402_5%
@0@
1 2
PRZ47
191K_0603_1%
CML@
PCZ13
2200P_0402_50V7K
1 2
PHZ5
220K_0402_5%_ERTJ0EV224J
12
PRZ50
191K_0603_1%
CML@
PRZ42
18.7K_0402_1%
CML@
PRZ2
7.5K_0603_1%
1 2
PRZ37
1K_0402_1%
1 2
PRZ56
2.2_0603_5%
1 2
PCZ22
2200P_0402_50V7K
1 2
PRZ16 49.9_0402_1%
1 2
PCZ2
0.01U_0402_50V7K
1 2
PCZ31
0.01U_0402_50V7K
1 2
PRZ39
29.4K_0402_1%
1 2
PRZ66
3.74K_0402_1%
1 2
PRZ52
118K_0603_1%
CFL@
1 2
PRZ53
1K_0402_1%
@
12
PRZ13
100_0402_1%
1 2
PCZ35
0.047U_0402_25V7K
1 2
PCZ25
680P_0402_50V7K
1 2
PRZ18 0_04 02_5%@0@
12
PRZ12
1.62K_0402_1%
1 2
PCZ16
15P_0402_50V8J
1 2
PRZ20 10_0402_1%
1 2
PHZ1
100K_0402_1%_TSM0B104F4251RZ
1 2
PRZ49
165K_0402_1%
12
PRZ60
100K_0402_1%
@
1 2
PRZ34
49.9_0402_1%
1 2
PRZ54
191K_0603_1%
CML@
PRZ73
0_0402_5%
@0@
12
PRZ42
30.1K_0402_1%
CFL@
1 2
PRZ50
118K_0603_1%
CFL@
1 2
PRZ33 100_0 402_1%
1 2
PRZ5
499_0402_1%
@
12
PRZ19
12.4K_0402_1%
12
PCZ19
470P_0402_50V8J
1 2
PRZ54
118K_0603_1%
CFL@
1 2
PHZ2
220K_0402_5%_ERTJ0EV224J
12
PCZ5
3300P_0402_50V7-K
12
PCZ36
0.047U_0402_25V7K
1 2
PRZ7
45.3_0402_1%
@
12
PCZ26
0.1U_0402_25V7K
1 2
PCZ17
470P_0402_50V8J
1 2
PRZ23
34.8K_0402_1%
1 2
PCZ4
1000P_0402_50V7K
1 2
PRZ44
75K_0402_1%
12
PRZ71
3.74K_0402_1%
1 2
PRZ67
3.74K_0402_1%
1 2
PRZ1
12K_0402_1%
1 2
PCZ27
82P_0402_50V8J
12
PRZ27
0_0402_5%
@0@
1 2
PCZ3
0.1U_0402_25V6
1 2
PCZ8
1000P_0402_50V7K
1 2
PCZ9
1000P_0402_50V7K
1 2
PRZ14
29.4K_0402_1%
12
PRZ17
10K_0402_1%
12
PCZ1
2200P_0402_50V7K
1 2
PCZ38
0.047U_0402_25V7K
1 2
PRZ11
0_0402_5%
@0@
1 2
PRZ40
1K_0402_1%
12
PCZ7
470P_0402_50V8J
12
PRZ76
61.9K_0402_1%
12
PCZ37
0.047U_0402_25V7K
1 2
PRZ15 100_0402_1%
1 2
PRZ68
100K_0402_1%
@
1 2
PUZ1
NCP81215PNTXG_QFN52_6X6
VSN_4PH
2
VSP_4PH
1
IMON_4PH
3
DIFFOUT_4PH
4
FB_4PH
5
COMP_4PH
6
ILIM_4PH
7
CSCOMP_4PH
8
CSSUM_4PH
9
CSREF_4PH
10
CSP1_4PH
11
CSP2_4PH
12
CSP3_4PH
13
PWM1_4PH/ICCMAX_4PH18PWM2_4PH/ADDR19PWM3_4PH/VBOOT20PWM4_4PH/ROSC_MPH21PWM2_2PH/ROSC_1PH22PWM1_2PH/ICCMAX_2PH
23
DRON
17
CSP2_2PH
27
CSP1_2PH
28
CSREF_2PH
29
CSSUM_2PH
30
CSCOMP_2PH
31
ILIM_2PH
32
COMP_2PH
33
FB_2PH
34
DIFFOUT_2PH
35
IMON_2PH
36
VSN_2PH
37
VSP_2PH
38
VRHOT#
39
SDIO
40
ALERT#
41
SCLK
42EN43
PWM_1PH/ICCMAX_1PH
44
VR_RDY
45
IMON_1PH
46
CSP_1PH
47
CSN_1PH
48
ILIM_1PH
49
COMP_1PH
50
VSN_1PH
51
VSP_1PH
52
TAB
53
VCC16TSENSE_4PH14VRMP
15
TTSENSE_1PH/PSYS24TTSENSE_2PH25CSP4_4PH
26
PRZ55
1K_0402_1%
1 2
PRZ48
165K_0402_1%
12
PRZ26 100_0402_1%
1 2
PCZ23
470P_0402_50V8J
1 2
PRZ46
1K_0402_1%
12
PCZ29
0.1U_0402_25V7K
12
PCZ20
15P_0402_50V8J
1 2
PRZ32
0_0402_5%
@0@
1 2
PCZ34
0.047U_0402_25V7K
1 2
PRZ28
1K_0402_1%
1 2
PRZ29 100_0402_1%
1 2
PRZ64
97.6K_0402_1%
12
PRZ31
1.37K_0402_1%
1 2
www.laptoprepairsecrets.com
Page 64
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Main Func = CORE
SH00001EF00(common part)
7x7X3
Isat:45A
DCR:0.9mΩ+/-5%
MOSFET: DFN 5X6E
H/S Rds(on): 7.1mohm(Typ), 9.1mohm(Max)
L/S Rds(on): 2mohm(Typ), 2.5mohm(Max)
+VCC CORE
TDC= 80A->86A
Peak Current= 128A->140A
OCP Current= 154A->168A
Load Line= 1.8mV/A
Vboot= 0V
SH00001EF00(common part)
7x7X3
Isat:45A
DCR:0.9mΩ+/-5%
SH00001EF00(common part)
7x7X3
Isat:45A
DCR:0.9mΩ+/-5%
SH00001EF00(common part)
7x7X3
Isat:45A
DCR:0.9mΩ+/-5%
SNB1_VCORE
SNB2_VCORE
SNB3_VCORE
+19VB_CPU
UG1_VCORE_R
LG3_VCORE
LG2_VCORE
LX2_VCORE
LX1_VCORE
BST1_VCORE_RBST1_VCORE
UG1_VCORE
LG1_VCORE
DRVON
UG3_VCORE
LX3_VCORE
BST3_VCORE_RBST3_VCORE
DRVON
UG2_VCORE
BST2_VCORE_RBST2_VCORE
SNB4_VCORE
LG4_VCORE
DRVON
UG4_VCORE
LX4_VCORE
BST4_VCORE_RBST4_VCORE
UG2_VCORE_R
UG3_VCORE_R
UG4_VCORE_R
PWM1_4PH/ICCMAX4<91>
DRVON<91,93>
CSREF_4PH<91>
SW1_4PH<91>
SW3_4PH<91>
PWM3_4PH/VBOOT<91>
SW2_4PH<91>
PWM2_4PH/ADDR<91>
SW4_4PH<91>
PWM4_4PH/ROSCM<91>
+5VALW
+VCC_CORE
+5VALW
+19VB_CPU
+VCC_CORE
+5VALW
+19VB_CPU
+VCC_CORE
+19VB
+5VALW
+19VB_CPU
+VCC_CORE
Title
Size
Document Number Re v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
CPU_CORE
Custom
92 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Title
Size
Document Number Re v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
CPU_CORE
Custom
92 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Title
Size
Document Number Re v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
CPU_CORE
Custom
92 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
PLZ2
0.15UH_NA__35A_20%
134
2
PUZ5
NCP81151MNTBG_DFN8_2X2
BST
1
PWM
2
EN
3
VCC
4
FLAG
9
DRVH
8
SW
7
GND
6
DRVL
5
PCZ66
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PCZ58
0.1U_0603_25V7K
EMI@
12
PRZ80
4.7_1206_5%
@EMI@
12
PRZ90 10_0402_1%
1 2
PRZ79
2.2_0603_5%
1 2
PCZ51
680P_0402_50V7K
@EMI@
12
PUZ4
NCP81151MNTBG_DFN8_2X2
BST
1
PWM
2
EN
3
VCC
4
FLAG
9
DRVH
8
SW
7
GND
6
DRVL
5
PRZ91 10_0402_1%
1 2
PRZ86
0_0603_5%
1 2
PRZ88
4.7_1206_5%
@EMI@
12
PCZ39
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PLZ4
0.15UH_NA__35A_20%
134
2
PCZ54
680P_0402_50V7K
@EMI@
12
PRZ92 10_0402_1%
1 2
PRZ82
4.7_1206_5%
@EMI@
12
PRZ81
2.2_0603_5%
1 2
PRZ87
2.2_0603_5%
1 2
PRZ89 10_0402_1%
1 2
PCZ44
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PLZ3
0.15UH_NA__35A_20%
134
2
PUZ2
NCP81151MNTBG_DFN8_2X2
BST
1
PWM
2
EN
3
VCC
4
FLAG
9
DRVH
8
SW
7
GND
6
DRVL
5
PCZ57
680P_0402_50V7K
@EMI@
12
PCZ53
0.22U_0603_25V7K
12
PRZ83
0_0603_5%
1 2
PCZ67
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PRZ77
2.2_0603_5%
1 2
+
PCZ65
33U_25V_M
1
2
PLZ11
HCB2012KF-121T50_0805
EMI@
1 2
PCZ62
0.22U_0603_25V7K
12
PLZ1
0.15UH_NA__35A_20%
134
2
PCZ61
2.2U_0402_6.3V6M
12
+
PCZ48
33U_25V_M
1
2
PCZ64
680P_0402_50V7K
@EMI@
12
PRZ84
0_0603_5%
1 2
PRZ85
0_0603_5%
1 2
PCZ52
2.2U_0402_6.3V6M
12
PCZ71
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PRZ78
4.7_1206_5%
@EMI@
12
PCZ55
2.2U_0402_6.3V6M
12
PCZ45
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
AONY36352_DFN5X6D-8-7
PQZ4
S2-24S2-3
5
G1
1
S2-13G2
6
D1
2
D2/S1
7
PCZ49
2.2U_0402_6.3V6M
12
PCZ59
0.1U_0603_25V7K
EMI@
12
PCZ60
0.1U_0603_25V7K
EMI@
12
AONY36352_DFN5X6D-8-7
PQZ2
S2-24S2-3
5
G1
1
S2-13G2
6
D1
2
D2/S1
7
PUZ3
NCP81151MNTBG_DFN8_2X2
BST
1
PWM
2
EN
3
VCC
4
FLAG
9
DRVH
8
SW
7
GND
6
DRVL
5
PCZ50
0.22U_0603_25V7K
12
PCZ56
0.22U_0603_25V7K
12
AONY36352_DFN5X6D-8-7
PQZ3
S2-24S2-3
5
G1
1
S2-13G2
6
D1
2
D2/S1
7
PCZ46
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
AONY36352_DFN5X6D-8-7
PQZ1
S2-24S2-3
5
G1
1
S2-13G2
6
D1
2
D2/S1
7
PLZ12
HCB2012KF-121T50_0805
EMI@
1 2
PCZ70
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
www.laptoprepairsecrets.com
Page 65
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Main Func = VCCGT/+VCCSA
near choke
Choke 0.47uH SH00001ED00 (Commom Part)
(Size:5.7 x 5.4 x 3.0 mm)
(DCR:6.2m +-5%)
+VCCGT
TDC= 25A
Peak Current= 32A
OCP Current= 39A
Load Line= 2.7mV/A
Vboot= 0V
+VCCSA
TDC= 10A
Peak Current = 11A
OCP Current= 13A
Load Line= 10.3mV/A
Vboot= 1.05V
MOSFET: DFN 5X6E
H/S Rds(on): 7.1mohm(Typ), 9.1mohm(Max)
L/S Rds(on): 2mohm(Typ), 2.5mohm(Max)
SH00001EF00(common part)
7x7X3
Isat:45A
DCR:0.9mΩ+/-5%
UG_VCCGT_R
SNB_VCCGT
LX_VCCGT
DRVON
UG_VCCGT
LX_VCCGT
BST_VCCGT_R
LG_VCCGT
BST_VCCGT
BST_VCCSA
LG_VCCSA
UG_VCCSA
LX_VCCSA
SNB_VCCSA
LX_VCCSA
BST_VCCSA_R
SW1_2PH <91>
PWM1_2PH/ICCMAX2<91>
CSREF_2PH<91>
CSN_1PH<91>
DRVON<91,92>
PWM1_1PH/ICCMAX1<91>
SW_1PH <91>
+19VB_CPU
+5VALW
+VCC_GT
+VCC_SA
+5VALW
+19VB_CPU
Title
Size Document Number Re v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
93 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
+VCC_GT/+VCC_SA
Title
Size Document Number Re v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
93 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
+VCC_GT/+VCC_SA
Title
Size Document Number Re v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
93 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
+VCC_GT/+VCC_SA
PCA5
0.22U_0603_25V7K
1 2
PLA1
0.47UH_MMD05CZR47M_12A_20%
1
3
4
2
PUA1
NCP81253MNTBG_DFN8_2X2
BST
1
PWM
2
EN
3
VCC
4
PAD
9
DRVL
5
GND
6
SW
7
DRVH
8
EMB09A03VP_EDFN3X3-8-10
PQA1
S2
6
D1
4
S2
7
G1
1
S2
5
D1
3
G2
8
D1
2
D1
10
D2/S1
9
PRA1
4.7_1206_5%
@EMI@
12
PRG3 0_0603_5%
1 2
PCG7
680P_0402_50V7K
@EMI@
12
PCG6
0.22U_0603_25V7K
12
PRG2
4.7_1206_5%
@EMI@
12
AONY36352_DFN5X6D-8-7
PQG1
S2-24S2-3
5
G1
1
S2-1
3
G2
6
D1
2
D2/S1
7
PCA2
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PUG1
NCP81151MNTBG_DFN8_2X2
BST
1
PWM
2
EN
3
VCC
4
FLAG
9
DRVH
8
SW
7
GND
6
DRVL
5
PRA2
2.2_0603_5%
1 2
PCG8
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PCG3
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PCG9
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PRG1
2.2_0603_5%
1 2
PCG4
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
PCA6
680P_0402_50V7K
@EMI@
12
PCA4
2.2U_0402_6.3V6M
12
PCG5
2.2U_0402_6.3V6M
12
PRG4
10_0402_1%
1 2
PLG1
0.15UH_NA__35A_20%
1
3
4
2
PCA1
1
0
U
_
0
6
0
3
_
2
5
V
6
M
12
www.laptoprepairsecrets.com
Page 66
5
5
4
4
3
3
2
2
D
C
B
A
C
F
L
H
8
2
T
o
t
a
l
V
C
O
R
E
O
u
t
p
u
t
C
a
p
a
c
i
t
o
r
:
2
X
3
3
0
u
F
_
D
1
_
2
V
1
X
2
2
0
u
F
_
D
7
_
2
V
2
2
+
1
9
@
X
2
2
u
F
_
0
6
0
3
_
X
5
R
f
o
r
H
6
2
2
4
+
6
@
X
1
u
F
_
0
2
0
1
T
o
t
a
l
V
C
C
G
T
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u
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p
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C
a
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a
c
i
t
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r
:
2
X
2
2
0
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F
_
D
2
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2
V
1
8
+
2
@
X
2
2
u
F
_
0
6
0
3
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X
5
R
1
2
+
8
@
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1
u
F
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0
2
0
1
R
e
v
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r
s
e
f
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r
A
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8
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u
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p
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:
3
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3
3
0
u
F
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D
1
_
2
V
1
X
2
2
0
u
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D
7
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2
V
4
1
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2
2
u
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_
0
6
0
3
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5
R
f
o
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H
6
2
3
0
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1
u
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0
2
0
1
+
V
C
C
_
C
O
R
E
+
V
C
C
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+
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C
C
_
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A
+
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+
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www.laptoprepairsecrets.com
Page 67
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWMVID 的 RC BOM
請 根 據 GPU 's conf i g 設定
R1
R3
R4
R5
R2
C
NVVDD1
TDC 45A
Peak Current 120.5A
OCP 200A
Fsw=300kHz
PSI_GPU
NVVDD1_PG
VID_GPU
DAC_GPU
VINMON_GPU
REFADJ_GPU
COMP_GPU
EAP_GPU
VGA_I2CC_SCL_PWR
VGA_I2CC_SDA_PWR
VREF_GPU
NVVDD1_FBRTN
LPC_GPU
CH_OC_GPU
PWM2_GPU
CSP1_GPU
CSP2_GPU
PWM3_GPU
PWM4_GPU
TSENSE_GPU
ADDR/FSW_GPU
IMON_GPU
FDMF3170_REFIN
VGA_I2CC_SCL_PWR
VGA_I2CC_SDA_PWR
CSP3_GPU
EN_GPU
REFIN_GPU
PWM1_GPU
CSNSUM_GPU
CSPSUM_GPU
EN_GPU
NVVDD_VID<27>
NVVDD_PSI <27>
NVVDD1_EN<27,37>
VCC_SENSE_NVVDD1<29>
VSS_SENSE_NVVDD1<29>
TSENSE_GPU<97>
FDMF3170_IMON1 <97>
FDMF3170_IMON2 <97>
GPU_PWM1 <97>
GPU_PWM2 <97>
GPU_DRVON <97>
VGA_I2CC_SCL_PWR<27>
VGA_I2CC_SDA_PWR<27>
FDMF3170_REFIN <97>
+5VS
+5VCC
NVVDD1_FBRTN
NVVDD1_FBRTN
+NVVDD1
NVVDD_B+
+3VS
+3VS
+3VALW
+5VCC
+5VCC
+5VCC
+5VCC
VOUT_S
+3VS
+5VS
+5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
96 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_VGA_UP9512P
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
96 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_VGA_UP9512P
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
96 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_VGA_UP9512P
PRV30
1K_0402_1%
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0.1U_0402_25V6
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30
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16.5K_0402_1%
12
PRV21
0_0402_5%
@
1 2
PRV71 113K_0402_1%
12
PRV50
0_0402_5%
@0@
1 2
PRV2
4.99K_0402_1%
12
PUV8
TC7SH08FU_SSOP5~D
@
B
1
A
2
G
3
O
4
P
5
PRV51
0_0402_5%
@0@
1 2
PRV16
0_0402_5%
12
PRV40
10K_0402_1%
12
PCV14
0.1U_0402_25V6
@
1 2
PRV18
0_0402_5%
12
PRV29
100K_0402_1%
12
PRV20
0_0402_5%
@0@
12
PRV42
2.2_0603_5%
12
PCV6
0.015U_0402_16V7K
1 2
PRV13
0_0402_5%
12
PRV72 22.6K_0402_1%@
12
PRV9
3.6K_0402_1%
12
PRV1
0_0402_5%
1 2
PCV13
0.1U_0402_25V6
@
12
PRV15
2.4K_0402_1%
12
PRV12
0_0402_5%
12
PQV01B
DMN53D0LDW-7 2N SOT363-6
3
5
4
PRV66
20.5K_0402_1%
12
PRV139
10K_0402_1%
12
PRV70
0_0402_5%
@0@
1 2
PRV25
0_0402_5%
@
1 2
PCV7
0.1U_0402_25V6
@
1 2
PRV69 232K_0402_1%
12
PRV3
34K_0402_1%
1 2
PRV6
4.3K_0402_1%
12
PRV39
10K_0402_1%
1 2
PRV146
0_0402_5%
@0@
12
PRV142
0_0402_5%
@
12
PCV8
0.1U_0402_25V6
@
12
PRV35
10_0402_1%
1 2
PRV14
2K_0402_1%
1 2
PRV31
1K_0402_1%
12
PRV141
0_0402_5%
@
12
PRV11
10K_0402_1%
12
PRV54
0_0402_5%
@0@
12
PQV01A
DMN53D0LDW-7 2N SOT363-6
61
2
PRV7
442_0402_1%
1 2
PRV52
0_0402_5%
@
1 2
PRV61
100K_0402_1%
1 2
PRV56
0_0402_5%
@0@
12
PCV3
1U_0402_6.3V6K
1 2
PCV5
0.1U_0402_25V6
@
1 2
PRV19
1K_0402_1%
@
12
PRV53
4.32K_0402_1%
12
PCV1
0.1U_0402_25V6
@
12
PRV46
0_0402_5%
@0@
1 2
PRV63
100K_0402_1%@
12
PCV10
0.1U_0402_25V6
@
12
www.laptoprepairsecrets.com
Page 68
1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
Use 0805 size
Use 0805 size
10X10X4
Isat:90A
DCR:0.55mΩ(+/-5%)
10X10X4
Isat:90A
DCR:0.55mΩ(+/-5%)
+NVVDD1
TDC 45.8A
Peak Current 120.5A
OCP current 144.6A
fsw=300kHz
co-lay 0603 low noise MLCC
GPU1_SNB1
PHASE1_FDMF3170
BST1_FDMF3170
VCC1_FDMF3170
+NVVDD1
VOS1_FDMF3170
PWM1_FDMF3170
EN1_FDMF3170
FDMF3170_IMON1
FDMF3170_REFIN1
LX1_FDMF3170
TMON1_FDMF3170
GPU1_SNB2
LX2_FDMF3170
PHASE2_FDMF3170
BST2_FDMF3170
VCC2_FDMF3170
+NVVDD1
VOS2_FDMF3170
PWM2_FDMF3170
EN2_FDMF3170
FDMF3170_IMON2
FDMF3170_REFIN2
TMON2_FDMF3170
CSSN_B+<36>CSSP_B+<36> CSSN_NVVDD< 36>CSSP_NVVDD <36>
GPU_PWM1<96>G PU_DRVON <96>
FDMF3170_IMON1<96>
TSENSE_GPU<96>
GPU_PWM2<96>
FDMF3170_IMON2<96>
FDMF3170_REFIN <96>
GPU_B+
+19VB
NVVDD_B+
+NVVDD1
+5VS
+5VS
NVVDD_B+
+NVVDD1
+5VS
+5VS
NVVDD_B+
Title
Size Document Number R e v
Date: Sheet
o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
97 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_+NVVDD1
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
97 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_+NVVDD1
Title
Size Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
97 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_+NVVDD1
PLV2
S COIL 0.22UH 20% MMD-10DZIR22MER1L 50A
1 2
PRV77
0_0402_5%
NCP303150@
1 2
PCV40
0.1U_0603_25V7K
12
PRV78
2_0402_5%
1 2
PCV367
10U_0603-H1_2_25V6M
@
12
PUV3
QD9619AQR1
NC
1
PVCC
4
VCC
3
AGND
2
PGND
5
PGND2
20
PWM
14
DISB#
15
IMON
18
REFIN
19
GL6TP
21
PGND1
7
SW
8
PHASE
12
BOOT
13
VIN
9
VIN1
10
N/C
11
ZCD_EN
17
FAULT
16
PRV154
4.7_1206_5%
EMI@
12
PCV60
680P_0402_50V7K
EMI@
12
PCV362
10U_0603-H1_2_25V6M
@
12
PCV32
10U_0805_25VAK
12
PCV364
10U_0603-H1_2_25V6M
@
12
PCV37
2.2U_0402_6.3V6M
12
PCV34
10U_0805_25VAK
12
PCV38
10U_0805_25VAK
12
PRV75
0.005_1206_1%
1
3
4
2
PCV47
0.1U_0402_25V6
EMI@
12
PUV2
QD9619AQR1
NC
1
PVCC
4
VCC
3
AGND
2
PGND
5
PGND2
20
PWM
14
DISB#
15
IMON
18
REFIN
19
GL6TP
21
PGND1
7
SW
8
PHASE
12
BOOT
13
VIN
9
VIN1
10
N/C
11
ZCD_EN
17
FAULT
16
PCV57
0.1U_0603_25V7K
12
PRV91 0_0402_5%@0@
1 2
PCV44
2.2U_0402_6.3V6M
1 2
PRV95
0_0402_5%
@0@
1 2
PRV94 0_0402_5%@0@
1 2
PRV93
4.7_1206_5%
EMI@
12
PRV82
0_0402_5%
@0@
1 2
PRV79 0_0402_5%@0@
1 2
PRV76
30K_0402_5%
1 2
PCV363
10U_0603-H1_2_25V6M
@
12
PCV27
2.2U_0402_6.3V6M
1 2
PRV86
2_0402_5%
1 2
PRV80
2.2_0603_1%
1 2
PCV54
2.2U_0402_6.3V6M
12
PLV3
S COIL 0.22UH 20% MMD-10DZIR22MER1L 50A
1 2
PLV11
HCB2012KF-121T50_0805
EMI@
1 2
PCV33
10U_0805_25VAK
12
PCV366
10U_0603-H1_2_25V6M
@
12
PCV30
0.1U_0402_25V6
EMI@
12
PCV365
10U_0603-H1_2_25V6M
@
12
PCV31
2200P_0402_50V7K
EMI@
12
+
PCV249
33U_25V_M
1
2
PCV35
10U_0805_25VAK
12
PRV85
0_0402_5%
@0@
1 2
PCV255
680P_0402_50V7K
EMI@
12
PRV87
0_0402_5%
NCP303150@
1 2
PCV41
10U_0805_25VAK
12
PRV89 0_0402_5%@0@
1 2
PLV12
HCB2012KF-121T50_0805
EMI@
1 2
PCV49
10U_0805_25VAK
12
PCV39
10U_0805_25VAK
12
PRV92
0_0402_5%
@0@
1 2
PRV88
30K_0402_5%
1 2
PCV368
10U_0603-H1_2_25V6M
@
12
PRV81 0_0402_5%@0@
1 2
PRV84 0_0402_5%@0@
1 2
PCV48
2200P_0402_50V7K
EMI@
12
PCV369
10U_0603-H1_2_25V6M
@
12
PRV90
2.2_0603_1%
1 2
PRV74
0.005_1206_1%
1
3
4
2
www.laptoprepairsecrets.com
Page 69
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
N18P-G62
+NVVDD
560uF X 5
22uF_0603 X 15
10uF_0402X 34
1uF_0201 X 28
+NVVDD1
+NVVDD1+NVVDD1
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
98 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_VGA DECOUPLING
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
98 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_VGA DECOUPLING
Title
Size Document Number R ev
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
98 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_VGA DECOUPLING
PCV216
10U_0402_6.3V6M
12
PCV151
1U_0201_6.3VAM
12
PCV140
1U_0201_6.3VAM
12
PCV225
10U_0402_6.3V6M
12
PCV144
1U_0201_6.3VAM
12
PCV245
22U_0603_6.3V6M
12
PCV358
22U_0603_6.3V6M
12
PCV158
1U_0201_6.3VAM
12
PCV156
1U_0201_6.3VAM
12
PCV165
1U_0201_6.3VAM
12
PCV235
10U_0402_6.3V6M
12
PCV276
10U_0402_6.3V6M
12
PCV279
10U_0402_6.3V6M
12
PCV236
10U_0402_6.3V6M
12
+
PCV139
560U_D2_2VM_R4.5M
1
2
PCV155
1U_0201_6.3VAM
12
PCV160
1U_0201_6.3VAM
12
PCV220
10U_0402_6.3V6M
12
PCV254
22U_0603_6.3V6M
12
PCV164
1U_0201_6.3VAM
12
PCV232
10U_0402_6.3V6M
12
PCV360
22U_0603_6.3V6M
12
PCV253
22U_0603_6.3V6M
12
PCV150
1U_0201_6.3VAM
12
PCV152
1U_0201_6.3VAM
12
PCV230
10U_0402_6.3V6M
12
PCV284
10U_0402_6.3V6M
12
PCV224
10U_0402_6.3V6M
12
PCV281
10U_0402_6.3V6M
12
+
PCV137
330U_D1_2VY_R9M
1
2
PCV282
10U_0402_6.3V6M
12
PCV251
1U_0201_6.3VAM
12
PCV226
10U_0402_6.3V6M
12
+
PCV272
560U_D2_2VM_R4.5M
1
2
PCV359
22U_0603_6.3V6M
12
PCV142
1U_0201_6.3VAM
12
PCV218
10U_0402_6.3V6M
12
PCV221
10U_0402_6.3V6M
12
PCV287
10U_0402_6.3V6M
12
+
PCV138
560U_D2_2VM_R4.5M
1
2
PCV233
10U_0402_6.3V6M
12
PCV163
1U_0201_6.3VAM
12
PCV252
22U_0603_6.3V6M
12
PCV149
1U_0201_6.3VAM
12
PCV161
1U_0201_6.3VAM
12
PCV248
22U_0603_6.3V6M
12
PCV219
10U_0402_6.3V6M
12
PCV223
10U_0402_6.3V6M
12
PCV244
22U_0603_6.3V6M
12
PCV256
22U_0603_6.3V6M
12
PCV243
22U_0603_6.3V6M
12
+
PCV136
330U_D1_2VY_R9M
1
2
PCV246
22U_0603_6.3V6M
12
PCV153
1U_0201_6.3VAM
12
PCV277
10U_0402_6.3V6M
12
PCV227
10U_0402_6.3V6M
12
PCV234
10U_0402_6.3V6M
12
PCV283
10U_0402_6.3V6M
12
PCV154
1U_0201_6.3VAM
12
PCV143
1U_0201_6.3VAM
12
PCV141
1U_0201_6.3VAM
12
+
PCV135
560U_D2_2VM_R4.5M
@
1
2
PCV215
10U_0402_6.3V6M
12
PCV247
22U_0603_6.3V6M
12
PCV275
10U_0402_6.3V6M
12
PCV147
1U_0201_6.3VAM
12
PCV145
1U_0201_6.3VAM
12
PCV250
10U_0402_6.3V6M
12
PCV217
10U_0402_6.3V6M
12
PCV361
22U_0603_6.3V6M
12
PCV159
1U_0201_6.3VAM
12
PCV229
10U_0402_6.3V6M
12
PCV146
1U_0201_6.3VAM
12
PCV157
1U_0201_6.3VAM
12
PCV237
10U_0402_6.3V6M
12
PCV162
1U_0201_6.3VAM
12
PCV258
1U_0201_6.3VAM
12
PCV231
10U_0402_6.3V6M
12
PCV280
10U_0402_6.3V6M
12
PCV257
22U_0603_6.3V6M
12
PCV228
10U_0402_6.3V6M
12
PCV222
10U_0402_6.3V6M
12
PCV148
1U_0201_6.3VAM
12
www.laptoprepairsecrets.com
Page 70
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SKL_H 42
+1.35VSDGPU
N18P-G62
TDC 17.2A
Peak Current 18.4A
OCP current 30A
fsw=400kHz
Rocset for 75 .6A
13X8X4
Isat:55A
DCR:1.3mΩ(+/-5%)
MOSFET: DFN 5 X6E
H/S Rds(on): 5.2mohm(Typ ), 7mohm(Max)
L/S Rds(on): 0.8mohm(Typ ), 1.05mohm(M ax)
REFADJ
REF2
RBOOT
REF1
Samesung & M icron VRAM
When,VRAM_VDD _CTL=High
Vboot=1.25V
When,VRAM_VDD _CTL=Low
Vboot=1.2V
co-lay 0603 l ow noise MLCC
UG1_+1.35VS_VGAP
B+_+1.35VS_VGAP
S
N
B
1
_
+
1
.
3
5
V
S
_
V
G
A
P
SW1_+1.35VS_VGAP
BOOT1_+1.35VS_VGAP
UG1_+1.35VS_VGAP
LG1_+1.35VS_VGAP
B
O
O
T
1
_
+
1
.
3
5
V
S
_
V
G
A
P
_
R
PVCC_+1.35VS_VGAP
1.35VSDGPU_PG
OCset_+1.35VS_VGAP
Vsense_+1.35VS_VGAP
PSI_+1.35VS_VGAP
EN_+1.35VS_VGAP
VID_+1.35VS_VGAP
TON_+1.35VS_VGAP
RGND
TON_+1.35VS_VGAP_R
REFIN_+1.35VS_VGAP
VREF_+1.35VS_VGAP
SW1_+1.35VS_VGAP-1
LG1_+1.35VS_VGAP
SW1_+1.35VS_VGAP
VREF_+1.35VS_VGAP
REFADJ_+1.35VS_VGAP_R
REFIN_+1.35VS_VGAP
REFADJ_+1.35VS_VGAP
REFADJ_+1.35VS_VGAP
1.35VSDGPU_PG <27>
FB_VDDQ_SENSE<30>
1.35VSDGPU_EN<27,37>
FBVDDQ_PSI<27>
VRAM_VDD_CTL<27>
GPU_B+
+1.35VSDGPU
+5VALW
+3VS
+1.35VSDGPU
B+_+1.35VS_VGAP
+3VALW
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
100 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_+1.5VRAM
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
100 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_+1.5VRAM
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
100 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PWR_+1.5VRAM
PCW25
10U_0603-H1_2_25V6M
@
12
PRW23
3.3K_0402_1%
12
+
PCW10
330U_D1_2VY_R9M
1
2
PCW17
2.2U_0402_6.3V6M
12
PCW20
0.1U_0402_25V6
12
PCW15
0.1U_0402_16V7K
@
12
PCW5
10U_0805_25VAK
12
PCW11
22U_0603_6.3V6M
12
PCW18
0.1U_0402_25V6
12
PRW28
10K_0402_1%
12
PRW19
100_0402_1%
1 2
AOE6930_DFN5X6E8-10
PQW1
D2/S1_2
6
D1_2
4
D2/S1_3
7
G1
1
D2/S1_1
5
D1_1
3
G2
8
S1/D2
2
S2
10
D1_3
9
PRW20
0_0402_5%
@
1 2
PRW4
2.2_0603_5%
12
PRW25
120K_0402_1%
1 2
PCW1
2200P_0402_50V7K
EMI@
12
PRW9
0_0402_5%
@0@
1 2
PCW24
10U_0603-H1_2_25V6M
@
12
PRW22
4.99K_0402_1%
12
PCW14
0.22U_0603_25V7K
12
+
PCW9
330U_D1_2VY_R9M
1
2
PCW13
22U_0603_6.3V6M
12
PLW11
FBMA-L11-201209-800LMA50T
EMI@
1 2
PRW18
10K_0402_1%
1 2
PCW4
10U_0805_25VAK
12
PRW13
453K_0402_1%
12
PRW14
0_0402_5%
@
1 2
PCW22
2200P_0402_50V7K
12
PRW10
31.6K_0402_1%
12
PRW12
2.2_0402_1%
12
PCW16
680P_0402_50V7K
EMI@
12
PCW3
10U_0805_25VAK
12
PCW6
0.1U_0402_25V6
1 2
PCW12
22U_0603_6.3V6M
12
PRW3
0_0402_5%
@
1 2
+
PCW29
330U_D1_2VY_R9M
@
1
2
PRW11
2.2_0603_5%
1 2
PCW26
10U_0603-H1_2_25V6M
@
12
PRW6
10K_0402_1%
12
PUW1
RT8816BGQW_WQFN20_3X3
UGATE1
2
REFADJ
6
VREF
8
RGND
10
OCSET/SS
12
PHASE2
16
PVCC
18
PSI
4
UGATE2
14
BOOT1
1
EN
3
VID
5
REFIN
7
TON
9
VSNS11PGOOD13BOOT2
15
LGATE2
17
PHASE1
20
LGATE1
19
GND
21
PCW2
0.1U_0402_25V6
EMI@
12
PRW1
1K_0402_1%
1 2
+
PCW23
330U_D1_2VY_R9M
@
1
2
PRW8
4.7_1206_5%
EMI@
12
PRW17 36.5K_0402_1%
12
PLW1
0.47UH_MHT-MHDZIR47MEM1-RT_30A_20%
1 2
PCW21
2200P_0402_50V7K
12
PCW27
0.1U_0402_25V6
@
1 2
+
PCW28
330U_D1_2VY_R9M
@
1
2
PRW24
14K_0402_1%
12
www.laptoprepairsecrets.com
Page 71
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Choke 1uH SH00 000YG00 (Comm on Part)
(Size:3.8 x 3. 8 x 1.9 mm)
Isat:3.42A
(DCR:20m~25m)
Choke: SH00000 YG00 Size:4x 4x2 (Common Pa rt)
Rdc=27± 20% T aiyo
Rdc=20mohm(Typ ), 25mohm(Ma x) Cyntec
Rdc=27± 20% 3L
Rdc=30± 20% T ai-Tech
Rdc=32± 20% C hilisin
Rdc=36mohm(Typ ), Xmohm(Max ) Maglayers
VFB=0.6V
Vout=0.6V* ( 1+Rup/Rdown)
=0.6V* ( 1+13.7/20)
Vout=1.011V
Note:Iload(max )=3A
FB=0.6V
Rup
Rdown
Current limit = 4.7A(min)
Imax=1.6A, Ipeak=2.23A, Io cp:2.68A
FB_1.0VSDGPUP
VIN_1.0VSDGPUP LX_1.0VSDGPUP
EN_1VSDGPU
1VSDGPU_EN <27,37>
PG_1VSDGPU<27>
+1.0VSDGPUP +1 .0VSDGPU
+1.0VSDGPUP
+3VALW
+3VALW
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
1.05VSDGPU
C
102 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
1.05VSDGPU
C
102 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size
Document Number R e v
Date: Sheet o f
Security Classification
Compal Secret Da ta
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
1.05VSDGPU
C
102 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
PL1002
1UH_2.8A_30%_4X4X2_F
1 2
PR1012
20K_0402_1%
12
PC1014
0.1U_0402_16V7K
@
12
PR1010
0_0402_5%
@0@
1 2
PJ1001
JUMP_43X79
@
112
2
PC1009
22U_0603_6.3V6M
12
PC1013
22U_0603_6.3V6M
12
PC1010
22U_0603_6.3V6M
12
PC1011
22U_0603_6.3V6M
@
12
PU1002
SY8003ADFC_DFN8_2X2
NC
5
IN
3
PGND
4
PG
2
FB
1
LX
6
EN
7
SGND
8
PGND
9
PR1009
10K_0402_5%
12
PR1008
1M_0402_5%
12
PR1011
13.7K_0402_1%
12
PJ1003
JUMP_43X79
@
112
2
PR1007
4.7_0603_5%
EMI@
12
PC1012
68P_0402_50V8J
12
PC1008
680P_0402_50V7K
EMI@
12
www.laptoprepairsecrets.com
Page 72
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Version change list
(P.I.R. List)
Page 1 of 1
for PWR
Reason for change PG# Modify List Date PhaseFixed IssueItem
01
02
03
PUZ1 change from ncp81215m_SA0000AQE00 to ncp81215p_SA0000CTW00
PCZ24, PCZ27 change from 82P_0402_SE000014700 to 82p_0402_SE071820J80
PQ201 change from BSS139_SB00001GD00 to BSS138_SB00000PF00
PCB17 change from 2.2u_0603_25V_SE00000WP00 to 2.2u_0603_16V_SE000006S80
PCB20 & PCB21 change from 100p_0603_SE024101J80 to 100p_0402_SE071101J80
PCM6 change from 10u_0603_SE000005T80 to 22u_0603_SE00000M000
PCM7 10u_0603_SE000005T80 change to unpop
PRB12 change form 10_1206_SD011100A80 to 10_0805_SD002100A80
PQB1 & PQB11 change from 2n7002_SB000009Q80 to 2n7002_SB00001GE00
1202 DVT
for cost down
sourcer request P84
NA
P85
NA
avoid incomplete
replacement
NA
1202
1202
DVT
DVT
04
NA P85 Add PRB37 & PRB38 & PRB39 0_0402_SD028000080. avoid chager B2B damage
Co-lay PCV362~PCV369 10u_0603_SE00000X210 for acoustic noise.P97
05
NA for acoustic noise
NA 1209
1209
DVT
DVT
Co-lay PCW24~PCW26 10u_0603_SE00000X210 for acoustic noise.P100for acoustic noiseNA
06
1209 DVT
08
P95 1212
1212
NA CPU transient
DVT
DVT
PRW13 change from 383k_SD034383380 to 453k_SD034453380 DVT1212
09
for efficiency P100NA
PRZ49 change from 274k_0402_SD034274380 to 165k_0402_SD034165380
PCZ163, PCZ164, PCZ165, PCZ166, PCZ167, PCZ168 1u_0201_SE00000UC00 change to SMT for CFL
PCZ107, PCZ113, PCZ114, PCZ115, PCZ116, PCZ121, PCZ123, PCZ127, PCZ128, PCZ130, PCZ131, PCZ132,
PCZ172, PCZ173, PCZ174 change to unpop for CFL
PCZ108, PCZ109, PCZ110, PCZ112, PCZ119, PCZ125, PCZ133, PCZ137 change to SMT for CFL
PRZ14 change from 28k_0402_SD034280280 to 29.4k_0402_SD034294280
07
P91NA CPU transient
PCZ104, PCZ105, PCZ107, PCZ111, PCZ113, PCZ114, PCZ115, PCZ116, PCZ118, PCZ120, PCZ121, PCZ123,
PCZ124, PCZ126, PCZ127, PCZ128, PCZ130, PCZ131, PCZ132, PCZ134, PCZ135, PCZ136, PCZ138, PCZ172,
PCZ173, PCZ174 22u_0603_SE00000M000 change to unpop for CML
PCZ102 & PCZ103 330u_D2_SGA00009S00 change to SMT for CFL
PCZ101 330u_D2_SGA00009S00 change to unpop for CFL
PRB3 footprint change from R_1206_4P to R_1206_4P-D 0114 PVTP85
10
for DFB issueNA
reserve PCW28 & PCW29 330_D1_SGA00009S00P100
11
NA NA 0114 PVT
PH204 SL200002H00 change to SMT
PH203 SL200002H00 change to unpop
P84NANA
12
0114 PVT
PR217,PRB22,PRB25,PRV50,PRV51,PRW9 change from 0_0402 to R-short
13
NA NA 0114 PVT
14
NA for DFB issue PRB19 footprint change from R_1206_4P to R_1206_4P-D 0116 PVTP85
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
PIR
Custom
110 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
PIR
Custom
110 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
PIR
Custom
110 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
www.laptoprepairsecrets.com
Page 73
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B B
A A
Version change list
(P.I.R. List)
Page 1 of 1
for PWR
Reason for change PG# Modify List Date PhaseFixed IssueItem
01
Design Update For EA Turning and HW
sequence
93, 94
95, 97
89, 92
change PR1009 from 100K_0402_5% (SD028100380) to 10K_0402_5% (SD028100280)
change PG pull high from +3VS to +3VALW
change PRW1 from 20K_0402_1% (SD034200280) to 1K_0402_1% (SD034100180)
Change the PCW27 from pop to un-pop, and . PCW27.2 net name change from +1.35VSDGPU to Vsense_+1.35VS_VGAP.
unpop PCV135
Change the PUV8, PCV9 from pop to un-pop.
Add location PRV51 0_0402_5% (SD028000080), and pop.
Change the PCW21, PCW22 From 4700P_0402_50V (SE074472K80) to 2200P_0402_50V(SE074222K80).
Delete PL1111 (HCB2012KF-121T50_0805)
04
Design Update 89, 92For CPU transient
11/14
11/19
A
A
Change the PQB2,PQM2 from AON7506 (SB000010A00) to EMB12N03V (SB00001HV00)
update location PRG5 PRA3 to PUG1 PUA1
PLZ1,PLG1,PLZ2,PLZ3,PLZ4 change to common part P/N (SH00001EE00)
pop PQZ2, PQZ4 unpop PQZ1, PQZ3
83, 85
90, 91
solution changeDesign Update
02
A
11/16
Change PRM10, PRM8, PRV82, PRV85, PRV92, PRV95, PRV79, PRV81, PRV84, PRV89, PRV91, PRV94, PRV54, PRV56, PRV70, PRV145,
PRV146, PRZ72, PRZ73, PRZ25, PRZ30, PRZ32, PRZ18, PRZ9, PRZ11, PRZ24, PRZ27,PRV20, PRV34
83, 85
90, 91
A
11/160 ohm to R-shortDesign Update
03
change PRZ12 from 1.78K_0402_1%(SD00000WY80) to 1.62K_0402_1%(SD000003380)
change PRZ14 from 31.6K_0402_1%(SD034316280) to 28K_0402_1%(SD034280280)
change PCZ24 from 470P_0402_50V8J(SE071471J80) to 220P_0402_50V8J(SE082221J80)
change PRZ51 from 84.5K_0603_1%(SD014845280) to 100K_0603_1%(SD014100380)
PRZ61=110k ohm @H82, PRZ61=102k ohm @H62
PRZ35=25.5k ohm @H82, PRZ35=28k ohm @H62
unpop PCZ101, PCZ103, PCG102
pop PCZ176
un pop PCZ120, PCZ104, PCZ105, PCZ118, PCZ111, PCZ108, PCZ126, PCZ124 for H82
un pop PCZ120, PCZ104, CZ105, PCZ118, PCZ111, PCZ108, PCZ126, PCZ124, PCZ123, PCZ127, PCZ107, PCZ113, PCZ116, PCZ114 for H62
A
Change the PL501 1.5uH to common part
Change the PCZ47, PCZ48, PCZ65, PCV36, PCV249 from 33U_25V_NC_6.3X4.5 (SF000007200) to 33U_25V_M (SF000007700)
Chnage the PRZ43 from 12.1K_0402_1% (SD034121280) to 12K_0402_1% (SD034120280)
84 12/3solution changeDesign Update
05
B
unpop PC1811 0.47U_0402_6.3V6K (SE124474K80)
12/1287solution changeDesign Update
06
B12/18pop PCV149~PCV158, PCV162~PCV165, PCV258 (1U_0201_6.3V6M)
reserve PDB2 for dead battery
83, 97solution changeDesign Update
07
Change PR1010, PRW9, PR1801, PR2501 from 0ohm to r-short
12/18 B
08
Design Update solution change
87,
93, 94
B1/15Pop PC205 0.1U_0603_25V7K (SE042104K80) HS
附附附附附附附 附 附 附附附
, E SD
能能能能HS小小小
HS cable
c o u p l i n g
到到小到到
fail
82
For ESD requestDesign Update
09
Design Update For EMI request
93, 96
Pop PCW1, PCV48 2200P_0402_50V7K (SE074222K80) for EMI request
Pop PCW2, PCV47 0.1U_0402_25V6 (SE00000G880) for EMI request
1/15 B10
Design Update Design change
90, 87
11 delete boost circuit and PCZ47 5/7
FH58F EVT
12
Design Update Design change 90, 87 delete PC1112 5/7
FH58F EVT
88, 93
Design changeDesign Update
INV2
6/25
change PCB15 from S CER CAP 1U 6.3V K X5R 0402(SE000000K80) to 1U 16V K X5R 0402(SE00000OU00)
change PCB16 from S CER CAP 1U 6.3V K X5R 0402(SE000000K80) to S CER CAP 2.2U 16V K X5R 0402(SE000013780)
Add PLV2, PLV3 second source S COIL .22UH TMPC1004H-R22MG-R5505-D 50A(SH00001XH00)
13
95
14
Design Update change CH_OC to 75A change PRV71 from S RES 1/16W 133K +-1% 0402(SD034133380) to S RES 1/16W 113K +-1% 0402(SD034113380) 6/25
FH58F PVT
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
PIR
Custom
111 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
PIR
Custom
111 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FXXXX M/B LA-J871P
1.0
PIR
Custom
111 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
www.laptoprepairsecrets.com
Page 74
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1 1
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3 3
4 4
Page 1 of 2 for HWVersion change list (P.I.R. List)
Item Page PhaseSolution DescriptionTitle Date Issue Description Rev.
CNVi-Intel review (FH5VF)1205B
CNVi
1 52
Add RM67 / RM68 0-ohm
Add PU RM70 / PD RM69 (Reserve)
UART_BT
1205B522 UART_BT review RM66 Change to @ for Vender review
3 81-111
PWR SCH
1206A
POWER update
Combined Power SCH (1204)
4 40
HDMI
1206B HDMI EMI sol ution Remove RY52/RY53/CY27 , LS15 change to pop (EMI@) .
5 17/69 JSSD3 1206B JSSD3 SATA/PCIE detect SATAGP change to GP4 & RH303 PU
6 64 EMR 1206B EMR Power source RH285/RH286/RH292 power source change to +3VALW
7 63 Touch Pad 1206B
ESD
Add CK203(100p) for ESD
8 27 VGA 1206C
CLKREQ
RV83 change to pop(VGA@) / CV226 change to unpop (@)
9 19 PROJECT ID 1206C PROJECT ID defined as Project - 50 ( ID1:H / ID0:L )
10 38 Panel OD 1206C Panel OD function RX11 change to unpop & BIOS needs to detect panel to select H or L .
11 16/58
BT_ON
1206C BT_ON change to PCH RH304 pop (PCH) & RB85 unpop (EC)
12 73 IO_B conn. 1209A IO_B conn. IO_B change pin define
13 15/68/69
M.2 SSD
1209B Fi xed naming > SSD1 - GPP_B9/CLKREQ4# (PCIE only) (2018 @SSD2)
> SSD2 - GPP_B8/CLKREQ3# (PCIE/SATA) (2018 @SSD1)
> SSD3 - GPP_B10/CLKREQ5# (PCIE/SATA) (2019 NEW)
RM70 change power source to +3VS_WLAN
CNVi-Intel review (FH5VF)1209B
CNVi
5214
1209C
POWER update
Combined Power SCH (1209)
PWR SCH
81-11115
16 1210A
PWR SCH POWER update
Combined Power SCH (1209B)81-111
17 77 H6 1210B Fo r Layout H6 change to GNDA for Layout .
18 69
SSD3
1210B BOM Config
ADD "SSD3@" for BOM
19 58 Board ID 1210B Board ID config
ADD DVT@ & DVTRGB@ for DVT BOM
20 52
CNVi
1210C CNVi-Intel review (FH51M)
> RM69 change to 71.5k & CNVI@
> RM70 set CNVI@
> RH22 change to 20K
> RM36/RM37/RM67/R M68 change to 22 ohm
21 63
ESD
1211B > Pop CK203 680p & ESD@
> CB12/CB13 change to 33p for ESD & ESD@
PVT Rev 1.0
22 63
SW
0114A
BTN
SW1 set EVT@
23 58 Action plan0114A CB6/CB9 100P 0402 Change to SE00000SE00 (0201)
24 15 0114A Acti on plan CH7/CH8 10P 0402 Change to SE173100J80 (0201)
25 0114A Action plan RO25 Change to 0201 R-short
RH100 Change to 0603 R-short
0114A Action plan
RS112/RS137/RA9/RB87/RX8/RX9 Change to 0402 R-short
26
27 Action plan0114A
28 52
CNVi
CNVi-Intel review (FH5VF)0114A Add CM51/CM52 10U
Add CM53/CM54 0.01U
29 81-111
PWR SCH POWER update
Combined Power SCH (0114B)0114B
30 0115B Action plan
R41 Change to 0603 R-short
R18 Change to 0201 R-short
*remove KBLED@
63
31 81-111
PWR SCH
0116A
POWER update
Combined Power SCH (0116)
32 0211A Update CPU/PCH PN & config6
33 62 0211A RG4/RG11 change to 1k
LED
CPU/PCH
34 58 Board ID 0211A Board ID config
ADD PVT@ & PVTRGB@ for PVT BOM
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PIR-HW1
Custom
112 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PIR-HW1
Custom
112 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
FH51M M/B LA-J871P
1.0
PIR-HW1
Custom
112 112Tuesday, February 11, 2020
2019/09/20 2020/09/20
Compal Electronics, Inc.
www.laptoprepairsecrets.com
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