Acer Nitro 5 AN515-44 Schematic
A
Vinafix.com
Vinafix.com
B
C
D
E
Model Name : Stonic_RNS
Compal Project Name : FH51S
File Name : LA-K181P
1 1
2 2
Compal Confidential
FH51S MB Schematics Document
AMD Renoir Ridge Platform
3 3
LA-K181P REV:1.0
2020-04-08
4 4
Security Classification
Security Classification
A
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Shared with Comp al
Shared with Comp al
B
Shared with Comp al
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
D
Date : Sheet o f
Compal Electronics, Inc.
COVER PAGE
COVER PAGE
COVER PAGE
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
1 116Wednesd ay, April 08, 2020
1 116Wednesd ay, April 08, 2020
1 116Wednesd ay, April 08, 2020
E
A
Vinafix.com
Vinafix.com
Compal Confidential
Model Name : FH51S
B
C
D
E
1 1
Port C
Re-timer
PS8409
HDMI 2.0
2 2
Port8Port9Port10Port11
PCIEx4/SATA SDD
M.2 Conn.
page 68
GPU
N18PG61/G62
GDDR6*4
VBIOS ROM
PCIEx4 SDD
M.2 Conn.
page 68
Re-drive r
PS852 7
GFX PCIE
Port0Port2Port3 Port1
Display Port
Port0Port4
eDP 1.4
Conn.
page 38
Port0Port2Port3 Port1Port4Port5Port6Port7
GPP PCIE
Port1Port2
WLAN
M.2 Conn.
page 52
LAN
Killer E2600
SUB/B
page 52
SATA
FP6 Renoir APU
BGA 1140-Balls
35mmx28mmx1.28mm
page 6-12
I2C
Memory BUS(DDR4)
1.2V DDRIV
3200Mhz
Port0 Port1 Port4 Port5
USB3.2
Gen2 Gen2
Re-drvie r
GL9901 T
CC+MUX
RTS5441E
USB2.0
page 42
Re-drvie r
GL9901 T
USB3-A CHG
Conn.
Port0 Port1 Port2 Port3 Port4 Port5 Port6 Port7
HDAudio (Azalia)
SPI
LPC
SATA HDD
page 68
3 3
RTC
Conn.
page 11
Port3
Touch
Pad
page 63
PS/2
page 71
ENE
KBC9022
page 58
(Channel A)
260pin DDRIV SO-DIMM
USB2
Finger print
page 38
SPI TPM
page 63
USB2
BT
page 52
SPI ROM
page 23
page 10
(Channel B)
260pin DDRIV SO-DIMM
IO Board
USB3-A
Gen1 Ge n1
page 63
UAJ
Conn.
USB3-A
page 56
page 63
USB2-A
Camera
Codec
ALC295
page 56
Speaker
Conn.
page 56
page 38
page 24
USB2
TS
Conn.
DMIC on
Camera
page 38
page 72
Internal
Keyboard
page 63
Fan
Conn.
4 4
page 77
ON/OFF
BTN
page 63
DC/DC
Interface
page 78
Sub Board
LS-J881P (IO Board)
Security Classification
Security Classification
Power Circuits DC/DC
page 81-116
A
LS-J872P (Lid Board)
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATIONIT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATIONIT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFOR MATIONIT CONTAINS
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPALELECTRO NICS, INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPALELECTRO NICS, INC.
B
C
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPALELECTRO NICS, INC.
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2019/08/26 2020/08/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
BLOCK DIAGRAMS
BLOCK DIAGRAMS
BLOCK DIAGRAMS
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
LA-K181P
LA-K181P
LA-K181P
Date: Sheet
Date: Sheet of
Date: Sheet of
E
2 116Wednesd ay, April 08, 2020
2 116Wednesd ay, April 08, 2020
2 116Wednesd ay, April 08, 2020
of
1.0
1.0
1.0
A
Vinafix.com
Vinafix.com
B
C
D
E
Voltage Rails
Power Plane
+19V_VIN
+19VB
+APU_CORE
1 1
2 2
+0.75VALW
+0.75VS
+1.8VALW
+1.8VS
+1.8V
+1.1V
+MEM_VDDQ
+3VALW
+3VS
+5VALW
+5VS
+RTC_APU
+TP_VCC 3.3V Touch Pad power
+TS_PWR
+FP_VCC
Description
Adapter power supply (19V)
AC or battery power r ail for power circuit.
Core voltage for APU
Voltage for On-die VGA of APU
0.75V always on power rail
0.75V switched power rail
1.8V always on power rail
1.8V switched power rail
1.8V power rail for APU and DDR
1.1V power rail for APU and DDR
1.1V/0.6V switched power rail for LPDDR4/4x
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
RTC power
3.3V Touch Screen Power
3.3V Finger Print power
ON
ON
ON+APU_CORE_SOC
ON
ON
ON
ON ON
ON
ON
ON
ON
ON ON
ON
ON
ON ON
OFF
OFF OFF
ONON
OFF OFF
ON
OFF OFF
ONON
OFF OFF
ONON
OFF OFF
AC:ON
ON
DC:OFF
OFF OFF
ON
ON
APU SMBus/I2C Address Table
Master
I2C Port 0
(+1.8VS)
I2C Port 1
(+1.8VS)
I2C Port 2
(+3VS)
SBMus Port 0
(+3VS)
3 3
I2C Port 3
(+3VALW)
SMBus Port 1
(+3VALW)
Device
G-Sensor
(Reserver)
JDIMM1
JDIMM2
PTP
(Synaptics)
PTP
(ELAN)
Address[7: 1]
0001 1000b
18h
0101 0000b
50h
0101 0001b
51h
0010 1100b
2Ch
0001 1111b
15h
Address [7:0]
Write
0011 0000b
30h
1010 0000b
A0h
1010 0010b
A2h
0101 1000b
58h
0011 1110b
3Eh
Read
0011 0001b
31h
1010 0001b
A1h
1010 0011b
A3h
0101 1001b
59h
0011 1111b
3Fh
BOARD ID Table
S5S3S0
ONONON
OFF
OFF
OFF
OFF
OFF
OFF
ONONON
OFF
OFF
OFF
Board ID PCB Revision
BOM Structure Table
Config Config Description
@
45@
CONN@
JP@
RS@
TP@
HDT@
TPM@
CHG@
TMS@/TMSI EC@ Thermal sensor /Thermal sensor for IEC
RD@ SATA Re-driver
HDD@/SSD@ HDD Sku/ SATA SSD Sku
LED14P@ RGB Keyboard
N18P@ Nvidia N18P GPU
N18PG61@/N18PG62@ N18P-G61/N18P-G62 GPU PN
FP@/FPESD @
EMI@/@EM I@
ESD@/@ESD@ ESD Compo nents Install/Uninstall
TB@ Turbo Key
DP@ Mini DP
FH51S@ Project ID
EVT@/ PVT@ EC FW Board ID
0
1
2
3
4
5
6
7
Rev 0.1
Rev 1.0
Rev 0.1 + RGB KB
Rev 1.0 + RGB KB
Components Do Not Install
HDMI Royalty PN
Mechanical Connector
Jump
R-Short
Test Point
AMD HDT Debug Com ponents
TPM Components
USB Charger
Finger Print Components
EMI C omponents Install/Uninstall
Board ID / SKU ID Table for AD channel
POWER SEQUENCE
G-A
G-B
G-C
G-D
+RTCBATT
EC_ON
+5VALW
3V_EN
+3VALW
0.75_1.8VALW_PWREN
+1.8VALW/+0.75VALW
SYSON
+1.2V/+2.5V
SUSP#
+5VS/+3VS/+1.8VS/+MEM_VDDQ
0.75VS_PWR _EN#
+0.75VS
VR_ON
+APU_CO RE
+APU_CORE_SOC
EC SMBus Address Table
SMBus Port 1
(+3VALW)
Charger IC
APU Temp.
Smart Battery
4 4
SMBus Port 2
(+EC_VCC)
Therm Sensor
Temp.
HDMI Retimer
PS8409A
A
0000 1011b
0Bh
0000 1001b
09h
0100 1100b
4Ch
0100 1000b
48h
0001 0110b
16h
0001 0010b
12h
1001 1000b
98h
1001 0000b
90h
0001 0000b-0010 1111b
10h-2Fh
0001 0111b
17h
0001 0011b
13h
1001 1001b
99h
1001 0001b
91h
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2019/08/26 2020/08/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
NOTES LIST
NOTES LIST
NOTES LIST
LA-K181P
LA-K181P
LA-K181P
E
of
3 116Wednesday, April 08, 2 020
3 116Wednesday, April 08, 2 020
3 116Wednesday, April 08, 2 020
1.0
1.0
1.0
5
Vinafix.com
Vinafix.com
51A
PUZ1
PUM1
PUF1
+APU _CORE
15A
+APU _CORE_S OC
+1.2 V
+0.7 5VALW
VR_ON
4.4A
D D
PJP101
AC-IN
PJP201
DC-IN
+19V _VIN
+12. 6V_BATT +
PUB1
16.523A @12.6V
+19V B
1.1A
0.23 9A
JUMP
4
8.74 A
+1.8 VALW
2.1A
PU1801
4A
3.77 A
3
+3VS_APU
+1.8VS
+0.75VS
+1.2V_VDDQ
+APU_VPH
+3VALW_APU
+0.75VALW
+RTC _APU_R
APU Power Rail
VDDCR_VDD @0.65-TBD
VDDCR_SOC @0.72-TBD
VDD_33
VDD_18
VDDP
VDDIO_ME M_S3
VDDIO_VP H
VDD_33_S 5
VDD_18_S 5
VDDIO_AU DIO
VDDP_S 5
VDDBT_RT C_G
TDC : 51A
RC160
3.7A
UV8
7A10.0 4A
RC756
RC755
2A
U22
RC766
JRTC1
RC750
TDC : 15A
0.25 A
2.5A
2A
LC1
0.04 5mA
+APU _CORE
+APU _CORE_S OC
6A
1A
0.25 A
1A
+1.8VALW_APU
0.2A
+VDDIO_AUDIO
2
1
Group C, S0 domain
Group B, S0 domain
Group B, S3 domain
Group A, S5 domain
0.38 A
JUMP
1.74 A
C C
U21
SUSP #
UK6
U13
2.68 A
PU301
+3VALW P +3VALW
PJ502
+3VL P
1.3A
+3V_SS D
+FP_VC C
+TP_VC C
SSD1
SSD2
Frigner Print
Touchpa d
KB9022
B B
PU502
PJ502
+5VAL W+5VAL WP
UV1
+19VB
+3VAL W
+1.8V ALW
+1.8V ALW
+19VB
A A
L11
+INV PWR_B+
5
1.5A
PUV1
PU100 2
UG27
UV45
PUW1
Panel BackLight
4
+NVVD D1
+1.0V SDGPU
+1.8VS DGPU_AON
+1.8VS DGPU_MAI N
+1.35V SDGPU
+1.35V SDGPU
+1.8VS DGPU_AON
3
NVVDD
PEX_DVD D
PEX_HVD D
FBVDDQ
UV4~UV7
VDDQ
VDD
VPP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. T HIS SHEET M AY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. T HIS SHEET M AY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. T HIS SHEET M AY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS
MAYB E USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAYB E USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAYB E USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+1.8 V
+1.2 V
+1.2 V
S0-DIMM x2
VPP
VTT
VDDQ
+3VS
U20
UT4
CHG_ EN
U14
UT5
SUSP #
UT6
+5VAL W
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2019/08/26 2020/08/26
U21 RF1
SUSP #
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+5VS
SATA Redriver
Thermal sensor
+3VS_SSD 2
RS36
RW30
UV21
+3VS_CA M
RV408
+3VS_DVD D
RA7
+3VS_TYP EC
RT500
+3VS_TYP EA
RT220
+USB3_VC CA
+1.2V_HD MI
+5VALW_M UX
+USB3_VC CC
RF2
LA1
U74
U2616
RV406
RS29
Title
Title
Title
Size
Size
Size
Document Num ber Re v
Document Num ber Re v
Document Num ber Re v
Date : Sheet
Date : Sheet of
Date : Sheet of
SSD3
+3V_WLA N
WLAN
Panel Logic
+LCDVD D
Camera
Audio
+3VS
HDMI Retimer
TypeC Re-driver
U3.2 Re-driver
USB3 Tyep-A
HDMI Retimer
USB-C MUX
USB3 TypeC
+5VS_FAN 1
+5VS_FAN 2
+5VS_PVD D
+5VS_AVD DLA10
+5VS_DIS P
+5VS_B L
+TS_PW R
FAN
FAN
Audio
HDMI logic
KB Backlight
Touch screen
+5VS_HD D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
POWER MAP
POWER MAP
POWER MAP
LA-K181P
LA-K181P
LA-K181P
1
HDD
of
4 116Wednesday, April 08, 20 20
4 116Wednesday, April 08, 20 20
4 116Wednesday, April 08, 20 20
1.0
1.0
1.0
5
Vinafix.com
Vinafix.com
Renoir Ridge Platform Power Sequence
4
3
2
1
AC-IN G3 --> S0
+3VL P
ACIN
EC_O N
D D
+5VAL W
ON/OFF BTN#
3V_E N
+3VAL W
0.75_1 .8VALW_PW REN
+1.8VA LW
+0.75V ALW
PBTN_O UT#
EC_RSM RST#
SLP_S 5#
SLP_S 3#
SYSO N
+1.1 V
+1.8 V
+MEM_V DDQ
C C
SUSP #
+5VS
+3VS
+1.8V S
KBRST #
0.75VS _PWR_EN#
+0.75 VS
VR_O N
+APU_C ORE
+APU_C ORE_SOC
VGAT E
SYS_PW RGD_EC
APU_PW ROK
2.423ms, Tr = 640us
250.5ms
91ms
Tr = 1.084ms
91ms
Tr = 1.129ms
Tr = 466.7us
101ms
1.729ms
110ms
160us
160us
105ms
Tr = 280us
Tr = 1.416ms
20.11ms
Tr = 561us
Tr = 593us
Tr = 210us
20.04ms
19.75ms
Tr = 121us Tr = 106.2usTf = 1.836ms Tf = 1.686ms
20.20ms
Tr = 89.7us
Tr = 89.7us
6.121ms
35.42ms
17.99ms
S0 --> S3 S3 --> S0
1.187ms
51.6ms
Tf = 16.15ms
Tf = 29.83ms
Tf = 19.65ms
51.94ms
51.98ms
82.14ms
Tf = 15.49ms
Tf = 3.865ms
24.02ms
3.620ms
18.94ms
Tr = 590us
Tr = 624us
Tr = 235us
Tr = 31.26usTr = 30.4us Tf = 2.91ms Tf = 750us
20.07ms
19.99ms
20.29ms
Tr = 88.14us
Tr = 89.08us
6.099ms
35.49ms
17.79ms
S0 --> S5
8.252s
8.252s
8.252s
1.925ms
1.925ms
66.08ms
Tf = 36.78ms
Tf = 16.34ms
66.04ms
Tf = 15.8ms
Tf = 31.78ms
Tf = 20.94ms
53.88ms
53.92ms
84.04ms
Tf = 9.612ms
Tf = 2.29ms
28.05ms
3.063ms
Tf = 3.903ms
Tf = 5.052ms
Tf = 8.952ms
Tf = 3.453ms
+3VL P
ACIN
EC_O N
+5VAL W
ON/OFF BTN#
3V_E N
+3VAL W
0.75_1 .8VALW_PW REN
+1.8VA LW
+0.75V ALW
PBTN_O UT#
EC_RSM RST#
SLP_S 5#
SLP_S 3#
SYSO N
+1.1 V
+1.8 V
+MEM_V DDQ
SUSP #
+5VS
+3VS
+1.8V S
KBRST #
0.75VS _PWR_EN#
+0.75 VS
VR_O N
+APU_C ORE
+APU_C ORE_NB
VGAT E
SYS_PW RGD_EC
APU_PW ROK
APU_PC IE_RST#
B B
A A
APU_RS T#
5
15.59ms
24.78ms
4
555.6ms
Issued Date
Issued Date
Issued Date
4.859s
Compal Secret Data
Compal Secret Data
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2
Deciphered Date
Deciphered Date
Deciphered Date
15.53ms
24.52ms
Security Classification Compal Secret Data
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENTEXCEPT AS AUTHORIZEDBY COMPAL ELECTRONICS, INC. NEITHER THIS SHEETNOR THE INFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZEDBY COMPAL ELECTRONICS, INC. NEITHER THIS SHEETNOR THE INFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZEDBY COMPAL ELECTRONICS, INC. NEITHER THIS SHEETNOR THE INFORMATION IT CONTAINS
MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENTOF COMPAL ELECTRONICS,I NC.
MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENTOF COMPAL ELECTRONICS,I NC.
3
MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENTOF COMPAL ELECTRONICS,I NC.
APU_PC IE_RST#
APU_RS T#
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
POWER SEQUENCE
POWER SEQUENCE
POWER SEQUENCE
Size
Size
Size
Document Number Re v
Document Number R ev
Document Number R ev
LA-K181P
LA-K181P
LA-K181P
Date: Sheet
Date: Sheet of
Date: Sheet of
1
5 116Wednesday, April 08, 2020
5 116Wednesday, April 08, 2020
5 116Wednesday, April 08, 2020
of
1.0
1.0
1.0
5
Vinafix.com
Vinafix.com
Main Func = CPU
4
3
2
1
Cap move to APU page, rename Caps
D D
PEG_ARX _C_GTX_P0<27>
PEG_ARX _C_GTX_N0<27>
PEG_ARX _C_GTX_P1<27>
PEG_ARX _C_GTX_N1<27>
PEG_ARX _C_GTX_P2<27>
PEG_ARX _C_GTX_N2<27>
PEG_ARX _C_GTX_P3<27>
PEG_ARX _C_GTX_N3<27>
PEG_ARX _C_GTX_P4<27>
PEG_ARX _C_GTX_N4<27>
PEG_ARX _C_GTX_P5<27>
PEG_ARX _C_GTX_N5<27>
PEG_ARX _C_GTX_P6<27>
PEG_ARX _C_GTX_N6<27>
PEG_ARX _C_GTX_P7<27>
PEG_ARX _C_GTX_N7<27>
CV2731 0.22U_02 01_6.3VDIS@
CV2732 0.22U_02 01_6.3VDIS@
CV2733 0.22U_02 01_6.3VDIS@
CV2734 0.22U_02 01_6.3VDIS@
CV2735 0.22U_02 01_6.3VDIS@
CV2736 0.22U_02 01_6.3VDIS@
CV2737 0.22U_02 01_6.3VDIS@
CV2738 0.22U_02 01_6.3VDIS@
CV2739 0.22U_02 01_6.3VDIS@
CV35 0.22U_ 0201_6.3VDIS@
CV2740 0.22U_02 01_6.3VDIS@
CV2741 0.22U_02 01_6.3VDIS@
CV2742 0.22U_02 01_6.3VDIS@
CV2743 0.22U_02 01_6.3VDIS@
CV2744 0.22U_02 01_6.3VDIS@
CV2745 0.22U_02 01_6.3VDIS@
LAN
C C
HDD
B B
WLAN
SSD
PCIE x4
SSD
PCIE /SATA
PCIE_SATA _ARX_DTX_P3<68>
PCIE_SATA _ARX_DTX_N3<68> PCIE_SATA _ATX_DRX_N3 <68>
SATA Port2
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
PCIE_ARX_ DTX_P0<72>
PCIE_ARX_ DTX_N0<72>
PCIE_ARX_ DTX_P1<52>
PCIE_ARX_ DTX_N1<52>
FH51S
PCIE_ARX_ DTX_P4<69>
PCIE_ARX_ DTX_N4<69>
PCIE_ARX_ DTX_P5<69>
PCIE_ARX_ DTX_N5<69>
PCIE_ARX_ DTX_P6<69>
PCIE_ARX_ DTX_N6<69>
PCIE_ARX_ DTX_P7<69>
PCIE_ARX_ DTX_N7<69>
PCIE_ARX_ DTX_P8<69>
PCIE_ARX_ DTX_N8<69>
PCIE_ARX_ DTX_P9<69>
PCIE_ARX_ DTX_N9<69>
PCIE_ARX_ DTX_P10<69>
PCIE_ARX_ DTX_N10<69>
PCIE_ARX_ DTX_P11<69>
PCIE_ARX_ DTX_N11<69>
PEG_ARX _GTX_P0
PEG_ARX _GTX_N0
PEG_ARX _GTX_P1
PEG_ARX _GTX_N1
PEG_ARX _GTX_P2
PEG_ARX _GTX_N2
PEG_ARX _GTX_P3
PEG_ARX _GTX_N3
PEG_ARX _GTX_P4
PEG_ARX _GTX_N4
PEG_ARX _GTX_P5
PEG_ARX _GTX_N5
PEG_ARX _GTX_P6
PEG_ARX _GTX_N6
PEG_ARX _GTX_P7
PEG_ARX _GTX_N7
PCIE_ARX_ DTX_P0
PCIE_ARX_ DTX_N0
PCIE_ARX_ DTX_P1
PCIE_ARX_ DTX_N1
PCIE_SATA _ARX_DTX_P3
PCIE_SATA _ARX_DTX_N3
PCIE_ARX_ DTX_P4
PCIE_ARX_ DTX_N4
PCIE_ARX_ DTX_P5
PCIE_ARX_ DTX_N5
PCIE_ARX_ DTX_P6
PCIE_ARX_ DTX_N6
PCIE_ARX_ DTX_P7
PCIE_ARX_ DTX_N7
PCIE_ARX_ DTX_P8
PCIE_ARX_ DTX_N8
PCIE_ARX_ DTX_P9
PCIE_ARX_ DTX_N9
PCIE_ARX_ DTX_P10
PCIE_ARX_ DTX_N10
PCIE_ARX_ DTX_P11
PCIE_ARX_ DTX_N11
UC1B
G13
P_GFX_RXP0
F13
P_GFX_RXN0
J14
P_GFX_RXP1
H14
P_GFX_RXN1
G15
P_GFX_RXP2
F15
P_GFX_RXN2
J15
P_GFX_RXP3
K15
P_GFX_RXN3
H16
P_GFX_RXP4
J16
P_GFX_RXN4
F18
P_GFX_RXP5
G18
P_GFX_RXN5
J18
P_GFX_RXP6
K18
P_GFX_RXN6
H19
P_GFX_RXP7
G19
P_GFX_RXN7
G11
P_GPP_RXP0
F11
P_GPP_RXN0
J10
P_GPP_RXP1
H10
P_GPP_RXN1
G8
P_GPP_RXP2/SATA0_RXP
F8
P_GPP_RXN2/SATA0_RXN
G6
P_GPP_RXP3/SATA1_RXP
F7
P_GPP_RXN3/SATA1_RXN
M9
P_GPP_RXP4
M8
P_GPP_RXN4
L7
P_GPP_RXP5
L6
P_GPP_RXN5
K7
P_GPP_RXP6
K8
P_GPP_RXN6
H6
P_GPP_RXP7
H7
P_GPP_RXN7
L9
P_GPP_RXP8/SATA2_RXP
L10
P_GPP_RXN8/SATA2_RXN
K11
P_GPP_RXP9/SATA3_RXP
J11
P_GPP_RXN9/SATA3_RXN
J12
P_GPP_RXP10
H12
P_GPP_RXN10
J13
P_GPP_RXP11
K13
P_GPP_RXN11
FP6_BGA1140
@
PCIE
dGPU
LAN
WLAN
x4 PCIE Express
M.2 SSD
FP6 REV 0.92
PART 2 OF 13
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2/SATA0_TXP
P_GPP_TXN2/SATA0_TXN
P_GPP_TXP3/SATA1_TXP
P_GPP_TXN3/SATA1_TXN
P_GPP_TXP4
P_GPP_TXN4
P_GPP_TXP5
P_GPP_TXN5
P_GPP_TXP6
P_GPP_TXN6
P_GPP_TXP7
P_GPP_TXN7
P_GPP_TXP8/SATA2_TXP
P_GPP_TXN8/SATA2_TXN
P_GPP_TXP9/SATA3_TXP
P_GPP_TXN9/SATA3_TXN
P_GPP_TXP10
P_GPP_TXN10
P_GPP_TXP11
P_GPP_TXN11
F4
F2
F3
E4
E1
C1
D5
E6
C6
D6
B6
C7
D8
B8
C8
A8
L3
L1
L4
L2
M4
M2
N3
N1
T2
T4
R1
R3
P2
P4
N2
N4
K2
K4
J4
J2
H3
H1
H4
H2
PEG_ATX _GRX_P0
PEG_ATX _GRX_N0
PEG_ATX _GRX_P1
PEG_ATX _GRX_N1
PEG_ATX _GRX_P2
PEG_ATX _GRX_N2
PEG_ATX _GRX_P3
PEG_ATX _GRX_N3
PEG_ATX _GRX_P4
PEG_ATX _GRX_N4
PEG_ATX _GRX_P5
PEG_ATX _GRX_N5
PEG_ATX _GRX_P6
PEG_ATX _GRX_N6
PEG_ATX _GRX_P7
PEG_ATX _GRX_N7
PCIE_ATX_ DRX_P0
PCIE_ATX_ DRX_N0
PCIE_ATX_ DRX_P1
PCIE_ATX_ DRX_N1
PCIE_SATA _ATX_DRX_P3
PCIE_SATA _ATX_DRX_N3
PCIE_ATX_ DRX_P4
PCIE_ATX_ DRX_N4
PCIE_ATX_ DRX_P5
PCIE_ATX_ DRX_N5
PCIE_ATX_ DRX_P6
PCIE_ATX_ DRX_N6
PCIE_ATX_ DRX_P7
PCIE_ATX_ DRX_N7
PCIE_ATX_ DRX_P8
PCIE_ATX_ DRX_N8
PCIE_ATX_ DRX_P9
PCIE_ATX_ DRX_N9
PCIE_ATX_ DRX_P10
PCIE_ATX_ DRX_N10
PCIE_ATX_ DRX_P11
PCIE_ATX_ DRX_N11
Cap move to APU page, rename Caps
CV2746 0.22U_02 01_6.3V DIS@
CV2747 0.22U_02 01_6.3V DIS@
CV2748 0.22U_02 01_6.3V DIS@
CV2749 0.22U_02 01_6.3V DIS@
CV2750 0.22U_02 01_6.3V DIS@
CV2751 0.22U_02 01_6.3V DIS@
CV2752 0.22U_02 01_6.3V DIS@
CV2753 0.22U_02 01_6.3V DIS@
CV2754 0.22U_02 01_6.3V DIS@
CV2755 0.22U_02 01_6.3V DIS@
CV2756 0.22U_02 01_6.3V DIS@
CV2757 0.22U_02 01_6.3V DIS@
CV2758 0.22U_02 01_6.3V DIS@
CV2759 0.22U_02 01_6.3V DIS@
CV2760 0.22U_02 01_6.3V DIS@
CV2761 0.22U_02 01_6.3V DIS@
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
1 2
RC785 0_0402_5%
1 2
RC786 0_0402_5%
1 2
CC17 .1U_0402_16V 7K
1 2
CC18 .1U_0402_16V 7K
FH51S
PCIE_SATA _ATX_DRX_P3 < 68>
1 2
CC23 0.22U_04 02_16V7K
1 2
CC24 0.22U_04 02_16V7K
1 2
CC25 0.22U_04 02_16V7K
1 2
CC26 0.22U_04 02_16V7K
1 2
CC27 0.22U_04 02_16V7K
1 2
CC28 0.22U_04 02_16V7K
1 2
CC29 0.22U_04 02_16V7K
1 2
CC30 0.22U_04 02_16V7K
1 2
CC19 0.22U_0402_1 6V7K
1 2
CC20 0.22U_0402_1 6V7K
1 2
CC21 0.22U_0402_1 6V7K
1 2
CC22 0.22U_0402_1 6V7K
1 2
CC10 0.22U_0402_1 6V7K
1 2
CC11 0.22U_0402_1 6V7K
1 2
CC12 0.22U_0402_1 6V7K
1 2
CC13 0.22U_0402_1 6V7K
PEG_ATX _C_GRX_P0
PEG_ATX _C_GRX_N0
PEG_ATX _C_GRX_P1
PEG_ATX _C_GRX_N1
PEG_ATX _C_GRX_P2
PEG_ATX _C_GRX_N2
PEG_ATX _C_GRX_P3
PEG_ATX _C_GRX_N3
PEG_ATX _C_GRX_P4
PEG_ATX _C_GRX_N4
PEG_ATX _C_GRX_P5
PEG_ATX _C_GRX_N5
PEG_ATX _C_GRX_P6
PEG_ATX _C_GRX_N6
PEG_ATX _C_GRX_P7
PEG_ATX _C_GRX_N7
PCIE_ATX_ C_DRX_P0 <72>
PCIE_ATX_ C_DRX_N0 <72>
PCIE_ATX_ C_DRX_P1 <52>
PCIE_ATX_ C_DRX_N1 <52>
PCIE_ATX_ C_DRX_P4 <69>
PCIE_ATX_ C_DRX_N4 <69>
PCIE_ATX_ C_DRX_P5 <69>
PCIE_ATX_ C_DRX_N5 <69>
PCIE_ATX_ C_DRX_P6 <69>
PCIE_ATX_ C_DRX_N6 <69>
PCIE_ATX_ C_DRX_P7 <69>
PCIE_ATX_ C_DRX_N7 <69>
PCIE_ATX_ C_DRX_P8 <69>
PCIE_ATX_ C_DRX_N8 <69>
PCIE_ATX_ C_DRX_P9 <69>
PCIE_ATX_ C_DRX_N9 <69>
PCIE_ATX_ C_DRX_P10 <69>
PCIE_ATX_ C_DRX_N10 <69>
PCIE_ATX_ C_DRX_P11 <69>
PCIE_ATX_ C_DRX_N11 <69>
PEG_ATX _C_GRX_P0 <27>
PEG_ATX _C_GRX_N0 <27>
PEG_ATX _C_GRX_P1 <27>
PEG_ATX _C_GRX_N1 <27>
PEG_ATX _C_GRX_P2 <27>
PEG_ATX _C_GRX_N2 <27>
PEG_ATX _C_GRX_P3 <27>
PEG_ATX _C_GRX_N3 <27>
PEG_ATX _C_GRX_P4 <27>
PEG_ATX _C_GRX_N4 <27>
PEG_ATX _C_GRX_P5 <27>
PEG_ATX _C_GRX_N5 <27>
PEG_ATX _C_GRX_P6 <27>
PEG_ATX _C_GRX_N6 <27>
PEG_ATX _C_GRX_P7 <27>
PEG_ATX _C_GRX_N7 <27>
LAN
WLAN
HDD
SSD
PCIE x4
SSD
PCIE /SATA
GPUGPU
APU PN Table
UC1
RYZEN5 3G QS
R5PC@
SA0000DA R00
A A
UC1
RYZEN5 3G QS
R5PR@
SA0000DA R10
RYZEN5 100 -000000100
5
UC1
RYZEN7 2.75G QS
R7PC@
SA0000DA Q00
UC1
RYZEN7 2.75G QS
R7PR@
SA0000DA Q10
RYZEN7 100 -000000098
Security Classification
Security Classification
Security Classification
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
FP6_(1/7)_PEG/PCIE/SATA
FP6_(1/7)_PEG/PCIE/SATA
FP6_(1/7)_PEG/PCIE/SATA
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet o f
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
6 116Wednesd ay, April 08, 2020
6 116Wednesd ay, April 08, 2020
6 116Wednesd ay, April 08, 2020
1
5
Vinafix.com
Vinafix.com
4
3
2
1
Main Func = CPU
8/29
UC1A
@
DDR_A_MA[13..0]<23>
D D
DDR_A_MA14_W E#<23>
DDR_A_MA15_CAS#<23>
DDR_A_MA16_RAS#<23>
DDR_A_BA0<23>
DDR_A_BA1<23>
DDR_A_BG0<23>
DDR_A_BG1<23>
DDR_A_ACT#<23>
DDR_A_DM[7..0]<23>
C C
B B
DDR_A_DQS0<23>
DDR_A_DQS0#<23>
DDR_A_DQS1<23>
DDR_A_DQS1#<23>
DDR_A_DQS2<23>
DDR_A_DQS2#<23>
DDR_A_DQS3<23>
DDR_A_DQS3#<23>
DDR_A_DQS4<23>
DDR_A_DQS4#<23>
DDR_A_DQS5<23>
DDR_A_DQS5#<23>
DDR_A_DQS6<23>
DDR_A_DQS6#<23>
DDR_A_DQS7<23>
DDR_A_DQS7#<23>
DDR_A_CLK0<23>
DDR_A_CLK0#<23>
DDR_A_CLK1<23>
DDR_A_CLK1#<23>
DDR_A_CS0#<23>
DDR_A_CS1#<23>
DDR_A_CKE0<23>
DDR_A_CKE1<23>
DDR_A_ODT0<23>
DDR_A_ODT1<23>
DDR_A_ALERT#<23>
DDR_A_EVENT#<23>
DDR_A_RST#<23>
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14_W E#
DDR_A_MA15_CAS#
DDR_A_MA16_RAS#
DDR_A_BA0
DDR_A_BA1
DDR_A_BG0
DDR_A_BG1
DDR_A_ACT#
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
DDR_A_DQS0
DDR_A_DQS0#
DDR_A_DQS1
DDR_A_DQS1#
DDR_A_DQS2
DDR_A_DQS2#
DDR_A_DQS3
DDR_A_DQS3#
DDR_A_DQS4
DDR_A_DQS4#
DDR_A_DQS5
DDR_A_DQS5#
DDR_A_DQS6
DDR_A_DQS6#
DDR_A_DQS7
DDR_A_DQS7#
DDR_A_CLK0
DDR_A_CLK0#
DDR_A_CLK1
DDR_A_CLK1#
DDR_A_CS0#
DDR_A_CS1#
DDR_A_CKE0
DDR_A_CKE1
DDR_A_ODT0
DDR_A_ODT1
DDR_A_ALERT#
DDR_A_EVENT#
DDR_A_RST#
AK26
AG24
AG23
AG26
AG27
AF21
AF22
AF25
AF24
AE21
AL21
AF27
AE23
AM23
AM21
AL27
AL24
AL22
AK27
AE27
AE26
AD22
AP27
AW23
AT21
AV18
AA21
AP23
AP24
AW22
AV22
AT20
AR20
AR18
AT18
AJ25
AJ24
AJ22
AJ21
AL25
AM26
AD24
AD25
AM24
AM27
AE24
AK23
AD27
N23
R27
Y24
W24
M25
M24
P22
P21
R24
Y21
Y26
Y27
L27
T24
MA_ADD0/RSVD
MA_ADD1/RSVD
MA_ADD2/MAB_CA0
MA_ADD3/MAA_CA4
MA_ADD4/MAA_CA5
MA_ADD5/MAA_CA3
MA_ADD6/MAA_CA2
MA_ADD7/RSVD
MA_ADD8/RSVD
MA_ADD9/RSVD
MA_ADD10/MAB_CS_L1
MA_ADD11/MAA_CKE1
MA_ADD12/MAA_CKE0
MA_ADD13_BANK2/RSVD
MA_WE_L_ADD14/MAB_CKE1
MA_CAS_L_ADD15/RSVD
MA_RAS_L_ADD16/MAB_CKE0
MA_BANK0/MAB_CS_L0
MA_BANK1/MAB_CA1
MA_BG0/MAA_CS_L1
MA_BG1/MAA_CS_L0
MA_ACT_L/RSVD
MA_DM0/MAA_DM1
MA_DM1/MAA_DM0
MA_DM2/MAA_DM2
MA_DM3/MAA_DM3
MA_DM4/MAB_DM2
MA_DM5/MAB_DM3
MA_DM6/MAB_DM1
MA_DM7/MAB_DM0
RSVD_52
MA_DQS_H0/MAA_DQS_H1
MA_DQS_L0/MAA_DQS_L1
MA_DQS_H1/MAA_DQS_H0
MA_DQS_L1/MAA_DQS_L0
MA_DQS_H2/MAA_DQS_H2
MA_DQS_L2/MAA_DQS_L2
MA_DQS_H3/MAA_DQS_H3
MA_DQS_L3/MAA_DQS_L3
MA_DQS_H4/MAB_DQS_H2
MA_DQS_L4/MAB_DQS_L2
MA_DQS_H5/MAB_DQS_H3
MA_DQS_L5/MAB_DQS_L3
MA_DQS_H6/MAB_DQS_H1
MA_DQS_L6/MAB_DQS_L1
MA_DQS_H7/MAB_DQS_H0
MA_DQS_L7/MAB_DQS_L0
RSVD_58
RSVD_59
MA_CLK_H0/MAA_CKT
MA_CLK_L0/MAA_CKC
MA_CLK_H1/MAB_CKT
MA_CLK_L1/MAB_CKC
MA_CS_L0/MAB_CA2
MA_CS_L1/MAB_CA5
MA_CKE0/MAA_CA1
MA_CKE1/MAA_CA0
MA_ODT0/MAB_CA3
MA_ODT1/MAB_CA4
MA_ALERT_L/TEST31A
MA_EVENT_L
MA_RESET_L
FP6_BGA1140
EVENT# pull high
MEMORY A
FP6 REV 0.92
PART 1 OF 13
MA_DATA0/MAA_DATA8
MA_DATA1/MAA_DATA9
MA_DATA2/MAA_DATA13
MA_DATA3/MAA_DATA12
MA_DATA4/MAA_DATA11
MA_DATA5/MAA_DATA10
MA_DATA6/MAA_DATA15
MA_DATA7/MAA_DATA14
MA_DATA8/MAA_DATA0
MA_DATA9/MAA_DATA1
MA_DATA10/MAA_DATA5
MA_DATA11/MAA_DATA4
MA_DATA12/MAA_DATA7
MA_DATA13/MAA_DATA6
MA_DATA14/MAA_DATA2
MA_DATA15/MAA_DATA3
MA_DATA16/MAA_DATA17
MA_DATA17/MAA_DATA16
MA_DATA18/MAA_DATA21
MA_DATA19/MAA_DATA20
MA_DATA20/MAA_DATA19
MA_DATA21/MAA_DATA18
MA_DATA22/MAA_DATA23
MA_DATA23/MAA_DATA22
MA_DATA24/MAA_DATA30
MA_DATA25/MAA_DATA31
MA_DATA26/MAA_DATA26
MA_DATA27/MAA_DATA27
MA_DATA28/MAA_DATA28
MA_DATA29/MAA_DATA29
MA_DATA30/MAA_DATA24
MA_DATA31/MAA_DATA25
MA_DATA32/MAB_DATA17
MA_DATA33/MAB_DATA16
MA_DATA34/MAB_DATA21
MA_DATA35/MAB_DATA20
MA_DATA36/MAB_DATA19
MA_DATA37/MAB_DATA18
MA_DATA38/MAB_DATA23
MA_DATA39/MAB_DATA22
MA_DATA40/MAB_DATA30
MA_DATA41/MAB_DATA31
MA_DATA42/MAB_DATA26
MA_DATA43/MAB_DATA27
MA_DATA44/MAB_DATA28
MA_DATA45/MAB_DATA29
MA_DATA46/MAB_DATA24
MA_DATA47/MAB_DATA25
MA_DATA48/MAB_DATA11
MA_DATA49/MAB_DATA10
MA_DATA50/MAB_DATA14
MA_DATA51/MAB_DATA15
MA_DATA52/MAB_DATA12
MA_DATA53/MAB_DATA13
MA_DATA54/MAB_DATA9
MA_DATA55/MAB_DATA8
MA_DATA56/MAB_DATA6
MA_DATA57/MAB_DATA7
MA_DATA58/MAB_DATA2
MA_DATA59/MAB_DATA3
MA_DATA60/MAB_DATA4
MA_DATA61/MAB_DATA5
MA_DATA62/MAB_DATA1
MA_DATA63/MAB_DATA0
RSVD_54
RSVD_53
RSVD_68
RSVD_69
RSVD_49
RSVD_48
RSVD_63
RSVD_62
MA_PAROUT/RSVD
M_DDR4
M_LPDDR4
K27
L26
N26
N27
G27
H27
M27
N24
L23
N21
T21
T22
M22
L24
R21
R23
P24
R26
T27
V27
P25
P27
V23
T25
W22
Y23
AC24
AC23
V21
W21
AA24
AA22
AP26
AN24
AR25
AU26
AN25
AN27
AR27
AU27
AV25
AW25
AV20
AW20
AV27
AW26
AU21
AW21
AT22
AP21
AN19
AN18
AU23
AR22
AN20
AP19
AT19
AW18
AU16
AW16
AW19
AU19
AP16
AT16
W27
W25
AC26
AC27
V26
V24
AA27
AA25
AK24
AN21
AN22
DDR_A_DQ0
DDR_A_DQ1
DDR_A_DQ2
DDR_A_DQ3
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
DDR_A_DQ7
DDR_A_DQ8
DDR_A_DQ9
DDR_A_DQ10
DDR_A_DQ11
DDR_A_DQ12
DDR_A_DQ13
DDR_A_DQ14
DDR_A_DQ15
DDR_A_DQ16
DDR_A_DQ17
DDR_A_DQ18
DDR_A_DQ19
DDR_A_DQ20
DDR_A_DQ21
DDR_A_DQ22
DDR_A_DQ23
DDR_A_DQ24
DDR_A_DQ25
DDR_A_DQ26
DDR_A_DQ27
DDR_A_DQ28
DDR_A_DQ29
DDR_A_DQ30
DDR_A_DQ31
DDR_A_DQ32
DDR_A_DQ33
DDR_A_DQ34
DDR_A_DQ35
DDR_A_DQ36
DDR_A_DQ37
DDR_A_DQ38
DDR_A_DQ39
DDR_A_DQ40
DDR_A_DQ41
DDR_A_DQ42
DDR_A_DQ43
DDR_A_DQ44
DDR_A_DQ45
DDR_A_DQ46
DDR_A_DQ47
DDR_A_DQ48
DDR_A_DQ49
DDR_A_DQ50
DDR_A_DQ51
DDR_A_DQ52
DDR_A_DQ53
DDR_A_DQ54
DDR_A_DQ55
DDR_A_DQ56
DDR_A_DQ57
DDR_A_DQ58
DDR_A_DQ59
DDR_A_DQ60
DDR_A_DQ61
DDR_A_DQ62
DDR_A_DQ63
DDR_A_PAR
M_DDR4
M_LPDDR4
RS@
1 2
RS@
12
RC251
0_0402_5%
DDR_A_DQ[63..0] <23>
DDR_A_PAR <23>
RC250
0_0402_5%
+1.2V_VDDQ
DDR_B_MA[13..0]<24>
DDR_B_MA14_W E#<24>
DDR_B_MA15_CAS#<24>
DDR_B_MA16_RAS#<24>
DDR_B_BA0<24>
DDR_B_BA1<24>
DDR_B_BG0<24>
DDR_B_BG1<24>
DDR_B_ACT#<24>
DDR_B_DM[7..0]<24>
DDR_B_DQS0<24>
DDR_B_DQS0#<24>
DDR_B_DQS1<24>
DDR_B_DQS1#<24>
DDR_B_DQS2<24>
DDR_B_DQS2#<24>
DDR_B_DQS3<24>
DDR_B_DQS3#<24>
DDR_B_DQS4<24>
DDR_B_DQS4#<24>
DDR_B_DQS5<24>
DDR_B_DQS5#<24>
DDR_B_DQS6<24>
DDR_B_DQS6#<24>
DDR_B_DQS7<24>
DDR_B_DQS7#<24>
DDR_B_CLK0<24>
DDR_B_CLK0#<24>
DDR_B_CLK1<24>
DDR_B_CLK1#<24>
DDR_B_CS0#<24>
DDR_B_CS1#<24>
DDR_B_CKE0<24>
DDR_B_CKE1<24>
DDR_B_ODT0<24>
DDR_B_ODT1<24>
DDR_B_ALERT#<24>
DDR_B_EVENT#<24>
DDR_B_RST#<24>
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14_W E#
DDR_B_MA15_CAS#
DDR_B_MA16_RAS#
DDR_B_BA0
DDR_B_BA1
DDR_B_BG0
DDR_B_BG1
DDR_B_ACT#
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
DDR_B_DQS0
DDR_B_DQS0#
DDR_B_DQS1
DDR_B_DQS1#
DDR_B_DQS2
DDR_B_DQS2#
DDR_B_DQS3
DDR_B_DQS3#
DDR_B_DQS4
DDR_B_DQS4#
DDR_B_DQS5
DDR_B_DQS5#
DDR_B_DQS6
DDR_B_DQS6#
DDR_B_DQS7
DDR_B_DQS7#
DDR_B_CLK0
DDR_B_CLK0#
DDR_B_CLK1
DDR_B_CLK1#
DDR_B_CS0#
DDR_B_CS1#
DDR_B_CKE0
DDR_B_CKE1
DDR_B_ODT0
DDR_B_ODT1
DDR_B_ALERT#
DDR_B_EVENT#
DDR_B_RST#
+1.2V_VDDQ
AM29
AH31
AJ30
AH29
AG32
AG30
AG31
AF30
AG29
AF29
AM30
AF31
AE32
AP30
AP31
AP29
AN29
AN31
AM32
AD29
AD31
AD30
C30
H32
M29
AU30
BD28
BB23
BD20
W31
D28
N30
M31
AU29
AU31
BA27
BB27
BC23
BA23
BC20
BA20
AJ31
AK30
AK32
AL31
AN30
AR31
AC31
AC29
AP32
AR29
AE30
AL30
AC32
T29
E29
J31
J29
T30
T31
Y32
Y30
UC1I
@
MB_ADD0/RSVD
MB_ADD1/RSVD
MB_ADD2/MBB_CA0
MB_ADD3/MBA_CA4
MB_ADD4/MBA_CA5
MB_ADD5/MBA_CA3
MB_ADD6/MBA_CA2
MB_ADD7/RSVD
MB_ADD8/RSVD
MB_ADD9/RSVD
MB_ADD10/MBB_CS_L1
MB_ADD11/MBA_CKE1
MB_ADD12/MBA_CKE0
MB_ADD13_BANK2/RSVD
MB_WE_L_ADD14/MBB_CKE1
MB_CAS_L_ADD15/RSVD
MB_RAS_L_ADD16/MBB_CKE0
MB_BANK0/MBB_CS_L0
MB_BANK1/MBB_CA1
MB_BG0/MBA_CS_L1
MB_BG1/MBA_CS_L0
MB_ACT_L/RSVD
MB_DM0/MBA_DM1
MB_DM1/MBA_DM0
MB_DM2/MBA_DM2
MB_DM3/MBA_DM3
MB_DM4/MBB_DM2
MB_DM5/MBB_DM3
MB_DM6/MBB_DM1
MB_DM7/MBB_DM0
RSVD_57
MB_DQS_H0/MBA_DQS_H1
MB_DQS_L0/MBA_DQS_L1
MB_DQS_H1/MBA_DQS_H0
MB_DQS_L1/MBA_DQS_L0
MB_DQS_H2/MBA_DQS_H2
MB_DQS_L2/MBA_DQS_L2
MB_DQS_H3/MBA_DQS_H3
MB_DQS_L3/MBA_DQS_L3
MB_DQS_H4/MBB_DQS_H2
MB_DQS_L4/MBB_DQS_L2
MB_DQS_H5/MBB_DQS_H3
MB_DQS_L5/MBB_DQS_L3
MB_DQS_H6/MBB_DQS_H1
MB_DQS_L6/MBB_DQS_L1
MB_DQS_H7/MBB_DQS_H0
MB_DQS_L7/MBB_DQS_L0
RSVD_61
RSVD_60
MB_CLK_H0/MBA_CKT
MB_CLK_L0/MBA_CKC
MB_CLK_H1/MBB_CKT
MB_CLK_L1/MBB_CKC
MB_CS_L0/MBB_CA2
MB_CS_L1/MBB_CA5
MB_CKE0/MBA_CA1
MB_CKE1/MBA_CA0
MB_ODT0/MBB_CA3
MB_ODT1/MBB_CA4
MB_ALERT_L/TEST31B
MB_EVENT_L
MB_RESET_L
FP6_BGA1140
MEMORY B
FP6 REV 0.92
PART 9 OF 13
MB_DATA0/MBA_DATA8
MB_DATA1/MBA_DATA9
MB_DATA2/MBA_DATA13
MB_DATA3/MBA_DATA12
MB_DATA4/MBA_DATA11
MB_DATA5/MBA_DATA10
MB_DATA6/MBA_DATA15
MB_DATA7/MBA_DATA14
MB_DATA8/MBA_DATA0
MB_DATA9/MBA_DATA1
MB_DATA10/MBA_DATA5
MB_DATA11/MBA_DATA4
MB_DATA12/MBA_DATA7
MB_DATA13/MBA_DATA6
MB_DATA14/MBA_DATA2
MB_DATA15/MBA_DATA3
MB_DATA16/MBA_DATA21
MB_DATA17/MBA_DATA22
MB_DATA18/MBA_DATA20
MB_DATA19/MBA_DATA19
MB_DATA20/MBA_DATA17
MB_DATA21/MBA_DATA16
MB_DATA22/MBA_DATA18
MB_DATA23/MBA_DATA23
MB_DATA24/MBA_DATA30
MB_DATA25/MBA_DATA31
MB_DATA26/MBA_DATA26
MB_DATA27/MBA_DATA27
MB_DATA28/MBA_DATA28
MB_DATA29/MBA_DATA29
MB_DATA30/MBA_DATA25
MB_DATA31/MBA_DATA24
MB_DATA32/MBB_DATA16
MB_DATA33/MBB_DATA17
MB_DATA34/MBB_DATA21
MB_DATA35/MBB_DATA20
MB_DATA36/MBB_DATA19
MB_DATA37/MBB_DATA18
MB_DATA38/MBB_DATA23
MB_DATA39/MBB_DATA22
MB_DATA40/MBB_DATA29
MB_DATA41/MBB_DATA28
MB_DATA42/MBB_DATA24
MB_DATA43/MBB_DATA25
MB_DATA44/MBB_DATA27
MB_DATA45/MBB_DATA26
MB_DATA46/MBB_DATA30
MB_DATA47/MBB_DATA31
MB_DATA48/MBB_DATA11
MB_DATA49/MBB_DATA10
MB_DATA50/MBB_DATA14
MB_DATA51/MBB_DATA15
MB_DATA52/MBB_DATA12
MB_DATA53/MBB_DATA13
MB_DATA54/MBB_DATA9
MB_DATA55/MBB_DATA8
MB_DATA56/MBB_DATA4
MB_DATA57/MBB_DATA5
MB_DATA58/MBB_DATA2
MB_DATA59/MBB_DATA3
MB_DATA60/MBB_DATA6
MB_DATA61/MBB_DATA7
MB_DATA62/MBB_DATA1
MB_DATA63/MBB_DATA0
RSVD_56
RSVD_55
RSVD_65
RSVD_67
RSVD_50
RSVD_51
RSVD_64
RSVD_66
MB_PAROUT/RSVD
C27
A28
F29
F31
B27
D27
E32
F30
H31
H30
K31
L30
G30
H29
K30
K29
N32
N29
P30
L32
L31
M30
L29
N31
R30
R32
V30
V32
P29
P31
U31
U29
AT29
AU32
AW31
AW30
AR30
AT31
AV30
AW29
AY29
AY32
BC27
BB26
BC25
BA25
BB30
BA28
BA24
BC24
BC22
BA22
BB25
BD25
BB22
BD22
BA21
BC21
BC18
BB18
BB20
BB21
BB19
BA18
W30
W29
AA30
AB29
V29
V31
AA29
AA31
AM31
DDR_B_DQ0
DDR_B_DQ1
DDR_B_DQ2
DDR_B_DQ3
DDR_B_DQ4
DDR_B_DQ5
DDR_B_DQ6
DDR_B_DQ7
DDR_B_DQ8
DDR_B_DQ9
DDR_B_DQ10
DDR_B_DQ11
DDR_B_DQ12
DDR_B_DQ13
DDR_B_DQ14
DDR_B_DQ15
DDR_B_DQ16
DDR_B_DQ17
DDR_B_DQ18
DDR_B_DQ19
DDR_B_DQ20
DDR_B_DQ21
DDR_B_DQ22
DDR_B_DQ23
DDR_B_DQ24
DDR_B_DQ25
DDR_B_DQ26
DDR_B_DQ27
DDR_B_DQ28
DDR_B_DQ29
DDR_B_DQ30
DDR_B_DQ31
DDR_B_DQ32
DDR_B_DQ33
DDR_B_DQ34
DDR_B_DQ35
DDR_B_DQ36
DDR_B_DQ37
DDR_B_DQ38
DDR_B_DQ39
DDR_B_DQ40
DDR_B_DQ41
DDR_B_DQ42
DDR_B_DQ43
DDR_B_DQ44
DDR_B_DQ45
DDR_B_DQ46
DDR_B_DQ47
DDR_B_DQ48
DDR_B_DQ49
DDR_B_DQ50
DDR_B_DQ51
DDR_B_DQ52
DDR_B_DQ53
DDR_B_DQ54
DDR_B_DQ55
DDR_B_DQ56
DDR_B_DQ57
DDR_B_DQ58
DDR_B_DQ59
DDR_B_DQ60
DDR_B_DQ61
DDR_B_DQ62
DDR_B_DQ63
DDR_B_PAR
DDR_B_DQ[63..0] <24>
DDR_B_PAR <24>
1 2
A A
RC1 1K_0402_5%
+1.2V_VDDQ
1 2
RC2 1K_0402_5%
5
DDR_A_EVENT#
DDR_B_EVENT#
Security Cl assification
Security Cl assification
Security Cl assification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
2019/04/30 2020/04/30
2019/04/30 2020/04/30
2019/04/30 2020/04/30
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
FP6_(2/7)_DDR4
FP6_(2/7)_DDR4
FP6_(2/7)_DDR4
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date: Sheet o f
Date: Sheet o f
2
Date: Sheet o f
Compal Electronics, Inc.
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
7 116Wednesday, April 08, 2020
7 116Wednesday, April 08, 2020
7 116Wednesday, April 08, 2020
1
1.0
A
Vinafix.com
Vinafix.com
Main Func = CPU
EC/THERM
+3VS
1 2
RC105 1K_0402_5%
1 2
RC106 1K_0402_5%
1 2
RC107 1K_0402_5%
1 2
RC108 1K_0402_5%
1 1
EC_SMB_CK2<27 ,58>
EC_SMB_DA2<27 ,58>
2 2
+3VS
1 2
RC664 1K_0402_ 5%
1
@ESD@
CC99
.1U_0402_1 6V7K
2
1
ESD@
CC5
33P_0402_5 0V8J
2
Close to APU
SVID
+1.8VALW
1 2
3 3
RC109 1K_0201_5%@
1 2
RC110 1K_0201_5%@
1 2
RC111 1K_0201_5%@
APU_SID
APU_ALERT#
APU_SIC
APU_PROCHOT#
+3VS
EC_SMB_CK2
EC_SMB_DA2
3 4
D
@
Vgs=1.0-2.5V
1 2
RC800 0_0402_5%
1 2
RC801 0_0402_5%
THERMTRIP#
1
ESD@
CC6
33P_0402_5 0V8J
2
2
G
6 1
D
5
@
G
QC1B
2N7002KDW _SOT363-6
SB00000EO00
S
FH51S
add bypass Res.
APU_PROCHOT#
APU_RST#
APU_PWROK
SVT_PWR_APU _R
SVC_PWR_APU
SVD_PWR_APU
QC1A
2N7002KDW _SOT363-6
SB00000EO00
S
APU_PWROK < 96>
APU_SIC
APU_SID
SVC_PWR_APU<96>
SVD_PWR_APU<96>
SVT_PWR_APU _R<96>
B
EDP
+1.8VALW
RC80 4.7K_0402_ 5%
RC81 4.7K_0402_ 5%
RC669 0_0402_ 5%
RC670 0_0402_ 5%
EDP_TXP0<38>
EDP_TXN0<38>
EDP_TXP1<38>
EDP_TXN1<38>
EDP_TXP2<38>
EDP_TXN2<38>
EDP_TXP3<38>
EDP_TXN3<38>
1 2
1 2
THERMTRIP#<58>
APU_PROCHOT#<58,87,96 >
1 2
1 2
C
D
E
DISP
+1.8VALW
5
UC66
ENVDD_R
ENVDD_R
INVTPWM_R
ENBKL
ENVDD
INVTPWM
ENBKL_R
ENVDD_R
INVTPWM_R
1
P
NC
4
ENBKL
Y
2
A
G
NL17SZ07DFT 2G_SC70-5
3
SA0000BIO00
+1.8VALW
5
UC64
1
P
NC
4
Y
2
A
G
NL17SZ07DFT 2G_SC70-5
3
SA0000BIO00
@
1 2
RC690 0_0201_ 5%RS@
+1.8VALW
5
UC65
1
P
NC
4
Y
2
A
G
NL17SZ07DFT 2G_SC70-5
3
SA0000BIO00
1 2
RC3 4 .7K_0402_5%
1 2
RC4 4 .7K_0402_5%@
1 2
RC5 4 .7K_0402_5%
1 2
RC697 100K_0402_ 5%
1 2
RC698 100K_0402_ 5%
1 2
RC699 100K_0402_ 5%@
ENBKL <58>
ENVDD
INVTPWM
ENVDD <38>
ENVDD
FH51S
Downsize for eDP routing
INVTPWM <38>
+3VS
UC1C
@
EDP_TXP0
EDP_TXN0
EDP_TXP1
EDP_TXN1 EDP_AUXP
EDP_TXP2
EDP_TXN2
EDP_TXP3
EDP_TXN3
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBREQ#
APU_RST#
APU_PWROK
APU_SIC<66>
APU_SID<66>
APU_SIC
APU_SID
APU_ALERT#
THERMTRIP#
APU_PROCHOT#
SVC_PWR_APU _R
SVD_PWR_APU _R
SVT_PWR_APU _R
0906
AW3
AW4
D11
B11
C11
A11
D10
B10
D9
B9
G23
H23
F22
G22
G21
H21
F20
G20
AP3
AU1
AR2
AU3
AR4
AT2
B22
D22
C22
AN9
B25
D25
C25
A25
DP0_TXP0
DP0_TXN0
DP0_TXP1
DP0_TXN1
DP0_TXP2
DP0_TXN2
DP0_TXP3
DP0_TXN3
DP1_TXP0
DP1_TXN0
DP1_TXP1
DP1_TXN1
DP1_TXP2
DP1_TXN2
DP1_TXP3
DP1_TXN3
TDI
1V8_S5
TDO
1V8_S5
TCK
1V8_S5
TMS
1V8_S5
1V8_S5
TRST_L
1V8_S5
DBREQ_L
RESET_L
1V8_S5
PWROK
1V8_S5
SIC
SID
ALERT_L
THERMTRIP_L
PROCHOT_L
1V8_S5
SVC0
SVD0
1V8_S5
SVT0
1V8_S5
FP6_BGA1140
DISPLAY/SVI2/ JTAG/TE ST
DP3:
DP2:
DP1: HDMI
DP0: eDP
3V3_S0
3V3_S0
3V3_S0
FP6 REV 0.92
PART 3 OF 13
1V8_S0
DP_DIGON
1V8_S0
DP_VARY_BL
1V8_S0
DP0_AUXP
DP0_AUXN
DP1_AUXP
DP1_AUXN
DP2_AUXP
DP2_AUXN
DP3_AUXP
DP3_AUXN
DP_STEREOSYNC
ANALOGIO_0
ANALOGIO_1
SMU_ZVDD
VDDP_S5_SENSE
VDDP_SENSE
VDDCR_SOC_SENSE
VDDCR_SENSE
VDDIO_MEM_S3_SENSE
VSS_SENSE_A
VSS_SENSE_B
DP_BLON
DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
TEST14
TEST15
TEST16
TEST17
TEST31
TEST41
A22
D23
C23
D12
B12
C12
J20
K20
L21
L19
M19
M20
M14
L14
L16
B23
BB6
TEST4
BD5
TEST5
AG12
TEST6
G25
K25
F25
F26
H26
AK9
AK21
AG21
P3
AK7
AK12
J23
K22
J21
J22
AJ12
ENBKL_R
ENVDD_R
INVTPWM_R
EDP_AUXN
EDP_HPD
DP_STEREOSYNC
APU_TEST4
APU_TEST5
APU_TEST14
APU_TEST15
APU_TEST16
APU_TEST17
APU_TEST31
APU_TEST41
APU_TEST470
APU_TEST471
SMU_ZVDDP
APU_VDDP_SEN_H
VDDP_SENSE
VCC_SENSE_APU_C ORE_SOC
VCC_SENSE_APU_C ORE
VDDIO_MEM_S3_SENS E
VSS_SEN_APU_CORE
APU_VDDP_SEN_L
TP@
TP@
TP@
TP@
TP@
TP@
RC162 196_0402_ 1%
EDP_AUXP <38>
EDP_AUXN <38>
EDP_HPD <38>
TC1
TC2
TC3
TC4
TC5
TC6
1 2
TC10
TP@
EDP
+0.75VS
APU_VDDP_SEN_H <93>
VDDP_SENSE <93>
VCC_SENSE_APU_C ORE_SOC < 96>
VCC_SENSE_APU_C ORE <96>
VSS_SEN_APU_CORE <96>
APU_VDDP_SEN_L <93>
ENBKL_R
AMD DEBUG
+1.8VALW
APU_TCK
APU_TMS
APU_TDI
APU_DBREQ#
APU_TRST#
4 4
A
1 2
RH34 1K_0402_5%
1 2
RH35 1K_0402_5%
1 2
RH36 1K_0402_5%
1 2
RH37 1K_0402_5%
1 2
RH26 1K_0402_5%
+1.8VALW
0.01U_0402 _16V7K
APU_TCK
APU_TMS
APU_TDI
APU_TDO
APU_PWROK
APU_RST#
APU_DBREQ#
APU_TRST#
B
RH41 0_0402_5%RS@
RH42 0_0402_5%RS@
RH43 0_0402_5%RS@
RH44 0_0402_5%RS@
RH45 0_0402_5%RS@
RH46 0_0402_5%RS@
RH47 33_0402_5 %HDT@
RH21 33_0402_5 %HDT@
HDT@
CH2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2
1
APU_TCK_R
APU_TMS_R
APU_TDI_R
APU_TDO_R
APU_PWROK_R
APU_RST#_R
APU_DBREQ#_R
APU_TRST#_R
JHDT1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
GND
14
GND
ACES_51625-01 201-001
SP010028W00
CONN@
JDBG1
LPC_CLK1<10>
LPC_RST#<10,58,63>
LPCPD#<10>
LPC_FRAME#_R<10,58>
LPC_AD2_R<10,5 8>
LPC_AD3_R<10,5 8>
LPC_AD1_R<10,5 8>
LPC_CLK0_E C<10,58>
LPC_AD0_R<10,5 8>
+3VS
+3VALW
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2019/08/26 2020/08/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
GND
14
GND
ACES_51625-01 201-001
SP010028W00
CONN@
Deciphered Date
Deciphered Date
Deciphered Date
D
TESTPOINT
DP_STEREOSYNC
APU_TEST14
APU_TEST15
APU_TEST16
APU_TEST17
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
1 2
RC155 1K_0402_ 5%
1 2
RC154 1K_0402_ 5%@
+1.8VS
RC112 10K_0201_5 %@
RC113 10K_0201_5 %@
RC114 10K_0201_5 %@
RC115 10K_0201_5 %@
FP6_(3/7)_DISP/MISC/HDT
FP6_(3/7)_DISP/MISC/HDT
FP6_(3/7)_DISP/MISC/HDT
LA-K181P
LA-K181P
LA-K181P
12
12
12
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
E
+1.8VS
1.0
1.0
8 116Wednesday, April 08, 2 020
8 116Wednesday, April 08, 2 020
8 116Wednesday, April 08, 2 020
1.0
Main Func = CPU
Vinafix.com
Vinafix.com
A
B
C
D
E
UC1D
@
3V3_S5
3V3_S5
3V3_S5
3V3_S5
3V3_S5
SW PU/PD
SW PU/PD
3V3_S5
3V3_S5
ACPI/AUDIO/I2C/GPI O/MIS C
SW PU/PD
SW PU/PD
SW PU/PD
SW PU/PD
FP6 REV 0.92
PART 4 OF 13
1 2
CC7 150P_0402_50V8J
1 2
CC100 150P_0402_50V8J@
1 2
No MSB
ACIN<58,87>
DGPU_PWR_EN
RC29 33_0402_5%
1 2
RC704 33_0402_5%@
EC_RSMRST#<58>
PBTN_OUT#<58>
SYS_PWRGD_EC<58>
SLP_S3#<58>
SLP_S5#<58>
1 2
RC775 0_0201_5%@
1 2
RC802 0_0201_5%@
1 2
RC803 0_0201_5%DIS@
HDA_SDIN0<56>
1 2
RC757 33_0402_5%@
1 2
RC758 33_0402_5%@
1 2
RC760 0_0402_5%@
1 2
RC759 33_0402_5%@
1 1
ACPI
+3VALW
1 2
RC705 10K_0402_5%
1 2
RC768 10K_0402_5%
1 2
RC770 10K_0402_5%
CRB use S0-rail
RC734
10K_0402_1%@
+3VS
12
RC28
10K_0402_1%
SYS_PWRGD_EC EC_RSMRST#
2
CC8
0.22U_0402_16V7K
1
RC700 0_0402_5%RS@
RC701 0_0402_5%@
+3VALW
12
2 2
APU_PCIE_RST#_C
APU_PCIE1_RST#_C
APU_PCIE_WAKE#
PBTN_OUT# PROJECT_ID1
1 2
1 2
AGPIO12
+1.8VALW
12
RC54
22K_0402_1%
1
CC16
1U_0201_6.3V6M
2
Reserve for MBDG/CRB
CC101
10U_0402_6.3V6M
1 2
@
APU_PCIE_RST# <27,52,69,72>
APU_TS_I2C_INT#<38>
PCM_BCLK<52>
PCM_DOUT<52>
PCM_DIN<52>
PCM_LRCLK<52>
APU_PCIE_RST#_RAPU_PCIE_RST#_C
APU_PCIE1_RST#_RAPU_PCIE1_RST#_C
EC_RSMRST#
PBTN_OUT#
SYS_PWRGD_EC
SYS_RST#
APU_PCIE_WAKE#
SLP_S3#
SLP_S5#
AGPIO23
AGPIO12
APU_WOV_CLK
APU_WOV_DAT
HDA_BIT_CLK
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_RST#
HDA_SYNC
HDA_SDOUT
APU_PCM_BCLK
APU_PCM_DOUT
APU_PCM_DIN
APU_PCM_LRCLK
AP6
PCIE_RST0_L/EGPIO26
AT13
PCIE_RST1_L/EGPIO27
AR8
RSMRST_L
AT12
PWR_BTN_L/AGPIO0
AW2
PWR_GOOD
AL2
SYS_RESET_L/AGPIO1
AW12
WAKE_L/AGPIO2
AT11
SLP_S3_L
AV11
SLP_S5_L
AW13
S0A3_GPIO/AGPIO10
BA8
AC_PRES/AGPIO23
AV6
LLB_L/AGPIO12
AW8
EGPIO42
3V3_S5
AG6
ACP_WOV_CLK/ACP_IPIO28
AG7
ACP_WOV_MIC0_MIC1_DATA/ACP_IPIO29
AJ6
ACP_WOV_MIC2_MIC3_DATA/ACP_IPIO30
AN6
AZ_BITCLK/TDM_BCLK_MIC
AL6
AZ_SDIN0/CODEC_GPI
AM7
AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK
AJ9
AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK/ACP_WOV_MIC4_MIC5_DATA
AM6
AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC
AN8
AZ_SYNC/TDM_FRM_MIC
AK6
AZ_SDOUT/TDM_FRM_PLAYBACK
AM4
SW_MCLK/TDM_BCLK_BT
AL3
SW_DATA0/TDM_DOUT_BT
AM2
AGPIO7/FCH_ACP_I2S_SDIN_BT
AL4
AGPIO8/FCH_ACP_I2S_LRCLK_BT
FP6_BGA1140
SW PU/PD
SW PU/PD
SW PU/PD
SW PU/PD
3V3_S0
3V3_S0
3V3_S5
3V3_S5
3V3_S5
3V3_S5
3V3_S5
3V3_S5
3V3_S5
3V3_S5
1V8_S0
1V8_S0
1V8_S0
1V8_S0
I2C2_SCL/EGPIO113/SMBUS0_I2C_SCL
I2C2_SDA/EGPIO114/SMBUS0_I2C_SDA
I2C3_SCL/AGPIO19/SMBUS1_I2C_SCL
I2C3_SDA/AGPIO20/SMBUS1_I2C_SDA
3V3_S5
3V3_S5
3V3_S5
SW PU/PD
3V3/1V8_S0
3V3_S0
3V3_S5
3V3_S0
3V3_S0
3V3_S0
3V3_S0
I2C0_SCL/EGPIO145
I2C0_SDA/EGPIO146
I2C1_SCL/EGPIO147
I2C1_SDA/EGPIO148
1V8_S5
1V8_S5
3V3_S5
AGPIO4/SATAE_IFDET
SATA_ACT_L/AGPIO130
3V3_S5
3V3_S5
3V3_S0
AGPIO86/SPI_CLK2
INTRUDER_ALERT
GENINT1_L/AGPIO89
GENINT2_L/AGPIO90
FANOUT0/AGPIO85
SFH_IPIO271
SFH_IPIO272
SFH_IPIO273
SFH_IPIO274
SFH_IPIO39
SFH_IPIO41
SFH1_SCL
SFH1_SDA
AGPIO5/DEVSLP0
AGPIO6/DEVSLP1
AGPIO40
AGPIO69
SPKR/AGPIO91
BLINK/AGPIO11
FANIN0/AGPIO84
AM3
AT4
AM1
AJ8
AW7
AU2
I2C_0_SCL
AP14
I2C_0_SDA
AN14
I2C_1_SCL
AP2
I2C_1_SDA
AN3
SMB_0_SCL
AN12
SMB_0_SDA
AP12
I2C_3_SCL
AM9
I2C_3_SDA
AM10
D24
B24
APU_BT_WAKE#
BB7
AGPIO3
SSD_DET#_R
BA6
AK10
DEVSLP0
BC6
DEVSLP1
PANEL_OD#
AW15
TP_I2C_INT#_APU
AU4
AGPIO9
AP7
AGPIO40
DGPU_HOLD_RST#
AV13
1 2
BB12
DIS@
AU7
APU_SPKR
AR11
PROJECT_ID2
AW11
AV15
AGPIO89
AU14
AGPIO90
AT10
AU10
AGPIO85
0_0201_5%
RC808
1 2
1 2
1 2
1 2
1 2
SW Program to 1.8V
I2C_0_SCL <38>
I2C_0_SDA <38>
SMB_0_SCL <23,24>
SMB_0_SDA <23,24>
I2C_3_SCL <63>
I2C_3_SDA <63>
APU_BT_WAKE# <52>
SSD_DET#_R <69>
DEVSLP0 <69>
DEVSLP1 <68>
PANEL_OD# <38>
TP_I2C_INT#_APU <63>
AGPIO40 <52,69>
DGPU_HOLD_RST# <27>
APU_SPKR <56>
1 2
1 2
RC780 0_0201_5%@
RC809 0_0201_5%GC6@
RC789 0_0201_5%DIS@
RC807 0_0201_5%@
RC810 0_0201_5%@
FH51S DGPU_PWRGD ch ange to NVVDD1_PG
Add GPU_EVENT# pin
I2C Touch screen
DDR 4
Touch Pad
PCIE/SATA
SATA Only
HDMI_HPD_APU
APU_TS_I2C_INT#
SW internal Pull-down
RC8050_0201_5%@
RC8040_0201_5%GC6@
DGPU_PWR_EN <27>
GC6_FB_EN3V3 <10,27>
HDMI_HPD_APU <27,40>
NVVDD1_PG <102>
FH51S
For dGPU power on
GPU_EVENT# <27>
I2C_0_SCL
I2C_0_SDA
I2C_1_SCL
I2C_1_SDA
SMB_0_SCL
SMB_0_SDA
I2C_3_SCL
I2C_3_SDA
DEVSLP0
DEVSLP1
APU_BT_WAKE#
SSD_DET#_R
AGPIO89
AMD Suggest pin
1 2
RC719 2.2K_0402_5%TSI2C@
1 2
RC720 2.2K_0402_5%TSI2C@
1 2
RC743 2.2K_0402_5%@
1 2
RC744 2.2K_0402_5%@
1 2
RC721 2.2K_0402_5%
1 2
RC722 2.2K_0402_5%
0911
1 2
RC730 2.2K_0402_5%
1 2
RC731 2.2K_0402_5%
1 2
RC737 10K_0402_5%
RC663 10K_0402_5%
1 2
RC761 2.2K_0402_5%@
1 2
RC732 10K_0402_5%
1 2
RC791 10K_0402_5%@
1 2
RC792 10K_0402_5%@
+1.8VS
+3VS
+3VALW
12
+3VS
Strap Pin
HDA
HDA_SDIN1
HDA_SDIN2
HDA_SDIN0
HDA_RST#
HDA_BIT_CLK
HDA_SYNC
HDA_SDOUT
1 2
HDA_RST#_R<56>
HDA_BIT_CLK_R<56>
HDA_SYNC_R<56>
3 3
HDA_SDOUT_R<56>
RC116 33_0402_5%EMI@
1 2
RC117 33_0402_5%EMI@
1 2
RC118 33_0402_5%EMI@
1 2
RC119 33_0402_5%EMI@
1 2
RC120 1K_0402_5%@
1 2
RC121 1K_0402_5%@
1 2
RC122 1K_0402_5%@
1 2
RC123 1K_0402_5%@
1 2
RC695 10K_0402_5%@
1 2
RC696 10K_0402_5%@
1 2
RC703 10K_0402_5%@
APU_SPI_C LK_R SYS_ RST#
USE 48MHZ CRYSTAL
H
CLOCK
(Default)
USE 100MHZ PCIE
L
CLOCK AS
REFERENCE CLOCK
APU_SPI_CLK_R<10,63>
NORMAL RESET MODE
(Default)
SHORT RESET MODE
+1.8VS +1.8VALW +3VALW
12
12
RC622
RC47
@
10K_0402_5%
10K_0402_5%
SYS_RST#
RC163
12
@
2K_0402_5%
RC100
RC99
12
10K_0402_5%
12
1
@
@
2
2K_0402_5%
APU WOV (Reserve)
APU_WOV_CLK
APU_WOV_DAT
CC687
1U_0201_6.3V6M
+3VALW
+VDDIO_AUDIO
2
S
QC2B
PJT138KA_SOT363-6
1 2
RC751 0_0402_5%@
1 2
RC752 0_0402_5%@
+VDDIO_AUDIO
RC746 2.2K_0402_5%@
RC745 2.2K_0402_5%@
RC748 2.2K_0402_5%@
RC747 2.2K_0402_5%@
5
SGD
G
61
D
@
QC2A
@
PJT138KA_SOT363-6
34
SB000016K00
12
12
12
12
SB000016K00
LC2
@EMI@
BLM15PX221SN1D_2P
1 2
SM01000NY00
APU_WOV_CLK
APU_WOV_DAT
APU_WOV_CLK_L
APU_WOV_DAT_L
APU_WOV_CLK_L <56>
APU_WOV_DAT_L <56>
FH51S
(Sto nic_RN S)
Project ID
+3VALW
12
@
RC707
RC715
10K_0402_5%
10K_0402_5%
PROJECT_ID1
PROJECT_ID2
FH51S@
PROJECT_ID3
AGPIO23
10K_0402_5%
Proj ect_ID 2
AGPI O11
RC708
10K_0402_5%
SD028100280
RC716
@
12
FH51S@
RC708
10K_0402_5%
PROJECT_ID3<10>
Proj ect_ID 3
(AGP IO144)
RC716
L L L
10K_0402_5%
SD028100280
12
RD@
@
RC776
10K_0402_5%
12
@
RC777
10K_0402_5%
Proj ect_ID 1
AGPI O10
RC799
10K_0402_5%
SD028100280
@
FH51S@
FH51S
12
RC798
10K_0402_5%
12
RC799
10K_0402_5%
+3VS
12
@
12
@
4 4
Security Classification
Security Classification
A
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE S ECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE S ECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE S ECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELE CTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELE CTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELE CTRONICS, INC.
C
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2019/08/26 2020/08/26
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
FP6_(4/7)_GPIO/HDA/STRAP
FP6_(4/7)_GPIO/HDA/STRAP
FP6_(4/7)_GPIO/HDA/STRAP
Document Number Re v
Document Number Re v
Document Number Re v
LA-K181P
LA-K181P
LA-K181P
E
9 116Wednesday, April 08, 2020
9 116Wednesday, April 08, 2020
9 116Wednesday, April 08, 2020
of
of
of
1.0
1.0
1.0
Main Func = CPU
Vinafix.com
Vinafix.com
A
B
C
D
E
UC1E
AR13
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
AP10
CLK_REQ1_L/AGPIO115
AR15
CLK_REQ2_L/AGPIO116
AT14
CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
AN11
CLK_REQ4_L/OSCIN/EGPIO132
AN13
CLK_REQ5_L/EGPIO120
AN15
CLK_REQ6_L/EGPIO121
AF11
GPP_CLK0P
AF12
GPP_CLK0N
AG4
GPP_CLK1P
AG2
GPP_CLK1N
AG3
GPP_CLK2P
AG1
GPP_CLK2N
AF2
GPP_CLK3P
AF4
GPP_CLK3N
AH2
GPP_CLK4P
AH4
GPP_CLK4N
AJ2
GPP_CLK5P
AJ4
GPP_CLK5N
AF8
GPP_CLK6P/WIFIBT_CLKP
AF9
GPP_CLK6N/WIFIBT_CLKN
AK1
X48M_OSC
BB3
X48M_X1
BA5
X48M_X2
AG10
RSVD_71
AG9
RSVD_70
AW10
RTCCLK
AY1
X32K_X1
AY4
X32K_X2
FP6_BGA1140
@
CLK/LPC/EMMC/SD/SPI/eSPI/ UART
x4 PCIE Express
SSD (PCIE/SATA)
SW PU/PD
VDD_33
SSD (PCIE/SATA)
x4 PCIE Express
GBE LAN
WLAN
dGPU
M.2 SSD
x4 PCIE TBT SLOT
dGPU
GBE LAN
WLAN
FP6 REV 0.92
PART 5 OF 13
SW PU/PD
SW PU/PD
SW PU/PD
SW PU/PD
SW PU/PD
SW PU/PD
SW PU/PD
LPC_PD_L/AGPIO21
LAD0/ESPI1_DATA0/EGPIO104
LAD1/ESPI1_DATA1/EGPIO105
LAD2/ESPI1_DATA2/EGPIO106
LAD3/ESPI1_DATA3/EGPIO107
LPCCLK0/EGPIO74
LPC_CLKRUN_L/AGPIO88
LPCCLK1/EGPIO75
SERIRQ/AGPIO87
LFRAME_L/EGPIO109
LPC_RST_L/AGPIO32
3V3_S0
LPC_PME_L/AGPIO22
SPI_ROM_REQ/EGPIO67
SPI_ROM_GNT/EGPIO76
ESPI_RESET_L/KBRST_L/AGPIO129
ESPI_ALERT_L/LDRQ0_L/EGPIO108
SPI_CLK/ESPI_CLK
1V8_S5
SPI_DI/ESPI_DATA
SPI_WP_L/ESPI_DAT2
SPI_HOLD_L/ESPI_DAT3
SPI_CS2_L/ESPI_CS_L/AGPIO30
SPI_CS3_L/AGPIO31
SPI_TPM_CS_L/AGPIO29
EGPIO141/UART0_RXD
EGPIO143/UART0_TXD
EGPIO142/UART0_RTS_L/UART1_RXD
EGPIO140/UART0_CTS_L/UART1_TXD
AGPIO144/SHUTDOWN_L/UART0_INTR
SPI_CS1_L
EGPIO70
AGPIO68
SPI_DO
AW14
BB13
BA16
BA15
BC13
BB14
BB15
BD13
BA12
BC15
BA13
BC12
AU12
AP4
BA11
BB11
AT15
BC11
BC10
BA10
BB8
BA9
BC8
BD11
BC9
BB10
BD8
BA17
BC16
BD15
BC17
BB16
EGPIO70
RC781 0_0201_5%RS@
LPCPD#
LPC_AD0
RC101 10_0402_5%
LPC_AD1
RC102 10_0402_5%
LPC_AD2
RC103 10_0402_5%
LPC_AD3
RC104 10_0402_5%
LPC_CLK0
RC449 22_0402_5%
APU_SPI_IRQ#
LPC_CLK1
SERIRQ
RC753 0_0402_5%
LPC_FRAME#
RC754 0_0402_5%
LPC_RST_A#
AGPIO68
RC793 0_0201_5%@
EC_SCI#
KBRST#
EGPIO108
APU_SPI_CLK
APU_SPI_MISO
APU_SPI_MOSI
APU_SPI_WP#
APU_SPI_HOLD#
APU_SPI_CS#1
UART_0_ARXD_DTXD
UART_0_ATXD_DRXD
UART_0_RTS#
UART_0_CTS#
PROJECT_ID3
1 2
1 2
1 2
1 2
1 2
1 2
12
12
1 2
EC_SCI# <58>
KBRST# <58 >
RC74 10_0402_5%
1 2
EMI@
UART_0_ARXD_DTXD <52>
UART_0_ATXD_DRXD < 52>
UART_0_RTS# <52>
UART_0_CTS# <52>
PROJECT_ID3 <9>
RC449 close to UC1
APU_BT_ON <52>
LPCPD# <8>
LPC_AD0_R <8,58>
LPC_AD1_R <8,58>
LPC_AD2_R <8,58>
LPC_AD3_R <8,58>
LPC_CLK0_EC <8,58>
APU_SPI_IRQ# <63>
LPC_CLK1 <8>
SERIRQ_R < 58>
LPC_FRAME#_R <8,58>
GC6_FB_EN3V3 <9,27>
FH51S
Add GC6_FB_EN3V3
APU_SPI_CLK_R <9,63>
APU_SPI_MISO <63 >
APU_SPI_MOSI <63 >
APU_SPI_TPMCS# <63>
Follow MDG.
16MB SPI ROM
APU_SPI_CS#1
APU_SPI_MISO
APU_SPI_WP#
SSD(PCIE/ SATA)
SUSCLK_WLAN<52>
8/29
GPU
SSD(PCIE)
LAN
WLAN
SSD(PCIE/ SATA)
GPU
SSD(PCIE)
LAN
WLAN
1 2
RC762 22_0402_5%@
CLKREQ_PCIE#0<27>
CLKREQ_PCIE#1<69>
CLKREQ_PCIE#2<72>
CLKREQ_PCIE#3<52>
CLKREQ_PCIE#4<69>
CLK_PCIE_P0<27>
CLK_PCIE_N0<27>
CLK_PCIE_P1<69>
CLK_PCIE_N1<69>
CLK_PCIE_P2<72>
CLK_PCIE_N2<72>
CLK_PCIE_P3<52>
CLK_PCIE_N3<52>
CLK_PCIE_P4<69>
CLK_PCIE_N4<69>
+3VS
1 2
RC723 10K_0402_5%
1 2
RC724 10K_0402_5%
1 2
1 1
RC763 10K_0402_5%
1 2
RC764 10K_0402_5%
1 2
RC765 10K_0402_5%
1 2
RC725 10K_0402_5%@
FH51S
CLKREQ_PCIE#0
CLKREQ_PCIE#2
CLKREQ_PCIE#3
CLKREQ_PCIE#4
CLKREQ_PCIE#5
48MHz CRYSTAL
48M_X2
1
1
YC2
48MHZ_8PF_X3S048000D81H-W
SJ10000JP00
PVT
4
4
12
CC690
3.3P_0402_50V8
YC3
PVT
CC682
15P_0402_50V8J
48M_X1
PVT
32K_X1
12
PVT
32K_X2
1 2
RC124
1M_0402_5%
2
2
3
3
12
CC689
3.3P_0402_50V8
2 2
32.768KHz CRYSTAL
SJ100011Z00
32.768KHZ_12.5PF_CM31532768DZFT
12
RC98
20M_0402_5%
12
CC686
15P_0402_50V8J
12
CLKREQ_PCIE#0
CLKREQ_PCIE#1
CLKREQ_PCIE#2
CLKREQ_PCIE#3
CLKREQ_PCIE#4
CLKREQ_PCIE#5CLKREQ_PCIE#1
CLK_PCIE_P0
CLK_PCIE_N0
CLK_PCIE_P1
CLK_PCIE_N1
CLK_PCIE_P2
CLK_PCIE_N2
CLK_PCIE_P3
CLK_PCIE_N3
CLK_PCIE_P4
CLK_PCIE_N4
48M_X1
48M_X2
RTCCLK
32K_X1
32K_X2
USB Function
+1.8VALW
A
+3VALW
12
@
12
APU_USBC_SCL
APU_USBC_SDA
USB_OC0#
APU_BT_ON
RC811
10K_0402_5%
DP0_HPD_APU_R
RC812
10K_0402_5%
DP0_HPD_APU<27,39>
MB TypeC
MB USB3 CHG
Finger Print
WLAN/B T
MB USB3
MB USB3 (SUB)
Camera
Touch Screen
APU_BT_ON
RC782 0_0201_5%@
RC794 0_0402_5%DP@
FH51S
DP0_HPD_APU
B
USB20_P0<43>
USB20_N0<43>
USB20_P1<71>
USB20_N1<71>
USB20_P2<66>
USB20_N2<66>
USB20_P3<52>
USB20_N3<52>
USB20_P4<72>
USB20_N4<72>
USB20_P5<72>
USB20_N5<72>
USB20_P6<38>
USB20_N6<38>
USB20_P7<38>
USB20_N7<38>
Check use or not
USB_OC0#<71>
1 2
12
USB20_P0
USB20_N0
USB20_P1
USB20_N1
USB20_P2
USB20_N2
USB20_P3
USB20_N3
USB20_P4
USB20_N4
USB20_P5
USB20_N5
USB20_P6
USB20_N6
USB20_P7
USB20_N7
APU_USBC_SCL
APU_USBC_SDA
USB_OC0#
AGPIO17
DP0_HPD_APU_R
AGPIO24
AC10
AA11
AA12
AE10
AC6
AC7
AA8
AA9
Y10
AC9
W8
W9
W11
W12
AL9
AL8
AE9
AE6
AE7
UC1J
USBC0_DP/USB0_DP
USBC0_DN/USB0_DN
USB1_DP
USB1_DN
USB2_DP
Y9
USB2_DN
Y7
USB3_DP
Y6
USB3_DN
USBC4_DP/USB4_DP
USBC4_DN/USB4_DN
USB5_DP
USB5_DN
USB6_DP
USB6_DN
USB7_DP
USB7_DN
USBC_I2C_SCL
USBC_I2C_SDA
USB_OC0_L/AGPIO16
USB_OC1_L/AGPIO17
USB_OC2_L/AGPIO18
USB_OC3_L/AGPIO24
FP6_BGA1140
@
1V8_S5
1V8_S5
Controller 0
Controller 1
SW PU/PD
USB
FP6 REV 0.92
PART 10 OF 13
USBC0_ATX_DRX_P1
USBC0_TX2P/DP2_TXP1
USBC0_TX2N/DP2_TXN1
USBC0_RX2P/DP2_TXP0
USBC0_RX2N/DP2_TXN0
USBC4_TX2P/DP3_TXP1
USBC4_TX2N/DP3_TXN1
USBC4_RX2P/DP3_TXP0
USBC4_RX2N/DP3_TXN0
AA1
USBC0_ATX_DRX_N1
AA3
USBC0_ARX_DTX_P1
AA2
USBC0_ARX_DTX_N1
AA4
AC2
AC4
AC1
AC3
USB3_ATX_DRX_P1
AE1
USB1_TXP
USB3_ATX_DRX_N1
AE3
USB1_TXN
USB3_ARX_DTX_P1
AD8
USB1_RXP
USB3_ARX_DTX_N1
AD9
USB1_RXN
USB3_ATX_DRX_P4
V3
USB3_ATX_DRX_N4
V1
USB3_ARX_DTX_P4
U4
USB3_ARX_DTX_N4
U2
W2
W4
W1
W3
USB3_ATX_DRX_P5
AD2
USB5_TXP
USB3_ATX_DRX_N5
AD4
USB5_TXN
USB3_ARX_DTX_P5
AD12
USB5_RXP
USB3_ARX_DTX_N5
AD11
USB5_RXN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPALELECTRONICS, INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPALELECTRONICS, INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPALELECTRONICS, INC.
USBC0_ATX_DRX_P1 <42>
USBC0_ATX_DRX_N1 <4 2>
USBC0_ARX_DTX_P1 <42>
USBC0_ARX_DTX_N1 <42>
USB3_ATX_DRX_P1 <71>
USB3_ATX_DRX_N1 <71>
USB3_ARX_DTX_P1 <71>
USB3_ARX_DTX_N1 <71>
USB3_ATX_DRX_P4 <72>
USB3_ATX_DRX_N4 <72>
USB3_ARX_DTX_P4 <72>
USB3_ARX_DTX_N4 <72>
USB3_ATX_DRX_P5 <72>
USB3_ATX_DRX_N5 <72>
USB3_ARX_DTX_P5 <72>
USB3_ARX_DTX_N5 <72>
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2019/08/26 2020/08/26
MB TypeC
Type-A MB USB3.2 CHG
Type-A SUB USB3.0 (SUB)
Type-A SUB USB3.0 (SUB)
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
USBC0_TX1P/USB0_TXP/DP2_TXP2
USBC0_TX1N/USB0_TXN/DP2_TXN2
USBC0_RX1P/USB0_RXP/DP2_TXP3
USBC0_RX1N/USB0_RXN/DP2_TXN3
USBC4_TX1P/USB4_TXP/DP3_TXP2
USBC4_TX1N/USB4_TXN/DP3_TXN2
USBC4_RX1P/USB4_RXP/DP3_TXP3
USBC4_RX1N/USB4_RXN/DP3_TXN3
C
1 2
3 3
RC94 4.7K _0402_5%
1 2
RC95 4.7K _0402_5%
+3VALW
1 2
RC96 100K _0402_5%@
Reserve
+3VALW
1 2
RC771 10K_0402_5%
@
+3VALW
12
RC783
@
1M_0402_5%
12
10K_0402_5%
4 4
AGPIO24
RC784
@
FH51S
For DP0_HPD_APU
PH to +3VS on DP side
Co-lay SPI Socket with UC7
APU_SPI_CS#1
APU_SPI_MISO
APU_SPI_WP#
RC602
33_0402_5%
LPC_RST_A#
1 2
1
CC615
150P_0402_50V8J
2
EC_SCI#
EGPIO108
LPC_CLK1
LPCPD#
APU_SPI_MISOAPU_SPI_TPMCS#
APU_SPI_WP#
APU_SPI_HOLD#
APU_SPI_CS#1
12
RC727 10K_0402_5%
12
RC729 10K_0402_5%
12
RC735 10K_0402_5%@
12
RC742 10K_0402_5%@
1 2
RC658 10K_0402_5%
1 2
RC640 10K_0402_5%
1 2
RC642 10K_0402_5%
1 2
RC639 10K_0402_5%
+1.8VALW +SPI_VCC
+1.8VS
UC7
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
W25Q64FWSS IQ_SOIC_8P
SA00009PH10
S IC FL 128M GD25LB128DSIGR SOP 8P SPI
APU_SPI_CLK_R
JSKT1
1
CS#
2
SO/SIO1
3
WP#
4
GND
SP07000H900
S SOCKET ACES 91960-0084N 8P FLASH ROM
ACES_91960-0084N_ MX25L3206EM2I
8
VCC
7
HOLD#(IO3)
6
CLK
5
DI(IO0)
@EMI@
1 2
1 2
@EMI@
RC680
CC636
10_0402_5%
10P_0402_50V8J
CONN@
8
VCC
7
HOLD#
6
SCLK
5
SI/SIO0
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
FP6_(5/7)_CLK/USB/SPI/LPC
FP6_(5/7)_CLK/USB/SPI/LPC
FP6_(5/7)_CLK/USB/SPI/LPC
Size
Size
Size
Document Num ber Re v
Document Num ber Re v
Document Num ber Re v
LA-K181P
LA-K181P
LA-K181P
Date : Sheet of
Date : Sheet of
Date : Sheet of
LPC_RST# <8,58,63>
RC158
0_0603_5%
1 2
RS@
RC159
0_0603_5%
1 2
@
+SPI_VCC
APU_SPI_HOLD#
APU_SPI_CLK_R
APU_SPI_MOSI
+SPI_VCC
APU_SPI_HOLD#
APU_SPI_CLK_R
APU_SPI_MOSI
E
+3VALW
+3VS
+SPI_VCC
2
@
1
CC635
0.1U_0201_10V6K
10 116W ednesday, April 08, 2020
10 116W ednesday, April 08, 2020
10 116W ednesday, April 08, 2020
1.0
1.0
1.0
A
Vinafix.com
Vinafix.com
B
C
D
E
Main Func = CPU
UC1F
W18
W20
AC20
AC28
AD23
AD26
AD28
AD32
AE20
AE22
AE25
AE28
AF23
AF26
AF28
AF32
AG20
AG22
AG25
AG28
AJ20
AJ23
AJ26
AJ28
AJ32
AK22
AK25
AK28
AL23
AL26
AL28
AL32
AM22
AM25
AM28
AN28
AN32
AP28
AR32
AC21
AD21
AL18
AM17
AL20
AM19
AL19
AM18
AL17
AM16
AL11
AL12
AM12
AJ11
N16
N18
N20
P17
P19
R18
R20
U18
U20
V19
Y19
AP9
M15
M16
M18
T19
1
2
VDDCR_SOC_1
VDDCR_SOC_2
VDDCR_SOC_3
VDDCR_SOC_4
VDDCR_SOC_5
VDDCR_SOC_6
VDDCR_SOC_7
VDDCR_SOC_8
VDDCR_SOC_9
VDDCR_SOC_10
VDDCR_SOC_11
VDDCR_SOC_12
VDDCR_SOC_13
VDDCR_SOC_14
VDDIO_MEM_S3_1
VDDIO_MEM_S3_2
VDDIO_MEM_S3_3
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDIO_MEM_S3_6
VDDIO_MEM_S3_7
VDDIO_MEM_S3_8
VDDIO_MEM_S3_9
VDDIO_MEM_S3_10
VDDIO_MEM_S3_11
VDDIO_MEM_S3_12
VDDIO_MEM_S3_13
VDDIO_MEM_S3_14
VDDIO_MEM_S3_15
VDDIO_MEM_S3_16
VDDIO_MEM_S3_17
VDDIO_MEM_S3_18
VDDIO_MEM_S3_19
VDDIO_MEM_S3_20
VDDIO_MEM_S3_21
VDDIO_MEM_S3_22
VDDIO_MEM_S3_23
VDDIO_MEM_S3_24
VDDIO_MEM_S3_25
VDDIO_MEM_S3_26
VDDIO_MEM_S3_27
VDDIO_MEM_S3_28
VDDIO_MEM_S3_29
VDDIO_MEM_S3_30
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDIO_MEM_S3_33
VDDIO_MEM_S3_34
VDDIO_MEM_S3_35
VDDIO_MEM_S3_36
VDDIO_MEM_S3_37
VDDIO_VPH_1
VDDIO_VPH_2
VDDIO_AUDIO
VDD_33_1
VDD_33_2
VDD_18_1
VDD_18_2
VDD_18_S5_1
VDD_18_S5_2
VDD_33_S5_1
VDD_33_S5_2
VDDP_S5_1
VDDP_S5_2
VDDP_S5_3
VDDP_1
VDDP_2
VDDP_3
VDDBT_RTC_G
FP6_BGA1140
CLRP1
0_0603_5%
@
POWER
FP6 REV 0.92
PART 6 OF 13
RC733
1K_0402_5%
1 2
12
@
0.1U_0201_ 10V6K
CC119
+RTC_APU
1
2
G7
VDDCR_1
G10
VDDCR_2
G12
VDDCR_3
G14
VDDCR_4
H8
VDDCR_5
H11
VDDCR_6
H15
VDDCR_7
K6
VDDCR_8
K12
VDDCR_9
K14
VDDCR_10
L8
VDDCR_11
M7
VDDCR_12
M10
VDDCR_13
N14
VDDCR_14
P7
VDDCR_15
P10
VDDCR_16
P13
VDDCR_17
P15
VDDCR_18
R8
VDDCR_19
R14
VDDCR_20
R16
VDDCR_21
T7
VDDCR_22
T10
VDDCR_23
T13
VDDCR_24
T15
VDDCR_25
T17
VDDCR_26
U14
VDDCR_27
U16
VDDCR_28
V13
VDDCR_29
V15
VDDCR_30
V17
VDDCR_31
W7
VDDCR_32
W10
VDDCR_33
W14
VDDCR_34
W16
VDDCR_35
Y8
VDDCR_36
Y13
VDDCR_37
Y15
VDDCR_38
Y17
VDDCR_39
AA7
VDDCR_40
AA10
VDDCR_41
AA14
VDDCR_42
AA16
VDDCR_43
AA18
VDDCR_44
AB13
VDDCR_45
AB15
VDDCR_46
AB17
VDDCR_47
AB19
VDDCR_48
AC14
VDDCR_49
AC16
VDDCR_50
AC18
VDDCR_51
AD7
VDDCR_52
AD10
VDDCR_53
AD13
VDDCR_54
AD15
VDDCR_55
AD17
VDDCR_56
AD19
VDDCR_57
AE8
VDDCR_58
AE14
VDDCR_59
AE16
VDDCR_60
AE18
VDDCR_61
AF7
VDDCR_62
AF10
VDDCR_63
AF13
VDDCR_64
AF15
VDDCR_65
AF17
VDDCR_66
AF19
VDDCR_67
AG14
VDDCR_68
AG16
VDDCR_69
AG18
VDDCR_70
AH13
VDDCR_71
AH15
VDDCR_72
AH17
VDDCR_73
AH19
VDDCR_74
AJ7
VDDCR_75
AJ10
VDDCR_76
AJ14
VDDCR_77
AJ16
VDDCR_78
AJ18
VDDCR_79
AK13
VDDCR_80
AK15
VDDCR_81
AK17
VDDCR_82
AK19
VDDCR_83
RC750 0_0402_5%RS@
AP2138N-1.5TR G1_SOT23-3
TDC: 15A
+APU_CORE_SOC
SCL/MBDG:
7*22uF (BU)
1*1uF (BU)
1 1
+APU_CORE_SOC Cap
place at Power Side
1*180pF (BU)
+1.2V_VDDQ
SCL/MBDG:
7*22uF (BU)
2*1uF (BU)
4*0.22uF
1*180pF (BU)
2*180pF
+1.2V_VDDQ +1.2V_VDDQ
CC57 22U_0603_6.3V6M
CC58 22U_0603_6.3V6M
CC56 22U_0603_6.3V6M
2 2
CC60 22U_0603_6.3V6M
CC59 22U_0603_6.3V6M
1
1
1
2
1
1
2
2
2
2
CC64 22U_0603_6.3V6M
CC63 22U_0603_6.3V6M
CC62 22U_0603_6.3V6M
CC61 22U_0603_6.3V6M
1
1
1
1
2
2
2
2
All BU(on bottom side under SOC)
No support wake on voice
+1.8VALW
RC766
0_0402_5%
1 2
+1.8VS
RC767
0_0402_5%
1 2
0910
+VDDIO_AUDIO
CC54 22U_0603_6.3V6M
CC55 1U_0201_6.3V6M
1
@
1
2
2
CC67 180P_0402_50V8J
CC66 1U_0201_6.3V6M
CC65 1U_0201_6.3V6M
1
1
1
2
2
2
+3VS +3VS_APU
1 2
CC71 0.22U_0402_16V7K
CC70 0.22U_0402_16V7K
CC69 0.22U_0402_16V7K
CC68 0.22U_0402_16V7K
1
2
CC72 180P_0402_50V8J
CC73 180P_0402_50V8J
1
1
1
2
1
1
2
2
2
2
ACROSS VDDIO AND VSS SPLIT
RC160
0_0402_5%
CC53 1U_0201_6.3V6M
CC51 22U_0603_6.3V6M
CC52 1U_0201_6.3V6M
1
1
1
2
2
2
FH51S
SM01000J X00
3000ma 33ohm@100mhz DCR 0.04
+1.2V_VDDQ
+1.8VS
SM01000JX00
TAI-TECH HCB160 8KF-330T30
TAI-TECH HCB160 8KF-330T30
LC1
LC3
SM01000JX00
@
12
12
+APU_VPH
CC688 0.22U_0402_16V7K
1
2
+VDDIO_AUDIO
+3VS_APU
+1.8VALW_APU
SCL/MBDG:
1*22uF (BO)
1*1uF (BU)
3 3
SCL/MBDG:
1*22uF (BO)
2*1uF (BO+BU)
BO BU BUB O BO
+1.8VALW +1.8VALW_APU +3VALW+1.8VS
CC75 1U_0201_6.3V6M
CC76 1U_0201_6.3V6M
CC74 22U_0603_6.3V6M
1
1
1
2
2
2
BO B UBO
SCL/MBDG:
1*22uF (BO)
2*1uF (BO+BU)
+0.75VS +0.75VALW
CC85 1U_0201_6.3V6M
CC83 22U_0603_6.3V6M
4 4
CC86 1U_0201_6.3V6M
CC84 22U_0603_6.3V6M
1
1
2
1
1
2
2
2
CC90 1U_0201_6.3V6M
CC87 1U_0201_6.3V6M
CC89 1U_0201_6.3V6M
CC88 1U_0201_6.3V6M
CC91 1U_0201_6.3V6M
1
1
1
1
1
2
2
2
2
2
SCL/MBDG:
1*22uF (BO)
2*1uF (BO+BU)
+3VALW_APU
RC755
0_0603_5%
1 2
CC77 22U_0603_6.3V6M
CC78 1U_0201_6.3V6M
CC79 1U_0201_6.3V6M
1
1
1
2
2
2
BO B UBO
SCL/MBDG:
2*22uF (BO)
8*1uF (BOx4+BUx4)
CC92 1U_0201_6.3V6M
1
2
1*180pF (BU)
CC93 180P_0402_50V8J
1
2
RC756
0_0402_5%
1 2
SCL/MBDG:
1*22uF (BO)
2*1uF (BO+BU)
CC94 22U_0603_6.3V6M
CC95 1U_0201_6.3V6M
1
2
CC81 1U_0201_6.3V6M
CC80 22U_0603_6.3V6M
CC82 1U_0201_6.3V6M
1
1
1
2
2
2
BO BUBO
SCL/MBDG:
1*22uF (BO)
3*1uF (BOx1+BUx2)
CC96 1U_0201_6.3V6M
CC97 1U_0201_6.3V6M
1
1
1
2
2
2
+3VALW_APU
+0.75VALW
+RTC_APU_R
EDC: 20A
TDC: 6A
TDC: 1A
+APU_VPH
TDC: 0.2A
TDC: 0.25A
TDC: 2.5A
+1.8VS
TDC: 1A
TDC: 0.25A
TDC: 2A
TDC: 2A
+0.75VS
TDC: 4.5uA
RTC OF APU
+RTC_APU_R
SCL/MBDG:
1*1uF
1*0.22uF
close to UC1
CC166
0.22U_0402 _16V7K
W=20 mils
1
1U_0201_6 .3V6M
2
CC50
1 2
Vo=1.5 V
UC8
3
Vout
2
GND
SA000066U00
680P_0402_ 50V7K
@
Vin
TDC: 51A
EDC: 90A
1
CC120
SCL/MBDG:
16*22uF (BU)
1*180pF (BU)
+RTCVCC
1
2
+APU_CORE
+APU_CORE Cap place at Power Side
Stitching Cap.
+APU_CORE
1
1
1
2
2
2
CC201
CC202
0.01U_0402_16V7K
0.01U_0402_16V7K
+RTCBATT
+CHGRTC
+RTCBATT_ R
DC1
3
1
2
ROW BAV70W 3 P CC SOT-323
SC600000B00
CC200
RC741
1K_0402_5%
1 2
0.01U_0402_16V7K
+RTCBATT
CONN@
JRTC1
1
1
2
2
3
GND
4
GND
ACES_50271-00 20N-001
SP02000RO00
Footprint from Sleepy/Grumpy
BOx 4
BUx 4 B O BU
A
Need OPEN
BUBO
BO
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
for Clear CMOS
Compal Secret Data
Compal Secret Data
2019/08/26 2020/08/26
2019/08/26 2020/08/26
2019/08/26 2020/08/26
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet o f
Date : Sheet o f
D
Date : Sheet o f
Compal Electronics, Inc.
FP6_(6/7)_PWR
FP6_(6/7)_PWR
FP6_(6/7)_PWR
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
11 1 16Wednesday, April 08, 2020
11 1 16Wednesday, April 08, 2020
E
11 1 16Wednesday, April 08, 2020
1.0
5
Vinafix.com
Vinafix.com
4
3
2
1
Main Func = CPU
UC1G
@
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
FP6 REV 0.92
PART 7 OF 13
FP6_BGA1140
GND
K28
VSS
K32
VSS
L5
VSS
L13
VSS
L15
VSS
L18
VSS
L20
VSS
L25
VSS
L28
VSS
M1
VSS
M3
VSS
M5
VSS
M21
VSS
M23
VSS
M26
VSS
M28
VSS
M32
VSS
N5
VSS
N8
VSS
N11
VSS
N13
VSS
N15
VSS
N17
VSS
N22
VSS
N25
VSS
N28
VSS
P1
VSS
P5
VSS
P14
VSS
P16
VSS
P18
VSS
P20
VSS
P23
VSS
P26
VSS
P28
VSS
P32
VSS
R5
VSS
R11
VSS
R13
VSS
R15
VSS
R17
VSS
R19
VSS
R22
VSS
R25
VSS
R28
VSS
T1
VSS
T3
VSS
T5
VSS
T14
VSS
T16
VSS
T18
VSS
T20
VSS
T23
VSS
T26
VSS
T28
VSS
T32
VSS
U13
VSS
U15
VSS
U17
VSS
U19
VSS
V2
VSS
V4
VSS
AM20
A3
A5
A7
A10
A12
A14
A16
C10
C32
G16
G26
G28
G32
H13
H18
H20
H22
H25
H28
A19
A21
A23
A26
A30
E10
E11
E12
E13
E14
E15
E16
E18
E19
E20
E21
E22
E23
E25
E26
E27
F19
F21
F23
F28
K16
K21
K26
C3
E7
E8
F5
G1
G3
G5
H5
J19
K1
K3
K5
D D
C C
B B
V11
V14
V16
V18
V20
V22
V25
V28
W13
W15
W17
W19
W23
W26
W28
W32
Y11
Y14
Y16
Y18
Y20
Y22
Y25
Y28
AA5
AA13
AA15
AA17
AA19
AA23
AA26
AA28
AA32
AB2
AB4
AB14
AB16
AB18
AB20
AC5
AC8
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AD1
AD5
AD14
AD16
AD18
AD20
AE5
AE11
V5
V8
W5
Y1
Y3
Y5
UC1H
@
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
FP6 REV 0.92
PART 8 OF 13
FP6_BGA1140
UC1K
GND
AE13
VSS
AE15
VSS
AE17
VSS
AE19
VSS
AF1
VSS
AF3
VSS
AF5
VSS
AF14
VSS
AF16
VSS
AF18
VSS
AF20
VSS
AG5
VSS
AG8
VSS
AG11
VSS
AG13
VSS
AG15
VSS
AG17
VSS
AG19
VSS
AH14
VSS
AH16
VSS
AH18
VSS
AH20
VSS
AJ1
VSS
AJ3
VSS
AJ5
VSS
AJ13
VSS
AJ15
VSS
AJ17
VSS
AJ19
VSS
AK5
VSS
AK8
VSS
AK11
VSS
AK14
VSS
AK16
VSS
AK18
VSS
AK20
VSS
AL1
VSS
AL5
VSS
AL7
VSS
AL10
VSS
AL16
VSS
AM5
VSS
AM8
VSS
AM11
VSS
AM15
VSS
AN1
VSS
AN5
VSS
AN7
VSS
AN10
VSS
AN23
VSS
AN26
VSS
AP5
VSS
AP8
VSS
AP13
VSS
AP15
VSS
AP18
VSS
AP20
VSS
AP25
VSS
AR1
VSS
AR5
VSS
AR7
VSS
AR12
VSS
AR14
AR16
AR19
AR21
AR26
AR28
AT23
AU5
AU8
AU11
AU13
AU15
AU18
AU20
AU22
AU25
AU28
AV1
AV5
AV7
AV10
AV12
AV14
AV16
AV19
AV21
AV23
AV26
AV28
AV32
AW5
AW28
AY6
AY7
AY8
AY10
AY11
AY12
AY13
AY14
AY15
AY16
AY18
AY19
AY20
AY21
AY22
AY23
AY25
AY26
AY27
BB1
BB32
BD3
BD7
BD10
BD12
BD14
BD16
@
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
FP6 REV 0.92
PART 11 OF 13
FP6_BGA1140
GND/RSVD
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
RSVD_46
RSVD_47
RSVD_45
RSVD_44
RSVD_43
RSVD_42
RSVD_41
RSVD_40
RSVD_39
RSVD_38
RSVD_37
RSVD_36
RSVD_35
RSVD_34
RSVD_33
RSVD_32
RSVD_31
RSVD_30
RSVD_29
RSVD_28
RSVD_27
RSVD_26
RSVD_25
RSVD_24
RSVD_23
RSVD_22
RSVD_21
RSVD_20
RSVD_19
RSVD_18
RSVD_17
RSVD_16
RSVD_15
RSVD_14
RSVD_13
RSVD_12
RSVD_11
RSVD_10
RSVD_9
RSVD_8
RSVD_7
RSVD_6
RSVD_5
RSVD_4
RSVD_3
RSVD_2
RSVD_1
BD19
BD21
BD23
BD26
BD30
AV8
BD18
AV3
AU6
AR6
AR3
AP1
AN16
AN4
AN2
AM14
AM13
AL29
AL15
AL14
AL13
AK3
AJ29
AJ27
AF6
AE12
AD6
AD3
AC30
AC12
AB31
AA20
AA6
Y12
W6
V12
R12
N19
N12
N10
N9
M13
M12
M11
M6
L12
K19
F16
F14
F12
F10
C26
@
UC1M
D21
CAM0_CSI2_CLOCKP
A20
CAM0_CSI2_CLOCKN
D18
CAM0_CSI2_DATAP0
B18
CAM0_CSI2_DATAN0
C19
CAM0_CSI2_DATAP1
D20
CAM0_CSI2_DATAN1
C21
CAM0_CSI2_DATAP2
B21
CAM0_CSI2_DATAN2
C20
CAM0_CSI2_DATAP3
B20
CAM0_CSI2_DATAN3
C15
CAM1_CSI2_CLOCKP
A15
CAM1_CSI2_CLOCKN
D16
CAM1_CSI2_DATAP0
B16
A A
D15
B15
CAM1_CSI2_DATAN0
CAM1_CSI2_DATAP1
CAM1_CSI2_DATAN1
FP6_BGA1140
5
CAMERAS
FP6 REV 0.92
PART 13 OF 13
CAM0_CLK
CAM0_I2C_SCL
CAM0_I2C_SDA
CAM0_SHUTDOWN
CAM1_CLK
CAM1_I2C_SCL
CAM1_I2C_SDA
CAM1_SHUTDOWN
CAM_PRIV_LED
CAM_IR_ILLU
A18
C18
B17
D17
A13
B13
D13
C14
C16
C13
R10
T12
P12
P11
T11
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
UC1L
N7
AGPIO256/WIFIBT_BT_DATA
R7
AGPIO257/WIFIBT_BT_VALID
N6
AGPIO258/WIFIBT_BT_SYNC
T6
AGPIO259/WIFIBT_BT_CLK
AGPIO260/WIFIBT_QSPI_DATA0
AGPIO261/WIFIBT_QSPI_DATA1
AGPIO262/WIFIBT_QSPI_DATA2
AGPIO263/WIFIBT_QSPI_DATA3
AGPIO264/WIFIBT_QSPI_CLK
P6
AGPIO265/WIFIBT_QSPI_SS
FP6_BGA1140
@
WiFi
FP6 REV 0.92
PART 12 OF 13
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
EGPIO267/RFIC_SPI_CLK
EGPIO268/RFIC_SPI_SS
AGPIO269/RFIC_SPI_DATA
AGPIO270/WIFIBT_RFIC_WAKEUP
EGPIO271/WIFIBT_BUCKEN
EGPIO266/WIFIBT_FLOW
P8
R9
R6
P9
T9
T8
V7
WIFIBT_DATA_RXP
V6
WIFIBT_DATA_RXN
V9
WIFIBT_DATA_TXP
V10
WIFIBT_DATA_TXN
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
FP6_(7/7)_GND/RSVD/CSI
FP6_(7/7)_GND/RSVD/CSI
FP6_(7/7)_GND/RSVD/CSI
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet o f
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
12 116Wednesday, April 08, 2020
12 116Wednesday, April 08, 2020
12 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
13 116Wednesday, April 08, 2020
13 116Wednesday, April 08, 2020
13 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
14 116Wednesday, April 08, 2020
14 116Wednesday, April 08, 2020
14 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
15 116Wednesday, April 08, 2020
15 116Wednesday, April 08, 2020
15 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
16 116Wednesday, April 08, 2020
16 116Wednesday, April 08, 2020
16 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
17 116Wednesday, April 08, 2020
17 116Wednesday, April 08, 2020
17 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
18 116Wednesday, April 08, 2020
18 116Wednesday, April 08, 2020
18 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
19 116Wednesday, April 08, 2020
19 116Wednesday, April 08, 2020
19 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
20 116Wednesday, April 08, 2020
20 116Wednesday, April 08, 2020
20 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
21 116Wednesday, April 08, 2020
21 116Wednesday, April 08, 2020
21 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
22 116Wednesday, April 08, 2020
22 116Wednesday, April 08, 2020
22 116Wednesday, April 08, 2020
1
A
Vinafix.com
Vinafix.com
B
C
D
E
Reverse Type
8/29
DDR_A_CLK0<7>
DDR_A_CLK0#<7>
DDR_A_CLK1<7>
Address : A0
1 1
+3VS
12
12
RD5
0_0402_5%
@
12
RS@
0_0402_5%
Layout Note:
Place near JDIMM1
2 2
+1.2V_VDDQ
1U_0201_6.3V6M
1
2
+1.2V_VDDQ
10U_0402_6.3V6M
1
2
3 3
+1.2V_VDDQ
0.1U_0201_10V6K
2
1
Layout Note:
Place near JDIMM1.257,259
4 4
10U_0402_6.3V6M
1
2
12
RD6
0_0402_5%
RD7
0_0402_5%
@
@
DDR_A_SA2
DDR_A_SA1
DDR_A_SA0
12
12
RS@
RS@
RD8
RD9
RD10
0_0402_5%
0_0402_5%
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2
1U_0201_6.3V6M
CD2
1
2
1U_0201_6.3V6M
1U_0201_6.3V6M
CD3
CD4
1
1
2
2
1U_0201_6.3V6M
1U_0201_6.3V6M
CD5
CD6
1
1
2
2
FH51S downsize by sourcer demand
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CD10
CD11
1
2
0.1U_0201_10V6K
CD61
CD62
2
1
CRB use 0.1uF x2,180pF x1
10U_0402_6.3V6M
CD23
CD24
1
2
CD12
1
1
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
CD63
2
2
1
1
+2.5V
1U_0201_6.3V6M
CD25
1
2
10U_0402_6.3V6M
CD13
CD14
1
1
2
2
CD64
2
1
1U_0201_6.3V6M
CD98
1
2
@
CD1
.1U_0402_1 6V7K
DDR4 support Even Parity check in DRAMs.
CD7
Follow MA51
10U_0402_6.3V6M
10U_0402_6.3V6M
1
@
@
+
1
2
+3VS
CD17
2
1U_0201_6.3V6M
CD26
1
2
CRB use 1uF x1
CD18
330U_D2_2 V_Y
SGA00009S00
330U 2V H1.9
9mohm POLY
CD15
CD16
1
2
180P_0402_50V8J
CD65
Layout Note:
Place near JDIMM1.255
@EMC@
12
DDR_A_RST#
DDR_A_CLK1#<7>
DDR_A_CKE0<7>
DDR_A_CKE1<7>
DDR_A_CS0#<7>
DDR_A_CS1#<7>
DDR_A_ODT0<7 >
DDR_A_ODT1<7 >
DDR_A_BG0<7>
DDR_A_BG1<7>
DDR_A_BA0<7>
DDR_A_BA1<7>
DDR_A_MA[13..0]<7>
DDR_A_MA14_W E#<7>
DDR_A_MA15_CAS#<7>
DDR_A_MA16_RAS#<7>
DDR_A_ACT#<7>
DDR_A_PAR<7>
DDR_A_ALERT#< 7>
DDR_A_EVENT#<7>
DDR_A_RST#<7>
SMB_0_SDA<9,24>
SMB_0_SCL<9,24>
DDR_A_DM[7..0]<7>
DDR_A_CLK0
DDR_A_CLK0#
DDR_A_CLK1
DDR_A_CLK1#
DDR_A_CKE0
DDR_A_CKE1
DDR_A_CS0#
DDR_A_CS1#
DDR_A_ODT0
DDR_A_ODT1
DDR_A_BG0
DDR_A_BG1
DDR_A_BA0
DDR_A_BA1
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14_W E#
DDR_A_MA15_CAS#
DDR_A_MA16_RAS#
DDR_A_ACT#
DDR_A_PAR
DDR_A_ALERT#
DDR_A_EVENT#
DDR_A_RST#
SMB_0_SDA
SMB_0_SCL
DDR_A_SA2
DDR_A_SA1
DDR_A_SA0
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
FH51S downsize by sourcer demand
A
B
JDIMM1A
REVERSE
137
CK0(T)
139
CK0#(C)
138
CK1(T)
140
CK1#(C)
109
CKE0
110
CKE1
149
S0#
157
S1#
162
S2#/C0
165
S3#/C1
155
ODT0
161
ODT1
115
BG0
113
BG1
150
BA0
145
BA1
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10_AP
120
A11
119
A12
158
A13
151
A14_WE#
156
A15_CAS#
152
A16_RAS#
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
254
SDA
253
SCL
166
SA2
260
SA1
256
SA0
92
CB0_NC
91
CB1_NC
101
CB2_NC
105
CB3_NC
88
CB4_NC
87
CB5_NC
100
CB6_NC
104
CB7_NC
97
DQS8(T)
95
DQS8#(C)
12
DM0#/DBI0#
33
DM1#/DBI1#
54
DM2#/DBI2#
75
DM3#/DBI3#
178
DM4#/DBI4#
199
DM5#/DBI5#
220
DM6#/DBI6#
241
DM7#/DBI7#
96
DM8#/DBI8#
DEREN_40-4 2271-26001RHF
CONN@
SP07001CW00
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS0(T)
DQS0#(C)
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQS1(T)
DQS1#(C)
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQS2(T)
DQS2#(C)
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS3(T)
DQS3#(C)
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQS4(T)
DQS4#(C)
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQS5(T)
DQS5#(C)
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQS6(T)
DQS6#(C)
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS7(T)
DQS7#(C)
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
7
20
21
4
3
16
17
13
11
28
29
41
42
24
25
38
37
34
32
50
49
62
63
46
45
58
59
55
53
70
71
83
84
66
67
79
80
76
74
174
173
187
186
170
169
183
182
179
177
195
194
207
208
191
190
203
204
200
198
216
215
228
229
211
212
224
225
221
219
237
236
249
250
232
233
245
246
242
240
Issued Date
Issued Date
Issued Date
DDR_A_DQ1
DDR_A_DQ2
DDR_A_DQ3
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
DDR_A_DQ7
DDR_A_DQS0
DDR_A_DQS0#
DDR_A_DQ8
DDR_A_DQ9
DDR_A_DQ10
DDR_A_DQ11
DDR_A_DQ12
DDR_A_DQ13
DDR_A_DQ14
DDR_A_DQ15
DDR_A_DQS1
DDR_A_DQS1#
DDR_A_DQ16
DDR_A_DQ17
DDR_A_DQ18
DDR_A_DQ19
DDR_A_DQ20
DDR_A_DQ21
DDR_A_DQ22
DDR_A_DQ23
DDR_A_DQS2
DDR_A_DQS2#
DDR_A_DQ24
DDR_A_DQ25
DDR_A_DQ26
DDR_A_DQ27
DDR_A_DQ28
DDR_A_DQ29
DDR_A_DQ30
DDR_A_DQ31
DDR_A_DQS3
DDR_A_DQS3#
DDR_A_DQ32
DDR_A_DQ33
DDR_A_DQ34
DDR_A_DQ35
DDR_A_DQ36
DDR_A_DQ37
DDR_A_DQ38
DDR_A_DQ39
DDR_A_DQS4
DDR_A_DQS4#
DDR_A_DQ40
DDR_A_DQ41
DDR_A_DQ42
DDR_A_DQ43
DDR_A_DQ44
DDR_A_DQ45
DDR_A_DQ46
DDR_A_DQ47
DDR_A_DQS5
DDR_A_DQS5#
DDR_A_DQ48
DDR_A_DQ49
DDR_A_DQ50
DDR_A_DQ51
DDR_A_DQ52
DDR_A_DQ53
DDR_A_DQ54
DDR_A_DQ55
DDR_A_DQS6
DDR_A_DQS6#
DDR_A_DQ56
DDR_A_DQ57
DDR_A_DQ58
DDR_A_DQ59
DDR_A_DQ60
DDR_A_DQ61
DDR_A_DQ62
DDR_A_DQ63
DDR_A_DQS7
DDR_A_DQS7#
DDR_A_DQ0
8
DDR_A_DQ[7..0] < 7>
Follow CRB design
RD3
1K_0402_1%
RD4
1K_0402_1%
+1.2V_VDDQ
1 2
1 2
15mil
CD22 0.1U_0201_10V6K
CD20 4.7U_0402_6.3V6M
1
2
DDR_A_DQS0 <7>
DDR_A_DQS0# <7>
DDR_A_DQ[15..8] <7>
DDR_A_DQS1 <7>
DDR_A_DQS1# <7>
DDR_A_DQ[23..16 ] <7>
DDR_A_DQS2 <7>
DDR_A_DQS2# <7>
DDR_A_DQ[31..24 ] <7>
FH51S
PC sample = 1.5K
others = 1k ohm
Place near to SO-DIMM connector.
DDR_A_DQS3 <7>
DDR_A_DQS3# <7>
DDR_A_DQ[39..32 ] <7>
DDR_A_DQS4 <7>
DDR_A_DQS4# <7>
DDR_A_DQ[47..40 ] <7>
DDR_A_DQS5 <7>
DDR_A_DQS5# <7>
DDR_A_DQ[55..48 ] <7>
DDR_A_DQS6 <7>
DDR_A_DQS6# <7>
DDR_A_DQ[63..56 ] <7>
DDR_A_DQS7 <7>
DDR_A_DQS7# <7>
Compal Secret Data
Compal Secret Data
2019/04/30 2020/04/30
2019/04/30 2020/04/30
2019/04/30 2020/04/30
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
+3VS
+VREFA_CA
CD21 0.1U_0201_10V6K
CD19 1000P_0402_50V7K
2
2
1
1
1
2
DVT
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
2-3A to 1 DIMMs/channel
+1.2V_VDDQ +1.2V_VDD Q
JDIMM1B
REVERSE
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
255
VDDSPD
164
VREFCA
1
VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
VSS
262
GND
Layout Note:
Place near JDIMM1.258
CRB use 4.7uF x1,0.1uF x1
10U_0402_6.3V6M
10U_0402_6.3V6M
CD108
CD27
1
1
@
2
1
2
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDR4_DIMMA
DDR4_DIMMA
DDR4_DIMMA
LA-K181P
LA-K181P
LA-K181P
10U_0402_6.3V6M
CD28
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VTT
VPP1
VPP2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
+0.6VS_VTT
1U_0201_6.3V6M
1
2
E
141
142
147
148
153
154
159
160
163
258
257
259
99
102
103
106
107
167
168
171
172
175
176
180
181
184
185
188
189
192
193
196
197
201
202
205
206
209
210
213
214
217
218
222
223
226
227
230
231
234
235
238
239
243
244
247
248
251
252
261
1U_0201_6.3V6M
CD30
CD29
1
2
23 1 16Wednesday, April 08, 2020
23 1 16Wednesday, April 08, 2020
23 1 16Wednesday, April 08, 2020
+0.6VS_VTT
CRB use 1uF x1
CD31 1U_0201_6.3V6M
+2.5V
1
2
1.0
1.0
1.0
A
Vinafix.com
Vinafix.com
B
C
D
E
Standard Type
2-3A to 1 DIMMs/channel
DDR_B_CLK 0<7>
DDR_B_CLK 0#<7>
DDR_B_CLK 1<7>
Address : A2
1 1
+3VS
RD244
12
RD247
0_0402_5%
@
12
RS@
RS@
RD252
0_0402_5%
Layout Note:
Place near JDIMM2
2 2
+1.2V_VDDQ
1U_0201_6.3V6M
CD86
1
2
+1.2V_VDDQ
10U_0402_6.3V6M
CD82
1
2
3 3
+1.2V_VDDQ
0.1U_0201_10V6K
CD91
2
1
Layout Note:
Place near JDIMM2.257,259
4 4
10U_0402_6.3V6M
CD79
1
2
10K_0402_5%
12
12
RD248
0_0402_5%
@
DDR_B_SA2
DDR_B_SA1
12
1
2
DDR_B_SA0
12
RD249
0_0402_5%
RD246
0_0402_5%
@
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2
1U_0201_6.3V6M
1U_0201_6.3V6M
CD67
1
2
1U_0201_6.3V6M
1U_0201_6.3V6M
CD78
1
2
1U_0201_6.3V6M
CD71
CD93
CD81
1
1
2
2
FH51S downsize by sourcer demand
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CD90
CD96
1
1
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
CD94
CD97
2
2
1
1
CRB use 0.1uF x2,180pF x1
+2.5V
10U_0402_6.3V6M
1U_0201_6.3V6M
CD83
1
1
2
2
CD77
1
1
2
2
0.1U_0201_10V6K
CD66
2
1
1U_0201_6.3V6M
CD105
CD75
1
2
@
10U_0402_6.3V6M
CD68
CD88
1
1
2
2
180P_0402_50V8J
CD85
2
1
Layout Note:
Place near JDIMM2.255
CD103
10U_0402_6.3V6M
CD104
1
2
@
+3VS
1
2
CD73
@EMC@
.1U_0402_1 6V7K
12
CRB use 1uF x1
1U_0201_6.3V6M
CD95
DDR_B_RST #
DDR_B_CLK 1#<7>
DDR_B_CKE0<7>
DDR_B_CKE1<7>
DDR_B_CS0 #<7>
DDR_B_CS1 #<7>
DDR_B_ODT 0<7>
DDR_B_ODT 1<7>
DDR_B_BG0<7>
DDR_B_BG1<7>
DDR_B_BA0<7>
DDR_B_BA1<7>
DDR_B_MA[13..0]<7>
DDR_B_MA14_ WE#<7>
DDR_B_MA15_ CAS#<7 >
DDR_B_MA16_ RAS#<7 >
DDR_B_ACT#<7>
DDR_B_PAR<7>
DDR_B_ALERT #<7>
DDR_B_EVENT #<7>
DDR_B_RST #<7>
SMB_0_SDA<9,23>
SMB_0_SCL<9,23>
DDR_B_DM[7 ..0]< 7>
DDR_B_CLK 0
DDR_B_CLK 0#
DDR_B_CLK 1
DDR_B_CLK 1#
DDR_B_CKE0
DDR_B_CKE1
DDR_B_CS0 #
DDR_B_CS1 #
DDR_B_ODT 0
DDR_B_ODT 1
DDR_B_BG0
DDR_B_BG1
DDR_B_BA0
DDR_B_BA1
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14_ WE#
DDR_B_MA15_ CAS#
DDR_B_MA16_ RAS#
DDR_B_ACT#
DDR_B_PAR
DDR_B_ALERT #
DDR_B_EVENT #
DDR_B_RST #
SMB_0_SDA
SMB_0_SCL
DDR_B_SA2
DDR_B_SA1
DDR_B_SA0
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
FH51S downsize by sourcer demand
A
B
JDIMM2A
STD
137
CK0(T)
139
CK0#(C)
138
CK1(T)
140
CK1#(C)
109
CKE0
110
CKE1
149
S0#
157
S1#
162
S2#/C0
165
S3#/C1
155
ODT0
161
ODT1
115
BG0
113
BG1
150
BA0
145
BA1
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10_AP
120
A11
119
A12
158
A13
151
A14_WE#
156
A15_CAS#
152
A16_RAS#
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
254
SDA
253
SCL
166
SA2
260
SA1
256
SA0
92
CB0_NC
91
CB1_NC
101
CB2_NC
105
CB3_NC
88
CB4_NC
87
CB5_NC
100
CB6_NC
104
CB7_NC
97
DQS8(T)
95
DQS8#(C)
12
DM0#/DBI0#
33
DM1#/DBI1#
54
DM2#/DBI2#
75
DM3#/DBI3#
178
DM4#/DBI4#
199
DM5#/DBI5#
220
DM6#/DBI6#
241
DM7#/DBI7#
96
DM8#/DBI8#
FOX_AS0A821-H4SB-7H
CONN@
SP07001HW00
Symbol follow EH5AW (Lada)
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS0(T)
DQS0#(C)
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQS1(T)
DQS1#(C)
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQS2(T)
DQS2#(C)
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS3(T)
DQS3#(C)
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQS4(T)
DQS4#(C)
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQS5(T)
DQS5#(C)
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQS6(T)
DQS6#(C)
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS7(T)
DQS7#(C)
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
7
20
21
4
3
16
17
13
11
28
29
41
42
24
25
38
37
34
32
50
49
62
63
46
45
58
59
55
53
70
71
83
84
66
67
79
80
76
74
174
173
187
186
170
169
183
182
179
177
195
194
207
208
191
190
203
204
200
198
216
215
228
229
211
212
224
225
221
219
237
236
249
250
232
233
245
246
242
240
Issued Date
Issued Date
Issued Date
DDR_B_DQ1
DDR_B_DQ2
DDR_B_DQ3
DDR_B_DQ4
DDR_B_DQ5
DDR_B_DQ6
DDR_B_DQ7
DDR_B_DQS0
DDR_B_DQS0 #
DDR_B_DQ8
DDR_B_DQ9
DDR_B_DQ10
DDR_B_DQ11
DDR_B_DQ12
DDR_B_DQ13
DDR_B_DQ14
DDR_B_DQ15
DDR_B_DQS1
DDR_B_DQS1 #
DDR_B_DQ16
DDR_B_DQ17
DDR_B_DQ18
DDR_B_DQ19
DDR_B_DQ20
DDR_B_DQ21
DDR_B_DQ22
DDR_B_DQ23
DDR_B_DQS2
DDR_B_DQS2 #
DDR_B_DQ24
DDR_B_DQ25
DDR_B_DQ26
DDR_B_DQ27
DDR_B_DQ28
DDR_B_DQ29
DDR_B_DQ30
DDR_B_DQ31
DDR_B_DQS3
DDR_B_DQS3 #
DDR_B_DQ32
DDR_B_DQ33
DDR_B_DQ34
DDR_B_DQ35
DDR_B_DQ36
DDR_B_DQ37
DDR_B_DQ38
DDR_B_DQ39
DDR_B_DQS4
DDR_B_DQS4 #
DDR_B_DQ40
DDR_B_DQ41
DDR_B_DQ42
DDR_B_DQ43
DDR_B_DQ44
DDR_B_DQ45
DDR_B_DQ46
DDR_B_DQ47
DDR_B_DQS5
DDR_B_DQS5 #
DDR_B_DQ48
DDR_B_DQ49
DDR_B_DQ50
DDR_B_DQ51
DDR_B_DQ52
DDR_B_DQ53
DDR_B_DQ54
DDR_B_DQ55
DDR_B_DQS6
DDR_B_DQS6 #
DDR_B_DQ56
DDR_B_DQ57
DDR_B_DQ58
DDR_B_DQ59
DDR_B_DQ60
DDR_B_DQ61
DDR_B_DQ62
DDR_B_DQ63
DDR_B_DQS7
DDR_B_DQS7 #
DDR_B_DQ0
8
DDR_B_DQ[7..0] < 7>
Follow CRB design
RD243
1K_0402_1%
RD253
1K_0402_1%
+1.2V_VDDQ
1 2
1 2
15mil
CD76 0.1U_0201_10V6K
CD84 4.7U_0402_6.3V6M
1
2
DDR_B_DQS0 <7>
DDR_B_DQS0 # <7>
DDR_B_DQ[15 ..8] <7>
DDR_B_DQS1 <7>
DDR_B_DQS1 # <7>
DDR_B_DQ[23 ..16] <7>
DDR_B_DQS2 <7>
DDR_B_DQS2 # <7>
DDR_B_DQ[31 ..24] <7>
FH51S
PC sample = 1.5K
others = 1k ohm
Place near to SO-DIMM connector.
DDR_B_DQS3 <7>
DDR_B_DQS3 # <7>
DDR_B_DQ[39 ..32] <7>
DDR_B_DQS4 <7>
DDR_B_DQS4 # <7>
DDR_B_DQ[47 ..40] <7>
DDR_B_DQS5 <7>
DDR_B_DQS5 # <7>
DDR_B_DQ[55 ..48] <7>
DDR_B_DQS6 <7>
DDR_B_DQS6 # <7>
DDR_B_DQ[63 ..56] <7>
DDR_B_DQS7 <7>
DDR_B_DQS7 # <7>
Compal Secret Data
Compal Secret Data
2019/04/30 2020/04/30
2019/04/30 2020/04/30
2019/04/30 2020/04/30
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
+1.2V_VDDQ +1.2V_VDD Q
JDIMM2B
STD
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
+3VS
+VREFB_CA
CD80 0.1U_0201_10V6K
CD87 1000P_0402_50V7K
2
2
1
1
1
2
@
DVT
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
VDD8
135
VDD9
136
VDD10
255
VDDSPD
164
VREFCA
1
VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
VSS
262
GND
Layout Note:
Place near JDIMM2.258
CRB use 4.7uF x1,0.1uF x1
10U_0402_6.3V6M
10U_0402_6.3V6M
CD70
CD109
1
1
2
1
2
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDR4_DIMMB
DDR4_DIMMB
DDR4_DIMMB
LA-K181P
LA-K181P
LA-K181P
10U_0402_6.3V6M
CD74
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VTT
VPP1
VPP2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
+0.6VS_VTT
1U_0201_6.3V6M
1
2
E
141
142
147
148
153
154
159
160
+0.6VS_VTT
163
258
257
259
99
102
103
106
107
167
168
171
172
175
176
180
181
184
185
188
189
192
193
196
197
201
202
205
206
209
210
213
214
217
218
222
223
226
227
230
231
234
235
238
239
243
244
247
248
251
252
261
CD92
1
2
1U_0201_6.3V6M
CD72
24 1 16Wednesday, April 08, 2020
24 1 16Wednesday, April 08, 2020
24 1 16Wednesday, April 08, 2020
+2.5V
CD89 1U_0201_6.3V6M
1
2
CRB use 1uF x1
1.0
1.0
1.0
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
25 116Wednesday, April 08, 2020
25 116Wednesday, April 08, 2020
25 116Wednesday, April 08, 2020
1
5
Vinafix.com
Vinafix.com
D D
C C
4
3
2
1
Reserve
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
2019/08/ 26 2020/08/ 26
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet
Date : Sheet o f
2
Date : Sheet o f
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
1.0
o f
26 116Wednesday, April 08, 2020
26 116Wednesday, April 08, 2020
26 116Wednesday, April 08, 2020
1
A
Vinafix.com
Vinafix.com
PEG_ATX_C_GRX_P0<6>
PEG_ATX_C_GRX_N0<6>
PEG_ATX_C_GRX_P1<6>
PEG_ATX_C_GRX_N1<6>
PEG_ATX_C_GRX_P2<6>
PEG_ATX_C_GRX_N2<6>
PEG_ATX_C_GRX_P3<6>
PEG_ATX_C_GRX_N3<6>
PEG_ATX_C_GRX_P4<6>
PEG_ATX_C_GRX_N4<6>
PEG_ATX_C_GRX_P5<6>
PEG_ATX_C_GRX_N5<6>
1 1
PEG_ATX_C_GRX_P6<6>
PEG_ATX_C_GRX_N6<6>
PEG_ATX_C_GRX_P7<6>
PEG_ATX_C_GRX_N7<6>
PEG_ATX_C_GRX_P0
PEG_ATX_C_GRX_N0
PEG_ATX_C_GRX_P1
PEG_ATX_C_GRX_N1
PEG_ATX_C_GRX_P2
PEG_ATX_C_GRX_N2
PEG_ATX_C_GRX_P3
PEG_ATX_C_GRX_N3
PEG_ATX_C_GRX_P4
PEG_ATX_C_GRX_N4
PEG_ATX_C_GRX_P5
PEG_ATX_C_GRX_N5
PEG_ATX_C_GRX_P6
PEG_ATX_C_GRX_N6
PEG_ATX_C_GRX_P7
PEG_ATX_C_GRX_N7
FH51S Support PEG x8 onl y
PEG_ARX_C_GTX_P0<6>
PEG_ARX_C_GTX_N0<6>
PEG_ARX_C_GTX_P1<6>
PEG_ARX_C_GTX_N1<6>
PEG_ARX_C_GTX_P2<6>
PEG_ARX_C_GTX_N2<6>
PEG_ARX_C_GTX_P3<6>
PEG_ARX_C_GTX_N3<6>
PEG_ARX_C_GTX_P4<6>
PEG_ARX_C_GTX_N4<6>
PEG_ARX_C_GTX_P5<6>
PEG_ARX_C_GTX_N5<6>
PEG_ARX_C_GTX_P6<6>
PEG_ARX_C_GTX_N6<6>
PEG_ARX_C_GTX_P7<6>
PEG_ARX_C_GTX_N7<6>
2 2
PEG_ARX_C_GTX_P0
PEG_ARX_C_GTX_N0
PEG_ARX_C_GTX_P1
PEG_ARX_C_GTX_N1
PEG_ARX_C_GTX_P2
PEG_ARX_C_GTX_N2
PEG_ARX_C_GTX_P3
PEG_ARX_C_GTX_N3
PEG_ARX_C_GTX_P4
PEG_ARX_C_GTX_N4
PEG_ARX_C_GTX_P5
PEG_ARX_C_GTX_N5
PEG_ARX_C_GTX_P6
PEG_ARX_C_GTX_N6
PEG_ARX_C_GTX_P7
PEG_ARX_C_GTX_N7
FH51S Support PEG x8 onl y
No support S0ix
CLK_PCIE_P0<10>
FH51S
CLK_PCIE_N0<10>
+1.8VSDGPU_AON
3 3
+1.8VSDGPU_AON
1 2
RV100 10K_0201_5 %DIS@
@
@
@
CLK_PCIE_P0
CLK_PCIE_N0
VGA_CLKREQ#_R
1 2
RV7 10K_0201_5%DIS@
PLTRST_VGA#_1V8
1 2
RV10 as close as possible to GPU
PLTRST_VGA#_1V8
12
CV2000.1U_0201_10V6K
VGA_OVERT#
12
CV5420.1U_0201_10V6K
1.8VSDGPU_MAIN_EN
12
CV5430.1U_0201_10V6K
RV10
DIS@
2.49K_0402_1%
PEX_TREMP
(PE_GPIO0)
4 4
AN12
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27
AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25
AJ11
AL13
AK13
AK12
AJ26
AK26
AJ12
AP29
(PE_GPIO1)
GC6_FB_EN1V8
DGPU_HOLD_RST#<9>
UV1A
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
PEX_WAKE#
PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N
NC
NC
PEX_RST_N
PEX_TERMP
N18P-G0_FCBGA960~D
@
DGPU_PWR_EN<9>
1 2
RV415 0_0402_5%@
RV414 10K_0201_5%DIS@
1VSDGPU_PG<107>
GC6_FB_EN3V3<9,10>
1.35VSDGPU_PG<106>
VGA_OVERT#<29>
APU_PCIE_RST#<9,5 2,69,72>
Part 1 of 7
GPIO
OVR-M
Thermal Sensor
RESI2C
PCI EXPRESS
GPCPLL_AVDD
XSN_PLLVDD
CLK
XTAL_OUTBUFF
EXT_REFCLK_FL
DIS@
12
1.8VSDGPU_MAIN_EN
GC6_FB_EN1V8_R
12
VGA_OVERT#
1 2
RV291 0_0402_5%RS@
Update PN & Value(latest FW)
ADC_IN_N
SP_PLLVDD
VID_PLLVDD
XTAL_OUT
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
ADC_IN
TS_AVDD
TS_VREF
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CS_SCL
I2CS_SDA
XTAL_IN
CV5410.1U_0201_10V6K
P6
M3
L6
P5
P7
L7
M7
N8
L3
M2
L1
M5
N3
M4
N4
P2
R8
M6
R1
P3
P4
P1
P8
T8
L2
R4
R5
U3
AN9
AM9
AG10
AK9
RES
AL10
RES
AL9
RES
AP8
RES
AP9
R7
R6
R2
R3
T4
T3
H26
AD8
AE8
AD7
H3
H2
J4
H1
+3VS
B
GC6_FB_EN1V8
1.8VSDGPU_MAIN_EN
FRM_LCK#
VRAM_VDD_CTL
VGA_ALERT#
VRAM_VREF_CTL
ACIN_BUF
SYS_PEX_RST_MON#
GPU_DP0_HPD#
GPU_PEX_RST_HOLD#
HDMI_HPD_GPU#
TS_AVDD
RV385 0_0402_5%N18P@
CV377 1U_0201_6.3V6M
unused pin PH 2K to 1V8AON
1 2
RV86 2K_0402_5%DIS@
1 2
RV85 2K_0402_5%DIS@
VGA_I2CC_SCL
VGA_I2CC_SDA
VGA_I2CS_SCL
VGA_I2CS_SDA
Near
H26
XTALIN
XTALOUT
XTAL_OUTBUFF
XTAL_SSIN
UV51
1
VDD
2
1V8_MAIN_EN_GPU
3
DGPU_PWR_EN
4
GC6_FB_EN_GPU
5
PEX_VDD_PG
6
GC6_FB_EN
7
FB_VDD_PG
8
OVERT#_GPU
9
DGPU_HOLD_RST#
10
PLT_RST#
SLG4U43858VTR_STQFN20_3X2
DIS@
SLG4U43589VTR_STQFN20_3X2
SA0000DH100
NVVDD_VID <102>
NVVDD_PSI < 102>
VRAM_VDD_CTL < 106>
12
DV2
DIS@
RB751S40T1G_SOD523-2
20191016
- DP HPD change to GPIO18 for Port E
GPIO22_OC_WARN# <36>
FBVDDQ_PSI <106>
GPIO26_FP_FUSE <37>
ADC_IN_P <36>
ADC_IN_N <36>
N18P@
1U_0201_6.3V6M
1
2
Near
AD7
1 2
1 2
+1.8VSDGPU_AON
+1.8VSDGPU_AON
+GPU_PLLVDD
1U_0201_6.3V6M
CV5
CV6
1
1
DIS@
DIS@
2
2
Near
Near
AD8
AE8
1V8_MAIN_EN
PEGX_RST#
PEX_VDD_EN
FB_VDD_EN
3V3_SYS_EN
ALL_GPU_PWR_OK
OVERT#
1V8_AON_EN
NVVDD_EN
1 2
1 2
1U_0201_6.3V6M
CV195
1
DIS@
2
RV9 10K_0201_5%DIS@
RV11 10K_0201_5%DIS@
GC6@
12
DV8
RB751S40T1G_SOD523-2
DGPU_AC_DETECT <58,87>
SM01000JX00
3000ma 33ohm@100mhz DCR 0.04
4.7U_0402_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
CV3
1
CV42
DIS@
DIS@
2
RV9 resistance check
20
PLTRST_VGA#_1V8
19
18
17
16
15
14
13
12
11
GND
GPU_EVENT#GPU_EVENT#_1
1 2
LV1
TAI-TECH HCB1608KF-330T30
SM01000JX00
1
CV4
DIS@
2
Near
GPU
1.8VSDGPU_MAIN_EN3V3 <37>
1VSDGPU_EN <37,107>
1.35VSDGPU_EN <37,106>
3VSDGPU_EN <37,39,78>
ALL_GPWRGD
GPU_OVERT# <58>
1V8_AON_EN <37,107>
NVVDD1_EN <37,102>
FH51S GP U_ACIN
DIS@
C
GPU_EVENT# <9>
+1.8VSDGPU_MAIN
+1.8VSDGPU_MAIN
5
QV13A
N18P@
PJT138KA 2N SOT363-6
VGA_I2CC_SCL
PJT138KA 2N SOT363-6
VGA_I2CC_SDA
QV2A
PJT138KA 2N SOT363-6
VGA_I2CS_SCL
PJT138KA 2N SOT363-6
VGA_I2CS_SDA
RV80
DIS@
470_0402_1%
XTALOUT
PVT PVT
15P_0402_50V8J
QV13B
+1.8VSDGPU_MAIN
DIS@
QV2B
XTALOUT_R
12
CV1
DIS@
N18P@
DIS@
34
SGD
5
34
SGD
12
2
G
61
S
D
2
G
61
S
D
27MHZ_10PF_XRCGB27M000F2P18R0
XV1
1
3
1
NC
NC
2
4
DIS@
Crystals must have a max ESR of 80 ohm
HDMI_HPD_APU<9,40>
0.1U_0201_10V6K
PLTRST_VGA#_1V8
NL17SZ08DFT2G_SC70-5
FH51S Rename
20190506
- RV83 change to pop (VGA@)
- CV226 change to unpop
+1.8VSDGPU_AON +1.8VSDGPU_AON
DIS@
CG340
12
5
1
IN B
VCC
OUT Y
2
IN A
GND
DIS@ SA0000BJI00
3
UG28
+1.8VSDGPU_AON
RV83
DIS@
10K_0201_5%
1 2
ALL_GPWRGD
1
@
CV226
0.1U_0201_10V6K
2
4
2
1
@
CV201
0.1U_0201_10V6K
2
34
D
G
5
S
VGA_CLKREQ#_R
12
DIS@
RG180
10K_0201_5%
61
D
G
QV5B
S
PJT138KA 2N SOT363-6
DIS@
PU at PCH side
QV5A
PJT138KA 2N SOT363-6
DIS@
For nVidia N18P-G61/G62 VRAM
(8Gb)
ZZZ
X76_L51@
0x01_Micron_256M x32
X76869BOL51
ZZZ
X76_L52@
0x00_Samsung_256M x32
X76869BOL52
Memory PN R3(ABO!) STRAP[2:0]
UV4
X76_M4G@
UV5 X76_M4G@
S IC D6 MT61K256M32JE-14:A 1.2V ABO !
SA0000BND80
UV4
X76_S4G@
UV5 X76_S4G@
S IC D6 256M32 K4Z80325BC-HC14 1.2V ABO!
SA0000C6280
UV6 X76_M4G@
UV7 X76_M4G@
UV6 X76_S4G@
UV7 X76_S4G@
D
VGA_I2CC_SCL_PWR <102>
VGA_I2CC_SDA_PWR <102>
EC_SMB_CK2 <8,58>
FH51S Rename
EC_SMB_DA2 <8,58>
3
XTALIN
12
CV2
15P_0402_50V8J
DIS@
HDMI_HPD_GPU#
FH51S Rename
CLKREQ_PCIE#0 <10>
VGA_OVERT#
VGA_ALERT#
FRM_LCK#
ACIN_BUF
GPU_EVENT#_1
1.8VSDGPU_MAIN_EN
NVVDD_PSI
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
FBVDDQ_PSI
GPIO22_OC_WARN#
VGA_I2CS_SDA
VGA_I2CS_SCL
VGA_I2CC_SDA
VGA_I2CC_SCL
NVVDD_PSI
VRAM_VREF_CTL
GC6_FB_EN1V8
GPU_PEX_RST_HOLD#
FH51S Rename
DP0_HPD_APU<10,39>
RV327 10K_0201_5%DIS@
RV328 10K_0201_5%DIS@
RV329 10K_0201_5%DIS@
RV330 10K_0201_5%DIS@
RV331 10K_0201_5%DIS@
RV1 10K_0201_5%DIS@
RV4 10K_0201_5%DIS@
RV332 10K_0201_5%N17P@
RV82 10K_0201_5%N17P@
RV335 10K_0201_5%N18P@
RV386 10K_0201_5%N18P@
RV2 1.8K_0402_1%DIS@
RV3 1.8K_0402_1%DIS@
RV5 2K_0402_5%DIS@
RV6 2K_0402_5%DIS@
RV398 10K_0201_5%@
RV333 100K_0201_5%DIS@
RV334 10K_0201_5%DIS@
RV396 100K_0201_5%N18P@
DP0_HPD_APU
PLTRST_VGA#_1V8
NL17SZ08DFT2G_SC70-5
Device ID: 1F99(G61)/1F95(G62)
STRAP 2
(H: RV28, L: RV36)
STRAP 1
(H: RV27, L: RV35)
STRAP 0
RV26
RV35 X76_M4G@
100K_0402_5%
RV34
RV35 X76_S4G@
100K_0402_5%
X76_M4G@
SD028100380
X76_S4G@
SD028100380
(H: RV26, L: RV34)
RV36 X76_M4G@
100K_0201_5% S D043100380
RV36 X76_S4G@
100K_0201_5% S D043100380
1 2
1 2
1 2
1 2
+1.8VSDGPU_AON
DP@
CG341
0.1U_0201_10V6K
UG29
DP@
SA0000BJI00
E
+1.8VSDGPU_AON
12
12
12
12
12
12
12
12
12
12
12
UV1 N18PG61@
12
12
12
12
12
5
1
IN B
VCC
OUT Y
2
IN A
GND
3
S IC N18P-G61-MP2-A1 BGA 960P GPU ABO !
SA0000CZO50
UV1 N18PG62@
S IC N18P-G62-A1 BGA 960P GPU ABO !
SA0000CZP30
+1.8VSDGPU_AON
4
2
Gate
1
Drain
3
DP@
Source
QG5
LBSS139WT1G_SC70-3
12
DIS@
RG2840
10K_0402_5%
GPU_DP0_HPD#
NoteStrap/Vendor /Size
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION.THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPALELECTRONICS, INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPALELECTRONICS, INC.
B
C
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPALELECTRONICS, INC.
2019/08/30 2020/08/30
2019/08/30 2020/08/30
2019/08/30 2020/08/30
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Document Num ber Re v
Document Num ber Re v
Document Num ber Re v
Custom
Custom
Custom
LA-K181P
LA-K181P
LA-K181P
Date : Sheet of
Date : Sheet of
Date : Sheet of
N18P PEG 1/7
N18P PEG 1/7
N18P PEG 1/7
E
27 116W ednesday, April 08, 2020
27 116W ednesday, April 08, 2020
27 116W ednesday, April 08, 2020
1.0
1.0
1.0
A
Vinafix.com
Vinafix.com
B
C
D
E
FBA_D[63..0]< 32>
1 1
2 2
FBA_DBI[7..0]<32>
FBA_EDC[7..0]<32>
3 3
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7
FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7
UV1B
L28
FBA_D0
M29
FBA_D1
L29
FBA_D2
M28
FBA_D3
N31
FBA_D4
P29
FBA_D5
R29
FBA_D6
P28
FBA_D7
J28
FBA_D8
H29
FBA_D9
J29
FBA_D10
H28
FBA_D11
G29
FBA_D12
E31
FBA_D13
E32
FBA_D14
F30
FBA_D15
C34
FBA_D16
D32
FBA_D17
B33
FBA_D18
C33
FBA_D19
F33
FBA_D20
F32
FBA_D21
H33
FBA_D22
H32
FBA_D23
P34
FBA_D24
P32
FBA_D25
P31
FBA_D26
P33
FBA_D27
L31
FBA_D28
L34
FBA_D29
L32
FBA_D30
L33
FBA_D31
AG28
FBA_D32
AF29
FBA_D33
AG29
FBA_D34
AF28
FBA_D35
AD30
FBA_D36
AD29
FBA_D37
AC29
FBA_D38
AD28
FBA_D39
AJ29
FBA_D40
AK29
FBA_D41
AJ30
FBA_D42
AK28
FBA_D43
AM29
FBA_D44
AM31
FBA_D45
AN29
FBA_D46
AM30
FBA_D47
AN31
FBA_D48
AN32
FBA_D49
AP30
FBA_D50
AP32
FBA_D51
AM33
FBA_D52
AL31
FBA_D53
AK33
FBA_D54
AK32
FBA_D55
AD34
FBA_D56
AD32
FBA_D57
AC30
FBA_D58
AD33
FBA_D59
AF31
FBA_D60
AG34
FBA_D61
AG32
FBA_D62
AG33
FBA_D63
P30
FBA_DQM0
F31
FBA_DQM1
F34
FBA_DQM2
M32
FBA_DQM3
AD31
FBA_DQM4
AL29
FBA_DQM5
AM32
FBA_DQM6
AF34
FBA_DQM7
M31
FBA_DQS_WP0
G31
FBA_DQS_WP1
E33
FBA_DQS_WP2
M33
FBA_DQS_WP3
AE31
FBA_DQS_WP4
AK30
FBA_DQS_WP5
AN33
FBA_DQS_WP6
AF33
FBA_DQS_WP7
M30
RES
H30
RES
E34
RES
M34
RES
AF30
RES
AK31
RES
AM34
RES
AF32
RES
N18P-G0_FCBGA96 0~D
@
Part 2 of 7
MEMORY INTERFACE
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_CMD34
FBA_CMD35
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
A
FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N
FB_REFPLL_AVDD
FBA_PLL_AVDD
FB_VREF
U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31
R28
AC28
R32
AC32
R30
R31
AB31
AC31
K31
L30
H34
J34
AG30
AG31
AJ34
AK34
J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33
K27
U27
H31
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_DEBUG0
FBA_DEBUG1
+FB_PLLAVDD
FB_VREF
FBA_CMD[33..0] <32> FBB_D[63..0]<33 >
32, 33 add for GDDR6
RG2930 60.4_0201_ 1%@
RG2931 60.4_0201_ 1%@
FBA_CLKA0 <32>
FBA_CLKA0# <32>
FBA_CLKA1 <32>
FBA_CLKA1# <32>
FBA_WCK01 <3 2>
FBA_WCK01# < 32>
FBA_WCK23 <3 2>
FBA_WCK23# < 32>
FBA_WCK45 <3 2>
FBA_WCK45# < 32>
FBA_WCK67 <3 2>
FBA_WCK67# < 32>
FBA_WCKB01 <3 2>
FBA_WCKB01# < 32>
FBA_WCKB23 <3 2>
FBA_WCKB23# < 32>
FBA_WCKB45 <3 2>
FBA_WCKB45# < 32>
FBA_WCKB67 <3 2>
FBA_WCKB67# < 32>
1U_0201_6.3V6M
CV9
1
1
DIS@
2
2
Near
Near
U27
K27
+1.2VSDGPU +1.2VSDGPU
12
12
+1.8VSDGPU_MAIN
1 2
LV3
TAI-TECH HCB160 8KF-330T30
4.7U_0402_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
CV10
DIS@
CV379
CV11
1
1
DIS@
2
SM01000JX00
SM01000J X00
DIS@
3000ma 33ohm@100mhz DCR 0.04
2
DIS@
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_DBI[7..0]<33>
FBB_EDC[7..0]<33>
FBB_D63
FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7
FBB_EDC0
FBB_EDC1
FBB_EDC2
FBB_EDC3
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7
UV1C
G9
FBB_D0
E9
FBB_D1
G8
FBB_D2
F9
FBB_D3
F11
FBB_D4
G11
FBB_D5
F12
FBB_D6
G12
FBB_D7
G6
FBB_D8
F5
FBB_D9
E6
FBB_D10
F6
FBB_D11
F4
FBB_D12
G4
FBB_D13
E2
FBB_D14
F3
FBB_D15
C2
FBB_D16
D4
FBB_D17
D3
FBB_D18
C1
FBB_D19
B3
FBB_D20
C4
FBB_D21
B5
FBB_D22
C5
FBB_D23
A11
FBB_D24
C11
FBB_D25
D11
FBB_D26
B11
FBB_D27
D8
FBB_D28
A8
FBB_D29
C8
FBB_D30
B8
FBB_D31
F24
FBB_D32
G23
FBB_D33
E24
FBB_D34
G24
FBB_D35
D21
FBB_D36
E21
FBB_D37
G21
FBB_D38
F21
FBB_D39
G27
FBB_D40
D27
FBB_D41
G26
FBB_D42
E27
FBB_D43
E29
FBB_D44
F29
FBB_D45
E30
FBB_D46
D30
FBB_D47
A32
FBB_D48
C31
FBB_D49
C32
FBB_D50
B32
FBB_D51
D29
FBB_D52
A29
FBB_D53
C29
FBB_D54
B29
FBB_D55
B21
FBB_D56
C23
FBB_D57
A21
FBB_D58
C21
FBB_D59
B24
FBB_D60
C24
FBB_D61
B26
FBB_D62
C26
FBB_D63
E11
FBB_DQM0
E3
FBB_DQM1
A3
FBB_DQM2
C9
FBB_DQM3
F23
FBB_DQM4
F27
FBB_DQM5
C30
FBB_DQM6
A24
FBB_DQM7
D10
FBB_DQS_WP0
D5
FBB_DQS_WP1
C3
FBB_DQS_WP2
B9
FBB_DQS_WP3
E23
FBB_DQS_WP4
E28
FBB_DQS_WP5
B30
FBB_DQS_WP6
A23
FBB_DQS_WP7
D9
RES
E4
RES
B2
RES
A9
RES
D22
RES
D28
RES
A30
RES
B23
RES
N18P-G0_FCBGA96 0~D
@
Part 3 of 7
FBB_CLK0_N
MEMORY INTERFACE B
FBB_CLK1_N
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N
FBB_PLL_AVDD
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35
FBB_CLK0
FBB_CLK1
D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17
G14
G20
C12
C20
D12
E12
E20
F20
F8
E8
A5
A6
D24
D25
B27
C27
D6
D7
C6
B6
F26
E26
A26
A27
H17
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_DEBUG0
FBB_DEBUG1
RG3019 60.4_0201_ 1%@
RG3018 60.4_0201_ 1%@
1U_0201_6.3V6M
1
2
Near
H17
FBB_CMD[33..0] <33>
FBB_CLKA0 <33>
FBB_CLKA0# <33>
FBB_CLKA1 <33>
FBB_CLKA1# <33>
FBB_WCK01 <3 3>
FBB_WCK01 # <33>
FBB_WCK23 <3 3>
FBB_WCK23 # <33>
FBB_WCK45 <3 3>
FBB_WCK45 # <33>
FBB_WCK67 <3 3>
FBB_WCK67 # <33>
FBB_WCKB0 1 < 33>
FBB_WCKB0 1# <33>
FBB_WCKB2 3 < 33>
FBB_WCKB2 3# <33>
FBB_WCKB4 5 < 33>
FBB_WCKB4 5# <33>
FBB_WCKB6 7 < 33>
FBB_WCKB6 7# <33>
+FB_PLLAVDD
4.7U_0402_6.3V6M
CV7
1
DIS@
2
12
12
CV12
DIS@
+1.2VSDGPU +1.2VSDGPU
FBA_CMD7
FBA_CMD33
FBA_CMD2
FBA_CMD18
4 4
A
12
DIS@
RV87 10 K_0402_5%
12
DIS@
RV88 10 K_0402_5%
12
DIS@
RV89 10 K_0402_5%
12
DIS@
RV90 10 K_0402_5%
B
FB_VREF
CV378
3.9P_0402_50V8C
RV393
49.9_0402_1%
12
1
N18P@
N18P@
2
FBB_CMD7
CKE
FBB_CMD33
signal
FBB_CMD2
RST
FBB_CMD18
signal
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
12
DIS@
RV91 10K_ 0402_5%
12
DIS@
RV92 10K_ 0402_5%
12
DIS@
RV93 10K_ 0402_5%
12
DIS@
RV94 10K_ 0402_5%
Compal Secret Data
Compal Secret Data
2019/08/30 2020/08/30
2019/08/30 2020/08/30
2019/08/30 2020/08/30
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
N18P VRAM 2/7
N18P VRAM 2/7
N18P VRAM 2/7
LA-K181P
LA-K181P
LA-K181P
28 1 16Wednesday, April 08, 2020
28 1 16Wednesday, April 08, 2020
E
28 1 16Wednesday, April 08, 2020
1.0
1.0
1.0
A
Vinafix.com
Vinafix.com
1 1
GPU_DP2_P0<40>
GPU_DP2_N0<40>
GPU_DP2_P1<40>
GPU_DP2_CT RL_CLK<40>
GPU_DP2_CT RL_DAT<40>
DP0_AUXN
DP0_AUXP
DIS@
RG2839
GPU_DP2_N1<40>
GPU_DP2_P2<40>
GPU_DP2_N2<40>
GPU_DP2_P3<40>
GPU_DP2_N3<40>
DP0_TXP0< 39>
DP0_TXN0<3 9>
DP0_TXP1< 39>
DP0_TXN1<3 9>
DP0_TXP2< 39>
DP0_TXN2<3 9>
DP0_TXP3< 39>
DP0_TXN3<3 9>
DP0_AUXP<3 9>
DP0_AUXN<39 >
12
12
DIS@
RG2838
100K_0402_ 5%
HDMI
2.0
mDP
2 2
1007
- DP Change to Port-E
- Pin NAME no change
1007
- DP Change to Port-E
- Pin NAME no change
3 3
100K_0402_ 5%
UV1D
AM6
IFPA_L3
AN6
IFPA_L3_N
AP3
IFPA_L2
AN3
IFPA_L2_N
AN5
IFPA_L1
AM5
IFPA_L1_N
AL6
IFPA_L0
AK6
IFPA_L0_N
AJ6
IFPA_AUX_SCL
AH6
IFPA_AUX_SDA_N
AJ9
IFPB_L3
AH9
IFPB_L3_N
AP6
IFPB_L2
AP5
IFPB_L2_N
AM7
IFPB_L1
AL7
IFPB_L1_N
AN8
IFPB_L0
AM8
IFPB_L0_N
AK8
IFPB_AUX_SCL
AL8
IFPB_AUX_SDA_N
AK1
IFPC_L0
AJ1
IFPC_L0_N
AJ3
IFPC_L1
AJ2
IFPC_L1_N
AH3
IFPC_L2
AH4
IFPC_L2_N
AG5
IFPC_L3
AG4
IFPC_L3_N
AM1
IFPD_L0
AM2
IFPD_L0_N
AM3
IFPD_L1
AM4
IFPD_L1_N
AL3
IFPD_L2
AL4
IFPD_L2_N
AK4
IFPD_L3
AK5
IFPD_L3_N
AD2
IFPE_L0
AD3
IFPE_L0_N
AD1
IFPE_L1
AC1
IFPE_L1_N
AC2
IFPE_L2
AC3
IFPE_L2_N
AC4
IFPE_L3
AC5
IFPE_L3_N
AE3
NC
AE4
NC
AF4
NC
AF5
NC
AD4
NC
AD5
NC
AG1
NC
AF1
NC
AG3
IFPC_AUX_SCL
AG2
IFPC_AUX_SDA_N
AK3
IFPD_AUX_SCL
AK2
IFPD_AUX_SDA_N
AB3
IFPE_AUX_SCL
AB4
IFPE_AUX_SDA_N
AF3
NC
AF2
NC
N18P-G0_FCBGA96 0~D
@
Part 4 of 7
TMDS
NC
VDD_SENSE
GND_SENSE
TEST
NVJTAG_SEL
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
SERIAL
ROM_CS_N
ROM_SCLK
GENERAL
BUFRST_N
THERMDP
THERMDN
ROM_SI
ROM_SO
OVERT
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5
B
+1.8VSDGPU_MAIN
AC6
NC
AJ28
NC
AJ4
NC
AJ5
NC
AL11
NC
C15
NC
D19
NC
D20
NC
D23
NC
D26
NC
V32
NC
L4
L5
VRAM strap check(strap 2,1,0)
0x000=Samsung
0x001=Micron
NVVDD1_VCC_SENSE <102>
NVVDD1_VSS_SENSE < 102>
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5
C
+1.8VSDGPU_AON
RV26
100K_0402_ 5%
X76@
1 2
RV34
100K_0402_ 5%
@
1 2
RV27
100K_0402_ 5%
@
1 2
RV35
100K_0402_ 5%
X76@
1 2
MULTI LEVEL
STRAPS
strap3strap 2strap 1strap0 strap5
RV28
100K_0201_ 5%
@
1 2
RV36
100K_0201_ 5%
X76@
1 2
RV29
100K_0201_ 5%
DIS@
1 2
RV37
100K_0201_ 5%
@
1 2
strap4
RV30
100K_0201_ 5%
@
1 2
RV38
100K_0201_ 5%
DIS@
1 2
D
RV78
100K_0402_ 5%
@
1 2
RV79
100K_0402_ 5%
DIS@
1 2
RV31
100K_0402_ 5%
@
1 2
RV39
100K_0402_ 5%
N18P@
1 2
RV32
100K_0402_ 5%
@
1 2
RV40
10K_0402_5 %
N18P@
1 2
RV33
100K_0201_ 5%
@
1 2
ROM_SI
ROM_SO
ROM_SCLK
RV41
100K_0201_ 5%
N18P@
1 2
E
X76 BOM
RV336
10K_0402_5 %
ROM_CS_R#
ROM_SO_R
+1.8VSDGPU_AON
12
N18P@
UV49
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
W25Q80EW SSIG_SO8
N18P@
SA00009QP00
VCC
HOLD#(IO3)
CLK
DI(IO0)
+1.8VSDGPU_AON
8
7
ROM_SCLK_R
6
ROM_SI_R
5
1
CV355
N18P@
0.1U_0201_ 10V6K
2
N18P@
RV339
33_0402_5 %
1 2
1 2
RV340
33_0402_5 %
N18P@
ROM_SCLK
ROM_SI
AK11
AM10
AM11
AP12
AP11
AN11
H6
H4
H5
H7
TESTMODE
ROM_CS#
ROM_SCLK
ROM_SI
ROM_SO
JTAG_TCK_VGA
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_RST
1 2
RV42 10K_04 02_5%DIS@
TV5@
TV6@
TV7@
TV8@
1 2
RV43 10K_04 02_5%DIS@
ROM_CS#
ROM_SO
N18P@
RV337
33_0402_5 %
1 2
1 2
RV338
0_0402_5%
@
DGPU VBIOS ROM 8Mb
GPU_BUFRST#
E1
M1
J2
STRAP0
J7
STRAP1
J6
STRAP2
J5
STRAP3
J3
STRAP4
J1
STRAP5
K3
K4
TV9@
VGA_OVERT# <27>
SMB_ATL_ADDR
LOW
High
Dual GPU
DEVID_SEL
LOW
Orig. Device ID
High
Support G-Sync GPUID
VGA_DEVICE
LOW
High
VGA Device
PCIE_CFG
LOW
High
Reduce the signal amplitude
Single GPU
3D Device
Normal signal swing
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2019/08/30 2020/08/30
2019/08/30 2020/08/30
2019/08/30 2020/08/30
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet o f
Date : Sheet o f
D
Date : Sheet o f
Compal Electronics, Inc.
N18P STRAP 3/7
N18P STRAP 3/7
N18P STRAP 3/7
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
29 1 16Wednesday, April 08, 2020
29 1 16Wednesday, April 08, 2020
E
29 1 16Wednesday, April 08, 2020
1.0
*
4 4
*
*
*
A
A
Vinafix.com
Vinafix.com
+1.2VSDGPU
CHA
/6*1uF+2*10 uF
CV396
0.47U_0201_6.3V6K
CV395
0.47U_0201_6.3V6K
1
1
2
2
@
@
1 1
CHB
/6*1uF+2*10 uF
reserve
CV398
0.47U_0201_6.3V6K
CV397
0.47U_0201_6.3V6K
1
1
2
2
@
@
Under
GPU
CV19
1U_0201_6.3V6M
CV18
1U_0201_6.3V6M
1
DIS@
2
CV126
1U_0201_6.3V6M
1
DIS@
2
CV20
1U_0201_6.3V6M
CV21
1
DIS@
2
CV127
1U_0201_6.3V6M
1
DIS@
2
1U_0201_6.3V6M
1
1
DIS@
DIS@
2
2
CV128
1U_0201_6.3V6M
CV129
1U_0201_6.3V6M
1
1
DIS@
DIS@
2
2
CV23
1U_0201_6.3V6M
CV22
1U_0201_6.3V6M
1
1
DIS@
DIS@
2
2
CV130
1U_0201_6.3V6M
CV131
1U_0201_6.3V6M
1
1
DIS@
DIS@
2
2
reserve
GPU
/5*22uF+2*1 0uF
1
2
2 2
1
2
10U_0402_6.3V6M
10U_0402_6.3V6M
CV37
1
2
DIS@
10U_0402_6.3V6M
CV217
1
2
@
22U_0603_6.3V6M
CV202
DIS@
Place close to
GPU
22U_0603_6.3V6M
CV219
@
22U_0603_6.3V6M
1
2
22U_0603_6.3V6M
1
2
CV38
1
2
DIS@
10U_0402_6.3V6M
CV218
1
2
@
22U_0603_6.3V6M
22U_0603_6.3V6M
CV39
CV36
1
2
DIS@
22U_0603_6.3V6M
CV220
1
2
@
CV40
1
2
DIS@
DIS@
22U_0603_6.3V6M
CV221
CV222
1
2
@
@
near GPU for NV update s pec 1210
FB_VDDQ_SENSE<106>
+1.2VSDGPU
3 3
1 2
RV47 40.2_040 2_1%DIS@
1 2
RV48 40.2_040 2_1%DIS@
1 2
RV49 40.2_040 2_1%DIS@
60.4_0402_1%
SD034604A80
RV49
10U_0402_6.3V6M
1
2
10U_0402_6.3V6M
1
2
22U_0603_6.3V6M
CV41
1
2
DIS@
22U_0603_6.3V6M
CV223
1
2
@
FB_VDDQ_SENSE
N17P@
CV24
DIS@
CV132
DIS@
B
1
2
1
2
TV10@
CV26
10U_0402_6.3V6M
DIS@
CV133
10U_0402_6.3V6M
DIS@
+1.2VSDGPU
RV45
@
0_0402_5%
1 2
FB_GND_SENSE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_ GND
UV1E
AA27
FBVDDQ_0
AA30
FBVDDQ_1
AB27
FBVDDQ_2
AB33
FBVDDQ_3
AC27
FBVDDQ_4
AD27
FBVDDQ_5
AE27
FBVDDQ_6
AF27
FBVDDQ_7
AG27
FBVDDQ_8
B13
FBVDDQ_9
B19
FBVDDQ_11
E13
FBVDDQ_12
E19
FBVDDQ_14
H10
FBVDDQ_15
H11
FBVDDQ_16
H12
FBVDDQ_17
H13
FBVDDQ_18
H14
FBVDDQ_19
H18
FBVDDQ_22
H19
FBVDDQ_23
H20
FBVDDQ_24
H21
FBVDDQ_25
H22
FBVDDQ_26
H23
FBVDDQ_27
H24
FBVDDQ_28
H8
FBVDDQ_29
H9
FBVDDQ_30
L27
FBVDDQ_31
M27
FBVDDQ_32
N27
FBVDDQ_33
P27
FBVDDQ_34
R27
FBVDDQ_35
T27
FBVDDQ_36
T30
FBVDDQ_37
T33
FBVDDQ_38
Y27
FBVDDQ_43
B16
FBVDDQ
E16
FBVDDQ
H15
FBVDDQ
H16
FBVDDQ
V27
FBVDDQ
W27
FBVDDQ
W30
FBVDDQ
W33
FBVDDQ
F1
FBVDDQ_SENSE
F2
PROBE_FB_GND
J27
FB_CAL_PD_VDDQ
H27
FB_CAL_PU_GND
H25
FB_CAL_TERM_GND
N18P-G0_FCBGA96 0~D
@
Part 5 of 7
PEX_DVDD_0
PEX_DVDD_1
PEX_DVDD_2
PEX_DVDD_3
PEX_DVDD_4
PEX_DVDD_5
PEX_HVDD_0
PEX_HVDD_1
PEX_HVDD_2
PEX_HVDD_3
PEX_HVDD_4
PEX_HVDD_5
PEX_HVDD_6
PEX_HVDD_7
PEX_HVDD_8
PEX_HVDD_9
PEX_HVDD_10
PEX_HVDD_11
PEX_HVDD_12
PEX_HVDD_13
PEX_PLL_HVDD
FP_FUSE_SRC
POWER
IFPAB_PLLVDD
IFPCD_PLLVDD
IFPE_PLLVDD
1V8_AON
1V8_AON
IFPAB_RSET
IFPCD_RSET
IFPE_RSET
IFP_IOVDD
IFP_IOVDD
IFP_IOVDD
IFP_IOVDD
IFP_IOVDD
IFP_IOVDD
AG19
AG21
AG22
AG24
AH21
AH25
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
AH12
AG12
AG26
NC
J8
K8
L8
NC
M8
NC
AH8
AJ8
RG2841 1K_04 02_1%
AF7
AF8
RG38 1K_0402_1%
AB8
AD6
RG3020 1K_04 02_1%
AG8
AG9
AF6
AG6
AC7
AC8
AG7
NC
AN2
NC
C
+FP_FUSE_GPU
12mils
+1.8VSDGPU_MAIN
12
DIS@
12
DIS@
12
DIS@
2019101 6
- DP change to Port E
2*22uF+3*10uF+3*4.7u F+6*1uF
Under
GPU
CV13
1U_0201_6.3V6M
1U_0201_6.3V6M
CV134
1U_0201_6.3V6M
1
1
2
1
DIS@
DIS@
2
2
2*22uF+3*10uF+3*4.7u F+7*1uF
CV380
1U_0201_6.3V6M
CV381
1U_0201_6.3V6M
CV399
1U_0201_6.3V6M
1
1
1
DIS@
DIS@
DIS@
2
2
2
+1.8VSDGPU_MAIN
1
CV43
1U_0201_6 .3V6M
2
Near
GPU
CV135
1U_0201_6.3V6M
1
1
DIS@
2
2
Under
GPU
RV394 0_040 2_5%N 17P@
CV14
CV33
1U_0201_6.3V6M
1
DIS@
DIS@
2
Under
GPU
CV137
1U_0201_6.3V6M
1
1
DIS@
2
2
DIS@
3*4.7uF+5*1uF
CV49
1U_0201_6.3V6M
1
DIS@
2
12
3*4.7uF+9*1uF
D
Near
GPU
CV389
CV16
CV386
1U_0201_6.3V6M
CV385
1U_0201_6.3V6M
1
1
DIS@
DIS@
2
2
CV136
1U_0201_6.3V6M
CV25
1U_0201_6.3V6M
1
1
DIS@
DIS@
2
2
CV51
1U_0201_6.3V6M
CV391
1U_0201_6.3V6M
1
1
DIS@
DIS@
2
2
Near
GPU
Under
GPU
CV214
1U_0201_6.3V6M
1
1
DIS@
2
2
4.7U_0402_6.3V6M
CV29
4.7U_0402_6.3V6M
1
1
2
CV15
1U_0201_6.3V6M
DIS@
CV392
1U_0201_6.3V6M
DIS@
1U_0201_6.3V6M
1
2
CV213
1U_0201_6.3V6M
DIS@
1
2
2
DIS@
DIS@
CV382
4.7U_0402_6.3V6M
CV17
4.7U_0402_6.3V6M
1
1
2
2
DIS@
DIS@
CV50
4.7U_0402_6.3V6M
CV393
4.7U_0402_6.3V6M
1
1
DIS@
DIS@
2
2
0.1U_0201_10V6K
CV52
0.1U_0201_10V6K
1
1
N17P@
2
2
CV215
CV216
1U_0201_6.3V6M
1
DIS@
DIS@
2
Under GPU
1 per ball
CV212
1U_0201_6.3V6M
1
DIS@
2
10U_0402_6.3V6M
CV387
4.7U_0402_6.3V6M
1
2
DIS@
CV32
4.7U_0402_6.3V6M
1
1
2
2
DIS@
CV394
4.7U_0402_6.3V6M
1
DIS@
2
2*4.7uF+1*1uF+2*0. 1uF
CV53
1
N17P@
2
Near
GPU
+GPU_PLLVDD
4.7U_0402_6.3V6M
CV205
4.7U_0402_6.3V6M
1
1
2
2
DIS@
+1.8VSDGPU_AON
10U_0402_6.3V6M
CV28
CV388
10U_0402_6.3V6M
1
1
2
2
DIS@
10U_0402_6.3V6M
1U_0201_6.3V6M
CV204
DIS@
DIS@
DIS@
Near
GPU
CV27
10U_0402_6.3V6M
CV30
10U_0402_6.3V6M
1
1
2
2
DIS@
DIS@
CV54
CV55
4.7U_0402_6.3V6M
1
N17P@
N17P@
2
CV203
4.7U_0402_6.3V6M
1
2
DIS@
CV34
22U_0603_6.3V6M
1
2
DIS@
+1.8VSDGPU_MAIN
CV383
22U_0603_6.3V6M
1
2
DIS@
+1.8VSDGPU_MAIN
+1.0VSDGPU
1
2
CV31
DIS@
+1.0VSDGPU
22U_0603_6.3V6M
1
2
E
CV390
DIS@
CV384
22U_0603_6.3V6M
DIS@
Near
GPU
CV206
1U_0201_6.3V6M
CV207
1U_0201_6.3V6M
CV208
1U_0201_6.3V6M
CV209
1U_0201_6.3V6M
CV210
1U_0201_6.3V6M
CV211
1U_0201_6.3V6M
1
1
DIS@
DIS@
2
2
4 4
Security Classification
Security Classification
A
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY N OT BE TRANSFERED FROM TH E CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2019/08/30 2020/08/30
2019/08/30 2020/08/30
2019/08/30 2020/08/30
Under GPU 1
per ball
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
1
DIS@
DIS@
2
2
D
1
1
DIS@
DIS@
2
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Compal Electronics, Inc.
N18P POWER 4/7
N18P POWER 4/7
N18P POWER 4/7
LA-K181P
LA-K181P
LA-K181P
1.0
1.0
30 1 16Wednesday, April 08, 2020
30 1 16Wednesday, April 08, 2020
E
30 1 16Wednesday, April 08, 2020
1.0
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