5
4
3
2
1
SYSTEM PAGE REF.
PAGE
1 Block Diagram
2 System Setting
3 CPU(1)_DMI,PEG,FDI,CLK,MISC
4
D D
C C
B B
CPU(2)_DDR3
5
CPU(3)_CFG,RSVD,GND
6
CPU(4)_PWR
7
CPU(5)_XDP
16
DDR3 SO-DIMM_0
17
DDR3 SO-DIMM_1
18
DDR3 CA_DQ VOLTAGE
19 VID controller
20
PCH_IBEX(1)SATA,IHDA,RTC,LPC
21
PCH_IBEX(2)_PCIE,CLK,SMB,PEG
22
PCH_IBEX(3)_FDI,DMI,SYS PWR
23
PCH_IBEX(4)_DP,LVDS,CRT
24
PCH_IBEX(5)_PCI,NVRAM,USB
25
PCH_IBEX(6)CPU,GPIO,MISC
PCH_IBEX(7)_POWER,GND
26
27
PCH_IBEX(8)_POWER,GND
28
PCH_SPI ROM,OTH
29
CLK_ICS9LPR362
30
EC_IT8512(1/2)
31
EC_IT8512(2/2)KB, TP
32
RST_Reset Circuit
33
HANKSVILLE
34
LAN_RJ45
36
CODEC-ALC663
37
AUD_Amp & Jack
38
AUD_FM2010
40
CB_R5C833
41
CB_R5C833
42
CB_4in1 CardReader
CB_NewCard
43
BUG_Debug
44
45
CRT_LCD Panel
46
CRT_D-Sub
Display Port
47
48
TV_HDMI
50
FAN_Fan & Sensor
51
XDD_HDD & ODD
USB_USB Port *2
52
MINICARD(WLAN)
53
LED_Indicator
56
DSG_Discharge
57
DC_DC & BAT Conn.
60
BT_Bluetooth
61
TUN_TV Tuner
64
ME_Conn & Skew Hole
65
ESA_ESATA
66
PCH_XDP, ONFI
67
Content
K42Jr SCHEMATIC Revision 2.0
BLOCK DIAGRAM
HDMI
HDMI
Jack
HDMI HDMI
AMD PARK-XT-S3
LVDS
CRT
CRT
CRT CRT
LVDS
LVDS LVDS
Debug Conn.
EC
IT8500E-L
SPI ROM
Azalia Codec
Realtek ALC269
LVDS
LVDS
LVDS LVDS
CRT
CRT
CRT CRT
PCIE x16
PCIE x16
PCIE x16 PCIE x16
LPC
LPC
LPC LPC
Azalia
Azalia
Azalia Azalia
CPU
ARRANDALE
DMI x4
FDI x8
FDI x8 FDI x8
DMI x4 FDI x8
DMI x4 DMI x4
PCH
Ibex Peak-M
SATA
SATA
SATA SATA
DDR3 800/1066MHz
DDR3 800/1066MHz
DDR3 800/1066MHz DDR3 800/1066MHz
PCIE x1
PCIE x1
PCIE x1 PCIE x1
USB
USB
USB USB
ODD
HDD(1)
HDMI
CRT
LCD Panel
Touchpad
Keyboard
INT. MIC
Audio Amp
DDR3 SO-DIMM
MiniCard
WLAN
Shirley Peak/ Echo Peak
MiniCard
GigaLAN
HANKSVILLE
CardReader
USB Port(1)
USB Port(2)
USB Port(3)
RJ45
Power
VCORE
System
1.5VS & 1.05VS
DDR & VTT
+2.5VS
Charger
Detect
Load Switch
Power Protect
CMOS Camera
MiniCard
Bluetooth
VGA_MXM
70
VGA_LVDS Switch
71
PW_VCORE(MAX17034)
80
PW_SYSTEM(MAX17020)
81
PW_I/O_VTT_CPU&+1.1VM
82
A A
PW_I/O_DDR & VTT& +1.8VS 83
PW_I/O_3VM & ME_+VM_PWEGD
84
PW_+VGFX_CORE(MAX17028)
86
PW_CHARGER(MAX17015)
88
PW_DETECT
90
PW_LOAD SWITCH
91
PW_PROTECT
92
PW_SIGNAL 93
PW_FLOWCHART
94
5
Clock Generator
ICS ICS9LPR427
4
VID controller
PWM Fan
3
Discharge Circuit
Reset Circuit
DC & BATT. Conn.
Skew Holes
2
Title :
Title :
Title :
Block Diagram
Block Diagram
Block Diagram
Nic
Nic
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB4
ASUSTeK COMPUTER INC. NB4
ASUSTeK COMPUTER INC. NB4
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
K42Jr
K42Jr
K42Jr
1
Nic
1 96 Thursday, November 12, 2009
1 96 Thursday, November 12, 2009
1 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.1
1.1
1.1
5
PCH_IBEX
GPIO
D D
C C
B B
A A
PCH_IBEX
GPIO
GPIO 00
GPIO 01
GPIO [2:5]
GPIO 06
GPIO 07
GPIO 08
GPIO 09
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16 +3VS
GPIO 17 +3VS GPO
GPIO 18 +3VS
GPIO 19 +3VS
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24 +3VSUS
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39 +3VS
GPIO 40
GPIO 41
GPIO 42
GPIO 43
GPIO 44
GPIO 45
GPIO 46
GPIO 47
GPIO 48
GPIO 49
GPIO 50
GPIO 51
GPIO 52
GPIO 53
GPIO 54
GPIO 55
GPIO 56
GPIO 57
GPIO 58
GPIO 59
GPIO 60
GPIO 61
GPIO 62
GPIO 63
GPIO 64
GPIO 65
GPIO 66
GPIO 67
GPIO 72
GPIO 73
GPIO 74
GPIO 75
5
GPO
GPO
Native
GPO
GPO
GPI
Native
Native
GPI
Native
GPO
GPO
GPO
GPO
Native
GPO
Native
GPO
GPO
Native
GPO Native
Native CLKREQ4#
GPO
GPO
Native
Native
Native
Native
GPO
Native
Native
GPO
GPI
GPI
GPI
Native
Native
Native
Native
Native
Native
Native
Native CLKREQ_PEG#
GPO
Native
Native
GPO
GPO
GPO
GPO
Native
GPO
Native
Native
GPO
Native
Native
Native
Native
Native
Native
Native
GPO
Native
GPO
Native
Signal Name Use As Power
-
-
DGPU_HPD_INTR#
EXT_SMI#
USB_OC5#
USB_OC6#
EXT_SCI#
PM_LAYPHY_EN
CB_SD#
WLAN_ON
DGPU_HOLD_RST#
DGPU_PWROK
CLKREQ1#_TV
CLKREQ2#_WLAN
WLAN_LED
LDRQ1#
CLKREQ3#_NEWCARD
BT_LED
ME_PM_SLP_LAN#
ME_Sus_PwrDnAck
ME_AC_PRESENT
PM_CLKRUN#
STP_PCI#
SATA_CLK_REQ#
DGPU_PWR_EN#
DGPU_PRSNT#
PCB_ID0
PCB_ID1
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
CLK_REQ5#
CLK_REQ6#
CLK_REQ7#
GPU_RST# GPO
PCI_REQ1#
PCI_GNT1#
-
-
-
CLKREQ_GLAN#
BT_ON
SML1_CLK
USB_OC0#
PM_SUS_STAT#
SUS_CLK
PM_SLP_S5#
CLK_OUT0
CLK_OUT1
CLK_OUT2
CLK_OUT3
CLK_REQ0#
SML1_DATA
4
Internal &
External
Pull-up/down
-
INT TBD
EXT PU
INT TBD
INT TBD
EXT PU & INT PU
EXT PU
EXT PU
EXT PU
EXT PU
-
EXT PU(DIODE DNI)
INT PD
-
EXT PD & INT TBD
EXT PU(DNI)/PD
-
EXT PU(DNI)/PD
-
EXT PD
INT PU
-
EXT PU(DNI)/PD
EXT PU (Not used)
INT WEAK PU
EXT PD
EXT PU(DNI)/PD(DNI)
EXT PU
EXT PU
EXT PU
-
EXT PU/PD(DNI)
EXT PU
EXT PU
EXT PD
EXT PD
EXT PU (Not used)
EXT PU (Not used)
EXT PU (Not used)
EXT PU (Not used)
EXT PU (Not used)
EXT PU (Not used)
EXT PU (Not used)
EXT PD
-
-
EXT PU (Not used)
INT PU
-
INT PU
-
INT PU
EXT PU(DNI)/PD
EXT PU(DIODE)
EXT PU
EXT PU (Not used)
-
-
-
-
INT TBD
INT TBD
INT TBD
INT TBD
-
EXT PU (Not used)
EXT PU (Not used)
EXT PU
4
+3VS
+3VS
+5VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+5VS
+3VS
+5VS
+3VS
+5VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
EC
IT8512
3
EC GPIO
Use As Signal Name
GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7
GPB0
GPB1
GPB2
GPB3
GPB4
GPB5
GPB6
GPB7
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPE0
GPE1
GPE2
GPE3
GPE4
GPE5
GPE6
GPE7
GPF0
GPF1
GPF2
GPF3
GPF4
GPF5
GPF6
GPF7
GPG0
GPG1
GPG2
GPG6 GPH0
GPH1
GPH2
GPH3
GPH4
GPH5
GPH6 CAP_LED#
GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6
GPI7
GPJ0
GPJ1
GPJ2
GPJ4
GPJ5 -
PWR_LED#
O
CHG_LED#
O
-
LCD_BL_PWM
O
FAN0_PWM
O
-
SUSC_EC#
O
SUSB_EC#
O
SMB0_CLK
IO
SMB0_DAT
IO
A20GATE
O
RC_IN#
O
O
PM_RSMRST#
SMB1_CLK
IO
SMB1_DAT
IO
PM_PWRBTN#
O
I
AC_IN_OC#
OP_SD#
I
BAT1_IN_OC#
I
RFON_SW#
-
I
PM_SUSC#
BUF_PLT_RST#
I
EXT_SCI#
O
EXT_SMI#
O
O
LCD_BACKOFF#
I
FAN0_TACH
-
O
VSUS_ON
O
EGAD (IT8301 Address/Data connect)
O
EGCS (IT8301 Cycle Start connect)
O
EGCLK (IT8301 Clock connect)
I
PWR_SW#
-
I
LID_SW#
CAP_ACK#
I
-
EXP_GATE#
I
TP_CLK
I
TP_DAT
IO
THRO_CPU
O
-
PM_SUSB#
I
-
IO
PM_CLKRUN#
-
O
GFX_VR_ON
O
BAT_LEARN
-
O
NUM_LED#
O
-
I
SUS_PWRGD
I
ALL_SYSTEM_PWRGD
I
VRM_PWRGD
I
GFX_VR
I
ALS_AD
-
-
O
CPU_VRON
O
PM_PWROK
O
VSET_EC
O
ISET_EC GPJ3
O
TP_LED
3
2
EC
IT8301
2
1
GPIO0 ME_PM_SLP_M#
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
I
I
I
I
O
O
O
Signal Name Use As EC GPIO
ME_SusPwrDnAck
-
ME_+VM_PWRGD
ME_PM_SLP_LAN#
ME_AC_PRESENT
-
-
-
-
ME_PWROK
ME_SLP_M_EC#
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
SM_BUS ADDRESS :
PCH Master
SM-Bus Device
Clock Generator(ICS9LPR362)
SO-DIMM 0 1010000x ( A0 )
SO-DIMM 1
VID Controller(ASM8272)
WiFi/WiMax
EC Master (SMB1)
SM-Bus Device
CPU Thermal Sensor(G780) 1001100x ( 98 )
Minicard TV Tuner
PCIE 1
PCIE 2
Minicard WLAN
PCIE 3
Newcard
PCIE 4
PCIE 5
ESATA (for pre-ES1)
PCIE 6
GLAN
PCIE 7
PCIE 8
SATA 0
SATA HDD (1)
SATA1
SATA ODD
SATA HDD (2)
SATA4
SATA5
ESATA
ASUSTeK COMPUTER INC. NB4
ASUSTeK COMPUTER INC. NB4
ASUSTeK COMPUTER INC. NB4
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
SM-Bus Address
1101001x ( D2 )
1010001x ( A2 )
0011011x ( 36 )
N/A
SM-Bus Address
1001101x ( 9A ) VGA Thermal IC(G781-1)
USB 0
USB Port (1)
USB Port (2)
USB 1
USB 2
USB Port (3)
USB Port (4)
USB 3
CMOS Camera
USB 4
USB 5
NewCard
Minicard TV Tuner
USB 6
USB 7
USB 8
USB 9
WLAN
USB 10
USB 11
USB 12
Bluetooth
USB 13
Finger Printer
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
M60JV
M60JV
M60JV
1
System Setting
System Setting
System Setting
CH_Lin
CH_Lin
CH_Lin
2 96 Thursday, November 12, 2009
2 96 Thursday, November 12, 2009
2 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
U0301A
U0301A
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
A24
C23
B22
A21
B24
D23
B23
A22
D24
G24
F23
H23
D25
F24
E23
G23
E22
D21
D19
D18
G21
E19
F21
G18
D22
C21
D20
C18
G22
E20
F20
G19
F17
E17
C17
F18
D17
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
FDI_FSYNC[0]
FDI_FSYNC[1]
FDI_INT
FDI_LSYNC[0]
FDI_LSYNC[1]
SOCKET989
SOCKET989
DMI_TXN0 (22)
DMI_TXN1 (22)
DMI_TXN2 (22)
DMI_TXN3 (22)
DMI_TXP0 (22)
DMI_TXP1 (22)
DMI_TXP2 (22)
DMI_TXP3 (22)
DMI_RXN0 (22)
DMI_RXN1 (22)
DMI_RXN2 (22)
D D
C C
DMI_RXN3 (22)
DMI_RXP0 (22)
DMI_RXP1 (22)
DMI_RXP2 (22)
DMI_RXP3 (22)
FDI_TXN[7:0] (22)
FDI_TXP[7:0] (22)
FDI_FSYNC0 (22)
FDI_FSYNC1 (22)
FDI_INT (22)
FDI_LSYNC0 (22)
FDI_LSYNC1 (22)
For Intel GFX display
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
DMI Intel(R) FDI
DMI Intel(R) FDI
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
B26
A26
B27
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_IRCOMP_R
EXP_RBIAS
PCIENB_RXN15
PCIENB_RXN14
PCIENB_RXN13
PCIENB_RXN12
PCIENB_RXN11
PCIENB_RXN10
PCIENB_RXN9
PCIENB_RXN8
PCIENB_RXN7
PCIENB_RXN6
PCIENB_RXN5
PCIENB_RXN4
PCIENB_RXN3
PCIENB_RXN2
PCIENB_RXN1
PCIENB_RXN0
PCIENB_RXP15
PCIENB_RXP14
PCIENB_RXP13
PCIENB_RXP12
PCIENB_RXP11
PCIENB_RXP10
PCIENB_RXP9
PCIENB_RXP8
PCIENB_RXP7
PCIENB_RXP6
PCIENB_RXP5
PCIENB_RXP4
PCIENB_RXP3
PCIENB_RXP2
PCIENB_RXP1
PCIENB_RXP0
PCIENB_TXN15
PCIENB_TXN14
PCIENB_TXN13
PCIENB_TXN12
PCIENB_TXN11
PCIENB_TXN10
PCIENB_TXN9
PCIENB_TXN8
PCIENB_TXN7
PCIENB_TXN6
PCIENB_TXN5
PCIENB_TXN4
PCIENB_TXN3
PCIENB_TXN2
PCIENB_TXN1
PCIENB_TXN0
PCIENB_TXP15
PCIENB_TXP14
PCIENB_TXP13
PCIENB_TXP12
PCIENB_TXP11
PCIENB_TXP10
PCIENB_TXP9
PCIENB_TXP8
PCIENB_TXP7
PCIENB_TXP6
PCIENB_TXP5
PCIENB_TXP4
PCIENB_TXP3
PCIENB_TXP2
PCIENB_TXP1
PCIENB_TXP0
4
R0301 49.9Ohm1%R0301 49.9Ohm1%
1 2
R0302 750Ohm1%R0302 750Ohm1%
1 2
CX0316 0.1UF/16V C X0316 0.1UF/16V
1 2
CX0315 0.1UF/16V C X0315 0.1UF/16V
1 2
CX0314 0.1UF/16V C X0314 0.1UF/16V
1 2
CX0313 0.1UF/16V C X0313 0.1UF/16V
1 2
CX0312 0.1UF/16V C X0312 0.1UF/16V
1 2
CX0311 0.1UF/16V C X0311 0.1UF/16V
1 2
CX0310 0.1UF/16V C X0310 0.1UF/16V
1 2
CX0309 0.1UF/16V C X0309 0.1UF/16V
1 2
CX0308 0.1UF/16V C X0308 0.1UF/16V
1 2
CX0307 0.1UF/16V C X0307 0.1UF/16V
1 2
CX0306 0.1UF/16V C X0306 0.1UF/16V
1 2
CX0305 0.1UF/16V C X0305 0.1UF/16V
1 2
CX0304 0.1UF/16V C X0304 0.1UF/16V
1 2
CX0303 0.1UF/16V C X0303 0.1UF/16V
1 2
CX0302 0.1UF/16V C X0302 0.1UF/16V
1 2
CX0301 0.1UF/16V C X0301 0.1UF/16V
1 2
CX0332 0.1UF/16V C X0332 0.1UF/16V
1 2
CX0331 0.1UF/16V C X0331 0.1UF/16V
1 2
CX0330 0.1UF/16V C X0330 0.1UF/16V
1 2
CX0329 0.1UF/16V C X0329 0.1UF/16V
1 2
CX0328 0.1UF/16V C X0328 0.1UF/16V
1 2
CX0327 0.1UF/16V C X0327 0.1UF/16V
1 2
CX0326 0.1UF/16V C X0326 0.1UF/16V
1 2
CX0325 0.1UF/16V C X0325 0.1UF/16V
1 2
CX0324 0.1UF/16V C X0324 0.1UF/16V
1 2
CX0323 0.1UF/16V C X0323 0.1UF/16V
1 2
CX0322 0.1UF/16V C X0322 0.1UF/16V
1 2
CX0321 0.1UF/16V C X0321 0.1UF/16V
1 2
CX0320 0.1UF/16V C X0320 0.1UF/16V
1 2
CX0319 0.1UF/16V C X0319 0.1UF/16V
1 2
CX0318 0.1UF/16V C X0318 0.1UF/16V
1 2
CX0317 0.1UF/16V C X0317 0.1UF/16V
1 2
PCIENB_RXN[15:0] (75)
R0370,R0371,R0372 near U0301
PCIENB_RXP[15:0] (75)
For EC request, to read PECI via EC.
Connection: R0317.2-->Q0301.1-->U3001.118
PCIEG_RXN15
PCIEG_RXN14
PCIEG_RXN13
PCIEG_RXN12
PCIEG_RXN11
PCIEG_RXN10
PCIEG_RXN9
PCIEG_RXN8
PCIEG_RXN7
PCIEG_RXN6
PCIEG_RXN5
PCIEG_RXN4
PCIEG_RXN3
PCIEG_RXN2
PCIEG_RXN1
PCIEG_RXN0
PCIEG_RXP15
PCIEG_RXP14
PCIEG_RXP13
PCIEG_RXP12
PCIEG_RXP11
PCIEG_RXP10
PCIEG_RXP9
PCIEG_RXP8
PCIEG_RXP7
PCIEG_RXP6
PCIEG_RXP5
PCIEG_RXP4
PCIEG_RXP3
PCIEG_RXP2
PCIEG_RXP1
PCIEG_RXP0
PCIEG_RXN[15:0] (75)
PCIEG_RXP[15:0] (75)
3
2
1
Main Board
U0301B
1 2
C0304
C0304
@
@
0.1UF/10V
0.1UF/10V
AT23
AT24
AT26
AH24
AK14
AT15
AN26
AK15
AP26
AL15
AN14
AN27
AK13
AM15
AM26
AL14
G16
U0301B
COMP3
COMP2
COMP1
COMP0
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD
RSTIN#
SOCKET989
SOCKET989
MISC THERMAL
MISC THERMAL
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
SM_DRAMRST#
PM_EXT_TS#[0]
PM_EXT_TS#[1]
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TMS
TDI
TDO
A16
B16
AR30
AT30
E16
D16
A18
A17
F6
AL1
AM1
AN1
AN15
AP15
+VTT_CPU
AT28
AP27
AN28
AP28
AT27
AT29
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
CLKDREF
CLKDREF#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
R0331 100Ohm1%R0331 100Ohm1%
R0332 24.9Ohm1%R0332 24.9Ohm1%
R0333 130Ohm1%R0333 130Ohm1%
PM_EXTTS#1
RN0301A 10KOhm RN0301A 10KOhm
RN0301B 10KOhm RN0301B 10KOhm
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
BCLK_CPU_P_PCH (25)
BCLK_CPU_N_PCH (25)
CLK_ITP_BCLK (7)
CLK_ITP_BCLK# (7)
CLK_DMI_PCH (21)
1 2
1 2
1 2
1 2
3 4
CLK_DMI#_PCH (21)
1 2
1 2
M_DRAMRST# (16,17)
PM_EXTTS#0 (16,17)
XDP_PRDY# (7)
XDP_PREQ# (7)
XDP_TCLK (7)
XDP_TMS (7)
XDP_TRST# (7)
IPU
IPU
XDP_DBRESET# (7,22)
R0366 1KOhm R0366 1KOhm
R0367 1KOhm R0367 1KOhm
5 6
10KOhm
10KOhm
7 8
10KOhm
10KOhm
IPU
RN0301C
RN0301C
RN0301D
RN0301D
IPU
IPU
IPU
IPU
XDP_OBS[7:0] (7)
R0303 20Ohm1%R0303 20Ohm1%
R0304 20Ohm1%R0304 20Ohm1%
R0305 49.9Ohm1%R 0305 49.9Ohm1%
R0306 49.9Ohm1%R 0306 49.9Ohm1%
+VTT_CPU
R0307 49.9Ohm1%R 0307 49.9Ohm1%
H_PECI (25)
H_THRMTRIP# (32)
H_XDPRST# (7)
PM_SYNC# (22)
H_CPUPWRGD (7,25)
H_DRAM_PWRGD (22)
H_VTTPWRGD (32)
H_PWRGD_XDP (7)
BUF_PLT_RST# (24,30,32,41,53,75)
R0318
R0318
1 2
1.5KOhm 1%
1.5KOhm 1%
1 2
1 2
1 2
1 2
T0301T0301
1 2
H_PROCHOT_S#
PLT_RST#_R
1 2
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TP_SKTOCC#
1
H_CATERR#
R0319
R0319
1%
1%
750Ohm
750Ohm
+VTT_CPU
H_CPUPWRGD
B B
H_DRAM_PWRGD
H_VTTPWRGD
C0301 0.1UF/10V@C0301 0.1UF/10V@
1 2
C0302 0.1UF/10V@C0302 0.1UF/10V@
1 2
C0303 0.1UF/10V@C0303 0.1UF/10V@
1 2
Stuff these res istors for disa ble IGPU
DRAMPWROK: (WW35 MoW)
FDI_FSYNC0
R0398 1KOhm@R0398 1KOhm@
1 2
FDI_FSYNC1
R0397 1KOhm@R0397 1KOhm@
1 2
FDI_LSYNC0
R0396 1KOhm@R0396 1KOhm@
1 2
FDI_LSYNC1
R0395 1KOhm@R0395 1KOhm@
1 2
FDI_INT
R0399 1KOhm@R0399 1KOhm@
1 2
A A
5
4
Choose either one solution: -->Choose solution 2
1. This pin should have an external pull-up of 1K Ohms
to 10K Ohms to a rail of 1.05/1.1V which is ON in S0-S3
2. Connect this pin through a voltage divider circuit;
recommend 4.75K Ohms pull- up to DDR3 Power Rail
(VDDQ) of +V1.5U and a 12K Ohms pull-down to
ground to convert to processor’s VTT level.
+1.5V
R0320
R0320
1%
1%
1.1KOHM
1.1KOHM
H_DRAM_PWRGD
1 2
1 2
R0321
R0321
1%
1%
3KOhm
3KOhm
3
H_XDPRST#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
H_PROCHOT_S#
R0313 68OHM@R0313 68OHM@
R0345 51Ohm@R0345 51Ohm@
R0346 51Ohm@R0346 51Ohm@
R0347 51Ohm@R0347 51Ohm@
R0348 51Ohm@R0348 51Ohm@
R0354 49.9Ohm1%R0354 49.9Ohm1%
+VTT_CPU
1 2
3 2
3
3
D
D
S
S
2
2
1 2
1 2
1 2
1 2
1 2
R0322
R0322
68OHM
68OHM
Q0301
Q0301
2N7002
2N7002
1
1
1
G
G
1 2
THRO_CPU (30)
2
JTAG MAPPING
XDP_TDI_R
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
R0349 0Ohm/XDPR 0349 0Ohm/XDP
1 2
R0350 0Ohm
R0350 0Ohm
1 2
@
1 2
@
R0351
R0351
0Ohm
0Ohm
/XDP
/XDP
R0352 0Ohm@R0352 0Ohm@
1 2
R0353 0Ohm/XDPR 0353 0Ohm/XDP
1 2
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
Engineer:
Engineer:
M60JV
M60JV
M60JV
1
XDP_TDI (7)
XDP_TDO (7)
Title :
Title :
Title :
CPU(1)_DMI,PEG,FDI,CLK,MISC
CPU(1)_DMI,PEG,FDI,CLK,MISC
CPU(1)_DMI,PEG,FDI,CLK,MISC
CH_Lin
CH_Lin
CH_Lin
Rev
Rev
Rev
1.01
1.01
1.01
3 96 Thursday, November 12, 2009
3 96 Thursday, November 12, 2009
3 96 Thursday, November 12, 2009
5
4
3
2
1
Main Board
U0301C
U0301C
U0301D
U0301D
AA6
SA_CK[0]
M_A_DQ[63:0] (16)
D D
C C
B B
M_A_DQ0
A10
AM10
AR11
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AR14
AP14
AJ10
AL10
AK12
AK11
AL11
AL13
SA_DQ[0]
C10
SA_DQ[1]
C7
SA_DQ[2]
A7
SA_DQ[3]
B10
SA_DQ[4]
D10
SA_DQ[5]
E10
SA_DQ[6]
A8
SA_DQ[7]
D8
SA_DQ[8]
F10
SA_DQ[9]
E6
SA_DQ[10]
F7
SA_DQ[11]
E9
SA_DQ[12]
B7
SA_DQ[13]
E7
SA_DQ[14]
C6
SA_DQ[15]
H10
SA_DQ[16]
G8
SA_DQ[17]
K7
SA_DQ[18]
J8
SA_DQ[19]
G7
SA_DQ[20]
G10
SA_DQ[21]
J7
SA_DQ[22]
J10
SA_DQ[23]
L7
SA_DQ[24]
M6
SA_DQ[25]
M8
SA_DQ[26]
L9
SA_DQ[27]
L6
SA_DQ[28]
K8
SA_DQ[29]
N8
SA_DQ[30]
P9
SA_DQ[31]
AH5
SA_DQ[32]
AF5
SA_DQ[33]
AK6
SA_DQ[34]
AK7
SA_DQ[35]
AF6
SA_DQ[36]
AG5
SA_DQ[37]
AJ7
SA_DQ[38]
AJ6
SA_DQ[39]
SA_DQ[40]
AJ9
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
AK8
SA_DQ[44]
AL7
SA_DQ[45]
SA_DQ[46]
AL8
SA_DQ[47]
AN8
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
AM9
SA_DQ[52]
AN9
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
AC3
SA_BS[0]
AB2
SA_BS[1]
U7
SA_BS[2]
AE1
SA_CAS#
AB3
SA_RAS#
AE9
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_BS0 (16)
M_A_BS1 (16)
M_A_BS2 (16)
M_A_CAS# (16)
M_A_RAS# (16)
M_A_WE# (16)
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_CLK_DDR0 (16)
M_CLK_DDR#0 (16)
M_CKE0 (16)
M_CLK_DDR1 (16)
M_CLK_DDR#1 (16)
M_CKE1 (16)
M_CS#0 (16)
M_CS#1 (16)
M_ODT0 (16)
M_ODT1 (16)
M_A_DM[7:0] (16)
M_A_DQS#[7:0] (16)
M_A_DQS[7:0] (16)
M_A_A[15:0] (16)
M_B_DQ[63:0] (17)
M_B_DQ0
B5
AR10
AT10
SB_DQ[0]
A5
SB_DQ[1]
C3
SB_DQ[2]
B3
SB_DQ[3]
E4
SB_DQ[4]
A6
SB_DQ[5]
A4
SB_DQ[6]
C4
SB_DQ[7]
D1
SB_DQ[8]
D2
SB_DQ[9]
F2
SB_DQ[10]
F1
SB_DQ[11]
C2
SB_DQ[12]
F5
SB_DQ[13]
F3
SB_DQ[14]
G4
SB_DQ[15]
H6
SB_DQ[16]
G2
SB_DQ[17]
J6
SB_DQ[18]
J3
SB_DQ[19]
G1
SB_DQ[20]
G5
SB_DQ[21]
J2
SB_DQ[22]
J1
SB_DQ[23]
J5
SB_DQ[24]
K2
SB_DQ[25]
L3
SB_DQ[26]
M1
SB_DQ[27]
K5
SB_DQ[28]
K4
SB_DQ[29]
M4
SB_DQ[30]
N5
SB_DQ[31]
AF3
SB_DQ[32]
AG1
SB_DQ[33]
AJ3
SB_DQ[34]
AK1
SB_DQ[35]
AG4
SB_DQ[36]
AG3
SB_DQ[37]
AJ4
SB_DQ[38]
AH4
SB_DQ[39]
AK3
SB_DQ[40]
AK4
SB_DQ[41]
AM6
SB_DQ[42]
AN2
SB_DQ[43]
AK5
SB_DQ[44]
AK2
SB_DQ[45]
AM4
SB_DQ[46]
AM3
SB_DQ[47]
AP3
SB_DQ[48]
AN5
SB_DQ[49]
AT4
SB_DQ[50]
AN6
SB_DQ[51]
AN4
SB_DQ[52]
AN3
SB_DQ[53]
AT5
SB_DQ[54]
AT6
SB_DQ[55]
AN7
SB_DQ[56]
AP6
SB_DQ[57]
AP8
SB_DQ[58]
AT9
SB_DQ[59]
AT7
SB_DQ[60]
AP9
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
AB1
SB_BS[0]
W5
SB_BS[1]
R7
SB_BS[2]
AC5
SB_CAS#
Y7
SB_RAS#
AC6
SB_WE#
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS0 (17)
M_B_BS1 (17)
M_B_BS2 (17)
M_B_CAS# (17)
M_B_RAS# (17)
M_B_WE# (17)
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
W8
W9
M3
V7
V6
M2
AB8
AD6
AC7
AD1
M_B_DM0
D4
M_B_DM1
E1
M_B_DM2
H3
M_B_DM3
K1
M_B_DM4
AH1
M_B_DM5
AL2
M_B_DM6
AR4
M_B_DM7
AT8
M_B_DQS#0
D5
M_B_DQS#1
F4
M_B_DQS#2
J4
M_B_DQS#3
L4
M_B_DQS#4
AH2
M_B_DQS#5
AL4
M_B_DQS#6
AR5
M_B_DQS#7
AR8
M_B_DQS0
C5
M_B_DQS1
E3
M_B_DQS2
H4
M_B_DQS3
M5
M_B_DQS4
AG2
M_B_DQS5
AL5
M_B_DQS6
AP5
M_B_DQS7
AR7
M_B_A0
U5
M_B_A1
V2
M_B_A2
T5
M_B_A3
V3
M_B_A4
R1
M_B_A5
T8
M_B_A6
R2
M_B_A7
R6
M_B_A8
R4
M_B_A9
R5
M_B_A10
AB5
M_B_A11
P3
M_B_A12
R3
M_B_A13
AF7
M_B_A14
P5
M_B_A15
N1
M_CLK_DDR2 (17)
M_CLK_DDR#2 (17)
M_CKE2 (17)
M_CLK_DDR3 (17)
M_CLK_DDR#3 (17)
M_CKE3 (17)
M_CS#2 (17)
M_CS#3 (17)
M_ODT2 (17)
M_ODT3 (17)
M_B_DM[7:0] (17)
M_B_DQS#[7:0] (17)
M_B_DQS[7:0] (17)
M_B_A[15:0] (17)
SOCKET989
SOCKET989
SOCKET989
SOCKET989
A A
Title :
Title :
Title :
CPU(2)_DDR3
CPU(2)_DDR3
CPU(2)_DDR3
CH_Lin
CH_Lin
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
1
CH_Lin
4 96 Thursday, November 12, 2009
4 96 Thursday, November 12, 2009
4 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
4
3
2
1
Main Board
D D
CFG[0:17] : IPU
CFG3
CFG7
C C
B B
AP25
AL25
AL24
AL22
AJ33
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
AG9
M27
L28
J17
H17
G25
G17
E31
E30
H16
B19
A19
A20
B20
AC9
AB9
J29
J28
A34
A33
C35
B35
U9
T9
C1
A3
U0301E
U0301E
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
SOCKET989
SOCKET989
AJ13
RSVD32
AJ12
RSVD33
AH25
RSVD34
AK26
RSVD35
AL26
RSVD36
AR2
RSVD37
AJ26
RSVD38
AJ27
RSVD39
AP1
RSVD40
AT2
RSVD41
AT3
RSVD42
AR1
RSVD43
AL28
RSVD45
AL29
RSVD46
AP30
RSVD47
AP32
RSVD48
AL27
RSVD49
AT31
RSVD50
AT32
RSVD51
AP33
RSVD52
AR33
RSVD53
AT33
RSVD54
AT34
RSVD55
AP35
RSVD56
AR35
RSVD57
AR32
RSVD58
E15
RSVD59
F15
RSVD60
RSVD61
RSVD62
RSVD63
RSVD64
RSVD65
RSVD66
RSVD67
RSVD68
RSVD69
RSVD70
RSVD71
RSVD72
RSVD73
RSVD74
RSVD75
RSVD76
RSVD77
RSVD78
RSVD79
RSVD80
RSVD81
RSVD82
RSVD83
RSVD84
RSVD85
RSVD86
A2
D15
C15
AJ15
AH15
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
RESERVED
RESERVED
CFG strapping information:
CFG[1:0]: PCI Express Port Bifurcation:(Clarksfield Only)
- 11 = 1 x 16 PEG (Default)
- 10 = 2 x 8 PEG
CFG[3]: PCIE Static Numbering Lane Reversal.(Arrandale Only)
- 1:Normal Operation (Default)
- 0:Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
CFG[4]: Embedded DisplayPort Detection.(Arrandale Only)
- 1:Disabled - No Physical Display Port attached to Embedded DisplayPort
- 0:Enabled - An external Display Port device is connected to the Embedded Display Port
CFG[7]: Fixed for PCI Express 2.0 jitter specifications.(Clarksfi eld)
Clarksfield (only for early samples pre-ES1) - Connect to GND with 3.01K Ohm /5% resistor
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not impact Arrandale functionality.
Unmount if Intel has fixed this issue.
A A
CFG3
R0544 3KOhm1%R0544 3KOhm1%
CFG7
1 2
R0538 3KOhm 1% @R0538 3KOhm 1% @
1 2
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AP20
AP17
AP13
AP10
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AL34
AL31
AL23
AL20
AL17
AL12
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AG10
AE35
U0301H
AR9
AR6
AR3
AP7
AP4
AP2
AM8
AM5
AM2
AL9
AL6
AL3
AJ8
AJ5
AJ2
AH9
AH6
AH3
AF8
AF4
AF2
U0301H
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
SOCKET989
SOCKET989
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
CFG strapping information:
For Arrandale For Clarksfield
K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9
U0301I
U0301I
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
SOCKET989
SOCKET989
VSS
VSS
AT35
VSS_NCTF1
AT1
VSS_NCTF2
AR34
VSS_NCTF3
B34
VSS_NCTF4
B2
VSS_NCTF5
B1
VSS_NCTF6
A35
VSS_NCTF7
NCTF
NCTF
Note: (Auburndale)Hardware Straps are sampled on
the asserting edge of VCCPWRGOOD_0 and
VCCPWRGOOD_1 and latched inside the processor.
Note: (Clarksfield)Hardware Straps are sampled
after RSTIN# de-assertion.
5
Title :
Title :
Title :
CPU(3)_CFG,RSVD,GND
CPU(3)_CFG,RSVD,GND
CPU(3)_CFG,RSVD,GND
CH_Lin
CH_Lin
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
1
CH_Lin
5 96 Thursday, November 12, 2009
5 96 Thursday, November 12, 2009
5 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
U0301F
U0301F
+VCORE
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
Max 48A
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
SOCKET989
SOCKET989
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VSS_SENSE_VTT
SENSE LINES
SENSE LINES
D D
C C
B B
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VTT_SELECT
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
PSI#
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
AN33
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
G15
VTT_TEST TBD
AN35
AJ34
AJ35
B15
A15
Max 18A
+VTT_CPU
VTT_SELECT
I_MON (88)
VTT_SENSE
TP_VSS_SENSE_VTT
PM_PSI# (88)
PM_DPRSLPVR (88)
1
VCCSENSE (88)
VSSSENSE (88)
1
1
VR_VID0 (88)
VR_VID1 (88)
VR_VID2 (88)
VR_VID3 (88)
VR_VID4 (88)
VR_VID5 (88)
VR_VID6 (88)
T633T633
T0632T0632
T0631T0631
4
+VGFX_CORE
+VTT_CPU
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
J24
J23
H25
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
U0301G
U0301G
VCCAXG1
VCCAXG2
VCCAXG3
VCCAXG4
VCCAXG5
VCCAXG6
VCCAXG7
VCCAXG8
VCCAXG9
VCCAXG10
VCCAXG11
VCCAXG12
VCCAXG13
VCCAXG14
VCCAXG15
VCCAXG16
VCCAXG17
VCCAXG18
VCCAXG19
VCCAXG20
VCCAXG21
VCCAXG22
VCCAXG23
VCCAXG24
VCCAXG25
VCCAXG26
VCCAXG27
VCCAXG28
VCCAXG29
VCCAXG30
VCCAXG31
VCCAXG32
VCCAXG33
VCCAXG34
VCCAXG35
VCCAXG36
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VTT52
VTT53
VTT54
VTT55
VTT56
VTT57
VTT58
SOCKET989
SOCKET989
3
2
1
Main Board
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
GFX_VR_EN
GFX_IMON
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VTT59
VTT60
VTT61
VTT62
VTT63
VTT64
VTT65
VTT66
VTT67
VTT68
VCCPLL1
VCCPLL2
VCCPLL3
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
J22
J20
J18
H21
H20
H19
L26
L27
M26
VCCAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GRAPHICS
GRAPHICS
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V 1.8V
1.1V 1.8V
GVR_VID0
GVR_VID1
GVR_VID2
GVR_VID3
GVR_VID4
GVR_VID5
GVR_VID6
+1.5V
+VTT_CPU
Imax=1.35A
1 2
C0628
C0628
0.1UF/16V
0.1UF/16V
VCC_AXG_SENSE (92)
VSS_AXG_SENSE (92)
GVR_VID[0:6] (92)
R0605 4.7KOhm R0605 4.7KOhm
1 2
GVR_PWR_MON (92)
GVR_PWR_MON
R0613 1KOhm R0613 1KOhm
1 2
1 2
C0629
C0629
1UF/10V
1UF/10V
GFXVR_DPRSLPVR (92)
R0606 4.7KOhm R0606 4.7KOhm
1 2
1 2
PL0601
PL0601
2 1
70Ohm/100Mhz
70Ohm/100Mhz
C0667
C0667
10UF/6.3V
10UF/6.3V
GFX_VRON (87,92)
+1.8VS +1.8VS_HPLL
1 2
C7113
C7113
@
@
0.1UF/10V
0.1UF/10V
+VTT_CPU
Processor Decoupling
Decoupling guide from Intel
Schematic R0.9: Schematic Checklist R0.7:
VCORE 22uF * 16pcs
10uF * 16pcs
+VCORE
+VGFX_CORE
1 2
C0650
C0650
22UF/6.3V
22UF/6.3V
+1.5V
1 2
C0621
C0621
N/A
N/A
27PF/50V
27PF/50V
1 2
1 2
C0617
C0617
@
@
22UF/6.3V
22UF/6.3V
C0613
C0613
10UF/6.3V
10UF/6.3V
470uF* 6pcs(2 no stuff).
1 2
1 2
1 2
C0633
C0633
C0632
C0632
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
1 2
1 2
C0641
C0641
C0640
C0640
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
8/5 delete C0646 (22UF,6.3V) for layout placement.
(+1.8VS,VCCPLL)
1 2
1 2
C0678
C0678
C0677
C0677
@
@
@
@
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
1 2
1 2
C0648
C0648
C0651
C0651
@
@
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
1 2
C0622
C0622
1UF/10V
1UF/10V
Intel use 22u
1 2
C0618
C0618
@
@
22UF/6.3V
22UF/6.3V
1 2
C0615
C0615
@
@
10UF/6.3V
10UF/6.3V
1 2
C0623
C0623
N/A
N/A
27PF/50V
27PF/50V
1 2
1 2
1 2
C0655
C0655
@
@
22UF/6.3V
22UF/6.3V
C0616
C0616
@
@
10UF/6.3V
10UF/6.3V
1 2
1 2
1 2
C0624
C0624
@
@
1UF/10V
1UF/10V
C0634
C0634
22UF/6.3V
22UF/6.3V
C0642
C0642
22UF/6.3V
22UF/6.3V
C0671
C0671
@
@
10UF/6.3V
10UF/6.3V
C0679
C0679
@
@
10UF/6.3V
10UF/6.3V
1 2
C0649
C0649
22UF/6.3V
22UF/6.3V
1 2
1 2
1 2
1 2
1 2
1 2
C0625
C0625
1UF/10V
1UF/10V
C0656
C0656
@
@
22UF/6.3V
22UF/6.3V
C0687
C0687
@
@
10UF/6.3V
10UF/6.3V
C0635
C0635
22UF/6.3V
22UF/6.3V
C0643
C0643
22UF/6.3V
22UF/6.3V
C0680
C0680
@
@
10UF/6.3V
10UF/6.3V
1 2
C0619
C0619
@
@
10UF/6.3V
10UF/6.3V
1 2
VCORE 22uF * 12pcs
10uF * 16pcs
470uF* 6pcs(2 no stuff).
1 2
C0636
C0636
22UF/6.3V
22UF/6.3V
1 2
C0644
C0644
22UF/6.3V
22UF/6.3V
1 2
C0673
C0673
@
@
10UF/6.3V
10UF/6.3V
1 2
C0681
C0681
@
@
10UF/6.3V
10UF/6.3V
1 2
C0620
C0620
10UF/6.3V
10UF/6.3V
1 2
C0685
C0685
C0686
C0686
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
1 2
C0657
C0657
@
@
22UF/6.3V
22UF/6.3V
1 2
C0688
C0688
@
@
10UF/6.3V
10UF/6.3V
1 2
1 2
C0637
C0637
22UF/6.3V
22UF/6.3V
1 2
C0645
C0645
22UF/6.3V
22UF/6.3V
1 2
1 2
C0674
C0674
@
@
10UF/6.3V
10UF/6.3V
1 2
1 2
C0682
C0682
@
@
10UF/6.3V
10UF/6.3V
1 2
CE0604
CE0604
+
+
@
@
330UF/2V
330UF/2V
PANASONIC/EEFSX0D331XE
PANASONIC/EEFSX0D331XE
ESR=6mOhm/Ir=3A
ESR=6mOhm/Ir=3A
1 2
C0626
C0626
10UF/6.3V
10UF/6.3V
C0638
C0638
22UF/6.3V
22UF/6.3V
C0675
C0675
@
@
10UF/6.3V
10UF/6.3V
C0683
C0683
@
@
10UF/6.3V
10UF/6.3V
Intel use 22u
1 2
1 2
1 2
1 2
1 2
C0627
C0627
@
@
10UF/6.3V
10UF/6.3V
C0639
C0639
22UF/6.3V
22UF/6.3V
C0647
C0647
22UF/6.3V
22UF/6.3V
C0676
C0676
@
@
10UF/6.3V
10UF/6.3V
C0684
C0684
@
@
10UF/6.3V
10UF/6.3V
1 2
C0654
C0654
10UF/6.3V
10UF/6.3V
A A
5
4
3
2
1 2
C0601
C0601
@
@
10UF/6.3V
10UF/6.3V
1 2
C0602
C0602
@
@
10UF/6.3V
10UF/6.3V
1 2
C0604
C0604
@
@
10UF/6.3V
10UF/6.3V
1 2
C0606
C0606
@
@
10UF/6.3V
10UF/6.3V
1 2
C0611
C0611
@
@
10UF/6.3V
10UF/6.3V
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
C0665
C0665
10UF/6.3V
10UF/6.3V
M60JV
M60JV
M60JV
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
1 2
C0664
C0664
10UF/6.3V
10UF/6.3V
1 2
C0658
C0658
10UF/6.3V
10UF/6.3V
Intel use 22u Intel use 22u
CPU(4)_PWR
CPU(4)_PWR
CPU(4)_PWR
CH_Lin
CH_Lin
CH_Lin
6 96 Thursday, November 12, 2009
6 96 Thursday, November 12, 2009
6 96 Thursday, November 12, 2009
1 2
C0659
C0659
10UF/6.3V
10UF/6.3V
Rev
Rev
Rev
1.01
1.01
1.01
5
4
3
2
1
Main Board
D D
C C
CPU XDP connector
XDP1
XDP1
1
2
1
2
3
XDP_PREQ# (3)
XDP_PRDY# (3)
XDP_OBS0 (3)
XDP_OBS1 (3)
XDP_OBS2 (3)
B B
H_CPUPWRGD (3,25)
H_PWRGD_XDP (3)
Update 1105 (R2 .0)
A A
5
XDP_OBS3 (3)
XDP_OBS4 (3)
XDP_OBS5 (3)
XDP_OBS6 (3)
XDP_OBS7 (3)
R0708 1KOhm/XDPR0708 1KOhm/XDP
R712 49.9Ohm/XD PR712 49.9Ohm/XDP
T0701T0701
XDP_TCLK (3)
CPUPWRGD_XDP
1 2
HOOK1
1 2
PCIE_CLK_XDP_P XDP_RST#_R
PCIE_CLK_XDP_N
1
SMB_DAT_XDP
T702T702
1
SMB_CLK_XDP
T703T703
1
4
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
NP_NC1
BtoB_CON_60P
BtoB_CON_60P
/XDP
/XDP
NP_NC2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
R0707 1KOhm/XDPR0707 1KOhm/XDP
3
1 2
XDP_TRST# (3)
XDP_TDI (3)
XDP_TMS (3)
CLK_ITP_BCLK (3)
CLK_ITP_BCLK# (3)
+VTT_CPU +VTT_CPU
H_XDPRST# (3)
1 2
R0711
R0711
49.9Ohm
49.9Ohm
/XDP
/XDP
XDP_DBRESET# (3,22)
XDP_TDO (3)
2
Title :
Title :
Title :
CPU(5)_XDP
CPU(5)_XDP
CPU(5)_XDP
CH_Lin
CH_Lin
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
1
CH_Lin
7 96 Thursday, November 12, 2009
7 96 Thursday, November 12, 2009
7 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
D D
C C
4
3
2
1
B B
A A
NB_****
NB_****
NB_****
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
CH_Lin
CH_Lin
CH_Lin
8 96 Thursday, November 12, 2009
8 96 Thursday, November 12, 2009
1
8 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
4
3
2
1
Main Board
D D
C C
B B
A A
Title :
Title :
Title :
NB_****
NB_****
NB_****
CH_Lin
CH_Lin
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
CH_Lin
Rev
Rev
Rev
1.01
1.01
9 96 Thursday, November 12, 2009
9 96 Thursday, November 12, 2009
1
9 96 Thursday, November 12, 2009
1.01
5
4
3
2
1
Main Board
D D
C C
B B
A A
Title :
Title :
Title :
NB_****
NB_****
NB_****
CH_Lin
CH_Lin
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
CH_Lin
Rev
Rev
Rev
1.01
1.01
10 96 Thursday, November 12, 2009
10 96 Thursday, November 12, 2009
1
10 96 Thursday, November 12, 2009
1.01
5
4
3
2
1
Main Board
D D
C C
B B
A A
Title :
Title :
Title :
NB_****
NB_****
NB_****
CH_Lin
CH_Lin
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
CH_Lin
Rev
Rev
Rev
1.01
1.01
11 96 Thursday, November 12, 2009
11 96 Thursday, November 12, 2009
1
11 96 Thursday, November 12, 2009
1.01
5
4
3
2
1
Main Board
D D
C C
B B
A A
Title :
Title :
Title :
NB_****
NB_****
NB_****
CH_Lin
CH_Lin
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
CH_Lin
Rev
Rev
Rev
1.01
1.01
12 96 Thursday, November 12, 2009
12 96 Thursday, November 12, 2009
1
12 96 Thursday, November 12, 2009
1.01
5
4
3
2
1
Main Board
D D
C C
B B
A A
Title :
Title :
Title :
NB_****
NB_****
NB_****
CH_Lin
CH_Lin
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
M60JV
M60JV
M60JV
CH_Lin
Rev
Rev
Rev
1.01
1.01
13 96 Thursday, November 12, 2009
13 96 Thursday, November 12, 2009
1
13 96 Thursday, November 12, 2009
1.01
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Thursday, November 12, 2009
Date: Sheet of
Thursday, November 12, 2009
Date: Sheet of
5
4
3
Thursday, November 12, 2009
2
M60JV
M60JV
M60JV
Engineer:
CH_Lin
CH_Lin
CH_Lin
14 96
14 96
14 96
1
Rev
Rev
Rev
1.01
1.01
1.01
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Thursday, November 12, 2009
Date: Sheet of
Thursday, November 12, 2009
Date: Sheet of
5
4
3
Thursday, November 12, 2009
2
M60JV
M60JV
M60JV
Engineer:
CH_Lin
CH_Lin
CH_Lin
15 96
15 96
15 96
1
Rev
Rev
Rev
1.01
1.01
1.01
5
4
3
2
1
DIMM1A
M_A_A[15:0] (4)
D D
M_A_BS0 (4)
M_A_BS1 (4)
M_A_BS2 (4)
M_A_CAS# (4)
M_CLK_DDR#0 (4)
M_CLK_DDR#1 (4)
M_CLK_DDR0 (4)
M_CLK_DDR1 (4)
M_CKE0 (4)
M_A_DM[7:0] (4)
M_A_DQS[7:0] (4)
C C
M_A_DQS#[7:0] (4)
M_CKE1 (4)
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
DIMM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
115
CAS#
103
CK#0
104
CK#1
101
CK0
102
CK1
73
CKE0
74
CKE1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3_DIMM_204P
DDR3_DIMM_204P
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ0
5
DQ0
M_A_DQ1
7
DQ1
M_A_DQ2
15
DQ2
M_A_DQ3
17
DQ3
M_A_DQ4
4
DQ4
M_A_DQ5
6
DQ5
M_A_DQ6
16
DQ6
M_A_DQ7
18
DQ7
M_A_DQ8
21
DQ8
M_A_DQ9
23
DQ9
M_A_DQ10
33
M_A_DQ11
35
M_A_DQ12
22
M_A_DQ13
24
M_A_DQ14
34
M_A_DQ15
36
M_A_DQ16
39
M_A_DQ17
41
M_A_DQ18
51
M_A_DQ19
53
M_A_DQ20
40
M_A_DQ21
42
M_A_DQ22
50
M_A_DQ23
52
M_A_DQ24
57
M_A_DQ25
59
M_A_DQ26
67
M_A_DQ27
69
M_A_DQ28
56
M_A_DQ29
58
M_A_DQ30
68
M_A_DQ31
70
M_A_DQ36
129
M_A_DQ33
131
M_A_DQ34
141
M_A_DQ35
143
M_A_DQ32
130
M_A_DQ37
132
M_A_DQ38
140
M_A_DQ39
142
M_A_DQ40
147
M_A_DQ41
149
M_A_DQ42
157
M_A_DQ45
159
M_A_DQ44
146
M_A_DQ43
148
M_A_DQ46
158
M_A_DQ47
160
M_A_DQ48
163
M_A_DQ49
165
M_A_DQ50
175
M_A_DQ51
177
M_A_DQ52
164
M_A_DQ53
166
M_A_DQ54
174
M_A_DQ55
176
M_A_DQ56
181
M_A_DQ57
183
M_A_DQ58
191
M_A_DQ62
193
M_A_DQ60
180
M_A_DQ61
182
M_A_DQ59
192
M_A_DQ63
194
REV 9.2mm
M_A_DQ[63:0] (4)
+1.5V
PM_EXTTS#0 (3,17)
M_ODT0 (4)
M_ODT1 (4)
M_A_RAS# (4)
M_DRAMRST# (3,17)
M_CS#0 (4)
M_CS#1 (4)
SMBus Slave Address: A0H
SMB_CLK_S (17,21,29)
SMB_DAT_S (17,21,29)
+3VS
1 2
C1615
C1615
@
@
0.1UF/16V
0.1UF/16V
R1605
R1605
1KOhm
1KOhm
1 2
1%
1%
R1606
R1606
1KOhm
1KOhm
1 2
+1.5V
1%
1%
R1607
R1607
1KOhm
1KOhm
1 2
1%
1%
1 2
C1666
C1666
@
@
100PF/50V
100PF/50V
M_VREFCA_DIMM
M_VREFDQ_DIMM
+1.5V
1 2
C1667
C1667
@
@
100PF/50V
100PF/50V
1 2
1 2
C1623
C1623
0.1UF/16V
0.1UF/16V
C1625
C1625
0.1UF/16V
0.1UF/16V
OD
DIMM1B
DIMM1B
198
EVENT#
207
GND1
208
GND2
77
NC1
122
NC2
205
NP_NC1
206
NP_NC2
116
ODT0
120
ODT1
110
RAS#
30
RESET#
114
S#0
121
S#1
197
SA0
201
SA1
202
SCL
200
SDA
125
TEST
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
126
VREFCA
1
VREFDQ
DDR3_DIMM_204P
DDR3_DIMM_204P
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
+0.75VS
203
204
113
WE#
M_A_WE# (4)
B B
R1608
R1608
1KOhm
1KOhm
1%
1%
1 2
+1.5V
1 2
1 2
+
+
+
+
CE1603
CE1603
CE1703
CE1703
@
@
220UF/2V
220UF/2V
220UF/2V
ESR=15mOhm/Ir=2.7A
ESR=15mOhm/Ir=2.7A
220UF/2V
ESR=15mOhm/Ir=2.7A
ESR=15mOhm/Ir=2.7A
+0.75VS
R1.1
1 2
1 2
1 2
A A
5
4
3
C1610
C1610
C1609
C1609
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
1 2
C1668
C1668
C1669
C1669
@
@
N/A
N/A
0.1UF/16V
0.1UF/16V
27PF/50V
27PF/50V
Layout Note: Place these caps near SO DIMMS
1 2
1 2
C1611
C1611
10UF/6.3V
10UF/6.3V
C1670
C1670
@
@
0.1UF/16V
0.1UF/16V
1 2
1 2
C1612
C1612
10UF/6.3V
10UF/6.3V
C1671
C1671
N/A
N/A
27PF/50V
27PF/50V
1 2
C1613
C1613
10UF/6.3V
10UF/6.3V
1 2
C1620
C1620
10UF/6.3V
10UF/6.3V
2
1 2
C1616
C1616
1UF/10V
1UF/10V
1 2
1 2
C1621
C1621
@
@
C1617
C1617
10UF/6.3V
10UF/6.3V
1UF/10V
1UF/10V
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
M60JV
M60JV
Date: Sheet of
Date: Sheet of
Date: Sheet of
M60JV
Thursday, November 12, 2009
Thursday, November 12, 2009
Thursday, November 12, 2009
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
DDR3 SO-DIMM_0
DDR3 SO-DIMM_0
DDR3 SO-DIMM_0
CH_Lin
CH_Lin
CH_Lin
16 96
16 96
16 96
Rev
Rev
Rev
1.01
1.01
1.01
5
DIMM2A
M_B_A[15:0] (4)
D D
M_B_BS0 (4)
M_B_BS1 (4)
M_B_BS2 (4)
M_B_CAS# (4)
M_CLK_DDR#2 (4)
M_CLK_DDR#3 (4)
M_CLK_DDR2 (4)
M_CLK_DDR3 (4)
M_CKE2 (4)
M_B_DM[7:0] (4)
M_B_DQS[7:0] (4)
C C
M_B_DQS#[7:0] (4)
M_CKE3 (4)
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
DIMM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
115
CAS#
103
CK#0
104
CK#1
101
CK0
102
CK1
73
CKE0
74
CKE1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3_DIMM_204P
DDR3_DIMM_204P
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DQ5
5
DQ0
M_B_DQ4
7
DQ1
M_B_DQ6
15
DQ2
M_B_DQ3
17
DQ3
M_B_DQ0
4
DQ4
M_B_DQ1
6
DQ5
M_B_DQ7
16
DQ6
M_B_DQ2
18
DQ7
M_B_DQ12
21
DQ8
M_B_DQ9
23
DQ9
M_B_DQ13
33
M_B_DQ11
35
M_B_DQ10
22
M_B_DQ8
24
M_B_DQ15
34
M_B_DQ14
36
M_B_DQ21
39
M_B_DQ16
41
M_B_DQ20
51
M_B_DQ19
53
M_B_DQ18
40
M_B_DQ17
42
M_B_DQ23
50
M_B_DQ22
52
M_B_DQ25
57
M_B_DQ28
59
M_B_DQ26
67
M_B_DQ27
69
M_B_DQ24
56
M_B_DQ29
58
M_B_DQ30
68
M_B_DQ31
70
M_B_DQ32
129
M_B_DQ33
131
M_B_DQ34
141
M_B_DQ35
143
M_B_DQ36
130
M_B_DQ37
132
M_B_DQ38
140
M_B_DQ39
142
M_B_DQ44
147
M_B_DQ41
149
M_B_DQ42
157
M_B_DQ43
159
M_B_DQ40
146
M_B_DQ45
148
M_B_DQ46
158
M_B_DQ47
160
M_B_DQ48
163
M_B_DQ50
165
M_B_DQ54
175
M_B_DQ49
177
M_B_DQ52
164
M_B_DQ53
166
M_B_DQ55
174
M_B_DQ51
176
M_B_DQ60
181
M_B_DQ57
183
M_B_DQ63
191
M_B_DQ61
193
M_B_DQ58
180
M_B_DQ56
182
M_B_DQ59
192
M_B_DQ62
194
SWAP
4
M_B_DQ[63:0] (4)
SMBus Slave Address: A4H
+3VS
PM_EXTTS#0 (3,16)
M_VREFCA_DIMM
M_VREFDQ_DIMM
3
DIMM2B
DIMM2B
OD
198
EVENT#
207
GND1
208
GND2
77
NC1
122
NC2
205
NP_NC1
206
NP_NC2
+1.5V
116
ODT0
120
ODT1
110
RAS#
30
RESET#
114
S#0
121
S#1
197
SA0
201
SA1
202
SCL
200
SDA
125
TEST
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
126
VREFCA
1
VREFDQ
DDR3_DIMM_204P
DDR3_DIMM_204P
M_ODT2 (4)
M_ODT3 (4)
M_B_RAS# (4)
M_DRAMRST# (3,16)
M_CS#2 (4)
M_CS#3 (4)
SMB_CLK_S (16,21,29)
SMB_DAT_S (16,21,29)
+3VS
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
2
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
+0.75VS
196
203
204
113
WE#
M_B_WE# (4)
1
STD 5.2mm
B B
A A
Title :
Title :
Title :
DDR3 SO-DIMM_1
DDR3 SO-DIMM_1
DDR3 SO-DIMM_1
CH_Lin
CH_Lin
Engineer:
Engineer:
M60JV
M60JV
M60JV
Engineer:
1
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Thursday, November 12, 2009
Date: Sheet of
Thursday, November 12, 2009
Date: Sheet of
5
4
3
2
Thursday, November 12, 2009
CH_Lin
17 96
17 96
17 96
Rev
Rev
Rev
1.01
1.01
1.01
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
DDR3 CA_DQ VOLTAGE
DDR3 CA_DQ VOLTAGE
DDR3 CA_DQ VOLTAGE
CH_Lin
CH_Lin
CH_Lin
Engineer:
Engineer:
M60JV
M60JV
M60JV
Engineer:
1
18 96
18 96
18 96
Rev
Rev
Rev
1.01
1.01
1.01
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Thursday, November 12, 2009
Date: Sheet of
Thursday, November 12, 2009
Date: Sheet of
5
4
3
2
Thursday, November 12, 2009
5
D D
C C
4
3
2
1
B B
A A
Title :
VID Controller
Title :
VID Controller
Title :
VID Controller
Engineer:
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
E
E
E
M60JV
M60JV
M60JV
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
19 96 Thursday, November 12, 2009
19 96 Thursday, November 12, 2009
19 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
Request by CSC for CMOS
clear function
CMOS Settings
Clear CMOS
Keep CMOS
+VCC_RTC
D D
DG2.0 P297
RTCRST# and SRTCRST# can not b e shorted together
C C
Strap information:
ACZ_SYNC: Select VCCVRM 1.5V or 1.8V
(IPD)
SB_SPKR: No reboot strap (IPD) No reboot Disable No reboot
PCH_SPI_OV_RW: (IPU) Flash ME FW No Flash ME FW
SPI_SI: iTPM strap. (IPD) Enabl e Disable
PCH_INTVRMEN
Integrated 1.05 V VRM Enable /Disable
JRST2001
Shunt
Open
(Default)
RTCRST# RC delay
should be 18ms~25ms
1 2
R2003
R2003
20KOhm
20KOhm
1
1%
1%
JRST2001
JRST2001
1
SGL_JUMP
SGL_JUMP
2
2
1 2
R2004
R2004
20KOhm
20KOhm
1
1%
1%
JRST2002
JRST2002
1
SGL_JUMP
SGL_JUMP
2
2
TPM Settings
Clear ME RTC
Registers
Keep ME RTC
Registers
RTCRST#
1 2
C2004
C2004
1UF/10V
1UF/10V
GND GND
SRTCRST#
1 2
C2005
C2005
1UF/10V
1UF/10V
GND GND
H L
1.5V 1.8V
Enable Disable
JRST2002
Shunt
Open
(Default)
PCH_SPI_OV (30)
4
1 2
1
1
1
1 2
+VCC_RTC
+3VS
3
3
G
G
2
2
2
3
1 2
R2021
R2021
10KOhm
10KOhm
@
@
PCH_SPI_OV_RW
3 2
D
D
Q7502
Q7502
2N7002
2N7002
S
S
1 4
X2001
X2001
32.768Khz
32.768Khz
07G010413277
07G010413277
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
GND GND
100KOhm
100KOhm
100KOhm
100KOhm
100KOhm
100KOhm
100KOhm
100KOhm
0OHM
0OHM
0OHM
0OHM
0OHM
0OHM
0OHM
0OHM
R2029
R2029
100KOhm
100KOhm
@
@
1 2
RN2002A
RN2002A
RN2002B
RN2002B
RN2002C
RN2002C
RN2002D
RN2002D
RN2001A
RN2001A
RN2001B
RN2001B
RN2001C
RN2001C
RN2001D
RN2001D
GND
C2001
C2001
18PF/50V
18PF/50V
C2002
C2002
18PF/50V
18PF/50V
GND
ACZ_RST#_AUD (36)
ACZ_BCLK_AUD (36)
ACZ_SDOUT_AUD (36)
ACZ_SYNC_AUD (36)
X1_RTC
1 2
R2002
R2002
10MOhm
10MOhm
X2_RTC
PCH_INTRUDER#
PCH_INTVRMEN
ACZ_RST#
ACZ_BCLK
ACZ_SDOUT
ACZ_SYNC
+3VS
1 2
R2020
1KOhm
1KOhm
@R2020
@
SB_SPKR
3
GND
PCH_JTAG_TCK_BUF
R2077
R2077
51Ohm
51Ohm
1 2
GND
1 2
@
ACZ_SDIN0_AUD (36)
3VS_GPO_IPU
3VSUS_GPI_IPD
IPD
IPU
IPU
IPU
2
U2001A
IPU
B13
D13
C14
D17
A16
A14
A30
D29
P1
C30
G30
F30
E32
F32
B29
H32
J30
M3
K3
K1
J2
J4
BA2
AV3
AY3
AY1
IPU
AV1
U2001A
RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN
HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO13
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_RST#
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
IBEXPEAK-M
IBEXPEAK-M
RTC IHDA
RTC IHDA
SPI JTAG
SPI JTAG
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LDRQ1#/GPIO23
LPC
LPC
SATA
SATA
SATAICOMPO
SATAICOMPI
SATA0GP/GPIO21
SATA1GP/GPIO19
LDRQ0#
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATALED#
D33
B33
C32
A32
C34
LPC_DRQ#0
A34
LPC_DRQ#1
F34
AB9
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
SATA2,3:
AF7
AF6
EDS 1.0: SATA port2,port3 may not be available in all PCH SKUs.
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
AF15
T3
Y9
V1
1
1
SATA_COMP
LPC_AD0 (30,44)
LPC_AD1 (30,44)
LPC_AD2 (30,44)
LPC_AD3 (30,44)
LPC_FRAME# (30,44)
T2005T2005
T2006T2006
INT_SERIRQ (30)
SATA_RXN0 (51)
SATA_RXP0 (51)
SATA_TXN0 (51)
SATA_TXP0 (51)
SATA_RXN1 (51)
SATA_RXP1 (51)
SATA_TXN1 (51)
SATA_TXP1 (51)
SATA_LED# (56)
VTT_CPU_SEL1 (83)
VTT_CPU_SEL2 (83)
X1_RTC
X2_RTC
RTCRST#
SRTCRST#
PCH_INTRUDER#
PCH_INTVRMEN
ACZ_BCLK
C2055 10PF/50V@C2055 10PF/50V
T2008T2008
T2009T2009
T2010T2010
T2011T2011
T2012T2012
HDA_DOCK_RST#
1
T2002T2002
PCH_JTAG_TCK_BUF
1
PCH_JTAG_TMS
1
PCH_JTAG_TDI
1
PCH_JTAG_TDO
1
PCH_JTAG_RST#
1
1 2
C2056
C2056
10PF/50V
10PF/50V
@
@
GND
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
PCH_SPI_OV_RW
SPI_CLK
SPI_CS#0
SPI_SI
SPI_SO
SB_SPKR (36)
R2007
1 2
37.4Ohm
37.4Ohm
1
3VS_Native_IPU
+VTT_PCH
1%R2007
1%
3VS_GPI
3VS_GPI
+3VS
RN2003A 10KOhm RN2003A 10KOhm
RN2003B 10KOhm RN2003B 10KOhm
RN2003C 10KOhm RN2003C 10KOhm
RN2003D 10KOhm RN2003D 10KOhm
GND
INT_SERIRQ
1 2
SATA_LED#
3 4
VTT_CPU_SEL1
5 6
VTT_CPU_SEL2
7 8
Title :
Title :
Title :
PCH_IBEX(1)SATA,IHDA,RTC,LPC
PCH_IBEX(1)SATA,IHDA,RTC,LPC
PCH_IBEX(1)SATA,IHDA,RTC,LPC
Engineer:
Engineer:
M52J
M52J
M52J
Engineer:
1
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
James1_Wu
James1_Wu
James1_Wu
20 96 Thursday, November 12, 2009
20 96 Thursday, November 12, 2009
20 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
(32Mb)
1 2
1 2
1 2
HOLD#
SCLK
SI/SIO0
+3V_SPI
RN2843B
RN2843B
10KOhm
10KOhm
1 2
C2802
3 4
8
VCC
7
EC_SPI_CK
6
EC_SPI_DI
5
3
C2802
0.1UF/16V
0.1UF/16V
R2834 0Ohm R2834 0Ohm
R2835 0Ohm R2835 0Ohm
1 2
1 2
SPI_CLK
SPI_SI
Update 1105 (R2 .0)
EC_SPI_CK (30)
2
B B
A A
5
PCH SPI ROM
RN2843C
RN2843C
5 6
10KOhm
10KOhm
RN2843D
RN2843D
7 8
10KOhm
10KOhm
SPI_CS#0
R2830 0Ohm R2830 0Ohm
SPI_SO
EC_SPI_CE# (30)
EC_SPI_DO (30) EC_SPI_DI (30)
1 2
R2829 0Ohm R2829 0Ohm
1 2
4
1 2
R2837
R2837
0Ohm
0Ohm
N/A
N/A
+3VA_EC
R2831 0Ohm @R2831 0Ohm @
+3VSUS
R2832 0Ohm N/AR2832 0Ohm N/A
+3VS
R2833 0Ohm
R2833 0Ohm
@
@
RN2843A
RN2843A
10KOhm
10KOhm
1 2
U2801
EC_SPI_CE#
SPISO0_PCH +3VM_SPI_00
+3VM_SPI_WP0#
U2801
1
CS#
2
SO/SIO1
3
WP#/ACC
4
GND
MX25L3205DM2I-12G
MX25L3205DM2I-12G
near U2801
5
4
3
2
1
+3VSUS
RN2801A
RN2801A
1 2
4.7KOHM
4.7KOHM
RN2801B
RN2801B
3 4
4.7KOHM
U2001B
U2001B
BG30
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
D D
PCIE2: WLAN
PCIE5: LAN
PCIE_RXN2_WLAN (53)
PCIE_RXP2_WLAN (53)
PCIE_TXN2_WLAN (53)
PCIE_TXP2_WLAN (53)
PCIE_RX_LAN_N (41)
PCIE_RX_LAN_P (41)
PCIE_TX_LAN_N (41)
PCIE_TX_LAN_P (41)
PCIE_TXN2_C
CX2103 0.1U F/16V CX2103 0.1UF/16V
1 2
PCIE_TXP2_C
CX2104 0.1U F/16V CX2104 0.1UF/16V
1 2
PCIE_TXN6_C
CX2111 0.1U F/16V CX2111 0.1UF/16V
1 2
1 2
PCIE_TXP6_C
CX2112 0.1U F/16V CX2112 0.1UF/16V
PCIE7,8:
EDS 1.0: port7,port8 may not be available in all PCH SKUs.
C C
3VSUS_Native_IPU
3VS_Native
RX2106 0Ohm RX2106 0Ohm
CLK_PCIE_WLAN#_PCH (53)
CLK_PCIE_WLAN_PCH (53)
CLKREQ2_WLAN# (53)
WLAN do not support
PCH_C_LAN_N (41)
PCH_C_LAN_P (41)
B B
Note: Place these
resisters near
to PCIe Slots
PCH CLKREQ Setting:
Not connected to device.
CLK_REQ0#
CLK_REQ4#
CLK_REQ5#
CLK_REQ3#
CLK_REQ1#
CLKREQ2_WLAN#_R
CLKREQ2_GLAN#_R
A A
CLKREQ_GLAN# (41)
Jmc251 do not support
RN2134A
RN2134A
1 2
10KOhm
10KOhm
RN2134B
RN2134B
3 4
10KOhm
10KOhm
RN2134C
RN2134C
5 6
10KOhm
10KOhm
RN2134D
RN2134D
7 8
10KOhm
10KOhm
RN2143A
RN2143A
1 2
10KOhm
10KOhm
RN2143B
RN2143B
3 4
10KOhm
10KOhm
RN2143C
RN2143C
5 6
10KOhm
10KOhm
RN2143D
RN2143D
7 8
10KOhm
10KOhm
+3VSUS
+3VS
GND
1 2
RX2105 0Ohm RX2105 0Ohm
1 2
RX2109 0Ohm RX2109 0Ohm
1 2
RX2110 0Ohm RX2110 0Ohm
1 2
R2113 0Ohm @ R2113 0Ohm @
1 2
R2114 0Ohm @ R2114 0Ohm @
1 2
CLK_REQ3#
CLK_REQ4#
CLK_REQ5#
CLK_REQ0#
CLK_REQ1#
CLK_PCH_SRC2_N
CLK_PCH_SRC2_P
CLKREQ2_WLAN#_R
3VS_Native
3VSUS_Native
3VSUS_Native
3VSUS_Native
CLK_PCH_PEG_B_N
CLK_PCH_PEG_B_P
CLKREQ2_GLAN#_R
3VSUS_Native
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0#/GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1#/GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2#/GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4#/GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5#/GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ#/GPIO56
IBEXPEAK-M
IBEXPEAK-M
PCI-E*
PCI-E*
From CLK BUFFER
From CLK BUFFER
Clock Flex
Clock Flex
SMBALERT#/GPIO11
SML0ALERT#/GPIO60
SML1ALERT#/GPIO74
SMBus
SMBus
SML1CLK/GPIO58
SML1DATA/GPIO75
Link
Link
Controller
Controller
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
PEG
PEG
CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P
CLKOUT_DMI_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P
CLKIN_PCILOOPBACK
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
B9
H14
C8
J14
SML0_CLK
C6
SML0_DAT
G8
M14
SML1_CLK
E10
SML1_DAT
G12
T13
DG2.0 P241
T11
When unused, CL_CLK1, CL_DATA1 and CL_RST1#
may be left unconnected.
T9
H1
3VSUS_Native
AD43
AD45
AN4
AN2
CLK_DREF#_EDP
AT1
CLK_DREF_EDP
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
J42
AH51
GND
AH53
XCLK_COMP
AF38
CLK_OUT0
T45
CLK_OUT1
P43
CLK_OUT2
T42
CLK_OUT3
N50
1
1
R2117 90.9Ohm 1%R2117 90.9Ohm 1%
1 2
T2112T2112
1
T2111T2111
1
T2109T2109
1
T2110T2110
1
PCH_SMBCLK
PCH_SMBDATA
T2114T2114
T2115T2115
3VS_Native_IPD
3VS_Native_IPD
3VS_Native_IPD
3VS_Native_IPD
+VTT_PCH
3VSUS_Native
EC_SCI# (22,30)
3VSUS_Native
WLAN_ON (53)
3VSUS_Native
BT_ON (61)
3VSUS_Native
To EC
3VSUS_Native
PARK_PECLK_REQ# (72,75)
CLK_PCIE_PEG#_PCH (75)
CLK_PCIE_PEG_PCH (75)
CLK_DMI#_PCH (3)
CLK_DMI_PCH (3)
C_PCH_DMI# (29)
C_PCH_DMI (29)
C_PCH_BCLK# (29)
C_PCH_BCLK (29)
C_96M_DOT# (29)
C_96M_DOT (29)
C_PCH_SATA# (29)
C_PCH_SATA (29)
C_14M_PCH (29)
CLK_PCI_FB (24)
DG2.0
Section 4.2.4.1: Added 25-MHz Crystal routing guideline.
All Mobile Intel 5 Series Chip set-based Integrated
Graphics platforms are require d to use a 25-MHz crystal
on the PCH XTAL25_IN/OUT to en able the PCH to
generate the display clocks. D isplay Clock generation is
integrated into the PCH.
Integrated Graphics platforms that implement
DVI/DP/HDMI/e-DP are required to use Display Clock
Integration (DCI) (25M crystal to generate PCH display
clocks) to improve signal integrity and mitigate risk of
electrical compliance and associated functional failures
WW35 Update:Integrated Graphics platforms that use
onlyLVDS and/or VGA Displays may use Buffer Through Mode
(BTM) and leave 25-MHz crystal and RC components
unstuffed
R2120: For Xtal measurement
4.7KOHM
PCH_SMBCLK
PCH_SMBDATA
If not use crystal,please change C1201 to 0 OHM
Q2801A
Q2801A
UM6K1N
UM6K1N
6 1
SML1_CLK
SML1_DAT
3 4
Q2802B
Q2802B
UM6K1N
UM6K1N
Update 1105 (R2 .0)
PM_BATLOW# (22)
Update 1105 (R2 .0)
PARK_PECLK_REQ#
2
+12VS
5
WLAN_ON
BT_ON
SML1_CLK
SML1_DAT
SML0_CLK
SML0_DAT
+12VS
5
Q2801B
Q2801B
UM6K1N
UM6K1N
3 4
2
6 1
Q2802A
Q2802A
UM6K1N
UM6K1N
5 6
10KOhm
10KOhm
3 4
10KOhm
10KOhm
1 2
10KOhm
10KOhm
7 8
10KOhm
10KOhm
1 2
4.7KOHM
4.7KOHM
3 4
4.7KOHM
4.7KOHM
5 6
4.7KOHM
4.7KOHM
7 8
4.7KOHM
4.7KOHM
R3054 10KOhm R3054 10KOhm
1 2
R3055 10KOhm@R3055 10KOhm@
1 2
C_14M_PCH
CLK_PCI_FB
5 6
7 8
RN2140C
RN2140C
RN2140B
RN2140B
RN2140A
RN2140A
RN2140D
RN2140D
RN2141A
RN2141A
RN2141B
RN2141B
RN2141C
RN2141C
RN2141D
RN2141D
C7764 10PF/50V@C7764 10PF/50V@
C7765 10PF/50V@C7765 10PF/50V@
4.7KOHM
4.7KOHM
4.7KOHM
4.7KOHM
1 2
1 2
+3VS
RN2801C
RN2801C
RN2801D
RN2801D
SMB_CLK_S (16,17,29)
SMB_DAT_S (16, 17,29)
SMB1_CLK (30,33)
SMB1_DAT (30,33)
+3VSUS
GND
GND
Title :
Title :
Title :
PCH_IBEX(2)_PCIE,CLK,SMB,PEG
PCH_IBEX(2)_PCIE,CLK,SMB,PEG
PCH_IBEX(2)_PCIE,CLK,SMB,PEG
Engineer:
Engineer:
M52J
M52J
M52J
Engineer:
1
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
James1_Wu
James1_Wu
James1_Wu
21 96 Thursday, November 12, 2009
21 96 Thursday, November 12, 2009
21 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
D D
+3VSUS
EC_SCI# (21,30)
C C
PM_RI#
ME_SusPwrDnAck
PCH_LAN_RST#
PM_CLKRUN#
SYS_RESET#
PCIE_WAKE#
1 2
3 4
5 6
1 2
10KOhm
10KOhm
3 4
10KOhm
10KOhm
5 6
10KOhm
10KOhm
7 8
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
7 8
RN2242A
RN2242A
RN2242B
RN2242B
RN2242C
RN2242C
RN2242D
RN2242D
RN2243A
RN2243A
RN2243B
RN2243B
RN2243C
RN2243C
RN2243D
RN2243D
GND
+3VS +3VSUS
4
pre-ES1 not sup port
Reversal Featur e
+VTT_PCH
R2203
R2203
1%
1%
49.9Ohm
49.9Ohm
1 2
XDP_DBRESET# (3,7)
GND
C2203 0.1UF /10V
C2203 0.1UF /10V
GND
3VSUS_GPI
3VSUS_GPI
3VSUS_Native_IPU
H_DRAM_PWRGD (3)
@
@
1 2
ME_SusPwrDnAck (30)
PM_PWRBTN# (30)
DMI_RXN0 (3)
DMI_RXN1 (3)
DMI_RXN2 (3)
DMI_RXN3 (3)
DMI_RXP0 (3)
DMI_RXP1 (3)
DMI_RXP2 (3)
DMI_RXP3 (3)
DMI_TXN0 (3)
DMI_TXN1 (3)
DMI_TXN2 (3)
DMI_TXN3 (3)
DMI_TXP0 (3)
DMI_TXP1 (3)
DMI_TXP2 (3)
DMI_TXP3 (3)
0.1UF/10V @
0.1UF/10V @
3
DMI_COMP
1 2
C2202
C2202
PM_PWROK_PCH
1 2
PCH_LAN_RST#
ME_AC_PRESENT_PCH
R2262 0Ohm /XDP R2262 0Ohm / XDP
PM_BATLOW# (21)
PM_RSMRST#_PCH
T2202T2202
SYS_RESET#
PM_RI#
1
U2001C
U2001C
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_ACK/GPIO30
P5
PWRBTN#
P7
ACPRESENT/GPIO31
A6
BATLOW#/GPIO72
F14
RI#
IBEXPEAK-M
IBEXPEAK-M
2
DMI
DMI
System Power Management
System Power Management
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI
FDI
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_M#
PMSYNCH
SLP_LAN#
TP23
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
BJ14
BF13
BH13
BJ12
BG14
J12
Y1
PM_SUS_STAT#
P8
SUS_CLK
F3
SLP_S5#
E4
H7
P12
ME_PM_SLP_M#
K8
N2
BJ10
ME_PM_SLP_LAN#_PCH
F6
3VS_Native
1
FDI_TXN0 (3)
FDI_TXN1 (3)
FDI_TXN2 (3)
FDI_TXN3 (3)
FDI_TXN4 (3)
FDI_TXN5 (3)
FDI_TXN6 (3)
FDI_TXN7 (3)
FDI_TXP0 (3)
FDI_TXP1 (3)
FDI_TXP2 (3)
FDI_TXP3 (3)
FDI_TXP4 (3)
FDI_TXP5 (3)
FDI_TXP6 (3)
FDI_TXP7 (3)
FDI_INT (3)
FDI_FSYNC0 (3)
FDI_FSYNC1 (3)
FDI_LSYNC0 (3)
FDI_LSYNC1 (3)
PCIE_WAKE# (41)
PM_CLKRUN# (30)
T2203T2203
3VSUS_Native
1
T2204T2204
3VSUS_Native
1
T2205T2205
3VSUS_Native
1
PM_SUSC# (30)
PM_SUSB# (30)
T2208T2208
1
PM_SYNC# (3)
T2207T2207
1
R1.1,item L15
B B
+3VSUS
09'MoW04:
Optional if ME FW is
Ignition FW
PM_PWROK_PCH
PM_RSMRST#_PCH
ME_AC_PRESENT_PCH
A A
5
R2247
R2247
10KOhm
10KOhm
1 2
Power failure solution (S0-->G3,S5-->G3):
PM_PWROK,PM_RSMRST#: previous platform solution.
ME_PWROK,ME_AC_PRESENT: reserved for test.
RN2244A
RN2244A
1 2
1KOHM
1KOHM
NO 1K
CHANGE 1K
7 8
5 6
3 4
D2203
D2203
D2207: Prevent EC drive hign,
1
SUS_PWRGD sink low in S5-->G3.
3
2
BAT54CW
BAT54CW
D2205
D2205
1
3
2
BAT54CW
BAT54CW
1KOHM
1KOHM
1KOHM
1KOHM
1KOHM
1KOHM
排 排
RN2244D
RN2244D
RN2244C
RN2244C
RN2244B
RN2244B
SUS_PWRGD (30,32,81)
4
PM_PWROK (30)
PM_RSMRST# (30)
ME_AC_PRESENT (30)
ME Ignition Firmware is for 2M B SPI core, only PM55 can suppo rt on it.
3
2
Title :
Title :
Title :
PCH_IBEX(3)_FDI,DMI,SYS PWR
PCH_IBEX(3)_FDI,DMI,SYS PWR
PCH_IBEX(3)_FDI,DMI,SYS PWR
Engineer:
Engineer:
Engineer:
CH_Lin
CH_Lin
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
M60JV
M60JV
Date: Sheet of
Date: Sheet of
Date: Sheet of
M60JV
1
CH_Lin
22 96 Thursday, November 12, 2009
22 96 Thursday, November 12, 2009
22 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
+3VS
EDID_DAT_PCH
EDID_CLK_PCH
L_CTRL_DATA
L_CTRL_CLK
D D
LVDS Disable: (For discrete graphic)
1. NC:
LVDSA_DATA [3:0], LVDSA_DATA# [3:0],
LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],
LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK#
L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH
LVD_VREFL, LVD_IBG, LVD_VBG
2. Connected to GND:
VccALVDS,VccTX_LVDS
C C
1 2
4.7KOHM
4.7KOHM
3 4
4.7KOHM
4.7KOHM
5 6
4.7KOHM
4.7KOHM
7 8
4.7KOHM
4.7KOHM
CRT_B_PCH (47)
CRT_G_PCH (47)
CRT_R_PCH (47)
RN2344A
RN2344A
RN2344B
RN2344B
RN2344C
RN2344C
RN2344D
RN2344D
LCD_BACKEN_PCH (43)
L_VDDEN_PCH (43)
EDID_CLK_PCH (43)
EDID_DAT_PCH (43)
GND
LVDS_LCLKN_PCH (43)
LVDS_LCLKP_PCH (43)
LVDS_L0N_PCH (43)
LVDS_L1N_PCH (43)
LVDS_L2N_PCH (43)
LVDS_L0P_PCH (43)
LVDS_L1P_PCH (43)
LVDS_L2P_PCH (43)
Single Channel
R2316 150Ohm1%R2316 150Ohm
R2312 150Ohm1%R2312 150Ohm
R2317 150Ohm1%R2317 150Ohm
1 2
1 2
1 2
CRT_HSYNC_PCH (47)
CRT_VSYNC_PCH (47)
1%
1%
1%
GND
CRB R0.9,DG R0.8: 1K+/-0.5%
Intel checklist recommand:
1.02K PD resistor to 0.5%
DDC_CLK_PCH (47)
DDC_DATA_PCH (47)
R2321 1KOHM0.5%R2321 1KOHM0.5%
GND
T2303T2303
T2301T2301
T2302T2302
4
1 2
1
1
1
R2301 2.37KOHM 1%R2301 2.37KOHM 1%
1 2
R2302 0Ohm @ R2302 0Ohm @
1 2
CRT_B_PCH
CRT_G_PCH
CRT_R_PCH
R2303 0Ohm R2303 0Ohm
1 2
R2304 0Ohm R2304 0Ohm
1 2
L_BKLTCTL_PCH
L_CTRL_CLK
L_CTRL_DATA
PCH_LVDS_IBG
PCH_LVD_VBG
PCH_CRT_HSYNC
PCH_CRT_VSYNC
PCH_DAC_IREF
3
U2001D
U2001D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
L_DDC_DATA
AB46
L_CTRL_CLK
V48
L_CTRL_DATA
AP39
LVD_IBG
AP41
LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
AV53
LVDSA_CLK#
AV51
LVDSA_CLK
BB47
LVDSA_DATA#0
BA52
LVDSA_DATA#1
AY48
LVDSA_DATA#2
AV47
LVDSA_DATA#3
BB48
LVDSA_DATA0
BA50
LVDSA_DATA1
AY49
LVDSA_DATA2
AV48
LVDSA_DATA3
AP48
LVDSB_CLK#
AP47
LVDSB_CLK
AY53
LVDSB_DATA#0
AT49
LVDSB_DATA#1
AU52
LVDSB_DATA#2
AT53
LVDSB_DATA#3
AY51
LVDSB_DATA0
AT48
LVDSB_DATA1
AU50
LVDSB_DATA2
AT51
LVDSB_DATA3
AA52
CRT_BLUE
AB53
CRT_GREEN
AD53
CRT_RED
V51
CRT_DDC_CLK
V53
CRT_DDC_DATA
Y53
CRT_HSYNC
Y51
CRT_VSYNC
AD48
DAC_IREF
AB51
CRT_IRTN
IBEXPEAK-M
IBEXPEAK-M
GND
LVDS
LVDS
CRT
CRT
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46
BG46
BJ48
BG48
BF45
BH45
T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
2
1
CRT Disable: (For discrete graphic)
1. NC:
CRT_RED,CRT_GREEN,CRT_BLUE
B B
CRT_HSYCN,CRT_VSYNC
2. 1-kΩ ±0.5% pull-down to GND:
DAC_IREF
3. Connected to GND:
CRT_ITRN
4. Connect to +V3.3:
VCCADAC
A A
Title :
Title :
Title :
PCH_IBEX(4)_DP,LVDS,CRT
PCH_IBEX(4)_DP,LVDS,CRT
PCH_IBEX(4)_DP,LVDS,CRT
Engineer:
Engineer:
Engineer:
CH_Lin
CH_Lin
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
M60JV
M60JV
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet of
M60JV
1
CH_Lin
23 96 Thursday, November 12, 2009
23 96 Thursday, November 12, 2009
23 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
of
5
PCH_IBEX(5)_PCI,NVRAM,USB
PCH_IBEX(5)_PCI,NVRAM,USB
PCH_IBEX(5)_PCI,NVRAM,USB
D D
DGPU_SELECT#:
0=dGPU, 1=iGPU
C C
PCI_PME#: Internal PU to suspe nd plane.
change to PCI_CLK4 to sync ICS 364
CLK_PCI_FB (21)
CLK_KBCPCI_PC H (30)
CLK_DEBUG (44)
4
C2404 1 0PF/50V@C2404 1 0PF/50V
C2405 1 0PF/50V@C2405 1 0PF/50V
C2403 1 0PF/50V@C2403 1 0PF/50V
@
@
1 2
1 2
1 2
DGPU_SELEC T# (43,47)
5VS_Native[50,52,54]
T2404T2404
T2408T2408
T2409T2409
T2405T2405
T2406T2406
T2407T2407
IPU
1
RX2401 20Ohm RX2401 20Ohm
1 2
R2404 20Ohm R2404 20Ohm
1 2
R2406 20Ohm R2406 20Ohm
1 2
1
3VS_Native_IPU [51,53,55]
5VS_GPI [2,3,4,5]
@
3
U2001E
U2001E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
G38
H51
B37
A44
F51
A46
B45
M53
F48
K45
F36
H53
B41
K53
A36
A48
K6
E44
E50
A42
H44
F46
C46
D49
D41
C48
M7
D5
N52
P53
P46
P51
P48
C/BE3#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ0#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT0#
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
PLOCK#
STOP#
TRDY#
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
IBEXPEAK-M
IBEXPEAK-M
PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
PCI_REQ0#
PCI_REQ1#
DGPU_SELEC T#_R
PCI_REQ3#
PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
1
PCI_GNT3#
PCI_INTE#
PCI_INTF#
PCI_INTG#
PCI_INTH#
PCI_RST#
1
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_PAR
1
PCI_DEVSEL#
PCI_FRAME#
PCI_LOCK#
PCI_STOP#
PCI_TRDY# USBRBIAS_PN
PCI_PME#
1
PLT_RST#
CLK_DSPPCI_R
CLK_PCI_FB_R
CLK_KBCPCI_PC H_R
CLK_DEBUG_R
CLK_DBGPCI2_R
PCI
PCI
NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11
NVRAM
NVRAM
NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15
USB
USB
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
AY9
BD1
AP15
BD8
AV9
BG8
AP7
Strap information:
AP6
AT6
AT9
BB1
PCH_NV_ALE: Strap Intel Anti-Theft
AV6
Technology HDD Data Protection Enable
BB3
BA4
NV_CLE: Strap DMI Termination
BE4
voltage
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
PCH_NV_ALE
BD3
PCH_NV_CLE
AY6
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
D25
N16
J16
OC2#
F16
OC3#
L16
OC4#
E14
OC5#
G16
OC6#
F12
OC7#
T15
+1.8VS
R2412 1KOhm @R2412 1KOhm @
1 2
R2414 1KOhm @R2414 1KOhm @
1 2
NV_ALE: Strap Intel Anti-Theft
Technology HDD Data Protection
Enable. (H: enable)
NV_CLE: Strap DMI Termination
voltage
USB_PN0 (52)
USB_PP0 (52)
USB_PN1 (52)
USB_PP1 (52)
USB_PN2 (53)
USB_PP2 (53)
USB_PN4 (53)
USB_PP4 (53)
USB_PN9 (45)
USB_PP9 (45)
USB_PN12 (61)
USB_PP12 (61)
1 2
USB_OC01# (52)
USB_OC2# (53)
K82JR Recommand settings
USB port
0
USB port
1
USB port
2
3
WiFi/WiMax
4
5
6
7
8
Camera
9
10
11
BT (1.1)
12
13
R2411
R2411
22.6Ohm 1%
22.6Ohm 1%
Place within 500 mils of ICH
GND
3VSUS_Native [9,10,14,40,41,42,43,59]
2
H L
Enable Disable
1
PCI_INTE#
PCI_STOP#
PCI_IRDY#
PCI_SERR#
PCI_INTD#
PCI_INTG#
PCI_INTC#
PCI_INTA#
PCI_LOCK#
PCI_DEVSEL#
PCI_PERR#
PCI_REQ1#
DGPU_SELEC T#
PCI_FRAME#
PCI_TRDY#
PCI_INTH#
PCI_REQ0#
PCI_INTB#
PCI_INTF#
PCI_REQ3#
OC6#
OC4#
OC2#
OC3#
OC7#
OC5#
1 2
3 4
5 6
7 8
RP2403A
RP2403A
RP2403B
RP2403B
RP2403C
RP2403C
RP2403D
RP2403D
RP2403E
RP2403E
RP2403F
RP2403F
RP2403G
RP2403G
RP2403H
RP2403H
RP2401A
RP2401A
RP2401B
RP2401B
RP2401C
RP2401C
RP2401D
RP2401D
RP2401E
RP2401E
RP2401F
RP2401F
RP2401G
RP2401G
RP2401H
RP2401H
RP2402A
RP2402A
RP2402B
RP2402B
RP2402C
RP2402C
RP2402D
RP2402D
RP2402E
RP2402E
RP2402F
RP2402F
RP2402G
RP2402G
RP2402H
RP2402H
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
1 5
10KOhm
10KOhm
2 5
10KOhm
10KOhm
3 5
10KOhm
10KOhm
4 5
10KOhm
10KOhm
6 5
10KOhm
10KOhm
7 5
10KOhm
10KOhm
8 5
10KOhm
10KOhm
9 5
10KOhm
10KOhm
1 5
10KOhm
10KOhm
2 5
10KOhm
10KOhm
3 5
10KOhm
10KOhm
4 5
10KOhm
10KOhm
6 5
10KOhm
10KOhm
7 5
10KOhm
10KOhm
8 5
10KOhm
10KOhm
9 5
10KOhm
10KOhm
RN9237A
RN9237A
RN9237B
RN9237B
RN9237C
RN9237C
RN9237D
RN9237D
1 5
10KOhm
10KOhm
2 5
10KOhm
10KOhm
3 5
10KOhm
10KOhm
4 5
10KOhm
10KOhm
6 5
10KOhm
10KOhm
7 5
10KOhm
10KOhm
8 5
10KOhm
10KOhm
9 5
10KOhm
10KOhm
+3VS
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
+3VSUS
10
10
10
10
10
10
10
10
B B
GNT0#,GNT1#: Boot BIOS Strap. GNT3#:
Boot BIOS Strap
PCI_GNT0# PCI_GNT1# Boot BIOS Location
0 0
0 1
1 0
1 1 SPI
LPC
PCI
Reserved
(PCH)
A16 swap override Strap/
Top-Block swap override jumper
Low=Enabled A16 swap override/
Top-Block swap override
High=Default
Sampled on rising edge of PWROK.
R2440 1KOhm@R2440 1KOhm@
1 2
PCI_GNT1#
R2441 1KOhm@R2441 1KOhm@
1 2
GND
A A
5
PCI_GNT3# PCI_GNT0#
R2444 1KOhm@R2444 1KOhm@
1 2
GND
+3VSUS
U2401
U2401
A
A
1
5
VCC
VCC
B
PLT_RST#
R2477
R2477
10KOhm
10KOhm
1 2
GND
GND
4
B
2
3 4
GND
GND
NC7SZ08P5X_N L
NC7SZ08P5X_N L
GND
@
@
R2413 0Ohm R2413 0Ohm
1 2
Y
Y
BUF_PLT_RST # (3,30,32,41,53,75)
check其 其 device是 是 reset
3
起 起
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
CH_Lin
CH_Lin
ASUSTeK COM PUTER INC. NB6
ASUSTeK COM PUTER INC. NB6
ASUSTeK COM PUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
A2
A2
A2
M60JV
M60JV
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
M60JV
1
CH_Lin
24 96 Thursday, Novem ber 12, 2009
24 96 Thursday, Novem ber 12, 2009
24 96 Thursday, Novem ber 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
+3VS
1 2
R2546
R2546
10KOhm
D D
C C
B B
A A
10KOhm
@
@
1 2
R2545
R2545
10KOhm
10KOhm
GND
+3VS
GND
+3VSUS
RN2540A
RN2540A
RN2540B
RN2540B
RN2540C
RN2540C
RN2540D
RN2540D
RN9246B
RN9246B
RN9246D
RN9246D
RN9246C
RN9246C
RN9246A
RN9246A
GND
+3VS
RN9240A
RN9240A
RN9240B
RN9240B
RN9240C
RN9240C
RN9240D
RN9240D
GND
1 2
R2537
R2537
1KOhm
1KOhm
PCBID
1 2
10KOhm
10KOhm
3 4
10KOhm
10KOhm
5 6
10KOhm
10KOhm
7 8
10KOhm
10KOhm
R2541 1KOhm
R2541 1KOhm
1 2
R2544 10KOhm
R2544 10KOhm
1 2
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
R2533 10KOhm@R2533 10KOhm@
1 2
R2556 100KOHM@R2556 100KOHM@
1 2
R2557 100KOHM@R2557 100KOHM@
1 2
1 2
@
@
@
@
PCB_ID2
PCB_ID1
PCB_ID0
R2535
R2535
1KOhm
1KOhm
RN9238A
RN9238A
RN9238B
RN9238B
RN9238C
RN9238C
RN9238D
RN9238D
1.5V_SEL1
1 2
3 4
5 6
7 8
3 4
7 8
5 6
1 2
1 2
3 4
5 6
7 8
VCORE_SEL1
SGPIO1
1.5V_SEL2
VCORE_SEL2
GPIO15
SGPIO12
SGPIO57
EC_SMI#
CLK_REQ6#
CLK_REQ7#
SATACLKREQ#
PCH_TEMP_EN
DGPU_HOLD_RST#
STP_PCI#
SGPIO48
PCH_VRM_EN
PARK_PWRGD_PCH
DGPU_PWR_EN#
All GPIOs are reset to the
default state by CF9h reset
except GPIO24.
GPIO 27:Enable
VCCVRM,Low=disable.
Default internal pull up.
Update 1109, R2 .0
VGA_VCORE_PWRGD (75,82,84,85)
+1.8VSG
4
3VS_GPI
3VS_GPI_IPU
3VS_GPI_IPU
3VS_GPI_IPU
3VSUS_GPO_IPU
3VSUS_GPI
3VSUS_GPO_IPD
3VS_GPI
3VS_GPI_IPU
3VS_GPI
3VSUS_GPO
3VSUS_GPO_IPU
3VSUS_GPI_IPU
3VS_GPI
3VS_GPO
3VS_GPI
3VS_GPI
3VS_GPI
3VS_GPI
3VSUS_Native_IPU
3VSUS_Native
3VS_GPI
3VS_GPI
3VSUS_GPI
1.1VS_PWRGD (75,84,85)
R2536 10KOhm
R2536 10KOhm
@
@
1 2
POWER
按 按 按 按 按
1.5V_SEL2 (91)
DGPU_HOLD_RST# (75)
WLAN_BT_LED (56)
1.5V_SEL1 (91)
DGPU_PWR_EN# (82)
VCORE_SEL1 (88)
VCORE_SEL2 (88)
ONE PAIZU
PCH_TEMP_EN (32)
R2841 0Ohm @R2841 0Ohm @
R2840 0Ohm
R2840 0Ohm
1 2
C2619
C2619
0.1UF/16V
0.1UF/16V
1 2
1 2
N/A
N/A
+5VS
R2538
R2538
10KOhm
10KOhm
@
@
1 2
1
3
3
Q7609
Q7609
C
C
B
1
B
1
@
@
E
E
PMBS3904
PMBS3904
2
2
@
@
GND
default
EC_SMI# (30)
STP_PCI# (29)
1
1
G
G
3 2
3
3
D
D
S
S
2
2
值 值 值 值 值
T2548T2548
T2598T2598
T2599T2599
+3VS
1 2
CQ3
CQ3
2N7002
2N7002
@
@
SGPIO1
PCB_ID1
PCB_ID0
SGPIO12
GPIO15
PARK_PWRGD_PCH
GPIO24
1
PCH_VRM_EN
SATACLKREQ#
PCB_ID2
CLK_REQ6#
CLK_REQ7#
1
SGPIO48
1
SGPIO57
R2539
R2539
10KOhm
10KOhm
@
@
PARK_PWRGD_PCH
1 2
C2620
C2620
0.1UF/16V
0.1UF/16V
3
U2001F
U2001F
Y3
BMBUSY#/GPIO0
C38
TACH1/GPIO1
D37
TACH2/GPIO6
J32
TACH3/GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL/GPIO12
strap
T7
GPIO15
AA2
SATA4GP/GPIO16
F38
TACH0/GPIO17
Y7
SCLOCK/GPIO22
H10
MEM_LED/GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI#/GPIO34
V6
SATACLKREQ#/GPIO35
AB7
SATA2GP/GPIO36
AB13
SATA3GP/GPIO37
V3
SLOAD/GPIO38
P3
SDATAOUT0/GPIO39
H3
PCIECLKRQ6#/GPIO45
F1
PCIECLKRQ7#/GPIO46
AB6
SDATAOUT1/GPIO48
AA4
SATA5GP/GPIO49
F8
GPIO57
A4
VSS_NCTF_1
A49
VSS_NCTF_2
A5
VSS_NCTF_3
A50
VSS_NCTF_4
A52
VSS_NCTF_5
A53
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
B52
VSS_NCTF_9
B53
VSS_NCTF_10
BE1
VSS_NCTF_11
BE53
VSS_NCTF_12
BF1
VSS_NCTF_13
BF53
VSS_NCTF_14
BH1
VSS_NCTF_15
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
BH53
VSS_NCTF_18
BJ1
VSS_NCTF_19
BJ2
VSS_NCTF_20
BJ4
VSS_NCTF_21
BJ49
VSS_NCTF_22
BJ5
VSS_NCTF_23
BJ50
VSS_NCTF_24
BJ52
VSS_NCTF_25
BJ53
VSS_NCTF_26
D1
VSS_NCTF_27
D2
VSS_NCTF_28
D53
VSS_NCTF_29
E1
VSS_NCTF_30
E53
VSS_NCTF_31
IBEXPEAK-M
IBEXPEAK-M
@
@
MISC
MISC
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
A20GATE
PROCPWRGD
THRMTRIP#
INIT3_3V#
RCIN#
NC_1
NC_2
NC_3
NC_4
NC_5
PECI
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP24
2
AH45
AH46
AF48
AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
TP1
AW22
TP2
BB22
TP3
AY45
TP4
AY46
TP5
AV43
TP6
AV45
TP7
AF13
TP8
M18
TP9
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
TP9_PCH
TP10_PCH
TP11_PCH
TP12_PCH
INT3_3V#
PM_THRMTRIP#_PCH
T2563T2563
1
T2564T2564
1
T2566T2566
1
T2580T2580
1
T2579T2579
1
IPU
A20GATE (30)
BCLK_CPU_N_PCH (3)
BCLK_CPU_P_PCH (3)
H_PECI (3)
KB_RST# (30)
H_CPUPWRGD (3,7)
+VTT_CPU
1 2
R2526
R2526
56Ohm
56Ohm
1
Title :
Title :
Title :
PCH_IBEX(6)CPU,GPIO,MISC
PCH_IBEX(6)CPU,GPIO,MISC
PCH_IBEX(6)CPU,GPIO,MISC
CH_Lin
CH_Lin
Engineer:
Engineer:
M60JV
M60JV
M60JV
Engineer:
1
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
CH_Lin
25 96 Thursday, November 12, 2009
25 96 Thursday, November 12, 2009
25 96 Thursday, November 12, 2009
Rev
Rev
Rev
1.01
1.01
1.01
5
4
3
2
1
D D
+VTT_PCH
C C
+VCCAFDI_VRM
+VTT_PCH_VCCAPLL_FDI
+VTT_PCH_VCCDPLL_FDI
+VTT_PCH
0Ohm
0Ohm
1 2
R2606
R2606
B B
+VTT_PCH
+VTT_PCH_VCCDPLL_EXP
+VTT_PCH_VCCAPLL_EXP
+VTT_PCH_VCC_EXP
+3VS_VCCA3GBG
+3VS
0Ohm
0Ohm
1 2
R2618
R2618
POWER
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCIO[24]
VCCAPLLEXP
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
VCCIO[54]
VCCIO[55]
VCC3_3[1]
VCCVRM[1]
VCCFDIPLL
VCCIO[1]
+VTT_PCH_1.5VS_1.8VS
POWER
1 2
1 2
VCC CORE
VCC CORE
PCI E*
PCI E*
FDI
FDI
R2617 0Ohm R2617 0Ohm
R2613 0Ohm R2613 0Ohm
U2001G
1.524A S0 max
2mA S0 idle
U2001G
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
AK24
BJ24
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AN30
AN31
AN35
AT22
BJ18
AM23
IBEXPEAK-M
IBEXPEAK-M
HDA_SYNC: Select VCCVRM 1.5V o r 1.8V (IPD)
Low: 1.8V
High: 1.5V
+1.5VS
R2619 0Ohm@R2619 0Ohm@
+1.8VS
R2620 0Ohm R2620 0Ohm
DMI
DMI
NAND / SPI
NAND / SPI
CRT LVDS
CRT LVDS
HVCMOS
HVCMOS
VCCADAC[1]
VCCADAC[2]
VSSA_DAC[1]
VSSA_DAC[2]
VCCALVDS
VSSA_LVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[2]
VCC3_3[3]
VCC3_3[4]
VCCVRM[2]
VCCDMI[1]
VCCDMI[2]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
1 2
+1.8VS_VCCADMI_VRM
1 2
1 2
69mA S0 max
AE50
AE52
AF53
AF51
GND
300mA S0 max
AH38
AH39
GND
59mA S0 max
AP43
AP45
AT46
AT45
357mA S0 max
AB34
AB35
AD35
+1.8VS_VCCADMI_VRM
AT24
61mA S0 max
AT16
AU16
156mA S0 max
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
85mA S0 max
AM8
AM9
AP11
AP9
+VCCAFDI_VRM
1 2
C2618
C2618
0.1UF/16V
0.1UF/16V
+VCCA_DAC_1_2
+3VS_VCCA_LVDS
+1.8VS_VCCT_LVD
+3VS_VCC_GIO
+VTT_CPU_VCC_DMI
+V_NVRAM_VCCPNAND
+3VM_VCCPEP
C2617
C2617
0.1UF/16V
0.1UF/16V
+VTT_PCH
1 2
C2650
C2650
10UF/6.3V
10UF/6.3V
+VTT_PCH
120Ohm/100Mhz
120Ohm/100Mhz
+VTT_PCH
+VTT_PCH
@
@
+VCCA_DAC_1_2
1 2
C2609
C2609
@
@
0.01UF/25V
0.01UF/25V
GND
+3VS_VCCA_LVDS
1 2
R2601
R2601
0Ohm@
0Ohm@
GND
1 2
C2601
C2601
1UF/10V
1UF/10V
@
@
L2601
L2601
2 1
0Ohm
0Ohm
R2602
R2602
L2605
L2605
2 1
120Ohm/100Mhz
120Ohm/100Mhz
1 2
C2616
C2616
0.1UF/16V
0.1UF/16V
R2610
R2610
1 2
0Ohm
0Ohm
1 2
1 2
C2606
C2606
C2607
C2607
1UF/10V
1UF/10V
10UF/6.3V
10UF/6.3V
@
@
+VTT_PCH_VCCAPLL_EXP
@
@
1 2
C2602
C2602
@
@
10UF/6.3V
10UF/6.3V
GND
+VTT_PCH_VCCDPLL_EXP
1 2
+VTT_PCH_VCCAPLL_FDI
1 2
C2608
C2608
10UF/6.3V
10UF/6.3V
@
@
GND
120Ohm/100Mhz
120Ohm/100Mhz
1 2
C2610
C2610
120Ohm/100Mhz
120Ohm/100Mhz
10UF/6.3V
10UF/6.3V
+3VS
L2609
L2609
L2610
1 2
C2605
C2605
1UF/10V
1UF/10V
@
@
2 1
@L2610
@
2 1
1 2
C2604
C2604
1UF/10V
1UF/10V
@
@
+3VS
GND
+1.5VS
1 2
C2603
C2603
1UF/10V
1UF/10V
@
@
+1.8VS_VCCT_LVD
1 2
@
@
C2611
C2611
0.01UF/25V
0.01UF/25V
GND
+3VS_VCC_GIO +3VS
R2611
R2611
1 2
0Ohm
0Ohm
1 2
C2613
C2613
0.1UF/16V
0.1UF/16V
GND
+VTT_CPU_VCC_DMI
R2614
R2614
1 2
0Ohm
0Ohm
1 2
C2648
C2648
0Ohm
0Ohm
1 2
R2643
R2643
1UF/10V
1UF/10V
GND
+V_NVRAM_VCCPNAND
R2615
1 2
0Ohm
0Ohm
1 2
C2614
C2614
0.1UF/16V
0.1UF/16V
@
@
GND
+3VM_VCCPEP
1 2
GND
R2616
1 2
0Ohm
0Ohm
R2621
1 2
0Ohm
0Ohm
C2615
C2615
0.1UF/16V
0.1UF/16V
+3VS
1 2
C2612
C2612
0.01UF/25V
0.01UF/25V
@
@
@R2615
@
N/AR2621
N/A
1 2
C2649
C2649
22UF/6.3V
22UF/6.3V
+VTT_CPU
+VTT_PCH
+1.8VS
+3VSUS
@R2616
@
+1.8VS
L2608
L2608
2 1
120Ohm/100Mhz
120Ohm/100Mhz
Update 1105 (R2 .0)
GND
A A
PCH_IBEX(7)_POWER,GND
PCH_IBEX(7)_POWER,GND
PCH_IBEX(7)_POWER,GND
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
CH_Lin
CH_Lin
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
M60JV
M60JV
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
M60JV
Thursday, November 12, 2009
Thursday, November 12, 2009
Thursday, November 12, 2009
1
CH_Lin
26 96
26 96
26 96
Rev
Rev
Rev
1.01
1.01
1.01
5
4
3
2
1
+VTT_PCH_VCCA_CLK
52mA S0 max
+VTT_PCH
R2722
R2722
0Ohm
0Ohm
@
D D
C C
B B
@
GND
GND
C2726 0.1UF/16V C2726 0.1U F/16V
GND
+1.05VM_VCCAUX
344mA
1 2
S0 max
1 2
R2743
R2743
0Ohm
0Ohm
TP_PCH_VCCDSW
1 2
C2751
GND
C2722 0.1UF/16V C2722 0.1UF/16V
72mA
S0 max
73mA
S0 max
C2725 0.1UF/16V C2725 0.1UF/16V
C2751
0.1UF/16V
0.1UF/16V
GND
+VTT_PCH
+1.1VM_VCCEPW
DCPRTC
1 2
+VTT_PCH_1.5VS_1.8VS +3VSUS
+VTT_PCH_VCCA_A_DPL
+VTT_PCH_VCCA_B_DPL
+VTT_PCH
+VTT_PCH_SSCVCC
+VCCSST
1 2
+V1.05A_INT_VCCSUS
1 2
+3VA_VCCPSUS
+3VS
+3VS_VCCPCORE
+VTT_CPU_VCCPCPU
+VCC_RTC
2mA S0 max
AP51
AP53
AF23
AF24
AD38
AD39
AD41
AF43
AF41
AF42
AU24
BB51
BB53
BD51
BD53
AH23
AH35
AF34
AH34
AF32
AT18
AU18
AJ35
Y20
V39
V41
V42
Y39
Y41
Y42
V9
V12
Y22
P18
U19
U20
U22
V15
V16
Y16
A12
U2001J
U2001J
IBEXPEAK-M
IBEXPEAK-M
VCCACLK[1]
VCCACLK[2]
VCCLAN[1]
VCCLAN[2]
DCPSUSBYP
VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]
DCPRTC
VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[2]
VCCIO[3]
VCCIO[4]
DCPSST
DCPSUS
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]
VCC3_3[5]
VCC3_3[6]
VCC3_3[7]
V_CPU_IO[1]
V_CPU_IO[2]
VCCRTC
POWER
POWER
Clock and Miscellaneous
Clock and Miscellaneous
CPU
CPU
RTC PCI/GPIO/LPC
RTC PCI/GPIO/LPC
USB
USB
PCI/GPIO/LPC
PCI/GPIO/LPC
SATA
SATA
HDA
HDA
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
VCCSUS3_3[28]
VCCIO[56]
V5REF_SUS
V5REF
VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCCSATAPLL[1]
VCCSATAPLL[2]
VCCIO[9]
VCCVRM[4]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
VCCSUSHDA
V24
V26
Y24
Y26
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3
AK1
AH22
AT20
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35
L30
10mil trace
+VTT_PCH_VCCUSBCORE
+3VSUS_VCCPUSB
163mA S0 max
+5VS_PCH_VCC5REF
+3VS_VCCPPCI
+VTT_PCH_VCCAPLL
+VTT_PCH
+VTT_PCH_VCC_SATA
+3VSUS_HDA
+VTT_PCH
+VTT_PCH
+5VSUS_PCH_VCC5REFSUS
+3VS
+3VS
+VCCPLLVRM
+VTT_PCH
+VTT_PCH
@
@
120Ohm/100Mhz
120Ohm/100Mhz
+VTT_PCH
2.22A S0 max
1 2
C2701
C2701
10UF/6.3V@
10UF/6.3V@
+3VS
1 2
C2728
C2728
0.1UF/16V
0.1UF/16V
+VTT_CPU
+3VSUS_VCCPUSB
1 2
C2737
C2737
0.1UF/16V
0.1UF/16V
GND
+VTT_PCH_VCCA_CLK
L2704
L2704
2 1
1 2
@
@
C2718
C2718
10UF/6.3V
10UF/6.3V
1 2
C2703
C2703
10UF/6.3V@
10UF/6.3V@
R2742 0Ohm R2742 0Ohm
1 2
+3VA_VCCPSUS
R2726
R2726
1 2
0Ohm
0Ohm
1 2
C2727
C2727
0.1UF/16V
0.1UF/16V
GND
1 2
C2740
C2740
0.1UF/16V
0.1UF/16V
GND
+VTT_CPU_VCCPCPU
R2728
R2728
1 2
0Ohm
0Ohm
1 2
1 2
C2735
C2735
0.1UF/16V
0.1UF/16V
R2730
R2730
0Ohm
0Ohm
1 2
1 2
C2702
C2702
22UF/6.3V@
22UF/6.3V@
+VTT_PCH_1.5VS_1.8VS +VCCPLLVRM
1 2
C2741
C2741
0.1UF/16V
0.1UF/16V
>1mA
S0 max
@
@
C2752
C2752
4.7UF/6.3V
4.7UF/6.3V
GND
+3VSUS
1 2
@
@
C2717
C2717
1UF/10V
1UF/10V
1 2
1 2
C2731
C2731
0.1UF/16V
0.1UF/16V
C2721
C2721
1UF/10V
1UF/10V
GND
1 2
1 2
C2720
C2720
1UF/10V
1UF/10V
C2730
C2730
0.1UF/16V
0.1UF/16V
@
@
1 2
C2729
C2729
1UF/10V
1UF/10V
@
@
1 2
C2723
C2723
1UF/10V
1UF/10V
@
@
1 2
C2724
C2724
1UF/10V
1UF/10V
1 2
C2734
C2734
1UF/10V
1UF/10V
1 2
C2744
C2744
1UF/10V
1UF/10V
GND
+5VSUS_PCH_VCC5REFSUS
1 2
C2738
C2738
1UF/10V
1UF/10V
GND
+5VS_PCH_VCC5REF
1 2
C2739
C2739
1UF/10V
1UF/10V
GND
+VTT_PCH_VCCAPLL
1 2
1 2
@
@
@
@
C2743
C2743
10UF/6.3V
10UF/6.3V
GND
GND
+3VSUS_HDA +3VSUS
R2749
R2749
1 2
0Ohm
0Ohm
1 2
C2745
C2745
1UF/10V
1UF/10V
GND
+VCC_RTC
1 2
C2733
C2733
0.1UF/16V
0.1UF/16V
@
@
GND
CHANGE LOCATION NEXT
@
@
C2742
C2742
10UF/6.3V
10UF/6.3V
1 2
C2732
C2732
0.1UF/16V
0.1UF/16V
@
@
D2701
D2701
3
BAT54CW
BAT54CW
R2731
R2731
1 2
100Ohm
100Ohm
D2702
D2702
3
BAT54CW
BAT54CW
R2732
R2732
1 2
100Ohm
100Ohm
L2705
L2705
2 1
120Ohm/100Mhz
120Ohm/100Mhz
2
1
2
1
+VTT_PCH
+5VSUS
+5VS
+3VSUS
+3VS
+VTT_PCH_VCCA_A_DPL
+VTT_PCH_VCCA_B_DPL
A A
5
+VTT_PCH_VCCA_A_DPL
1 2
1 2
C2746
C2746
1UF/10V
1UF/10V
0Ohm
0Ohm
R2748
R2748
@
@
+VTT_PCH_VCCA_B_DPL
1 2
C2747
C2747
1UF/10V
1UF/10V
GND
GND
1 2
1 2
C2719
C2719
10UF/6.3V
10UF/6.3V
@
@
C2736
C2736
10UF/6.3V
10UF/6.3V
@
@
L2706
L2706
2 1
120Ohm/100Mhz
120Ohm/100Mhz
L2707
L2707
2 1
120Ohm/100Mhz
120Ohm/100Mhz
4
+VTT_PCH
C2748
C2748
0.1UF/16V
0.1UF/16V
1 2
GND
Title :
Title :
Title :
PCH_IBEX(8)_POWER,GND
PCH_IBEX(8)_POWER,GND
PCH_IBEX(8)_POWER,GND
Engineer:
Engineer:
Engineer:
CH_Lin
CH_Lin
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
M60JV
M60JV
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
M60JV
Thursday, November 12, 2009
Thursday, November 12, 2009
Thursday, November 12, 2009
1
CH_Lin
27 96
27 96
27 96
Rev
Rev
Rev
1.01
1.01
1.01
5
D D
C C
B B
GND GND
AB16
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AF12
AH49
AF35
AP13
AN34
AF45
AF46
AF49
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AJ19
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AK12
AM41
AN19
AK26
AK22
AK23
AK28
AB5
AB8
AC2
AD7
AE2
AE4
Y13
AU4
AF5
AF8
AG2
AH7
AJ2
AT5
AJ4
U2001H
U2001H
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
IBEXPEAK-M
IBEXPEAK-M
4
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
3
U2001I
U2001I
AY7
VSS[159]
B11
VSS[160]
B15
VSS[161]
B19
VSS[162]
B23
VSS[163]
B31
VSS[164]
B35
VSS[165]
B39
VSS[166]
B43
VSS[167]
B47
VSS[168]
B7
VSS[169]
BG12
VSS[170]
BB12
VSS[171]
BB16
VSS[172]
BB20
VSS[173]
BB24
VSS[174]
BB30
VSS[175]
BB34
VSS[176]
BB38
VSS[177]
BB42
VSS[178]
BB49
VSS[179]
BB5
VSS[180]
BC10
VSS[181]
BC14
VSS[182]
BC18
VSS[183]
BC2
VSS[184]
BC22
VSS[185]
BC32
VSS[186]
BC36
VSS[187]
BC40
VSS[188]
BC44
VSS[189]
BC52
VSS[190]
BH9
VSS[191]
BD48
VSS[192]
BD49
VSS[193]
BD5
VSS[194]
BE12
VSS[195]
BE16
VSS[196]
BE20
VSS[197]
BE24
VSS[198]
BE30
VSS[199]
BE34
VSS[200]
BE38
VSS[201]
BE42
VSS[202]
BE46
VSS[203]
BE48
VSS[204]
BE50
VSS[205]
BE6
VSS[206]
BE8
VSS[207]
BF3
VSS[208]
BF49
VSS[209]
BF51
VSS[210]
BG18
VSS[211]
BG24
VSS[212]
BG4
VSS[213]
BG50
VSS[214]
BH11
VSS[215]
BH15
VSS[216]
BH19
VSS[217]
BH23
VSS[218]
BH31
VSS[219]
BH35
VSS[220]
BH39
VSS[221]
BH43
VSS[222]
BH47
VSS[223]
BH7
VSS[224]
C12
VSS[225]
C50
VSS[226]
D51
VSS[227]
E12
VSS[228]
E16
VSS[229]
E20
VSS[230]
E24
VSS[231]
E30
VSS[232]
E34
VSS[233]
E38
VSS[234]
E42
VSS[235]
E46
VSS[236]
E48
VSS[237]
E6
VSS[238]
E8
VSS[239]
F49
VSS[240]
F5
VSS[241]
G10
VSS[242]
G14
VSS[243]
G18
VSS[244]
G2
VSS[245]
G22
VSS[246]
G32
VSS[247]
G36
VSS[248]
G40
VSS[249]
G44
VSS[250]
G52
VSS[251]
AF39
VSS[252]
H16
VSS[253]
H20
VSS[254]
H30
VSS[255]
H34
VSS[256]
H38
VSS[257]
H42
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
2
1
IBEXPEAK-M
IBEXPEAK-M
GND GND
A A
Title :
Title :
Title :
PCH GND
PCH GND
PCH GND
Engineer:
Engineer:
Engineer:
James1_Wu
James1_Wu
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
ASUSTeK COMPUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
C
C
C
M52J
M52J
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
M52J
Thursday, November 12, 2009
Thursday, November 12, 2009
Thursday, November 12, 2009
1
James1_Wu
28 96
28 96
28 96
Rev
Rev
Rev
1.01
1.01
1.01
5
CR1 1MOhm /XC R1 1MOh m /X
1 2
CX1 14.31818 Mhz CX1 14.3181 8Mhz
C_XIN
1 3
1 2
CC4
CC4
12PF/50V
12PF/50V
D D
2
C_XOUT
1 2
CC5
GND GND
CC5
12PF/50V
12PF/50V
+3VS
1 2
CC9
CC9
0.1UF/16V
0.1UF/16V
@
@
120Ohm/1 00Mhz
120Ohm/1 00Mhz
4
CL1
CL1
4
PEREQ1:PCIEx0 & PCIEx1
PEREQ2:PCIEx2 & PCIEx3 & SATA
PEREQ3:PCIEx4 & PCIEx5 & PCIEx6
+3V_CLK
2 1
VDDxx
min:3.135V max: 3.465V
I: 135mV
1 2
1 2
CC13
CC13
10UF/6.3V
10UF/6.3V
c0805_h 57
c0805_h 57
CC12
CC12
0.1UF/16V
0.1UF/16V
1 2
CC14
CC14
0.1UF/16V
0.1UF/16V
1 2
CC15
CC15
0.1UF/16V
0.1UF/16V
1:Disable
0:Enable
1 2
CC16
CC16
0.1UF/16V
0.1UF/16V
3
1 2
CC17
CC17
0.1UF/16V
0.1UF/16V
1 2
CC18
CC18
0.1UF/16V
0.1UF/16V
1 2
CC19
CC19
0.1UF/16V
0.1UF/16V
FS4 Function
H
FIXED PLL (Asynchronous)
PCI/PCIEX PLL(synchronize) L
+3V_CLK _VDDA
CL3
CL3
1 2
CC20
CC20
0.1UF/16V
0.1UF/16V
2 1
120Ohm/1 00Mhz
120Ohm/1 00Mhz
1 2
CC22
CC22
0.1UF/16V
0.1UF/16V
2
1
GND
+3V_CLK
CU1
CU1
1
VDD1
2
PEREQ1#
C C
C_96M_D OT (21)
C_96M_D OT# (21)
C_PCH_D MI (21)
C_PCH_D MI# (21)
C_PCH_S ATA (21)
C_PCH_S ATA# (21)
FS4
C_PCI_SB_ R
C_48M_R
CLK_EN
C_FSLA
C_FSLB
GND1
3
PEREQ1#
4
PEREQ2#
5
FS4/PCICLK0
6
GND2
7
VDDPCI
8
ITP_EN/PCICLK_F0
9
SEL12_48#/12_48MHz
10
Vtt_PwrGd/PD#
11
VDD2
12
FSLA/USB_48MHz
13
GND3
14
DOTT_96MHzLR
15
DOTC_96MHzLR
16
FSLB
17
PCIeT_LR0
18
PCIeC_LR0
19
PCIeT_LR1
20
PCIeC_LR1
21
VDDPCIEX1
22
PCIeT_LR2
23
PCIeC_LR2
24
PCIeT_LR3
25
PCIeC_LR3
26
SATACLKT_LR
27
SATACLKC_LR
28
VDDPCIEX2
ICS9LPRS4 27CGLFT
ICS9LPRS4 27CGLFT
25MHz/FREERUN
PCI&PCIEX_STOP#
CPU_STOP#
REF0/FSLC
DOC_PEREQ3#
GND4
VDDREF
SDATA
SCLK
GND5
CPUT_LR0
CPUC_LR0
VDDCPU
CPUT_LR1
CPUC_LR1
RESET#
GNDA
CPUITPT_LR2/PCIeT_LR6
CPUITPC_LR2/PCIeC_LR6
VDDA
VDDPCIEX3
PCIeT_LR5
PCIeC_LR5
PCIeT_LR4
PCIeC_LR4
GND6
B B
+3VS
CR14
CR14
1 2
10KOhm
10KOhm
3 2
3
3
D
D
CQ2
CQ2
1
1
1
2N7002
2N7002
G
G
S
S
2
2
C_25M_L AN_R
C_FSLC
C2933
C2933
10PF/50V
10PF/50V
C2934
C2934
10PF/50V
10PF/50V
/EMI/X
/EMI/X
1 2
/EMI/X
/EMI/X
1 2
CLK_EN# (88 )
GND
A A
X1
X2
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
CLK_EN
1 2
CR16
CR16
100KOhm
100KOhm
+3V_CLK _VDDA
+3V_CLK
C_25M_L AN_R
STP_CPU #
C_FSLC C_REQ#_ WLAN
C_REQ#_ LAN
C_XIN
C_XOUT
C_DXP
C_DXP#
GND GND
1 2
GND GND
CC31
CC31
0.1UF/16V
0.1UF/16V
/X
/X
1 2
1 2
CT1CT1
1
CT2CT2
1
CR6 33Ohm /XCR6 33Ohm /X
CR3 33Ohm CR3 33Ohm
CR10 1 0KOhm CR10 10KOhm
C_FSLA
CR12 1 0KOhm @C R12 10KOhm @
C_FSLB
C_FSLC
1 2
1 2
CR13 1 0KOhm
CR13 1 0KOhm
1 2
CR15 1 0KOhm CR15 10KOhm
1 2
CR17 1 0KOhm CR17 10KOhm
1 2
+3V_CLK
+3V_CLK
@
@
GND
GND
GND
C_25M_L AN (41)
STP_PCI# (25)
C_14M_P CH (21)
SMB_DAT _S (16,1 7,21)
SMB_CLK _S (1 6,17,21)
C_PCH_B CLK (21)
C_PCH_B CLK# (21)
FSLC
<Variant Name>
<Variant Name>
<Variant Name>
ASUSTek C omputer INC.
ASUSTek C omputer INC.
ASUSTek C omputer INC.
Size P roject Name
Size P roject Name
Size P roject Name
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
STP_CPU #
0 166
C_48M_R
1
0
CR19 1 0KOhm CR1 9 10KOhm
CR11 1 0KOhm
CR11 1 0KOhm
@
@
CPU(MHZ)
FSLA F SLB
1
133
1 0
200 0 1 0
C_REQ#_ LAN
C_REQ#_ WLAN
PEREQ1#
C_PCI_SB_ R
FS4
1 2
3 4
5 6
7 8
CR23 1 0KOhm
CR23 1 0KOhm
CR18 10KOhm C R18 10KOhm
1008P
1008P
1008P
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
/X
/X
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1 2
1 2
CRN2A
CRN2A
CRN2B
CRN2B
CRN2C
CRN2C
CRN2D
CRN2D
1 2
1 2
ICS9LPRS427C
ICS9LPRS427C
ICS9LPRS427C
+3V_CLK
GND
Nic_wang
Nic_wang
Nic_wang
29 96 Thursday, November 12, 2 009
29 96 Thursday, November 12, 2 009
29 96 Thursday, November 12, 2 009
+3V_CLK
GND
+3V_CLK
Rev
Rev
Rev
1.0G
1.0G
1.0G
5
R3063 0Ohm @R3063 0O hm @
EC_PIN3
EC_LPC_AD0
EC_LPC_AD1
EC_LPC_AD2
EC_LPC_AD3
EC_RST#
GPG0
FSCK
FSI
FSCE#
EC_XIN
EC_XOUT
GPF1_EC VSUS_ON
10
9
8
7
13
6
22
5
OD
15
OD
23
OD
126
OD
4
OD
14
106
105
104
103
102
101
100
58
59
60
61
62
63
64
65
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
56
57
128
2
85
86
87
88
89
90
110
111
115
116
117
118
1 2
R3064 0Ohm N/AR 3064 0Ohm N/A
1 2
U3001
U3001
LAD0
LAD1
LAD2
LAD3
LPCCLK
LFRAME#
LPCRST#/WUI4/GPD2
SERIRQ
ECSMI#/GPD4
ECSCI#/GPD3
GA20/GPB5
KBRST#/GPB6
WRST#
GPG0
FSCK
GPG6
FMISO
FMOSI
FSCE#
GPG2
KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
KSO16/GPC3
KSO17/GPC5
CK32K
CK32KE
GPF0
GPF1
PS2CLK1/GPF2
PS2DAT1/GPF3
PS2CLK2/WUI20/GPF4
PS2DAT2/WUI21/GPF5
SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
WUI22/GPF6
WUI23/GPF7
IT8500E-L
IT8500E-L
place on LPC_EC bus
C3011
/XC3011
/X
1 2
+3VS GND
1000PF/50V
1000PF/50V
1 2
0OHM
0OHM
3 4
0OHM
0OHM
5 6
0OHM
0OHM
7 8
0OHM
0OHM
R3065 0Ohm R 3065 0Ohm
1 2
R3066 0Ohm R 3066 0Ohm
1 2
R3067 0Ohm R 3067 0Ohm
1 2
KSI0 (31)
KSI1 (31)
KSI2 (31)
KSI3 (31)
KSI4 (31)
KSI5 (31)
KSI6 (31)
KSI7 (31)
KSO0 ( 31)
KSO1 ( 31)
KSO2 ( 31)
KSO3 ( 31)
KSO4 ( 31)
KSO5 ( 31)
KSO6 ( 31)
KSO7 ( 31)
KSO8 ( 31)
KSO9 ( 31)
KSO10 (31)
KSO11 (31)
KSO12 (31)
KSO13 (31)
KSO14 (31)
KSO15 (31)
PM_PWRBT N# (22)
OP_SD# (36)
TP_CLK (31)
TP_DAT (31)
SMB0_CLK (60)
SMB0_DAT (60)
SMB1_CLK (21,33)
SMB1_DAT (21,33)
THRO_CPU (3)
PCH_SPI_OV ( 20)
@jonas
R3060 0Ohm R3060 0Oh m
1 2
R3062 0Ohm N/AR3062 0Ohm N/ A
1 2
RN3012A
RN3012A
RN3012B
RN3012B
RN3012C
RN3012C
RN3012D
RN3012D
D D
LPC_AD0 (20,44)
LPC_AD1 (20,44)
LPC_AD2 (20,44)
LPC_AD3 (20,44)
KB_RST#
BUF_PLT_RST #
1 2
1 2
C3012
C3012
C3009
C3009
0.1UF/16V
0.1UF/16V
0.1UF/16V
0.1UF/16V
@
@
@
@
GND GND
C C
ME_SusPwrDnA ck (22)
EC_SPI_CK (20)
EC_SPI_DO ( 20)
EC_SPI_DI (20)
EC_SPI_CE# (20)
Update 1105 (R2.0)
Update 1105 (R2.0)
B B
CLK_KBCPCI_PC H (24)
LPC_FRAME# (20,44)
BUF_PLT_RST # (3,24,32,41,53,75)
INT_SERIRQ (20)
EC_SMI# (2 5)
EC_SCI# (21,22)
A20GATE (25)
KB_RST# (25)
VSUS_ON (81 ,87)
4
+3VA_EC
Update 1105 (R2.0)
GND
+3VACC +3VA_ EC
+3VPLL
+3VS
EC_PIN3
114
121
127NC3
11
74
VCC
VSTBY126VSTBY250VSTBY392VSTBY4
RING#/
RING#/
KBMX
KBMX
LPC
LPC
FLASH ROM
FLASH ROM
SMBus PS/2
SMBus PS/2
GND
AVCC
VSTBY5
VSTBY6/PLL
PWRFAIL#/CK32KOUT/LPCRST#/GPB7
L80HLAT/WUI24/GPE0
LPCPD#/WUI6/GPE6
L80LLAT/WUI7/GPE7
CLKRUN#/WUI16/GPH0/ID0
VSS11VCORE12VSS227VSS349VSS491VSS5
VSS6
113
122
EC_AGND
1 2
C3008
C3008
0.1UF/16V
0.1UF/16V
GND
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/GPA6
PWM7/GPA7
RXD/GPB0
TXD/GPB1
TMRI0/WUI2/GPC4
TMRI1/WUI3/GPC6
PWUREQ#/GPC7
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1
GINT/GPD5
TACH0/GPD6
TACH1/GPD7
WUI25/GPE1
WUI26/GPE2
WUI27/GPE3
PWRSW/GPE4
WUI5/GPE5
GPIO
GPIO
GPG1/ID7
WUI17/GPH1/ID1
WUI18/GPH2/ID2
WUI19/GPH3/ID3
GPH4/ID4
GPH5/ID5
GPH6/ID6
ADC4/WUI28/GPI4
ADC5/WUI29/GPI5
ADC6/WUI30/GPI6
ADC7/WUI31/GPI7
DAC2/GPJ2
DAC3/GPJ3
DAC4/GPJ4
DAC5/GPJ5
AVSS
75
GPA0
GPA1
GPB2
GPC0
GPJ0
GPJ1
3
24
25
28
29
30
31
32
34
108
109
123
112
119
120
124
16
PWRLIMIT#
18
21
33
47
48
GPE0_EC
19
1
82
83
84
125
35
17
20
107
93
OD
94
95
96
97
NUM_LED#
98
OD
99
OD
VGA_ALERT#
66
GPI0
67
GPI1
68
GPI2
69
GPI3
70
71
ECGPI6
72
ECGPI7
73
76
77
78
79
80
81
T2016T2016
T2015T2015
1
T2014T2014
1
T2007T2007
1
T2013T2013
1
PWR_LED # ( 53,56)
CHG_LED# (56)
CHG_FULL_LE D# (56)
LCD_BL_PW M (45)
FAN0_PWM ( 33)
BATSEL_0 ( 89)
BATSEL_1 ( 89)
ME_AC_PRESEN T (22)
PM_RSMRST# (22)
AC_IN_OC# (89)
BAT1_IN_OC# (60)
PM_SUSC# (22)
LCD_BACKOF F# (45)
FAN0_TACH (33)
PWR_SW # (5 3)
LID_SW# (45,53)
PM_SUSB# (22)
PM_CLKRUN # (22)
CHG_EN (89)
SUSC_EC# (57,85,87,91)
SUSB_EC# (32,45 ,57,83,84,85,87)
CAP_LED# (56)
SUS_PWR GD (22,32,81)
ALL_SYSTEM_PW RGD (32)
VRM_PWR GD (32,88)
PCH_TEMP_EN ABLE (32)
CPU_VRON (87,88)
PM_PWROK (22)
VSET_EC (89)
ISET_EC (89)
PM_RSMRST#
1 2
C3014
C3014
0.1UF/16V
0.1UF/16V
@
@
GND
Update 1105 (R2.0)
PWR_SW # LID_SW #
1 2
C3021
C3021
0.1UF/16V
0.1UF/16V
@
@
GND GND
VRM_PWR GD
ALL_SYSTEM_PW RGD
SUS_PWR GD
1 2
C3015
C3015
0.1UF/16V
0.1UF/16V
@
@
GND
1 2
C3018
C3018
0.1UF/16V
0.1UF/16V
@
@
GND
1 2
C3020
C3020
0.1UF/16V
0.1UF/16V
@
@
GND
1 2
C3022
C3022
0.1UF/16V
0.1UF/16V
@
@
2
For IT8502 Power
+3VA_EC +3VA
L3001
L3001
120Ohm/100Mhz
120Ohm/100Mhz
+3VA_EC
+3VA_EC
+3VA_EC
+3VS
+3VS
+5VS
+3VA_EC
Update 1105 (R2.0)
2 1
1 2
1 2
C3003
C3003
C3004
C3004
0.1UF/16V
0.1UF/16V
0.1UF/16V
0.1UF/16V
GND
1 2
10KOhm
10KOhm
3 4
10KOhm
10KOhm
7 8
10KOhm
10KOhm
5 6
10KOhm
10KOhm
Update 1105 (R2.0)
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
1 2
10KOhm
10KOhm
3 4
10KOhm
10KOhm
5 6
10KOhm
10KOhm
7 8
10KOhm
10KOhm
Update 1105 (R2.0)
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
PM_SUSB#
1 2
100KOhm
100KOhm
PM_SUSC#
3 4
100KOhm
100KOhm
5 6
100KOhm
100KOhm
7 8
100KOhm
100KOhm
PM_RSMRST#
R2534 10KOhm @R2534 10KOhm @
SUSB_EC#
SUSC_EC#
CPU_VRON
VSUS_ON
1 2
R3078 4.7KOhm @R3078 4.7KOhm @
1 2
R3077 4.7KOhm @R3077 4.7KOhm @
1 2
R2559 100KOHM @R 2559 100KOHM @
1 2
R2558 100KOHM @R 2558 100KOHM @
1 2
5 6
7 8
3 4
1 2
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN3001A
RN3001A
RN3001B
RN3001B
RN3001D
RN3001D
RN3001C
RN3001C
RN3042C
RN3042C
RN3042D
RN3042D
RN3042B
RN3042B
RN3042A
RN3042A
RN3043A
RN3043A
RN3043B
RN3043B
RN3043C
RN3043C
RN3043D
RN3043D
RN3041A
RN3041A
RN3041B
RN3041B
RN3041C
RN3041C
RN3041D
RN3041D
RN3032A
RN3032A
RN3032B
RN3032B
RN3032C
RN3032C
RN3032D
RN3032D
RN3044A
RN3044A
RN3044B
RN3044B
RN3044C
RN3044C
RN3044D
RN3044D
For X'tal
R3046
R3046
EC_XIN EC_XIN
/X
/X
1 2
10MOhm
10MOhm
X3001
X3001
32.768Khz
32.768Khz
1 4
2
C3016
C3016
15PF/50V
15PF/50V
1 2
1 2
C3005
C3005
0.1UF/16V
0.1UF/16V
PWR_SW #
LID_SW#
BAT1_IN_OC#
AC_IN_OC#
SMB0_DAT
SMB0_CLK
SMB1_CLK
SMB1_DAT
KB_RST#
A20GATE
VGA_ALERT#
PCH_TEMP_EN ABLE
TP_DAT
TP_CLK
CAP_LED#
NUM_LED#
PWRLIMIT#
Note:
Cload=12.5PF
place close to EC
3
+3VS
1 2
C3002
C3002
0.1UF/16V
0.1UF/16V
GND GND
JP3001
JP3001
0603
0603
GND
GND
EC_XOUT
C3017
C3017
15PF/50V
15PF/50V
1 2
+3VA_EC +3VPLL
1 2
C3006
C3006
10UF/6.3V
10UF/6.3V
2 1
EC_AGND
For EC Reset For PU / PD
FORCE_OFF # (32,81)
For EC Hardware Strap
I/O Base Address
Note: It can be programmable by EC fireware
Share Memory
Note: It can be programmable by EC fireware.
PP Enable
Note: Default Int. Pull-Low
+3VA_EC
R3052 10KOhm@R3052 10KO hm@
1 2
R3059 0Ohm@R 3059 0Ohm@
1 2
GND
If IT8500 BX and future version are used
and internal clock is selected , please
- Mount R3502 a nd R3509
- Un-Mount X30 01 , C3016 , C 3017
JP3002
JP3002
0603
0603
JP3003
JP3003
0603
0603
2 1
+3VACC
2 1
1
C3007
C3007
1 2
0.1UF/16V
0.1UF/16V
C3001
C3001
1 2
0.1UF/16V
0.1UF/16V
+3VA_EC
R3023 160KOHM R3023 160KOHM
1 2
D3001
D3001
1
2
BAT54AW
BAT54AW
@
@
EC_RST#
EC_RST#
R3215 0Ohm R 3215 0Ohm
1 2
1 2
C3013
C3013
0.1UF/16V
0.1UF/16V
@
@
GND
For iAMT pin name
AC_PRESENT
PM_S4_STATE#
S4_STATE_ON
PM_SLP_M#
SLP_M_ON
EC_WLAN_PWR
MP_PWRGD
AC_PRESENT
LAN_WOL_EN
+3VM_PG
+1.5VM_+3VMCLK_PG
SUSPWR_ACK
GPG0
EC_XIN
GND
EC_AGND
3
1 2
C3010
C3010
4.7UF/6.3V
4.7UF/6.3V
GND
GND
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Block Diagram
Block Diagram
Block Diagram
NB1
NB1
NB1
Engineer:
Engineer:
K82JR
K82JR
K82JR
1
Engineer:
30 97
30 97
30 97
Rev
Rev
Rev
1.1
1.1
1.1
ASUSTeK COM PUTER INC. NB6
ASUSTeK COM PUTER INC. NB6
ASUSTeK COM PUTER INC. NB6
Size Project Name
Size Project Name
Size Project Name
A2
A2
A2
Date: Sheet of
Thursday, Novem ber 12, 2009
Date: Sheet of
Thursday, Novem ber 12, 2009
Date: Sheet of
5
4
3
2
Thursday, Novem ber 12, 2009