Acer eMachines 350 Schematics

A
1 1
B
C
D
E
Compal Confidential
2 2
NAV51 Schematics Document
Intel Pineview Processor with Tigerpoint + DDRII
3 3
REV: 1.0
4 4
Security Classification
Security Classification
2010-03-31
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
133Tuesday, April 13, 2010
133Tuesday, April 13, 2010
133Tuesday, April 13, 2010
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Compal Confidential
Model Name : NAV51 File Name : LA-6311P
1 1
ZZZ
ZZZ
PCB
PCB
DA60000H810
DA60000H810
CRT Conn
page 10
LCD Conn.
page 9
RGB
LVDS
Pineview FCBGA 559
22x22mm
page 4,5,6
Memory BUS(DDRII)
1.8V DDRII 667
DDRII-SO-DIMM
Clock Generator CK505
page 8
page 7
Thermal Sensor
EMC1402
page 5
DMI X2 mode GEN1
USB
2 2
PCI-Express
Tigerpoint
HDA
PCBGA360
MINI Card x1 WLAN
page 20
17x17mm
page 11,12,13,14
10/100 Ethernet
AR8132L
page 20
LPC BUS
HDD
page 16
SATA
Azalia Codec
ALC272
page 20
USB Port X2
page 20
BlueTooth
page 15
CMOS CAM
page 9
Card Reader ENE UB6252
Transfermer
3 3
AMP & INT
INT MIC
Speaker
HeadPhone & MIC Jack
RJ45
Power ON/OFF
page 18
DC IN
page 23
DC/DC Interface
3VALW/5VALW
page 25
page 26
ENE KBC KB926
page 17
SPI
page 20
SD/MMC CONN
I/O Board
0.89VP/1.5VP
BATT IN
CHARGER
4 4
page 24
page 25
0.9VSP/2.5VSP
1.8V/VCCP
CPU_CORE
A
page 28
page 27
page 29
Int.KBD
page 19
B
Touch Pad
page19
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SPI ROM
C
page 17
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
233Tuesday, April 13, 2010
233Tuesday, April 13, 2010
233Tuesday, April 13, 2010
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Voltage Rails
DescriptionPower Plane
VIN
B+
1 1
+CPU_CORE
+VCCP
+1.5VS
+1.8V
+0.89V Graphic core power rail
+3VALW
+3VS
+5VALW
+5VS
+VSB VSB always on power rail ON
+RTCVCC
Adapter power supply ( 19V)
AC or battery power rail for powe r circuit.
Core voltage for CPU
0.9V switc hed power rail f or DDR termina tor+0.9VS
VCCP switched power rail
1.5V switched power rail
1.8V power rail for DDR
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
RTC power
S3S1
ONONONONON
ON
ON
ON OFF
ON
ON
ON
ON
ON
S5
ON
OFFON
OFF
OFF
OFF
OFFOFFON
OFFOFFON
OFF
ON
OFF
ON ON*
OFF
OFF
ON ON*
OFFON
OFF
ON*
ON
ON
External PCI Devices
DEVICE REQ/GNT # PIRQ
IDSEL #
No PCI Device
EC SM Bus1 address
Device
Smart Battery
Address
EC SM Bus2 address
Device
EMC1402
Address
100_11000001 011X b
Note : ON* means th at this power plane is ON o nly with AC power availab le, otherwise it is OFF.
2 2
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S3#
SLP_S4#
SLP_S5#
HIGH HIGH HIGH
HIGH
LOW
LOW LOW
LOWLOW
HIGHHIGHHIGH
HIGH
HIGH
LOW
+VALW
ON
ON
ON
ON
ON
+V +VS Clock
ON
OFF
OFF
OFF
ONON
LOW
OFF
OFF
OFF
ON
ON
ON
OFF
OFF
BOARD ID Table(Page 17)
Vcc 3.3V +/- 5%
Board ID
3 3
0(EVT) 1(DVT) 2(PVT) 3(MP)
4 5 6 7 NC
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
AD_BID
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
V typ
AD_BID
V
AD_BID
0 V 0 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1.264 V
2.200 V
3.300 V
2.341 V
3.300 V
max
BOARD ID Table
Board ID
0 1
PCB Revision
0.1
0.2
Tiger Point SM Bus address
Device
Clock Generator (SLG8SP556VTR)
DDR DIMMA
Address
1101 001Xb
1010 000Xb
USB table
MB USB Conn1. MB USB Conn2.
CMOS Card Reader
BT WLAN
EHCI1
EHCI2
UHCI1
UHCI2
UHCI3
UHCI4
UHCI5
UHCI6
Port0 Port1 Port2 Port3 Port4 Port5 Port6 Port7 Port8 Port9 Port10 Port11
PCIE table
PCIE port1
PCIE port2
PCIE port3
PCIE port4
PCIE port5
PCIE port6
SATA table
SATA port0
SATA port1
SATA port2
SATA port3
SATA port4
SATA port5
LAN
Wireless Card
HDD
2 3
4 4
4 5 6 7
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Notes List
Notes List
Notes List
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
333Tuesday, April 13, 2010
333Tuesday, April 13, 2010
333Tuesday, April 13, 2010
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PINEVIEW_M
U71A
U71A
DMI_RX0_C DMI_RX#0_C DMI_RX1_C DMI_RX#1_C
D D
C C
CLK_CPU_EXP#(8) CLK_CPU_EXP(8)
C435
C435
DMI_RX0(12)
DMI_RX#0(12)
DMI_RX1(12)
DMI_RX#1(12)
C436
C436
C437
C437
C438
C438
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
F3 F2 H4
G3
N7 N6
R10
R9
N10
N9
K2
J1
M4
L3
DMI_RX0_C
DMI_RX#0_C
DMI_RX1_C
DMI_RX#1_C
DMI_RXP_0 DMI_RXN_0 DMI_RXP_1 DMI_RXN_1
EXP_CLKINN EXP_CLKINP
EXP_TCLKINN EXP_TCLKINP RSVD RSVD
RSVD RSVD RSVD RSVD
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
PINEVIEW_M
+VCCP
REV = 1.1
REV = 1.1
DMI
DMI
Close to CPU
B B
FAN1 Conn
+5VS
+VCC_FAN1
EN_FAN1(21)
A A
1 2
0_0402_5%
0_0402_5%
R47
R47
FAN_SPEED1(21)
1 2 3 4
1
C1151
C1151
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+3VS
C312 2.2U_0603_10V6KC312 2.2U_0603_10V6K
1 2
U12
U12
EN VIN VOUT VSET
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
12
1
2
8
GND
7
GND
6
GND
5
GND
R256
R256 10K_0402_5%
10K_0402_5%
C311
C311 100P_0402_50V8J
100P_0402_50V8J
40mil
+VCC_FAN1
Update symbol 0111.
5
+5VS
3
DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1
EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS
1 OF 6
1 OF 6
H_PWRGD(5,13)
SLPIOVR#(13)
PLTRST#(5,13,16,17,21)
2
D19
D19 DAN217_SC59
DAN217_SC59
@
@
1
C313
C313
1 2
10U_0805_10V4Z
10U_0805_10V4Z
C1150
C1150
1 2
1000P_0402_50V7K
1000P_0402_50V7K
JP12
JP12
1 2 3
4 5
ACES_85204-0300N
ACES_85204-0300N
CONN@
CONN@
4
G2 G1 H3 J2
L10 L9 L8
N11
RSVD_TP
P11
RSVD_TP
K3
RSVD
L2
RSVD
M2
RSVD
N2
RSVD
XDP_PREQ#(5) XDP_PRDY#(5)
XDP_BPM#3(5 ) XDP_BPM#2(5 )
XDP_BPM#1(5 ) XDP_BPM#0(5 )
R354 1K_0402_5%R354 1K_0402_5%
1 2
R347 1K_0402_5%R347 1K_0402_5%
1 2
CPU_ITP(8) CPU_ITP#(8 )
PLTRST#
1 2
XDP_TDO(5)
XDP_TRST#(5 )
XDP_TDI(5) XDP_TMS(5)
XDP_TCK(5)
1 2 3
GND GND
4
3
DDR_A_DQS#[0..7](7)
DDR_A_D[0..63](7)
DDR_A_DM[0..7](7)
DMI_TX0 (12) DMI_TX#0 (12) DMI_TX1 (12) DMI_TX#1 (12)
R162
R162 R203
R203
49.9_0402_1%
49.9_0402_1% 750_0402_1%
750_0402_1%
T38T38
Must be placed within 500 mils from Pineview-M pins
T39T39
JP16
JP16
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
G1
26
G2
ACES_87151-24051
ACES_87151-24051
CONN@
CONN@
R348
R348
XDP_PREQ# XDP_PRDY#
XDP_BPM#3 XDP_BPM#2
XDP_BPM#1 XDP_BPM#0
1K_0402_1%
1K_0402_1%
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS
XDP_TCK
XDP Reserve
XDP_TDI
XDP_TMS
XDP_TDO
XDP_PREQ#
XDP_TRST#
XDP_TCK
R341 51 +-1% 0402R341 51 +-1% 0402
1 2
R342 51 +-1% 0402R342 51 +-1% 0402
1 2
R343 51 +-1% 0402R343 51 +-1% 0402
1 2
R344 51 +-1% 0402R344 51 +-1% 0402
1 2
R345 51 +-1% 0402R345 51 +-1% 0402
1 2
R346 51 +-1% 0402R346 51 +-1% 0402
1 2
Modify D38 D39 D40 Pin define 08/13
XDP_PREQ#
XDP_TDO
XDP_TRST#
XDP_TDI
3
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DDR_A_DQS[0..7](7)
DDR_A_MA[0..14](7)
+VCCP
XDP_TMS XDP_TCK
2
3
D39
D39
2
D40
D40
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
3
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14
1
C1179
C1179
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+1.8V
1
C1180
C1180
0.01U_0402_16V7K
0.01U_0402_16V7K
2
Deciphered Date
Deciphered Date
Deciphered Date
DDR_A_WE# DDR_A_CAS# DDR_A_RAS#
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_CS#0 DDR_CS#1
DDR_CKE0 DDR_CKE1
M_ODT0 M_ODT1
M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1
+1.8V
R369
R369 10K_0402_5%
10K_0402_5%
R370
R370 10K_0402_5%
10K_0402_5%
@
@
R242
R242
80.6_0402_1%
80.6_0402_1%
R243
R243
80.6_0402_1%
80.6_0402_1%
T40T40 T41T41
DDR_REF DDR_RPD DDR_RPU
DDR_RPU
DDR_RPD
DDR_A_WE#(7) DDR_A_CAS#(7) DDR_A_RAS#(7)
DDR_A_BS0(7) DDR_A_BS1(7) DDR_A_BS2(7)
DDR_CS#0(7) DDR_CS#1(7)
DDR_CKE0(7) DDR_CKE1(7)
M_ODT0(7) M_ODT1(7)
M_CLK_DDR0(7) M_CLK_DDR#0(7) M_CLK_DDR1(7) M_CLK_DDR#1(7)
+1.8V
12
R50
R50
1K_0402_1%
1K_0402_1%
12
R142
R142
1K_0402_1%
1K_0402_1%
2
3
D38
D38
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
Add 2009-6-17
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
PJDLC05C_SOT23-3
2
PINEVIEW_M
U71B
U71B
AH19
DDR_A_MA_0
AJ18
DDR_A_MA_1
AK18
DDR_A_MA_2
AK16
DDR_A_MA_3
AJ14
DDR_A_MA_4
AH14
DDR_A_MA_5
AK14
DDR_A_MA_6
AJ12
DDR_A_MA_7
AH13
DDR_A_MA_8
AK12
DDR_A_MA_9
AK20
DDR_A_MA_10
AH12
DDR_A_MA_11
AJ11
DDR_A_MA_12
AJ24
DDR_A_MA_13
AJ10
DDR_A_MA_14
AK22
DDR_A_WE#
AJ22
DDR_A_CAS#
AK21
DDR_A_RAS#
AJ20
DDR_A_BS_0
AH20
DDR_A_BS_1
AK11
DDR_A_BS_2
AH22
DDR_A_CS#_0
AK25
DDR_A_CS#_1
AJ21
DDR_A_CS#_2
AJ25
DDR_A_CS#_3
AH10
DDR_A_CKE_0
AH9
DDR_A_CKE_1
AK10
DDR_A_CKE_2
AJ8
DDR_A_CKE_3
AK24
DDR_A_ODT_0
AH26
DDR_A_ODT_1
AH24
DDR_A_ODT_2
AK27
DDR_A_ODT_3
AG15
DDR_A_CK_0
AF15
DDR_A_CK_0#
AD13
DDR_A_CK_1
AC13
DDR_A_CK_1#
AC15
DDR_A_CK_3
AD15
DDR_A_CK_3#
AF13
DDR_A_CK_4
AG13
DDR_A_CK_4#
AD17
RSVD
AC17
RSVD
AB15
RSVD
AB17
RSVD
AB4
RSVD
AK8
RSVD
AB11
RSVD_TP
AB13
RSVD_TP
AL28
DDR_VREF
AK28
DDR_RPD
AJ26
DDR_RPU
AK29
RSVD
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
2
PINEVIEW_M
REV = 1.1
REV = 1.1
DDR_A_DQS_0
DDR_A_DQS#_0
DDR_A_DM_0
DDR_A_DQ_0 DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7
DDR_A_DQS_1
DDR_A_DQS#_1
DDR_A_DM_1
DDR_A_DQ_8
DDR_A_DQ_9 DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15
DDR_A_DQS_2
DDR_A_DQS#_2
DDR_A_DM_2
DDR_A_DQ_16 DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23
DDR_A_DQS_3
DDR_A_DQS#_3
DDR_A_DM_3
DDR_A_DQ_24 DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31
DDR_A_DQS_4
DDR_A_DQS#_4
DDR_A_DM_4
DDR_A_DQ_32 DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39
DDR_A_DQS_5
DDR_A_DQS#_5
DDR_A_DM_5
DDR_A_DQ_40 DDR_A_DQ_41 DDR_A_DQ_42 DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47
DDR_A_DQS_6
DDR_A_DQS#_6
DDR_A
DDR_A
2 OF 6
2 OF 6
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR_A_DM_6
DDR_A_DQ_48 DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55
DDR_A_DQS_7
DDR_A_DQS#_7
DDR_A_DM_7
DDR_A_DQ_56 DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
DDR_A_DQS0
AD3
DDR_A_DQS#0
AD2
DDR_A_DM0
AD4
DDR_A_D0
AC4
DDR_A_D1
AC1
DDR_A_D2
AF4
DDR_A_D3
AG2
DDR_A_D4
AB2
DDR_A_D5
AB3
DDR_A_D6
AE2
DDR_A_D7
AE3
DDR_A_DQS1
AB8
DDR_A_DQS#1
AD7
DDR_A_DM1
AA9
DDR_A_D8
AB6
DDR_A_D9
AB7
DDR_A_D10
AE5
DDR_A_D11
AG5
DDR_A_D12
AA5
DDR_A_D13
AB5
DDR_A_D14
AB9
DDR_A_D15
AD6
DDR_A_DQS2
AD8
DDR_A_DQS#2
AD10
DDR_A_DM2
AE8
DDR_A_D16
AG8
DDR_A_D17
AG7
DDR_A_D18
AF10
DDR_A_D19
AG11
DDR_A_D20
AF7
DDR_A_D21
AF8
DDR_A_D22
AD11
DDR_A_D23
AE10
DDR_A_DQS3
AK5
DDR_A_DQS#3
AK3
DDR_A_DM3
AJ3
DDR_A_D24
AH1
DDR_A_D25
AJ2
DDR_A_D26
AK6
DDR_A_D27
AJ7
DDR_A_D28
AF3
DDR_A_D29
AH2
DDR_A_D30
AL5
DDR_A_D31
AJ6
DDR_A_DQS4
AG22
DDR_A_DQS#4
AG21
DDR_A_DM4
AD19
DDR_A_D32
AE19
DDR_A_D33
AG19
DDR_A_D34
AF22
DDR_A_D35
AD22
DDR_A_D36
AG17
DDR_A_D37
AF19
DDR_A_D38
AE21
DDR_A_D39
AD21
DDR_A_DQS5
AE26
DDR_A_DQS#5
AG27
DDR_A_DM5
AJ27
DDR_A_D40
AE24
DDR_A_D41
AG25
DDR_A_D42
AD25
DDR_A_D43
AD24
DDR_A_D44
AC22
DDR_A_D45
AG24
DDR_A_D46
AD27
DDR_A_D47
AE27
DDR_A_DQS6
AE30
DDR_A_DQS#6
AF29
DDR_A_DM6
AF30
DDR_A_D48
AG31
DDR_A_D49
AG30
DDR_A_D50
AD30
DDR_A_D51
AD29
DDR_A_D52
AJ30
DDR_A_D53
AJ29
DDR_A_D54
AE29
DDR_A_D55
AD28
DDR_A_DQS7
AB27
DDR_A_DQS#7
AA27
DDR_A_DM7
AB26
DDR_A_D56
AA24
DDR_A_D57
AB25
DDR_A_D58
W24
DDR_A_D59
W22
DDR_A_D60
AB24
DDR_A_D61
AB23
DDR_A_D62
AA23
DDR_A_D63
W27
Pineview(1/3)
Pineview(1/3)
Pineview(1/3)
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
1
1.0
1.0
433Tuesday, April 13, 2010
433Tuesday, April 13, 2010
433Tuesday, April 13, 2010
1.0
of
of
of
5
4
3
2
1
PINEVIEW_M
U71C
U71C
D12
T2T2 T12T12 T3T3 T4T4
D D
C C
B B
A A
T13T13 T5T5 T6T6 T7T7 T14T14
XDP_RSVD_09
T8T8 T15T15 T9T9 T16T16 T10T10 T17T17 T11T11 T28T28
T37T37
XDP_RSVD_09
R1378
R1378 1K_0402_5%
1K_0402_5%
1 2
T18T18 T19T19 T20T20 T21T21
T22T22 T23T23 T24T24 T25T25
H_THERMDA, H_THERMDC routing together. Trace width / Spacing = 10 / 10 mil
+3VS
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C79
C79
1 2
2200P_0402_50V7K
2200P_0402_50V7K
AA21
C80
C80
H_THERMDA
5
XDP_RSVD_00
A7
XDP_RSVD_01
D6
XDP_RSVD_02
C5
XDP_RSVD_03
C7
XDP_RSVD_04
C6
XDP_RSVD_05
D8
XDP_RSVD_06
B7
XDP_RSVD_07
A9
XDP_RSVD_08
D9
XDP_RSVD_09
C8
XDP_RSVD_10
B8
XDP_RSVD_11
C10
XDP_RSVD_12
D10
XDP_RSVD_13
B11
XDP_RSVD_14
B10
XDP_RSVD_15
B12
XDP_RSVD_16
C11
XDP_RSVD_17
L11
RSVD
AA7
RSVD_TP
AA6
RSVD_TP
R5
RSVD_TP
R6
RSVD_TP
RSVD_TP
W21
RSVD_TP
T21
RSVD_TP
V21
RSVD_TP
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
H_THERMDC
PINEVIEW_M
REV = 1.1
REV = 1.1
VGA
VGA
MISC
MISC
CRT_HSYNC CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
REFCLKINP
REFCLKINN REFSSCLKINP REFSSCLKINN
PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
PWROK
RSTIN#
HPL_CLKINN HPL_CLKINP
3 OF 6
3 OF 6
CPU THERMAL SENSOR
U2
U2
GND
8
7
6
5
EC_SMB_CK2
EC_SMB_DA2
1
VDD
2
DP
3
DN
4
THERM#
EMC1402-1-ACZL-TR MSOP 8P SENSOR
EMC1402-1-ACZL-TR MSOP 8P SENSOR
Address:100_1100
SMCLK
SMDATA
ALERT#
R249 be placed <750 mils to U71.M30 R247 be placed <750 mils to U71.M29
R249 10_0402_5%R249 10_0402_5%
M30 M29
N31 P30 P29 N30
L31 L30
P28
Y30 Y29 AA30 AA31
K29 J30 L5 AA3
W8 W9
1 2
R247 10_0402_5%R247 10_0402_5%
1 2
GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B
CPU_DREFCLK CPU_DREFCLK# CPU_SSCDREFCLK CPU_SSCDREFCLK#
PM_EXTTS#1 PM_EXTTS#0 H_PWROK PLTRST#
CLK_CPU_HPLCLK# CLK_CPU_HPLCLK
GMCH_CRT_R (10) GMCH_CRT_G (10) GMCH_CRT_B (10)
R201 be placed <500 mils to U71.P28
GMCH_CRT_DATA (10) GMCH_CRT_CLK (10)
R201 665_0402_1%R201 665_0402_1%
0_0402_5%
0_0402_5%
R200
R200
PM_EXTTS#0 (7)
PLTRST# (4,13,16,17,21)
CPU_DREFCLK (8) CPU_DREFCLK# (8) CPU_SSCDREFCLK (8) CPU_SSCDREFCLK# (8)
PM_DPRSLPVR (13)
CLK_CPU_HPLCLK# (8) CLK_CPU_HPLCLK (8)
Modify 08/04
R305
H_PWROK
To be placed <250 mils to U71 ball
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_ENBKL
To be placed <500 mils to U71 ball
EC_SMB_CK2 (21)
12
4
EC_SMB_DA2 (21)
+3VS
R58
R58
10K_0402_5%
10K_0402_5%
1 2
R306
R306
1 2
R307
R307
1 2
150_0402_1%
150_0402_1% R308
R308
1 2
150_0402_1%
150_0402_1% R309
R309
1 2
150_0402_1%
150_0402_1%
R34
R34
100K_0402_5%
100K_0402_5%
R305
@
@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
Close to Processor pin
GMCH_CRT_HSYNC (10) GMCH_CRT_VSYNC (10)
%20FKDQJH
VGATE (8,13,31)
PCH_OK (13)
1
2
LVDS_ACLK#(9) LVDS_ACLK(9) LVDS_A0#(9 ) LVDS_A0(9 ) LVDS_A1#(9 ) LVDS_A1(9 ) LVDS_A2#(9 ) LVDS_A2(9 )
GMCH_ENBKL(21) DPST_PWM(9)
GMCH_ENVDD(9)
H_SMI#
C1171
C1171 470P_0402_50V7K
470P_0402_50V7K
R151 be placed U71.R22
2.37K_0402_1%
2.37K_0402_1%
GMCH_ENBKL
LVDS_SCL(9) LVDS_SDA(9)
XDP_BPM#0(4) XDP_BPM#1(4) XDP_BPM#2(4) XDP_BPM#3(4)
XDP_TDI(4) XDP_TDO(4) XDP_TCK(4) XDP_TMS(4) XDP_TRST#(4)
H_THERMDA H_THERMDC
XDP_TCK
T58T58
XDP_TDI
T59T59
XDP_TDO
T60T60
XDP_TMS
T61T61
XDP_TRST#
T62T62
H_PWRGD
T63T63
R151
R151
T48T48 T49T49 T50T50 T51T51
T55T55
XDP_TDI XDP_TDO XDP_TCK
XDP_TMS XDP_TRST#
U25
LA_CLKN
U26
LA_CLKP
R23
LA_DATAN_0
R24
LA_DATAP_0
N26
LA_DATAN_1
N27
LA_DATAP_1
R26
LA_DATAN_2
R27
LA_DATAP_2
R22
LIBG
J28
LVBG
N22
LVREFH
N23
LVREFL
L27
LBKLT_EN
L26
LBKLT_CTL
L23
LCTLA_CLK
K25
LCTLB_DATA
K23
LDDC_CLK
K24
LDDC_DATA
H26
LVDD_EN
G11
BPM_1_0#
E15
BPM_1_1#
G13
BPM_1_2#
F13
BPM_1_3#
B18
BPM_2_0#/RSVD
B20
BPM_2_1#/RSVD
C20
BPM_2_2#/RSVD
B21
BPM_2_3#/RSVD
G5
RSVD
D14
TDI
D13
TDO
B14
TCK
C14
TMS
C16
TRST#
D30
THRMDA_1
E30
THRMDC_1
C30
THRMDA_2/RSVD
D31
THRMDC_2/RSVD
U71D
U71D
INEVIEW-M_FCBGA8559
INEVIEW-M_FCBGA8559
P
P
PINEVIEW_M
PINEVIEW_M
LVDS
LVDS
Add 470PF on H_SMI# for known issue 07/08
+3VS
12
R143
R143 10K_0402_5%
10K_0402_5%
PM_EXTTS#0
H_PROCHOT#
Close to Processor pin
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM T HE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM T HE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM T HE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
3
+VCCP
R202
R202 68_0402_5%
68_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
H_GTLREF
1
C939
C939
2
1U_0603_10V6K
1U_0603_10V6K
placed within 0.5" of processor pin and 5mils spacing.
2
4 OF 6
4 OF 6
+VCCP
REV = 1.1
REV = 1.1
ICH
ICH
CPU
CPU
R144
R144 1K_0402_1%
1K_0402_1%
R155
R155 2K_0402_1%
2K_0402_1%
H_SMI#
E7
SMI# A20M# FERR#
LINT0 LINT1
IGNNE#
STPCLK#
DPRSTP#
DPSLP#
INIT# PRDY# PREQ#
THERMTRIP#
PROCHOT#
CPUPWRGOOD
GTLREF
VSS
RSVD RSVD
BCLKN BCLKP
BSEL_0 BSEL_1 BSEL_2
VID_0 VID_1 VID_2 VID_3 VID_4 VID_5 VID_6
RSVD RSVD RSVD RSVD
RSVD_TP RSVD_TP
EXTBGREF
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
H_A20M#
H7
H_FERR#
H6
H_INTR
F10
H_NMI
F11
H_IGNNE#
E5
H_STPCLK#
F8
H_DPRSTP#
G6
H_DPSLP#
G10
H_INIT#
G8
XDP_PRDY#
E11
XDP_PREQ#
F15
H_THERMTRIP#
E13
H_PROCHOT#
C18
H_PWRGD
W1
H_GTLREF
A13 H27
L6 E17
CLK_CPU_BCLK#
H10
CLK_CPU_BCLK
J10
CPU_BSEL0
K5
CPU_BSEL1
H5
CPU_BSEL2
K6
CPU_VID0
H30
CPU_VID1
H29
CPU_VID2
H28
CPU_VID3
G30
CPU_VID4
G29
CPU_VID5
F29
CPU_VID6
E29
L7 D20 H13 D18
K9 D19 K7
placed within 0.5" of processor pin and 5mils spacing.
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
T26T26 T27T27
H_EXTBGREF
H_EXTBGREF
C940
C940
1U_0603_10V6K
1U_0603_10V6K
Pineview(2/3)
Pineview(2/3)
Pineview(2/3)
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
+VCCP
1
2
H_SMI# (11) H_A20M# (11) H_FERR# (11) H_INTR (11) H_NMI (11) H_IGNNE# (11) H_STPCLK# (11)
H_DPRSTP# (13) H_DPSLP# (13)
H_INIT# (11) XDP_PRDY# (4) XDP_PREQ# (4)
H_THERMTRIP# (11)
H_PWRGD (4,13)
CPU_BSEL0 (8) CPU_BSEL1 (8) CPU_BSEL2 (8)
CPU_VID0 (31) CPU_VID1 (31) CPU_VID2 (31) CPU_VID3 (31) CPU_VID4 (31) CPU_VID5 (31) CPU_VID6 (31)
R244
R244
976_0402_1%
976_0402_1%
R156
R156
3.3K_0402_1%
3.3K_0402_1%
533Tuesday, April 13, 2010
533Tuesday, April 13, 2010
533Tuesday, April 13, 2010
1
CLK_CPU_BCLK# (8) CLK_CPU_BCLK (8)
of
of
of
1.0
1.0
1.0
5
U71E
W14 W16 W18 W19
U71E
T13
VCCGFX
T14
VCCGFX
T16
VCCGFX
T18
VCCGFX
T19
VCCGFX
V13
VCCGFX
V19
VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX
PINEVIEW_M
PINEVIEW_M
GFX/MCH
GFX/MCH
REV = 1.1
REV = 1.1
GFX supply current: 1.38A Sustained GFX supply current: 1.05A
D D
+0.89V
DDR supply current 2.27A
+1.8V
2.2U_0603_10V6K
2.2U_0603_10V6K
C188
C188
+1.8V
C C
1
C267
C267
DDR analog supply current: 1.32A
2
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
C243 to closed U71.U10
Display PLL SFR and CRT DAC supply current: 0.154A
B B
+1.8VS
R321
R321
0_0603_5%
0_0603_5%
+VCCP
DAC, GIO, LVDS, & LGIO, DPLL, HMPLL supply current: 0.33A
A A
2.2U_0603_10V6K
2.2U_0603_10V6K
Modify to 2.2U 05/11
2.2U_0603_10V6K
2.2U_0603_10V6K
2
C186
C186
C187
C187
1
1
1
C243
C243
2
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
C192
C192
C189
C189
2
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1
1
C81
C81
C71
C71
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
C85
C85
1
1
2.2U_0603_10V6K
2.2U_0603_10V6K
1
C236
C236
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
+VCC_CRT_DAC
1
C70
C70
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
2.2U_0603_10V6K
2.2U_0603_10V6K
+VCCA_VCCD
C55
C55
12
+3VS
GIO supply current: 0.006A
+RING_EAST +RING_WE ST
+0.89V
2
C74
C74
1
Close Chipset pin
5
AK13
VCCSM
AK19
VCCSM
AK9
VCCSM
AL11
VCCSM
AL16
VCCSM
AL21
VCCSM
AL25
VCCSM
AK7
VCCCK_DDR
AL7
VCCCK_DDR
U10
VCCA_DDR
U5
VCCA_DDR
U6
VCCA_DDR
U7
VCCA_DDR
U8
VCCA_DDR
U9
VCCA_DDR
V2
VCCA_DDR
V3
VCCA_DDR
V4
VCCA_DDR
W10
VCCA_DDR
W11
VCCA_DDR
AA10
VCCACK_DDR
AA11
VCCACK_DDR
AA19
VCCD_AB_DPL
V11
VCCD_HMPLL
AC31
VCCSFR_AB_DPL
T30
VCCACRTDAC
T31
VCC_GIO
J31
VCCRING_EAST
C3
VCCRING_WEST
B2
VCCRING_WEST
C2
VCCRING_WEST
A21
C50
C50
1
C76
C76
2
1U_0402_6.3V6K
1U_0402_6.3V6K
VCC_LGI
1
@
@
2
1U_0603_10V6K
1U_0603_10V6K
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
1
1
1
C78
C78
C77
C77
C75
C75
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR
DDR
EXP\CRT\PLL
EXP\CRT\PLL
5 OF 6
5 OF 6
2
C51
C51
1
1
1
+
+
C15
C15
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
4
CPU
CPU
POWER
POWER
VCCSENSE VSSSENSE
VCCALVDS VCCDLVDS
LVDS
LVDS
VCCA_DMI VCCA_DMI
DMI
DMI
C276
C276 330U_B2_2.5VM_R15M
330U_B2_2.5VM_R15M
VCCA_DMI
VCCSFR_DMIHMPLL
4
A23
VCC
A25
VCC
A27
VCC
B23
VCC
B24
VCC
B25
VCC
B26
VCC
B27
VCC
C24
VCC
C26
VCC
D23
VCC
D24
VCC
D26
VCC
D28
VCC
E22
VCC
E24
VCC
E27
VCC
F21
VCC
F22
VCC
F25
VCC
G19
VCC
G21
VCC
G24
VCC
H17
VCC
H19
VCC
H22
VCC
H24
VCC
J17
VCC
J19
VCC
J21
VCC
J22
VCC
K15
VCC
K17
VCC
K21
VCC
L14
VCC
L16
VCC
L19
VCC
L21
VCC
N14
VCC
N16
VCC
N19
VCC
N21
VCC
C29 B29 Y2
VCCA
+VCCP
D4
VCCP
B4
VCCP
B3
VCCP
Please closed U71.D4
V30 W31
T1 T2 T3
P2
RSVD
AA1
E2
VCCP
3
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
C428
C428
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C430
C430
C429
C429
2
1
C431
C431
2
1U_0402_6.3V6K
1U_0402_6.3V6K
Please closed U71
+CPU_CORE
2 x 330uF(9mohm/2)
1
+
+
330U 2.5V Y
330U 2.5V Y
2
C1153
C1153
C1152
C1152
1
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
2
VCCSENSE VSSSENSE
Processor Core analog supply current: 0.08A
1
2
+VCC_ALVD +VCC_DLVD
+VCC_DMI
+DMI_HMPLL
1
0.1U_0402_10V6K
0.1U_0402_10V6K
2
VCCSENSE (31) VSSSENSE (31)
+1.5VS
1
C391
C391
0.01U_0402_16V7K
0.01U_0402_16V7K
2
C1161
C1161
0.1U_0402_10V6K
0.1U_0402_10V6K
Please closed U71.Y2
LVDS supply current: 0.06A
DMI analog supply current: 0.48A
T56T56
SFR & DMIHMPLL supply current: 0.104A
+VCCP
C1162
C1162
1
+
+
C278
C275
C275
C278
330U 2.5V Y
330U 2.5V Y
2
+CPU_CORE
C1154
C1154
1
1
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
2
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+CPU_CORE
+VCCP
R20
R20
1 2
0_0603_5%
0_0603_5%
R21
R21
1 2
0_0603_5%
0_0603_5%
1U_0603_10V6K
1U_0603_10V6K
R28
R28
1 2
0_0603_5%
0_0603_5%
1U_0603_10V6K
1U_0603_10V6K
R53
R53
1 2
0_0805_5%
0_0805_5%
VCCSENSE
VSSSENSE
+1.8VS
R25
R25
1 2
MBK1608601YZF_2P
MBK1608601YZF_2P
R18
R18
1 2
0_0603_5%
0_0603_5%
1 2
0_0603_5%
0_0603_5%
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
1
C242
C242 1U_0603_10V6K
1U_0603_10V6K
2
1
C64
C64
2
1
C68
C68
2
+CPU_CORE
R32
R32
1 2
100_0402_1%
100_0402_1%
R31
R31
1 2
100_0402_1%
100_0402_1%
+VCC_CRT_DAC
1
C239
C239 1U_0603_10V6K
1U_0603_10V6K
2
+DMI_HMPLL
1
C69
C69 1U_0603_10V6K
1U_0603_10V6K
2
R26
R26
1 2
100NH +-5% LL1608-FSLR10J
100NH +-5% LL1608-FSLR10J
1
C1155
C1155 1U_0603_10V6K
1U_0603_10V6K
2
R27
R27
+VCC_DLVD
1
C235
C235 1U_0603_10V6K
1U_0603_10V6K
2
Deciphered Date
Deciphered Date
Deciphered Date
1
2
1
1U_0603_10V6K
1U_0603_10V6K
2
2
+RING_EAST
+RING_WE ST
C241
C241 1U_0603_10V6K
1U_0603_10V6K
+VCC_DMI
C237
C237
+VCCA_VCCD
+VCC_ALVD
1
C56
C56
22UF 6.3V M X5R 0805 H1.25
22UF 6.3V M X5R 0805 H1.25
2
2
1
PINEVIEW_M
PINEVIEW_M
U71F
U71F
REV = 1.1
REV = 1.1
A11
VSS
A16
VSS
A19
VSS
A29
RSVD_NCTF
A3
RSVD_NCTF
A30
RSVD_NCTF
A4
RSVD_NCTF
AA13
VSS
AA14
VSS
AA16
VSS
AA18
VSS
AA2
VSS
AA22
VSS
AA25
VSS
AA26
VSS
AA29
VSS
AA8
VSS
AB19
VSS
AB21
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AC10
VSS
AC11
VSS
AC19
VSS
AC2
VSS
AC21 AC28 AC30 AD26
AD5
AE1 AE11 AE13 AE15 AE17 AE22 AE31 AF11 AF17 AF21 AF24 AF28 AG10
AG3 AH18 AH23 AH28
AH4
AH6
AH8
AJ1 AJ16 AJ31
AK1
AK2 AK23 AK30 AK31
AL13 AL19
AL2 AL23 AL29
AL3 AL30
AL9
B13
B16
B19
B22
B30
B31
B5 B9
C1 C12 C21 C22 C25 C31 D22
E1
E10 E19 E21 E25
E8
F17 F19
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
GND
GND
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS
6 OF 6
6 OF 6
P
P
INEVIEW-M_FCBGA8559
INEVIEW-M_FCBGA8559
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Pineview(3/3)
Pineview(3/3)
Pineview(3/3)
F24
VSS
F28
VSS
F4
VSS
G15
VSS
G17
VSS
G22
VSS
G27
VSS
G31
VSS
H11
VSS
H15
VSS
H2
VSS
H21
VSS
H25
VSS
H8
VSS
J11
VSS
J13
VSS
J15
VSS
J4
VSS
K11
VSS
K13
VSS
K19
VSS
K26
VSS
K27
VSS
K28
VSS
K30
VSS
K4
VSS
K8
VSS
L1
VSS
L13
VSS
L18
VSS
L22
VSS
L24
VSS
L25
VSS
L29
VSS
M28
VSS
M3
VSS
N1
VSS
N13
VSS
N18
VSS
N24
VSS
N25
VSS
N28
VSS
N4
VSS
N5
VSS
N8
VSS
P13
VSS
P14
VSS
P16
VSS
P18
VSS
P19
VSS
P21
VSS
P3
VSS
P4
VSS
R25
VSS
R7
VSS
R8
VSS
T11
VSS
U22
VSS
U23
VSS
U24
VSS
U27
VSS
V14
VSS
V16
VSS
V18
VSS
V28
VSS
V29
VSS
W13
VSS
W2
VSS
W23
VSS
W25
VSS
W26
VSS
W28
VSS
W30
VSS
W4
VSS
W5
VSS
W6
VSS
W7
VSS
Y28
VSS
Y3
VSS
Y4
VSS
T29
VSS
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
633Tuesday, April 13, 2010
633Tuesday, April 13, 2010
633Tuesday, April 13, 2010
1
of
of
of
1.0
1.0
1.0
5
DDR_A_DQS#[0..7](4)
DDR_A_D[0..63](4)
DDR_A_DM[0..7](4)
DDR_A_DQS[0..7](4)
DDR_A_MA[0..14](4)
D D
+1.8V
2
C128
C128
C129
C129
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
1
+
+
@
@
C94
C94
C106
C106
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
C C
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
+0.9VS
1
1
1
C117
C117
C119
C119
2
B B
A A
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_MA13 M_ODT0 DDR_CS#0 DDR_A_RAS#
DDR_A_BS0 DDR_A_MA10 DDR_A_MA1 DDR_A_MA3
M_ODT1 DDR_CS#1 DDR_A_CAS# DDR_A_WE#
0.1U_0402_16V4Z
0.1U_0402_16V4Z
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
C86
C86
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RP6
RP6
1 8 2 7 3 6 4 5
RP2
RP2
1 8 2 7 3 6 4 5
RP3
RP3
1 8 2 7 3 6 4 5
C121
C121
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C87
C87
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
2
C110
C110
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
C105
C105
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C88
C88
C122
C122
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RP5
RP5
18 27 36 45
RP4
RP4
18 27 36 45
RP1
RP1
18 27 36 45
47_0804_8P4R_5%
47_0804_8P4R_5%
2
C109
C109
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
C108
C108
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C115
C115
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_BS1
DDR_A_MA0 DDR_A_MA2 DDR_A_MA4
DDR_A_MA6 DDR_A_MA7 DDR_A_MA11
DDR_A_MA14
DDR_A_MA5
DDR_A_MA8 DDR_A_MA9
DDR_A_MA12
2
C130
C130
1
1
C107
C107
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C91
C91
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
C90
C90
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Layout Note: Place near JDIM1
1
C120
C120
2
4
1
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Layout Note: Place these resistor closely DIMMA,all trace length<1000 mil
1
C89
C89
C118
C118
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
3
09/03
+DIMM_VREF
+1.8V
12
R61
R61
1K_0402_1%
1K_0402_1%
+DIMM_VREF
12
R62
R62
1K_0402_1%
1K_0402_1%
1
C439
C439
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C440
C440
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C441
C441
C442
C442
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Share +DIMM_VREF for
1.DDRII VREF
2.GMCH SM_VREF_0 SM_VREF_1
1
1
C445
C443
C443
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C445
C444
C444
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C116
C116
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
1
C446
C446
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C141
C141
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C111
C111
20mils
1
C112
C112
2.2U 6.3V M X5R 0402
2.2U 6.3V M X5R 0402
2
DDR_CKE0(4 )
DDR_A_BS2(4)
DDR_A_BS0(4) DDR_A_WE#(4)
DDR_A_CAS#(4)
DDR_CS#1(4)
M_ODT1(4)
CLK_SMBDATA(8,17)
CLK_SMBCLK(8,17)
DDR_A_D0 DDR_A_D1
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0
DDR_A_BS2
DDR_A_MA12 DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS0 DDR_A_WE#
DDR_A_CAS# DDR_CS#1
M_ODT1
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_DM5
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_DM7
DDR_A_D58 DDR_A_D59
CLK_SMBDATA CLK_SMBCLK
2
+1.8V +1.8V
CONN@
CONN@
JDIM1
JDIM1
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
G1
FOX_AS0A426-N4RN-7F
FOX_AS0A426-N4RN-7F
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0 CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD
BA1 RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1 CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SA0
SA1
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90
A11
92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106 108 110
S0#
112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
202
G2
DIMMA
1
Change to SP07F001720 04/30
DDR_A_D4 DDR_A_D5
DDR_A_DM0
DDR_A_D6 DDR_A_D7
DDR_A_D12 DDR_A_D13
DDR_A_DM1
M_CLK_DDR0 M_CLK_DDR#0
DDR_A_D14 DDR_A_D15
DDR_A_D20 DDR_A_D21
DDR_A_DM2
DDR_A_D22 DDR_A_D23
DDR_A_D28 DDR_A_D29
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D30 DDR_A_D31
DDR_CKE1
DDR_A_MA14
DDR_A_MA11 DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2 DDR_A_MA0
DDR_A_BS1 DDR_A_RAS# DDR_CS#0
M_ODT0 DDR_A_MA13
DDR_A_D36 DDR_A_D37
DDR_A_DM4
DDR_A_D38 DDR_A_D39
DDR_A_D44 DDR_A_D45
DDR_A_DQS#5 DDR_A_DQS5
DDR_A_D46 DDR_A_D47
DDR_A_D52 DDR_A_D53
M_CLK_DDR1 M_CLK_DDR#1
DDR_A_DM6
DDR_A_D54 DDR_A_D55
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
R66 10K_0402_5%R66 10K_0402_5%
1 2
R65 10K_0402_5%R65 10K_0402_5%
1 2
)RU(0,VUHTXHVWDGGLW
R64
R64
M_CLK_DDR0 (4) M_CLK_DDR#0 (4)
1 2
DDR_CKE1 (4)
DDR_A_BS1 (4) DDR_A_RAS# (4) DDR_CS#0 (4)
M_ODT0 (4)
M_CLK_DDR1 (4) M_CLK_DDR#1 (4)
0_0402_5%
0_0402_5%
PM_EXTTS#0 (5)
DDR_CKE1
DDR_A_BS2
DDR_CKE0
R163
R163
1 2
47_0402_5%
47_0402_5% R60
R60
1 2
47_0402_5%
47_0402_5% R59
R59
1 2
47_0402_5%
47_0402_5%
Layout Note: Place these resistor closely DIMMA,all trace length Max=1000 mil
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMMA
DDRII-SODIMMA
DDRII-SODIMMA
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
733Tuesday, April 13, 2010
733Tuesday, April 13, 2010
733Tuesday, April 13, 2010
1
of
of
of
1.0
1.0
1.0
5
PCI
SRC
CPU
CLKSEL1
0
FSA
CLKSEL0
MHz
266
MHz
1000
MHz
MHz
33.30
14.318 96.0 48.0
DOT_96 MHz
USB MHz
FSC FSB REF
CLKSEL2
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
D D
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
111
+3VS
R435
R435
10K_0402_5%
10K_0402_5%
1 2
CK_PWRGD
13
D
D
CLK_ENABLE#(31)
C C
CPU_BSEL0(5)
CPU_BSEL1(5)
B B
CPU_BSEL2(5)
A A
2
G
G
Q7 2N7002_SOT 23
Q7 2N7002_SOT 23
S
S
%20FKDQJHWRXVH6%-
R76
R76
2.2K_0402_5%
2.2K_0402_5%
FSA
R52
R52
FSB
FSC
1 2
R69
R69 0_0402_5%
0_0402_5%
1K_0402_1%
1K_0402_1%
1 2
1 2
R119
R119 0_0402_5%
0_0402_5%
R98
R98 10K_0402_5%
10K_0402_5%
1 2
R84
R84 0_0402_5%
0_0402_5%
12
12
@
@
+VCCP
12
R68
@R68
@
470_0402_5%
470_0402_5%
12
R73
R73
1K_0402_5%
1K_0402_5%
@
@
+VCCP
12
R113
R113
470_0402_5%
470_0402_5%
12
R110
R110
@
@
0_0402_5%
0_0402_5%
+VCCP
12
R92
@R92
@
470_0402_5%
470_0402_5%
12
R87
R87
0_0402_5%
0_0402_5%
C161 22P 50V J NPO 0402C161 22P 50V J NPO 0402
C164 22P 50V J NPO 0402C164 22P 50V J NPO 0402
Reserved
+3VM_CK505
R1348 0_0603_5%
R1348 0_0603_5%
+1.5VS
R1349 0_0603_5%R1349 0_0603_5%
%20FKDQJH
@
@
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK#
For PCI2_TME:0=Overclocking of CPU and SRC allowed (ICS only) 1=Overclocking of CPU and SRC NOT allowed
CLK_XTAL_IN
12
Y1
Y1
14.318MHZ_16PF_7A14300083
14.318MHZ_16PF_7A14300083
CLK_XTAL_OUT
1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS
Routing the trace at least 10mil
4
+3VS
+VCCP
Change co-lay net name to +1.5VM_CK505 07/03
1 2
@
@
1 2
1
47P_0402_50V8J
47P_0402_50V8J
C1147
C1147
10U_0603_6.3V6M
10U_0603_6.3V6M
2
CLK_SD_48M(20)
CLK_PCH_48M(12)
CLK_PCH_14M(13)
CLK_PCI_LPC(21)
CLK_PCI_PCH(11)
+3VS+3VS +3VS
R85
R85
10K_0402_5%
10K_0402_5%
@
@
1 2
ITP_EN PCI4_SEL PCI2_TME
R89
R89
10K_0402_5%
10K_0402_5%
1 2
L29 FBMA-L11-201209-221LMA30T_0805L29 FBMA-L11-201209-221LMA30T_0805
C1114
C1114
C1117
C1117
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
L30 FBMA-L11-201209-221LMA30T_0805L30 FBMA-L11-201209-221LMA30T_0805
C1102
C1102
C1110
C1110 10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
SA00003H730 (Realtek :RTM890N-397-VC-GRT)
+1.5VM_CK505
+1.05VM_CK505
+1.5VM_CK505
R95
R95
10K_0402_5%
10K_0402_5%
@
@
1 2
R90
R90
10K_0402_5%
10K_0402_5%
1 2
1
1
C1119
C1119
C140
C140
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
@
@
C386
C386
1 2
1 2
C390 10P_0402_50V8JC390 10P_0402_50V8J
1
C389
C389
2
15P 50V J NPO 0402
15P 50V J NPO 0402
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C160
C160
2
R1350 0_0402_5%
R1350 0_0402_5%
1 2
@
@
R1351 0_0402_5%R1351 0_0402_5%
1 2
%20FKDQJH
10P_0402_50V8J
10P_0402_50V8J
1 2
22_0402_5%
22_0402_5%
1 2
33_0402_5%
33_0402_5%
R104
R104
1 2
33_0402_5%
33_0402_5%
VGATE(5,13,31)
R86
R86
1 2
R80
R80
1 2
1
C388
C388
2
15P 50V J NPO 0402
15P 50V J NPO 0402
R71
R71
10K_0402_5%
10K_0402_5%
1 2
@
@
R77
R77
10K_0402_5%
10K_0402_5%
1 2
+3VM_CK505
12
12
C1146
C1146
47P_0402_50V8J
47P_0402_50V8J
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R74
R75
R75
CK_PWRGD
H_STP_CPU#(13)
H_STP_PCI#(13)
PCI2_TME
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
1
C1145
C1145
2
47P_0402_50V8J
47P_0402_50V8J
+1.05VM_CK505
1
2
+3VM_CK505
1
C169
C169
2
+1.05VM_CK505
1
C173
C173
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
@R74
@
FSA
FSB
FSC
1 2
R376 0_0402_5%R376 0_0402_5%
1 2
R371 0_0402_5%
R371 0_0402_5%
CLK_XTAL_IN
CLK_XTAL_OUT
PCI4_SEL
ITP_EN
1
C174
C174
10U_0603_6.3V6M
10U_0603_6.3V6M
2
1
C175
C175
10U_0603_6.3V6M
10U_0603_6.3V6M
2
@
@
3
1
C172
C172
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C139
C139
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
U4
U4
55
VDD_SRC
6
VDD_REF
12
VDD_PCI
72
VDD_CPU
19
VDD_48
27
VDD_PLL3
66
VDD_CPU_IO
31
VDD_PLL3_IO
62
VDD_SRC_IO
52
VDD_SRC_IO
23
VDD_IO
38
VDD_SRC_IO
20
USB_0/FS_A
2
FS_B/TEST_MODE
7
REF_0/FS_C/TEST_
8
REF_1
1
CKPWRGD/PD#
11
NC
53
CPU_STOP#
54
PCI_STOP#
5
XTAL_IN
4
XTAL_OUT
13
PCI_1
14
PCI_2
15
PCI_3
16
PCI_4/SEL_LCDCL
17
PCIF_5/ITP_EN
18
VSS_PCI
3
VSS_REF
22
VSS_48
26
VSS_IO
69
VSS_CPU
30
VSS_PLL3
34
VSS_SRC
59
VSS_SRC
42
VSS_SRC
73
VSS
SLG8SP556VTR_QFN72_10X10
SLG8SP556VTR_QFN72_10X10
1
C138
C138
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C167
C167
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C148
C148
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C137
C137
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CPU_0
CPU_0#
CPU_1
CPU_1#
SRC_0/DOT_96
SRC_0#/DOT_96#
LCDCLK/27M
LCDCLK#/27M_SS
SRC_2
SRC_2#
SRC_3
SRC_3#
SRC_4
SRC_4#
SRC_6
SRC_6#
SRC_7
SRC_7#
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
SRC_9
SRC_9#
SRC_10
SRC_10#
SRC_11
SRC_11#
CLKREQ_3#
CLKREQ_4#
CLKREQ_6#
CLKREQ_7#
CLKREQ_9#
SLKREQ_10#
CLKREQ_11#
USB_1/CLKREQ_A#
2
2.2K_0402_5%
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
PCH_SMBDATA(13)
1
C146
C146
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
9
SDA
10
SCL
71
70
68
67
24
25
28
29
32
33
35
36
39
40
57
56
61
60
64
63
44
45
50
51
48
47
37
41
58
65
43
49
46
21
CLK_SMBDATA
CLK_SMBCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
CLK_CPU_DREFCLK
CLK_CPU_DREFCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_PCH
CLK_PCIE_PCH#
CLK_CPU_EXP
CLK_CPU_EXP#
CLK_PCIE_LAN
CLK_PCIE_LAN#
WLAN_CLKREQ#
LAN_CLKREQ#
1
C165
C165
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
PCH_SMBCLK(13)
CLK_SMBDATA (7,17)
CLK_SMBCLK (7,17)
CLK_CPU_BCLK (5)
CLK_CPU_BCLK# (5)
CLK_CPU_HPLCLK (5)
CLK_CPU_HPLCLK# (5)
CPU_DREFCLK (5)
CPU_DREFCLK# (5)
CPU_SSCDREFCLK (5)
CPU_SSCDREFCLK# (5)
CLK_PCIE_WLAN (17)
CLK_PCIE_WLAN# (17)
CLK_PCIE_SATA (11)
CLK_PCIE_SATA# (11)
CLK_PCIE_PCH (12)
CLK_PCIE_PCH# (12)
CPU_ITP (4)
CPU_ITP# (4)
CLK_CPU_EXP (4)
CLK_CPU_EXP# (4)
CLK_PCIE_LAN (16)
CLK_PCIE_LAN# (16)
WLAN_CLKREQ# (17)
LAN_CLKREQ# (16)
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2.2K_0402_5%
Q10A
Q10A
6 1
+3VS
3
Q10B
Q10B
SRC PORT LIST
PORT
SRC1 SRC2 SRC3 SRC4 SRC6 SRC7 SRC8 SRC9 SRC10 SRC11
WLAN_CLKREQ#
LAN_CLKREQ#
Add LAN_CLKRQE# 0108.
REQ PORT LIST
REQ_3# REQ_4# REQ_6# REQ_7# REQ_9# REQ_10# REQ_11# REQ_A#
1
+3VS
R91
R72
R72
2
5
4
R91
2.2K_0402_5%
2.2K_0402_5%
CLK_SMBDATA
CLK_SMBCLK
DEVICE
CPU_SSCDREFCLK
PCIE_WLAN PCIE_SATA PCIE_PCH CPU_ITP CLK_CPU_EXP PCIE_LAN
R121 10K_0402_5%R121 10K_0402_5%
R107 10K_0402_5%R107 10K_0402_5%
DEVICEPORT
PCIE_WLAN
PCIE_LAN
+3VS
12
12
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/10/15 2008/10/15
2007/10/15 2008/10/15
2007/10/15 2008/10/15
Compal Secret Dat a
Compal Secret Dat a
Compal Secret Dat a
Deciphered Dat e
Deciphered Dat e
Deciphered Dat e
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Clock Generator CK505
Clock Generator CK505
Clock Generator CK505
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
1
833Tuesday, April 13, 2010
833Tuesday, April 13, 2010
833Tuesday, April 13, 2010
of
of
of
1.0
1.0
1.0
5
4
3
2
1
LCD POWER CIRCUIT
+CAM_VCC
R19
R19
+3VS
D D
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
GMCH_ENVDD(5)
C C
+LCDVDD
12
3
Q4B
Q4B
4
1 2
R175 0_0402_5%R175 0_0402_5%
100K_0402_5%
100K_0402_5%
R582
R582 300_0603_5%
300_0603_5%
5
12
R392
R392
+3VALW
12
R580
R580 100K_0402_5%
100K_0402_5%
61
Q4A
Q4A
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1 2
R581 4.7K_0402_5%R581 4.7K_0402_5%
1
C1277
C1277
0.047U_0402_16V7K
0.047U_0402_16V7K
2
CMOS & LCD/PANEL BD. Conn.
JLVDS1
JLVDS1
1 2
B B
A A
)RU(0,VUHTXHVWDGGLW
3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
31
28
32
29 30
ACES_88341-3000B001
ACES_88341-3000B001
CONN@
CONN@
USB20_P3_1 USB20_N3_1
DMIC_CLK DMIC_DATA
LVDS_ACLK LVDS_ACLK#
LVDS_A2 LVDS_A2#
LVDS_A1 LVDS_A1#
LVDS_A0 LVDS_A0#
LVDS_SDA LVDS_SCL BKOFF# LVDS_PWM
+LCDVDD_L
+LEDVDD
camera
+3VS
+CAM_VCC
LVDS_ACLK (5)
LVDS_ACLK# (5)
LVDS_A2 (5)
LVDS_A2# (5)
LVDS_A1 (5)
LVDS_A1# (5)
LVDS_A0 (5)
LVDS_A0# (5)
BKOFF# (21)
+3VS
G
G
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
W=40mils
1
C1111
C1111
680P_0402_50V7K
680P_0402_50V7K
2
+3VS
W=60mils
S
S
Q16
Q16 AO3413_SOT23-3
AO3413_SOT23-3
D
D
&KDQJHWRXVH6%
1 3
1
2
+LEDVDD
+LCDVDD
C1115
C1115
L1
L1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
C1112
C1112
68P_0402_50V8J
68P_0402_50V8J
2
1
C1116
C1116
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
W=60mils
1
C1118
C1118
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
LVDS_SCL
LVDS_SDA
1
C1164
C1164
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Place close to JLVDS1
12
B+
+3VS
R1180
R1180
2.2K_0402_5%
2.2K_0402_5%
1 2
LVDS_PWM
BKOFF#
C1156
C1156
220P_0402_50V7K
220P_0402_50V7K
+LCDVDD_L
R1181
R1181
2.2K_0402_5%
2.2K_0402_5%
1 2
12
1 2
R100 0_0805_5%R100 0_0805_5%
LVDS_SCL (5)
LVDS_SDA (5)
12
C1109
C1109
220P_0402_50V7K
220P_0402_50V7K
+LCDVDD
USB20_N3_1
USB20_P3_1
C1167
C1167
10P_0402_50V8J
10P_0402_50V8J
Add for RF 07/02
LVDS_PWM DPST_PWM
2
D43
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
D43
For ESD 12/22
1
316&$
@
@
3
1
C1168
C1168
2
1
2
@
@
10P_0402_50V8J
10P_0402_50V8J
R111
R111
1 2
R112
R112
1 2
8mil
22P 50V J NPO 0402
22P 50V J NPO 0402
USB20_P3_1
+CAM_VCC
0_0402_5%@
0_0402_5%@
0_0402_5%
0_0402_5%
C1181
C1181
1 2
0_0603_5%
0_0603_5%
R11820_0402_5% R11820_0402_5%
@ L3
@
2
2
3
3
WCM2012F2S-900T04_0805
WCM2012F2S-900T04_0805
R11830_0402_5% R11830_0402_5%
D6
D6
6
CH3
5
Vp
4
CH4
PJUSB208_SOT23-6 @
PJUSB208_SOT23-6 @
5HVHUYH'IRU(6' 6ZDS'
INVT_PW M
1
2
1
C1182
C1182
2
22P 50V J NPO 0402
22P 50V J NPO 0402
12
L3
1
1
4
4
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DMIC_CLK (18) DMIC_DATA (18)
C1113
C1113
USB20_N3
USB20_P3USB20_P 3
3
CH2
2
Vn
1
CH1
DPST_PWM (5)
INVT_PWM (21)
+CAM_VCC
1
2
USB20_N3 (12)
USB20_P3 (12)
USB20_N3_1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
LVDS /INVERTER
LVDS /INVERTER
LVDS /INVERTER
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
933Tuesday, April 13, 2010
933Tuesday, April 13, 2010
933Tuesday, April 13, 2010
1
1.0
1.0
1.0
of
of
of
A
B
C
D
E
Close to CRT CONN for ESD.
2
2
3
1 1
Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615
L15
L15
BK1608LL121-T_2P
BK1608LL121-T_2P
GMCH_CRT_R(5)
GMCH_CRT_G(5)
GMCH_CRT_B(5)
2 2
GMCH_CRT_HSYNC(5)
Place closed to chipset
GMCH_CRT_VSYNC(5)
R255
R255
150_0402_1%
150_0402_1%
12
12
R250
R250
R253
R253
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
1 2
C301 0.1U_0402_16V 4ZC301 0.1U_0402_16V 4Z
1 2
C298 0.1U_0402_16V 4ZC298 0.1U_0402_16V 4Z
12
+5VS
1 2
5
1
U11
U11
P
4
OE#
A2Y
G
SN74AHCT1G125DCKR_SC70-5
SN74AHCT1G125DCKR_SC70-5
3
+5VS
5
P
A2Y
G
3
R537 10K_0402_5%R537 10K_0402_5%
1
U10
U10
4
OE#
SN74AHCT1G125DCKR_SC70-5
SN74AHCT1G125DCKR_SC70-5
C310
C310
10P_0402_50V8J
10P_0402_50V8J
1
1
C303
C303
C308
C308
2
2
10P_0402_50V8J
10P_0402_50V8J
1 2
L14
L14
BK1608LL121-T_2P
BK1608LL121-T_2P
1 2
L12
L12
BK1608LL121-T_2P
BK1608LL121-T_2P
1 2
1
2
10P_0402_50V8J
10P_0402_50V8J
C307
C307
10P_0402_50V8J
10P_0402_50V8J
1
2
1
C306
C306 10P_0402_50V8J
10P_0402_50V8J
2
1
2
1
C304
C304
10P_0402_50V8J
10P_0402_50V8J
JVGA_HS
JVGA_VS
3
D18
D18
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
D17
D17
1
DGGLWIRU(0,
RED
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
GREEN
BLUE
Add R1283 R1284 Change R247 R249 to 10 ohm Add @ on U10 U11 C301 C298 06/08
3 3
GMCH_CRT_DATA(5)
GMCH_CRT_CLK(5)
R248
R248
2.2K_0402_5%
2.2K_0402_5%
+3VS
12
12
2.2K_0402_5%
2.2K_0402_5%
R245
R245
+3VS
R246
R246
2.2K_0402_5%
2.2K_0402_5%
5
3
4
2
Q24B
Q24B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
61
Q24A
Q24A 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
12
+CRTVDD
12
R251
R251
2.2K_0402_5%
2.2K_0402_5%
VGA_DDC_DAT
VGA_DDC_CLK
+5VS
CRT PORT
D3
D3
W=40mils
2 1
RB491D_SC59-3
RB491D_SC59-3
+RCRT_VCC
F1
F1
1.1A_6VDC_FUSE
1.1A_6VDC_FUSE
W=40mils
21
RED
VGA_DDC_DAT GREEN
JVGA_HS BLUE
JVGA_VS
VGA_DDC_CLK
+CRTVDD
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C142
C142
1 2
11
12
13
14
10 15
JCRT1
JCRT1
6
1 7
2 8
16
G
G
17
G
G
3 9
4
5
CONN@
CONN@
SUYIN_070546FR015M21TZR
SUYIN_070546FR015M21TZR
Update symbol 0107.
CRT_DET#
R1103
R1103 100K_0402_5%
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
100K_0402_5%
1 2
+CRTVDD
CRT_DET# (13)
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
CRT PORT
CRT PORT
CRT PORT
NAV51 LA-6311P
NAV51 LA-6311P
NAV51 LA-6311P
10 33Tuesday, April 13, 2010
10 33Tuesday, April 13, 2010
10 33Tuesday, April 13, 2010
E
of
of
of
0.2
0.2
0.2
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