Acer eMachine G725, eMachine 5332, eMachine 5732G, eMachine 5732ZG, eMachine 7715 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

NAWF2 M/B Schematics Document

Intel Penryn Processor with Cantiga + DDRIII + ICH9M+M92-S2 XT

3 3

2009-09-17

REV:1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

153Monday, September 28, 2009

E

A

of

A

B

C

D

E

Compal Confidential

Model Name : NAWF2 File Name : LA-4853P P/N : DA60000FI00

1 1

P/N : DA60000FI10

VRAM 512MB / 256MB 64M16 x 4 / 32M16 x 4

page 21

Fan Control

page 4

DDR2 500MHz

LCD Conn.

page 23

LVDS

PCI-Express 16xATI M92-S2 XT

page 17,18,19,20,21,22

CRT Conn.

page 24

2 2

MINI Card x1

WLAN

page 33

LAN ATHEROS AR8132

page 31

PCI-Express

port 0

HDD

RJ45

page 32

Conn.

Intel Penryn Processor

uPGA-478 Package

(Socket P)

H_A#(3..35) H_D#(0..63)

667/800/1066MHz

page 4,5,6

FSB

Intel Cantiga

uFCBGA-1329

page 7,8,9,10,11,12,13

DMI

C-Link

Intel ICH9-M

S-ATA

port 1

ODD Conn.

page 29page 29

BGA-676

page 25,26,27,28

Thermal Sensor

EMC 1402

page 4

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 800/1066

USB conn x2

USB port 0, 6

3.3V 48MHz

3.3V 24.576MHz/48Mhz

USB

Clock Generator

ICS9LPRS387

page 16

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

CMOS Camera

HD Audio

page 14,15

Card Reader Realtek RTS5159

page 36page 34 page 23

HDA Codec

ALC272

page 38

Phone Jack x2

page 39

Audio AMP

page 39

LPC BUS

3 3

RTC CKT.

page 26

Power On/Off CKT.

page 37

DC/DC Interface CKT.

page 40

LS-4851P

POWER/B Conn.

page 36

Touch Pad

ENE KB926 D3

page 36

BIOS

page 36

page 35

Int.KBD

page 36

Power Circuit DC/DC

4 4

page 41,42,43,44 45,46,47,48,49

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

of

253Monday, September 28, 2009

E

A

Voltage Rails

Power Plane Description

VIN

1 1

2 2

B+ +CPU_CORE +0.75VS 0.75V switched power rail for DDR terminator +1.05VS 1.05V switched power rail +1.1VS 1.1V switched power rail ON OFF OFF +1.5V 1.5V power rail for DDR ON ON OFF +1.5VS +1.8V +1.8VS 1.8V switched power rail ON OFF OFF +2.5VS +3VALW +3V +3V_LAN +3VS +5VALW +5VS +VSB VSB always on power rail ON ON* +RTCVCC RTC power +VGA_CORE Core voltage for GPU ON OFF OFF

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU

1.5V switched power rail

1.8V power rail for GMCH LVDS

2.5V switched power rail

3.3V always on power rail

3.3V power rail for SB

3.3V power rail for LAN

3.3V switched power rail 5V always on power rail 5V switched power rail

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

B

S1 S3 S5

N/A N/A N/A

ON OFF ON OFF OFF ON OFF OFF

ON OFF OFF ON OFF

ON ON ON ON ON ON ON ON

ON ON

N/AN/AN/A OFF

ON

OFF

ON ON*

OFF ON OFF

OFF

ON*

ON

OFFON

OFF

ONON

C

STATE

SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3#

SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

D

HIGHHIGHHIGH

HIGH

ON

OFF

ON ON

ON

OFF

ON

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

AD_BID

00 V

V typ

AD_BID

0 V 0 V

V

AD_BID

8.2K +/- 5% 0.216 V 0.250 V 0.289 V

0.436 V 0.503 V 0.538 V18K +/- 5%

0.712 V 0.819 V 0.875 V33K +/- 5%

max

BOARD ID Table BTO Option Table

Board ID

0 1 2

PCB Revision

0.1(PVT2)

1.0(Pre-MP)

BTO Item BOM Structure GM45

GM@

8132 8132@

E

LOW

OFF

3 4 5 6 7

PCIE table

EC SM Bus1 address

3 3

Device

Smart Battery EEPROM(24C16/02)

Address Address

1010 000X b

ICH9M SM Bus address

Device

Clock Generator (ICS9LPRS387, SLG8SP556V)

DDR DIMM0 DDR DIMM2

Address

1101 001Xb

1001 000Xb 1001 010Xb

EC SM Bus2 address

Device

EMC 1402-1 GMT G781-1

1001 100X b0001 011X b 1001 101X b

USB table

UHCI1

EHCI1

EHCI2

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

Port0 Port1 Port2 Port3 Port4 Port5 Port6 Port7 Port8 Port9 Port10 Port11

MB USB Conn.

CMOS Camera Card Reader

MB USB Conn.

Wireless Card

PCIE port1 PCIE port2 PCIE port3 PCIE port4 PCIE port5 PCIE port6

SATA table

SATA port0 SATA port1 SATA port2 SATA port3

Wireless Card PCIE LAN

HDD ODD

SATA port4

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

D

SATA port5

Title

Size Document Number Rev

Date: Sheet

B

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

of

353Monday, September 28, 2009

E

5

4

3

2

1

H_A#[3..35]<7>

H_REQ#[0..4]<7>

H_RS#[0..2]<7>

D D

C C

B B

BSEL2 BSEL1 BSEL0 BCLK

000266 010200

A A

H_A#[3..35] H_REQ#[0..4] H_RS#[0..2]

JCPU1A

AA4 AB2 AA3

D22

J4 L5 L4

K5

M3

N2

J1 N3 P5 P2

L2 P4 P1 R1

M1

K3 H2 K2

J3

L1 Y2

U5 R3

W6

U4 Y5 U1 R4 T5 T3

W2 W5

Y4 U2 V4

W3

V1 A6

A5 C4

D5 C6 B4 A3

M4

N5 T2 V3 B2 D2

D3 F6

16601

JCPU1A

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

Penryn

Penryn CONN@

CONN@

ADDR GROUP_0

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

ADDR GROUP_1

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDI TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA THERMDC

ICH

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

RESERVED

H_PROCHOT#

H1 E2 G5

H5 F21 E1

F1

H_IERR#

D20 B3

H4

H_RESET#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6 AB3

XDP_TMS

AB5

XDP_TRST#

AB6

XDP_DBRESET#

C20

H_PROCHOT#

D21

H_THERMDA

A24

H_THERMDC

B25 C7

A22 A21

Layout Note: H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil

+1.05VS

12

R12

R12 56_0402_5%

56_0402_5% @

@

B

2

E

3 1

C

Q2

Q2 MMBT3904_SOT23-3

MMBT3904_SOT23-3 @

@

4

H_ADS# <7> H_BNR# <7> H_BPRI# <7>

H_DEFER# <7> H_DRDY# <7> H_DBSY# <7>

H_BR0# <7>

H_INIT# <26> H_LOCK# <7> H_RESET# <7>

H_TRDY# <7> H_HIT# <7>

H_HITM# <7>

XDP_DBRESET# <27>

H_THERMTRIP# <8,26>

CLK_CPU_BCLK <16> CLK_CPU_BCLK# <16>

OCP# <27>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EN_DFAN1<35>

EN_DFAN1 VSET

2009/01/21 2010/01/21

3

1 2

R51 330_0402_5%R51 330_0402_5%

20080430 Add soft-start for +5VS drop issue

H_THERMDA

2200P_0402_50V7K

H_THERMDC

Compal Secret Data

+VCC_FAN1

1

C158

2

Deciphered Date

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15

H_ADSTB#0<7>

H_ADSTB#1<7>

H_A20M#<26>

H_FERR#<26>

H_IGNNE#<26>

H_STPCLK#<26>

H_INTR<26>

H_NMI<26>

H_SMI#<26>

H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

1

5

+5VS

1

C106

0.01U_0402_16V7K

2

XDP_TDI

XDP_TMS XDP_BPM#5

H_PROCHOT# H_IERR#

XDP_TRST#

XDP_TCK

+3VS

C114 10U_0805_10V4ZC114 10U_0805_10V4Z

1 2

U5

1

VEN

2

VIN

3

VO

4

VSET

G993P1UF_SOP8

FAN_SPEED1<35>

R43 54.9_0402_1%R43 54.9_0402_1%

1 2

R42 54.9_0402_1%R42 54.9_0402_1%

1 2

R16 54.9_0402_1%

1 2

@

R70 56_0402_5%R70 56_0402_5% R54 56_0402_5%R54 56_0402_5%

R41 54.9_0402_1%R41 54.9_0402_1% R17 54.9_0402_1%R17 54.9_0402_1%

1 2

C159

0.1U_0402_16V4Z

1 2

U9

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR_MSOP8

Address 1001 100X b

2

FAN1 Conn

8

GND

7

GND

6

GND

5

GND

+3VS

12

R55

R55 10K_0402_5%

10K_0402_5%

1

C115

C115 1000P_0402_50V7K

1000P_0402_50V7K

2

12 12

12

SMCLK

SMDATA

ALERT#

GND

+5VS

12

D6

D6 1SS355_SOD323-2

1SS355_SOD323-2

D7

1 2

BAS16_SOT23-3

BAS16_SOT23-3 C122

C122

10U_0805_10V4Z

1 2

C121

1000P_0402_50V7K

1 2

40mil

+VCC_FAN1

+1.05VS

JP12

1 2 3

ACES_85205-03001

ACES_85205-03001 CONN@

CONN@

left NC if no ITP 39Ohm

8 7 6 5

Title

Size Document Number Rev

B

Date: Sheet

1 2

R109

R109 10K_0402_5%

10K_0402_5%

401817

EC_SMB_CK2 <22,35> EC_SMB_DA2 <22,35>

+3VS

Compal Electronics, Inc.

SCHEMATIC,MB A4853

453Monday, September 28, 2009

1

of

A

5

4

3

2

1

H_D#[0..63]

JCPU1B

G22 G25

G24

H22

H23 H26

H25

N22

R23 M24 M23

R24

N25 M26

N24

AD26

C23 D25 C24

AF26

AF1

C21

E22 F24 E26

F23 E25

E23 K24

J24 J23

F26 K22

J26

K25 P26

L23 L22 P25

P23 P22 T24

L25 T25

L26

A26 B22

B23

C3

JCPU1B

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

Penryn

Penryn CONN@

CONN@

DATA GRP 0

MISC

DATA GRP 1

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#

DATA GRP 2DATA GRP 3

D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]#

DSTBN[2]#

DSTBP[2]#

DINV[2]#

D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]#

DSTBN[3]#

DSTBP[3]#

DINV[3]# COMP[0]

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

H_D#0

PAD

PAD PAD

PAD

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

GTL_REF0

@

@ @

@

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

D D

H_DSTBN#0<7> H_DSTBN#2 <7> H_DSTBP#0<7> H_DSTBP#2 <7>

H_DINV#0<7>

C C

Trace Close CPU < 0.5'

Width=4 mil , Spacing: 15mil (55Ohm)

B B

R386

R386 1K_0402_1%

1K_0402_1%

R387

R387 2K_0402_1%

2K_0402_1%

+1.05VS

1 2

H_DSTBN#1<7> H_DSTBN#3 <7> H_DSTBP#1<7> H_DSTBP#3 <7>

H_DINV#1<7>

R406 1K_0402_5%@R406 1K_0402_5%@ R405 1K_0402_5%@R405 1K_0402_5%@

C438 0.1U_0402_16V4Z@C438 0.1U_0402_16V4Z@

1 2

12 12

T2

T2 T26

T26 T27

T27

CPU_BSEL0<16> CPU_BSEL1<16> CPU_BSEL2<16>

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

H_PWRGOOD H_CPUSLP#

R393 27.4_0402_1%

R393 27.4_0402_1% R394 54.9_0402_1%

R394 54.9_0402_1% R15 27.4_0402_1%

R15 27.4_0402_1% R14 54.9_0402_1%

R14 54.9_0402_1%

H_DINV#2 <7>

H_DINV#3 <7>

1 2 1 2 1 2 1 2

H_DPRSTP# <8,26,47> H_DPSLP# <26> H_DPWR# <7> H_PWRGOOD <26> H_CPUSLP# <7> PSI# <47>

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms) COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

H_D#[0..63] <7>

+CPU_CORE

A10 A12 A13 A15 A17 A18 A20

B10 B12 B14 B15 B17 B18 B20

C10 C12 C13 C15 C17 C18

D10 D12 D14 D15 D17 D18

E10 E12 E13 E15 E17 E18 E20

F10 F12 F14 F15 F17 F18 F20 AA7

AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20

AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18

A7 A9

B7 B9

C9

D9

E7 E9

F7 F9

JCPU1C

VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]

Penryn

Penryn CONN@

CONN@

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

+CPU_CORE

VCCSENSE

VSSSENSE

C156

CPU_VID0 <47> CPU_VID1 <47> CPU_VID2 <47> CPU_VID3 <47> CPU_VID4 <47> CPU_VID5 <47> CPU_VID6 <47>

R376 100_0402_1%

R375 100_0402_1%

0.01U_0402_16V7K

1 2

C156

+1.05VS

1

2

20mils

1

C157

2

10U_0805_10V4Z

+CPU_CORE

VCCSENSE <47>

VSSSENSE <47>

+1.5VS

A A

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

401817

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

553Monday, September 28, 2009

of

1

of

A

5

4

3

2

1

+CPU_CORE +CPU_CORE

JCPU1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

D D

C C

B B

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

Penryn CONN@

CONN@

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

.

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

1

+

C98

C98 330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

2

+CPU_CORE

1

C465

2

10U_0805_6.3V6M

+CPU_CORE

1

C108

2

10U_0805_6.3V6M

+CPU_CORE

1

C112

2

10U_0805_6.3V6M

+CPU_CORE

1

C455

2

10U_0805_6.3V6M

+CPU-CORE Decoupling SPCAP,Polymer

MLCC 0805 X5R

+1.05VS

1

+

C13

330U_D2E_2.5VM_R9

2

2 x 330uF(6mOhm/2) 2 x 330uF(6mOhm/2)

1

+

C113

330U_D2E_2.5VM_R9

2

1

+

C107

330U_D2E_2.5VM_R9

2

South Side Secondary North Side Secondary

10U_0805_6.3V6M

1

C466

2

10U_0805_6.3V6M

1

C451

2

10U_0805_6.3V6M

1

C95

2

10U_0805_6.3V6M

1

2

C111

10U_0805_6.3V6M

1

C90

330U_D2E_2.5VM_R9

2

1

C94

2

(Place these capacitors on South side,Secondary Layer)

10U_0805_6.3V6M

1

C103

2

10U_0805_6.3V6M

1

2

C102

10U_0805_6.3V6M

1

C92

2

1

C91

2

10U_0805_6.3V6M

1

C457

2

(Place these capacitors on North side,Secondary Layer)

10U_0805_6.3V6M

1

C105

2

10U_0805_6.3V6M

1

2

C104

10U_0805_6.3V6M

1

C97

2

10U_0805_6.3V6M

1

2

C440

10U_0805_6.3V6M

1

C444

2

(Place these capacitors on South side,Primary Layer)

10U_0805_6.3V6M

1

C450

2

10U_0805_6.3V6M

1

C442

2

10U_0805_6.3V6M

1

C441

2

10U_0805_6.3V6M

1

2

C469

10U_0805_6.3V6M

1

C443

2

(Place these capacitors on North side,Primary Layer)

C,uF ESR, mohm ESL,nH 4X330uF 6m ohm/4 1.8nH/6

32X22uF 3m ohm/32 0.6nH/32 32X10uF 3m ohm/32 0.6nH/32

1

C119

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C120

2

1

C118

2

0.1U_0402_16V4Z

1

C78

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

2

C77

0.1U_0402_16V4Z

1

C79

2

+

1

2

10U_0805_6.3V6M@

1

2

10U_0805_6.3V6M@

1

2

10U_0805_6.3V6M@

1

2

10U_0805_6.3V6M@

C93

C456

C110

C468

1

C458

10U_0805_6.3V6M@

2

1

C96

10U_0805_6.3V6M@

2

1

C109

10U_0805_6.3V6M@

2

1

C467

10U_0805_6.3V6M@

2

A A

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

653Monday, September 28, 2009

of

1

of

5

4

3

2

1

U23A

H_D#[0..63]<5>

D D

+1.05VS

12

R126

R126 221_0402_1%

221_0402_1%

H_SWING

width=10mil

C C

1 2

12

B B

width:spacing=10mil:20mil (<0.5")

R125

R125 100_0402_1%

100_0402_1%

H_RCOMP

R395

24.9_0402_1%

+1.05VS

1

C206

0.1U_0402_16V4Z

2

width=10mil

R139

R139 1K_0402_1%

1K_0402_1%

1 2 12

R134

R134 2K_0402_1%

2K_0402_1%

1

C216

C216 @

@

0.1U_0402_16V4Z

2

H_RESET#<4>

H_CPUSLP#<5>

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_RESET# H_CPUSLP#

H_AVREF

U23A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GM@

GM@

H_ADSTB#_0 H_ADSTB#_1

H_BREQ#

H_DEFER#

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0

H_RS#_1

H_RS#_2

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_HIT#

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_A#[3..35] <4>

H_ADS# <4> H_ADSTB#0 <4> H_ADSTB#1 <4> H_BNR# <4> H_BPRI# <4> H_BR0# <4> H_DEFER# <4> H_DBSY# <4> CLK_MCH_BCLK <16> CLK_MCH_BCLK# <16> H_DPWR# <5> H_DRDY# <4> H_HIT# <4> H_HITM# <4> H_LOCK# <4> H_TRDY# <4>

H_DINV#0 <5> H_DINV#1 <5> H_DINV#2 <5> H_DINV#3 <5>

H_DSTBN#0 <5> H_DSTBN#1 <5> H_DSTBN#2 <5> H_DSTBN#3 <5>

H_DSTBP#0 <5> H_DSTBP#1 <5> H_DSTBP#2 <5> H_DSTBP#3 <5>

H_REQ#[0..4] <4>

H_RS#[0..2] <4>

within 100mil to Ball A9,B9

A A

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

753Monday, September 28, 2009

of

1

of

5

D D

All RSVD balls on GMCH should be left No Connect.

C C

MCH_CLKSEL0<16> MCH_CLKSEL1<16> MCH_CLKSEL2<16>

PM_EXTTS#0

VGATE<16,27,47>

+1.05VS

12

1 2

R177 10K_0402_5% R177 10K_0402_5%

1 2

R202 10K_0402_5% R202 10K_0402_5%

1 2

R189 10K_0402_5% R189 10K_0402_5%

H_DPRSTP#<5,26,47> PM_EXTTS#0<14> PM_EXTTS#1<15>

H_THERMTRIP#<4,26> PM_DPRSLPVR<27,47>

R398

54.9_0402_1%

54.9_0402_1% R397

R397

1 2

330_0402_5%

PM_SYNC#<27>

PLT_RST#<17,25,31,35>

5

PM_EXTTS#1 MCH_CLKREQ#

VGATE

ICH_PWROK

+3VS

2

B

E

1 2

R224 0_0402_5%@R224 0_0402_5%@

1 2

R223 0_0402_5% R223 0_0402_5%

R141 0_0402_5% R141 0_0402_5%

1 2

R135 0_0402_5% R135 0_0402_5%

1 2

R133 100_0402_5% R133 100_0402_5%

1 2

R143 0_0402_5% R143 0_0402_5%

1 2

R140 0_0402_5% R140 0_0402_5%

1 2

12

R403

R403 1K_0402_5%

1K_0402_5%

2

B

C

Q34

Q34 MMBT3904_SOT23-3

MMBT3904_SOT23-3

3 1

GMCH_PWROK

+3VS

12

R404

R404 1K_0402_5%

1K_0402_5%

C

Q33

Q33 MMBT3904_SOT23-3

MMBT3904_SOT23-3

E

3 1

+3VS

ICH_PWROK<27>

B B

A A

MCH_TSATN#

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

MCH_CFG_5 MCH_CFG_6 MCH_CFG_7

MCH_CFG_9 MCH_CFG_10

MCH_CFG_12 MCH_CFG_13

MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

PM_SYNC#_R PM_DPRSTP#_R PM_EXTTS#0 PM_EXTTS#1 GMCH_PWROK MCH_RSTIN# THERMTRIP#_R DPRSLPVR_R

MCH_TSATN_EC# <35>

4

U23B

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

AM35

RSVD13

T24

RSVD14

B31

RSVD15

B2

RSVD16

M1

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GM@

GM@

4

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMIGRAPHICS VIDMEMISC

3

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

BB36

SB_CKE_1

BA17

SA_CS#_0

AY16

SA_CS#_1

AV16

SB_CS#_0

AR13

SB_CS#_1

BD17

SA_ODT_0

AY17

SA_ODT_1

BF15

SB_ODT_O

AY13

SB_ODT_1

BG22

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

GFX_VR_EN

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

BH21 BF28

BH28 AV42

SM_VREF

AR36

SM_PWROK

BF17

SM_REXT

BC36

B38 A38 E41 F41

F43

PEG_CLK

E43

PEG_CLK#

AE41

DMI_RXN_0

AE37

DMI_RXN_1

AE47

DMI_RXN_2

AH39

DMI_RXN_3

AE40

DMI_RXP_0

AE38

DMI_RXP_1

AE48

DMI_RXP_2

AH40

DMI_RXP_3

AE35

DMI_TXN_0

AE43

DMI_TXN_1

AE46

DMI_TXN_2

AH42

DMI_TXN_3

AD35

DMI_TXP_0

AE44

DMI_TXP_1

AF46

DMI_TXP_2

AH43

DMI_TXP_3

B33

GFX_VID_0

B32

GFX_VID_1

G33

GFX_VID_2

F33

GFX_VID_3

E33

GFX_VID_4

C34

AH37

CL_CLK

AH36

CL_DATA

AN36

CL_PWROK

AJ35

CL_RST#

AH34

CL_VREF

N28 M28 G36 E36 K36

CLKREQ#

H36

ICH_SYNC#

B12

TSATN#

B28

HDA_BCLK

B30

HDA_RST#

B29

HDA_SDI

C29

HDA_SDO

A28

HDA_SYNC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR3

SMRCOMP SMRCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_PWROK SM_REXT SM_DRAMRST#

CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC#

CLK_MCH_3GPLL CLK_MCH_3GPLL#

DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3

DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3

DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3

DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3

ICH_PWROK CL_VREF

MCH_CLKREQ#

MCH_TSATN#

3

DDRA_CLK0 <14> DDRA_CLK1 <14> DDRB_CLK0 <15> DDRB_CLK1 <15>

DDRA_CLK0# <14> DDRA_CLK1# <14> DDRB_CLK0# <15> DDRB_CLK1# <15>

DDRA_CKE0 <14> DDRA_CKE1 <14> DDRB_CKE0 <15> DDRB_CKE1 <15>

DDRA_SCS0# <14> DDRA_SCS1# <14> DDRB_SCS0# <15> DDRB_SCS1# <15>

DDRA_ODT0 <14> DDRA_ODT1 <14> DDRB_ODT0 <15> DDRB_ODT1 <15>

R368 80.6_0402_1% R368 80.6_0402_1%

1 2

R367 80.6_0402_1% R367 80.6_0402_1%

1 2

SM_VREF

SM_PWROK <37>

R366 499_0402_1%

1 2

SM_DRAMRST# <14,15>

CLK_DREF_96M <16> CLK_DREF_96M# <16> CLK_DREF_SSC <16> CLK_DREF_SSC# <16>

CLK_MCH_3GPLL <16> CLK_MCH_3GPLL# <16>

DMI_ITX_MRX_N0 <27> DMI_ITX_MRX_N1 <27> DMI_ITX_MRX_N2 <27> DMI_ITX_MRX_N3 <27>

DMI_ITX_MRX_P0 <27> DMI_ITX_MRX_P1 <27> DMI_ITX_MRX_P2 <27> DMI_ITX_MRX_P3 <27>

DMI_MTX_IRX_N0 <27> DMI_MTX_IRX_N1 <27> DMI_MTX_IRX_N2 <27> DMI_MTX_IRX_N3 <27>

DMI_MTX_IRX_P0 <27> DMI_MTX_IRX_P1 <27> DMI_MTX_IRX_P2 <27> DMI_MTX_IRX_P3 <27>

CL_CLK0 <27> CL_DATA0 <27>

CL_RST#0 <27>

MCH_CLKREQ# <16> MCH_ICH_SYNC# <27>

Compal Secret Data

2009/07/01 2010/07/01

Compal Secret Data

SM_DRAMRST# would be needed for DDR3 only

For Cantiga

+1.5V +1.5V

20mil

C278

0.1U_0402_16V4Z

C264

0.1U_0402_16V4Z

Deciphered Date

80 Ohm

1 2

1

2

1 2

+1.05VS

R183

1K_0402_1%

1 2

R182

1

2

R182

511_0402_1%

1 2

2

+1.5V

R363

R363 1K_0402_1%

1K_0402_1%

R369

3.01K_0402_1%

R362

R362 1K_0402_1%

1K_0402_1%

R220

1K_0402_1%

1 2 R221 0_0402_5%

0_0402_5%

R222

1K_0402_1%

@R221

@

+DIMM_VREF

Strap Pin Table

CFG[2:0]

CFG5 CFG6 CFG9 CFG10

CFG[13:12]

CFG16 CFG19

CFG20

(PCIE/SDVO select)

SDVO_CTRLDATA L_DDC_DATA DDPC_CTRLDATA

2

1

12

SM_RCOMP_VOH

CLK_DREF_96M CLK_DREF_96M#

CLK_DREF_SSC CLK_DREF_SSC#

1

C423

0.01U_0402_16V7K

2

SM_RCOMP_VOL

1

C422

0.01U_0402_16V7K

2

R564 0_0402_5%R564 0_0402_5%

1 2

R565 0_0402_5%R565 0_0402_5%

1 2

R566 0_0402_5%R566 0_0402_5%

1 2

R567 0_0402_5%R567 0_0402_5%

1 2

12

1

C419

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

1

C418

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

as close as possible to the related balls

011 = FSB667 010 = FSB800 000 = FSB1067

0 = DMI x 2 1 = DMI x 4

0 = iTPM Host Interface is enabled

1 = iTPM Host Interface is Disabled 0 = Lane Reversal Enable

1 = Normal Operation (Default)

0 = PCIe Loopback Enable 1 = Disable

00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled

0 = Normal Operation 1 = DMI Lane Reversal Enable

0 = Only PCIE or SDVO is operational. 1 = PCIE/SDVO are operating simu.

0 = No SDVO Card Present 1 = SDVO Card Present

0 = LFP Disable 1 = LFP Card Present; PCIE disable

0 = Digital DisplayPort Disable 1 = Digital DisplayPort Device Present

MCH_CFG_5 MCH_CFG_6 MCH_CFG_7 MCH_CFG_9 MCH_CFG_10 MCH_CFG_12 MCH_CFG_13 MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

Title

Size Document Number Rev

Custom

401817

Date: Sheet

*

(Default)

*

(Default)

*

(Default)

*

* *

*

(Default)

R175 2.21K_0402_1%@R175 2.21K_0402_1%@ R142 4.02K_0402_1%@R142 4.02K_0402_1%@ R162 2.21K_0402_1%@R162 2.21K_0402_1%@ R158 2.21K_0402_1%@R158 2.21K_0402_1%@ R161 2.21K_0402_1%@R161 2.21K_0402_1%@ R154 2.21K_0402_1%@R154 2.21K_0402_1%@ R153 2.21K_0402_1%@R153 2.21K_0402_1%@ R155 2.21K_0402_1%@R155 2.21K_0402_1%@

R159 4.02K_0402_1%@R159 4.02K_0402_1%@ R163 4.02K_0402_1%@R163 4.02K_0402_1%@

Compal Electronics, Inc.

SCHEMATIC,MB A4853

12 12 12 12 12 12 12 12

12 12

1

(Default)

* * *

For HM51

(Default)

*

(Default) (Default) (Default)

+3VS

of

853Monday, September 28, 2009

A

5

4

3

2

1

DDR_A_D[0..63]<14>

D D

C C

B B

DDR_A_DM[0..7]<14>

DDR_A_MA[0..14]<14>

DDR_A_DQS#[0..7]<14> DDR_B_DQS#[0..7]<15>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AJ38

AJ41 AN38 AM38

AJ36

AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36

AW36

BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12

BB9 BA9

AU10

AV9

BA11

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6

AT5 AN10 AM11

AM5

AN12 AM13

AJ11 AJ12

AJ9 AJ8

DDR_A_D[0..63] DDR_A_DM[0..7] DDR_A_MA[0..14] DDR_A_DQS#[0..7] DDR_B_DQS#[0..7]

U23D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

SA_RAS# SA_CAS#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

DDR SYSTEM MEMORY A

SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

CANTIGA ES_FCBGA1329GM@

SA_BS_0 SA_BS_1 SA_BS_2

SA_WE#

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9

DDR_B_D[0..63]<15>

DDR_B_MA[0..14]<15>

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7

AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDR_B_DM[0..7]<15>

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

DDR_B_DQ[0..63] DDR_B_DM[0..7] DDR_B_MA[0..14]

DDR_A_BS0 <14> DDR_A_BS1 <14> DDR_A_BS2 <14>

DDR_A_RAS# <14> DDR_A_CAS# <14> DDR_A_WE# <14>

DDR_A_DQS0 <14> DDR_A_DQS1 <14> DDR_A_DQS2 <14> DDR_A_DQS3 <14> DDR_A_DQS4 <14> DDR_A_DQS5 <14> DDR_A_DQS6 <14> DDR_A_DQS7 <14>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AK47 AH46 AP47 AP46 AJ46 AJ48

AM48

AP48 AU47 AU46

BA48

AY48

AT47 AR47

BA47 BC47 BC46 BC44 BG43

BF43

BE45 BC41

BF40

BF41 BG38

BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8

BH12

BF11

BF8 BG7 BC5 BC6

AY3

AY1

BF6

BF5 BA1 BD3 AV2 AU3 AR3 AN2

AY2 AV1 AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

U23E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

DDR_B_DM0

AM47

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

CANTIGA ES_FCBGA1329GM@

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

DDR_B_BS0 <15> DDR_B_BS1 <15> DDR_B_BS2 <15>

DDR_B_RAS# <15> DDR_B_CAS# <15> DDR_B_WE# <15>

DDR_B_DQS0 <15> DDR_B_DQS1 <15> DDR_B_DQS2 <15> DDR_B_DQS3 <15> DDR_B_DQS4 <15> DDR_B_DQS5 <15> DDR_B_DQS6 <15> DDR_B_DQS7 <15>

A A

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

953Monday, September 28, 2009

of

1

of

5

D D

C C

R157

R156

0_0402_5%

1 2

Change to 0Ohm for DIS

R173

12

0_0402_5%

R172

12

0_0402_5%

R171

12

0_0402_5%

B B

0_0402_5%

R160

0_0402_5%

1 2

4

LBKLT_EN

GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA

TV_DCONSEL_0 TV_DCONSEL_1

CRT_IREF

R174

0_0402_5%

1 2

G32 M32 M33 K33

M29 C44

B43 E37 E38

C41 C40 B37 A37

H47 E46 G40 A40

H48 D45

B40 A41

H38 G37

B42 G38

K37

H25 K25

H24

C31 E32

E28 G28

G29 H32

E29

U23C

L32

J33

F40

J37

F37

F25

J28

J32 J29

L29

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN

LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL

LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TV_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE CRT_GREEN CRT_RED CRT_IRTN CRT_DDC_CLK

CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF

CRT_VSYNC

3

PEG_COMP

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

LVDS TV VGA

PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PCI-EXPRESS GRAPHICS

PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

CANTIGA ES_FCBGA1329GM@

T37 T36

PCIE_GTX_C_MRX_N0

H44

PCIE_GTX_C_MRX_N1

J46

PCIE_GTX_C_MRX_N2

L44

PCIE_GTX_C_MRX_N3

L40

PCIE_GTX_C_MRX_N4

N41

PCIE_GTX_C_MRX_N5

P48

PCIE_GTX_C_MRX_N6

N44

PCIE_GTX_C_MRX_N7

T43

PCIE_GTX_C_MRX_N8

U43

PCIE_GTX_C_MRX_N9

Y43

PCIE_GTX_C_MRX_N10

Y48

PCIE_GTX_C_MRX_N11

Y36

PCIE_GTX_C_MRX_N12

AA43

PCIE_GTX_C_MRX_N13

AD37

PCIE_GTX_C_MRX_N14

AC47

PCIE_GTX_C_MRX_N15

AD39

PCIE_GTX_C_MRX_P0

H43

PCIE_GTX_C_MRX_P1

J44

PCIE_GTX_C_MRX_P2

L43

PCIE_GTX_C_MRX_P3

L41

PCIE_GTX_C_MRX_P4

N40

PCIE_GTX_C_MRX_P5

P47

PCIE_GTX_C_MRX_P6

N43

PCIE_GTX_C_MRX_P7

T42

PCIE_GTX_C_MRX_P8

U42

PCIE_GTX_C_MRX_P9

Y42

PCIE_GTX_C_MRX_P10

W47

PCIE_GTX_C_MRX_P11

Y37

PCIE_GTX_C_MRX_P12

AA42

PCIE_GTX_C_MRX_P13

AD36

PCIE_GTX_C_MRX_P14

AC48

PCIE_GTX_C_MRX_P15

AD40

PCIE_MTX_GRX_N0

J41

PCIE_MTX_GRX_N1

M46

PCIE_MTX_GRX_N2

M47

PCIE_MTX_GRX_N3

M40

PCIE_MTX_GRX_N4

M42

PCIE_MTX_GRX_N5

R48

PCIE_MTX_GRX_N6

N38

PCIE_MTX_GRX_N7

T40

PCIE_MTX_GRX_N8

U37

PCIE_MTX_GRX_N9

U40

PCIE_MTX_GRX_N10

Y40

PCIE_MTX_GRX_N11

AA46

PCIE_MTX_GRX_N12

AA37

PCIE_MTX_GRX_N13

AA40

PCIE_MTX_GRX_N14

AD43

PCIE_MTX_GRX_N15

AC46

PCIE_MTX_GRX_P0

J42

PCIE_MTX_GRX_P1

L46

PCIE_MTX_GRX_P2

M48

PCIE_MTX_GRX_P3

M39

PCIE_MTX_GRX_P4

M43

PCIE_MTX_GRX_P5

R47

PCIE_MTX_GRX_P6

N37

PCIE_MTX_GRX_P7

T39

PCIE_MTX_GRX_P8

U36

PCIE_MTX_GRX_P9

U39

PCIE_MTX_GRX_P10

Y39

PCIE_MTX_GRX_P11

Y46

PCIE_MTX_GRX_P12

AA36

PCIE_MTX_GRX_P13

AA39

PCIE_MTX_GRX_P14

AD42

PCIE_MTX_GRX_P15

AD46

10mils

2

1 2

R184 49.9_0402_1% R184 49.9_0402_1%

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

C810 0.1U_0402_16V7KC810 0.1U_0402_16V7K

1 2

C812 0.1U_0402_16V7KC812 0.1U_0402_16V7K

1 2

C814 0.1U_0402_16V7KC814 0.1U_0402_16V7K

1 2

C816 0.1U_0402_16V7KC816 0.1U_0402_16V7K

1 2

C818 0.1U_0402_16V7KC818 0.1U_0402_16V7K

1 2

C820 0.1U_0402_16V7KC820 0.1U_0402_16V7K

1 2

C822 0.1U_0402_16V7KC822 0.1U_0402_16V7K

1 2

C824 0.1U_0402_16V7KC824 0.1U_0402_16V7K

1 2

C826 0.1U_0402_16V7KC826 0.1U_0402_16V7K

1 2

C828 0.1U_0402_16V7KC828 0.1U_0402_16V7K

1 2

C830 0.1U_0402_16V7KC830 0.1U_0402_16V7K

1 2

C832 0.1U_0402_16V7KC832 0.1U_0402_16V7K

1 2

C834 0.1U_0402_16V7KC834 0.1U_0402_16V7K

1 2

C836 0.1U_0402_16V7KC836 0.1U_0402_16V7K

1 2

C838 0.1U_0402_16V7KC838 0.1U_0402_16V7K

1 2

C840 0.1U_0402_16V7KC840 0.1U_0402_16V7K

1 2

+1.05VS

PCIE_MTX_C_GRX_N[0..15] <17> PCIE_MTX_C_GRX_P[0..15] <17>

C809 0.1U_0402_16V7KC809 0.1U_0402_16V7K

1 2

C811 0.1U_0402_16V7KC811 0.1U_0402_16V7K

1 2

C813 0.1U_0402_16V7KC813 0.1U_0402_16V7K

1 2

C815 0.1U_0402_16V7KC815 0.1U_0402_16V7K

1 2

C817 0.1U_0402_16V7KC817 0.1U_0402_16V7K

1 2

C819 0.1U_0402_16V7KC819 0.1U_0402_16V7K

1 2

C821 0.1U_0402_16V7KC821 0.1U_0402_16V7K

1 2

C823 0.1U_0402_16V7KC823 0.1U_0402_16V7K

1 2

C825 0.1U_0402_16V7KC825 0.1U_0402_16V7K

1 2

C827 0.1U_0402_16V7KC827 0.1U_0402_16V7K

1 2

C829 0.1U_0402_16V7KC829 0.1U_0402_16V7K

1 2

C831 0.1U_0402_16V7KC831 0.1U_0402_16V7K

1 2

C833 0.1U_0402_16V7KC833 0.1U_0402_16V7K

1 2

C835 0.1U_0402_16V7KC835 0.1U_0402_16V7K

1 2

C837 0.1U_0402_16V7KC837 0.1U_0402_16V7K

1 2

C839 0.1U_0402_16V7KC839 0.1U_0402_16V7K

1 2

1

PCIE_GTX_C_MRX_N[0..15] <17> PCIE_GTX_C_MRX_P[0..15] <17>

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15

Change to 0Ohm for DIS

A A

R186 0_0402_5%

1 2

@

R176 0_0402_5%

1 2

@

R179 100K_0402_5%

1 2

5

TV_DCONSEL_0 TV_DCONSEL_1 LBKLT_EN

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

1

A

10 53Monday, September 28, 2009

of

5

U23F

DDR3

D D

+1.5V

Reference PILLAR_ROCK CRB Rev1.0

Pins BA36, BB24, BD16, BB21, AW16, AW13, AT13 could be left NC for DDR2 board.

C C

B B

T17

T17 T18

T18

A A

PAD

PAD PAD

PAD

VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16

VCC_SM_AW16 VCC_SM_AT13

@

@ @

@

+VGFX_CORE

VCC_AXG_SENSE VSS_AXG_SENSE

5

U23F

2600mA

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

VCC_SM_7

BB32

VCC_SM_8

BA32

VCC_SM_9

AY32

VCC_SM_10

AW32

VCC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA ES_FCBGA1329

GM@

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43

VCC GFX NCTF

VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

4

+VGFX_CORE

4

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

C213

0.1U_0402_16V7K

1

2

DDR3

Reference PILLAR_ROCK CRB Rev1.0

VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16 VCC_SM_AW16 VCC_SM_AT13

1

C205

C230

C215

2

0.1U_0402_16V7K

C230

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K 2

0.22U_0402_6.3V6K

3

2

Place close to the GMCH

VCC: 1930.4mA (GMCH), 1210.34mA (MCH)

+1.05VS

1

+

C485

@+C485

@

220U_D2_4VM_R15

2

(270UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)

1

C255

C265

C266

0.1U_0402_16V4Z

0.22U_0402_6.3V6K

2

10U_0805_10V4Z

0.1U_0402_16V4Z

0.22U_0402_6.3V6K

1

C256

2

+1.05VS

Cavity Capacitors

+VGFX_CORE

R568

R568 0_0402_5%

0_0402_5%

+1.5V

C269

330U_D2E_2.5VM_R9

VCC_AXG: 6326.84mA (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)

C244

C243

0.47U_0603_16V4Z

0.47U_0603_16V4Z @

@

1

+

C482

@

C482

@

330U_D2E_2.5VM_R9

2

1U_0402_6.3V4Z

@

C234

1

10U_0805_10V4Z

2

@

Cavity Capacitors

Place close to the GMCH

VCC_SM: 2600mA (330UF*1, 22UF*2, 0.1UF*1)

1

+

2

C252

2

10U_0805_10V4Z

C251

2

1

C263

2

0.1U_0402_16V4Z

C235

1

0.1U_0402_16V4Z

2

@

10U_0805_10V4Z

C236

C242

1

@

2

0.1U_0402_16V4Z

For HM51

1

@

2

Place on the edge

1

C229

C228

@

2

0.1U_0402_16V7K

1

C270

2

1U_0402_6.3V4Z

3

C228 @

@

0.1U_0402_16V7K

1

2

C214

C214 @

@

0.1U_0402_16V7K

0.1U_0402_16V7K 2

1

C272

0.47U_0603_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

1

C271

C271 @

@

0.1U_0402_16V7K

0.1U_0402_16V7K 2

Compal Secret Data

Deciphered Date

1

C240

C240 @

@

2

0.1U_0402_16V7K

1

C279

C279 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

2009/07/01 2010/07/01

2

U23G

AG34

VCC_1

AC34

VCC_2

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28

VCC_21

AC28

VCC_22

AA28

VCC_23

AJ26

VCC_24

AG26

VCC_25

AE26

VCC_26

AC26

VCC_27

AH25

VCC_28

AG25

VCC_29

AF25

VCC_30

AG24

VCC_31

AJ23

VCC_32

AH23

VCC_33

AF23

VCC_34

T32

VCC_35

CANTIGA ES_FCBGA1329

GM@

1

VCC CORE

POWER

+1.05VS

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28

VCC NCTF

VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

1

of

11 53Monday, September 28, 2009

A

5

4

3

2

1

L18

+1.05VS

VCCA_HPLL: 24mA

Please check Power source if want support IAMT

D D

(4.7UF*1, 0.1UF*1)

VCCA_MPLL: 139.2mA (22UF*1, 0.1UF*1)

1 2

MBK1608121YZF_0603

120Ohm@100MHz

L6

1 2

MBK1608121YZF_0603

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

1 2

+3VS

L21

L21 MBK1608221YZF_0603

MBK1608221YZF_0603

@

1

+

C483

@+C483

@

220U_D2_4VM_R15

2

For HM51

C C

VCCA_DAC_BG: 2.6833333mA (0.1UF*1, 0.01UF*1)

1 2

+3VS

L20

L20 MBK1608221YZF_0603

MBK1608221YZF_0603

@

For HM51

VCCA_TV_DAC: 40mA (0.1UF*1,

B B

0.01UF*1 for each DAC)

L19

+3VS

MBK1608221YZF_0603

180Ohm@100MHz

+1.05VS_HPLL

C433

4.7U_0805_10V4Z

+1.05VS_MPLL

R108

0.5_0603_1%

C151

C151 22U_0805_6.3V6M

22U_0805_6.3V6M

1

C475

C475 @

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

0.01U_0402_16V7K

Close to Ball A26, B27

1

C461

C473

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

0.01U_0402_16V7K

Close to Ball A25

1 2

@

C472

C472 @

@

0.1U_0402_16V4Z

1

C434

2

0.1U_0402_16V4Z

12

C189

0.1U_0402_16V4Z

1

2

+3VS_CRTDAC

1

C462

C462 @

@

2

Please check Power source if want support IAMT

1

C474

C474 @

@

10U_0805_6.3V6M

2

1

C460

C460 @

@

2

0.01U_0402_16V7K

1

2

Please check Power source if want support IAMT

1

2

12

R571

R571 0_0402_5%

0_0402_5%

+1.05VS

+3VS_DACBG

12

1

R573

R573 0_0402_5%

0_0402_5%

2

+3VS_TVDAC

12

1

R574

R574 0_0402_5%

0_0402_5%

2

FOR EMI 20080226

+1.05VS

FOR EMI 20080226

For HM51

R262

R262 0_0402_5%@

0_0402_5%@

1 2

+3VS

R261

R261 0_0402_5%

0_0402_5%

1 2

+1.5VS

Please check Power source if want support IAMT

+1.05VS

C304

10U_0805_6.3V6M

1

+

C478

C478 @

@ 220U_D2_4VM_R15

220U_D2_4VM_R15

2

+1.05VS

L22

1 2

MBK1608121YZF_0603

@

VCCA_DPLLA VCCA_DPLLB: 64.8mA (220UF*1, 0.1UF*1)

L12

1 2

MBK1608121YZF_0603

@

12

1 2 R152

R152 0_0805_5%

0_0805_5%

Please check Power source if want support IAMT

For HM51

VCCD_TVDAC: 58.696mA (0.1UF*1, 0.01UF*1)

1 2

+1.5VS

L7

MBK1608221YZF_0603

A A

+1.5VS

1 2

R144

R144 100_0603_1%

100_0603_1%

180Ohm@100MHz

5

1

C246

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

0.022U_0402_16V7K

VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)

1

C247

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

0.01U_0402_16V7K

C245

C257

1

2

1

2

+1.5VS_TVDAC

Also power for internal Thermal Sensor

+1.5VS_QDAC

12

R165

R165 0_0402_5%

0_0402_5% @

@

Please check Power source if want support IAMT

4

+1.05VS_DPLLA

@

C479

C479 220U_D2_4VM_R15

220U_D2_4VM_R15

+1.05VS_DPLLB

@

C305

C305 10U_0805_10V4Z

10U_0805_10V4Z

+1.8V_TX_LVDS

+VCCA_PEG_BG

1

C289

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

No CIS Symbol

L10

1 2

MBK1608221YZF_0603

1 2

R201

R201 1_0402_1%

1_0402_1%

+1.05VS_A_SM

+1.05VS_A_SM_CK

1 2

R170

R170 0_0603_5%

0_0603_5%

2.2U_0603_6.3V6K

NO_STUFF

+1.05VS_HPLL

+1.8V

For HM51

1

C464

+

@

2

0.1U_0402_16V4Z

1

C290

C290 @

@

2

0.1U_0402_16V4Z

C291

C291 @

@ 1000P_0402_50V7K

1000P_0402_50V7K

VCCA_SM: (22UF*2, 4.7UF*1, 1UF*1)

C233

22U_0805_6.3V6M

1

C241

C241 @

@

2

0_0402_5%

12

1

R569

2

0_0402_5%

12

1

R570

2

0_0402_5%

1

VCCA_LVDS: 13.2mA (1000PF*1)

2

VCCA_PEG_BG: 0.414mA (0.1UF*1)

+1.05VS_PEGPLL

1

2

C254

22U_0805_6.3V6M

VCCA_PEG_PLL: 50mA

1

C288

(0.1UF*1)

0.1U_0402_16V4Z

2

1

C231

4.7U_0805_10V4Z

4.7U_0805_10V4Z 2

VCCA_SM_CK: 24mA (22UF*1, 2.2UF*1, 0.1UF*1)

1

C253

0.1U_0402_16V4Z

2

+3VS_TVDAC

VCCD_HDA: 50mA (0.1UF*1)

12

R402

VCCD_HPLL: 157.2mA (0.1UF*1)

+1.05VS_PEGPLL

VCCD_PEG_PLL: 50mA (0.1UF*1)

1 2

R192

R192 0_0603_5%

0_0603_5%

@

C274

C274 @

@

10U_0805_6.3V6M

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS_CRTDAC

+3VS_DACBG

+1.05VS_DPLLA +1.05VS_DPLLB

+1.05VS_HPLL +1.05VS_MPLL

1

C232

2

1U_0402_6.3V4Z

1

2

+1.5VS_HDA

+1.5VS_TVDAC

+1.5VS_QDAC

+1.8V_LVDS

1

@ C273

@

2

1U_0402_6.3V4Z

VCCD_LVDS: 60.311111mA (1UF*1)

Issued Date

AD48

AA48

AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25

AL25

AM24

AL24

AM23

AL23

AA47

1

C273

2

3

U23H

852mA

73mA

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

2.69mA

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

64.8mA

F47

VCCA_DPLLA

L48

VCCA_DPLLB

24mA

AD1

VCCA_HPLL

139.2mA

AE1

VCCA_MPLL

13.2mA

J48

VCCA_LVDS

J47

VSSA_LVDS

0.414mA

VCCA_PEG_BG

50mA

VCCA_PEG_PLL

480mA

VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9

24mA

VCCA_SM_CK_1 VCCA_SM_CK_2 VCCA_SM_CK_3 VCCA_SM_CK_4 VCCA_SM_CK_5 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8

87.79mA

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

50mA

A32

VCC_HDA

58.696mA

M25

VCCD_TVDAC

48.363mA

L28

VCCD_QDAC

157.2mA

AF1

VCCD_HPLL

50mA

VCCD_PEG_PLL

60.31mA

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA ES_FCBGA1329

GM@

12

R575

R575 0_0402_5%

0_0402_5%

2009/07/01 2010/07/01

CRTPLLA LVDSA PEG

VTT

POWER

A SM

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

A CK

HV

TV

HDA

DMI PEG

VTTLF

LVDS D TV/CRT

Compal Secret Data

Deciphered Date

118.8mA

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

105.3mA

VCC_HV_1 VCC_HV_2 VCC_HV_3

1782mA

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

456mA

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

VTTLF1 VTTLF2 VTTLF3

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

VCC_HV: 105.3mA

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

VCC_DMI: 456mA (0.1UF*1)

VTTLF_CAP1

A8

VTTLF_CAP2

L1

VTTLF_CAP3

AB2

VTT: 852mA

+1.05VS

(270UF*1, 4.7UF*2, 2.2UF*1, 0.47UF*1)

1

+

C481

C481 220U_D2_4VM_R15

220U_D2_4VM_R15

2

4.7U_0805_10V4Z

+1.05VS_AXF

1

C471

C471 @

@

10U_0805_6.3V6M

2

+1.5V_SM_CK

+1.8V_TX_LVDS: 118.8mA (22UF*1, 1000PF*1)

12

R572

0_0402_5%

+3VS

1

C267

0.1U_0402_16V4Z

2

+1.05VS_PEG: 1782mA (220UF*1, 22UF*1, 4.7UF*1)

+1.05VS_DMI

1

C190

C445

0.47U_0603_16V4Z

0.47U_0603_16V4Z 2

0.47U_0603_16V4Z

2

1

C470

0.47U_0603_16V4Z

2

D15

2 1

+1.05VS +3VS

CH751H-40PT_SOD323-2

1

C154

C155

4.7U_0805_10V4Z

2

2.2U_0603_6.3V6K

VCC_AXF: 321.35mA (10UF*1, 1UF*1)

C459

1U_0402_6.3V4Z

1

2

10U_0805_10V4Z

1 2

R399

R399 0_0603_5%

0_0603_5%

1

2

VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1)

C424

0.1U_0402_16V4Z

+1.8V_TX_LVDS

1

C293

C292

@

1000P_0402_50V7K

1

2

1

C287

0.1U_0402_16V4Z

2

Date: Sheet

2

10U_0805_10V4Z

+1.05VS_PEG

1

+

C312

C311

220U_D2_4VM_R15

2

1 2

R225

R225 0_0805_5%

0_0805_5%

R263

1 2

10_0603_5%

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

401817

1

2

1 2

R361

R361 1_0402_1%

1_0402_1%

SCHEMATIC,MB A4853

C152

C153

0.47U_0603_16V4Z

2

Please check Power source if want support IAMT

+1.05VS

1uH 30%

1 2

L17

L17 MBK1608121YZF_0603

MBK1608121YZF_0603

0.1uH 20%

1 2

R226

@R226

@

0_0603_5%

1 2

C250

C250 10U_0805_6.3V6M

10U_0805_6.3V6M

For HM51

1 2

R264

R264 0_0805_5%

0_0805_5%

+1.05VS

DDR3

+1.5V

Please check Power source if want support IAMT

+1.05VS

12 53Monday, September 28, 2009

1

+1.8V

A

of

5

U23I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

BD46 BA46 AY46 AV46 AR46

AM46

BF44 AH44 AD44 AA44

BC43 AV43 AU43

AM43

BG42 AY42 AT42 AN42

AJ42

AE42

BD41 AU41

AM41

AH41 AD41 AA41

BG40 BB40 AV40 AN40

AT39

AM39

AJ39

AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

VSS_12

N47

VSS_13

L47

VSS_14

G47

VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21

V46

VSS_22

R46

VSS_23

P46

VSS_24

H46

VSS_25

F46

VSS_26 VSS_27 VSS_28 VSS_29 VSS_30

Y44

VSS_31

U44

VSS_32

T44

VSS_33

M44

VSS_34

F44

VSS_35 VSS_36 VSS_37 VSS_38 VSS_39

J43

VSS_40

C43

VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47

N42

VSS_48

L42

VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55

Y41

VSS_56

U41

VSS_57

T41

VSS_58

M41

VSS_59

G41

VSS_60

B41

VSS_61 VSS_62 VSS_63 VSS_64 VSS_65

H40

VSS_66

E40

VSS_67 VSS_68 VSS_69 VSS_70 VSS_71

N39

VSS_72

L39

VSS_73

B39

VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81

Y38

VSS_82

U38

VSS_83

T38

VSS_84

J38

VSS_85

F38

VSS_86

C38

VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93

H37

VSS_94

C37

VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

GM@

VSS

CANTIGA ES_FCBGA1329

D D

C C

B B

A A

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

U23J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17 BA16 AU16

AN16

BG15 AC15

W15

BG14 AA14

BG13 BC13 BA13

AN13

AJ13

AE13

BF12 AV12 AT12

AM12

AA12

BD11 BB11 AY11 AN11 AH11

BG10 AV10 AT10

AJ10 AE10 AA10

N16 G16

C14

N13 G13

N11 G11 C11

M10 BF9 BC9 AN9 AM9 AD9

BH8 BB8 AV8 AT8

VSS_233 VSS_235 VSS_237

VSS_238 VSS_239

K16

VSS_240 VSS_241

E16

VSS_242 VSS_243 VSS_244 VSS_245

A15

VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252

VSS_255 VSS_256 VSS_257 VSS_258

L13

VSS_259 VSS_260

E13

VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266

J12

VSS_267

A12

VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273

Y11

VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290

G9

VSS_291

B9

VSS_292 VSS_293 VSS_294 VSS_295 VSS_296

GM@

VSS

VSS NCTF

CANTIGA ES_FCBGA1329

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

VSS SCB

NC

3

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

of

13 53Monday, September 28, 2009

1

5

+DIMM_VREF

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

C907

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11 DDR_A_D16

DDR_A_D17 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D18

DDR_A_D19 DDR_A_D24

DDR_A_D25 DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDRA_CKE0

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 DDRA_CLK0

DDRA_CLK0# DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDRA_SCS1#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D50

DDR_A_D51 DDR_A_D56

DDR_A_D57 DDR_A_DM7 DDR_A_D58

DDR_A_D59

R601

1 2

10K_0402_5%

1

C908

2

2.2U_0603_6.3V4Z

0.1U_0402_16V4Z

D D

C C

B B

A A

DDRA_CKE0<8>

DDR_A_BS2<9>

DDRA_CLK0<8> DDRA_CLK0#<8>

DDR_A_BS0<9>

DDR_A_WE#<9>

DDR_A_CAS#<9> DDRA_ODT0 <8>

DDRA_SCS1#<8>

+3VS

+1.5V +1.5V

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

R602

10K_0402_5%

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

12

VTT1

205

G1

CONN@

VREF_CA

+0.75VS

DQS#0

VSS10

VSS17

VSS19

VSS21

VDD10

VDD12

VDD14

VDD16

VDD18

VSS28

VSS30 VSS31

VSS33

VSS35

DQS#5

VSS38

VSS40

VSS42 VSS43

VSS45

VSS47

DQS#7

VSS50

VSS52

EVENT#

DQ4 DQ5

VSS3

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

DM1

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

DQ28 DQ29

DQS3 DQ30

DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

CK1

CK1#

RAS#

ODT0 ODT1

NC2

DQ36 DQ37

DM4

DQ38 DQ39

DQ44 DQ45

DQS5 DQ46

DQ47 DQ52

DQ53

DM6

DQ54 DQ55

DQ60 DQ61

DQS7 DQ62

DQ63

SDA SCL

VTT2

A15 A14

A11

A7 A6

A4 A2

A0

BA1

S0#

G2

DIMM0 REV H:5.2mm (BOT)

5

4

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28

SM_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDRA_CKE1

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_MA0 DDRA_CLK1

DDRA_CLK1# DDR_A_BS1

DDR_A_RAS# DDRA_SCS0#

DDRA_ODT0 DDRA_ODT1

DDR_VREF_CA_DIMMA DDR_A_D36

DDR_A_D37 DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63 PM_EXTTS#0

D_CK_SDATA D_CK_SCLK

4

+0.75VS

SM_DRAMRST# <8,15>

DDRA_CKE1 <8>

DDRA_CLK1 <8> DDRA_CLK1# <8>

DDR_A_BS1 <9> DDR_A_RAS# <9>

DDRA_SCS0# <8>

DDRA_ODT1 <8>

1 2

R600 0_0402_5%R600 0_0402_5%

PM_EXTTS#0 <8>

D_CK_SDATA <15,16> D_CK_SCLK <15,16>

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z 1

C905

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+DIMM_VREF

1

C906

2

3

Layout Note: Place near JDIMM2

+1.5V

10U_0603_6.3V6M

1

C889

C890

2

Layout Note: Place near JDIMM2.203 & JDIMM2.204

+0.75VS

C9001U_0603_10V4Z C9001U_0603_10V4Z

Compal Secret Data

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

2

DDR_A_DQS#[0..7]<9>

DDR_A_D[0..63]<9>

DDR_A_DM[0..7]<9> DDR_A_DQS[0..7]<9> DDR_A_MA[0..14]<9>

+DIMM_VREF<8,15>

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

0.1U_0402_16V4Z

10U_0603_6.3V6M

1

C892

C893

C891

2

1

C9011U_0603_10V4Z C9011U_0603_10V4Z

C893

2

1

C9031U_0603_10V4Z C9031U_0603_10V4Z

C9021U_0603_10V4Z C9021U_0603_10V4Z

2

10U_0603_6.3V6M

1

C894

2

10U_0805_6.3V6M

1

2

C904

0.1U_0402_16V4Z

C895

1

2

Title

Size Document Number Rev

B

401817

Date: Sheet

+DIMM_VREF

C887

0.1U_0402_16V4Z

C896

1

2

Compal Electronics, Inc.

1

+1.5V

12

R598

C888

1

2

C898

1

2

R598

12

R599

R599 1K_0402_1%

1K_0402_1%

1

+

C899

C899 330U_D2E_2.5VM_R7

330U_D2E_2.5VM_R7

2

1

+DIMM_VREF

14 53Monday, September 28, 2009

of

1K_0402_1%

2.2U_0805_16V4Z

1

2

0.1U_0402_16V4Z

C897

SCHEMATIC,MB A4853

A

+1.5V +1.5V

+DIMM_VREF

JDIMM1

+DIMM_VREF<8,14>

0.1U_0402_16V4Z

2.2U_0805_16V4Z

1 1

2 2

3 3

4 4

+3VS

1

C909

2

DDR_B_BS2<9>

DDRB_CLK0<8> DDRB_CLK0#<8>

DDR_B_BS0<9>

DDR_B_WE#<9>

DDR_B_CAS#<9>

DDRB_SCS1#<8>

C929

C910

DDR_B_D0 DDR_B_D1

DDR_B_DM0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11 DDR_B_D16

DDR_B_D17 DDR_B_DQS#2

DDR_B_DQS2

DDR_B_D19 DDR_B_D24

DDR_B_D25 DDR_B_DM3 DDR_B_D26

DDR_B_D27

DDRB_CKE0

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 DDRB_CLK0

DDRB_CLK0# DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDRB_SCS1#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D50

DDR_B_D51 DDR_B_D56

DDR_B_D57 DDR_B_DM7 DDR_B_D58

DDR_B_D59

R604

1 2

10K_0402_5%

1 2

1

R605

10K_0402_5%

C930

2

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

JDIMM1

3 5 7

9 11 13 15 17 19 21 23 25 27

31 33 35 37 39 41 43 45 47 49 51 53 55 57 59

63 65 67 69 71

73 75 77 79 81 83 85 87 89 91 93 95 97 99

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

CONN@

DIMM1 REV H:9.2mm (BOT)

A

B

VREF_DQ1VSS1 VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS23 DQ26 DQ27 VSS25

CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

+0.75VS

VSS3

DQS#0

DQS0 VSS6

VSS8 DQ12 DQ13

VSS10

DM1

VSS12

DQ14 DQ15

VSS14

DQ20 DQ21

VSS16

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

VSS24

DQ30 DQ31

VSS26

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

VTT2

B

DQ4 DQ5

DQ6 DQ7

A15 A14

A11

CK1

BA1

S0#

SCL

C

2

DDR_B_D4

4

DDR_B_D5

6 8

DDR_B_DQS#0

10

DDR_B_DQS0

12 14

DDR_B_D6

16

DDR_B_D7

18 20

DDR_B_D12

22

DDR_B_D13

24 26

DDR_B_DM1

28

SM_DRAMRST#

30 32

DDR_B_D14

34

DDR_B_D15

36 38

DDR_B_D20

40

DDR_B_D21

42 44

DDR_B_DM2

46 48

DDR_B_D22

50

DDR_B_D23DDR_B_D18

52 54

DDR_B_D28

56

DDR_B_D29

58 60

DDR_B_DQS#3

62

DDR_B_DQS3

64 66

DDR_B_D30

68

DDR_B_D31

70 72

DDRB_CKE1

74 76 78

DDR_B_MA14

80 82

DDR_B_MA11

84

DDR_B_MA7

86

A7

88

DDR_B_MA6

90

A6 A4

A2 A0

G2

92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0 DDRB_CLK1

DDRB_CLK1# DDR_B_BS1

DDR_B_RAS# DDRB_SCS0#

DDRB_ODT0 DDRB_ODT1

DDR_VREF_CA_DIMMB

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63 PM_EXTTS#1

D_CK_SDATA D_CK_SCLK

+0.75VS

SM_DRAMRST# <8,14>

DDRB_CKE1 <8>DDRB_CKE0<8>

DDRB_CLK1 <8> DDRB_CLK1# <8>

DDR_B_BS1 <9> DDR_B_RAS# <9>

DDRB_SCS0# <8> DDRB_ODT0 <8>

DDRB_ODT1 <8>

R603

0_0402_5%

1 2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z 1

2

PM_EXTTS#1 <8>

D_CK_SDATA <14,16> D_CK_SCLK <14,16>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C927

+DIMM_VREF

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C928

2

2009/07/01 2010/07/01

C

Layout Note: Place near JDIMM1

+1.5V

10U_0603_6.3V6M

10U_0805_6.3V6M

10U_0603_6.3V6M

1

C911

2

Layout Note: Place near JDIMM1.203 & JDIMM1.204

+0.75VS

1U_0603_10V4Z

2

1

Compal Secret Data

1

C912

2

1U_0603_10V4Z

2

C922

1

Deciphered Date

C913

C923

1

2

1U_0603_10V4Z

2

C924

1

D

DDR_B_DQS#[0..7]<9>

DDR_B_D[0..63]<9>

DDR_B_DM[0..7]<9>

DDR_B_DQS[0..7]<9>

DDR_B_MA[0..14]<9>

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

0.1U_0402_16V4Z

10U_0603_6.3V6M

1

C914

C915

2

1U_0603_10V4Z

1

2

C926

C925

2

1

D

10U_0603_6.3V6M

1

C916

2

10U_0805_6.3V6M

C918

C917

1

2

Title

Size Document Number Rev

B

Date: Sheet

0.1U_0402_16V4Z

10U_0603_6.3V6M

0.1U_0402_16V4Z

C919

C920

1

2

Compal Electronics, Inc.

401817

E

1

+

C921

@+C921

@

330U_D2E_2.5VM_R7

2

SCHEMATIC,MB A4853

of

15 53Monday, September 28, 2009

E

A

FSLC FSLB FSLA CPU

CLKSEL2 CLKSEL1 CLKSEL0

MHz

0 0 0 266 100 33.3

0

10

1 1

01

CLK_REQ#

200 100 33.3

1

Table : ICS9LPRS387

Control

CR#_10(WLAN) PCIEX10 PCIEX0 CR#_6(MCH) CR#_4(NEW CARD) CR#_9(MINI CARDII)

SRC7(VGA_CLK): Discrete VGA[Enable]

+3VS

1 2

R306 10K_0402_5%R306 10K_0402_5%

CLK_PCI2=1, Trusted Mode Enable(No overclocking allowed)

1 2

R593 10K_0402_5%R593 10K_0402_5%

1 2

R312 10K_0402_5%@R312 10K_0402_5%@

1 2

2 2

R310 10K_0402_5%R310 10K_0402_5%

CLK_PCI5=0, Pin63,64 is SRC_CLK CLK_PCI5=1, Pin63,64 is ITP_CLK

1 2

R308 10K_0402_5%@R308 10K_0402_5%@

CLK_PCI4=0, Pin28, 29 is SRC_CLK Pin24, 25 is DOT96_CLK

1 2

R292 10K_0402_5%@R292 10K_0402_5%@

C345 10P_0402_50V8J@C345 10P_0402_50V8J@

1 2

C346 10P_0402_50V8J@C346 10P_0402_50V8J@

1 2

PCIEX6 PCIEX4 PCIEX9

CLK_PCI2

CLK_PCI4

mount to Enable ITP_CLK

CLK_PCI5

CLK_PCI4

CK_PWRGD

For EMI 10/9

+1.05VS

R327

56_0402_5%@

R326

3 3

4 4

CLKSEL0

CLKSEL1

CLKSEL2

R326

2.2K_0402_5%

1 2

R328

R328 1K_0402_5%@

1K_0402_5%@

1 2

R379

R379 0_0402_5%@

0_0402_5%@

R388

R388 10K_0402_5%

10K_0402_5%

1 2

R390

R390 0_0402_5%@

0_0402_5%@

A

+1.05VS

1 2

R314

R314 0_0402_5%

0_0402_5%

R384

1K_0402_5%@

1K_0402_5%@ R383

R383 1K_0402_5%

1K_0402_5%

1 2

R380

R380 0_0402_5%

0_0402_5%

R389

1K_0402_5%@

1K_0402_5%@ R392

R392 1K_0402_5%

1K_0402_5%

1 2

R391

R391 0_0402_5%

0_0402_5%

R313

R313 1K_0402_5%

1K_0402_5%

1 2

B

SRC

PCI

MHz

33.3100166

Free-Run

PCIEX1

CLK_PCI4=1, Pin28, 29 is 27MHz Pin24, 25 is SRC_CLK

CLK_PCI_LPC CLK_PCI_ICH

MCH_CLKSEL0 <8>

CPU_BSEL0 <5>

MCH_CLKSEL1 <8>

CPU_BSEL1 <5>

MCH_CLKSEL2 <8>

CPU_BSEL2 <5>

B

CLK_PCI_LPC<35>

CLK_PCI_ICH<25>

CLK_ICH_48M<27> CLK_SD_48M<30>

+1.05VS

CLK_ICH_14M<27>

ICH_SMBDATA<27,33>

ICH_SMBCLK<27,33>

C

L15

FBMA-L11-201209-221LMA30T_0805

1

C347

C347 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS

R301

R301 10K_0402_5%

10K_0402_5% @

@

1 2

CK505_PWRGD

13

D

2

G

Q28

S

2N7002_SOT23

2N7002_SOT23 @

@

CLK_PCI_LPC CLK_PCI3

CLK_PCI_ICH CLK_PCI5

CK_PWRGD<27>

VGATE<8,27,47>

C354

1 2

27P_0402_50V8J

C353

27P_0402_50V8J

1 2

CLK_ICH_48M CLK_SD_48M

C

+CLK_VDDSRC

12

1

C358

C358 10U_0805_10V4Z

10U_0805_10V4Z

2

CLK_ENABLE# <47>

H_STP_CPU#<27>

H_STP_PCI#<27>

R307 33_0402_5%R307 33_0402_5%

R309 33_0402_5%R309 33_0402_5%

12

Y2

14.31818MHz_20P_FSX8L14.318181M20FDB

R325 22_0402_5%R325 22_0402_5% R311 22_0402_5%R311 22_0402_5%

R304 33_0402_5%R304 33_0402_5%

+3VS

R305

4.7K_0402_5%

2

G

1 2

+3VS

2

S

Q22

Q22 2N7002_SOT23

2N7002_SOT23

R293

4.7K_0402_5%

G

1 2

S

Q23

Q23 2N7002_SOT23

2N7002_SOT23

D_CK_SDATA

D_CK_SCLK

1 3

D

1 3

D

C371

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+CLK_VDDSRC

12

R3030_0402_5% R3030_0402_5%

12

R3020_0402_5% @ R3020_0402_5% @

12

12 12

12

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

1

C387

2

0.1U_0402_16V4Z

+CLK_VDD

H_STP_CPU# H_STP_PCI#

CLK_PCI2

CLK_PCI4

CK505_PWRGD

CLK_XTALIN CLK_XTALOUT

CLKSEL0 CLKSEL1 CLKSEL2CLK_ICH_14M

D

E

L16

1

C370

0.1U_0402_16V4Z

2

U16

6 19 72 12 27 55

52 38 62 31 66 23

53 54

13 14 15 16 17

1

5

4

11

20

2

7

8

69

3 18 22 30 26 34 59 42

73

ICS9LPRS387BKLFT_MLF72_10x10

2009/07/01 2010/07/01

1

C380

C381

0.1U_0402_16V4Z

2

VDDREF VDD48 VDDCPU VDDPCI VDDPLL3 VDDSRC

VDDSRC_IO VDDSRC_IO VDDSRC_IO VDDPLL3_IO VDDCPU_IO VDD96_IO

CPU_STOP# PCI_STOP#

PCI1 PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN

CK_PWRGD/PD#

X1 X2

NC

USB_48MHz/FSLA FSLB/TEST_MODE FSLC/TEST_SEL/REF0 REF1

GNDCPU GNDREF GNDPCI GND48 GND GND GNDSRC GNDSRC GNDSRC

GND_THERMAL_PAD

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

ICS9LPRS387, PN:SA000020H10 SLG8SP556V, PN:SA000020K00

E

+3VS

1

C386

2

Compal Secret Data

Deciphered Date

L16

FBMA-L11-201209-221LMA30T_0805

1

C390

C390 10U_0805_10V4Z

10U_0805_10V4Z

2

SRCT0_LPR/DOTT_96_LPR

SRCC0_LPR/DOTC_96_LPR

27MHz_NonSS/SRCT1_LPR/SE1

27MHz_SS/SRCC1_LPR/SE2

SRCT2_LPR/SATAT_LPR

SRCC2_LPR/SATAC_LPR

CPUT2_ITP_LPR/SRCT8_LPR

CPUC2_ITP_LPR/SRCC8_LPR

SDATA

SCLK

CPUT0_LPR_F

CPUC0_LPR_F

CPUT1_LPR_F

CPUC1_LPR_F

SRCT3_LPR SRCC3_LPR

SRCT4_LPR SRCC4_LPR

SRCT6_LPR SRCC6_LPR

SRCT7_LPR SRCC7_LPR

SRCT9_LPR SRCC9_LPR

SRCT10_LPR SRCC10_LPR

SRCT11_LPR SRCC11_LPR

CR#3 CR#4 CR#6 CR7#

CR#9 CR10# CR#11

CR#A

F

12

9 10

71 70

68 67

24 25

28 29

32 33

35 36

39 40

57 56

61 60

64 63

44 45

50 51

48 47

37 41 58 65 43 49 46 21

G

+CLK_VDD

1

C384

0.1U_0402_16V4Z

2

10U_0805_10V4Z

D_CK_SDATA D_CK_SCLK

CLK_CPU_BCLK CLK_CPU_BCLK#

CLK_MCH_BCLK CLK_MCH_BCLK#

CLK_DREF_96M CLK_DREF_96M#

CLK_PCIE_SATA CLK_PCIE_SATA#

CLK_PCIE_ICH CLK_PCIE_ICH#

1

C356

C357

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

VGA: disable this pair by BIOS

R576

R576 R577

R577

Remove New Card CLK For HM51

CLK_MCH_3GPLL CLK_MCH_3GPLL#

CLK_PCIE_VGA CLK_PCIE_VGA#

CLK_PCIE_MINI2 CLK_PCIE_MINI2#

CLK_PCIE_LAN CLK_PCIE_LAN#

(Pull High to +3VS at GMCH side)

R583 0_0402_5%@R583 0_0402_5%@

1 2 1 2

R336 10K_0402_5%R336 10K_0402_5%

1 2

R364 10K_0402_5%R364 10K_0402_5%

(Pull High to +3VS at ICH side)

Title

Size Document Number Rev

Custom

401817

Date: Sheet

G

H

Clock Generator

1

C355

C352

0.1U_0402_16V4Z

2

D_CK_SDATA <14,15>

D_CK_SCLK <14,15>

CLK_CPU_BCLK <4> CLK_CPU_BCLK# <4>

CLK_MCH_BCLK <7> CLK_MCH_BCLK# <7>

CLK_DREF_96M <8> CLK_DREF_96M# <8>

CLK_PCIE_SATA <26> CLK_PCIE_SATA# <26>

CLK_PCIE_ICH <27> CLK_PCIE_ICH# <27>

CLK_MCH_3GPLL <8> CLK_MCH_3GPLL# <8>

CLK_PCIE_VGA <17> CLK_PCIE_VGA# <17>

CLK_PCIE_MINI2 <33> CLK_PCIE_MINI2# <33>

CLK_PCIE_LAN <31> CLK_PCIE_LAN# <31>

Compal Electronics, Inc.

SCHEMATIC,MB A4853

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

CLK_DREF_SSC

12

0_0402_5%@

CLK_DREF_SSC#

12

0_0402_5%@

MCH_CLKREQ# <8> CLKREQB <18>

+3VS

MINI2_CLKREQ# <33>

+3VS

LAN_CLKREQ# <31> SATA_CLKREQ# <27>

C372

2

0.1U_0402_16V4Z

For M92

1

C385

2

27M_NSSC <18> CLK_DREF_SSC <8> 27M_SSC <18> CLK_DREF_SSC# <8>

For M92

16 53Monday, September 28, 2009

H

A

of

5

4

3

2

1

PCIE_GTX_C_MRX_P[0..15]<10> PCIE_GTX_C_MRX_N[0..15]<10> PCIE_MTX_C_GRX_P[0..15]<10> PCIE_MTX_C_GRX_N[0..15]<10>

D D

U30A

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5

C C

B B

CLK_PCIE_VGA<16> CLK_PCIE_VGA#<16>

R578

PLT_RST#<8,25,31,35>

PLTRST_VGA#<25>

12

0_0402_5%

ESD

PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15

CLK_PCIE_VGA CLK_PCIE_VGA#

For Future ASIC Pin N10 need pull down

10K_0402_5%@

R468

12

C627 10P_0402_50V8J@C627 10P_0402_50V8J@

AF30

PCIE_RX0P

AE31

PCIE_RX0N

AE29

PCIE_RX1P

AD28

PCIE_RX1N

AD30

PCIE_RX2P

AC31

PCIE_RX2N

AC29

PCIE_RX3P

AB28

PCIE_RX3N

AB30

PCIE_RX4P

AA31

PCIE_RX4N

AA29

PCIE_RX5P

Y28

PCIE_RX5N

Y30

PCIE_RX6P

W31

PCIE_RX6N

W29

PCIE_RX7P

V28

PCIE_RX7N

V30

PCIE_RX8P

U31

PCIE_RX8N

U29

PCIE_RX9P

T28

PCIE_RX9N

T30

PCIE_RX10P

R31

PCIE_RX10N

R29

PCIE_RX11P

P28

PCIE_RX11N

P30

PCIE_RX12P

N31

PCIE_RX12N

N29

PCIE_RX13P

M28

PCIE_RX13N

M30

PCIE_RX14P

L31

PCIE_RX14N

L29

PCIE_RX15P

K30

PCIE_RX15N

CLOCK

AK30

PCIE_REFCLKP

AK32

PCIE_REFCLKN

L9

NC#1

N9

NC#2

N10

12

NC_PWRGOOD

AL27

PERSTB

216-0728018 A12 M92-S2 XT FCBGA 0FA

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_MTX_C_GRX_N[0..15]

AH30

PCIE_TX0P

AG31

PCIE_TX0N

AG29

PCIE_TX1P

AF28

PCIE_TX1N

AF27

PCIE_TX2P

AF26

PCIE_TX2N

AD27

PCIE_TX3P

AD26

PCIE_TX3N

PCIE_TX4P PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

AC25 AB25

Y23 Y24

AB27 AB26

PEG_NRX_C_GTX_P7 PCIE_GTX_C_MRX_P7

Y27 Y26

W24 W23

V27 U26

U24 U23

T26 T27

T24 T23

P27

PEG_NRX_C_GTX_N13 PCIE_GTX_C_MRX_N13

P26

PEG_NRX_C_GTX_P14 PCIE_GTX_C_MRX_P14

P24 P23

PEG_NRX_C_GTX_P15 PCIE_GTX_C_MRX_P15

M27

PEG_NRX_C_GTX_N15 PCIE_GTX_C_MRX_N15

N26

R467 1.27K_0402_1%R467 1.27K_0402_1%

Y22

1 2

R469 2K_0402_1%R469 2K_0402_1%

AA22

1 2

PCI EXPRESS INTERFACE

CALIBRATION

PCIE_CALRP PCIE_CALRN

C595 0.1U_0402_16V7KC595 0.1U_0402_16V7K

1 2

C596 0.1U_0402_16V7KC596 0.1U_0402_16V7K

1 2

C597 0.1U_0402_16V7KC597 0.1U_0402_16V7K

1 2

C598 0.1U_0402_16V7KC598 0.1U_0402_16V7K

1 2

C599 0.1U_0402_16V7KC599 0.1U_0402_16V7K

1 2

C600 0.1U_0402_16V7KC600 0.1U_0402_16V7K

1 2

C601 0.1U_0402_16V7KC601 0.1U_0402_16V7K

1 2

C602 0.1U_0402_16V7KC602 0.1U_0402_16V7K

1 2

C603 0.1U_0402_16V7KC603 0.1U_0402_16V7K

1 2

C604 0.1U_0402_16V7KC604 0.1U_0402_16V7K

1 2

C605 0.1U_0402_16V7KC605 0.1U_0402_16V7K

1 2

C606 0.1U_0402_16V7KC606 0.1U_0402_16V7K

1 2

C607 0.1U_0402_16V7KC607 0.1U_0402_16V7K

1 2

C608 0.1U_0402_16V7KC608 0.1U_0402_16V7K

1 2

C609 0.1U_0402_16V7KC609 0.1U_0402_16V7K

1 2

C610 0.1U_0402_16V7KC610 0.1U_0402_16V7K

1 2

C611 0.1U_0402_16V7KC611 0.1U_0402_16V7K

1 2

C612 0.1U_0402_16V7KC612 0.1U_0402_16V7K

1 2

C613 0.1U_0402_16V7KC613 0.1U_0402_16V7K

1 2

C614 0.1U_0402_16V7KC614 0.1U_0402_16V7K

1 2

C615 0.1U_0402_16V7KC615 0.1U_0402_16V7K

1 2

C616 0.1U_0402_16V7KC616 0.1U_0402_16V7K

1 2

C617 0.1U_0402_16V7KC617 0.1U_0402_16V7K

1 2

C618 0.1U_0402_16V7KC618 0.1U_0402_16V7K

1 2

C619 0.1U_0402_16V7KC619 0.1U_0402_16V7K

1 2

C620 0.1U_0402_16V7KC620 0.1U_0402_16V7K

1 2

C621 0.1U_0402_16V7KC621 0.1U_0402_16V7K

1 2

C622 0.1U_0402_16V7KC622 0.1U_0402_16V7K

1 2

C623 0.1U_0402_16V7KC623 0.1U_0402_16V7K

1 2

C624 0.1U_0402_16V7KC624 0.1U_0402_16V7K

1 2

C625 0.1U_0402_16V7KC625 0.1U_0402_16V7K

1 2

C626 0.1U_0402_16V7KC626 0.1U_0402_16V7K

1 2

+1.1VS

PCIE_GTX_C_MRX_P0PEG_NRX_C_GTX_P0 PCIE_GTX_C_MRX_N0PEG_NRX_C_GTX_N0

PCIE_GTX_C_MRX_P1PEG_NRX_C_GTX_P1 PCIE_GTX_C_MRX_N1PEG_NRX_C_GTX_N1

PCIE_GTX_C_MRX_P2PEG_NRX_C_GTX_P2 PCIE_GTX_C_MRX_N2PEG_NRX_C_GTX_N2

PCIE_GTX_C_MRX_P3PEG_NRX_C_GTX_P3 PCIE_GTX_C_MRX_N3PEG_NRX_C_GTX_N3

PCIE_GTX_C_MRX_P4PEG_NRX_C_GTX_P4 PCIE_GTX_C_MRX_N4PEG_NRX_C_GTX_N4

PCIE_GTX_C_MRX_P5PEG_NRX_C_GTX_P5 PCIE_GTX_C_MRX_N5PEG_NRX_C_GTX_N5

PCIE_GTX_C_MRX_P6PEG_NRX_C_GTX_P6 PCIE_GTX_C_MRX_N6PEG_NRX_C_GTX_N6

PCIE_GTX_C_MRX_N7PEG_NRX_C_GTX_N7

PCIE_GTX_C_MRX_P8PEG_NRX_C_GTX_P8 PCIE_GTX_C_MRX_N8PEG_NRX_C_GTX_N8

PCIE_GTX_C_MRX_P9PEG_NRX_C_GTX_P9 PCIE_GTX_C_MRX_N9PEG_NRX_C_GTX_N9

PCIE_GTX_C_MRX_P10PEG_NRX_C_GTX_P10 PCIE_GTX_C_MRX_N10PEG_NRX_C_GTX_N10

PCIE_GTX_C_MRX_P11PEG_NRX_C_GTX_P11 PCIE_GTX_C_MRX_N11PEG_NRX_C_GTX_N11

PCIE_GTX_C_MRX_P12PEG_NRX_C_GTX_P12 PCIE_GTX_C_MRX_N12PEG_NRX_C_GTX_N12

PCIE_GTX_C_MRX_P13PEG_NRX_C_GTX_P13

PCIE_GTX_C_MRX_N14PEG_NRX_C_GTX_N14

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

1

A

of

17 53Monday, September 28, 2009

of

17 53Monday, September 28, 2009

of

17 53Monday, September 28, 2009

For M92-S2: DO NOT Install any Component in this Box.

+1.8VS

L44

1 2

MCK1608471YZF 0603@

10U_0603_6.3V6M@

D D

+1.1VS

L45

1 2

MCK1608471YZF 0603@

10U_0603_6.3V6M@

+3.3V_DELAY

1 2

R474 4.7K_0402_5%R474 4.7K_0402_5%

1 2

R476 4.7K_0402_5%R476 4.7K_0402_5% R584

R584 R477

R477

+3.3V_DELAY

GPIO_5_AC_BATT AC(Performance mode) = 3.3V Battery saving mode = 0.0V

C C

5

(1.8V@120mA +DPLL_PVDD)

1

C628

2

(1.8V@120mA +DPLL_PVDD)

1

C631

2

VGA_LCD_CLK VGA_LCD_DATA

VGA_PWRSEL1

12

10K_0402_5%@

VGA_PWRSEL0

12

10K_0402_5%@

R585 100K_0402_5%R585 100K_0402_5%

ACIN<27,35,40,41,44>

D31 RB751V_SOD323D31 RB751V_SOD323

1U_0402_6.3V4Z@

1 2

+DPC_VDD18

1

C629

C630

2

0.1U_0402_10V6K@

+DPC_VDD10

1

C633

C632

2

0.1U_0402_10V6K@

GPU_GPIO0<22> GPU_GPIO1<22> GPU_GPIO2<22>

21

VGA_ENBKL<35> SOUT_GPIO8<22> GPU_GPIO9<22>

GPU_GPIO11<22> GPU_GPIO12<22> GPU_GPIO13<22>

VGA_PWRSEL0<48>

27M_SSC<16>

THM_ALERT#<22>

VGA_PWRSEL1<48>

CLKREQB<16>

BB_EN

BB_EN<20>

CLKREQB

VRAM_ID0<22> VRAM_ID1<22> VRAM_ID2<22> VRAM_ID3<22>

+DPC_VDD10

LCD

VGA_LCD_CLK<23> VGA_LCD_DATA<23>

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2

R480 10K_0402_5%R480 10K_0402_5%

1 2

SOUT_GPIO8 GPU_GPIO9

GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

R481 0_0402_5%@ R481 0_0402_5%@

1 2

R482 10K_0402_5%@ R482 10K_0402_5%@

1 2

R483 0_0402_5%R483 0_0402_5%

1 2

10/24 Reference AMD REF136-1

+3.3V_DELAY

12

@

R484

R484 10K_0402_5%

10K_0402_5%

BB_EN

Back bias (BB) control

+3.3V_DELAY

Back Bias Disabled : GPIO_21_BB_EN = 0V BBP connect directly to VDDC

12

R485

@

10K_0402_5%

B B

CLKREQB

27M_NSSC<16>

+3.3V_DELAY

12

R491

R491 @

@ 10K_0402_5%

10K_0402_5%

TESTEN

12

R492

R492 1K_0402_5%

1K_0402_5%

A A

+1.8VS

L52

1 2

MCK1608471YZF 0603

10U_0603_6.3V6M

+1.1VS

L53

1 2

MCK1608471YZF 0603

10U_0603_6.3V6M

5

R489

+1.8VS

R486

499_0402_1%

R488

249_0402_1%

75_0402_1%

1 2

R490

100_0402_5%

1 2

L51

L51 +1.8VS BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

10U_0603_6.3V

(1.8V@20mA TSVDD)

(1.8V@120mA +DPLL_PVDD)

1U_0402_6.3V4Z

1

C653

2

(1.1V@300mA +DPLL_VDDC)

1U_0402_6.3V4Z

1

C658

2

TESTEN<20>

12

1

2

1

2

0.1U_0402_10V6K

1

C646

2

GPU_THERMAL_D+<22> GPU_THERMAL_D-<22>

1U_0402_6.3V4Z

12

1

C650

C651

2

+DPLL_PVDD

1

C655

C654

0.1U_0402_10V6K

2

+DPLL_VDDC

1

C660

C659

0.1U_0402_10V6K

2

1 2

R470 150_0402_1%@R470 150_0402_1%@

VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3

+DPC_VDD18

1 2

R471 0_0402_5%@R471 0_0402_5%@

GPIO_5_AC_BATT#

VGA_PWRSEL0

R_27M_SSC

GPU_CTF

VGA_PWRSEL1

GPU_GPIO21

GPIO24_TRSTB

T31 PADT31 PAD T32 PADT32 PAD T33 PADT33 PAD T34 PADT34 PAD

TESTEN

+DPLL_PVDD

+DPLL_VDDC

1.8V

27MCLK XTALOUT

T37 PADT37 PAD

+TSVDD

1

C652

0.1U_0402_10V6K

2

4

U30B

MUTI GFX

AA1

DVPCNTL_MVP_0

Y4

DVPCNTL_MVP_1

AC7

DVPCNTL_0

Y2

DVPCNTL_1

U5

DVPCNTL_2

U1

DVPCLK

Y7

DVPDATA_0

V2

DVPDATA_1

Y8

DVPDATA_2

V4

DVPDATA_3

AB7

DVPDATA_4

W1

DVPDATA_5

AB8

DVPDATA_6

W3

DVPDATA_7

AB9

DVPDATA_8

W5

DVPDATA_9

AC6

DVPDATA_10

W6

DVPDATA_11

AD7

DVPDATA_12

AA3

DVPDATA_13

AC8

DVPDATA_14

AA5

DVPDATA_15

AE8

DVPDATA_16

AA6

DVPDATA_17

AE9

DVPDATA_18

AB4

DVPDATA_19

AD9

DVPDATA_20

AB2

DVPDATA_21

AC10

DVPDATA_22

AC5

DVPDATA_23

I2C

R1

SCL

R3

SDA

GENERAL PURPOSE I/O

U6

GPIO_0

U10

GPIO_1

T10

GPIO_2

U8

GPIO_3_SMBDATA

U7

GPIO_4_SMBCLK

T9

GPIO_5_AC_BATT

T8

GPIO_6

T7

GPIO_7_BLON

P10

GPIO_8_ROMSO

P4

GPIO_9_ROMSI

P2

GPIO_10_ROMSCK

N6

GPIO_11

N5

GPIO_12

N3

GPIO_13

Y9

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

M4

GPIO_16_SSIN

R6

GPIO_17_THERMAL_INT

W10

GPIO_18_HPD3

M2

GPIO_19_CTF

P8

GPIO_20_PWRCNTL_1

P7

GPIO_21_BB_EN

N8

GPIO_22_ROMCSB

N7

GPIO_23_CLKREQB

T11

GPIO_29_DRM_0

R11

GPIO_30_DRM_1

L6

JTAG_TRSTB

L5

JTAG_TDI

L3

JTAG_TCK

L1

JTAG_TMS

K4

JTAG_TDO

AF24

TESTEN

AB13

GENERICA

W8

GENERICB

W9

GENERICC

W7

GENERICD

AD10

GENERICE_HPD4

AC14

HPD1

VREF

AC16

VREFG

PLL/CLOCK

AF14

DPLL_PVDD

AE14

DPLL_PVSS

AD14

DPLL_VDDC

AM28

XTALIN

AK28

XTALOUT

T4

DPLUS

T2

DMINUS

R5

TS_FDO

AD17

TSVDD

AC17

TSVSS

216-0728018 A12 M92-S2 XT FCBGA 0FA

VGA_PWRSEL_1VGA_PWRSEL_0

0 0

11

4

THERMAL

3

AF2

TXCAP_DPA3P

AF4

TXCAM_DPA3N

AG3

TX0P_DPA2P

AG5

TX0M_DPA2N

DPA

DPB

DAC1

DAC2

DDC/AUX

0 1 01

AH3

TX1P_DPA1P

AH1

TX1M_DPA1N

AK3

TX2P_DPA0P

AK1

TX2M_DPA0N

AK5

TXCBP_DPB3P

AM3

TXCBM_DPB3N

AK6

TX3P_DPB2P

AM5

TX3M_DPB2N

AJ7

TX4P_DPB1P

AH6

TX4M_DPB1N

AK8

TX5P_DPB0P

AL7

TX5M_DPB0N

AM26

R

AK26

RB

AL25

G

AJ25

GB

AH24

B

AG25

BB

AH26

HSYNC

AJ27

VSYNC

RSET

AVDD

AVSSQ VDD1DI

VSS1DI

COMP

H2SYNC V2SYNC

VDD2DI VSS2DI

A2VDD A2VDDQ A2VSSQ

R2SET

DDC1CLK

DDC1DATA

AUX1P

AUX1N

DDC2CLK

DDC2DATA

AUX2P

AUX2N

DDCAUX5P DDCAUX5N

DDC6CLK

DDC6DATA

NC_DDCAUX7P

NC_DDCAUX7N

+VGA_CORE

1.2V

1.1V

0.95V

0.9V

R2

R2B

G2

G2B

B2

B2B

NC1 NC2

R478

AD22

1 2

499_0402_1%

+AVDD

AG24 AE22

+VDD1DI

AE23 AD23

AM12 AK12

AL11 AJ11

AK10 AL9

T28PADT28PAD

AH12

C Y

T30PADT30PAD

AM10

T29PADT29PAD

AJ9

AL13 AJ13

+VDD1DI

AD19 AC19

+A2VDD

AE20

+A2VDDQ

AE17 AE19

R487

AG13

1 2

715_0402_1%

AE6 AE5

AD2 AD4

AC11 AC13

AD13 AD11

T35PADT35PADR489

AB22

T36PADT36PAD

AC22

AE16 AD16

AC1 AC3

AD20 AC20

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

VGA_CRT_R

1 2

R472 150_0402_1%R472 150_0402_1%

VGA_CRT_G

1 2

R473 150_0402_1%R473 150_0402_1%

VGA_CRT_B

1 2

R475 150_0402_1%R475 150_0402_1%

VGA_CRT_R <24>

VGA_CRT_G <24>

VGA_CRT_B <24>

VGA_CRT_HSYNC <22,24> VGA_CRT_VSYNC <22,24>

HSYNC_DAC2 <22> VSYNC_DAC2 <22>

VGA_CRT_CLK <24> VGA_CRT_DATA <24>

2009/07/01 2010/07/01

CRT

1

2

22P_0402_50V8J

Compal Secret Data

Deciphered Date

2

U30F

LVDS CONTROL

LVTMDP

216-0728018 A12 M92-S2 XT FCBGA 0FA

+1.8VS +AVDD

BLM18PG121SN1D_0603

Y4

@Y4

@

4

3

GND

OUT

1

2

IN

GND

27MHz_16PF_6P27000126

C657

@C657

@

(1.8V@70mA AVDD)

L46

12

C634

10U_0603_6.3V

(1.8V@45mA VDD1DI)

L47

12

C637

10U_0603_6.3V

L48

12

C640

10U_0603_6.3V

L50

12

BLM18PG121SN1D_0603

10U_0603_6.3V

27MCLK

12

R495

@R495

@ 1M_0402_5%

1M_0402_5%

XTALOUT

1

C656

@C656

@

22P_0402_50V8J

2

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

2

(1.8V@1mA A2VDDQ)

1U_0402_6.3V4Z

1

2

(3.3V@65mA A2VDD)

1

C647

2

Close to M92

2

1

R559 10K_0402_5%R559 10K_0402_5%

1 2

AB11

VARY_BL

AB12

DIGON

VGA_TZCLK+

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

1

2

1

2

1

C641

2

0.1U_0402_10V6K

1U_0402_6.3V4Z

Title

Size Document Number Rev

Date: Sheet

AH20

VGA_TZCLK-

AJ19

VGA_TZOUT0+

AL21

VGA_TZOUT0-

AK20

VGA_TZOUT1+

AH22

VGA_TZOUT1-

AJ21

VGA_TZOUT2+

AL23

VGA_TZOUT2-

AK22 AK24

TXOUT_U3P

AJ23

TXOUT_U3N

AL15 AK14

AH16 AJ15

AL17 AK16

AH18 AJ17

AL19

TXOUT_L3P

AK18

TXOUT_L3N

1

C636

C635

2

0.1U_0402_10V6K

0.1U_0402_10V6K +VDD1DI

1

C638

C639

2

0.1U_0402_10V6K

+A2VDDQ

1

C642

2

+A2VDD+3.3V_DELAY

1

C648

C649

2

0.1U_0402_10V6K

+3.3V_DELAY

GPIO24_TRSTB

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

12

R493

R493 10K_0402_5%

10K_0402_5%

12

R494

R494 1K_0402_5%

1K_0402_5%

1

@

VGA_ENVDD <23>

VGA_TZCLK+ <23> VGA_TZCLK- <23>

VGA_TZOUT0+ <23> VGA_TZOUT0- <23>

VGA_TZOUT1+ <23> VGA_TZOUT1- <23>

VGA_TZOUT2+ <23> VGA_TZOUT2- <23>

VGA_TXCLK+ <23> VGA_TXCLK- <23>

VGA_TXOUT0+ <23> VGA_TXOUT0- <23>

VGA_TXOUT1+ <23> VGA_TXOUT1- <23>

VGA_TXOUT2+ <23> VGA_TXOUT2- <23>

of

18 53Monday, September 28, 2009

of

18 53Monday, September 28, 2009

of

18 53Monday, September 28, 2009

A

5

4

3

2

1

MAA[12..0] BA[2..0]

D D

C C

+1.8VS

+VDD_MEM18_REFD +VDD_MEM18_REFS

B B

4.7K_0402_5%

R499243_0402_1%@ R499243_0402_1%@

1 2

R500243_0402_1%@ R500243_0402_1%@

1 2

R501243_0402_1% R501243_0402_1%

1 2

R502243_0402_1%@ R502243_0402_1%@

1 2

R504

MAA[12..0] <21> BA[2..0] <21>

MDA0

K27

MDA1

J29

MDA2

H30

MDA3

H32

MDA4

G29

MDA5

F28

MDA6

F32

MDA7

F30

MDA8

C30

MDA9

F27

MDA10

A28

MDA11

C28

MDA12

E27

MDA13

G26

MDA14

D26

MDA15

F25

MDA16

A25

MDA17

C25

MDA18

E25

MDA19

D24

MDA20

E23

MDA21

F23

MDA22

D22

MDA23

F21

MDA24

E21

MDA25

D20

MDA26

F19

MDA27

A19

MDA28

D18

MDA29

F17

MDA30

A17

MDA31

C17

MDA32

E17

MDA33

D16

MDA34

F15

MDA35

A15

MDA36

D14

MDA37

F13

MDA38

A13

MDA39

C13

MDA40

E11

MDA41

A11

MDA42

C11

MDA43

F11

MDA44

A9

MDA45

C9

MDA46

F9

MDA47

D8

MDA48

E7

MDA49

A7

MDA50

C7

MDA51

F7

MDA52

A5

MDA53

E5

MDA54

C3

MDA55

E1

MDA56

G7

MDA57

G6

MDA58

G1

MDA59

G3 MDA60 MDA61 MDA62 MDA63

K26

J26 J25

K7

K25

L10

K8

12

4.7K_0402_5%

U30C

DQA_0 DQA_1 DQA_2 DQA_3 DQA_4 DQA_5 DQA_6 DQA_7 DQA_8 DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59

J6

DQA_60

J1

DQA_61

J3

DQA_62

J5

DQA_63 MVREFDA

MVREFSA NC_MEM_CALRN0

NC_MEM_CALRN1

J8

MEM_CALRP1 NC_MEM_CALRP0

DRAM_RST CLKTESTA

L7

CLKTESTB

216-0728018 A12 M92-S2 XT FCBGA 0FA

R505

MDA[63..0]<21>

MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8

MAA_9 MAA_10 MAA_11 MAA_12

MAA_13/BA2 MAA_14/BA0 MAA_15/BA1

DQMA_0 DQMA_1 DQMA_2 DQMA_3 DQMA_4 DQMA_5 DQMA_6

MEMORY INTERFACE

DQMA_7

RDQSA_0 RDQSA_1 RDQSA_2 RDQSA_3 RDQSA_4 RDQSA_5 RDQSA_6 RDQSA_7

WDQSA_0 WDQSA_1 WDQSA_2 WDQSA_3 WDQSA_4 WDQSA_5 WDQSA_6 WDQSA_7

ODTA0 ODTA1

CLKA0 CLKA0B

CLKA1 CLKA1B

RASA0B RASA1B

CASA0B CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0

CKEA1

WEA0B WEA1B

RSVD#1 RSVD#2 RSVD#3

MDA[63..0]

MAA0

K17

MAA1

J20

MAA2

H23

MAA3

G23

MAA4

G24

MAA5

H24

MAA6

J19

MAA7

K19

MAA8

J14

MAA9

K14

MAA10

J11

MAA11

J13

MAA12

H11

BA2

G11

BA0

J16

BA1

L15

DQMA#0

E32

DQMA#1

E30

DQMA#2

A21

DQMA#3

C21

DQMA#4

E13

DQMA#5

D12

DQMA#6

E3

DQMA#7

F4

QSA0

H28

QSA1

C27

QSA2

A23

QSA3

E19

QSA4

E15

QSA5

D10

QSA6

D6

QSA7

G5

QSA#0

H27

QSA#1

A27

QSA#2

C23

QSA#3

C19

QSA#4

C15

QSA#5

E9

QSA#6

C5

QSA#7

H4

ODTA0

L18

ODTA1 +DPB_PVDD

K16

CLKA0

H26

CLKA0#

H25

CLKA1

G9

CLKA1#

H9

RASA#0

G22

RASA#1

G17

CASA#0

G19

CASA#1

G16

CSA0#

H22 J22

CSA1#

G13 K13

CKEA0

K20

CKEA1

J17

WEA#0

G25

WEA#1

H10 AB16

G14 G20

T38PADT38PAD T39PADT39PAD T40PADT40PAD

ODTA0 <21> ODTA1 <21>

CLKA0 <21> CLKA0# <21>

CLKA1 <21> CLKA1# <21>

RASA#0 <21> RASA#1 <21>

CASA#0 <21> CASA#1 <21>

CSA0# <21>

CSA1# <21>

CKEA0 <21> CKEA1 <21>

WEA#0 <21> WEA#1 <21>

DQMA#[7..0] <21>

QSA[7..0] <21>

QSA#[7..0] <21>

(1.8V@200mA +DPE_VDD18)

+1.8VS +DPE_VDD18

+DPE_VDD18

+1.8VS

@ L56

@

BLM18PG121SN1D_0603

(1.1V@170mA +DPF_VDD10)

BLM18PG121SN1D_0603

L54

BLM18PG121SN1D_0603

10U_0603_6.3V

R496

0_0402_5%

1 2

12

L56

10U_0603_6.3V

+1.1VS

BLM18PG121SN1D_0603

10U_0603_6.3V

+1.8VS +1.8VS

(1.8V@20mA +DPE_PVDD)

10U_0603_6.3V

L57

L58

12

1

C661

2

1U_0402_6.3V4Z

1

C667

2

1U_0402_6.3V4Z

12

1

C670

2

12

1

C673

2

1U_0402_6.3V4Z

1

C662

2

1

C668

2

0.1U_0402_10V6K

1

C671

2

1U_0402_6.3V4Z

1 C674

C674

2

1

C663

0.1U_0402_10V6K

0.1U_0402_10V6K 2

1 C669

C669

2

1

C672

0.1U_0402_10V6K

2

1 C675

C675

0.1U_0402_10V6K

0.1U_0402_10V6K 2

+DPF_VDD10

+DPF_VDD18

+DPF_VDD10

R497

150_0402_1%

1 2

+DPE_PVDD

+1.8VS

L61

1 2

MCK1608471YZF 0603@

10U_0603_6.3V6M@

U30G

AG15

DPE_VDD18#1

AG16

DPE_VDD18#2

AG20

DPE_VDD10#1

AG21

DPE_VDD10#2

AG14

DPE_VSSR#1

AH14

DPE_VSSR#2

AM14

DPE_VSSR#3

AM16

DPE_VSSR#4

AM18

DPE_VSSR#5

AF16

DPF_VDD18#1

AG17

DPF_VDD18#2

AF22

DPF_VDD10#1

AG22

DPF_VDD10#2

AF23

DPF_VSSR#1

AG23

DPF_VSSR#2

AM20

DPF_VSSR#3

AM22

DPF_VSSR#4

AM24

DPF_VSSR#5

AF17

DPEF_CALR

DP PLL POWER

AG18

DPE_PVDD

AF19

DPE_PVSS

AG19

NC_DPF_PVDD

AF20

NC_DPF_PVSS

216-0728018 A12 M92-S2 XT FCBGA 0FA

DP PLL POWER

(1.8V@120mA +DPLL_PVDD)

1U_0402_6.3V4Z@

1

2

C682

C683

2

DP A/B POWERDP E/F POWER

NC_DPA_VDD18#1 NC_DPA_VDD18#2

DPA_VDD10#1 DPA_VDD10#2

DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5

NC_DPB_VDD18#1 NC_DPB_VDD18#2

DPB_VDD10#1 DPB_VDD10#2

DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5

DPAB_CALR

DPA_PVDD

DPA_PVSS

DPB_PVDD

DPB_PVSS

+DPA_VDD18

1

C684

0.1U_0402_10V6K@

2

+DPA_VDD18

AE11 AF11

(1.1V@200mA +DPA_VDD10)

+DPA_VDD10

AF6 AF7

AE1 AE3 AG1 AG6 AH5

AE13 AF13

AF8 AF9

AF10 AG9 AH8 AM6 AM8

AE10

AG8 AG7

AG10 AG11

R498

150_0402_1%

1 2

+DPA_PVDD

1

C664

10U_0603_6.3V

10U_0603_6.3V 2

1U_0402_6.3V4Z

1

2

C665

C666

0.1U_0402_10V6K

2

(1.8V@20mA +DPA_PVDD)

1U_0402_6.3V4Z

1

C67610U_0603_6.3V C67610U_0603_6.3V

C677

2

(1.8V@20mA +DPB_PVDD)

1U_0402_6.3V4Z

1

C679

C680

2

10U_0603_6.3V

2

+1.1VS

L55

12

BLM18PG121SN1D_0603

L59

12

BLM18PG121SN1D_0603

1

C678

0.1U_0402_10V6K

2

L60

BLM18PG121SN1D_0603

1 C681

C681

0.1U_0402_10V6K

2

+1.8VS

12

+1.8VS +1.8VS

12

R507

100_0402_1%

A A

R509

100_0402_1%

Close to K26 Close to J26

100_0402_1%

+VDD_MEM18_REFD

1

12

C688

0.1U_0402_16V4Z

2

5

100_0402_1%

R508

R510

12

+VDD_MEM18_REFS

1

C689

0.1U_0402_16V4Z

2

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

1

of

19 53Monday, September 28, 2009

of

19 53Monday, September 28, 2009

of

19 53Monday, September 28, 2009

A

5

4

3

2

1

+1.8VS

1U_0402_6.3V4Z

1

1U_0402_6.3V4Z

D D

1U_0402_6.3V4Z

+3.3V_DELAY

10U_0603_6.3V

C C

B B

A A

BB_EN<18>

2

1U_0402_6.3V4Z

C842

1

2

1U_0402_6.3V4Z

10U_0603_6.3V

+1.8VS +VDDC_CT

L63

BLM18PG121SN1D_0603

C725

1

2

1U_0402_6.3V4Z

+1.8VS

L64

BLM18PG121SN1D_0603

+1.8VS

L67

BLM18PG121SN1D_0603

+VGA_CORE

MCK1608471YZF 0603

@

L70 BLM18PG121SN1D_0603

BB_EN

R523

10K_0402_5%

C702

C703

1

2

1U_0402_6.3V4Z

C841

C846

1

2

C848

1

2

10U_0603_6.3V

12

1

2

1U_0402_6.3V4Z

C726

1

2

12

10U_0603_6.3V

10U_0603_6.3V L69

L69

1 2

+VGA_BBP+VGA_CORE

12

61

2

Q42A

2N7002DW-T/R7_SOT363-6

Q42A

2N7002DW-T/R7_SOT363-6

5

12

(1.8V@2200mA)

1U_0402_6.3V4Z

C691

C704

1

2

1U_0402_6.3V4Z

C843

C844

1

2

1U_0402_6.3V4Z

C709

1

2

10U_0603_6.3V

1U_0402_6.3V4Z

C692

0.1U_0402_10V6K

C694

1

2

1U_0402_6.3V4Z

1

2

(1.8V@110mA +VDDC_CT)

C711

C712

1

2

1U_0402_6.3V4Z

C727

C728

1

2

1U_0402_6.3V4Z

+VDDRHA

1U_0402_6.3V4Z

C741

1

2

1U_0402_6.3V4Z

C748

1

2

10U_0603_6.3V

+VGA_BBP

+1.8VS

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z C753

C753

13

D

1

2

G

Q43

SI2301BDS_SOT23

Q43

SI2301BDS_SOT23

S

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q42B

Q42B

4

5

12

R522 100K_0402_5%R522 100K_0402_5%

1U_0402_6.3V4Z

C705

C690

1

2

1U_0402_6.3V4Z

C849

C850

1

2

C695

1

2

10U_0603_6.3V

C854

1

2

1U_0402_6.3V4Z

TESTEN<18>

+VDDR5

+VDDR4

1U_0402_6.3V4Z

C742

1

2

0.1U_0402_10V6K

C749

1

2

0.1U_0402_10V6K

+5VS

1U_0402_6.3V4Z

C847

C706

1

2

1U_0402_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K C851

C851

C852

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C710

C710

1

2 10U_0603_6.3V

10U_0603_6.3V

C855

C713

1

2

0.1U_0402_10V6K

@

1 2

R5110_0402_5%

1 2

R512 0_0402_5%R512 0_0402_5%

1U_0402_6.3V4Z

C737

1

2

+PCIE_PVDD

C743

+SPV10

C750

1

2

1U_0402_6.3V4Z

C751

1

2

0.1U_0402_10V6K

+1.8VS

BLM18PG121SN1D_0603

+1.8VS

BLM18PG121SN1D_0603

C845

1

2

C853

1

2

C738

1

2

L71

L72

U30D

MEM I/O

H13

VDDR1#1

H16

VDDR1#2

H19

VDDR1#3

J10

VDDR1#4

J23

VDDR1#5

J24

VDDR1#6

J9

VDDR1#7

K10

VDDR1#8

K23

VDDR1#9

K24

VDDR1#10

K9

VDDR1#11

L11

VDDR1#12

L12

VDDR1#13

L13

VDDR1#14

L20

VDDR1#15

L21

VDDR1#16

L22

VDDR1#17

LEVEL

LEVEL TRANSLATION

TRANSLATION

AA20

VDD_CT#1

AA21

VDD_CT#2

AB20

VDD_CT#3

AB21

VDD_CT#4

I/O

AA17

VDDR3#1

AA18

VDDR3#2

AB17

VDDR3#3

AB18

VDDR3#4

U11

VDDR5#1

U12

VDDR5#2

V11

VDDR5#3

V12

VDDR5#4

AA11

VDDR4#1

AA12

VDDR4#2

Y11

VDDR4#3

Y12

VDDR4#4

MEM CLK

L17

VDDRHA

L16

VSSRHA

PLL

AM30

PCIE_PVDD

L8

NC_MPV18

H7

NC_SPV18

H8

SPV10

J7

SPVSS

BACK BIAS

M11

BBP#1

M12

BBP#2

C752

1

216-0728018 A12 M92-S2 XT FCBGA 0FA

2

216-0728018 A12 M92-S2 XT FCBGA 0FA

12

10U_0603_6.3V

12

10U_0603_6.3V

C754

1

2

C758

1

2

4

1U_0402_6.3V4Z

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

CORE

POWER

ISOLATED

ISOLATED CORE I/O

CORE I/O

C756

1

2

0.1U_0402_10V6K

C759

1

2

0.1U_0402_10V6K

VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8

VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23

VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8

+VDDR4 C757

C757

+VDDR5 C760

C760

AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26

L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22

AA15 N15 N17 R13 R16 R18 R21 T12 T15 T17 T20 U13 U16 U18 U21 V15 V17 V20 V21 Y13 Y16 Y18 Y21

M13 M15 M16 M17 M18 M20 M21 N20

(1.8V@500mA +PCIE_GDDR)

+PCIE_GDDR

1

2

0.1U_0402_10V6K

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

+VDDCI

1U_0402_6.3V4Z

0.1U_0402_10V6K

C856

1

2

1U_0402_6.3V4Z

C714

1

2

1U_0402_6.3V4Z

C869

1

2

1U_0402_6.3V4Z

C744

1

2

C707

1U_0402_6.3V4Z

C857

1

2

1U_0402_6.3V4Z

C858

1

2

C859

1

2

C860

C693

1

2

1U_0402_6.3V4Z

MCK2012221YZF 0805

C708

1

10U_0603_6.3V

2

1 2

1U_0402_6.3V4Z

(1.1V@2000mA +PCIE_VDDC)

1U_0402_6.3V4Z

C696

1

2

1U_0402_6.3V4Z

C716

C715

C717

1

2

1U_0402_6.3V4Z

C871

C868

C867

1

2

2 1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V

C746

C745

1

2

1U_0402_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C697

1

2

1U_0402_6.3V4Z

C718

1

2

1U_0402_6.3V4Z

C870

1

2

1U_0402_6.3V4Z

C875

1

2

2 10U_0603_6.3V

10U_0603_6.3V

1U_0402_6.3V4Z

C698

1

2

(+VGA_CORE@9000mA +VDDC)

C720

C719

1

2

1U_0402_6.3V4Z

C866

C865

1

2

1U_0402_6.3V4Z

C874

10U_0603_6.3V

C747

1

2

+3VS

1U_0402_6.3V4Z

C700

C878

C699

1

2

1U_0402_6.3V4Z

C721

1

2

1U_0402_6.3V4Z

C864

1

2

C873

1

2

10U_0603_6.3V

C877

1

2

1 2

R521 150K_0402_5%R521 150K_0402_5%

2009/07/01 2010/07/01

C878

1

2

C722

1

2

1U_0402_6.3V4Z

C731

1

2

1U_0402_6.3V4Z

C872

1

2

(+VGA_CORE@2000mA +VDDCI)

1

2

10U_0603_6.3V

1

2

1U_0402_6.3V4Z

C723

C861

1

2

1U_0402_6.3V4Z

C732

C733

1

2

1U_0402_6.3V4Z

10U_0603_6.3V

C729

C730

1

2

10U_0603_6.3V

1 2

MCK2012221YZF 0805

C876

+3.3V_DELAY

SI2301BDS_SOT23

Compal Secret Data

+1.8VS

L62

+1.1VS

10U_0603_6.3V

C879

C701

1

2

1U_0402_6.3V4Z

C862

C863

1

2

1U_0402_6.3V4Z

C734

C736

1

2

10U_0603_6.3V

C735

1

2

L68

Q41

1 3

D

2

G

1

C755

0.1U_0402_10V6K

2

Deciphered Date

+VGA_CORE

1

+

C724

C724 330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

2

S

R520

G

2

100K_0402_5%

1 2

13

D

Q44

Q44 2N7002_SOT23-3

2N7002_SOT23-3

S

2

+3VS

U30E

AA27

PCIE_VSS#1

AB24

PCIE_VSS#2

AB32

PCIE_VSS#3

AC24

PCIE_VSS#4

AC26

PCIE_VSS#5

AC27

PCIE_VSS#6

AD25

PCIE_VSS#7

AD32

PCIE_VSS#8

AE27

PCIE_VSS#9

AF32

PCIE_VSS#10

AG27

PCIE_VSS#11

AH32

PCIE_VSS#12

K28

PCIE_VSS#13

K32

PCIE_VSS#14

L27

PCIE_VSS#15

M32

PCIE_VSS#16

N25

PCIE_VSS#17

N27

PCIE_VSS#18

P25

PCIE_VSS#19

P32

PCIE_VSS#20

R27

PCIE_VSS#21

T25

PCIE_VSS#22

T32

PCIE_VSS#23

U25

PCIE_VSS#24

U27

PCIE_VSS#25

V32

PCIE_VSS#26

W25

PCIE_VSS#27

W26

PCIE_VSS#28

W27

PCIE_VSS#29

Y25

PCIE_VSS#30

Y32

PCIE_VSS#31

M6

GND#56

N11

GND#57

N12

GND#58

N13

GND#59

N16

GND#60

N18 N21

P6

P9 R12 R15 R17 R20 T13 T16 T18 T21

T6 U15 U17 U20

U3

U9 V13 V16 V18

V6 Y10 Y15 Y17 Y20

Y6

Title

Size Document Number Rev

Date: Sheet

GND

GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87

216-0728018 A12 M92-S2 XT FCBGA 0FA

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55

A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6

A32 AM1 AM32

of

20 53Monday, September 28, 2009

of

20 53Monday, September 28, 2009

of

1

20 53Monday, September 28, 2009

A

5

U31

BA0

L2

BA0

BA1

L3

BA1

MAA12

R2

A12

MAA11

P7

A11

MAA10

M2

A10/AP

MAA9

P3

A9

MAA8

P8

A8

MAA7

P2

A7

MAA6

N7

D D

WEA#0

C C

+VRAM_REF1

4.99K_0402_1%

B B

R528

4.99K_0402_1%

C773

10U_0603_6.3V6M

A A

C799

10U_0603_6.3V6M

A6

MAA5

N3

A5

MAA4

N8

A4

MAA3

N2

A3

MAA2

M7

A2

MAA1

M3

A1

MAA0

M8

A0

CLKA0#

K8

CK

CLKA0

J8

CK

CKEA0

K2

CKE

CSA0#

L8

CS

K3

WE

RASA#0

K7

RAS

CASA#0

L7

CAS

DQMA#1

F3

LDM

DQMA#2

B3

UDM

ODTA0

K9

ODT

QSA1

F7

LDQS

QSA#1 QSA#3

E8

LDQS

QSA2 QSA0

B7

UDQS

QSA#2

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T256161BF-25

HYB18T256161BF-25 VRAM@

VRAM@

+1.8VS

R524

12

+1.8VS

10U_0603_6.3V6M

1

C774

2

+1.8VS

10U_0603_6.3V6M

1

C800

2

12

+VRAM_REF1

1

C769

2

0.1U_0402_16V4Z

1

C775

2

1U_0402_6.3V4Z

1

C801

2

1U_0402_6.3V4Z

5

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

B9 B1 D9 D1 D3 D7 C2

DQ9

C8

DQ8

F9

DQ7

F1

DQ6

H9

DQ5

H1

DQ4

H3

DQ3

H7

DQ2

G2

DQ1

G8

DQ0

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

0.1U_0402_16V4Z

1

C776

2

0.1U_0402_16V4Z

1

C802

2

MDA20 MDA21 MDA17 MDA23 MDA22 MDA19 MDA16 MDA18 MDA8 MDA10 MDA9 MDA15 MDA11 MDA12 MDA13 MDA14

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

2

4.99K_0402_1%

1

C777

2

0.1U_0402_16V4Z

1

C803

2

0.1U_0402_16V4Z

Group2

Group1

C761

4.99K_0402_1%

12

R529

0.1U_0402_16V4Z

1

C778

2

0.1U_0402_16V4Z

1

C804

2

+1.8VS +1.8VS

1

C762

2

1U_0402_6.3V4Z

+1.8VS

12

R525

+VRAM_REF2

1

C770

2

0.1U_0402_16V4Z

1

C779

2

0.1U_0402_16V4Z

1

C805

2

0.1U_0402_16V4Z

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

CLKA0# CLKA0

CKEA0

CSA0#

WEA#0 RASA#0 CASA#0

DQMA#3 DQMA#0

ODTA0

QSA3

QSA#0

+VRAM_REF2

BA2BA2

0.01U_0402_16V7K

1

C780

2

0.01U_0402_16V7K

1

C806

2

4

U32

U32 L2 L3

R2

P7

M2

P3 P8 P2

N7 N3 N8 N2 M7 M3 M8

K8 J8

K2

L8 K3 K7 L7 F3

B3

K9

F7 E8

B7 A8

J2 A2

E2 L1

R3 R7 R8

HYB18T256161BF-25

VRAM@

4.99K_0402_1%

4

BA0 BA1

A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

CK CK

CKE

CS WE RAS CAS LDM

UDM

ODT

LDQS LDQS

UDQS UDQS

VREF NC#A2

NC#E2 NC#L1 NC#R3 NC#R7 NC#R8

4.99K_0402_1%

12

R530

10U_0603_6.3V6M

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

+1.8VS +1.8VS

R526

10U_0603_6.3V6M

+1.8VS

C789

B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

12

+VRAM_REF3

1

C771

2

0.1U_0402_16V4Z

+1.8VS

C781

1

C790

2

MDA4 MDA6 MDA3 MDA0 MDA7 MDA2 MDA1 MDA30 MDA26 MDA29 MDA25 MDA24 MDA28 MDA27 MDA31

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

2

10U_0603_6.3V6M

1

C782

2

10U_0603_6.3V6M

1

C791

2

1U_0402_6.3V4Z

Group0

Group3

1

C764

C763

C764

2

1U_0402_6.3V4Z

4.99K_0402_1%

12

R531

4.99K_0402_1%

0.1U_0402_16V4Z

1

C783

C784

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C792

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MDA5

B9

3

12

R527

1

2

1

C785

2

1

C793

2

0.1U_0402_16V4Z

3

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

CLKA1# CLKA1

CKEA1

CSA1#

WEA#1 RASA#1 CASA#1

DQMA#4

ODTA1

QSA4 QSA#4

QSA5 QSA#5

+VRAM_REF3

BA2

+VRAM_REF4

C772

0.1U_0402_16V4Z

1

C786

2

0.1U_0402_16V4Z

1

C794

2

U33

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T256161BF-25

HYB18T256161BF-25 VRAM@

VRAM@

1

2

C795

0.1U_0402_16V4Z

2009/07/01 2010/07/01

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

1

C787

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C796

2

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSS1 VSS2 VSS3 VSS4 VSS5

C788

1

2

Compal Secret Data

MDA45

B9

MDA42

B1

MDA47

D9

MDA41

D1

MDA40

D3

MDA46

D7

MDA44

C2

MDA43

C8

MDA34

F9

MDA35

F1

MDA37

H9

MDA36

H1

MDA33

H3

MDA39

H7

MDA32

G2

MDA38

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

0.1U_0402_16V4Z

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

0.01U_0402_16V7K

1

2

Deciphered Date

Group5

Group4

+1.8VS

1

C765

2

1

2

CLKA1<19> CLKA1#<19>

2

+1.8VS

C766

C766 1U_0402_6.3V4Z

1U_0402_6.3V4Z

56_0402_5%

ODTA1<19> CKEA1<19> RASA#1<19> CASA#1<19> WEA#1<19> CSA1#<19>

R532

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

CLKA1# CLKA1

CKEA1

CSA1#

WEA#1 RASA#1 CASA#1

DQMA#7

DQMA#6DQMA#5

ODTA1

QSA7 QSA#7

QSA6 QSA#6

+VRAM_REF4

BA2

12

1

C797

C797 470P_0402_50V7K

470P_0402_50V7K

2

1

U34

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T256161BF-25

HYB18T256161BF-25 VRAM@

VRAM@

ODTA1

CKEA1 RASA#1 CASA#1

WEA#1

CSA1#

CLKA1 CLKA1#

R533

R533 56_0402_5%

56_0402_5%

Title

Size Document Number Rev

Date: Sheet

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

CLKA0<19> CLKA0#<19>

Compal Electronics, Inc.

401817

MDA48

B9

MDA53

B1

MDA49

D9

MDA55

D1

MDA52

D3

MDA50

D7

MDA54

C2

MDA51

C8

MDA60

F9

MDA61

F1

MDA56

H9

MDA62

H1

MDA58

H3

MDA57

H7

MDA59

G2

MDA63

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

0.1U_0402_16V4Z

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

BA[2..0]<19>

QSA[7..0]<19>

QSA#[7..0]<19>

DQMA#[7..0]<19>

MAA[12..0]<19>

MDA[63..0]<19>

ODTA0<19> CKEA0<19> RASA#0<19> CASA#0<19> WEA#0<19> CSA0#<19>

R534

56_0402_5%

SCHEMATIC,MB A4853

1

2

C767

Group6

Group7

DQMA#[7..0]

12

1

C798

C798 470P_0402_50V7K

470P_0402_50V7K

2

21 53Monday, September 28, 2009

+1.8VS

1

C768

2

1U_0402_6.3V4Z

BA[2..0] QSA[7..0] QSA#[7..0]

MAA[12..0]

MDA[63..0]

R535

R535 56_0402_5%

56_0402_5%

of

ODTA0

CKEA0 RASA#0 CASA#0

WEA#0

CSA0#

CLKA0 CLKA0#

+1.8VS

A

5

4

3

2

1

CONFIGURATION STRAPS

STRAPS

R548

R548 10K_0402_5%

10K_0402_5%

12

R549

R549 10K_0402_5%

10K_0402_5%

2N7002DW-T/R7_SOT363-6

C807

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2 SOUT_GPIO8

GPU_GPIO9 GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

9/1 For PVT

+3.3V_DELAY

2

6 1

Q45A

2N7002DW-T/R7_SOT363-6

+3.3V_DELAY

2

1

3

1 2 3

GPU_GPIO0<18> GPU_GPIO1<18> GPU_GPIO2<18> SOUT_GPIO8<18>

D D

C C

GPU_GPIO9<18> GPU_GPIO11<18> GPU_GPIO12<18> GPU_GPIO13<18>

VGA_CRT_VSYNC<18,24> VGA_CRT_HSYNC<18,24>

VSYNC_DAC2<18> HSYNC_DAC2<18>

EC_SMB_CK2_PX

EC_SMB_DA2_PX

+3.3V_DELAY

12

VGA Thermal Sensor

0.1U_0402_16V4Z

GPU_THERMAL_D+<18>

B B

GPU_THERMAL_D-<18>

C808 2200P_0402_50V7KC808 2200P_0402_50V7K

1 2

R536 10K_0402_5%R536 10K_0402_5% R537 10K_0402_5%R537 10K_0402_5% R538 10K_0402_5%R538 10K_0402_5% R539 10K_0402_5%@R539 10K_0402_5%@

R540 10K_0402_5%@R540 10K_0402_5%@ R541 10K_0402_5%R541 10K_0402_5% R542 10K_0402_5%@R542 10K_0402_5%@ R543 10K_0402_5%@R543 10K_0402_5%@

R544 10K_0402_5%@R544 10K_0402_5%@ R545 10K_0402_5%@R545 10K_0402_5%@ R546 10K_0402_5%@R546 10K_0402_5%@ R547 10K_0402_5%@R547 10K_0402_5%@

GPIO5_AC_BATT TEST

5

4

Q45B

Closed to GPU

U35

VCC DXP DXN THERM4GND

G781-1_SOP8

SMBCLK

SMBDATA

ALERT

8 7 6 5

12 12 12 12

EC_SMB_CK2 <4,35>

EC_SMB_DA2 <4,35>

+3.3V_DELAY

VSYNC_DAC1 and HSYNC_DAC1 pull up to HDMI & DISPLAYPORT AUDIO funciton

EC_SMB_CK2_PX EC_SMB_DA2_PX

THM_ALERT# <18>

+3.3V_DELAY

1 2

R550 4.7K_0402_5%R550 4.7K_0402_5%

VRAM_ID0=VRAM_ID0_0 VRAM_ID1=VRAM_ID1_1 VRAM_ID2=VRAM_ID2_2 VRAM_ID3=VRAM_ID3_3

Change to SA007810210

Address 1001 101X b

R551 10K_0402_5%@R551 10K_0402_5%@

R589 10K_0402_5%@R589 10K_0402_5%@

12

+1.8VS

12

VRAM_ID0 <18> VRAM_ID1 <18>

R552 10K_0402_5%@R552 10K_0402_5%@

R590 10K_0402_5%@R590 10K_0402_5%@

12

+1.8VS

12

VRAM_ID[3:0]

DVPDATA (3,2,1,0)

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED

BIF_GEN2_EN_A

BIF_CLK_PM_EN

BIF_RX_PLL_CALIB_BP

BIOS_ROM_EN

VIP_DEVICE_STRAP_ENA V2SYNC

SMS_EN_HARD

AUD[1]

GPIO2

GPIO8

GPIO9 VGA ENABLEDBIF_VGA DIS

GPIO21

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

H2SYNC

GENERICC 0CCBYPASS

HSYNC VSYNCAUD[0]

DESCRIPTION OF DEFAULT SETTINGSPIN

PCIE GNE2 ENABLED

BIF_CLK_PM_EN 0

BIF_RX_PLL_CALIB_BP

ENABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT IGNORE VIP DEVICE STRAPS

AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPort and HDMI if dongle is detected 1 0 Audio for DisplayPort only 1 1 Audio for both DisplayPort and HDMI

AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

GENERICC

H2SYNC

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

GPIO21_BB_EN

Vendor Part Number#STRAPS

Compal Part Number#

Hynix 32Mx16 1.8V SA00002DL10 Hynix 64Mx16 1.8V ATI 64Mx16 1.8V Samsung 64Mx16 1.8V (E-die) 0 1 0 0512MB(x4)

SA00003LT10 SA000031O10

GPU VRAM size

ProjectPIN

M92 S2-XT

GPIO_28_TDO

256MB(x4) 512MB(x4) SA00002UH20 512MB(x4)

RECOMMENDED SETTINGS

1

0 0

1

010

0

X X

VRAM_ID 3,2,1,0

1 0 0 0 0 0 0 1 0 0 1 0

12

R553 10K_0402_5%@R553 10K_0402_5%@

A A

R591 10K_0402_5%@R591 10K_0402_5%@

5

+1.8VS

12

VRAM_ID2 <18> VRAM_ID3 <18>

R554 10K_0402_5%@R554 10K_0402_5%@

R592 10K_0402_5%@R592 10K_0402_5%@

12

+1.8VS

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

1

A

of

22 53Monday, September 28, 2009

of

22 53Monday, September 28, 2009

of

22 53Monday, September 28, 2009

5

4

3

2

1

LCD POWER CIRCUIT

D D

+LCDVDD

12

R415

R415 300_0603_5%

300_0603_5%

3

Q36B

2N7002DW-T/R7_SOT363-6

VGA_ENVDD<18>

C C

+INVPWR_B+

L24

FBMA-L11-201209-221LMA30T_0805

W=40mils

C489

680P_0402_50V7K

B B

FBMA-L11-201209-221LMA30T_0805

L23

FBMA-L11-201209-221LMA30T_0805

1

C490

C490 68P_0402_50V8J

68P_0402_50V8J

2

4

1 2

R408 0_0402_5%

R407

100K_0402_5%

PVT2 for 8/24

12

LCD/PANEL BD. Conn.

+3V

12

R414

R414 100K_0402_5%

100K_0402_5%

5

2

12

@R407

@

BKOFF#<35>

B+

R413 1K_0402_5% R413 1K_0402_5%

61

Q36A

Q36A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

BKOFF#

12

1

C491

0.047U_0402_16V7K

0.047U_0402_16V7K 2

R613 0_0402_5%R613 0_0402_5%

1 2

D20

21

@

CH751H-40PT_SOD323-2

+3VS

@

2

12

+3VS

S

G

D

1 3

1

C494

4.7U_0805_10V4Z

4.7U_0805_10V4Z 2

R411

4.7K_0402_5%

4.7K_0402_5% DISPOFF#

W=60mils

Q37

Q37 AO3413_SOT23-3

AO3413_SOT23-3

+LCDVDD

1

C495

4.7U_0805_10V4Z

2

W=60mils

1

C493

0.1U_0402_16V4Z

2

DAC_BRIG INVTPWM DISPOFF#

1 2

C484 220P_0402_50V7K C484 220P_0402_50V7K

1 2

C486 220P_0402_50V7K C486 220P_0402_50V7K

1 2

C487 220P_0402_50V7K C487 220P_0402_50V7K

JLVDS1

GND42GND

+INVPWR_B+

+3VS

VGA_LCD_CLK<18>

VGA_LCD_DATA<18>

VGA_TZOUT0-<18> VGA_TZOUT0+<18>

VGA_TZOUT1+<18> VGA_TZOUT1-<18>

VGA_TZOUT2+<18> VGA_TZOUT2-<18>

VGA_TZCLK-<18> VGA_TZCLK+<18>

USB20_N3<27> USB20_P3<27>

A A

5

VGA_LCD_CLK VGA_LCD_DATA

VGA_TZOUT0VGA_TZOUT0+

VGA_TZOUT1+ VGA_TZOUT1-

VGA_TZOUT2+ VGA_TZOUT2-

VGA_TZCLKVGA_TZCLK+

40

38

36

34

32

30

28

26

24

22

20

18

16

14

12

10

8

6

4

2

ACES_88242-4001

ACES_88242-4001 CONN@

CONN@

39 37 35 33 31 29 27 25 23 21 19 17 15 13 11

9 7 5 3 1

DAC_BRIG

41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1

4

INVTPWM

DISPOFF#

VGA_TXOUT0VGA_TXOUT0+

VGA_TXOUT1VGA_TXOUT1+

VGA_TXOUT2+ VGA_TXOUT2-

VGA_TXCLKVGA_TXCLK+

DAC_BRIG <35>

R410 0_0402_5%R410 0_0402_5%

1 2

+LCDVDD

W=60mils

VGA_TXOUT0- <18> VGA_TXOUT0+ <18>

VGA_TXOUT1- <18> VGA_TXOUT1+ <18>

VGA_TXOUT2+ <18> VGA_TXOUT2- <18>

VGA_TXCLK- <18> VGA_TXCLK+ <18>

+3VS

INVT_PWM <35>

+LCDVDD

1

C492

C492 10U_0805_10V4Z

10U_0805_10V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C488

0.1U_0402_16V4Z

2

Compal Secret Data

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

1

of

23 53Monday, September 28, 2009

A

B

C

D

E

D26

1

2

3

C559

@

8P_0402_50V8J

1 2

L4 0_0603_5%L4 0_0603_5%

1 2

L3 0_0603_5%L3 0_0603_5%

D26 DAN217_SC59

DAN217_SC59

1

2

D27

D27 DAN217_SC59

DAN217_SC59

CRT Connector

1 2

12

+3VS

C560

8P_0402_50V8J

1

2

1 1

VGA_CRT_R<18>

VGA_CRT_G<18>

VGA_CRT_B<18>

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

12

R464

150_0402_1%

12

R443

150_0402_1%

12

R442

150_0402_1%

1

C534

C547

2

3.3P_0402_50V8J

1

C532

2

3.3P_0402_50V8J

1 2

L42 FCM2012C-800_0805

1 2

L31 FCM2012C-800_0805

1 2

L30 FCM2012C-800_0805

1

2

1

C546

2

8P_0402_50V8J

CRT_R_1

CRT_G_1

CRT_B_1

1

C535

2

8P_0402_50V8J

L41 FCM2012C-800_0805

L40 FCM2012C-800_0805

L39 FCM2012C-800_0805

1

C533

2

8P_0402_50V8J

Change 3.3p For M92 Change 8p For M92

+CRT_VCC

1 2

C88 0.1U_0402_16V4Z

2 2

VGA_CRT_HSYNC<18,22>

R47 0_0402_5%R47 0_0402_5%

1 2

VGA_CRT_VSYNC<18,22>

R30 0_0402_5%R30 0_0402_5%

1 2

CRT_HSYNC

1

5

U4

P

4

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

1 2

C75 0.1U_0402_16V4Z

+CRT_VCC

CRT_VSYNC CRT_VSYNC_1

For HM51

R40 10K_0402_5%

CRT_HSYNC_1

1

5

U3

P

4

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

2

@

1

3

C558

8P_0402_50V8J

D25

D25 DAN217_SC59

DAN217_SC59

1

2

3

CRT_R_2

CRT_G_2

CRT_B_2

1

@

2

CRT_HSYNC_2

CRT_VSYNC_2

1

C89

@C89

@

10P_0402_50V8J

2

+CRT_VCC

+5VS

1

C76

C76 @

@ 10P_0402_50V8J

10P_0402_50V8J

2

For HM51

W=40mils

D4

2 1

RB491D_SC59-3

1

C557

2

100P_0402_50V8J

F1

1.1A_6VDC_FUSE

0.1U_0402_16V4Z

1

2

C101

68P_0402_50V8J

21

C12

1

2

+3.3V_DELAY

W=40mils

1

2

DDCDATA

DDCCLK

C62

C62 68P_0402_50V8J

68P_0402_50V8J

+CRT_VCC+R_CRT_VCC

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4

10

16

15

17

5

SUYIN_070549FR015S208CR

SUYIN_070549FR015S208CR CONN@

CONN@

CRT_DET# <27>

R463

R463 100K_0402_5%

100K_0402_5%

1 2

+CRT_VCC

For HM51

Place closed to chipset

12

R29

Q6

Q6 2N7002_SOT23

2N7002_SOT23

+3.3V_DELAY

2

G

1 3

D

Q4

Q4 2N7002_SOT23

2N7002_SOT23

S

2

1 3

D

12

R582

R581

10K_0402_5%

G

S

R582 10K_0402_5%

10K_0402_5%

VGA_CRT_DATA <18>

VGA_CRT_CLK <18>

12

R50

2.2K_0402_5%

For HM51

2.2K_0402_5%

DDCDATA

DDCCLK

3 3

2.2K_0402_5%

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

of

24 53Monday, September 28, 2009

E

5

4

3

2

1

+3VS

RP4

1 8 2 7

+3VS

3 6 4 5

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5% RP20

RP20

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

RP29

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5% RP31

RP31

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5% RP11

RP11

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

D D

C C

PCI_DEVSEL# PCI_FRAME# PCI_REQ#1 PCI_REQ#2

PCI_PLOCK# PCI_IRDY# PCI_PERR# PCI_PIRQB#

PCI_PIRQG# PCI_PIRQE# PCI_REQ#0 PCI_PIRQH#

PCI_PIRQF# PCI_SERR# PCI_PIRQA# PCI_PIRQC#

PCI_STOP# PCI_PIRQD# PCI_REQ#3 PCI_TRDY#

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

U11B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9-M ES_FCBGA676

PCI

REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

PCIRST#

DEVSEL#

FRAME#

PLTRST#

Interrupt I/F

PIRQE#/GPIO2

PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

REQ0# GNT0#

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PERR#

PLOCK#

SERR#

STOP# TRDY#

PCICLK

PME#

F1 G4 B6 A7 F13 F12 E6 F6

D8 B4 D6 A5

D3 E3 R1 C6 E4 C2 J4 A4 F5 D7

C14 D4 R2

H4 K6 F2 G2

PCI_REQ#0 PCI_GNT#0 PCI_REQ#1 PCI_GNT#1 PCI_REQ#2 PCI_GNT#2 PCI_REQ#3 PCI_GNT#3

PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3

PCI_IRDY# PCI_PAR

PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY#

PCI_FRAME#

PLT_RST# CLK_PCI_ICH

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_GNT#1

@

@ @

@

@ @

@

Remove PCIRST# For HM51

DMI for ESI-compatible operation

Low= DMI for ESI-compatible operation High= Default* (Internal pull-up)

PAD

T12

PAD

T9

PAD

T11

PAD

T15

PAD

T13

PAD

T14

PAD

T16

Place closely pin B10

CLK_PCI_ICH

PLT_RST# <8,17,31,35> CLK_PCI_ICH <16>

10_0402_5%

10P_0402_50V8J

R132

@

C194

1 2 1

@

2

A16 Swap Override Strap

PCI_GNT#3

Low= A16 swap override Enable High= Default*

R123 1K_0402_5%

B B

1 2

@

Boot BIOS Strap

PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction

0

11

R124 1K_0402_5%

R131 1K_0402_5%

A A

1 SPI 01

1 2

@

PCI_GNT#3

PCI LPC*

PCI_GNT#0

SPI_CS#1 <27>

PLT_RST#

NC7SZ08P5X_NL_SC70-5

PVT2 8/24

NC7SZ08P5X_NL_SC70-5

U8

@ U8

@

2 1

U41

@ U41

@

2 1

B A

+3VS

R614

5

P

G

3

5

P

G

3

12

0_0402_5%

4

Y

4

Y

12

R83

R83 100K_0402_5%

100K_0402_5% @

@

12

R580

@ R580

@

100K_0402_5%

R579 100_0402_5%@R579 100_0402_5%@

PLT_RST_BUF# <33>

12

PLTRST_VGA# <17>

For M92

Pre-MP 9/17

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

of

25 53Monday, September 28, 2009

of

25 53Monday, September 28, 2009

of

25 53Monday, September 28, 2009

1

5

+RTCVCC

12

R113

R113 1M_0402_5%

1M_0402_5%

SM_INTRUDER#

D D

C C

B B

+RTCVCC

12

R112

R112 332K_0402_1%

332K_0402_1%

ICH_INTVRMEN

+3VS

12

R214

R214 10K_0402_5%

10K_0402_5%

+3V

12

R117

@ R117

@

10K_0402_5%

PROJECT_ID2

12

R118

R118 10K_0402_5%

10K_0402_5%

+RTCVCC

SATA_LED#

HDA_BITCLK_AUDIO<38>

HDA_SYNC_AUDIO<38> HDA_RST_AUDIO#<38>

HDA_SDOUT_AUDIO<38>

32.768KHZ_12.5P_MC-306

1 2

R89

R89 20K_0402_5%

20K_0402_5%

1 2

J1 10K_0603_5%

10K_0603_5%

C129

1U_0603_10V6K

1 2

15 HDD

1 2

R242 33_0402_5%R242 33_0402_5%

1 2

R251 33_0402_5%R251 33_0402_5%

1 2

R241 33_0402_5%R241 33_0402_5%

1 2

R247 33_0402_5%R247 33_0402_5%

Pre-MP 9/17

+RTCVCC

@J1

@

+1.5VS_PCIE_ICH

SATA_DTX_C_IRX_N0<29> SATA_DTX_C_IRX_P0<29>

SATA_DTX_C_IRX_N1<29> SATA_DTX_C_IRX_P1<29>

HDA_BITCLK_ICH HDA_SYNC_ICH HDA_RST_ICH# HDA_SDOUT_ICH

15P_0402_50V8J

3 2

15P_0402_50V8J

4

C164

X1

4 1

IN

ICH_RTCX1

ICH_RTCX2

@J2

@

HDA_SDOUT_ICH

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0 SATA_ITX_DRX_P0

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1 SATA_ITX_DRX_N1 SATA_ITX_DRX_P1

12

OUT

NC NC

C163

12

1 2

R90

R90 20K_0402_5%

20K_0402_5%

1 2

J2 10K_0603_5%

10K_0603_5%

C136

1U_0603_10V6K

1 2

R129 24.9_0402_1%R129 24.9_0402_1%

HDA_SDIN0<38>

SATA_LED#<36>

3

12

R130

10M_0402_5%

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

ICH_INTVRMEN

PROJECT_ID2 GLAN_COMP EC_KBRST# HDA_BITCLK_ICH HDA_SYNC_ICH HDA_RST_ICH#

SATA_LED#

SATA_ITX_DRX_N0 SATA_ITX_DRX_P0 SATA_ITX_C_DRX_P0

SATA_ITX_DRX_N1 SATA_ITX_DRX_P1 SATA_ITX_C_DRX_P1_15

U11A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FCBGA676

C307 0.01U_0402_16V7KC307 0.01U_0402_16V7K C306 0.01U_0402_16V7KC306 0.01U_0402_16V7K

C397 0.01U_0402_16V7KC397 0.01U_0402_16V7K C398 0.01U_0402_16V7KC398 0.01U_0402_16V7K

1 2 1 2

RTC

LPCCPU

LAN / GLAN

IHDA

SATA

SATA_ITX_C_DRX_N0

SATA_ITX_C_DRX_N1_15

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#

INTR

RCIN#

NMI

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

SATA_ITX_C_DRX_N0 <29> SATA_ITX_C_DRX_P0 <29>

SATA_ITX_C_DRX_N1_15 <29> SATA_ITX_C_DRX_P1_15 <29>

LPC_AD0

K5

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3 J3

J1

EC_GA20

N7

H_A20M#

AJ27 AJ25

AE23

FERR# H_FERR#

AJ26

H_PWRGOOD

AD22

H_IGNNE#

AF25

H_INIT#

AE22

H_INTR

AG25 L3

H_NMI

AF23

H_SMI#

AF24

H_STPCLK#

AH27

THRMTRIP_ICH#

AG26 AG27

AH11 AJ11

Remove 17 HDD For HM51

AG12 AF12

AH9 AJ9 AE10 AF10

CLK_PCIE_SATA#

AH18

CLK_PCIE_SATA

AJ18

SATARBIAS

AJ7 AH7

close Con. sdie

2

LPC_AD0 <35> LPC_AD1 <35> LPC_AD2 <35> LPC_AD3 <35>

LPC_FRAME# <35>

R169 10K_0402_5%R169 10K_0402_5%

R207 0_0402_5%R207 0_0402_5% R210 0_0402_5%R210 0_0402_5%

R206 56_0402_5%R206 56_0402_5%

12

EC_GA20 <35> H_A20M# <4>

1 2 1 2

1 2

H_PWRGOOD <5> H_IGNNE# <4> H_INIT# <4>

H_INTR <4>

H_NMI <4> H_SMI# <4>

H_STPCLK# <4>

R205 54.9_0402_1%R205 54.9_0402_1%

1 2

CLK_PCIE_SATA# <16>

CLK_PCIE_SATA <16>

R215 24.9_0402_1%R215 24.9_0402_1%

1 2

15 ODD

1

+1.05VS

H_DPRSTP#

R231 56_0402_5%@R231 56_0402_5%@

H_DPSLP#

R233 56_0402_5%@R233 56_0402_5%@

+3VS

H_DPRSTP#DPRSTP# H_DPSLP#DPSLP#

+1.05VS

H_DPRSTP# <5,8,47> H_DPSLP# <5>

12

R230 56_0402_5%R230 56_0402_5%

12

R146 10K_0402_5%R146 10K_0402_5%

H_THERMTRIP#

12

R204 56_0402_5%R204 56_0402_5%

+RTCVCC

1

C435

0.1U_0402_16V4Z

2

R203

330_0402_5%@

1 2

H_THERMTRIP#

12 12

H_FERR# <4>

+1.05VS

+3VS

EC_KBRST# <35>

H_THERMTRIP# <4,8>

+1.05VS

+RTCBATT

1 2 1

D19

3

BAS40-04_SOT23-3

1

C

Q12

2

B

E

2SC2411K_SOT23

3

@

R382

R382 1K_0402_5%

1K_0402_5%

2

+CHGRTC

MAINPWON <42,43>

A A

+VCC_HDA_ICH

R248

1K_0402_5%

@

HDA_SDOUT_ICH

5

R92

1K_0402_5%

@

ICH_TP3 <27>

4

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

26 53Monday, September 28, 2009

of

1

of

A

5

+3VS

1 2

R151 10K_0402_5%R151 10K_0402_5%

1 2

R147 8.2K_0402_5%R147 8.2K_0402_5%

1 2

R209 8.2K_0402_5%R209 8.2K_0402_5%

1 2

R81 10K_0402_5%@R81 10K_0402_5%@

1 2

R95 10K_0402_5%@R95 10K_0402_5%@

1 2

+3V

R168 1K_0402_5%@R168 1K_0402_5%@

1 2

R238 10K_0402_5%R238 10K_0402_5%

1 2

R595 10K_0402_5%@R595 10K_0402_5%@

1 2

R596 10K_0402_5%@R596 10K_0402_5%@

1 2

R258 10K_0402_5%@R258 10K_0402_5%@

1 2

R145 10K_0402_5%@R145 10K_0402_5%@

1 2

R213 10K_0402_5%@R213 10K_0402_5%@

1 2

R166 10K_0402_5%R166 10K_0402_5%

1 2

R257 10K_0402_5%@R257 10K_0402_5%@

1 2

R235 10K_0402_5%@R235 10K_0402_5%@

1 2

R212 10K_0402_5%R212 10K_0402_5%

1 2

R597 10K_0402_5%R597 10K_0402_5%

1 2

R97 2.2K_0402_5%R97 2.2K_0402_5%

1 2

R98 2.2K_0402_5%R98 2.2K_0402_5%

1 2

R256 10K_0402_5%R256 10K_0402_5%

1 2

R93 10K_0402_5%R93 10K_0402_5%

1 2

R91 10K_0402_5%R91 10K_0402_5%

1 2

R79 10K_0402_5%R79 10K_0402_5%

1 2

R127 10K_0402_5%R127 10K_0402_5%

1 2

R229 1K_0402_5%R229 1K_0402_5%

1 2

R82 8.2K_0402_5%R82 8.2K_0402_5%

1 2

R94 10K_0402_5%R94 10K_0402_5%

1 2

R78 10K_0402_5%R78 10K_0402_5%

1 2

R120 10K_0402_5%@R120 10K_0402_5%@

1 2

R588 10K_0402_5%R588 10K_0402_5%

1 2

R237 10K_0402_5%@R237 10K_0402_5%@

1 2

R236 10K_0402_5%R236 10K_0402_5%

1 2

R232 10K_0402_5%@R232 10K_0402_5%@

1 2

R148 100K_0402_5%R148 100K_0402_5%

1 2

R208 1K_0402_5%@R208 1K_0402_5%@

PD just for ES1 sample

1 2

R149 10K_0402_5%R149 10K_0402_5%

1 2

R167 10K_0402_5%R167 10K_0402_5%

RP33

RP33 1 8 2 7 3 6 4 5

10K_1206_8P4R_5%

RP32

RP32 1 8 2 7 3 6 4 5

10K_1206_8P4R_5%

D D

C C

B B

A A

SERIRQ PM_CLKRUN# EC_THERM# H_STP_PCI# H_STP_CPU# SB_SPKR OCP#

ICH_GPIO22 ICH_GPIO7 ICH_GPIO17 ICH_GPIO18 ICH_GPIO20 SATA_CLKREQ# ICH_GPIO38 ICH_GPIO39 ICH_GPIO48

ICH_GPIO13

ICH_SMBCLK ICH_SMBDATA EC_SWI# ICH_SMLINK0 ICH_SMLINK1 LINKALERT# XDP_DBRESET#

ICH_PCIE_WAKE#

PM_BATLOW# EC_LID_OUT# ICH_GPIO10 S4_STATE# PROJECT_ID1

PROJECT_ID0

PROJECT_ID1 PM_DPRSLPVR ICH_GPIO49

USB_OC#1 USB_OC#4

USB_OC#5 USB_OC#9 USB_OC#8 USB_OC#11

USB_OC#10 USB_OC#3 USB_OC#7 USB_OC#2

ICH_SMBCLK<16,33>

ICH_SMBDATA<16,33>

EC_SWI#<35>

XDP_DBRESET#<4>

PM_SYNC#<8>

EC_LID_OUT#<35>

H_STP_PCI#<16>

H_STP_CPU#<16>

PM_CLKRUN#<35>

ICH_PCIE_WAKE#<33>

SERIRQ<35>

EC_THERM#<35>

EC_SMI#<35>

VR_ON VGATE

EC_SCI#<35>

T10

T10 T5

T5

SATA_CLKREQ#<16>

SB_SPKR<38>

MCH_ICH_SYNC#<8>

ICH_TP3<26>

+3VS

5

2

B

1

A

3

Remove CP_PE# For HM51

+3V

12

R119

R119 10K_0402_5%

10K_0402_5% @

@

ICH_GPIO57

12

R121

R121 100K_0402_5%

100K_0402_5%

VR_ON<35,37,47> VGATE<8,16,47>

For MINI_CARD1

For HM51

For PCIE LAN

High: CRT Plugged

CRT_DET

CRT_DET#<24>

2N7002_SOT23

Project_ID0 Project_ID1 Project_ID2

NAWF2 0 1 0

P

G

PCIE_PTX_C_IRX_N2<33> PCIE_PTX_C_IRX_P2<33>

PCIE_ITX_C_PRX_N2<33>

PCIE_ITX_C_PRX_P2<33> PCIE_PTX_C_IRX_N3<31>

PCIE_PTX_C_IRX_P3<31>

PCIE_ITX_C_PRX_N3<31>

PCIE_ITX_C_PRX_P3<31>

Internal TPM Strap

SPI_MOSI

Low= Disable* High= iTPM enable by MCH strap

5

GPIO49

4

ICH_SMBCLK ICH_SMBDATA LINKALERT# ICH_SMLINK0 ICH_SMLINK1

EC_SWI#

SUS_STAT#

@

PAD

T20

T3

PAD

PAD PAD

PAD

T22

T22 T23

T23 T21

T21

U36

Y

NC7SZ08P5X_NL_SC70-5

Q11

2

G

PAD

@

@ @

@

PAD

PAD PAD

PAD

ICH_VGATE

4

+3VS

ICH_VGATE

@

R211

R211 10K_0402_5%

10K_0402_5% 1 2 13

D

S

XDP_DBRESET# PM_SYNC# EC_LID_OUT# H_STP_PCI#

H_STP_CPU# PM_CLKRUN# ICH_PCIE_WAKE#

SERIRQ EC_THERM#

OCP# CRT_DET ICH_GPIO7 EC_SMI#

ICH_GPIO13 ICH_GPIO17 ICH_GPIO18 ICH_GPIO20 ICH_GPIO22 ICH_GPIO27 ICH_GPIO28 SATA_CLKREQ# ICH_GPIO38 ICH_GPIO39 ICH_GPIO48 ICH_GPIO49 ICH_GPIO57

@

@ @

@

ICH_TP11

SB_SPKR

ICH_TP8 ICH_TP9 ICH_TP10

C238 0.1U_0402_16V7KC238 0.1U_0402_16V7K C239 0.1U_0402_16V7KC239 0.1U_0402_16V7K

C237 0.1U_0402_16V7KC237 0.1U_0402_16V7K C220 0.1U_0402_16V7KC220 0.1U_0402_16V7K

DMI Termination Voltage

Low= Desktop used High= Mobile* (Internal pull-up)

4

U11C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9-M ES_FCBGA676

SMB

Remove Express Card For HM51

PCIE_PTX_C_IRX_N2

PCIE_PTX_C_IRX_P2 12 12

12 12

SPI_CS#1<25>

USB_OC#0<34>

USB_OC#6<34>

R197

22.6_0402_1%

PCIE_ITX_PRX_N2 PCIE_ITX_PRX_P2

PCIE_PTX_C_IRX_N3

PCIE_PTX_C_IRX_P3

PCIE_ITX_PRX_N3 PCIE_ITX_PRX_P3

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USBRBIAS

12

Within 500 mils

3

PROJECT_ID1

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS / GPIOGPIOMISC

Power MGT

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

Controller Link

U11D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9-M ES_FCBGA676

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

AH23

PROJECT_ID0

AF19

R234 10K_0402_5%R234 10K_0402_5%

AE21 AD20

H1

CLK14

AF3

CLK48

P1

SUSCLK

C16

SLP_S3#

E16

SLP_S4#

G17

SLP_S5#

C10 G20

PWROK

M2 B13

BATLOW#

R3

PWRBTN#

D20

LAN_RST#

D22

RSMRST#

R5

CK_PWRGD

R6

CLPWROK

B16

SLP_M#

F24

CL_CLK0

B19

CL_CLK1

F22

CL_DATA0

C19

CL_DATA1

C25

CL_VREF0

A19

CL_VREF1

F21

CL_RST0#

D18

CL_RST1#

A16 C18 C11 C20

PCI - Express

SPI

USB

2009/07/01 2010/07/01

1 2

CLK_ICH_14M CLK_ICH_48M

SUS_CLK PM_SLP_S3#

PM_SLP_S4# PM_SLP_S5#

S4_STATE# ICH_PWROK DPRSLPVR PM_BATLOW# PBTN_OUT# LAN_RST# SB_RSMRST#

CK_PWRGD

ICH_PWROK PM_SLP_M#

CL_VREF0_ICH CL_VREF1_ICH

ICH_GPIO24 ICH_GPIO10 ICH_ACIN ICH_GPIO9

DMI0RXN DMI0RXP

DMI0TXN DMI0TXP

DMI1RXN DMI1RXP

DMI1TXN DMI1TXP

DMI2RXN DMI2RXP

DMI2TXN DMI2TXP

DMI3RXN DMI3RXP

DMI3TXN DMI3TXP

DMI_CLKN DMI_CLKP

DMI_ZCOMP

Direct Media Interface

DMI_IRCOMP

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

PAD

T19

@

1 2

R150 0_0402_5%R150 0_0402_5%

1 2

R80 10K_0402_5%R80 10K_0402_5%

PAD

T7

@

PAD

T8

@

PAD

T4

DMI_MTX_IRX_N0

V27

DMI_MTX_IRX_P0

V26

DMI_ITX_MRX_N0

U29

DMI_ITX_MRX_P0

U28

DMI_MTX_IRX_N1

Y27

DMI_MTX_IRX_P1

Y26

DMI_ITX_MRX_N1

W29

DMI_ITX_MRX_P1

W28

DMI_MTX_IRX_N2

AB27

DMI_MTX_IRX_P2

AB26

DMI_ITX_MRX_N2

AA29

DMI_ITX_MRX_P2

AA28

DMI_MTX_IRX_N3

AD27

DMI_MTX_IRX_P3

AD26

DMI_ITX_MRX_N3

AC29

DMI_ITX_MRX_P3

AC28

CLK_PCIE_ICH#

T26

CLK_PCIE_ICH

T25 AF29

DMI_IRCOMP

AF28

USB20_N0

AC5

USB20_P0

AC4 AD3 AD2 AC1 AC2

USB20_N3

AA5

USB20_P3

AA4

USB20_N4

AB2

USB20_P4

AB3 AA1

Remove New Card For HM51

AA2

USB20_N6

W5

USB20_P6

W4 Y3 Y2 W1

Remove Bluetooth For HM51

W2 V2 V3

USB20_N10

U5

USB20_P10

U4 U1 U2

Compal Secret Data

Deciphered Date

2

CLK_ICH_14M <16> CLK_ICH_48M <16>

PM_SLP_S3# <35> PM_SLP_S4# <35,37> PM_SLP_S5# <35>

ICH_PWROK <8>

PBTN_OUT# <35>

CK_PWRGD <16>OCP#<4>

CL_CLK0 <8>

CL_DATA0 <8>

CL_RST#0 <8>

PM_DPRSLPVR <8,47>

12

R99 100K_0402_5%R99 100K_0402_5%

2 1

D9

D9 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

DMI_MTX_IRX_N0 <8> DMI_MTX_IRX_P0 <8> DMI_ITX_MRX_N0 <8> DMI_ITX_MRX_P0 <8>

DMI_MTX_IRX_N1 <8> DMI_MTX_IRX_P1 <8> DMI_ITX_MRX_N1 <8> DMI_ITX_MRX_P1 <8>

DMI_MTX_IRX_N2 <8> DMI_MTX_IRX_P2 <8> DMI_ITX_MRX_N2 <8> DMI_ITX_MRX_P2 <8>

DMI_MTX_IRX_N3 <8> DMI_MTX_IRX_P3 <8> DMI_ITX_MRX_N3 <8> DMI_ITX_MRX_P3 <8>

R196 24.9_0402_1%R196 24.9_0402_1%

1 2

No Reboot Strap

SB_SPKR

2

No used Integrated LAN, connecting LAN_RST# to GND

+3V

ACIN <18,35,40,41,44>

CLK_PCIE_ICH# <16> CLK_PCIE_ICH <16>

Within 500 mils

USB20_N0 <34> USB20_P0 <34>

USB20_N3 <23> USB20_P3 <23> USB20_N4 <30> USB20_P4 <30>

USB20_N6 <34> USB20_P6 <34>

USB20_N10 <33> USB20_P10 <33>

Low= Default* High= "No Reboot"

Place closely pin B2 Place closely pin AC1

ICH_PWROK

NC7SZ08P5X_NL_SC70-5

+1.5VS_PCIE_ICH

MB USB Conn. SUB SUB CMOS Camera Card-Reader

MB HS USB CONN

MINI CARD

Title

Size Document Number Rev

Custom

Date: Sheet

12

R252

R252 10_0402_5%

10_0402_5% @

@

1

C308

C308 10P_0402_50V8J

10P_0402_50V8J @

@

2

ICH_PWROK

EC_PWROK

+3VS

5

U7

4

Y

SB_RSMRST#

R254

R254 10K_0402_5%

10K_0402_5%

401817

P

G

3

EC_PWROK

2

B

VGATE

1

A

Q10

Q10 MMBT3906_SOT23-3

MMBT3906_SOT23-3

123

C

12

CL_VREF0_ICH

CL_VREF1_ICH

Compal Electronics, Inc.

SCHEMATIC,MB A4853

1

CLK_ICH_14MCLK_ICH_48M

12

R136

R136 10_0402_5%

10_0402_5% @

@

1

C225

C225 10P_0402_50V8J

10P_0402_50V8J @

@

2

1 2

R88 10K_0402_5%R88 10K_0402_5%

1 2

R76 10K_0402_5%R76 10K_0402_5%

EC_PWROK <35,37>

E

B

1 2

R227 4.7K_0402_5%R227 4.7K_0402_5%

D14A

1

6

2

BAV99DW-7_SOT363

D14B

4

3

5

BAV99DW-7_SOT363

+3VS

1

C191

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

+3V

1

C193

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

1

EC_RSMRST# <35>

+3V

12

R228

2.2K_0402_5%

R110

3.24K_0402_1%

R111

R111 453_0402_1%

453_0402_1%

R115

3.24K_0402_1%

R114

R114 453_0402_1%

453_0402_1%

of

27 53Monday, September 28, 2009

A

+5VS

R122

R122 100_0402_5%

100_0402_5%

1 2

C175

C175 1U_0402_6.3V4Z

1U_0402_6.3V4Z

D D

+1.5VS

C C

SBPWR_EN#<40>

B B

5

+3VS

21

D10

D10 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+ICH_V5REF

2

+5VALW

1

R194

R194 10_0402_5%

10_0402_5% @

@

1 2

L9

FBMA-L11-201209-221LMA30T_0805

L11

+1.5VS

L11 MBK1608301YZF_0603

MBK1608301YZF_0603

(10UF*1, 1UF*1)

+5VALW

G

2

Q8

1

AO3413_SOT23-3

C277

0.1U_0402_16V4Z

2

+5V

+RTCVCC

1U_0402_6.3V4Z

R193

R193 100_0402_5%

100_0402_5%

1 2

+1.5VS_PCIE_ICH

12

C280

220U_D2_4VM_R15

1 2

S

D

1 3

1

C162

0.1U_0402_16V4Z

2

+3V+5V

21

D13

D13 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+ICH_V5REF_SUS

2

C276

C276 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

C192

(220UF*1, 22UF*2, 2.2UF*1)

1

+

C268

2

10U_0805_10V4Z

+1.5VS_SATAPLL_ICH

C296

C296 10U_0805_10V4Z

10U_0805_10V4Z

+1.5VS

1U_0402_6.3V4Z

1

C275

10U_0805_10V4Z

2

1

C295

2

1U_0402_6.3V4Z

1

C298

2

1

2

2.2U_0603_6.3V6K

1

2

1

2

1U_0402_6.3V4Z

+ICH_V5REF

+ICH_V5REF_SUS

C259

C299

close to AC7

+1.5VS

+3VS

R116 0_0603_5%

A A

1

C301

0.1U_0402_16V4Z

2

1

C172

2

0.1U_0402_16V4Z

5

1

C297

2

0.1U_0402_16V4Z

+1.5VS

(10UF*1, 2.2UF*1)

+1.5VS

close to AJ5

C174

0.1U_0402_16V4Z

R87 0_0603_5%

C160

C160 10U_0805_10V4Z

10U_0805_10V4Z

R128 0_0603_5%

C207

(4.7UF*1)

C207

4.7U_0805_10V4Z

+VCCLAN1_05_INT_ICH

12

+VCCLAN_ICH

+VCC_GLANPLL_ICH

1

C161

2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K +VCCGLAN_ICH

+3VS

4

U11F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

4

VCCA3GP

ARX

ATX

USB CORE

GLAN POWER

CORE

VCCP_CORE

PCI

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1] VCCSUS1_5[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

VCCPSUS

VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

VCCPUSB

VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

3

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16] VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

VCCDMIPLL VCC_DMI[1]

VCC_DMI[2]

V_CPU_IO[1] V_CPU_IO[2]

VCC3_3[01] VCC3_3[02] VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1] VCCCL3_3[2]

A15 B15 C15 D15 E15 F15 L11

0.1U_0402_16V4Z

L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29 W23

Y23 AB23

AC23 AG29

AJ6 AC10

AD19 AF20 AG24 AC20

B9 F9 G3

0.1U_0402_16V4Z

G6 J2 J7 K7

AJ4 AJ3

TP_VCCSUS1_05_ICH_1

AC8

TP_VCCSUS1_05_ICH_2

F17

TP_VCCSUS1_5_ICH_1

AD8

+VCCSUS1_5_ICH_INT_2

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

+VCCCL1_05_INT_ICH

G22

+VCCCL1_5_INT_ICH

G23

A24 B24

1

C170

C171

0.1U_0402_16V4Z

2

+1.5VS_DMIPLL_ICH

1

C258

C258 10U_0805_10V4Z

10U_0805_10V4Z

2

C167

4.7U_0805_10V4Z

C169

C137

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1

C281

2

0.1U_0402_16V4Z

C166

0.022U_0402_16V7K

close to A18 close to T1

+3VS

+1.05VS

1

2

L8

1 2

MBK1608301YZF_0603

(10UF*1, 0.01UF*1)

C260

0.01U_0402_16V7K

1

(4.7UF*1)

2

1

C168

0.1U_0402_16V4Z

2

+1.05VS

(4.7UF*1, 0.1UF*2)

+1.5VS

close to AD19 close to G6close to AG29

1

C294

0.1U_0402_16V4Z

2

PAD

T24

PAD

T6

PAD

T25

1

C261

2

0.022U_0402_16V7K

1

C221

C221 @

@

2

0.1U_0402_16V4Z

1

C223

2

0.1U_0402_16V4Z

+VCC_HDA_ICH

+VCCSUS_HDA_ICH

C262

0.1U_0402_16V4Z

1

2

1

2

C300

close to AJ6 close to B9 close to K7

@

@ @

@

1

C165

0.1U_0402_16V4Z

2

C222

C222 @

@ 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C224

0.1U_0402_16V4Z

2

1

C302

0.1U_0402_16V4Z

2

1

C303

0.1U_0402_16V4Z

2

C208

0.1U_0402_16V4Z

1

C173

2

0.1U_0402_16V4Z

@

R216 0_0603_5%

R216 0_0603_5% R217 0_0603_5%

R217 0_0603_5%

@

R219 0_0603_5%

R219 0_0603_5% R218 0_0603_5%

R218 0_0603_5%

+3V

(0.1UF*1, 0.022UF*2)

1

(0.1UF*1)

2

(1UF*1, 0.1UF*1)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

2

U11E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

+3VS

+1.5VS +3VS

+1.5V +3V

2

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

1

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

A

of

28 53Monday, September 28, 2009

1

5

+5VS +3VS

0.1U_0402_16V4Z

C497

1

2

1

2

1000P_0402_50V7K

D D

C498

1

C499

2

10U_0805_10V4Z

SATA_ITX_C_DRX_P0<26> SATA_ITX_C_DRX_N0<26>

4

0.1U_0402_16V4Z

1

C502

2

1000P_0402_50V7K

1

C501

2

SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0

SATA_DTX_IRX_N0 SATA_DTX_IRX_P0

1

2

10U_0805_10V4Z

C500

SATA HDD Conn.

JSATA2

1

GND

2

HTX+

3

HTX-

4

GND

5

HRX-

6

HRX+

7

GND

3

2

1

+3VS

SATA_DTX_C_IRX_N0<26>

SATA_DTX_C_IRX_P0<26>

C C

SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_P0

1 2

C504 0.01U_0402_16V7KC504 0.01U_0402_16V7K

1 2

C503 0.01U_0402_16V7KC503 0.01U_0402_16V7K

SATA_DTX_IRX_N0

SATA_DTX_IRX_P0

+5VS

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12 VCC12

CONN@

GND GND

22

OCTEK_SAT-22SU1G_NR

24 23

SATA ODD Conn.

+5VS

0.1U_0402_16V4Z

1

+

C570

150U_B2_6.3VM_R45M

2

1000P_0402_50V7K

@

B B

SATA_DTX_C_IRX_N1<26>

SATA_DTX_C_IRX_P1<26>

1000P_0402_50V7K

0.1U_0402_16V4Z

1

C393

2

SATA_DTX_C_IRX_N1

SATA_DTX_C_IRX_P1

1

C394

2

1

C392

2

10U_0805_10V4Z

SATA_ITX_C_DRX_P1_15<26> SATA_ITX_C_DRX_N1_15<26>

1 2

C396 0.01U_0402_16V7KC396 0.01U_0402_16V7K

1 2

C395 0.01U_0402_16V7KC395 0.01U_0402_16V7K

SATA_ITX_C_DRX_P1_15 SATA_ITX_C_DRX_N1_15

SATA_DTX_IRX_N1_15 SATA_DTX_IRX_P1_15

R347 1K_0402_1%@R347 1K_0402_1%@

1 2

SATA_DTX_IRX_N1_15

SATA_DTX_IRX_P1_15

+5VS

JSATA1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND GND13GND

SANTA_206401-1_13P

SANTA_206401-1_13P CONN@

CONN@

GND

15 14

A A

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

29 53Monday, September 28, 2009

of

1

of

5

D D

Vender suggesttion

C C

+3VS

@ R333

@

1 2

1

2

R333 100K_0402_5%

100K_0402_5%

CLK_SD_48M<16>

1 2

R334 0_0402_5%R334 0_0402_5%

C377

C377 1U_0402_6.3V4Z

1U_0402_6.3V4Z

47P_0402_50V8J

RST#

C376

@C376

@

12

@

1

@ C373

@

2

1

2

+3VS

+3VALW

MODE_SEL

12

R332

R332 0_0402_5%

0_0402_5%

R329

R329 33_0402_5%

33_0402_5%

C373 22P_0402_50V8J

22P_0402_50V8J

EMI

4

1 2

R555 0_0805_5%R555 0_0805_5%

1 2

R556 0_0603_5%@R556 0_0603_5%@

1 2

R330 0_0402_5%R330 0_0402_5%

1 2

C374 6P_0402_50V8D

12MHZ_16PF_7A12000026

1 2

C375 6P_0402_50V8D

@

40~60 mil

C350

4.7U_0603_6.3V6K

Y3

@Y3

@

1

2

12

0.1U_0402_16V4Z

@

USB20_N4<27>

USB20_P4<27>

5IN1_LED#<36>

XTLI

XTLO

12

C359 0.1U_0402_16V4ZC359 0.1U_0402_16V4Z

+XDPWR_SDPWR_MSPWR

C349

1

RST#

2

MODE_SEL XTLO XTLI

USB20_N4 USB20_P4

R315 6.19K_0402_1%R315 6.19K_0402_1%

R331

R331 0_0603_5%

0_0603_5%

1 2

3

12

R316 0_0402_5%R316 0_0402_5%

U14

1

AV_PLL

3

NC

7

NC

9

CARD_3V3

11

D3V3

33

D3V3

8

3V3_IN

44

RST#

45

MODE_SEL

47

XTLO

48

XTLI

4

DM

5

DP

14

GPIO0

2

RREF

12

DGND

32

DGND

6

AGND

46

AGND

RTS5159E-GR_LQFP48_7X7

12

VREG

MS_D4

XD_CLE_SP19 XD_CE#_SP18

XD_ALE_SP17 SD_DAT2/XD_RE#_SP16 SD_DAT3/XD_WE#_SP15

SD_DAT4/XD_WP#/MS_D7_SP13

XD_RDY_SP14

SD_DAT5/XD_D0/MS_D6_SP12 SD_CLK/XD_D1/MS_CLK_SP11 SD_DAT6/XD_D7/MS_D3_SP10

MS_INS#_SP9

SD_DAT7/XD_D2/MS_D2_SP8 SD_DAT0/XD_D6/MS_D0_SP7 SD_DAT1/XD_D3/MS_D1_SP6

XD_D5_SP5

XD_D4/SD_DAT1_SP4

SD_CD#_SP3

SD_WP_SP2

XD_CD#_SP1

EEDI

XTAL_CTR

MS_D5

EEDO

EECS EESK

SD_CMD

+CARDPWR

C476

10U_0805_10V4Z

NC

@

10 22 30

43 42 41 40 39 38 37 35 34 31 29 28 27 26 25 23 21 20 19 18

13 24

15 16 17 36

1

0.1U_0402_16V4Z

2

+REG18

1 2

C341 1U_0402_6.3V4ZC341 1U_0402_6.3V4Z

SDDAT2_XDRE# SDDAT3_XDWE#

SDDAT4_XDWP#_MSD7 SDDAT5_XDD0_MSD6 SDCLK_XDD1_MSCLK_L SDDAT6_XDD7_MSD3 MS_INS# SDDAT7_XDD2_MSD2 SDDAT0_XDD6_MSD0 SDDAT1_XDD3_MSD1

XDD5_MSBS

XDD4_SDDAT1

XTAL_CTR

R277 0_0603_5%R277 0_0603_5%

1

C342

C480

2

0.1U_0402_16V4Z

2

XDCLE XDCE# XDALE

XD_RDY

SDCD SDWP XDCD

12

SD_CMD

12

R317 0_0402_5%R317 0_0402_5%

+3VS

1

SDCLK_XDD1_MSCLK

+XDPWR_SDPWR_MSPWR

1 2

B B

R294

100K_0402_5%

1 2

A A

5

1

C348

0.1U_0402_16V4Z

2

R318 0_0603_5%R318 0_0603_5%

4

+CARDPWR

For HM51

JREAD1

34

XDCD XD_RDY XDD5_MSBS SDDAT2_XDRE# XDCE# XDCLE XDALE SDDAT3_XDWE# SDDAT4_XDWP#_MSD7

SDDAT5_XDD0_MSD6 SDCLK_XDD1_MSCLK SDDAT7_XDD2_MSD2 SDDAT1_XDD3_MSD1 XDD4_SDDAT1 XDD5_MSBS SDDAT0_XDD6_MSD0 SDDAT6_XDD7_MSD3

XD-VCC

1

XD-CD-SW

2

XD-R/B

3

XD-RE

4

XD-CE

5

XD-CLE

6

XD-ALE

7

XD-WE

8

XD-WP

9

XD-D0

24

XD-D1

25

XD-D2

27

XD-D3

28

XD-D4

29

XD-D5

31

XD-D6

33

XD-D7

TAITW_R015-300-LM_36P_NR-T

TAITW_R015-300-LM_36P_NR-T CONN@

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

10

MS-VCC

MS-SCLK

MS-INS

MS-BS MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

SD-VCC

SD-CLK

SD-CMD SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3

SD-WP-SW

SD-CD-SW

4in1-GND 4in1-GND 4in1-GND 4in1-GND

2009/07/01 2010/07/01

12 16 23 19 21 18 14

20 22 15 30 32 11 13 35 36

17 26 37 38

SDCLK_XDD1_MSCLK

MS_INS#

SDDAT0_XDD6_MSD0 SDDAT1_XDD3_MSD1 SDDAT7_XDD2_MSD2 SDDAT6_XDD7_MSD3

SDCLK_XDD1_MSCLK

SD_CMD

SDDAT0_XDD6_MSD0

XDD4_SDDAT1 SDDAT2_XDRE# SDDAT3_XDWE#

SDWP SDCD

Compal Secret Data

Deciphered Date

+CARDPWR

SDCLK_XDD1_MSCLK

12

R563

R563 10_0402_5%

10_0402_5% @

@

1

C477

C477 22P_0402_50V8J@

22P_0402_50V8J@

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

1

A

of

30 53Monday, September 28, 2009

A

1 2

R48 0_0603_5%8114@R48 0_0603_5%8114@

1 2

L5

8132@L5

8132@

4.7UH_1008HC-472EJFS-A_5%_1008

4 4

+AVDD_CEN

EC_PME#<35>

3 3

+AVDD_CEN +2.5V_VDDH/VDD17

1 2

R49

0_0603_5%

4.7U_0805_10V4Z

4.7U_0805_10V4Z 8132@

8132@

8114@

12

C83 1U_0603_10V4Z

12

C70 0.1U_0402_16V7K

8132@

+3V_LAN

1 2

R37 4.7K_0402_5%

CLK_PCIE_LAN<16>

CLK_PCIE_LAN#<16>

PCIE_PTX_C_IRX_P3<27> PCIE_PTX_C_IRX_N3<27>

Place Close to Chip

Y1

LAN_X1 LAN_X2

1 2

25MHZ_20P

2 2

12

C82

C82 33P_0402_50V8K

33P_0402_50V8K

12

C81

C81 33P_0402_50V8K

33P_0402_50V8K

+AVDD_CEN_C

1

C99

C100

0.1U_0402_16V4Z

2

8132@

C84 1U_0603_10V4Z8114@C84 1U_0603_10V4Z8114@

+2.5V_VDDH/VDD17

PCIE_ITX_C_PRX_P3<27> PCIE_ITX_C_PRX_N3<27>

C20 0.1U_0402_16V7K

C20 0.1U_0402_16V7K C19 0.1U_0402_16V7K

C19 0.1U_0402_16V7K

12

PLT_RST#<8,17,25,35>

C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K

12 12

4.7UH_1008HC-472EJFS-A_5%_1008

R45

1 2

0_0603_5%8132@

+3V_LAN

12

C69 1000P_0402_50V7K8114@C69 1000P_0402_50V7K8114@

12 12

R36 2.37K_0402_1%R36 2.37K_0402_1%

CTR12

CLK_PCIE_LAN_C CLK_PCIE_LAN#_C

PCIE_PTX_IRX_P3 PCIE_PTX_IRX_N3

LAN_X1 LAN_X2

12

Pre-MP 9/17

+1.8_VDD/LX

60mil

+1.8_VDD/LX

RBIAS

B

1 2 6 5 3

4

7 41 40 43 44 38 37

9 10

31 33

12 34

49

1 2

R46 0_0603_5%8114@R46 0_0603_5%8114@

U2

VDD18O VDD33 VDDHO CTR12 PERSTn

WAKEn VBG1P18V REFCLKP REFCLKN RX_P RX_N

AR8132L 10/100 LAN

TX_P TX_N

XTLO XTLI

SMCLK SMDATA

RBIAS TESTMODE

GND

AR8132L-AL1E_QFN48_6X6

+2.5V_VDDH

Atheros

TWSI_CLK

TWSI_DATA

LED_ACTn

LED_10_100n

LED_DUPLEXn

TRXP0

TRXN0

TRXP1

TRXN1

AVDDL_REG

AVDDL/AVDDL_REG

DVDDL0 DVDDL1 DVDDL2 DVDDL3

AVDDL0 AVDDL1 AVDDL2 AVDDL3 AVDDL4

AVDDH0 AVDDH1 AVDDH2

NC_0 NC_1 NC_2 NC_3 NC_4 NC_5

U1

1

A0

2

A1

3

A2

4

GND

AT24C02BN-SH-T_SO8

AT24C02BN-SH-T_SO8 8114@

8114@

29 30

LAN_ACTIVITY#

47

LAN_LINK#

48 27 13

14 17 18

11 42

28 32 45 46

8 16 22 36 39

15 19 25

20 21 23 24 26 35

C

VCC

WP SCL SDA

TWSI_SCL TWSI_SDA

LAN_MIDI0+ LAN_MIDI0LAN_MIDI1+ LAN_MIDI1-

AVDDVCO1 AVDDVCO2

+1.2_DVDDL

+1.2_AVDDL

+2.5V_VDDH

+3V_LAN +3V_LAN

1

C11

2

0.1U_0402_16V4Z

8 7 6 5

LAN_ACTIVITY# <32> LAN_LINK# <32> LAN_CLKREQ# <16>

LAN_MIDI0+ LAN_MIDI0-

LAN_MIDI1+ LAN_MIDI1-

12

R18

4.7K_0402_1%

4.7K_0402_1% 12

R21

4.7K_0402_1%

R35 49.9_0402_1%

R34 49.9_0402_1%

R34 49.9_0402_1% R33 49.9_0402_1%

R33 49.9_0402_1%

R27 49.9_0402_1%

12 12

TWSI_SCL TWSI_SDA

1 2

+3VALW

C64 0.1U_0402_16V4ZC64 0.1U_0402_16V4Z

Place Close to Chip

C55 0.1U_0402_16V4ZC55 0.1U_0402_16V4Z

LAN_MIDI0+ <32> LAN_MIDI0- <32>

LAN_MIDI1+ <32> LAN_MIDI1- <32>

D

Layout Notice : Place as close chip as possible.

1 2

R44 0_1206_5%

C87

4.7U_0805_10V4Z

E

+3V_LAN

1

C72

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

+1.2_AVDDL

1 2

R28

R28 0_0603_5%

0_0603_5%

If overclocking, R39, L1 stuffed and R28 removed. If not overclocking, R28, L1 stuffed and R39 removed.

AR8132: L1=0ohm(SD002000080),C67=0.1uF(SE070104Z80). remove C80

Place Close to Pin 28

+1.2_DVDDL

C73

C73 8132@

8132@

1U_0603_10V4Z

Place Close to Pin15

+2.5V_VDDH

C85

C86

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

2

0.1U_0402_16V4Z

L2 FBMA-L11-201209-221LMA30T_0805

1 2

8114@

R39 0_0603_5%

1 2

@

1

C67

1000P_0402_50V7K

L1 FBMA-L11-201209-221LMA30T_0805L1 FBMA-L11-201209-221LMA30T_0805

1 2

C17

0.1U_0402_16V4Z

1

2

8114@

C58

0.1U_0402_16V4Z

C65

0.1U_0402_16V4Z

1

2

C15

1U_0603_10V4Z

C80

1U_0603_10V4Z 8114@

2

1

2

、32、45、

C16

0.1U_0402_16V4Z

1

2

1

C66

0.1U_0402_16V4Z

2

1

2

C59

0.1U_0402_16V4Z

46

C74

0.1U_0402_16V4Z

、19、

25

+1.2_DVDDL

AVDDVCO1

AVDDVCO2

+3V_LAN

1

C521

0.1U_0402_16V4Z

1 1

8114@

A

2

4

10U_0805_10V4Z

12

Q39

1

MMJT9435T1G_SOT223

2 3

8114@

1

C516

C516 8114@

8114@

2

R38

R38 10K_0402_1%

10K_0402_1% 8114@

8114@

+1.2_AVDDL

1

C520

0.1U_0402_16V4Z

0.1U_0402_16V4Z 8114@

8114@

2

8132@

+2.5V_VDDH

1 2

R432 0_0402_5%

1

C71

0.1U_0402_16V4Z

2

8132@

B

CTR12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

D

Place Close to Pin8

+1.2_AVDDL

1

C60

8132@

1U_0603_10V4Z

2

C68

8114@

0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

Date: Sheet

401817

Monday, September 28, 2009

、16、22、36、

C63

0.1U_0402_16V4Z

1

2

Compal Electronics, Inc.

SCHEMATIC,MB A4853

C54

0.1U_0402_16V4Z

1

2

C61

0.1U_0402_16V4Z

E

39

1

C18

0.1U_0402_16V4Z

2

of

31 53

A

5

4

3

2

1

D D

LAN_MIDI0+<31> LAN_MIDI0-<31>

LAN_MIDI1+<31> LAN_MIDI1-<31>

C C

B B

LAN_MIDI0+ LAN_MIDI0-

LAN_MIDI1+ LAN_MIDI1-

+AVDD_CEN

0.1U_0402_16V4Z

1 2

LAN_TCT

1

C2

2

R7

R7 0_0603_5%

0_0603_5%

T1

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT TD+7TX+

8

TD-

Pulse H0013

1

C3

2

0.1U_0402_16V4Z

Place close to TCT pin

10/100 : TL8515C_LF GBE : GSL5009-1

16

RX+

15

RX-

14

CT

13

NC

12

NC

11

CT

10 9

TX-

12

R3

75_0402_1%

12

R4

R4 75_0402_1%

75_0402_1%

RJ45_MIDI0+ RJ45_MIDI0-

RJ45_MIDI1+

RJ45_MIDI1-

RJ45_GND

40mil

JRJ45

LAN_ACTIVITY#<31>

LAN_ACTIVITY# LAN_ACTIVITY#_1

LAN_LINK#<31>

R8

5.1K_0402_5%

1 2

R11 510_0402_5%R11 510_0402_5%

LAN_LINK#

+3V_LAN

12

2

C4

C4 220P_0402_50V7K

220P_0402_50V7K

1

RJ45_MIDI1-

RJ45_MIDI1+ RJ45_MIDI0RJ45_MIDI0+

R10 510_0402_5%R10 510_0402_5%

12

RJ45_GND LANGND

1000P_1206_2KV7K

JRJ45

12 11

8 7 6 5 4 3 2 1

10

9

FOX_JM36113-L2R8-7F

FOX_JM36113-L2R8-7F CONN@

CONN@

1 2

C9

C9 220P_0402_50V7K

220P_0402_50V7K

1 2

C8

Amber LED+ Amber LEDPR4PR4+ PR2PR3PR3+ PR2+ PR1PR1+ Green LEDGreen LED+

1

2

0.1U_0402_16V4Z

C556

SHLD2 SHLD1

1

2

16

Guide Pin

15

14 13

40mil

C555

4.7U_0805_10V4Z

LAN_ACTIVITY#_1

LAN_LINK#

1 2

C10

C10 68P_0402_50V8J

68P_0402_50V8J @

@

1 2

C7

C7 68P_0402_50V8J

68P_0402_50V8J @

@

2

1

LAN_LINK#

3

D29

D29 @

@ PJDLC05_SOT23

PJDLC05_SOT23

For EMI

A A

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

401817

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

32 53Monday, September 28, 2009

1

A

of

A

B

C

D

E

For Wireless LAN

+3VS_WLAN +1.5VS

R378 0_1206_5% R378 0_1206_5%

1 2

R370 0_1206_5%@R370 0_1206_5%@

E51TXD_P80DATA<35>

E51RXD_P80CLK<35>

1 2

For MINICARD Port80 Debug

E51TXD_P80DATA E51TXD_P80DATA_R E51RXD_P80CLK

1 1

2 2

1

+3VS+3VS_WLAN

C432

+3V

4.7U_0805_10V4Z

2

ICH_PCIE_WAKE#<27>

MINI2_CLKREQ#<16>

CLK_PCIE_MINI2#<16>

CLK_PCIE_MINI2<16>

PCIE_PTX_C_IRX_N2<27> PCIE_PTX_C_IRX_P2<27>

PCIE_ITX_C_PRX_N2<27>

PCIE_ITX_C_PRX_P2<27>

R377 0_0402_5% R377 0_0402_5%

1

C431

0.1U_0402_16V4Z

2

Remove bluetooth For HM51

+3VS_WLAN

1 2

R381 0_0402_5%@R381 0_0402_5%@

1 2

1

C425

0.1U_0402_16V4Z

2

1

2

JMINI2

(WAKE#)

1

3

5

7

9

9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

C428

4.7U_0805_10V4Z

2

4

6

8

10

12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

G153G254G355G3

FOX_AS0B226-S99N-7F

56

CONN@

1

C426

0.1U_0402_16V4Z

2

(LED_WWAN#) (LED_WLAN#)

1

C427

0.1U_0402_16V4Z

2

WL_OFF#

PLT_RST_BUF#

+3V_WLAN

MINI_SMBCLK MINI_SMBDATA

R373 0_0603_5% R373 0_0603_5%

1 2

R374 0_0603_5%@R374 0_0603_5%@

1 2

R372 0_0402_5%@R372 0_0402_5%@

1 2

R357 0_0402_5%@R357 0_0402_5%@

1 2

USB20_N10 <27> USB20_P10 <27>

(9~16mA)

+3VS_WLAN +1.5VS

MINI1_LED# <36>

WL_OFF# <35>

PLT_RST_BUF# <25> +3VS +3V

ICH_SMBCLK ICH_SMBDATA

ICH_SMBCLK <16,27>

ICH_SMBDATA <16,27>

H_3P4

Power

+3VS +3V +1.5VS

H14

H1

@

1

H7

@

1

H_3P4

@

1

H9

H_3P4

@

1

Mini Card Power Rating Primary Power (mA) Peak Normal 1000 330 500

H26

H19

H_3P4

@

1

H4

H18

H_3P4

@

1

H_3P4

H_4P2

Auxiliary Power (mA)

Normal 750 250 375

H24

H25

H_3P4

@

1

H16

@

1

H23

H_3P4

@

1

250 (wake enable) 5 (Not wake enable)

H17

H_3P4

@

1

H10

H_4P2

H8

H_4P0N

1

H20

H_2P8

H_3P4

@

H_4P6X4P0N

FIDUCIAL_C40M80

1

H22

H27

H_3P3

H_2P8

@

1

H21

1

FD4

H28

H_3P8

@

1

Date: Sheet

@

1

FD3

FIDUCIAL_C40M80

Title

SCHEMATIC,MB A4853

Size Document Number Rev

B

401817

H30

H29

H_5P1X4P1N

@

1

FD2

@

1

Compal Electronics, Inc.

@

1

FIDUCIAL_C40M80

E

A

of

33 53Monday, September 28, 2009

H11

H_4P2

@

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

1

H5

H_2P8

@

1

H15

H_4P2

@

1

FD1

1

FIDUCIAL_C40M80

D

@

H6

H20

A

1 1

2 2

B

C

D

E

USB CONN.

+USB_VCCA

W=80mils

+USB_VCCA +USB_VCCA

1

+

150U_B2_6.3VM_R45M

2

3 3

USB20_N6<27>

USB20_P6<27>

+5VALW

D23

USB20_P0 USB20_P6

+USB_VCCA

4 4

A

B

USB20_N6 USB20_N0

D23

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CH2

2

Vn

1

CH1

2009/07/01 2010/07/01

C

1

C540

4.7U_0805_10V4Z

4.7U_0805_10V4Z 2

SYSON#<40>

Compal Secret Data

Deciphered Date

C538

470P_0402_50V7K

USB20_N6 USB20_P6

1

C549

2

U28

1

GND

2

IN

3

IN

4

EN#

TPS2061DRG4_SO8

D

JUSB2

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G565ZR

CONN@

80mil

+USB_VCCA

8

OUT

7

OUT

6

OUT

5

FLG

+USB_VCCA

W=80mils

1

+

150U_B2_6.3VM_R45M

2

@

USB20_N0<27> USB20_P0<27>

+3V

12

R461

R461 100K_0402_5%

100K_0402_5%

1 2

R460

10K_0402_5%

Title

SCHEMATIC,MB A4853

Size Document Number Rev

B

401817

Date: Sheet

1

C548

2

470P_0402_50V7K

USB20_N0 USB20_P0

1

C539

0.1U_0402_16V4Z

2

C548

E

JUSB1

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G565ZR

CONN@

USB_OC#6 <27>

USB_OC#0 <27>

34 53Monday, September 28, 2009

C537

Compal Electronics, Inc.

of

A

5

0.1U_0402_16V4Z

0.1U_0402_16V4Z C369

C369

1

C365

+3VALW

1 2

R319 10K_0402_5%

@

D D

C C

+3VALW

B B

1 2

R557 100K_0402_5%R557 100K_0402_5%

22P_0402_50V8J@

R276

10K_0402_5%

+5VS

1 2

R290 4.7K_0402_5%R290 4.7K_0402_5%

1 2

R291 4.7K_0402_5%R291 4.7K_0402_5%

1 2

R279 2.2K_0402_5%R279 2.2K_0402_5%

1 2

R280 2.2K_0402_5%R280 2.2K_0402_5%

1 2

R295 47K_0402_5%R295 47K_0402_5%

1 2

R296 47K_0402_5%R296 47K_0402_5%

1 2

R320 100K_0402_5%R320 100K_0402_5%

EC_PME#

PLT_RST#

C340

R289 33_0402_5%@R289 33_0402_5%@

12

CLK_PCI_LPC<16>

+3VALW

C320 0.1U_0402_16V4ZC320 0.1U_0402_16V4Z

+3VALW

1 2

EC_RCIRRX

TP_CLK TP_DATA

EC_SMB_CK1 EC_SMB_DA1 KSO1 KSO2 LID_SW#

12

R270 47K_0402_5%R270 47K_0402_5%

12

C365

2

0.1U_0402_16V4Z

EC_GA20<26>

EC_KBRST#<26>

SERIRQ<27>

LPC_FRAME#<26>

LPC_AD3<26> LPC_AD2<26> LPC_AD1<26> LPC_AD0<26>

PLT_RST#<8,17,25,31>

EC_SCI#<27>

PM_CLKRUN#<27>

EC_SMB_CK1<42> EC_SMB_DA1<42> EC_SMB_CK2<4,22> EC_SMB_DA2<4,22>

PM_SLP_S3#<27> PM_SLP_S5#<27>

EC_SMI#<27>

MCH_TSATN_EC#<8>

FAN_SPEED1<4>

2

0.1U_0402_16V4Z

Remove BT_ON# For HM51

+3VS

1 2

R281 2.2K_0402_5%R281 2.2K_0402_5%

1 2

R282 2.2K_0402_5%R282 2.2K_0402_5%

A A

EC_SMB_CK2 EC_SMB_DA2

ON/OFF<37>

PWR_SUSP_LED<36>

NUM_LED#<36>

4

0.1U_0402_16V4Z

1

C319

2

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

PLT_RST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI#

FAN_SPEED1 E51TXD_P80DATA

E51RXD_P80CLK ON/OFF PWR_SUSP_LED NUM_LED#

1

C344

2

EC_CRY1 EC_CRY2

2

C343

1000P_0402_50V7K

1

U13

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

+3VALW

L13

1 2

FBM-L11-160808-800LMT_0603

2

C331

C331 1000P_0402_50V7K

1000P_0402_50V7K

1

9

22

33

96

111

VCC

PWM Output

AD Input

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

GPIO

GND

11

24

35

94

3

+EC_VCCA

125

67

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

AGND

KB926QFD3_LQFP128_14X14

69

20mil

ECAGND

FBM-L11-160808-800LMT_0603

113

GND

GPI

1

2

ECAGND

AD3/GPIO3B

AD4/GPIO42

DA3/GPIO3F

SPIDI/RD#

SPIDO/WR#

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

C421

0.1U_0402_16V4Z

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

L14

12

INVT_PWM BEEP#

Remove FANPWM For HM51

BATT_TEMP BATT_OVP

AD_BID0

DAC_BRIG EN_DFAN1 IREF

EC_MUTE#

TP_CLK TP_DATA

3S/4S# 65W/90W# SBPWR_EN LID_SW#

EC_SPIDI/FWR# EC_SPIDO/FRD# EC_SPICLK EC_SPICS#/FSEL#

EC_RCIRRX FSTCHG

BATT_GRN_LED# CAPS_LED# BATT_AMB_LED# PWR_LED SYSON VR_ON ACIN

EC_LID_OUT# EC_ON

EC_PWROK BKOFF# WL_OFF# ID_15_17

VGA_ENBKL EAPD

SUSP# PBTN_OUT# EC_PME#

1

C366

4.7U_0805_10V4Z

2

LID_SW# <36>

FSTCHG <44>

CAPS_LED# <36>

ACIN <18,27,40,41,44>

PM_SLP_S4# <27,37> VGA_ENBKL <18>

EC_THERM# <27> SUSP# <37,40,45,46,49> PBTN_OUT# <27>

2

KSI[0..7] KSO[0..17]

INVT_PWM <23>

BEEP# <38> ACOFF <44>

BATT_OVP <44> ADP_I <44>

DAC_BRIG <23> EN_DFAN1 <4> IREF <44> CALIBRATE# <44>

EC_MUTE# <39>

TLOCK_LED# <36> TP_CLK <36> TP_DATA <36>

SBPWR_EN <40>

EC_SI_SPI_SO <36> EC_SO_SPI_SI <36> EC_SPICLK <36> EC_SPICS#/FSEL# <36>

BATT_GRN_LED# <36> BATT_AMB_LED# <36>

PWR_LED <36> SYSON <40,45,46> VR_ON <27,37,47>

EC_RSMRST# <27> EC_LID_OUT# <27> EC_ON <37> EC_SWI# <27> EC_PWROK <27,37> BKOFF# <23> WL_OFF# <33>

EAPD <38>

EC_PME# <31>

ECAGND

12

C332 0.01U_0402_16V7KC332 0.01U_0402_16V7K

3S/4S# <44> 65W/90W# <44>

KSI[0..7] <36> KSO[0..17] <36>

BATT_TEMP <42>

For EC Tools

+3VALW

JP13

1

2

3

4

ACES_85205-0400

ACES_85205-0400 @

@

JP9

1

2

3

4

ACES_85205-0400

ACES_85205-0400 @

@

R31 100K_0402_5%R31 100K_0402_5%

3S/4S#

R324 4.7K_0402_5%

ID_15_17

9/17 Pre-MP

15P_0402_50V8J

R321 100K_0402_5%R321 100K_0402_5% R322 100K_0402_5%@R322 100K_0402_5%@

65W/90W#

R323 100K_0402_5%R323 100K_0402_5%

Analog Board ID definition, Please see page 3.

+3VALW

R272

R272 100K_0402_5%

100K_0402_5%

Ra

1 2

R273

Rb

18K_0402_5%

1 2

EC_CRY1 EC_CRY2

1

C368

2

X2

32.768KHZ_12.5P_MC-306

C333 100P_0402_50V8JC333 100P_0402_50V8J

BATT_TEMP

C420 100P_0402_50V8JC420 100P_0402_50V8J

BATT_OVP

C364 100P_0402_50V8JC364 100P_0402_50V8J

ACIN

E51RXD_P80CLK E51TXD_P80DATA

+3VALW

E51RXD_P80CLK E51TXD_P80DATA

1 2

@

12

AD_BID0

0.1U_0402_16V4Z

4

1

IN

OUT

NC3NC

2

12 12 12

1

Place on RAM door

E51RXD_P80CLK <33> E51TXD_P80DATA <33>

Place on MiniCard

+3VALW

12

+3VALW

12 12

+3VALW

1

C325

2

1

C367

15P_0402_50V8J

2

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

35 53Monday, September 28, 2009

of

1

of

EC_SPICS#/FSEL#<35>

+3VALW

(Left)

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

(Right)

For HM51

KSO15

C31 100P_0402_50V8J@C31 100P_0402_50V8J@ KSO14 KSO13 KSO12

KSI0 KSO11 KSO10 KSI1

KSI2 KSO9 KSI3 KSO8

1 2

C32 100P_0402_50V8J@C32 100P_0402_50V8J@

1 2

C33 100P_0402_50V8J@C33 100P_0402_50V8J@

1 2

C34 100P_0402_50V8J@C34 100P_0402_50V8J@

1 2

C28 100P_0402_50V8J@C28 100P_0402_50V8J@

1 2

C35 100P_0402_50V8J@C35 100P_0402_50V8J@

1 2

C36 100P_0402_50V8J@C36 100P_0402_50V8J@

1 2

C27 100P_0402_50V8J@C27 100P_0402_50V8J@

1 2

C26 100P_0402_50V8J@C26 100P_0402_50V8J@

1 2

C37 100P_0402_50V8J@C37 100P_0402_50V8J@

1 2

C25 100P_0402_50V8J@C25 100P_0402_50V8J@

1 2

C38 100P_0402_50V8J@C38 100P_0402_50V8J@

1 2

Compal Footprint

3 1

4 2

1 2

+3VALW

R358 0_0603_5%R358 0_0603_5%

R359 4.7K_0402_5%R359 4.7K_0402_5%

1 2

R371 4.7K_0402_5%R371 4.7K_0402_5%

1 2

EC_SPICS#/FSEL#

INT_KBD Conn.

JKB1

26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

ACES_85201-26051

26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

CONN@

+3VALW

28

G2

27

G1

1 2

R345 1.2K_0402_5%R345 1.2K_0402_5%

1 2

R344 1K_0402_5%R344 1K_0402_5%

1 2

R343 1.2K_0402_5%R343 1.2K_0402_5%

1 2

R342 1K_0402_5%R342 1K_0402_5%

C417 0.1U_0402_16V4ZC417 0.1U_0402_16V4Z

1 2

+SPI_VCC

U21

1 SPI_WP# SPI_HOLD#

ENE suggestion SPI Frequency over 66MHz SST: 50MHz MXIC: 70MHz ST: 40MHz

CE#

3

WP#

7

HOLD#

4

VSS

MX25L8005M2C-15G_SOP8

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

KSO16

C30 100P_0402_50V8J@C30 100P_0402_50V8J@

KSO17

C29 100P_0402_50V8J@C29 100P_0402_50V8J@

KSO7

C39 100P_0402_50V8J@C39 100P_0402_50V8J@

KSO6

C40 100P_0402_50V8J@C40 100P_0402_50V8J@

KSO5

C41 100P_0402_50V8J@C41 100P_0402_50V8J@

KSO4

C42 100P_0402_50V8J@C42 100P_0402_50V8J@

KSO3

C43 100P_0402_50V8J@C43 100P_0402_50V8J@

KSI4

C24 100P_0402_50V8J@C24 100P_0402_50V8J@

KSO2

C46 100P_0402_50V8J@C46 100P_0402_50V8J@

KSO1

C47 100P_0402_50V8J@C47 100P_0402_50V8J@

KSO0

C48 100P_0402_50V8J@C48 100P_0402_50V8J@

KSI5

C23 100P_0402_50V8J@C23 100P_0402_50V8J@

KSI6

C22 100P_0402_50V8J@C22 100P_0402_50V8J@

KSI7

C21 100P_0402_50V8J@C21 100P_0402_50V8J@

LED2

A

4 3

YG

2 1

HT-297DQ-GQ_AMB-YG

LED1

A

4 3

YG

2 1

HT-297DQ-GQ_AMB-YG

VDD SCK

SI

SO

KSI[0..7] KSO[0..17]

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

ACES_85201-26051

CONN@

1 2 1 2

1 2 1 2 1 2 1 2

PWR_SUSP_LED#

PWR_LED#

BATT_AMB_LED#

BATT_GRN_LED#

8 6 5 2

JKB2

G2 G1

EC_SPICLK_R

28 27

KSI[0..7] <35> KSO[0..17] <35>

R356 0_0402_5%R356 0_0402_5%

1 2

R355 0_0402_5%R355 0_0402_5%

1 2

R360 0_0402_5%R360 0_0402_5%

1 2

For HM51

BATT_AMB_LED# <35>

BATT_GRN_LED# <35>

EC_SPICLK <35> EC_SO_SPI_SI <35> EC_SI_SPI_SO <35>

EC_SPICLK_R

FOR EMI

R354

R354 22_0402_5%

22_0402_5% @

@

1 2 2

C416

C416 10P_0402_50V8J

10P_0402_50V8J

1

@

LID_SW#<35>

TLOCK_LED#<35>

KSO0<35> KSI2<35>

ON/OFFBTN#<37>

KSI1<35>

MINI1_LED#<33>

NUM_LED#<35>

CAPS_LED#<35>

PWR_LED<35> PWR_SUSP_LED<35>

R22

10K_0402_5%

5IN1_LED#<30>

SATA_LED#<26>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC_SPICS#/FSEL# SPI_WP# SPI_HOLD#

To POWER/B

TP_LOCK_LED#

KSO0 KSI2 PWR_SUSP_LED# PWR_LED# ON/OFFBTN# KSI1 MINI1_LED# MEDIA_LED# NUM_LED# CAPS_LED#

PWR_LED# PWR_SUSP_LED#

61

Q3A

Q3A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

12

U20

1

CS#

3

WP#

7 4

Reserved for BIOS simulator. Footprint SO8

SCLK HOLD# GND

MX25L512AMC-12G_SO8

MX25L512AMC-12G_SO8 @

@

+5VS+3VALW+3VS

VCC

SI

SO

+SPI_VCC

8

EC_SPICLK_R

6

EC_SO_SPI_SI

5

EC_SI_SPI_SO

2

JP14

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

ACES_85201-20051

For HM51

KSO0

KSI1

WL_BTN#

KSI2

TLOCK_BTN# KSI3 KSI4 KSI5

3

Q3B

Q3B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

12

R32

10K_0402_5%

+3VS

Q5A

2

2N7002DW-T/R7_SOT363-6

SATA_LED# MEDIA_LED#

+3VS+3VS

2009/07/01 2010/07/01

61 3

4

Q5B

5

2N7002DW-T/R7_SOT363-6

Compal Secret Data

Deciphered Date

4

To TP/B Conn.

+5VS

C217

5

1

2

6

@SW2

@

6

TP_CLK TP_DATA

LEFT_BTN# RIGHT_BTN#

1

C218

C218 100P_0402_50V8J

100P_0402_50V8J

2

+5VS

C219

0.1U_0402_16V4Z

1 2

TP_CLK<35> TP_DATA<35>

100P_0402_50V8J

LEFT_BTN#

RIGHT_BTN#

2

3

D12

D12 @

@ PJDLC05_SOT23

PJDLC05_SOT23

1

SW4

SW4 SMT1-05-A_4P

LEFT_BTN# RIGHT_BTN#

SMT1-05-A_4P

3 4

SW2 SMT1-05-A_4P

SMT1-05-A_4P

3 4

FOR EMI

PWR_LED# ON/OFFBTN# MINI1_LED#

PWR_SUSP_LED#

NUM_LED#

MEDIA_LED#

C51 100P_0402_50V8J@C51 100P_0402_50V8J@

1 2

C52 100P_0402_50V8J@C52 100P_0402_50V8J@

1 2

C44 100P_0402_50V8J@C44 100P_0402_50V8J@

1 2

C50 100P_0402_50V8J@C50 100P_0402_50V8J@

1 2

C45 100P_0402_50V8J@C45 100P_0402_50V8J@

1 2

C49 100P_0402_50V8J@C49 100P_0402_50V8J@

1 2

Title

SCHEMATIC,MB A4853

Size Document Number Rev

B

401817

Date: Sheet

JTP1

6 5 4 3 2 1

ACES_85201-0605

ACES_85201-0605 CONN@

CONN@

TP_CLK TP_DATA

2

3

D11

D11 @

@ PJDLC05_SOT23

PJDLC05_SOT23

1

SW3

SW3 SMT1-05-A_4P

SMT1-05-A_4P

3 4

Compal Electronics, Inc.

5

6

SW1

@SW1

@

SMT1-05-A_4P

5

6

1 2

of

36 53Monday, September 28, 2009

A

ON/OFF switch

Power Button

B

C

D

E

1 1

TOP Side

1 2

R341 10K_0603_5%@R341 10K_0603_5%@

1 2

R416 10K_0603_5%@R416 10K_0603_5%@

Bottom Side

ON/OFFBTN#<36>

ON/OFFBTN#

+3VALW

D17

2

1

DAN202UT106_SC70-3

3

R271

R271 100K_0402_5%

100K_0402_5%

1 2

51ON#

ON/OFF <35>

51ON# <41>

DDR3

0.1U_0402_16V4Z

R606

47K_0402_5%

21

0.1U_0402_16V4Z

12

1

2

+3VALW

13

D

2 2

EC_ON<35>

EC_ON

R268

10K_0402_5%

1 2

2

G

D

Q19

2N7002_SOT23

S

D33

CH751H-40PT_SOD323-2

R609 0_0402_5%

+3VALW

R610 10K_0402_5%

1 2

R608 0_0402_5%R608 0_0402_5%

1 2

@

1 2

@

PM_SLP_S4#<27,35> SM_PWROK <8>

+1.5VPGOOD<45>

D33

0.1U_0603_25V7K

+3VALW +1.5V

2

U42A

SN74LVC14APWLE_TSSOP14

1

14

P

1

O2I

G

7

2N7002W-T/R7_SOT323-3

C932

C931

R607

R607 10K_0402_5%

10K_0402_5%

Q57

Q57 2

G

1 2

13

D

S

Time delay 1RC Time

Power ON Circuit

+3VS

12

R349

180K_0402_5%

D18

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2 @

@

3 3

R353 10K_0402_1%

10K_0402_1%

SUSP#<35,40,45,46,49>

4 4

1 2

SUSP#

SUSP

2N7002_SOT23

D30

SUSP<40>

For HM51

21

1U_0603_10V6K

@R353

@

2

G

Q31

@

R560 200K_0402_5%@R560 200K_0402_5%@

1 2

@D30

@

RB751V_SOD323

@

2

C408

1

@

13

D

0.1U_0402_16V4Z @

S

21

2

1

U19A

U19A SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

14

P

1

O2I

G

7

@

+3VS

+3VALW +3VALW

12

R352

10K_0402_1%@

C409

+3VALW +3VALW

14

11

7

@

C881

@C881

@

0.22U_0603_16V7K

14

P

5

2

G

7

@

1

C407

@

0.1U_0402_16V4Z

1 2

U19E

U19E SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

P

O10I

G

Pre-MP 9/17

A

+3VALW+3VALW

U19B

U19B SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

14

P

3

O4I

G

7

@

U19C

U19C SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

O6I

U19F

14

SN74LVC14APWLE_TSSOP14

P

13

O12I

G

7

@

B

SYS_PWROK

For South Bridge

U19D

14

SN74LVC14APWLE_TSSOP14

P

9

O8I

G

7

@

1 2

R348 0_0402_5%@R348 0_0402_5%@

For +VCCP/+1.05VS

@

1 2

R561 0_0402_5%

SUSP#

R562 0_0402_5%R562 0_0402_5%

For +VGA_CORE

1 2

EC_PWROK <27,35>VR_ON<27,35,47>

VS_ON <45,49>

C880

0.1U_0402_16V4Z@

VGA_ON <48,49>

C

Compal Secret Data

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

D

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

SCHEMATIC,MB A4853

Size Document Number Rev

B

401817

Date: Sheet

S4

1.5V

POWER OK

For South Bridge

Compal Electronics, Inc.

E

A

of

37 53Monday, September 28, 2009

A

1 1

BEEP#<35>

SB_SPKR<27>

2 2

3 3

1U_0402_6.3V4Z

Sense Pin Impedance Codec Signals

39.2K

SENSE A

20K 10K

B

C508

1 2

C505

1 2

MIC_PLUG#<39>

HP_PLUG#<39>

PORT-B (PIN 21, 22)

+VDDA

+3VS

12

2 1

R594 10K_0402_5%R594 10K_0402_5%

D32 CH751H-40PT_SOD323-2D32 CH751H-40PT_SOD323-2

C

R421

C

2

B

E

12

2 1

+VDDA

R431 1K_0402_1%R431 1K_0402_1%

R420

1 2

560_0402_5%

R417

1 2

560_0402_5%

10K_0402_5%

R428 20K_0402_1%R428 20K_0402_1% R433 5.11K_0402_1%R433 5.11K_0402_1%

C

12

R419

R419 10K_0402_5%

10K_0402_5%

1 2

C507 1U_0402_6.3V4ZC507 1U_0402_6.3V4Z

12

R424

R424 10K_0402_5%

10K_0402_5%

C514

1 2

1U_0402_6.3V4Z

1

3

D21

D21 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

1 2

R425

Q38

Q38 2SC2411KT146_SOT23-3

2SC2411KT146_SOT23-3

MONO_IN

2.4K_0402_1%

Change D21 from RB751 to CH751

L27

1 2

FBM-L11-160808-800LMT_0603

10U_0805_10V4Z

INT_MICINT_MIC_R

12

MIC1_L<39> MIC1_R<39>

12 12

EAPD<35>

0.1U_0402_16V4Z

1

C517

C529

2

1 2

C515 4.7U_0805_6.3V6KC515 4.7U_0805_6.3V6K

1 2

C518 4.7U_0805_6.3V6KC518 4.7U_0805_6.3V6K

MIC2_VREFO

MIC1_L MIC1_R

1 2

C522 4.7U_0805_6.3V6KC522 4.7U_0805_6.3V6K

1 2

C523 4.7U_0805_6.3V6KC523 4.7U_0805_6.3V6K

HDA_RST_AUDIO#<26> HDA_SYNC_AUDIO<26>

HDA_SDOUT_AUDIO<26>

SENSE_A SENSE_B

1 2

R427 0_0402_5%R427 0_0402_5%

1

2

0.1U_0402_16V4Z

MIC2_C_L MIC2_C_R

MIC1_C_L MIC1_C_R MONO_IN

D

HD Audio Codec

+AVDD_HDA

40mil

1

C528

U26

AVDD125AVDD2

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

LINE1_VREFO

20

LINE2_VREFO

19

MIC2_VREFO

21

MIC1_L

22

MIC1_R

12

PCBEEP_IN

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

48

SPDIFO1

4

DVSS1

7

DVSS2

38

ALC272-GR_LQFP48_7X7

2

DGND

10mil

1

DVDD

LOUT1_L

LOUT_R

LOUT2_L

LOUT2_R

SPDIFO2

DMIC_CLK1/2

DMIC_CLK3/4

BITCLK

SDATA_IN

MONO_OUT

CBP

CPVEE

MIC1_VREFO

HPOUT_R

CBN

VREF

JDREF

HPOUT_L

AVSS1 AVSS2

0.1U_0402_16V4Z

10mil

9

DVDD_IO

35 36 39 41 45 46 43

NC

44

6

8 37 29 31 28 32 30 27 40 33 26

42

E

L28

+5VS

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805 L29

L29 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

1

C509

2

0.1U_0402_16V4Z

AMP_LEFT AMP_RIGHT

1 2

R422 0_0402_5%R422 0_0402_5%

HDA_SDIN0_AUDIO

C524

1 2

10mil

HP_RIGHT

CODEC_VREF

HP_LEFT

AGND

1 2

1

C510

2

1

C512

2

10U_0805_10V4Z

1 2

R423 33_0402_5%R423 33_0402_5%

2.2U_0402_6.3VM

MIC1_VREFO_L

10mil

+3VS_DVDD

1

C506

C506 10U_0805_10V4Z

10U_0805_10V4Z

2

+1.5VS_DVDD

C513

1 2

1

2

12

R429

20K_0402_1%

F

+5VAMP

1 2

C511

C511 22P_0402_50V8J

22P_0402_50V8J

C525

2.2U_0402_6.3VM

1

C527

C526

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

2

L25

L25 MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

R239

R239 0_0805_5%

0_0805_5%

1 2

L26 MBK1608121YZF_0603

AMP_LEFT <39> AMP_RIGHT <39>

C544

1

2

@

For EMI

HDA_BITCLK_AUDIO <26>

HDA_SDIN0 <26>

1

2

0.1U_0402_16V4Z

G

1 2

R441 0_0805_5%R441 0_0805_5%

U27

60mil 40mil

C545

0.1U_0402_16V4Z

U27

1

IN

2

GND

3

SHDN

G9191-475T1U_SOT23-5

G9191-475T1U_SOT23-5 @

@

(output = 300 mA)

+3VS

+1.5VS

15mil

INT_MIC_R

SM05T1G_SOT23-3

1 2

R466 0_0805_5%R466 0_0805_5%

1 2

R437 0_0805_5%R437 0_0805_5%

1 2

R426 0_0805_5%R426 0_0805_5%

OUT

15mil

INT_MIC_R

D3

@

HP_RIGHT HP_LEFT

BYP

5

4

3

1

MIC2_VREFO

12

1

2

HP_RIGHT <39> HP_LEFT <39>

R430

2.2K_0402_5%

C519

C519 220P_0402_50V7K

220P_0402_50V7K

H

4.75V

+VDDA

1 2

C531

0.01U_0402_25V7K

JMIC2

1

2

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001 CONN@

CONN@

1 2

R438 0_0805_5%R438 0_0805_5%

1 2

R434 0_0805_5%R434 0_0805_5%

1 2

R435 0_0805_5%R435 0_0805_5%

5.1K

4 4

SENSE B

A

39.2K 20K 10K

5.1K

PORT-H (PIN 32,33)

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2009/07/01 2010/07/01

E

Compal Secret Data

Deciphered Date

F

GND GNDA

Title

Size Document Number Rev

B

401817

Date: Sheet

G

Compal Electronics, Inc.

SCHEMATIC,MB A4853

GND GNDA

of

38 53Monday, September 28, 2009

H

A

B

C

D

E

+5VAMP

C562

10U_0805_10V4Z

1 1

C542 0.47U_0603_10V7KC542 0.47U_0603_10V7K

1 2

AMP_RIGHT<38>

AMP_LEFT<38>

1 2

C561 3900P_0402_50V7KC561 3900P_0402_50V7K

1 2

C530 3900P_0402_50V7KC530 3900P_0402_50V7K

1 2

R465 0_0603_5%R465 0_0603_5%

C543 0.47U_0603_10V7KC543 0.47U_0603_10V7K

1 2

R458 0_0603_5%R458 0_0603_5%

AMP_C_RIGHT

AMP_C_LEFT

U29

7

17

9

5

RIN+

RIN-

LIN+

LIN-

16

15

6

VDD

PVDD1

PVDD2

ROUT+

GAIN0 GAIN1

ROUT-

LOUT+

LOUT-

0.1U_0402_16V4Z

1

C541

2

2 3

18

14

4

8

1

2

GAIN0 GAIN1

SPKR+

SPKR-

SPKL+

SPKL-

R440

100K_0402_5%

R457

@ R457

@

100K_0402_5%

12

10 dB

+5VAMP

12

R439

@ R439

@ 100K_0402_5%

100K_0402_5%

12

R456

R456 100K_0402_5%

100K_0402_5%

SPKL+ SPKL-

20mil

SPKR+ SPKR-

20mil

Int. Speaker Conn.

R23 0_0603_5%R23 0_0603_5%

1 2

R24 0_0603_5%R24 0_0603_5%

1 2

PJDLC05_SOT23-3

R85 0_0603_5%R85 0_0603_5%

1 2

R86 0_0603_5%R86 0_0603_5%

1 2

PJDLC05_SOT23-3

3

D5

@

3

D8

@

JSPK1

SPK_L+ SPK_L-

2

1

SPK_R+ SPK_R-

2

1

JSPK1

1

2

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001 CONN@

CONN@

JSPK2

1

2

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001 CONN@

CONN@

Left

Right

HPF 600Hz

12

NC

10

Keep 10 mil width

2

C554

0.47U_0603_10V7K

1

HP_RIGHT<38> HP_LEFT<38>

HP_LEFT

1 2

R462 56.2_0402_1%R462 56.2_0402_1%

1 2

R454 56.2_0402_1%R454 56.2_0402_1%

HPOUT_R_1

C553

330P_0402_50V7K

20mil

1 2

L43 FBM-11-160808-700T_0603L43 FBM-11-160808-700T_0603

1 2

L38 FBM-11-160808-700T_0603L38 FBM-11-160808-700T_0603

330P_0402_50V7K

2

330P_0402_50V7K

1

LINE Out/Headphone Out

JHP1

8

2

C552

1

HP_PLUG#<38>

HPOUT_R_2HP_RIGHT HPOUT_L_2HPOUT_L_1

HP_PLUG#

7

5 4 3

6 2 1

SINGA_2SJ-E351-S03

SINGA_2SJ-E351-S03 CONN@

CONN@

GND5

20

BYPASS

GND41GND311GND213GND1

TPA6017A2_TSSOP20

EC_MUTE#<35>

2 2

EC_MUTE#

19

SHUTDOWN

21

3 3

Change D24,D28 from RB751 to CH751

MIC1_R<38> MIC1_L<38>

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1 2

R455 1K_0603_1%R455 1K_0603_1%

1 2

R436 1K_0603_1%R436 1K_0603_1%

Compal Secret Data

2009/07/01 2010/07/01

Compal Secret Data

Deciphered Date

MIC1_VREFO_L MIC1_VREFO_L

R452

4.7K_0402_5%

4.7K_0402_5% FBM-11-160808-700T_0603

C550

220P_0402_50V7K

FBM-11-160808-700T_0603 FBM-11-160808-700T_0603

FBM-11-160808-700T_0603

1 2

L37

1 2

L36

21

D24

D24 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

4.7K_0402_5%

1

220P_0402_50V7K

2

D

R453

C551

21

D28

D28 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

MIC_PLUG#<38>

MIC2_R_1 MIC2_L_1

1

2

Date: Sheet

MIC JACK

JMIC1

JMIC1 8 7

MIC_PLUG#

5 4 3

6 2 1

SINGA_2SJ-E351-S01

CONN@

(HDA Jack)

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

E

of

39 53Monday, September 28, 2009

A

B

C

D

E

+5VALW TO +5VS +3VALW TO +3V_SB(ICH8M AUX Power)

+5VALW

U15

8

S

D

7

S

D

6

S

D

5

1

C439

100P_0402_50V8J

2

1 1

C117

2

1000P_0402_50V7K

+VSB

C362

C362 10U_0805_10V4Z

10U_0805_10V4Z

SUSP

1

C363

2

10U_0805_10V4Z

R299

R299 33K_0402_5%

33K_0402_5%

1

2

12

2

G

D

AP4800_SO8

R558

R558 200K_0402_5%

200K_0402_5%

13

D

Q47

S

2N7002_SOT23

G

1 2 3 4

12

+5VS

1

C379

C379 10U_0805_10V4Z

10U_0805_10V4Z

2

5VS_GATE

9/1 For PVT2

1

C351

0.1U_0603_25V7K

2

1

C361

C318

2

1U_0603_10V4Z

100P_0402_50V8J

1

1000P_0402_50V7K

2

1

C116

2

1 2

13

D

Q48

S

@

@ 2N7002_SOT23

2N7002_SOT23

R298

R298 @

@ 470_0603_5%

470_0603_5%

SUSP

2

G

+VSB

+3VALW TO +3VS

+3VALW

U22

8

S

D

7

S

D

6

S

D

1

C430

C429

10U_0805_10V4Z

+VSB

2

10U_0805_10V4Z

R365

R365 270K_0402_5%

270K_0402_5%

SUSP

2 2

9/1 For PVT2

5

1

2

12

13

D

2

G

Q46

S

2N7002_SOT23

D

AP4800_SO8

3VS_GATE

G

1 2 3 4

+3VS

1

C437

C437 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C391

0.1U_0603_25V7K

2

1

C436

2

1U_0603_10V4Z

R385

R385 470_0603_5%

470_0603_5%

1 2 13

D

G

Q32

S

2N7002_SOT23

1

C309

C309 10U_0805_10V4Z

10U_0805_10V4Z

2

SUSP

2

+VSB

R266

R266 510K_0402_5%

510K_0402_5%

SUSP

+1.8V to +1.8VS

+1.8V

1

C884

@

2

10U_0805_10V4Z

@R275

@

SUSP

2N7002_SOT23

1

@

2

12

13

D

@

2

Q54

G

S

ACIN

C882

3 3

10U_0805_10V4Z

+VSB

C882

R275 200K_0402_5%

200K_0402_5%

U40

8

D

7

D

6

D

5

D

AP4800_SO8@

1.8VS_GATE

12

@ R586

@

13

2

G

Q55

Q55 2N7002_SOT23

2N7002_SOT23 @

@

6.988A

S S S G

R586

2.2M_0402_5%

D

S

1 2 3 4

1

@

2

+1.8VS

1

C886

@

10U_0805_10V4Z

2

C885

0.1U_0603_25V7K

1

@

@ C883

C883

2

1U_0402_6.3V4Z

1 2 13

D

S

R337

470_0603_5%

SUSP

2

G

Q53

2N7002_SOT23

For HM51

4 4

Pre-MP 9/17

J3

2

A

112

JUMP_43X118

B

+1.8V +1.8VS

ACIN<18,27,35,41,44>

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VALW

1

C226

2

10U_0805_10V4Z

12

R199

R199 200K_0402_5%

200K_0402_5%

SBPWR_EN#

2

G

Q50

Q50 2N7002_SOT23

2N7002_SOT23

+1.5V to +1.5VS

+1.5V

1

C313

2

10U_0805_10V4Z

12

2

G

Q52

Q52 2N7002_SOT23

2N7002_SOT23

Issued Date

8 7 6 5

13

D

S

1 2

R244

R244 0_0805_5%

0_0805_5%

U12

8

D

7

D

6

D

5

D

AP4800_SO8

1.5VS_GATE

13

D

S

2

G

Q29

Q29 2N7002_SOT23

2N7002_SOT23 @

@

C

1 2 3 4

1

2

C315

C315 10U_0805_10V4Z

10U_0805_10V4Z

1

C314

0.1U_0603_25V7K

2

+3V

1

C176

C176 10U_0805_10V4Z

10U_0805_10V4Z

2

C195

0.1U_0603_25V7K

+1.5VS

1

C310

2

1U_0603_10V4Z

1

C177

2

1U_0603_10V4Z

1

2

D

S

R267

R267 470_0603_5%

470_0603_5%

1 2

13

D

Q51

S

R198

470_0603_5%

1 2

13

G

Q49

Q49 2N7002_SOT23

2N7002_SOT23

SUSP

2

G

2N7002_SOT23

U10

D D D D

AP4800_SO8

3V_GATE

@

S S S G

12

13

D

S

S S S

G

1 2 3 4

R297

2.2M_0402_5%

2.2M_0402_5% @

@

Reserve for EMI request

+1.5V +1.5V B+ B++ +1.05VS +3VS

1

C563

C563 @

@

0.1U_0402_16V4Z

2

+1.5V

R612

R612 470_0603_5%

470_0603_5%

1 2 13

D

2

G

Q59

S

2N7002_SOT23

Compal Secret Data

2009/07/01 2010/07/01

Compal Secret Data

+1.05VS +1.8V+0.75VS

R283

R283 470_0603_5%

470_0603_5%

1 2 13

D

G

Q24

S

2N7002_SOT23

Deciphered Date

SYSON#<34>

SBPWR_EN#

2

R611

R611 470_0603_5%

470_0603_5% @

@

1 2 13

D

S

1

C565

C565 @

@

0.1U_0402_25V4K

2

G

Q58

Q58 2N7002_SOT23

2N7002_SOT23 @

@

1

C564

C564 @

@

0.1U_0402_16V4Z

2

SUSP SUSP SYSON#

2

D

SYSON<35,45,46>

SUSP#<35,37,45,46,49>

SBPWR_EN#<28>

SBPWR_EN<35>

Title

Size Document Number Rev

B

Date: Sheet

SYSON#

SYSON

R284

100K_0402_5%

SUSP<37>

R286

10K_0402_5%

R288

R288 100K_0402_5%

100K_0402_5%

1

C566

C566 1000P_0402_50V7K

1000P_0402_50V7K

2

R259

R259 470_0603_5%@

470_0603_5%@

1 2 13

D

2

G

Q16

S

2N7002_SOT23

Compal Electronics, Inc.

401817

SUSP

+5VALW

R287

R287 100K_0402_5%

100K_0402_5%

1 2

61

Q26A

2

2N7002DW-T/R7_SOT363-6

+5VALW

1 2

3

5

4

+5VALW

R300

R300 100K_0402_5%

100K_0402_5%

1 2

13

2

G

Q27

Q27 2N7002_SOT23

2N7002_SOT23

1

C567

C567 @

@

0.1U_0402_16V4Z

2

2N7002DW-T/R7_SOT363-6

R285

R285 100K_0402_5%

100K_0402_5%

Q26B

Q26B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

D

S

1

C568

C568 @

@

0.1U_0402_16V4Z

2

+1.1VS

R587

R587 470_0603_5%

470_0603_5%

1 2 13

D

SUSPSYSON#

2

G

Q56

S

2N7002_SOT23

12

SBPWR_EN#

12

DDR3DDR3

@

For HM51

SCHEMATIC,MB A4853

40 53Monday, September 28, 2009

E

A

of

A

B

C

D

1 1

2 2

3 3

+CHGRTC

4 4

DC231000500

<36,38>

560_0603_5%

SINGA_2DC-G756I200

CHGRTCP

DC_IN_S1

12

+RTCBATT

PD3

LL4148_LL34-2

PR12

200_0603_5%

1 2

100K_0402_1%

PR14

22K_0402_1%

1 2

PR13

1

2

G

G G

G

3

PJP1

PBJ1

-+

ML1220T13RE

BATT+

51ON#<37>

RTCVREF

PR17

PR16

1 2

PR17

560_0603_5%

1 2

3.3V

12

PC9

PC9 10U_0805_10V4Z

10U_0805_10V4Z

+RTCBATT

12

G920AT24U_SOT89-3

3

OUT

TP0610K-T1-E3_SOT23-3

N1

12

PC7

0.22U_1206_25V7K

PU2

2

IN

GND

1

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

PQ1

12

PR15

PR15 200_0603_5%

200_0603_5%

N2

12

PC10

PC10 1U_0805_25V4Z

1U_0805_25V4Z

SMB3025500YA_2P

12

68_1206_5%

13

2

PL1

1 2

PC2

100P_0402_50V8J

VIN

<38>

PD2

LL4148_LL34-2

1 2 12

PR10

12

PC8

0.1U_0603_25V7K

12

PR11

PR11 68_1206_5%

68_1206_5%

12

PC3

100P_0402_50V8J

VS

VIN

<38>

12

PC4

1000P_0402_50V7K

<38>

12

PR2

@PR2

@

10K_0402_5%

PR6

0_0402_5%

ACIN<18,27,35,40,44>

1 2

10K_0402_5%

PR8

12

PR4

10K_0402_1%

1 2

PD1

PD1 GLZ4.3B_LL34-2

GLZ4.3B_LL34-2

Min. Typ Max. H-->L 16.976V 17.525V 17.728V L-->H 17.430V 17.901V 18.384V

PJ1

+3VALWP +3VALW

PC130

+5VALWP

+VSBP +VSB

+1.05VSP +1.05VS

+1.05VSP +1.05VS +1.5V+1.5VP

2

12

1000P_0402_50V7K

2

112

JUMP_43X118

PC100

680P_0402_50V7K

PJ3

112

JUMP_43X118

PJ5

112

JUMP_43X39

PJ7

112

JUMP_43X118

PJ9

2

112

JUMP_43X118

12

PC131

100P_0402_50V8J

1M_0402_1%

1M_0402_1% 1 2

1

PU1A

LM358DT_SO8

Vin Dectector

+5VALW

PR1

<38>

PC6

0.1U_0603_25V7K

PR9

1 2

12

VINVIN

12

PJ16

2

JUMP_43X118

PJ18

2

JUMP_43X118

PJ17

2

JUMP_43X118

2

PR3

84.5K_0402_1%

12

PR7

20K_0402_1%

RTCVREF

112

PJ2

112

JUMP_43X118

PJ4

112

JUMP_43X79

PJ6

112

JUMP_43X118

PJ8

112

JUMP_43X118

PC5

PC5 1000P_0402_50V7K

1000P_0402_50V7K

+1.1VS

+VGA_CORE

+0.75VS+0.75VSP

+1.5V+1.5VP

VS

PR5

8

P

0

G

4

PR5 22K_0402_5%

22K_0402_5%

1 2

3

+

2

-

10K_0402_5%

+1.1VSDGPU

+VGA_COREP

+1.8VP +1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/17 2009/07/17

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

D

of

41 53Monday, September 28, 2009

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 90 degree C Recovery at 70 degree C

2009_08_06 (0603->0402) PCBfootprint for Layout

<38>

Change P/N for 0402-100K

VMB

PL2

1 1

PJP2

1

2

3

4

5

6

7

8

GND

9

GND

SUYIN_200045MR007G180ZR_7P-T

BATT_S1

EC_SMCA EC_SMDA

100_0402_1%

PR21

PR22

PR22 100_0402_1%

100_0402_1%

1 2

12

PR27

PR27 1K_0402_1%

1K_0402_1%

PR25

6.49K_0402_1%

SMB3025500YA_2P

1 2

12

PC12

PC12 1000P_0402_50V7K

1000P_0402_50V7K

12

PL2

BATT+

<35,38>

12

PC13

0.01U_0402_25V7K

+3VALWP

100K_0402_1%_NCP15WF104F03RC

12

PC14

0.22U_0603_16V7K

VL

12

PH1

PR23

11.3K_0402_1%

PR20

18K_0402_1%

1 2

PC11PC11

TM_REF1

12

PC15

1000P_0402_50V7K

12

PR26

PR26 100K_0402_1%

100K_0402_1%

VL

100K_0402_1%

100K_0402_1% 1 2

8

3

P

+

2

-

G

LM393DG_SO8

4

PR24

100K_0402_1%

O

12

PR19

PU3A

VL

PR18

PR18 100K_0402_1%

100K_0402_1%

1 2

PD4

12

1

VL

LL4148_LL34-2

2

13

PQ2

PQ2 DTC115EUA_SC70-3

DTC115EUA_SC70-3

MAINPWON <26,43>

2 2

VMB

<38>

BATT_TEMP <35>

EC_SMB_CK1 <35>

EC_SMB_DA1 <35>

PH2 near main Battery CONN :

BAT. thermal protection at 90 degree C Recovery at 70 degree C

2009_08_06 (0603->0402) PCBfootprint for Layout

VL

Change P/N for 0402-100K

PJP3

1

3

5

7

EC_SMCA

3 3

<36,37,38,39,40,42>

7

9

11

13

15

17

19

SUYIN_200109MS020G209ZR

B+

VL

PR34

100K_0402_1%

SPOK<43>

100K_0402_1%

1 2

A

PR35

PR35 0_0402_5%

0_0402_5%

1 2

12

PC19

@

4 4

2 4 6

8 10 12 14 16 18 20

13

D

2

G

S

0.1U_0402_16V7K

2 4 6 8 10 12 14 16 18 20

12

PR30

100K_0402_1%

PR32

22K_0402_1%

1 2

PQ4

PQ4 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

EC_SMDA

12

TP0610K-T1-E3_SOT23-3

PC16

@

0.22U_1206_25V7K

PQ3

100K_0402_1%_NCP15WF104F03RC

PC18

@PC18

@

0.22U_0603_16V7K

13

2

B

12

PC17

@

+VSBP

0.1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/17 2009/07/17

VL

12

PH2

@ PH2

@

PR31

13.7K_0402_1%@

13.7K_0402_1%@ 1 2

12

PR33

@PR33

@

15.4K_0402_1%

Compal Secret Data

Deciphered Date

C

TM_REF1

@PR29

@

47K_0402_1%

1 2

VL

5

+

6

-

PR29

8

P

O

G

PU3B

LM393DG_SO8

4

PR28

@PR28

@ 47K_0402_1%

47K_0402_1%

1 2

PD5

@PD5

@ LL4148_LL34-2

LL4148_LL34-2

7

Date: Sheet

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

D

42 53Monday, September 28, 2009

A

of

<36,37,38,39,40,42>

5

4

3

2

1

ISL6237_B+

PR38

2.2_0603_5%

PC31

0.1U_0603_25V7K

1 2

PC36 0.22U_0603_10V7KPC36 0.22U_0603_10V7K

PR51

@PR51

@ 0_0402_5%

0_0402_5%

PR56

@PR56

@ 47K_0402_5%

47K_0402_5%

1 2

0.047U_0603_16V7K

0.047U_0603_16V7K PC39

PC39

12

PR36

0_0805_5%

1 2

PC26

0.1U_0603_25V7K

DH3

BST3A

12

LX3

DL3

FB3

VL

2VREF_ISL6237

1 2

PR52

0_0402_5%

1 2

2VREF_ISL6237

33 26 24

25

23

30

32

20

14

27

1 2

PU4

1

8

4

6

VIN

TP DRVH2 VBST2

LL2

DRVL2

VOUT2

REFIN2

VREF2

LDOREFIN

NC

EN_LDO

EN1

EN2

VREF3

5

PC38

1 2

1U_0603_10V6K

1 2

PC27

1U_0603_10V6K

3

V5FILT

TONSE

2

12

PR54

PR54 0_0402_5%

0_0402_5%

VL

12

PC28

7

4.7U_0805_6.3V6K

19

LDO

V5DRV DRVH1

VBST1

LL1

DRVL1

PGND

VOUT1

FB1

VSW

SKIPSEL

PGOOD2

PGOOD1

TRIP1

TRIP2

GND

SN0806081RHBR_QFN32_5X5

21

DH5

15

BST5A

17

LX5

16

DL5

18

22

10

FB5

11

9

29

28

13

ILM1

12

ILIM2

31

12/25_DVT_EMI

FBMA-L11-322513-151LMA50T_1210

PC29

1U_0603_10V6K

1 2

PR39 2.2_0603_5%PR39 2.2_0603_5%

PC32

0.1U_0603_25V7K

PR45 0_0402_5%@PR45 0_0402_5%@

PR46 0_0402_5%PR46 0_0402_5%

1 2

12

1 2

12

330K_0402_1%

PR49

PR50

PQ6

AO4466_SO8

PQ8

AO4712_SO8

12

578

3 6

578

3 6

VL

241

PC23

PR41

PC34

SPOK <42>

12

PC24

4.7U_1206_25V6K

10UH_1164AY-100M=P3_4.7A_20%

12

4.7_1206_5%

12

680P_0402_50V7K

PC25

4.7U_1206_25V6K

PL3

12

2200P_0402_50V7K

12

+5VALWP Ipeak=6.97A ; Imax=0.7*Ipeak=4.879A Choke DCRmax=33.6m ohm, DCRtyp=28m ohm Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(5E-06 * 330K)/10=165mV

12

100P_0402_50V8J

PC128

@

PR42

61.9K_0402_1%

1 2

PR44

10K_0402_1%

1 2

12

PC129

1000P_0402_50V7K

ISL6237_B+

PL15

+5VALWP

1

+

PC35

PC35 220U_6.3V_M

220U_6.3V_M

2

PJ10

JUMP_43X118

2

ISL6237_B+

PL14

FBMA-L11-322513-151LMA50T_1210

1 2

112

PC20

10UH_1164AY-100M=P3_4.7A_20%

1 2

PR40

PR40 0_0402_5%

0_0402_5%

1 2

PR43

@PR43

@ 10K_0402_1%

10K_0402_1%

1 2

1SS355_SOD323-2

12

PC21

4.7U_1206_25V6K

PL4

680P_0402_50V7K

GLZ5.1B_LL34-2

VS

PD7

12

PC22

2200P_0402_50V7K

PR37

4.7_1206_5%

PC33

PD6

1 2

12

PC127

1 2

578

1000P_0402_50V7K

3 6

241

578

PQ7

PQ7 AO4712_SO8

AO4712_SO8

3 6

241

PR47

100K_0402_1%

PR48

200K_0402_5%

806K_0603_1%

PR55

0_0402_5%

PQ5

AO4466_SO8

1 2

PR53

12

PC37

0.22U_0603_25V7K

VL

1 2

B+

PL13

HCB4532KF-800T90_1812

D D

1 2

B++

12

PC126

100P_0402_50V8J

+3VALWP

1

+

PC30

330U_6.3V_M

C C

+3.3VALWP Ipeak=5.01A ; Imax=0.7*Ipeak=3.507A Choke DCRmax=33.6m ohm, DCRtyp=28m ohm Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(5E-06 * 330K)/10=165mV Ilimit=165mV/18m ~ 165mV/15m =9.167A ~ 11A Iocp=Ilimit+Delta I/2 =9.621A ~ 11.454A

B B

Delta I=0.9089A (Freq=300KHz)

330U_6.3V_M

2

MAINPWON<26,42>

Ilimit=165mV/18m ~ 165mV/15m

12

PC40

@PC40

@

0.047U_0402_16V7K

PQ9

A A

2

PQ9

TP0610K-T1-E3_SOT23-3

2VREF_ISL6237

=9.167A ~ 11A Iocp=Ilimit+Delta I/2 =9.627A ~ 11.460A Delta I=0.921A (Freq=400KHz)

1 3

5

4

Security Classification

2009/07/17 2009/07/17

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/17 2009/07/17

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

43 53Monday, September 28, 2009

of

1

of

A

PQ10

PQ10 AO4407A_SO8

VIN

<35>

12

PR58

3.3_1210_5%

1 1

12

PR61

3.3_1210_5%

12

PC50

2.2U_0805_25V6K

Place close to back to back MOS

24751_VREF

PR67

47K_0402_1%

1 2

13

D

2 2

PQ15

SSM3K7002FU_SC70-3

S

CP Point Setting

CP point=Iadapter*85%

90W adapter Vacset=3.3*(100K/(64.9K+100K))=2.001V

GND

CELLS

VREF

1 2

CELLS

2

G

Cells selector

PR68

@PR68

@ 0_0402_5%

0_0402_5%

3S/4S# <35>

3 Cell 4 Cell

1 2

PQ15_GATE

65W adapter R=(100K*100K)/(100K+100K)=50K

CP Point=(Vacset/Vvdac)*(0.1/PR56)=4.04A

24751_VREF 24751_VREF

Vacset=3.3*(50K/(50K+64.9K))=1.436V CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A

Input OVP : 22.3V

3 3

Input UVP : 17.26V Fsw : 300KHz

0.1U_0402_16V7K

0.1U_0402_16V7K ACOFF

BATT_OVP<35>

PR90

64.9K_0402_1%

24751_VREF ACSET

1 2

12

PR92

100K_0402_1%

4 4

100K_0402_1%

65W/90W#<35>

2

G

12

PR93

PR93 100K_0402_1%

100K_0402_1%

13

D

PQ23

PQ23 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PC65

1 2

PR73

100K_0402_1%

PR78

340K_0402_1%

10K_0402_1%

1 2

8 7

5

PR62

340K_0402_1%

1 2

ACDET

PR65

54.9K_0402_1%

1 2

PR69

PR69 340K_0402_1%

340K_0402_1%

PR70

54.9K_0402_1%

0.1U_0603_25V7K

12

2

G

12

PR85

AO4407A_SO8

100K_0402_1%

ACGOOD#

13

D

S

LM358DT_SO8

VBATT

1 2 36

4

1 2

12

PR71

12

PC63

12

PR74

200K_0402_1%

2

G

PQ18

PQ18 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PU1B

PU1B 7

0

Calibrate#

4.0V L=0

4.2V

CP setting

A

4.3V

4.35V

PQ11

PQ11 AO4407A_SO8

AO4407A_SO8 1 2 3 6

4

12

PR60

PC45

100K_0402_1%

0.01U_0402_25V7K

SI2301BDS-T1-E3_SOT23-3

PQ16

2

1 3

ACSET

PQ15_GATE

13

D

PQ17

PQ17 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

VS

12

PC67

0.01U_0402_25V7K

8

4

0.01U_0402_25V7K

5

P

+

6

-

G

1.8755V

2.8132V

H=3.3

VDAC=3.3

8 7

5

12

PC48

0.1U_0603_25V7K

1U_0603_10V6K

VMB

<36>

12

PR79

PR79 340K_0402_1%

340K_0402_1%

12

PR83

PR83 499K_0402_1%

499K_0402_1%

12

PR91

PR91 105K_0402_1%

105K_0402_1%

B

PR57

0.015_2512_1%

0.015_2512_1% 1 2

PC46

0.1U_0402_16V7K

0.1U_0402_16V7K 1 2

ACSET

0.47U_0603_16V7K

0.47U_0603_16V7K 1 2

OVPSET

24751_VREF

12

PC61

/BATDRV

12

B

C

B+

<36,37,38,39,40,42>

PJ11

4 3

CHGEN#

PU5

12

PC49

0.1U_0603_25V7K

ACN ACP

ACDRV

PC55

VADJ

PU5

1

CHGEN

2

ACN

3

ACP

4

ACDRV

5

ACDET

6

ACSET

7

ACOP

8

OVPSET

9

AGND

10

VREF

11

VDAC

12

VADJ

13

ACGOOD

14

BATDRV

BQ24751ARHDR_QFN28_5X5

HIDRV

LODRV

LEARN

CELLS

SRSET

IADAPT

PVCC

BTST

PH

REGN

PGND

SRP SRN

BAT

TP

PVCC

28

BTST

27

DH_CHG

26

LX_CHG

25

REGN

24

12

PC54

PC54 1U_0603_10V6K

1U_0603_10V6K

DL_CHG

23

22

21

CELLS

20

SE_CHG+

19

SE_CHG-

18 17

12

29

SRSET

16

PR75

10_0603_5%

1 2

15

PC66

100P_0402_50V8J

PR63

2.2_0603_5%

LI-4S :18.0V----BATT-OVP=2.001V BATT-OVP=0.1112*VMB(18) LI-3S :13.5V----BATT-OVP=1.5012V BATT-OVP=0.1112*VMB(13.5)

2

PC47

0.1U_0805_25V7K

1 2

PD8

12

LL4148_LL34-2

ACOFF <35>

PC62

0.1U_0603_25V7K

12

PJ11

112

JUMP_43X118

1 2

PC51

0.1U_0603_25V7K

ICHG setting

12

PR76

PR76 100K_0402_1%

100K_0402_1%

ADP_I <35>

REGN

100K_0402_1%

Per cell=4.5V

PC69

0.01U_0402_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CALIBRATE#<35>

Compal Secret Data

2009/07/17 2009/07/17

Compal Secret Data

Deciphered Date

PR86

@

C

CHG_B+

578

PQ13

PQ13 AO4466_SO8

AO4466_SO8

3 6

241

578

PQ14

PQ14 AO4466_SO8

AO4466_SO8

3 6

241

PR72

17.4K_0402_1%

12

PC64

@PC64

@

0.01U_0402_25V7K

0_0402_5%

SI2301BDS-T1-E3_SOT23-3

S

12

2

G

1 2

PC42

4.7U_1206_25V6K

10UH_PCMB104T-100MS_6A_20%

0.1U_0603_25V7K

12

PR81

@PR81

@

1 2

@

PQ20

D

G

2

13

D

PQ21

PQ21 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

1 2

PC43

1 2

12

PR66

4.7_1206_5%

12

PC56

680P_0402_50V7K

PC59

IREF <35>

13

@

1 2

4.7U_1206_25V6K

PL5

12

PR84

0_0402_5%

1 2

210K_0402_0.1%

D

12

PR59

PR59 100K_0402_1%

1 2

4 3

100K_0402_1%

12

PC60

@PC60

@

0.1U_0603_25V7K

36

578

12

241

PQ12

PQ12 AO4407A_SO8

AO4407A_SO8

PC52

10U_1206_25V6M

12

BATT+

PC53

PC41

0.01U_0402_25V7K

PC44

2200P_0402_25V7K

/BATDRV

PR64

0.02_2512_1%

0.02_2512_1% 1 2

12

PC57

10U_1206_25V6M

PC58

0.1U_0402_16V7K

0.1U_0402_16V7K 1 2

Icharge Setting

For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A For 2400mA, Icharge=0.8C=0.8*2.4*2=3.84A Icharge=(Vsrset/Vdac)*(0.1/PR64) IREF=((100k/(100K+17.4K))/3.3)*(0.1/0.02)=Icharge

IREF=0.7748*Icharge

24751_VREF

RTCVREF

PR77

@PR77

@

12

100K_0402_1%

24751_VREF

@

PR82

887K_0402_1%

@

PR87

PR88

1 2

EVT_02_03

Title

Size Document Number Rev

Custom

Date: Sheet

PR80

12

ACGOOD#

VADJ

EVT_02_03

12

499K_0402_0.1%

FSTCHG<35>

Compal Electronics, Inc.

401817

100K_0402_1%

1 2

13

100K_0402_1%

D

@

@ PQ19

PQ19

2

SSM3K7002FU_SC70-3

G

S

24751_VREF

@

PC68

1000P_0402_50V7K

SCHEMATIC,MB A4853

D

1 2

13

2

G

PR89

100K_0402_1%

D

PQ22

PQ22 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

44 53Monday, September 28, 2009

<35,36>

10U_1206_25V6M

ACIN <18,27,35,40,41>

CHGEN#

of

A

@

PR112

0_0402_5%

1 2

PR110

10K_0402_5%

1 2

PR104

0_0402_5%

1 2

@

300_0402_5%

1 2

1U_0603_10V6K

@

PR162

0_0402_5%

1 2

PR98

300_0402_5%

1 2

PC76

1U_0603_10V6K

PR106

PC83

12

@PC72

@

0.1U_0402_16V7K

12

PC79

0.1U_0402_16V7K

12

1 1

SUSP#

SYSON<35,40,46>

VFB=0.75V Vo=VFB*(1+PR116/PR117)=0.75*(1+10K/10K)=1.5V Ton=19*e-12*143000(((2/3)*Vo+100mV)/19)+50ns =2.645e-7 us =>Vo/Vin=D=Ton/Ts =>Ts=3.35us Fsw=262KHz

<Vo=1.5V> VFB=0.75V Vo=VFB*(1+PR116/PR117)=0.75*(1+10K/10K)=1.5V

2 2

Fsw=262KHz Cout ESR=15m ohm Rdson(max)=9m Rdson(min)=11.5m Ipeak=11.3A, 1.2Ipeak=13.56A ,Imax=7.91A Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=2.3969A =>1/2DeltaI=1.198A Vtrip=Rtrip*10uA=18K*10uA=0.18V Iocpmin=Vtrip/Rdsonmax*1.2+1.198 =0.075/(0.018*1.3)+1.198=13.98A Iocpmax=(0.075/(0.015*1.1))+1.198A=22.64A Iocp=13.98~22.64A

+5VALW

SUSP#<35,37,40,46,49>

3 3

VS_ON<37,49>

VFB=0.75V Vo=VFB*(1+PR108/PR109)=0.75*(1+12K/30K)=1.05V Ton=19*e-12*143000(((2/3)*Vo+100mV)/19)+50ns =2.645e-7 us =>Vo/Vin=D=Ton/Ts =>Ts=3.35us Fsw=261KHz(by caculation tool)

<Vo=1.05V> VFB=0.75V Vo=VFB*(1+PR108/PR109)=0.75*(1+12K/30K)=1.05V Fsw=261KHz Cout ESR=15m ohm Rdson(max.)=11.5m Rdson(min)=9m Ipeak=9A, Imax=Ipeak*0.7=6.3A Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=2.11A =>1/2DeltaI=1.055A Vtrip=Rtrip*10uA=15K*10uA=0.15V

4 4

Iocpmin=Vtrip/Rdsonmax*1.3+1.055 =0.15/(0.011*1.3)+1.055=11.0892A Iocpmax=(0.15/(0.009*1.1))+1.055A=16.2073A Iocp=11.0892A~16.2073A

A

+5VALW

PC72

B

PC75

@PC75

@

47P_0402_50V8J

1 2

PR116

10K_0402_1%

1 2

12

PR101

PR101 10K_0402_1%

10K_0402_1%

PC82

@PC82

@

47P_0402_50V8J

1 2

PR108

12K_0402_1%

1 2

PR109

PR109 30K_0402_1%

30K_0402_1%

1 2

B

C

PR95

300K_0402_5%

1 2

PC71

VBST_1.5VP-1

12

18K_0402_1%

PC71

0.1U_0603_25V7K

0.1U_0603_25V7K 1 2

+5VALW

PC74

4.7U_0805_10V6K

PR97

2.2_0603_5%

14

15

1

PU6

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

+1.5VPGOOD<37>

TP

EN_PSV

VFB=0.75V

GND7PGND

8

BST_1.5VP

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

2.2_0603_5%

1 2

DH_1.5VP LX_1.5VP

DL_1.5VP DL_1.5VP

12

PR99

Green outline (For DDR3 changed)

for HW pwr bdget updated

PR103

300K_0402_5%

1 2

PR105

2.2_0603_5%

14

15

1

PU7

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EN_PSV

VFB=0.75V

GND7PGND

Issued Date

TP

VBST

V5DRV

TPS51117RGYR_QFN14_3.5x3.5

8

BST_1.05VSP_1..5V

DH_1.05VSP_1..5V

13

DRVH

LX_1.05VSP_1..5V

12

LL

11

TRIP

10

DL_1.05V DL_1.05V

9

DRVL

2009/07/17 2009/07/17

2.2_0603_5%

1 2

12

PC78

0.1U_0603_25V7K

BST_1.05VSP_1..5V-1

1 2

+5VALW

12

PC81

4.7U_0805_10V6K

PR107

15K_0402_1%

Compal Secret Data

Deciphered Date

C

PQ24

AO4466_SO8

PQ26

AO4466_SO8

D

578

3 6

241

8

PQ25

D6D5D7D

FDS6670AS_NL_SO8

4

G

S

3

2

1

12

1.5VP_B+

PL6

1 2

1.8UH_SIL104R-1R8PF_9.5A_30%

PR160

4.7_1206_5%

PC119

PC119 680P_0402_50V7K

680P_0402_50V7K

<36,37,38,39,40,42>

PL16

FBMA-L11-322513-151LMA50T_1210

1 2

12

PC70

4.7U_1206_25V6K

1

+

PC73

PC73 330U_6.3V_M

330U_6.3V_M

2

B++

+1.5VP

<36,37,38,39,40,42>

PL12

@

12

4.7U_1206_25V6K

D

PL12

12

HCB4532KF-800T90_1812

PC1252200P_0402_50V7K

+1.05VSP

1

+

PC80

PC80 330U_D2E_2.5VM

330U_D2E_2.5VM

2

45 53Monday, September 28, 2009

578

3 6

241

8

D6D5D7D

PQ27

PQ27 FDS6670AS_NL_SO8

G

3

FDS6670AS_NL_SO8

S

2

1

12

PR161

4.7_1206_5%

12

PC120

PC120 680P_0402_50V7K

680P_0402_50V7K

4

1.05VSP_B+

PC77

PL7

1UH_PCMB103E-1R0MS_20A_20%

Date: Sheet

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

@

of

B+

12

PC1242200P_0402_50V7K

A

5

D D

316K_0402_1%

316K_0402_1% PR199

1 2

12

PC151

0.1U_0402_16V7K

PC154

1 2

10U_0805_10V4Z

PR199

1 2

PR201

0_0402_5%

PR200

402K_0402_1%

2

12

402K_0402_1%

12

PC152

0.1U_0402_25V6

PC153

C C

+5VALW

+1.8VP

PJ19

112

@

JUMP_43X79

4

PU13

1

EN/SYNC

FB

2

GND

3 4 5

GND

SW

IN

POK

BS

TP

MP2121DQ-LF-Z_QFN10_3X3

3

PR113

@PR113

@ 0_0402_5%

0_0402_5%

1 2

PR198

0_0402_5%

1 2

12

PC150

@PC150

@

0.1U_0402_16V7K

10 9 8 7 6 11

12

PD11

@

12

B340A_SMA2

SYSON <35,40,45>

SUSP# <35,37,40,45,49>

PL19

2.2UH_MSCDRI-74A-2R2M-E_6.5A_20%

1 2

PR202

4.7_1206_5%

PC157 680P_0603_50V7K

680P_0603_50V7K

22U_0805_6.3V6M

PC157

PC155

12

Cange TPS51117 to MP2121

+1.8VP

12

PC156

PC156 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Delete PJ12 & B++

1

FOR DDR3 demand

Green outline (For DDR3 changed)

+1.5V

PC91

PQ30

2

G

12

Issued Date

1

2

1 2

13

D

S

PJ14

JUMP_43X79

PR118

1K_0402_1%

PR120

1K_0402_1%

3

PU9

1

VIN

2

12

2009/07/17 2009/07/17

12

PC93

0.1U_0402_16V7K

GND

3

REFEN

4

VOUT

RT9173DPSP_SO8

+0.75VSP

12

FOR DDR3 demand

PC95

PC95 10U_0805_6.3V6M

10U_0805_6.3V6M

Compal Secret Data

Deciphered Date

VCNTL

GND

6 5

NC

7

NC

8

NC

9

12

2

+3VALW

PC92

PC92 1U_0603_6.3V6M

1U_0603_6.3V6M

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

of

46 53Monday, September 28, 2009

1

A

B B

4.7U_0805_6.3V6K

PR119

0_0402_5%

<35,40,45>

A A

5

SUSP

4

1 2

2N7002W-T/R7_SOT323-3

PC94

0.1U_0402_16V7K

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

D D

VGATE<8,16,27>

CLK_ENABLE#<16>

C C

CPU_VREF

CPU_CSP1

PR134 470_0402_1%PR134 470_0402_1%

CPU_CSN1

PR137 470_0402_1%PR137 470_0402_1%

CPU_CSN2

PR138 470_0402_1%PR138 470_0402_1%

CPU_CSP2

PR139 470_0402_1%PR139 470_0402_1%

B B

12

PC105

100P_0402_50V8J

12 12

PC113

100P_0402_50V8J

12

EVT_01_23

1 2

PR146

100_0402_1%

PC106 33P_0402_50V8JPC106 33P_0402_50V8J PC108 33P_0402_50V8JPC108 33P_0402_50V8J PC110 33P_0402_50V8JPC110 33P_0402_50V8J PC114 33P_0402_50V8JPC114 33P_0402_50V8J

12

VSSSENSE

PR123

PR123 0_0402_5%@

0_0402_5%@

1U_0402_6.3V6K

1 2

PR131

5.76K_0402_1%

5.76K_0402_1% CPU_DROOP

1 2

PC102 68P_0402_50V8JPC102 68P_0402_50V8J

CPU_VREF

1 2

PC103 0.22U_0603_10V7KPC103 0.22U_0603_10V7K

CPU_CSP1-2

1 2

CPU_CSN1-1

1 2

CPU_CSN2-1

1 2

CPU_CSP2-2

1 2

CPU_GNDSNS

CPU_VSNS

12

PR142

0_0402_5%

PR142

0_0402_5%

PR141

0_0402_5%

PR141

0_0402_5%

12

PR147

PR147 100_0402_1%

100_0402_1%

<5>

VCCSENSE

+CPU_CORE

1 2

PC101

CPU_THERM

12

PR143

PR143 20K_0402_1%

20K_0402_1%

<5>

10

1 2 3 4 5 6 7 8 9

12

DROOP VREF GND CSP1 CSN1 CSN2 CSP2 GNDSNS VSNS THERM

4

+3VS

12

PR122

PR121

10K_0402_1%

1.91K_0402_1%

@

+3VS +5VS

12

PR124

0_0402_5%

PR124

0_0402_5%

PR125

0_0402_5%

PR125

0_0402_5%

@

CPU_VREF

12

PR127 124K_0402_1%PR127 124K_0402_1%

PR128 0_0402_5%PR128 0_0402_5%

PR129 0_0402_5%PR129 0_0402_5%

CPU_V5FILT

40

41

GND

V5FILT

VR_TT#11DPRSTP#12PSI#13VID614VID515VID416VID317VID218VID119VID0

CPU_TRIPSEL

CPU_OSRSEL

CPU_ISLEW

CPU_TONSEL

36

39

38

37

35

ISLEW

TONSEL

OSRSEL

TRIPSEL

PWRMON

PU10

TPS51620RHAR_QFN40_6X6

VID5

VID6

PSI#

VID4

CPU_DPRSTP#

12

1 2

PR152 0_0402_5%PR152 0_0402_5%

PR150 0_0402_5%PR150 0_0402_5%

PR151 0_0402_5%PR151 0_0402_5%

<5>

<5,8,26> CPU_VID5

CPU_VID6

PR153 0_0402_5%PR153 0_0402_5%

<5>

CPU_VID4

PR149 0_0402_5%PR149 0_0402_5%

PSI#

H_DPRSTP#

VR_ON

12

PR130 0_0402_5%PR130 0_0402_5%

CPU_VR_ON

CPU_CLK_EN#

34

33

VR_ON

CLK_EN#

VID2

VID3

1 2

PR155 0_0402_5%PR155 0_0402_5%

PR154 0_0402_5%PR154 0_0402_5%

<5>

CPU_VID3

CPU_VID2

PM_DPRSLPVR

<27,35,37>

1 2

PR126 499_0402_1%PR126 499_0402_1%

CPU_DPRSLPVR

32

31

PGOOD DRVH1

DPRSLPVR

VBST

LL1

DRVL1

V5IN

PGND

DRVL2

LL2

VBST2

DRVH2

20

VID0

VID1

1 2

PR157 0_0402_5%PR157 0_0402_5%

PR156 0_0402_5%PR156 0_0402_5%

<5>

CPU_VID1

CPU_VID0

<8,27>

UGATE_CPU1

30

BOOT_CPU1

29

PHASE_CPU1

28

LGATE_CPU1

27 26

PC109 10U_0603_6.3V6MPC109 10U_0603_6.3V6M

25

LGATE_CPU2

24

PHASE_CPU2

23

BOOT_CPU2

22

UGATE_CPU2

21

<5>

1 2

PR135

1 2

2.2_0603_5%

PR140

1 2

2.2_0603_5%

3

+5VS

PD9

PD9 1SS355_SOD323-2

1SS355_SOD323-2

1 2

BOOT_CPU1-1

1 2

PC104

0.22U_0603_10V7K

+5VS

BOOT_CPU2-1

1 2

PC115

0.22U_0603_10V7K

1 2

PD10

PD10 1SS355_SOD323-2

1SS355_SOD323-2

+5VS

786

5

4

SI7686DP-T1-E3_SO8

5

4

2

+CPU_B+

12

PC96

10U_1206_25V6M

PQ31

PQ31 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

3 5

241 786

5

4

PQ32

123

SI4634DY-T1-E3_SO8

PQ34

786

4

PQ35

SI4634DY-T1-E3_SO8

123

12

PR158

4.7_1206_5%

12

PC117

PQ33

680P_0402_50V7K

123

SI4634DY-T1-E3_SO8

12

PC111

10U_1206_25V6M

3 5

241

786

5

123

12

PR159

4.7_1206_5%

12

PC118

PC118 680P_0402_50V7K

680P_0402_50V7K

PQ36

SI4634DY-T1-E3_SO8

PC97

PC98

10U_1206_25V6M

2200P_0402_50V7K

+CPU_B+

PC112

10U_1206_25V6M

12

PL10

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20% 1

CPU_CSP1-1

2

12

PR132

17.8K_0402_1%

1 2

PR136

28.7K_0402_1%

CPU_CSP1

PR133

69.8K_0402_1%

1 2

CPU_SN-1

1 2

PC107

0.033U_0402_16V7K

2009_08_06 (0603->0402) PCBfootprint for Layout Change P/N for 0402-100K

PL11

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20% 1

CPU_CSP2-1

2

12

PR144

17.8K_0402_1%

1 2

PR148

28.7K_0402_1%

CPU_CSP2

PR145

69.8K_0402_1%

1 2

CPU_SN-2

1 2

PC116

0.033U_0402_16V7K

PL9

HCB4532KF-800T90_1812

1 2

4 3

PH3

PH3 100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

CPU_CSN1

4 3

PH4

PH4 100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

CPU_CSN2

1

<36,37,38,39,40,42>

@

12

1

PC99

2

220U_25V_M

+

+CPU_CORE

PC122

PC122 2200P_0402_50V7K

2200P_0402_50V7K

B+

2009_08_06 (0603->0402) PCBfootprint for Layout Change P/N for 0402-100K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/17 2009/07/17

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

of

47 53Monday, September 28, 2009

1

5

PL17

B++

FBMA-L11-322513-201LMA40T_1210

1 2

B+ --> B++

D D

VGA_ON

37,49>

C C

B B

A A

B+_core

PR169

1 2

100K_0402_1%

10K_0402_5%@

+3VS

PR168

0.1U_0402_16V7K

12

PC132

10U_1206_25V6M

2.2U_0603_6.3V6K

1 2

12

PC139

PC136

12

6269_VCORE

12

PC133

10U_1206_25V6M

4

12

PC140

22P_0402_50V8J

EVT (for Compensation setting)

VGA_PWRSEL_0

0

11

8

PU11

3

VIN

4

VCC

5

EN

12

PR174

PR174 33K_0402_1%

33K_0402_1%

12

PC142

2200P_0402_25V7K

VGA_PWRSEL_1

0

1

01

2

1

16

GND

PHASE

PGOOD

ISL6268CAZ-T_SSOP16

COMP6FB7FSET

9

12

PR175

40.2K_0402_1%

M92-S2 XT

Core Voltage Level

1.20V

1.14V

0.96V

0.90V

LX_VCORE

DH_VCORE

BST_VCORE

15

UG

10

12

PR164

1 2

PR165

0_0603_5%

1 2

0_0603_5%

+5VS

12

PR166

PR166 0_0603_5%

0_0603_5%

1 2

4.7_0603_5%

BOOT

PVCC

PGND

VO

LG

ISEN

4.7_0603_5%

14

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K DL_VCORE

13

12

PR170

ISEN_VCORE

11

1 2

7.5K_0402_1%

EVT (for OCP setting)

VFB=0.6V

PC141

0.01U_0402_25V7K

PR167

1 2

3

DH_VCORE-1

1 2

PC134 0.1U_0603_25V7K

6269_VCORE

PC135

PQ39

SI7636DP-T1-E3_SO8

3 5

241

5

D

SI7636DP-T1-E3_SO8

4

G

S3S

S

2

1

Rds=4.8mOHM

PR190

20K_0402_1%

1 2

PQ42

13

D

2

G

2N7002W-T/R7_SOT323-3

S

PQ37

PQ37 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

PQ38

@PQ38

@

4

PR191

10K_0402_1%

1 2

12

PC149

0.022U_0402_25V7K

2

VGA_CORE

fsw=331.675kHz Ipeak=11.62A (from HW pwr budget) Imax=8.134A

1.2*Ipeak=13.944A Iocp setting must higher than 13.944A Cesr=9 mOHM Low side Rds(on)=4.8 mOHM DCR=3m OHM

DCR=3m OHM

PL18

0.56UH_ETQP4LR56WFC_21A_20%

0.56UH_ETQP4LR56WFC_21A_20% 1 2

12

5

D

G

S3S

2

14K_0402_1%

2K_0402_1%

S

1

PR176

PR197

PR192

@ PR192

@

10K_0402_1%

1 2

PQ43

@

12

@

PR172

4.7_1206_5%

PC138

PC138 680P_0603_50V7K

680P_0603_50V7K

12

+3VS

PR193

10K_0402_5%

1 2

PR194

13

D

S

10K_0402_1%

1 2

2

G

2N7002W-T/R7_SOT323-3

PR171

1 2

8.06K_0402_1%

PR177

80.6K_0402_1%

1 2

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3 PQ40

PQ40

13

D

10K_0402_1%

2

1 2

G

S

12

0.022U_0402_25V7K

2N7002W-T/R7_SOT323-3

+3VS

1 2

PR179

PC143

PR195

@PR195

@

10K_0402_5%

PR196

PR196 10K_0402_1%

10K_0402_1%

@

PQ41

PR180

@ PR180

@

10K_0402_1%

1 2

13

D

S

VGA_PWRSEL0 <18>

1

+3VS

PR182

PR182 10K_0402_1%

10K_0402_1%

1 2

2

G

PR178

10K_0402_5%

1 2

+3VS

10K_0402_5%

1 2

+VGA_COREP

PC137

1

+

2

PR181

@PR181

@

PR183

@PR183

@

10K_0402_1%

330U_V_2.5VM_R9M

VGA_PWRSEL1 <18>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/17 2009/07/17

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Custom Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

1

A

48 53Monday, September 28, 2009

A

of

5

D D

C C

4

3

2

1

+3VALW

+1.5V

1

PJ15

@PJ15

@

1

JUMP_43X79

2

B B

VGA_ON<37,48>

VS_ON<37,45>

SUSP#<35,37,40,45,46>

A A

5

1K_0402_1%

1 2

@ PR187

@ 1K_0402_1%

1K_0402_1%

1 2

10K_0402_1%

1 2

4

12

4.7U_0603_6.3V6K

PR185

PR187

PR188

@

0.1U_0402_10V7K

PC148

PC146

12

PC144

1U_0402_6.3V6K

PU12

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

12

PR189

22K_0402_5%

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

VOUT

4

VOUT

2

FB

GND

APL5913-KAC-TRL_SO8

1

Ien=10uA, Vth=0.3V, notice the res. and pull high voltage from HW

Issued Date

Vout=0.8*(1+(R1/R2))

PR184

FB=0.8V

3

PR184

1.54K_0402_1%

2009/07/17 2009/07/17

12

0.022U_0402_25V7K

12

PR186

4.02K_0402_1%

Compal Secret Data

PC145

Deciphered Date

+1.1VSDGPU

12

PC147

22U_0805_6.3V6M

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

of

49 53Monday, September 28, 2009

1

5

Version change list (P.I.R. List)

Page 1 of 3 of PWR

4

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

3

2

1

D D

2

3

Add snubber for EMI Add snubber for EMI 0.1 42 20080915 EVT

Shift PC99 from +cpu_B+ to B+ 420.1 20080915 EVTShift PC99 from +cpu_B+ to B+

4

5

6

7

8

C C

9

10

11

Charger feedback trace too long

Power sequence error

Load line over spec

3D hang

3D hang 0.2

EMI solution

+1.5VP: enable pin change from SUSP# to SYSON +0.9VSP: enable pin change from SUSP# to SUSP

PR131: change to 5.76K_0402_1%

Charger

+1.8VP

+1.05VSP

+5VALW/+3VALW PR37: Add 4.7_1206_5%

12

B B

PR135 and PR140 change to 0_0603_5% 420.1 PR135 and PR140 change to 0_0603_5% 20080915

ADD PC49

PR63:change to 2.2_0603_5% PR66:Add 4.7_1206_5%

PC56:Add 680P_0402_50V7K

PR97:change to 2.2_0603_5% PR160:Add 4.7_1206_5%

PC119:Add 680P_0402_50V7K

PR105:change to 2.2_0603_5%

PR161:Add 4.7_1206_5%

PC120:Add 680P_0402_50V7K

Add bead between B+ and 1.05VSP_B+

PR41: Add 4.7_1206_5% PC33: Add 680P_0402_50V7K

PC34: Add 680P_0402_50V7K PR38: change to 2.2_0603_5% PR39: change to 2.2_0603_5%

0.1 38 Add PC57 :10U_1206_25V_6M 20080902 EVTAdd PC57 :10U_1206_25V_6M

0.2

39 20080915Add PJ15 to B+ 0.1 Add PJ15 to B+

38

ADD PC49

+1.5VP: enable pin change from SUSP# to SYSON

40

+0.9VSP: enable pin change from SUSP# to SUSP

42

38

390.2

39

PR131: change to 5.76K_0402_1%

PR63:change to 2.2_0603_5% Charger PR66:Add 4.7_1206_5% PC56:Add 680P_0402_50V7K

+1.8VP

+1.05VSP

PR97:change to 2.2_0603_5% PR160:Add 4.7_1206_5%

PC119:Add 680P_0402_50V7K

PR105:change to 2.2_0603_5%

PR161:Add 4.7_1206_5% PC120:Add 680P_0402_50V7K

Add bead between B+ and 1.05VSP_B+

+5VALW/+3VALW PR37: Add 4.7_1206_5%

37

PR41: Add 4.7_1206_5% PC33: Add 680P_0402_50V7K

PC34: Add 680P_0402_50V7K PR38: change to 2.2_0603_5% PR39: change to 2.2_0603_5%

20081124

EVT

DVT

PR158: Add 4.7_1206_5% PR159: Add 4.7_1206_5%

PC117: Add 680P_0402_50V7K PC118: Add 680P_0402_50V7K

PR135: change to 2.2_0603_5% PR140: change to 2.2_0603_5%

PC122: Reserve 2200P_0402_50V7K on B+

PR105 : change to 2.2_0603_5% PL12 : Add HCB4532KF-800T90_1812

PC124: Reserve 2200P_0402_50V7K on B+ PC125: Reserve 2200P_0402_50V7K on B+

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

401817

20081124

SCHEMATIC,MB A4853

DVT

50 53Monday, September 28, 2009

of

1

of

A

39

42

+CPU CORE

+1.05VSP

13

16

17

EMI solution

+CPU CORE PR158: Add 4.7_1206_5%

EMI solution +CPU CORE

EMI solution

+1.05VSP

PR159: Add 4.7_1206_5% PC117: Add 680P_0402_50V7K

PC118: Add 680P_0402_50V7K PR135: change to 2.2_0603_5% PR140: change to 2.2_0603_5%

PC122: Reserve 2200P_0402_50V7K on B+

PR105 : change to 2.2_0603_5% PL12 : Add HCB4532KF-800T90_1812

PC124: Reserve 2200P_0402_50V7K on B+

0.2

PC125: Reserve 2200P_0402_50V7K on B+

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

5

Version change list (P.I.R. List)

Page 2 of 3 for PWR

4

3

2

1

Fixed IssueItem

D D

Charger

PQ20:Reserve(@)SI2301BDS-T1-E3_SOT23-3 PQ21:Reserve(@)SSM3K7002FU_SC70-3

Battery & HW solution

18

C C

PR82:Reserve(@)887K_0402_1% PR84:Reserve(@)0_0402_5% PC68:Reserve(@)1000P_0402_50V7K PR87:change to 210K_0402_1% PR88:change to 499K_0402_1%

+1.05VSP

PR104: Reserve(@)0_0402_5% PR110: change to 10K_0402_5%

PR79 : Add 0.1U_0402_16V7K

Reason for change Rev. PG# Modify List

Charger

PQ20:Reserve(@)SI2301BDS-T1-E3_SOT23-3 PQ21:Reserve(@)SSM3K7002FU_SC70-3 PR82:Reserve(@)887K_0402_1% PR84:Reserve(@)0_0402_5% PC68:Reserve(@)1000P_0402_50V7K PR87:change to 210K_0402_1% PR88:change to 499K_0402_1%

+1.05VSP

PR104: Reserve(@)0_0402_5% PR110: change to 10K_0402_5%

PR79 : Add 0.1U_0402_16V7K

0.2

38

39

40

Date

20081124

Phase

DVT

+1.5VP

PR112: Reserve(@) 0_0402_5%

+3VALWP/+3VALW

B B

19

EMI soultion

PC100: 680P_0402_50V7K

PC130: 1000P_0402_50V_7K

PC131: 1000P_0402_50V_8J

+1.5VP

ADD PR113: 2.2_0603_5%

ADD PR163: 4.7_1206_5%

ADD PC121: 680P_0402_50V7K

ADD PL16 :FBMA-L11-322513-151LMA50T_1210

0.3

35

40

+1.5VP

PR112: Reserve(@) 0_0402_5%

+3VALWP/+3VALW

PC100: 680P_0402_50V7K

PC130: 1000P_0402_50V_7K PC131: 1000P_0402_50V_8J

+1.5VP

ADD PR113: 2.2_0603_5%

ADD PR163: 4.7_1206_5%

ADD PC121: 680P_0402_50V7K

ADD PL16 :FBMA-L11-322513-151LMA50T_1210

20081224

PVT

+3VALWP/+5VALWP

20

A A

POWER Solution

+3VALWP/+5VALWP

RT8206- Fix output 5V for HW no HDMI

370.3

PR42: Reserve 61.9K_0402_1%

COMPAL ELECTRONICS

Title

SCHEMATIC,MB A4853

Size Document Number Rev

401817

Date: Sheet of51 53Monday, September 28, 2009

5

4

3

Date: Sheet

2

20090111 PVT

of51 53Monday, September 28, 2009

1

A

5

Version change list (P.I.R. List)

Page 2 of 2 for PWR

4

3

2

1

Fixed IssueItem

D D

21

C C

22

23

EMI solution

Battery solution

Saturation current

Reason for change Rev.PG# Modify List

Add PL 13 ( HCB4532KF-800T90_1812) Add PL 14 ( FBMA-L11-322513-151LMA50T_1210)

Reduce the Noise

Adjust battery voltage

1.8u choke saturation current too small

0.3

0.3 39

37

Add PL 15 ( FBMA-L11-322513-151LMA50T_1210) Add PC126 ( 100P_0402_50V8J)

Add PC128 ( 100P_0402_50V8J) Add PC129 ( 1000P_0402_50V7K)

38

Reserve PR86 ( 100K_0402_1%)

change PL7 to 1UH_PCMB103E-1R0MS_20A_20%

Date Phase

20090112

20090113

PVT

B B

24

A A

GP BOM Tolerance: K:+-10% ; J:+-5%

5

4

0.4

42

3

Change PC106 to 33P_0402_50V8J

Change PC108 to 33P_0402_50V8J Change PC110 to 33P_0402_50V8J

Change PC114 to 33P_0402_50V8J

COMPAL ELECTRONICS

Title

Size Document Number Rev

Date: Sheet

SCHEMATIC,MB A4853

A

2

401817

20090123

52 53Monday, September 28, 2009

1

PVT

A

of

5

4

3

2

1

8/21

For Change DDR3

1. P.40 Add R612, Q59 ; Unstuff R244 ; Remove R260, R253, Q13, Q14 ; stuff C309, C313, C315, C310, C314, R266, Q52, Q51, R267, U12 for +1.5V

2. P.40 Unstuff R611, Q58 for +0.75VS ; Add J3 for +1.8V ;

3. P.37 Unstuff R609, R610 ; Add R608, R606, R607, D33, U42, Q57 for DDR3

4. P.23 Unstuff R411, D20 ; Add R613 for BKOFF#

5. P.25 Unstuff U8, R83 ; Add R614 for PCI_RST#

D D

9/1

1. P.22 Unstuff R544, R545 for No HDMI Audio Function

2. P.40 Change R558 120K ohm as 200K ohm ; Change R200K ohm as 270K ohm

9/17

1. P.40 Unstuff C882, C883, C884, C885, C886, R275, Q54, U40 for 1.8VS

2. P.31 Change C81, C82 27pF as 33pF for Xtal 25MHz(TXC suggest value)

3. P.26 Change C163, C164 18pF as 15pF for Xtal 32.768kHz (TXC suggest value)

4. P.37 Unstuff C407, C880, C881, R560, D30

5. P.41 Unstuff R580, U41

6. P.35 Change R273 8.2k ohm as 18k ohm for Board ID

C C

B B

A A

Security Classification

2009/07/01 2010/07/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/07/01 2010/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC,MB A4853

401817

A

53 53Monday, September 28, 2009

of

1

of

Acer eMachine G725, eMachine 5332, eMachine 5732G, eMachine 5732ZG, eMachine 7715 Schematic

Specifications and Main Features

Frequently Asked Questions

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