Acer e5-471G Schematic

5

ZQ0_GDDR3 BWD ULT SYSTEM BLOCK DIAGRAM

DDR3L-SODIMM CHA

D D

DDR3L-SODIMM CHB

SATA - HDD

SATA ODD

Cardreader CONN. 2in 1

P27

GL843L (cardreader)

CCD(Camera)

C C

Touch Screen

Blue Tooth

Fingerprint(Option)

I/O board

I/O Board Conn.USB2 IO*2

P14

P15

P27

P22

P24

P21

P27

4

3

2

www.laptopblue.vn

Dual Channel DDR III 1066/1333/1600 MHZ

SATA0

SATA1

USB2-7

USB2-6

USB2-5

USB2-4

USB2-2

USB2-2,3

P8

BATTERY

Azalia

BRODWELL ULT 15W

MCP 1168pins

IMC

DC+GT3

40 mm X 24 mm

SATA

Integrated PCH

USB3.0/2.0

USB2.0

RTC IHDA

P2~P13

LPC

PCI-E x4 TX/RX

CLK

eDP

CLK

PCI-E x1

CLK

SPI

GPU

PCIE-5

EDP

DDI2

DP

DDI1

USB3-1

USB2-0

X'TAL

32.768KHz

X'TAL 24MHz

SPI ROM 8M+4M

N15S-GT N15V-GM N15V-GL

P8

P16~P19

ITE6513

P21

X'TAL 27MHz

PCIE-4

PCIE-3

VRAM

DDR3

eDP Conn.

VGA Conn.

HDMI Conn.

USB3 Port MB side

RTL8111

MINI CARD WLAN+BT

10/100/1G

P22

P23

P20

P27

P24

P26

X'TAL 25MHz

1

BOM

IV@ : iGPU EV@ : Optimus EVG@ : GC6 KBL@ : Keyboard backlight TPM@ : TPM 8M@ :8M FLASH ROM 4M@ :4M FLASH ROM GS@ :G-SENSOR TDI@ :TOUCH PAD I2C TSU@ :TOUCH SCREEN USB TSI@ :TOUCH SCREEN I2C

RJ45

P26

01

P29

EC

IT8587

Touch PAD

P29

TPM(option)

P32

Fan Driver

(Fan signal)

P29

3

P21

2

BQ24737RGRR

Batery Charger

TPS51225RUKR

+3V/+5V

TPS51624RSM

+VCCIN

TPS51211DSCR

+1.05V_S5/+1.05V

TPS51216RUKR

+1.35V_SUS

P31

TPS54318RTER

+1.5V

P32

UP1658RQKF

+VGPU_CORE

P33

PS51211DSCR

+1.5V_GFX/1.05V_GFX/3V_GFX

P34

Size Document Number Rev

Date: Sheet of

Thermal Protection

P35

Discharger

P36

P37

P38

Quanta Computer Inc.

PROJECT :

Block Diagram

1

ZQ0

1 46Monday, April 07, 2014

P36

3A

B B

D-MIC

Int. D-MIC

P28

Universal HP

A A

5

ALC283

AUDIO CODEC

P28 P28

P28

Speaker*2

K/B Con.

BACKLIGHT (OPTION)

4

P29

Power board

HALL SENSOR (Option)

5

4

3

2

1

www.laptopblue.vn

Haswell ULT (DISPLAY,eDP)

U25A

HSW_ULT_DDR3L

02

D D

HDMI

CRT

ITE FAE suggest CAP should be at PCH side.

C C

B B

INT_HDMITX0N[23] INT_HDMITX0P[23] INT_HDMITX1N[23] INT_HDMITX1P[23] INT_HDMITX2N[23] INT_HDMITX2P[23]

INT_HDMICLK-[23] INT_HDMICLK+[23]

CRT_TXN0[21] CRT_TXP0[21] CRT_TXN1[21] CRT_TXP1[21]

PCH_BRIGHT[22]

PCH_BLON[22]

EDP_VDD_EN[22]

TP110

BOARD_ID4[10] BOARD_ID1[10] BOARD_ID2[10]

PCH_BRIGHT PCH_BLON PCH_VDDEN

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PME#

TPD_INT#_D DGPU_SELECT# BOARD_ID4 BOARD_ID1 BOARD_ID2

C54 C55

B58

C58

B55 A55 A57 B57

C51 C50 C53

B54

C49

B50 A53 B53

AD4

B8 A9 C6

U6 P4 N4 N2

U7 L1 L3 R5 L4

DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3

DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3

U25I

EDP_BKLCTL EDP_BKLEN EDP_VDDEN

PIRQA/GPIO77 PIRQB/GPIO78 PIRQC/GPIO79 PIRQD/GPIO80 PME

+3V

GPIO55

+3V

GPIO52

+3V

GPIO54

+3V

GPIO51

+3V

GPIO53

eDP SIDEBAND

+3V +3V +3V +3V +3V_S5

PCIE

1 OF 19

HSW_ULT_DDR3L

9 OF 19

EDPDDI

DISPLAY

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3

EDP_AUXN

EDP_AUXP

EDP_RCOMP

EDP_DISP_UTIL

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN DDPC_AUXN

DDPB_AUXP

DDPC_AUXP

DDPB_HPD DDPC_HPD

EDP_HPD

C45 B46 A47 B47

C47 C46 A49 B49

A45 B45

D20 A43

B9 C9 D9 D11

C5 B6 B5 A6

C8 A8 D6

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_AUXN EDP_AUXP

EDP_RCOMP

CRT_CLK CRT_DATA

CRT_AUX#_C CRT_AUX_C

R61 100K_4

EDP_TXN0 [22] EDP_TXP0 [22] EDP_TXN1 [22] EDP_TXP1 [22]

EDP_AUXN [22] EDP_AUXP [22]

R149 24.9/F_4

R466 *0_4

R66 *0_4

HDMI_DDCCLK_SW [23] HDMI_DDCDATA_SW [23]

C447 *short_4 C446 *short_4

INT_HDMI_HPD [23] CRT_HPD [21] EDP_HPD [22]

R454

4.7K_4

PCH_BRIGHTDP_UTIL

CRT_AUXN [21] CRT_AUXP [21]

eDP Panel

+VCCIOA_OUT

eDP_RCOMP Trace length < 100 mils Trace width = 20 mils Trace spacing = 25 mils

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# DGPU_SELECT# CRT_CLK CRT_DATA TPD_INT#_D

CRT_AUXN CRT_AUXP

R93 10K_4 R501 10K_4 R80 10K_4 R495 10K_4 R485 10K_4 R60 2.2K_4 R52 2.2K_4 R75 TPD@100K_4

+3V

R433 *100K_4

R432*100K_4

+3V

2

TPD_INT#[29,30]

A A

5

Q46

3

2N7002K

1

1A-13 2013/10/30 move Q42 to page02

change U24.U7 net name.

TPD_INT#_D

4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

3

Monday, April 07, 2014

2

PROJECT :

Haswell 3/5 (DDI/eDP)

ZQ0

2 46

1

3A

5

Change Data and DQS to interleave.

Haswell ULT (DDR3L) Haswell Processor (DDR3)

U25C

AH63

M_A_DQ0[14] M_A_DQ1[14] M_A_DQ2[14] M_A_DQ3[14] M_A_DQ4[14]

D D

C C

M_A_DQ5[14] M_A_DQ6[14] M_A_DQ7[14] M_A_DQ8[14] M_A_DQ9[14] M_A_DQ10[14] M_A_DQ11[14] M_A_DQ12[14] M_A_DQ13[14] M_A_DQ14[14] M_A_DQ15[14] M_B_DQ0[15] M_B_DQ1[15] M_B_DQ2[15] M_B_DQ3[15] M_B_DQ4[15] M_B_DQ5[15] M_B_DQ6[15] M_B_DQ7[15] M_B_DQ8[15] M_B_DQ9[15] M_B_DQ10[15] M_B_DQ11[15] M_B_DQ12[15] M_B_DQ13[15] M_B_DQ14[15] M_B_DQ15[15] M_A_DQ16[14] M_A_DQ17[14] M_A_DQ18[14] M_A_DQ19[14] M_A_DQ20[14] M_A_DQ21[14] M_A_DQ22[14] M_A_DQ23[14] M_A_DQ24[14] M_A_DQ25[14] M_A_DQ26[14] M_A_DQ27[14] M_A_DQ28[14] M_A_DQ29[14] M_A_DQ30[14] M_A_DQ31[14] M_B_DQ16[15] M_B_DQ17[15] M_B_DQ18[15] M_B_DQ19[15] M_B_DQ20[15] M_B_DQ21[15] M_B_DQ22[15] M_B_DQ23[15] M_B_DQ24[15] M_B_DQ25[15] M_B_DQ26[15] M_B_DQ27[15] M_B_DQ28[15] M_B_DQ29[15] M_B_DQ30[15] M_B_DQ31[15]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8

M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15

M_B_DQ0

M_B_DQ1

M_B_DQ2

M_B_DQ3

M_B_DQ4

M_B_DQ5

M_B_DQ6

M_B_DQ7

M_B_DQ8

M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31

AH62 AK63 AK62 AH61 AH60 AK61 AK60 AM63 AM62 AP63 AP62 AM61 AM60 AP61 AP60 AP58 AR58 AM57 AK57 AL58 AK58 AR57 AN57 AP55 AR55 AM54 AK54 AL55 AK55 AR54 AN54 AY58

AW58

AY56

AW56

AV58 AU58 AV56 AU56 AY54

AW54

AY52

AW52

AV54 AU54 AV52 AU52 AK40 AK42 AM43 AM45 AK45 AK43 AM40 AM42 AM46 AK46 AM49 AK49 AM48 AK48 AM51 AK51

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

HSW_ULT_DDR3L

DDR CHANNEL A

4

3

2

www.laptopblue.vn

HSW_ULT_DDR3L

DDR CHANNEL B

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1 SA_CKE0

SA_CKE1 SA_CKE2 SA_CKE3

SA_CS#0 SA_CS#1

SA_ODT0

SA_RAS

SA_WE

SA_CAS SA_BA0

SA_BA1 SA_BA2

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7

SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1

AU37 AV37 AW36 AY36

AU43 AW43 AY42 AY43

AP33 AR32

AP32 AY34

AW34 AU34

AU35 AV35 AY41

AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42

AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48

AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49

AP49 AR51 AP51

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQS#0 M_A_DQS#1 M_B_DQS#0 M_B_DQS#1 M_A_DQS#2 M_A_DQS#3 M_B_DQS#2 M_B_DQS#3

M_A_DQS0 M_A_DQS1 M_B_DQS0 M_B_DQS1 M_A_DQS2 M_A_DQS3 M_B_DQS2 M_B_DQS3

+VREF_CA_CPU +VREFDQ_SA_M3 +VREFDQ_SB_M3

M_A_CLK0# [14]

M_A_CLK0 [14]

M_A_CLK1# [14]

M_A_CLK1 [14]

M_A_CKE0 [14] M_A_CKE1 [14]

M_A_CS#0 [14] M_A_CS#1 [14]

TP38

M_A_RAS# [14] M_A_WE# [14] M_A_CAS# [14]

M_A_BS#0 [14] M_A_BS#1 [14] M_A_BS#2 [14] M_A_A[15:0] [14]

M_A_DQS#0 [14] M_A_DQS#1 [14] M_B_DQS#0 [15] M_B_DQS#1 [15] M_A_DQS#2 [14] M_A_DQS#3 [14] M_B_DQS#2 [15] M_B_DQS#3 [15]

M_A_DQS0 [14] M_A_DQS1 [14] M_B_DQS0 [15] M_B_DQS1 [15] M_A_DQS2 [14] M_A_DQS3 [14] M_B_DQS2 [15] M_B_DQS3 [15]

U25D

AY31

M_A_DQ32[14] M_A_DQ33[14] M_A_DQ34[14] M_A_DQ35[14] M_A_DQ36[14] M_A_DQ37[14] M_A_DQ38[14] M_A_DQ39[14] M_A_DQ40[14] M_A_DQ41[14] M_A_DQ42[14] M_A_DQ43[14] M_A_DQ44[14] M_A_DQ45[14] M_A_DQ46[14] M_A_DQ47[14] M_B_DQ32[15] M_B_DQ33[15] M_B_DQ34[15] M_B_DQ35[15] M_B_DQ36[15] M_B_DQ37[15] M_B_DQ38[15] M_B_DQ39[15] M_B_DQ40[15] M_B_DQ41[15] M_B_DQ42[15] M_B_DQ43[15] M_B_DQ44[15] M_B_DQ45[15] M_B_DQ46[15] M_B_DQ47[15] M_A_DQ48[14] M_A_DQ49[14] M_A_DQ50[14] M_A_DQ51[14] M_A_DQ52[14] M_A_DQ53[14] M_A_DQ54[14] M_A_DQ55[14] M_A_DQ56[14] M_A_DQ57[14] M_A_DQ58[14] M_A_DQ59[14] M_A_DQ60[14] M_A_DQ61[14] M_A_DQ62[14] M_A_DQ63[14] M_B_DQ48[15] M_B_DQ49[15] M_B_DQ50[15] M_B_DQ51[15] M_B_DQ52[15] M_B_DQ53[15] M_B_DQ54[15] M_B_DQ55[15] M_B_DQ56[15] M_B_DQ57[15] M_B_DQ58[15] M_B_DQ59[15] M_B_DQ60[15] M_B_DQ61[15] M_B_DQ62[15] M_B_DQ63[15]

M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AW31

AY29

AW29

AV31 AU31 AV29 AU29 AY27

AW27

AY25

AW25

AV27 AU27 AV25 AU25

AM29

AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26

AM26

AK25 AL25 AY23

AW23

AY21

AW21

AV23 AU23 AV21 AU21 AY19

AW19

AY17

AW17

AV19 AU19 AV17 AU17 AR21 AR22 AL21

AM22

AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20

AM20

AR18 AP18

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3

SB_CS#0 SB_CS#1

SB_ODT0

SB_RAS

SB_WE

SB_CAS SB_BA0

SB_BA1 SB_BA2

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7

SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7

AM38 AN38 AK38 AL38

AY49 AU50 AW49 AV50

AM32 AK32

AL32 AM35

AK35 AM33

AL35 AM36 AU49

AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46

AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18

AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18

M_B_ODT0

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_A_DQS#4 M_A_DQS#5 M_B_DQS#4 M_B_DQS#5 M_A_DQS#6 M_A_DQS#7 M_B_DQS#6 M_B_DQS#7

M_A_DQS4 M_A_DQS5 M_B_DQS4 M_B_DQS5 M_A_DQS6 M_A_DQS7 M_B_DQS6 M_B_DQS7

1

M_B_CLK0# [15]

M_B_CLK0 [15]

M_B_CLK1# [15]

M_B_CLK1 [15]

M_B_CKE0 [15] M_B_CKE1 [15]

M_B_CS#0 [15] M_B_CS#1 [15]

TP43

M_B_RAS# [15] M_B_WE# [15] M_B_CAS# [15]

M_B_BS#0 [15] M_B_BS#1 [15] M_B_BS#2 [15] M_B_A[15:0] [15]

M_A_DQS#4 [14] M_A_DQS#5 [14] M_B_DQS#4 [15] M_B_DQS#5 [15] M_A_DQS#6 [14] M_A_DQS#7 [14] M_B_DQS#6 [15] M_B_DQS#7 [15]

M_A_DQS4 [14] M_A_DQS5 [14] M_B_DQS4 [15] M_B_DQS5 [15] M_A_DQS6 [14] M_A_DQS7 [14] M_B_DQS6 [15] M_B_DQS7 [15]

03

B B

3 OF 19

A A

5

4

3

4 OF 19

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

2

Monday, April 07, 2014

PROJECT :

Haswell 2/5 (DDR3 I/F)

ZQ0

3A

3 46

1

3 46

3A

5

4

3

2

1

www.laptopblue.vn

04

H_PECI (50ohm) Route on microstrip only

D D

C C

Spacing >18 mils Trace Length: 0.4~6.125 iches

H_PWRGOOD (50ohm) Trace Length: 1~11.25 inches

CPU_PLTRST# (50ohm) Trace Length: 10~17 inches

H_PECI[30] XDP_PRDY# [13]

H_PROCHOT#[30,31,35]

TP79 TP25

R525 56_4

SM_RCOMP[0:2] Trace length < 500 mils Trace width = 12~15 mils Trace spacing = 20 mils

PROC_DETECT CATERR# H_PECI

H_PROCHOT#_RH_PROCHOT#

H_PWRGOOD_R

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

DDR_PG_CTRL

Haswell ULT (SIDEBAND)

THERMAL

DDR3L

DSW

HSW_ULT_DDR3L

MISC

JTAG

PWR

2 OF 19

D61 K61 N62

K63

C61

AU60

AV60

AU61

AV15 AV61

U25B

PROC_DETECT CATERR PECI

PROCHOT

PROCPWRGD

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST SM_PG_CNTL1

PRDY

PREQ PROC_TCK PROC_TMS

PROC_TRST

PROC_TDI

PROC_TDO

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

J62

XDP_PRDY#

K62

XDP_PREQ#

E60

XDP_TCK0

E61

XDP_TMS_CPU

E59

XDP_TRST#

F63

XDP_TDI_CPU

F62

XDP_TDO_CPU

J60

XDP_BPM#0

H60

XDP_BPM#1

H61

XDP_BPM#2

H62

XDP_BPM#3

K59

XDP_BPM#4

H63

XDP_BPM#5

K60

XDP_BPM#6

J61

XDP_BPM#7CPU_DRAMRST#

XDP_PREQ# [13] XDP_TCK0 [8,13] XDP_TMS_CPU [13] XDP_TRST# [8,13] XDP_TDI_CPU [13] XDP_TDO_CPU [13]

XDP_BPM#0 [13]

XDP_BPM#1 [13]

TP82 TP80 TP23 TP81 TP124 TP24

TCK,TMS Trace Length < 9000mils

BPM#[0:7] Trace Length 1~6 inches Length match < 300 mils

B B

DRAM COMP

R157 200/F_4

R155 120/F_4

R148 100/F_4

PU/PD of CPU

H_PROCHOT#

A A

H_PWRGOOD_R

R522 *62_4

R524 62_4

R51 10K_4

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

5

+VCCIO_OUT

+1.05V_VCCST

DRAMRST

CPU DRAM

CPU_DRAMRST#

+1.35V_SUS

12

4

XDP_TDO_CPU

XDP_TCK0 XDP_TRST#

470_4

R141 51_4

R62 51_4 R555 *51_4

R227 *short_4

+1.05V_VCCST

12

C271

*0.1u/10V_4

DDR3_DRAMRST# [14,15]

3

DDR3L ODT GENERATIONXDP PU/PD

+5V_S5

12

R695

R306

*220K/F_4

220K/F_4

DDR_VTTT_PG_CTRL[34]

2

+3V_SUS

12

0.1u/10V_4

+1.35V_SUS

3

2

1

+1.35V_SUS

U13

5

VCC

12

C333

4

Y

74AUP1G07GW

R321 66.5/F_4 Q35 2N7002K

R322 66.5/F_4

R323 66.5/F_4R182

R325 66.5/F_4

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

1

NC

2

A

GND

Haswell 1/5 (PEG/DMI/FDI)

R316 *short_4

3

M_A_ODT0_DIMM [14] M_A_ODT1_DIMM [14] M_B_ODT0_DIMM [15] M_B_ODT1_DIMM [15]

Quanta Computer Inc.

PROJECT :

1

ZQ0

DDR_PG_CTRL

4 46

3A

5

VDDQ Output Decoupling Recommendations

330uFx2 7343 22uFx11 10uFx10

D D

+1.35V_SUS

C C

+1.05V_VCCST

VRON_CPU IMVP_PWRGD

B B

BOT socket side 5 onTOP, 6 on BOT inside socket cavity

0805

5 onTOP, 5 on BOT inside socket cavity

0805

C476

C478

10u/6.3V_6

+

C486 *470u/2V_7343

R45 *SHORT_8

C145

2.2u/6.3V_6

VCC_SENSE[35]

R65 *10K_4 R76 10K_4

PWR_DEBUG[13]

+1.05V_VCCST+1.05V

+1.05V_VCCST

C178 10u/6.3V_6

+VCCIN

C150 *4.7u/6.3V_6

+1.35V_CPU 1.4A

+1.35V_CPU

C477 10u/6.3V_6

C157

2.2u/6.3V_6

R583 100/F_4 R423 *short_4

300mA 300mA

VCCST_PWRGD[13]

IMVP_PWRGD[10,35]

R72 *short_4

R68 150_6

C479

2.2u/6.3V_6

+VCCIO_OUT

+VCCIOA_OUT

VRON_CPU[35]

C475 10u/6.3V_6

C184

2.2u/6.3V_6

+VCCIN

C480 10u/6.3V_6

TP16 TP41

TP42

TP18 TP14 TP50

TP17 TP31 TP22 TP85 TP32 TP49 TP44 TP36 TP40 TP37 TP39 TP20 TP34

TP29 TP9

ULT_RVSD_61 ULT_RVSD_62

ULT_RVSD_63 ULT_RVSD_64

VCC_SENSE_R ULT_RVSD_65

ULT_RVSD_66 ULT_RVSD_67 ULT_RVSD_68

H_CPU_SVIDART# H_CPU_SVIDCLK H_CPU_SVIDDAT VCCST_PWRGD VRON_CPU IMVP_PWRGD

PWR_DEBUG_R

ULT_RVSD_69 ULT_RVSD_70 ULT_RVSD_71 ULT_RVSD_72 ULT_RVSD_73 ULT_RVSD_74 ULT_RVSD_75 ULT_RVSD_76 ULT_RVSD_77 ULT_RVSD_78 ULT_RVSD_79 ULT_RVSD_80 ULT_RVSD_81

+1.05V_VCCST

+VCCIN

4

3

2

www.laptopblue.vn

Haswell ULT (POWER)

+

C422 *470u/2V_7343

C73

C190 22u/6.3V_8

C133 22u/6.3V_8

C135 22u/6.3V_8

C204 22u/6.3V_8

C137 *22u/6.3V_8

C46 22u/6.3V_8

C136 22u/6.3V_8

C167 22u/6.3V_8

C125 22u/6.3V_8

C126 *22u/6.3V_8

22u/6.3V_8

C132 22u/6.3V_8

C127 22u/6.3V_8

C172 22u/6.3V_8

C71 *22u/6.3V_8

C100 22u/6.3V_8

C201 22u/6.3V_8

C169 22u/6.3V_8

C170 22u/6.3V_8

C129 *22u/6.3V_8

VCC Output Decoupling Recommendations

470uFx4 7343 22uFx8 22uFx11 10uFx11

TOP socket side 4 on TOP, 4 on BOT near socket edge

0805 0805

TOP, inside socket cavity

0805

BOT, inside socket cavity

+VCCIN 32A

C113 22u/6.3V_8

C140 22u/6.3V_8

C165 22u/6.3V_8

C203 22u/6.3V_8

C74 *22u/6.3V_8

+VCCIN

C75 22u/6.3V_8

C202 22u/6.3V_8

C171 22u/6.3V_8

C130 22u/6.3V_8

C128 *22u/6.3V_8

AH26

AJ31 AJ33

AJ37 AN33 AP43 AR48

AY35

AY40

AY44

AY50

AC58

AB23

AD23 AA23 AE59

AD60 AD59 AA59 AE60 AC59 AG58

AC22 AE22 AE23

AB57 AD57 AG57

L59

J58

F59 N58

E63 A59

E20

L62 N63 L63 B59 F60 C59

D63 H59 P62 P60 P61 N59 N61 T59

U59 V59

C24 C28 C32

U25L

RSVD RSVD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VCC RSVD RSVD

VCC_SENSE RSVD VCCIO_OUT VCCIOA_OUT RSVD RSVD RSVD

VIDALERT VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY

VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

VCCST VCCST VCCST

VCC VCC VCC VCC VCC VCC

HSW_ULT_DDR3L

HSW ULT POWER

12 OF 19

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57

VCCST PWRGD

+1.05V_VCCST

R601

VCCST_PWRGD

SVID

H_CPU_SVIDDAT

H_CPU_SVIDART#

10K_4 R603 *short_4

C498 *0.1u/10V_4

R602 *0_4

VCCST_PWRGD_EN

1A-6 2013/10/21 Del APWORK.

Layout note: need routing together and ALERT need between CLK and DATA.

+VCCIO_OUT

R535 *130/F_4

Place PU resistor close to CPU

CRB is via +1.05V PG

+3V_S5

VCCST_PWRGD_R

HWPG_1.05V_EC

+1.05V_VCCST

R540 130/F_4

R528 *short_4

R502 43_4

C502

0.1u/10V_4

R55 *0_8

5

4

Q41

*2N7002K

R618 *short_4 R617 *0_4

+VCCIO_OUT+1.05V

+1.05V_VCCST

1

U29

VCC

Y

74AUP1G07GW

3

1

R539 75_4

1

NC

2

A

3

GND

Reserve from EC

2

PCH_PWROK [7,30]

EC_PWROK [7,30]

C118 *4.7u/6.3V_6

+VCCIO_OUT

R534 *75_4

05

VCCST_PWRGD_EN

HWPG_1.05V_EC# [30]

VR_SVID_DATA [35]

VR_SVID_ALERT# [35]

HWPG_1.05V for DDR=1.5V

+3V

A A

C268 *1000p/50V_4

2

Q30

1 3

*MMBT3904-7-F

+1.05V

R225 *4.7K_4

5

R229 *4.7K_4

C270 *1000p/50V_4

+3V

R236 *4.7K_4

HWPG_1.05V [30]

2

Q33

1 3

*DTC144EU

R247 *100K/F_4

10/30 reserve DDR=1.5V ,This block POP

4

3

2

H_CPU_SVIDCLK

R548 *short_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

PROJECT :

Haswell 4/5 (POWER)

1

VR_SVID_CLK [35]

ZQ0

5 46

3A

5

4

www.laptopblue.vn

Haswell ULT (CFG,RSVD)

U25S

3

HSW_ULT_DDR3L

2

1

06

D D

NOA_STBN_0[13] NOA_STBN_1[13] NOA_STBP_0[13] NOA_STBP_1[13]

C C

1A-10 20131025 reserve A5 ball to 100k PU 3VPCU. 1A-12 20131028 reserve A5 ball toTP.

TP100

CFG0[13] CFG1[13] CFG2[13] CFG3[13] CFG4[8,13] CFG5[13] CFG6[13] CFG7[13] CFG8[13]

CFG9[13] CFG10[13] CFG11[13] CFG12[13] CFG13[13] CFG14[13] CFG15[13]

R515 49.9/F_4

R452 8.2K_4

NOA_STBN_0 NOA_STBN_1 NOA_STBP_0 NOA_STBP_1

CFG_RCOMP

REFPKG_OCC

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

TD_IREF

AC60 AC62 AC63 AA63 AA60

Y62 Y61 Y60 V62 V61 V60

U60

T63 T62 T61 T60

AA62

U63

AA61

U62

V63

J20

H18

B12

A5 E1

D1

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCOMP RSVD RSVD

RSVD RSVD RSVD TD_IREF

RESERVED

PROC_OPI_RCOMP

19 OF 19

RSVD_TP RSVD_TP

RSVD

RSVD_TP RSVD_TP

RSVD_TP

RSVD RSVD

RSVD

RSVD RSVD

VSS VSS

RSVD RSVD

AV63 AU63

C63 C62 B43

A51 B51

L60 N60 W23

Y22 AY15

AV62 D58

P22 N21

P20 R20

OPI_COMP1

R576 49.9/F_4

Processor Strapping

1 0

CFG0 EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKED CFG1 PCH/ PCH LESS MODE SELECTION

B B

CFG3 PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

CFG 8 ALLOW THE USE OF NOA ON LOCKED UNITS

(DEFAULT) NORMAL OPERATION; NO STALL

(DEFAULT) NORMAL OPERATION

DISABLED NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT

DISABLED(DEFAULT); IN THIS CASE, NOA WILL BE DISABLED IN LOCKED UNITS AND ENABLED IN UN-LOCKED UNITS

STALL

PCH-LESS MODE

ENABLED AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT

ENABLED; NOA WILL BE AVAILABLE REGARDLESS OF THE LOCKING OF THE UNIT

CFG0

CFG1

CFG3

CFG8

R134 *1K_4

R552 *1K_4

R549 *1K_4

R537 *1K_4

CFG9 NO SVID PROTOCOL CAPABLE VR CONNECTED

A A

CFG10 SAFE MODE BOOT

5

VRS SUPPORTING SVID PROTOCOL ARE PRESENT

POWER FEATURES ACTIVATED DURING RESET

4

NO VR SUPPORTING SVID IS PRESENT. THE CHIP WILL NOT GENERATE (OR RESPOND TO) SVID ACTIVITY

POWER FEATURES (ESPECIALLY CLOCK GATINE ARE NOT ACTIVATED

3

CFG9

CFG10

R532 *1K_4

R126 *1K_4

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

PROJECT :

Haswell 5/5 (CFG/GND)

1

ZQ0

6 46

3A

5

PCH_SUSACK#[30]

PCH_SUSPWRACK_R[30]

SYS_PWROK EC_PWROK

RSMRST#[30]

DNBSWON#[30] ACPRESENT[31]

D D

1C1-1 2014/02/19 add R692 for SUSPWRACK# to EC.

PCH_SUSPWRACK

SYS_RESET#[13]

R613 *short_4 R609 *0_4 R608 *0_4

R168 *0_4 R173 *0_4

C207 *1u/6.3V_4

R604 *0_4 R605 *0_4

R596 *short_4 R692 *short_4 R274 *short_4 R277 *short_4

TP111 TP51

SUSACK#_R

SUSACK#_R SYS_RESET#

SYS_PWROK_R EC_PWROK_R APWROK_R PCI_PLTRST#

PCH_RSMRST#

PCH_SUSPWRACK

PCH_PWRBTN# PCH_ACPRESENT PCH_BATLOW# PCH_SLP_S0#_R PCH_SLP_WLAN#

4

www.laptopblue.vn

AK2 AC3 AG2 AY7 AB5 AG7

AW6

AV4

AL7

AJ8

AN4

AF3

AM5

Haswell ULT PCH (PM)

U25H

SUSACK SYS_RESET SYS_PWROK PCH_PWROK APWROK

+3V_S5

PLTRST

RSMRST SUSWARN/SUSPWRDNACK/GPIO30 PWRBTN ACPRESENT/GPIO31 BATLOW/GPIO72 SLP_S0 SLP_WLAN/GPIO29

HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

DSW DSW DSW +3V_S5 DSW

8 OF 19

+3V +3V_S5 +3V_S5 DSW

+3V_S5

3

SUS_STAT/GPIO61

DSWVRMEN

DPWROK

DSW

CLKRUN/GPIO32

DSW DSW DSW DSW DSW

WAKE

SUSCLK/GPIO62

SLP_S5/GPIO63

SLP_S4 SLP_S3

SLP_A

SLP_SUS

SLP_LAN

AW7

DSWVREN

AV5

DPWROK_R

AJ5

PCIE_LAN_WAKE#

V5

CLKRUN#

AG4

GPIO61

AE6

PCH_SUSCLK

AP5

PCH_SLP_S5#

AJ6

SUSC#

AT4

SUSB#

AL5

PCH_SLP_A#

AP4

PCH_SLP_SUS#

AJ7

PCH_SLP_LAN#

2

Deep Sx

R599 *0_4

TP123 TP11

TP12

DSWVREN [8] DPWROK [30] PCIE_LAN_WAKE# [26]

CLKRUN# [21,30]

PCH_SLP_S5# [13]

SUSC# [13,30] SUSB# [13,30] PCH_SLP_A# [13]

PCH_SLP_SUS# [30]

1

07

C C

PCH PM PU/PD

+3V

CLKRUN# SYS_RESET#

B B

A A

PCH_RSMRST# SYS_PWROK DPWROK_R PCH_SUSCLK

PCH_SUSPWRACK GPIO61

1C-5 2014/01/16 Change R264 from 10k to 1k

for wake on lan issue.

PCH_ACPRESENT PCH_BATLOW# PCIE_LAN_WAKE# PCH_PWRBTN#

R505 8.2K_4 R516 10K_4

R590 10K_4 R616 *10K_4 R598 100K/F_4 R110 *10K_4

+3V_S5

R176 *10K_4 R521 *10K_4

+3V_S5

R122 10K_4 R262 8.2K_4 R264 1K_4 R261 *10K_4

+3VPCU

R116 *10K_4 R275 *8.2K_4 R276 *1K_4 R273 *10K_4

5

DSW PU

Power Sequence

PCH_PWROK[5,30]

R595

100K_4

EC_PWROK SYS_PWROK_R

R353 *short_4 R612 *0_4 R597 *short_4

Non Deep Sx

EC_PWROK_R

DPWROK_RRSMRST#

PLTRST# Buffer Deep Sx Circuit

+3V

PCI_PLTRST#

2 1

3 5

C213 0.1u/10V_4

4

U6 TC7SH08FU

R175 100K_4

PLTRST# [13,16,21,24,26,27,30]

+3V_S5 +3VCC_S5

*0.33u/10V_6

SYSPWOK

+3V_S5

C511 *0.1u/10V_4

2

SYS_PWROK[13]

4

SYS_PWROK

4

U30 TC7SH08FU

3 5

R619 *0_4

EC_PWROK

1

3

EC_PWROK [5,30] IMVP_PWRGD_3V [10]

R615 10K_4

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

2

Tuesday, April 08, 2014

APWORK[30]

R610 *short_4

Speed up 250ms to boot up for EC power on 250 ms

Non Deep Sx

R300 *Short_6

1

R302

C237

PCH_SLP_SUS#

*100K_4

2

Q27 *2N7002K

Quanta Computer Inc.

PROJECT :

LPT 1/6 (DMI/FDI/VGA)

2

3

1

Q34 *AO3413

R303 *0_6

ZQ0

R606 10K_4

3

7 46

1

APWROK_R

3A

RTC Clock 32.768KHz (RTC)

C481 15p/50V_4

C485 15p/50V_4

RTC Circuitry (RTC)

D D

R345 *S hort_6

+3VPCU

R346 1K _4

VCCRTC_2

1A-2

HDA

C C

PCH JTAG

B B

ULT Strapping Table

VCCRTC_2

+3V_RTC_[0:2]

12

Trace width = 20 mils

BT1

2013/10/16 Chage +3V_RTC_0 to VCCTC_2.

PCH_AZ_CODEC_RST#[28]

PCH_AZ_CODEC_SDOUT[28]

PCH_AZ_CODEC_BITCLK[28]

PCH_AZ_CODEC_SYNC[28]

JTAG_TCK,JTAG_TMS Trace Length < 9000mils

XDP_TMS XDP_TDI PCH_JTAG_TDO PCH_JTAGX

XDP_TCK1

Pin Name Strap description

GPIO81(SPKR)

HDA_SDO

INTVRMEN

GPIO66

GPIO86

GPIO15

A A

CFG4

DSWVREN

5

RTC_X1

R574

Y5

10M_4

32.768KHZ

RTC_X2

2013/11/20 D24 down size.

+3V_RTC

D17

BAT54C

R174 33_ 4 R580 33_ 4 R584 33_ 4

C483 *10p/50V_4

R181 33_ 4 C219 *10p/50V_4

+3V_RTC Trace width = 30 mils

R336

20K/F_4

R338

20K/F_4

C676 1u/6.3V_4

C671 1u/6.3V_4

C670 1u/6.3V_4

+3V_RTC_2

+3V_RTC_1

12

1B-1

MP remove(Intel)

R541 51_4 R542 51_4 R529 51_4 R538 *1K_4

R546 *51_4

No reboot on TCO Timer expiration

Flash Descriptor Security Override / Intel ME Debug Mode

+1.05V_S5

Integrated 1.05V VRM enable ALWAYS

Top-Block Swap override

Boot BIOS Strap Bit

TLS(Transport layer security)

DP presence strap

Deep Sx well on die VR enable

5

RTC_RST#

12

J1 *JUMP

SRTC_RST#

12

J2 *JUMP

HDA_RST#_R HDA_SDO_R HDA_BCLK_R

HDA_SYNC_R

Sampled

PWROK

R591 1M_4

+3V_RTC

RTC_RST#[13]

PCH_AZ_CODEC_SDIN0[28]

XDP_TRST#[4,13]

XDP_TCK1[13] XDP_TDI[13]

R530 0_4

XDP_TDO[13] XDP_TMS[13]

R547 0_4

XDP_TCK0[4,13]

TP135

1A-10

2013/10/25 reserve AV2 ball to GND.

1A-12

2013/10/28 reserve AV2 ball to TP.

RTC charge circuit

1 3

Q21

MMBT3904

1A-2

2013/10/16 Add RTC charge circuit.

Configuration note

0 = Default enable (iPD 20K)

1 =Disable No-Reboot mode

0 = Default can program ME (iPD 20K)

1 =can't program ME

1=Should be always pull-up

0 = Default disable (iPD 20K)

1 = Enable TBS function

0 = Default SPI (iPD 20K)

1 =LPC

0 = Default enable w/o confidentiality(iPD 20K)

1 =Default enable with confidentiality

0 = Enable an external display port is connected to the eDP

1 =disable

1=Should be always pull-up

4

Haswell ULT PCH (RTC/HDA/SATA/SPI)

www.laptopblue.vn

U25E

AW5

RTC_X1 RTC_X2 SM_INTRUDER# PCH_INTVRMEN

RTC_RST#

HDA_BCLK_R HDA_SYNC_R HDA_RST#_R

HDA_SDO_R

XDP_TCK1 XDP_TDI PCH_JTAG_TDO

PCH_JTAGX

PCH_EDM

20MIL

VCCRTC_3 VCCRTC_4VCCRTC_2

R193 4.7K_4

2

4

RTCX1

AY5

RTCX2

AU6

INTRUDER

AV7

INTVRMEN

AV6

SRTCRST

AU7

RTCRST

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST/I2S_MCLK

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN/I2S1_TXD

AV10

HDA_DOCK_RST/I2S1_SFRM

AY8

I2S1_SCLK

AU62

PCH_TRST

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD

AC4

RSVD

AE63

JTAGX

AV2

RSVD

+5V_S5

R202 4.7K_4 R550 *S hort_6

R195

68.1K/F_4

R194

150K/F_4

R508 *1 K_4

+3V

HDA_SDO_R

R592 330 K_4

+3V_RTC

GPIO66[10]

R578 *1 K_4

+3V

GPIO86[10]

R136 *1K_4

+3V

GPIO15[10]

R99 8.2K_4

+3V_S5

DSWVREN[7]

R589 330 K_4

+3V_RTC

HSW_ULT_DDR3L

RTC

AUDIO SATA

JTAG

5 OF 19

SPKR

R582 *short_4

PCH_INTVRMEN

GPIO66

GPIO86

GPIO15

CFG4

CFG4[6,13]

DSWVREN

+3V +3V +3V +3V

SPKR [10,28]

ME_WR# [30]

R588 *3 30K_4

R577 *1 K_4

R129 *1 K_4

R95 *1K_4

R544 1K _4

R585 *3 30K_4

3

SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3

SATA_TN0/PETN6_L3 SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2

SATA_TN1/PETN6_L2 SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1

SATA_TN2/PETN6_L1 SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0 SATA_RP3/PERP6_L0

SATA_TN3/PETN6_L0 SATA_TP3/PETP6_L0

SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37

SATA_IREF

RSVD RSVD

SATA_RCOMP

SATALED

3

J5 H5 B15 A15

J8 H8 A17 B17

J6 H6 B14 C15

F5 E5 C17 D17

V1

VGPU_EN

U1

ODD_PRSNT#

V6

GPIO36

AC1

GPIO37

A12

SATA_IREF

L11 K10 C12

SATA_RCOMP

U3

SATA_LED#

SATA_RCOMP Impedance = 50 ohm Trace length < 500 mils Trace spacing = 15 mils

PCH SPI ROM(8M+4M)

15ohm CS01502JB12 33ohm CS03302JB29

PCH_SPI_CS0#

PCH_SPI_SO PCH_SPI_SO_EC

+3V_PCH_ME

3.3K is original and for no support fast read function

R573 *short_4

R453 3.01 K/F_4 R510 10K _4

R103 8M4M@15_4

R489 8M@15_4

R106 *1 K_4

PCH_SPI_CS1# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO

C461 *22p/50V_4

+3V_PCH_ME

SATA_RXN0 [25] SATA_RXP0 [25] SATA_TXN0 [25] SATA_TXP0 [25]

SATA_RXN1 [25] SATA_RXP1 [25] SATA_TXN1 [25] SATA_TXP1 [25]

PCH_SPI_CLK_R PCH_SPI_SI_R PCH_SPI_SO_R

PCH_SPI_CLK_EC[30]

PCH_SPI_SI_EC[30] PCH_SPI_SO_EC[30]

SPI_CS0#_UR_ME[30]

2

Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)

HDD

ODD

VGPU_EN [37 ]

ODD_PRSNT# [25]

TP108

+V1.05S_ASATA3PLL

+V1.05S_ASATA3PLL +3V

U14

1 2

SPI_SO_8M

3

4

W25Q64FW -- 8MB

SPI_WP_IO2_ME

PCH_SPI_IO2

PCH_SPI_IO3

R553 *4M@33_4 R551 *4M@33_4

R565 *1 K_4

1A-3 2013/10/16 Add U34 f lash 4M ROM re serve for ZQ0D .

+3V_PCH_ME

R109 10K_4

CS# IO1/DO IO2/WP#

GND

PCH_SPI_CLK_EC PCH_SPI_SI_EC

R543 *4M@33_4 R531 *4M@33_4 R98 *4M@33_4

LPC_LAD0[21,24,30] LPC_LAD1[21,24,30] LPC_LAD2[21,24,30] LPC_LAD3[21,24,30]

LPC_LFRAME#[21,24,30]

PCH_SPI_CLK PCH_SPI_CS1# PCH_SPI_SI

PCH_SPI_SO PCH_SPI_IO2 PCH_SPI_IO3

GPIO37 GPIO36

R507*10K_4 R162 10K_4

1A-14

2013/12/02 change GPIO36 to PD.

1B-2

2013/12/04 change GPIO36/GPI037 to PU.

Option: 4M@ ->Stuff 33o hm. 8M@->Stuff 15oh m.(default) 8M4M@->8M flash ROM stuff 15o hm(default), 4M flash ROM stuff 33oh m.

+3V_PCH_ME+3V_S5

8

VCC

7

SPI_HOLD_IO3_ME

IO3/HOLD#

6

SPI_CLK_8M

CLK

5

SPI_SI_8M

IO0/DI

R533 8M@15_4 R526 8M@15_4

U28

CE#

VDD SCK SI SO

HOLD#

WP#

VSS

*4M@ROM-4M_EC

SPI_CS0#_UR_ME

SPI_WP_IO2_EC SPI_WP_IO2_ME

SPI_HOLD_IO3_EC SPI_HOLD_IO3_ME

8

7

SPI_HOLD_IO3_EC

4

PCH_SPI_CLK_R

PCH_SPI_SI_R

PCH_SPI_SO_R

PCH_SPI_CS0# PCH_SPI_CS1#

only 0ohm option

2

R566 *4 M@33_4 R91 8M4M@15_4

R564 *4M@33_4 R146 8M4M@15_4

1 6 5 2

3

SPI_WP_IO2_EC

R112 8M @0_4 R587 *4 M@0_4

U25G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME

AA3

SPI_CLK

Y7

SPI_CS0

Y4

SPI_CS1

AC2

SPI_CS2

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

R51710K_4 R9710K_4

VGPU_EN

C147 0.1u/10V_4

R147 *1 K_4 R145 8M4M@15_4 R153 8M4M@15_4

reserve for SPI fast read

+3V_PCH_ME

C489 *4M@0.1u/10V_4

R51110K_4

+3V

+3V_PCH_ME

PCH_SPI_CLK

PCH_SPI_SI

C162 *22p/50V_4

1

HSW_ULT_DDR3L

LPC

+3V_S5 +3V_S5 +3V_S5

SMBUS

+3V_S5 +3V_S5 +3V_S5

+3V_S5

SML1ALERT/PCHHOT/GPIO73

+3V_S5 +3V_S5

C-LINKSPI

SMBALERT/GPIO11

SML0ALERT/GPIO60

SML1CLK/GPIO75

SML1DATA/GPIO74

7 OF 19

SMBus

SMBus(PCH)

SMB_PCH_DAT

SMB_PCH_CLK

PCH_XDP_WLAN/S5 DDR_TP/S0

SMBus(EC)

2ND_MBCLK[19,30]

2ND_MBDATA[19,30]

EC/S5 PCH/S5

AN2

SMBALERT#SRTC_RST#

AP2

SMB_PCH_CLK

SMBCLK

AH1

SMB_PCH_DAT

SMBDATA

AL2

SMB0ALERT#

AN1

VGA_MBCLK

SML0CLK

AK1

SML0DATA

+3V_S5

VGA_MBDATA

AU4

SMB1ALERT#

AU3

SMB_ME1_CLK

AH3

SMB_ME1_DAT

AF2

CL_CLKPCH_SPI_CS0#

CL_CLK

AD2

CL_DAT

CL_DATA

AF4

CL_RST#

CL_RST

R545 10K_4 R575 10K_4

R285 2.2K_4 R284 2.2K_4 R536 2.2K_4 R164 2.2K_4

+3V_S5

2ND_MBCLK 2ND_MBDATA

Size Document Number Rev

Date: Sheet of

SMB0ALERT# SMB1ALERT# SMBALERT#

SMB_PCH_CLK SMB_PCH_DAT VGA_MBDATA VGA_MBCLK

+3V

R289

4.7K_4

Q14

5

2 6

2N7002DW

*2.2K_4

Q15

5

2 6

*2N7002DW

R280 *s hort_4 R282 *s hort_4

Quanta Computer Inc.

PROJECT :

LPT 2/6 (SATA/HDA/SPI)

Tuesday, April 08, 2014

1

43

1

R290

43

1

SMB1ALERT# [29]

TP87 TP86 TP89

2013/10/16 change SMbus VGA to PCH SML0CLK/SML0DATA.

1A-3

R279

4.7K_4

CLK_SDATA [13,14 ,15,24]

CLK_SCLK [13,14,15,24]

R278 *2.2K_4R586 *4M@33_4 R572 *1 K_4

SMB_ME1_CLK

SMB_ME1_DAT

SMB_ME1_CLK SMB_ME1_DAT

ZQ0

8 46

08

3A

5

Haswell ULT PCH (PCIE,USB3.0,USB2.0)

1A-6 2013/10/21 reversal PEG lan for layout. 1A-8 2013/10/21 Swap PEG to nomroal mode.

PEG_RX#0[16]

D D

PEG x4

LANWLAN

C C

B B

PEG_RX0[16]

PEG_TX#0[16]

PEG_TX0[16]

PEG_RX#1[16]

PEG_RX1[16]

PEG_TX#1[16]

PEG_TX1[16]

PEG_RX#2[16]

PEG_RX2[16]

PEG_TX#2[16]

PEG_TX2[16]

PEG_RX#3[16]

PEG_RX3[16]

PEG_TX#3[16]

PEG_TX3[16]

PCIE_RX3-_LAN[26] PCIE_RX3+_LAN[26 ]

PCIE_TX3-_LAN[26] PCIE_TX3+_LAN[26]

PCIE_RX4-_WLAN[24] PCIE_RX4+_WLAN[24]

PCIE_TX4-_WLAN[24]

PCIE_TX4+_WLAN[24]

+V1.05S_ AUSB3PL L

C444 EV@0.22 u/10V_4 C445 EV@0.22 u/10V_4

C451 EV@0.22 u/10V_4 C452 EV@0.22 u/10V_4

C432 EV@0.22 u/10V_4 C433 EV@0.22 u/10V_4

C449 EV@0.22 u/10V_4 C450 EV@0.22 u/10V_4

C439 0.1u/10 V_4 C438 0.1u/10 V_4

C441 0.1u/10 V_4 C440 0.1u/10 V_4

R571 3.01K/F_4

R570 *short_4

C_PEG_TX# 0 C_PEG_TX0

C_PEG_TX# 1 C_PEG_TX1

C_PEG_TX# 2 C_PEG_TX2

C_PEG_TX# 3 C_PEG_TX3

PCIE_TX3PCIE_TX3+

PCIE_TX4PCIE_TX4+

PCIE_RCOMP PCIE_IREF

F10 E10

C23 C22

F8 E8

B23 A23

H10 G10

B21 C21

E6 F6

B22 A21

G11 F11

C29 B30

F13 G13

B29 A29

G17 F17

C30 C31

F15 G15

B31 A31

E15 E13 A27 B27

U25K

PERN5_L0 PERP5_L0

PETN5_L0 PETP5_L0

PERN5_L1 PERP5_L1

PETN5_L1 PETP5_L1

PERN5_L2 PERP5_L2

PETN5_L2 PETP5_L2

PERN5_L3 PERP5_L3

PETN5_L3 PETP5_L3

PERN3 PERP3

PETN3 PETP3

PERN4 PERP4

PETN4 PETP4

PERN1/USB3RN3 PERP1/USB3RP3

PETN1/USB3TN3 PETP1/USB3TP3

PERN2/USB3RN4 PERP2/USB3RP4

PETN2/USB3TN4 PETP2/USB3TP4

RSVD RSVD PCIE_RCOMP PCIE_IREF

PCIE USB

+3V_S5 +3V_S5

4

www.laptopblue.vn

HSW_ULT_DDR3L

11 OF 19

+3V_S5 +3V_S5

+3V_S5 +3V_S5 +3V_S5 +3V_S5

DSW

USB2N0

DSW

USB2P0

DSW

USB2N1

DSW

USB2P1

DSW

USB2N2

DSW

USB2P2

DSW

USB2N3

DSW

USB2P3

DSW

USB2N4

DSW

USB2P4

DSW

USB2N5

DSW

USB2P5

DSW

USB2N6

DSW

USB2P6

DSW

USB2N7

DSW

USB2P7

USB3RN1 USB3RP1

USB3TN1 USB3TP1

USB3RN2 USB3RP2

USB3TN2 USB3TP2

USBRBIAS

OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43

1A-1 2013/10/15 following up acer define and swap USB3 and USB2

USB2 port.

RSVD RSVD

AN8 AM8

AR7 AT7

AR8 AP8

AR10 AT10

AM15 AL15

AM13 AN13

AP11 AN11

AR13 AP13

G20 H20

C33 B34

E18 F18

B33 A33

AJ10 AJ11 AN10 AM10

AL3 AT1 AH2 AV3

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

USBCOMP

USBP0- [27] USBP0+ [27]

USBP1- [27] USBP1+ [27]

USBP2- [21] USBP2+ [21]

USBP3- [27] USBP3+ [27]

USBP4- [24] USBP4+ [24]

USBP5- [22] USBP5+ [22]

USBP6- [22] USBP6+ [22]

USBP7- [27] USBP7+ [27]

USB3_RXN0 [27] USB3_RXP 0 [27]

USB3_TXN0 [27] USB3_TXP0 [27]

R123 22.6/F_4

USB_OC0# [27 ] USB_OC1# [27 ]

MB USB3.0 DB USB2.0 DB FingerPrint DB USB2.0 BT Touch screen CCD Card reader

USBCOMP Impedance = 50 ohm Trace length < 500 mils Trace spacing = 15 mils

MB USB3.0

MB U3 DB U2

3

1B-2 2013/11/15 Swap LAN and WLAN

Request clk port base on DG.

CLK_PCIE_LANN[26]

LANWLANVGA

CLK_PCIE_LANP[26]

CLK_PCIE_LAN_REQ #[26]

CLK_PCIE_WLANN[24] CLK_PCIE_WLANP[24 ]

PCIE_CLKREQ_WLAN#[24]

CLK_PCIE_VGA#[16]

CLK_PCIE_VGA[16]

CLK_PEGA_REQ#[16]

USB Overcurrent

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

TP75 TP73 TP84

TP10

R519 *short_4

R493 *short_4

R87 *short_4

+3V_S5

RP1

10

9 8 7 4

10K_10P 8R

2

Haswell ULT PCH (CLOCK)

U25F

CLK_PCIE_N0 CLK_PCIE_P0 CLK_PCIE_REQ0#

CLK_PCIE_REQ1#

CLK_PCIE_REQ2#

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

1 2 3

56

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5/GPIO23

HSW_ULT_DDR3L

+3V

CLK_PCIE_REQ0# CLK_PCIE_REQ1# CLK_PCIE_REQ2# CLK_PCIE_REQ3# CLK_PCIE_REQ5#

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLK_PCIE_REQ4#

CLOCK

SIGNALS

6 OF 19

R504 10K_ 4 R102 10K_ 4 R518 10K_ 4 R492 10K_ 4 R503 10K_ 4

R465 10K_ 4 R418 10K_ 4 R185 10K_ 4 R271 10K_ 4

R90 10K_4 R92 *1K_4

XTAL24_IN

XTAL24_OUT

RSVD RSVD

DIFFCLK_BIASREF

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLKOUT_LPC_0 CLKOUT_LPC_1

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

+3V

XTAL24_IN

XTAL24_OUT

A25 B25

K21 M21 C26

C35 C34 AK8 AL8

AN15 AP15

B35 A35

R446 1M_4

XTAL24_IN XTAL24_OUT

ICLK_BIAS TESTLOW_C35

TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLK_PCH_PCI3 CLK_PCH_PCI4

C221

*18p/50V _4

1

C443 12p/50V_4

Y4 24MHz

2 4

1 3

C442 12p/50V_4

R47 3.01K/F_4

*18p/50V _4

R170TPM@22_4 R17122_4 R16922_4

C226

09

+V1.05S_ AXCK_LCPLL

PCLK_TPM [2 1] CLK_PCI_LPC [24 ] CLK_PCI_EC [30]

CLK_PCIE_XDPN [13] CLK_PCIE_XDPP [13]

PCLK_TPMCLK_P CI_LPCCLK_PCI_EC

C222

*TPM@18p/50V_4

A A

Quanta Computer Inc.

PROJECT :

Size Docum ent Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

5

4

3

2

Tuesday, April 08, 2014

PROJECT :

LPT 3/6 (PCIE/USB/CLK)

ZQ0

9 46

1

9 46

3A

5

Haswell ULT PCH (GPIO,CPU/MISC,NCTF)

LowHigh

GPIO8

D D

C C

Touch panel No touch panel

GPIO8[22] GPIO15[8]

DGPU_PWROK[17]

TP26 TP132 TP15 TP53

DGPU_HOLD_RST#[16]

DGPU_PWR_EN[38]

MODPHY_EN[33]

TP33

ACCEL_INTA[29]

TP13

DEVSLP0[25]

SPKR[8,28]

BOARD_ID0 GPIO8 LAN_DISABLE# GPIO15 SKU_ID0 DGPU_PWROK GPIO24 WK_GPIO27 GPIO28 GPIO26

GPIO56 GPIO57 GPIO58 GPIO59 GPIO44 GPIO47 DGPU_HOLD_RST# DGPU_PWR_EN DGPU_PW_CTRL# MODPHY_EN GPIO13 GPIO14 GPIO25 GPIO45 ACCEL_INTA

GPIO9 GPIO10 DEVSLP0 BOARD_ID3 DEVSLP1 SKU_ID1 SPKR

Board ID

+3V

R497 10K_4

BOARD_ID1[2]

R89 10K_4

B B

BOARD_ID2[2]

R491 10K_4 R554 10K_4 R124 *10K_4

BOARD_ID4[2]

R488 10K_4

BOARD_ID0

BOARD_ID1

BOARD_ID2 BOARD_ID3

BOARD_ID4

Low

BOARD_ID0

BOARD_ID1

A A

BOARD_ID2

BOARD_ID3

BOARD_ID4

(Default)

Reserve for Touch pad, default(low)

DTPM

Non-Dolly (Default)

R498 *10K_4

R88 *10K_4

R490 *10K_4 R121 10K_4

R487 *10K_4

High

N15V-GM-BN15V-GL-B

ReserveReserved

No DTPM

Dolly

5

U25J

P1

BMBUSY/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO33

C4

SDIO_POWER_EN/GPIO70

L2

DEVSLP1/GPIO38

N5

DEVSLP2/GPIO39

V2

SPKR/GPIO81

RAM ID

SKU ID

R509 *IV@10K_4 R86 *IV@10K_4

UMA Only

dGPU Only

Switchable (Mux)

Optimize (Muxless)

4

3

2

www.laptopblue.vn

HSW_ULT_DDR3L

D60

+3V

+3V_S5 +3V_S5

+3V +3V +3V_S5 DSW +3V_S5 +3V_S5

+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V +3V +3V

+3V +3V_S5 +3V_S5 DSW +3V_S5 +3V_S5

+3V_S5 +3V_S5

SKU_ID1 SKU_ID0 VGA H/W

0

1

4

+3V_S5

GPIO

+3V

+3V +3V +3V +3V

10 OF 19

SKU_ID0 SKU_ID1

Signal

UMA

0

GPU

1

0

UMA+GPU dGPU/SG UMA boot

UMA

1

+3V

CPU/ MISC

+3V +3V +3V

GSPI0_MISO/GPIO85

+3V

GSPI0_MOSI/GPIO86

+3V +3V +3V

GSPI1_MISO/GPIO89

+3V +3V

UART0_RXD/GPIO91

+3V

UART0_TXD/GPIO92

+3V

UART0_RTS/GPIO93

SERIAL IO

+3V

UART0_CTS/GPIO94

+3V +3V +3V

UART1_RST/GPIO2

+3V

UART1_CTS/GPIO3

+3V +3V +3V +3V +3V +3V +3V +3V +3V +3V

R512 EV@10K_4 R143 EV@10K_4

Setup Menu

Hidden

UMA boot

Hidden

GPU boot

UMA/SG

UMA boot

THRMTRIP

RCIN/GPIO82

SERIRQ

PCH_OPI_RCOMP

RSVD RSVD

GSPI0_CS/GPIO83 GSPI0_CLK/GPIO84

GSPI1_CS/GPIO87 GSPI1_CLK/GPIO88

GSPI_MOSI/GPIO90

UART1_RXD/GPIO0 UART1_TXD/GPIO1

I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69

+3V

THRMTRIP#

V4

SIO_RCIN#

T4

IRQ_SERIRQ

AW15 AF20 AB21

R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2

OPI_COMP2

TP_INT_PCH GPIO84 GPIO85 GPIO86 GPIO87 GPIO88 GPIO89 GPIO90 GPIO91 GPIO92 GPIO93 GPIO94 SIO_EXT_SMI# SIO_EXT_SCI# DGPU_EVENT# GC6_FB_EN GPIO4 GPIO5 GPIO6 GPIO7

GPIO65 GPIO66 GPIO67 GPIO68 GPIO69

R579 49.9/F_4

CPU thermal trip

IMVP_PWRGD_3V

+1.05V_VCCST

THRMTRIP#

IMVP_PWRGD[5,35]

3

SIO_RCIN# [30]

IRQ_SERIRQ [21,30]

20131030 add touch pad

1A-13

interrupt pin on gpio83.

TP_INT_PCH [22]

GPIO86 [8]

SIO_EXT_SMI# [30] SIO_EXT_SCI# [30]

DGPU_EVENT# [19]

GC6_FB_EN [17,19] I2C0_SDA_GPIO4 [29] I2C0_SCL_GPIO5 [29] I2C1_SDA_GPIO6 [22] I2C1_SCL_GPIO7 [22]

PCH_ODD_EN [25]

1A-14

2013/11/01 change GPIO64 to PCH_ODD_EN and PD.

+1.05V_VCCST

3

2

1

R132 1K_4

R133

2

1K_4

1 3

Q16 MMBT3904-7-F

U3

NC1VCC

2

A

GND3Y

74AUP1G07GW

20130926 chnge GPIO port

2013/10/16 BIOS suggestion change SMI/SCI to GPIO0~15

1A-3

GPIO66 [8]

GPU GC6 2.0 function use GPIO2/3.

Q13 FDV301N

SYS_SHDN# [32,36]

+1.05V_VCCST

5

12

C154

0.1u/10V_4

4

+3V

2

R144 10K_4

1

PCH GPIO PU/PD

IRQ_SERIRQ DEVSLP0 DEVSLP1

SIO_RCIN# SIO_EXT_SMI# SIO_EXT_SCI#

GPIO85

GPIO87

GPIO88

GPIO89

GPIO90

GPIO91

GPIO92

GPIO93

GPIO94

R470 *10K_4

R514 *100K_4

R150 *EVG@10K_4

PCH_ODD_EN

GPIO65

TP_INT_PCH

GPIO84

I2C0_SDA_GPIO4

I2C0_SCL_GPIO5

GPIO67

GPIO68

GPIO69

DGPU_PWR_EN

I2C1_SDA_GPIO6

I2C1_SCL_GPIO7

DGPU_HOLD_RST#

GC6_FB_EN

1A-1 20131015 For GC6 NV DG GC6_FB_EN PD. 1A-8 20131022 Change GPIO83/84 GPU GC6 pin

to GPIO2/3.

1A-12 20131029 Change GPIO45 to PU S5,

duble GPIO58 one is GPIO56.

high UMA Only

GPU power is control by PCH

low

R500 EV@100K_4

GPIO (Discrete, SG or Optimize)

DGPU_PW_CTRL#

DGPU_PWROK

DGPU_PWROK PD on GPU side

LAN_DISABLE# GPIO8

ACCEL_INTA GPIO24 GPIO28 GPIO47 GPIO57 GPIO56 GPIO59 GPIO26 GPIO58 GPIO44 GPIO13 GPIO14 GPIO9 GPIO10 GPIO45

GPIO25

WK_GPIO27

1B-7 20131220 Change +3VPCU to +3V_S5

IMVP_PWRGD_3V [7]

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

GPIO27 : If not used then use

8.2-kΩ to 10-kΩ pull-down to GND.

Quanta Computer Inc.

PROJECT :

LPT 4/6 (GPIO/MISC)

R494 10K_4 R496 *10K_4 R486 *10K_4 R506 10K_4 R73 10K_4 R131 10K_4

R77 10K_4 R152 10K_4 R67 10K_4 R81 10K_4 R484 10K_4 R483 10K_4 R78 10K_4 R480 10K_4 R479 10K_4 R69 10K_4 R473 10K_4 R94 10K_4 R59 10K_4 R474 2.2K_4 R475 2.2K_4 R130 10K_4 R128 10K_4 R581 10K_4 R513 10K_4 R54 10K_4 R53 10K_4 R478 10K_4 R79 *IV@10K_4

R499 *IV@1K_4

R96 *10K_4

R260 10K_4 R167 10K_4

R114 *10K_4 R101 10K_4 R520 10K_4 R113 10K_4

R104 10K_4 R183 10K_4 R163 10K_4 R120 10K_4 R523 10K_4 R558 10K_4 R115 10K_4 R263 10K_4 R161 10K_4 R105 10K_4 R127 10K_4 R556 *10K_4

R125 *10K_4 R560 *10K_4 R559 10K_4

non deep sx

1

ZQ0

10

+3V

+3V_S5

+3VPCU

10 46

3A

5

C437 *1u/6.3V_4 C163 1u/6.3V_4 C175 1u/6.3V_4

+1.05V

25mA

C149 1u/6.3V_4

R43 *SHORT_8

+1.05V_S5

+1.05V_DCPSUS2

Deep Sx

+3VPCU

+3V_S5

D D

R292 *0_6

+1.05V_S5

Non Deep Sx

+3V

C C

+1.05V

C164 1u/6.3V_4

WW15 4/10 Intel VCCDSW3 G3 can't boot issue.

C472

+PCH_VCCDSW+VCCPDSW

0.47u/25V_6

+1.05V_MODPHY

1.741A

C181 *1u/6.3V_4

R294 *0_6

C177

10u/6.3V_6

R568 *0_6

R569 *Short_6

C152

1u/6.3V_4

R49 *SHORT_8

+3VCC_S5

+V1.05S_AIDLE

10mA

C166

1u/6.3V_4

+V3.3DX_1.5DX_1.8DX_AUDIO

0.114A

41mA

C114 22u/6.3V_8

+1.05V

63mA

+3VCC_S5

PCH VCCHSIO Power

4

www.laptopblue.vn

1.838A

K9

L10

M9 N8 P9

+V1.05S_AUSB3PLL

+V1.05S_ASATA3PLL

+V1.05S_APLLOPI

+1.05V_DCPSUS3

C236 22u/6.3V_8

+VCCPDSW

+V3.3S_VCCPCORE

+V1.05S_AXCK_DCB +V1.05S_AXCK_LCPLL

C119 1u/6.3V_4

B18 B11

Y20

AA21

W21

AH14

AH13

AC9 AA9

AH10

K19 A20

R21 T21 K18 M20

V21 AE20 AE21

J13

V8

W9

J18

J17

Haswell ULT PCH (Power)

U25M

VCCHSIO VCCHSIO VCCHSIO VCC1_05 VCC1_05 VCCUSB3PLL VCCSATA3PLL

RSVD VCCAPLL VCCAPLL

DCPSUS3

VCCHDA

DCPSUS2

VCCSUS3_3 VCCSUS3_3 VCCDSW3_3 VCC3_3 VCC3_3

VCCCLK VCCCLK VCCACLKPLL VCCCLK VCCCLK VCCCLK RSVD RSVD RSVD VCCSUS3_3 VCCSUS3_3

HSW_ULT_DDR3L

HSIO

OPI

USB3

HDA

VRM

GPIO/LPC

LPT LP POWER

13 OF 19

3

RTC

SPI

CORE

THERMAL SENSOR

SERIAL IO

SUS OSCILLATOR

USB2

VCCSUS3_3

VCCRTC DCPRTC

VCCSPI

VCCASW VCCASW

VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCC1_05 DCPSUSBYP DCPSUSBYP

VCCASW

DCPSUS1 DCPSUS1

VCCTS1_5

VCC3_3 VCC3_3

VCCSDIO VCCSDIO

DCPSUS4

RSVD VCC1_05 VCC1_05

AH11 AG10 AE7

Y8

AG14 AG13

J11 H11 H15 AE8 AF22 AG19 AG20 AE9 AF9 AG8 AD10 AD8

J15 K14 K16

U8 T9

AB8

AC20 AG16 AG17

+VCCRTCEXT

+V3.3M_PSPI

PCH_VCC_1_1_21

+V1.05S_CORE_PCH

+1.05V_DCPSUS1

18mA

+PCH_VCCDSW

+V1.05M_VCCASW

0.109A

R293 *0_6

C143 1u/6.3V_4

+V3.3S_VCCSDIO +1.05V_DCPSUS4

2

R119 *Short_6

+V1.05M_VCCASW

+1.05V_S5

3mA 1mA

17mA

R291 *0_6

C197 1u/6.3V_4

C131

0.1u/10V_4

+V1.5S_VCCATS +V3.3S_VCCPTS

C139 1u/6.3V_4

C488

0.1u/10V_4

C148 1u/6.3V_4

0.658A

C142 1u/6.3V_4

+1.05V_S5

+1.05V +1.05V

C491

0.1u/10V_4

R117 *Short_6

R118 *0_6

C144

0.1u/10V_4

C159 1u/6.3V_4

C153 1u/6.3V_4

R108 *SHORT_8

C134 22u/6.3V_8

R111 *Short_6 R107 *Short_6

C183 1u/6.3V_4

C194 1u/6.3V_4

+3VCC_S5

+3V_RTC

C487 1u/6.3V_4

R48 *SHORT_8

C192 10u/6.3V_6

R100 *Short_6

1

11

+3V_S5 +3V

+1.05V

+1.5V +3V

+3V

+V1.05S_APLLOPI+1.05V

C99 1u/6.3V_4

+V1.05S_VCCUSBCORE

2

B B

1A-1 2013/10/11 del LDO change to MOS.

+1.05V_MODPHY +V1.05S_AUSB3PLL +1.05V_MODPHY +V1.05S_ASATA3PLL

A A

L7 2.2uH/210mA_8

C88

47u/6.3V_8

C77 47u/6.3V_8

C115 1u/6.3V_4

L28 2.2uH/120mA_6 C68

C89

47u/4V_8

42mA41mA

C79 47u/4V_8

C448 1u/6.3V_4

2013/10/31 PN change to H=0.85.L17 H=0.9

5

4

VCCAPLL power

L3 2.2uH/210mA_8

PCH HDA Power

+3V_S5

R196 *Short_6

3

C121

*47u/6.3V_8

11mA

+V3.3DX_1.5DX_1.8DX_AUDIO

C155

0.1u/10V_4

Place close to ball

57mA

C122 *47u/6.3V_8

R270 *SHORT_8

C151 1u/6.3V_4

+1.05V +V1.05S_AXCK_DCB

L5 2.2uH/210mA_8

+1.05V +V1.05S_AXCK_LCPLL

L2 2.2uH/210mA_8

+1.05V

0.2A

C112

47u/6.3V_8

C104 47u/6.3V_8

C158 1u/6.3V_4

31mA

47u/6.3V_8

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

C76 47u/6.3V_8

Quanta Computer Inc.

PROJECT :

LPT 5/6 (POWER)

C111 1u/6.3V_4

1

ZQ0

11 46

3A

5

4

3

2

1

www.laptopblue.vn

Haswell ULT (GND)

12

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

U25O

HSW_ULT_DDR3L

15 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31

D33 D34 D35 D37 D38 D39 D41 D42 D43 D45 D46 D47 D49

D50 D51 D53 D54 D55 D57 D59 D62

G18 G22

H13

E11 E17 F20 F26 F30 F34 F38 F42 F46 F50 F54 F58 F61

HSW_ULT_DDR3L

U25P

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

D5

VSS VSS VSS VSS VSS VSS VSS VSS VSS

D8

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS VSS

16 OF 19

VSS_SENSE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS

VSS

H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63

V58 AH46 V23 E62 AH16

VSS_SENSE_R

U25R

AT2

RSVD

AU44

RSVD

AV44

RSVD

D15

RSVD

F22

RSVD

H22

RSVD

J21

RSVD

R422 *short_4 R428 100/F_4

HSW_ULT_DDR3L

D D

C C

B B

A11 A14 A18 A24 A28 A32 A36 A40 A44 A48 A52 A56

AA1 AA58 AB10 AB20 AB22

AB7

AC61 AD21

AD3

AD63

AE10

AE5 AE58 AF11 AF12 AF14 AF15 AF17 AF18

AG1

AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57

AJ13 AJ14 AJ23 AJ25 AJ27 AJ29

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

U25N

14 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20

AP22 AP23 AP26 AP29

AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49

AR52

AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63

AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55

AP3

AR5

AU1

HSW_ULT_DDR3L

18 OF 19

VSS_SENSE [35]

RSVD RSVD RSVD RSVD

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

N23 R23 T23 U10

AL1 AM11 AP7 AU10 AU15 AW14 AY14

U25Q

DC_TEST_AY2_AW2 DC_TEST_AY3_AW3 TP_DC_TEST_AY60

TP134

DC_TEST_AY61_AW 61 DC_TEST_AY62_AW 62 TP_DC_TEST_B2

A A

5

TP77

DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_B62_B63

DC_TEST_C1_C2

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

4

HSW_ULT_DDR3L

17 OF 19

DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63

3

A3

DC_TEST_A3_B3

A4

TP_DC_TEST_A4

A60

TP_DC_TEST_A60

A61

DC_TEST_A61_B61

A62

TP_DC_TEST_A62

AV1

TP_DC_TEST_AV1

AW1

TP_DC_TEST_AW 1

AW2

DC_TEST_AY2_AW2

AW3

DC_TEST_AY3_AW3

AW61

DC_TEST_AY61_AW 61

AW62

DC_TEST_AY62_AW 62

AW63

TP_DC_TEST_AW 63

TP76 TP74 TP78

TP95 TP94

TP133

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

2

Monday, April 07, 2014

PROJECT :

LPT 6/6 (GND)

1

ZQ0

12 46

3A

5

H_SYS_PWROK_XDP

R287 *1K_4

+3V_S5

4

3

2

www.laptopblue.vn

1

13

+3V

D D

C C

B B

XDP_DBRESET_N

R657 *1K_4

HWPG_1.05V_S5[30,33]

SYS_PWROK[7]

R667 *0_6

R288 *0_4

APS3

XDP_PREQ#[4] XDP_PRDY#[4]

XDP_BPM#0[4] XDP_BPM#1[4]

PWR_DEBUG[5]

CLK_SDATA[8,14,15,24]

R668 *0_6

CFG0[6] CFG1[6]

CFG2[6] CFG3[6]

CFG4[6,8] CFG5[6]

CFG6[6] CFG7[6]

CLK_SCLK[8,14,15,24] XDP_TCK1[8] XDP_TCK0[4,8]

APS

CN20

A A

*ACES_88511-180N

1

APS1

1

2

3

APS3

3

4

5

6

7

APS7

7

8

9

10

11

12

13

14

15

16

17

18

5

R666 *0_6

R665 *0_4

R659 *0_6 R664 *0_4 R663 *0_4 R662 *0_4

R661 *0_6 R674 *0_4 R671 *0_4 R672 *0_4

+3VCC_S5

SYS_RESET#

SUSB# [7,30] PCH_SLP_S5# [7]

SUSC# [7,30] PCH_SLP_A# [7]

RTC_RST# [8] NBSWON# [21,30] SYS_RESET# [7]

4

+3VPCU

APS7APS1

VCCST_PWRGD[5]

XDP_PREQ_N XDP_PRDY_N

CFG0 CFG1

CFG2 CFG3

CFG4 CFG5

CFG6 CFG7

VCCST_PWRGD_XDP NBSWON#

H_SYS_PWROK_XDP

U19

NC1VCC

2

A

3

GND

*74AUP1G07GW

XDP_TDO

XDP_TDI

XDP_TMS

XDP_TRST_N

R393 *10K_4

NOA_STBP_0 NOA_STBN_0

CFG8 CFG9

CFG10 CFG11

NOA_STBP_1 NOA_STBN_1

CFG12 CFG13

CFG14 CFG15

CK_XDP_P_R CK_XDP_N_R

XDP_RST_R_N XDP_DBRESET_N

XDP_TDO XDP_TRST_N XDP_TDI XDP_TMS

+3V

NOA_STBP_0 [6] NOA_STBN_0 [6]

CFG8 [6] CFG9 [6]

CFG10 [6] CFG11 [6]

NOA_STBP_1 [6] NOA_STBN_1 [6]

CFG12 [6] CFG13 [6]

CFG14 [6] CFG15 [6]

R417 *0_4R286 *1K_4 R416 *0_4

R204 *1K_4 R658 *0_4

R395 *51_4

C176 *0.1u/10V_4

U20

14

VCC

2

1A

1

1OE

5

2A

4

2OE

9

3A

10

3OE

12

4A

13

4OE

*74CBTLV3126

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

SYS_RESET#

1B

2B

3B

4B

DPAD

GND

CPU/PCH XDP

Tuesday, April 08, 2014

CLK_PCIE_XDPP [9] CLK_PCIE_XDPN [9]

PLTRST# [7,16,21,24,26,27,30]

+1.05V_S5

3

6

8

11

15 7

Quanta Computer Inc.

PROJECT :

XDP_TDO_CPU [4]

XDP_TDI_CPU [4]

XDP_TMS_CPU [4]

XDP_TRST# [4,8]

ZQ0

13 46

1

3A

TP125

TP106

TP128

TP117

TP129

TP35

TP131

TP121 TP120

TP27

TP130

TP19 TP107

TP113

TP109

TP114

TP118

TP115

TP112

TP116

TP122

TP28

TP127

TP30

TP97

TP62 TP140

TP96

TP8

TP59

TP136

TP139 TP88

TP119 TP45

TP90

TP126

TP91

TP7

TP92

XDP_TDO[8]

XDP_TDI[8]

XDP_TMS[8]

+1.05V

+3V

5

*0.1u/10V_4

4

Y

3

C387

12

1

M_A_A[15:0][3]

A A

M_A_BS#0[3] M_A_BS#1[3] M_A_BS#2[3] M_A_CS#0[3] M_A_CS#1[3] M_A_CLK0[3] M_A_CLK0#[3] M_A_CLK1[3] M_A_CLK1#[3] M_A_CKE0[3] M_A_CKE1[3] M_A_CAS#[3] M_A_RAS#[3]

CLK_SCLK[8,13,15,24]

CLK_SDATA[8,13,15,24]

M_A_ODT0_DIMM[4] M_A_ODT1_DIMM[4]

M_A_DQS[7:0][3]

M_A_DQS#[7:0][3]

C296 10u/6.3V_6

+DDR_VTT_RUN

M_A_WE#[3]

C295 10u/6.3V_6

C312 1u/6.3V_4

C294

0.1u/10V_4

R258 10K_4 R254 10K_4

1A-8

2013/10/23 Change DIMM1_SA0/SA1

B B

to DIMM0_SA0/SA1.

1A-2

2013/10/16 Chage net name M_B_DQS#[7:0] to

C C

+1.35V_SUS

C315 10u/6.3V_6

+3V

C298

2.2u/6.3V_6

D D

M_A_DQS#[7:0].

Place these Caps near SO-DIMM

C320 10u/6.3V_6

C293 10u/6.3V_6

C314 10u/6.3V_6

C289

0.1u/10V_4

1

C319

0.1u/10V_4

C318

0.1u/10V_4

C303 1u/6.3V_4

2

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

C291

0.1u/10V_4

2

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

C316

0.1u/10V_4

C323 1u/6.3V_4

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

JDIM2A

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A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM1_H=4.0_STD

+SMDDR_VREF_DIMM

+

C297

C321

330u/2V_7343

0.1u/10V_4

C305 1u/6.3V_4

C306

4.7u/6.3V_6

3

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

2.2u/6.3V_6

3

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

+SMDDR_VREF_DQ0

C336

0.1u/10V_4

C311

4.7u/6.3V_6

C299

C288

2.2u/6.3V_6

C324

4.7u/6.3V_6

4

M_A_DQ2 [3] M_A_DQ6 [3] M_A_DQ7 [3] M_A_DQ3 [3] M_A_DQ0 [3] M_A_DQ1 [3] M_A_DQ5 [3] M_A_DQ4 [3] M_A_DQ9 [3]

M_A_DQ8 [3] M_A_DQ15 [3] M_A_DQ11 [3] M_A_DQ12 [3] M_A_DQ13 [3] M_A_DQ14 [3] M_A_DQ10 [3] M_A_DQ16 [3] M_A_DQ17 [3] M_A_DQ19 [3] M_A_DQ18 [3] M_A_DQ21 [3] M_A_DQ20 [3] M_A_DQ23 [3] M_A_DQ22 [3] M_A_DQ25 [3] M_A_DQ24 [3] M_A_DQ31 [3] M_A_DQ26 [3] M_A_DQ28 [3] M_A_DQ29 [3] M_A_DQ27 [3] M_A_DQ30 [3] M_A_DQ33 [3] M_A_DQ32 [3] M_A_DQ35 [3] M_A_DQ34 [3] M_A_DQ36 [3] M_A_DQ37 [3] M_A_DQ39 [3] M_A_DQ38 [3] M_A_DQ46 [3] M_A_DQ44 [3] M_A_DQ41 [3] M_A_DQ45 [3] M_A_DQ40 [3] M_A_DQ42 [3] M_A_DQ43 [3] M_A_DQ47 [3] M_A_DQ49 [3] M_A_DQ52 [3] M_A_DQ54 [3] M_A_DQ53 [3] M_A_DQ48 [3] M_A_DQ55 [3] M_A_DQ51 [3] M_A_DQ50 [3] M_A_DQ56 [3] M_A_DQ60 [3] M_A_DQ58 [3] M_A_DQ62 [3] M_A_DQ57 [3] M_A_DQ61 [3] M_A_DQ63 [3] M_A_DQ59 [3]

CHA CHB

4

+VREF_CA_CPU

M3 solution

+VREFDQ_SA_M3

M3 solution

SA0SA1

0 0

01

5

DDR3_DRAMRST#[4,15]

R382 *Short_6

R238 *Short_6

5

R259 *10K_4

+3V

+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM

R311 2/F_6

C334

0.022u/16V_4

1 2

R381

24.9/F_4

R244 2/F_6

C287

0.022u/16V_4

1 2

R242

24.9/F_4

6

+1.35V_SUS

2.48A

+3V

PM_EXTTS#0

C309 *0.1u/10V_4

+SMDDR_VREF_DQ0

M1 solution

+1.35V_SUS

R310

1.8K/F_4

R295

1.8K/F_4

M1 solution

+1.35V_SUS

R252

1.8K/F_4

R251

1.8K/F_4

6

7

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4.0_STD

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+DDR_VTT_RUN

Vref_CA

+SMDDR_VREF_DIMM

C322 470p/50V_4

Vref_DQ

+SMDDR_VREF_DQ0

C300 470p/50V_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

PROJECT :

DDR3 MEMORY SO-DIMM A

7

ZQ0

14 46

8

14

8

3A

5

M_B_A[15:0][3]

D D

M_B_BS#0[3] M_B_BS#1[3] M_B_BS#2[3] M_B_CS#0[3] M_B_CS#1[3] M_B_CLK0[3] M_B_CLK0#[3] M_B_CLK1[3] M_B_CLK1#[3] M_B_CKE0[3] M_B_CKE1[3] M_B_CAS#[3] M_B_RAS#[3]

CLK_SCLK[8,13,14,24]

CLK_SDATA[8,13,14,24]

M_B_ODT0_DIMM[4] M_B_ODT1_DIMM[4]

M_B_DQS[7:0][3]

M_B_DQS#[7:0][3]

C257 10u/6.3V_6

+DDR_VTT_RUN

M_B_WE#[3]

C284 10u/6.3V_6

C254

0.1u/10V_4

R312 10K_4 R319 10K_4

+3V

C C

B B

1A-2

2013/10/16 Swap M_B_DQS2/M_B_DQS3 and swap M_B_DQS#2/M_B_DQS#3.

+1.35V_SUS

C278 10u/6.3V_6

+3V

Place these Caps near SO-DIMM

C275 10u/6.3V_6

C256 10u/6.3V_6

C258 10u/6.3V_6

C277

0.1u/10V_4

C280

0.1u/10V_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_DQS2 M_B_DQS0 M_B_DQS1 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#2 M_B_DQS#0 M_B_DQS#1 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

0.1u/10V_4

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

C279

0.1u/10V_4

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

+

4

3

2

www.laptopblue.vn

JDIM1A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM1_H=4.0_RVS

+SMDDR_VREF_DIMM

C281

C290 330u/2V_7343

0.1u/10V_4

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

2.2u/6.3V_6

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

+SMDDR_VREF_DQ1

C304

0.1u/10V_4

C264

C259

2.2u/6.3V_6

M_B_DQ23 [3] M_B_DQ22 [3] M_B_DQ19 [3] M_B_DQ20 [3] M_B_DQ16 [3] M_B_DQ17 [3] M_B_DQ21 [3] M_B_DQ18 [3]

M_B_DQ4 [3] M_B_DQ2 [3] M_B_DQ7 [3] M_B_DQ6 [3] M_B_DQ3 [3] M_B_DQ5 [3] M_B_DQ1 [3]

M_B_DQ0 [3] M_B_DQ13 [3] M_B_DQ12 [3] M_B_DQ11 [3] M_B_DQ10 [3]

M_B_DQ9 [3]

M_B_DQ8 [3] M_B_DQ15 [3] M_B_DQ14 [3] M_B_DQ30 [3] M_B_DQ27 [3] M_B_DQ29 [3] M_B_DQ28 [3] M_B_DQ31 [3] M_B_DQ26 [3] M_B_DQ24 [3] M_B_DQ25 [3] M_B_DQ36 [3] M_B_DQ37 [3] M_B_DQ34 [3] M_B_DQ38 [3] M_B_DQ33 [3] M_B_DQ32 [3] M_B_DQ35 [3] M_B_DQ39 [3] M_B_DQ42 [3] M_B_DQ43 [3] M_B_DQ45 [3] M_B_DQ47 [3] M_B_DQ41 [3] M_B_DQ40 [3] M_B_DQ44 [3] M_B_DQ46 [3] M_B_DQ55 [3] M_B_DQ51 [3] M_B_DQ48 [3] M_B_DQ54 [3] M_B_DQ52 [3] M_B_DQ49 [3] M_B_DQ53 [3] M_B_DQ50 [3] M_B_DQ56 [3] M_B_DQ61 [3] M_B_DQ58 [3] M_B_DQ60 [3] M_B_DQ57 [3] M_B_DQ62 [3] M_B_DQ59 [3] M_B_DQ63 [3]

+VREFDQ_SB_M3

M3 solution

DDR3_DRAMRST#[4,14]

R297 *Short_6

R327 *10K_4

+3V

+SMDDR_VREF_DQ1

+SMDDR_VREF_DIMM

R305 2/F_6C253

C246

0.022u/16V_4

1 2

R299

24.9/F_4

2.48A

C283 *0.1u/10V_4

M1 solution

+1.35V_SUS

+3V

PM_EXTTS#1

+SMDDR_VREF_DQ1

R308

1.8K/F_4

R309

1.8K/F_4

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4.0_RVS

Vref_DQ

+SMDDR_VREF_DQ1

C261 470p/50V_4

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

1

15

+DDR_VTT_RUN

A A

C248

2.2u/6.3V_6

C260

0.1u/10V_4

C249 1u/6.3V_4

C274 1u/6.3V_4

C262 1u/6.3V_4

C285 1u/6.3V_4

C265

4.7u/6.3V_6

C267

4.7u/6.3V_6

C273

4.7u/6.3V_6

SA0SA1

Quanta Computer Inc.

CHA CHB

5

4

0 0

3

01

2

Size Document Number Rev

DDRIII Memory SO-DIMM B

Date: Sheet of

Quanta Computer Inc.

PROJECT :

ZQ0

15 46Monday, April 07, 2014

1

3A

1

2

3

4

5

6

7

8

+1.05V_GFX

A A

Near GPU

C31 EV@22U/6.3VS_6 C33 EV@22U/6.3VS_6 C41 EV@10U/6.3VS_6 C40 EV@10U/6.3VS_6 C34 EV@4.7U/6.3V_6

C82 EV@1U/6.3V_4 C52 EV@1U/6.3V_4

Under GPU

AA22 AB23 AC24 AD25 AE26 AE27

U21A

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_IOVDD + PEX_IOVDDQ = 1.042A

+1.05V_GFX

C32 EV@22U/6.3VS_6 C29 EV@22U/6.3VS_6 C44 EV@10U/6.3VS_6 C26 EV@10U/6.3VS_6 C43 EV@4.7U/6.3V_6

Near GPU

Under GPU

C60 EV@1U/6.3V_4 C45 EV@1U/6.3V_4

PEX_PLL_HVDD +

B B

PEX_SVDD_3V3 = 143mA

+3V_GFX

8mils width

C C

(0.2MM)

1B-5 2013/12/17 Change R8051 to 0402 size.

R40 EV@0_4

+1.05V_GFX

Near GPU

D D

Under GPU

1

C107 EV@0.1U/10V_4 C105 EV@4.7U/6.3V_6

C106 EV@4.7U/6.3V_6

Near GPU

VGA_VCCSENSE[37]

VGA_VSSSENSE[37]

PEX_TSTCLK

R409*EV@200/F_4

PEX_TSTCLK#

CX300T30001 Change to 0ohm

PEX_PLLVDD

C63EV@4.7U/6.3V_6 C62EV@1U/6.3V_4

C65EV@0.1U/10V_4

PEX_PLLVDD = 130mA

EV@10K/F_4

R42

R408EV@2.49K/F_4

TESTMODE

PEX_TERMP

AA10

PEX_IOVDDQ

AA12

PEX_IOVDDQ

AA13

PEX_IOVDDQ

AA16

PEX_IOVDDQ

AA18

PEX_IOVDDQ

AA19

PEX_IOVDDQ

AA20

PEX_IOVDDQ

AA21

PEX_IOVDDQ

AB22

PEX_IOVDDQ

AC23

PEX_IOVDDQ

AD24

PEX_IOVDDQ

AE25

PEX_IOVDDQ

AF26

PEX_IOVDDQ

AF27

PEX_IOVDDQ

AA8

PEX_PLL_HVDD

AA9

PEX_PLL_HVDD

AB8

PEX_SVDD_3V3

F2

VDD_SENSE

F1

GND_SENSE

AF22

PEX_TSTCLK_OUT

AE22

PEX_TSTCLK_OUT

AA14

PEX_PLLVDD

AA15

PEX_PLLVDD

AD9

TESTMODE

AF25

PEX_TERMP

bga595-nvidia-n13p-gv2-s-a2 COMMON

2

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NC NC

1/14 PCI_EXPRESS

PEX_WAKE

PEX_RST

PEX_CLKREQ

PEX_REFCLK PEX_REFCLK

PEX_TX0 PEX_TX0

PEX_RX0 PEX_RX0

PEX_TX1 PEX_TX1

PEX_RX1 PEX_RX1

PEX_TX2 PEX_TX2

PEX_RX2 PEX_RX2

PEX_TX3 PEX_TX3

PEX_RX3 PEX_RX3

PEX_TX4 PEX_TX4

PEX_RX4 PEX_RX4

PEX_TX5 PEX_TX5

PEX_RX5 PEX_RX5

PEX_TX6 PEX_TX6

PEX_RX6 PEX_RX6

PEX_TX7 PEX_TX7

PEX_RX7 PEX_RX7

PEX_TX8 PEX_TX8

PEX_RX8 PEX_RX8

PEX_TX9 PEX_TX9

PEX_RX9 PEX_RX9

PEX_TX10 PEX_TX10

PEX_RX10 PEX_RX10

PEX_TX11 PEX_TX11

PEX_RX11 PEX_RX11

PEX_TX12 PEX_TX12

PEX_RX12 PEX_RX12

PEX_TX13 PEX_TX13

PEX_RX13 PEX_RX13

PEX_TX14 PEX_TX14

PEX_RX14 PEX_RX14

PEX_TX15 PEX_TX15

PEX_RX15 PEX_RX15

GF119GF117

3

1B-7

AB6

2013/12/20 del c8521 and R8391.

AC7 AC6

PEX_CLKREQ#

AE8 AD8

AC9

PEG_RX0_C

AB9

PEG_RX0#_C

AG6 AG7

AB10

PEG_RX1_C

AC10

PEG_RX1#_C

AF7 AE7

AD11

PEG_RX2_C

AC11

PEG_RX2#_C

AE9 AF9

AC12

PEG_RX3_C

AB12

PEG_RX3#_C

AG9 AG10

AB13 AC13

AF10 AE10

AD14 AC14

AE12 AF12

AC15 AB15

AG12 AG13

AB16 AC16

AF13 AE13

AD17 AC17

AE15 AF15

AC18 AB18

AG15 AG16

AB19 AC19

AF16 AE16

AD20 AC20

AE18 AF18

AC21 AB21

AG18 AG19

AD23 AE23

AF19 AE19

AF24 AE24

AE21 AF21

AG24 AG25

AG21 AG22

R56 EV@10K/F_4

C430 EV@0.22U/10V_4 C429 EV@0.22U/10V_4

C428 EV@0.22U/10V_4 C427 EV@0.22U/10V_4

C420 EV@0.22U/10V_4 C418 EV@0.22U/10V_4

C425 EV@0.22U/10V_4 C423 EV@0.22U/10V_4

PLTRST#[7,13,21,24,26,27,30]

DGPU_HOLD_RST#[10]

PEX_CLKREQ#

4

PEGX_RST# [19]

+3V_GFX

CLK_PCIE_VGA [9] CLK_PCIE_VGA# [9]

PEG_RX0 [9] PEG_RX#0 [9]

PEG_TX0 [9] PEG_TX#0 [9]

PEG_RX1 [9] PEG_RX#1 [9]

PEG_TX1 [9] PEG_TX#1 [9]

PEG_RX2 [9] PEG_RX#2 [9]

PEG_TX2 [9] PEG_TX#2 [9]

PEG_RX3 [9] PEG_RX#3 [9]

PEG_TX3 [9] PEG_TX#3 [9]

+3V

EVG@MC74VHC1G08DFT2G

U24

2 1

GPU_PEX_RST_HOLD#[19]

Un-stuff Sys_PEX_RST_MON# , stuff PEGX_RST# for not GC6 stuff Sys_PEX_RST_MON# for GC6

C455 EV@0.1U/10V_4

4

R450 *EV@0_4

3 5

R455 EVG@0_4

GPU_PEX_RST_HOLD#

+3V_GFX

Follow Z09 to isolate CLK_REQ#

2

1

Q7 EV@2N7002K

R64 *EV@0_4

3

5

NVDD = 32.22 ~ 26.66 A

Under GPU

C53 EV@1U/6.3V_4 C56 EV@1U/6.3V_4 C55 EV@1U/6.3V_4 C54 EV@1U/6.3V_4 C39 EV@4.7U/6.3V_6 C87 EV@4.7U/6.3V_6 C83 EV@4.7U/6.3V_6 C80 EV@4.7U/6.3V_6 C90 EV@4.7U/6.3V_6 C42 EV@4.7U/6.3V_6 C57 EV@4.7U/6.3V_6 C91 EV@4.7U/6.3V_6 C78 EV@4.7U/6.3V_6 C86 EV@4.7U/6.3V_6

C146 EV@330u_2.5V_3528

C85 EV@22U/6.3V_8 C72 EV@10U/6.3VS_6

C66 EV@4.7U/6.3VS_6 C38 EV@4.7U/6.3VS_6 C70 EV@4.7U/6.3VS_6 C47 EV@4.7U/6.3VS_6 C49 EV@4.7U/6.3VS_6

Near GPU

SYS_PEX_RST_MON# [19]

+3V

U22

*EV@MC74VHC1G08DFT2G

2

SYS_PEX_RST_MON#

1

CLK_PEGA_REQ# [9]

PU at page 9

+VGPU_CORE

U21E

11/14 NVVDD

K10

VDD

K12

VDD

K14

VDD

K16

VDD

K18

VDD

L11

VDD

L13

VDD

L15

VDD

L17

VDD

M10

VDD

M12

VDD

M14

VDD

M16

VDD

M18

VDD

N11

VDD

N13

12

+

4

3 5

N15 N17 P10 P12 P14 P16 P18 R11 R13 R15 R17 T10 T12 T14 T16 T18 U11 U13 U15 U17 V10 V12 V14 V16 V18

C456 *EV@0.1U/10V_4

PEGX_RST#

R456 EVG@100K/F_4

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

bga595-nvidia-n13p-gv2-s-a2 COMMON

Power down sequence

6

VDD33 = 56mA

U21C

14/14 XVDD/VDD33

AD10

AD7

B19

F11

V5 V6

G1 G2 G3 G4 G5 G6 G7

V1 V2

NC NC NC

3V3AUX_NC

FERMI_RSVD1_NC FERMI_RSVD2_NC

CONFIGURABLE POWER CHANNELS * nc on substrate

XPWR_G1 XPWR_G2 XPWR_G3 XPWR_G4 XPWR_G5 XPWR_G6 XPWR_G7

XPWR_V1 XPWR_V2

VDD33 VDD33 VDD33 VDD33

G10 G12 G8 G9

+3V_MAIN

C101 EV@4.7U/6.3V_6

1 2

C98 EV@1U/10V_6

C93 EV@0.1U/10V_4 C92 EV@0.1U/10V_4

Near GPU

C109 EV@4.7U/6.3V_6

1 2

C110 EV@1U/10V_6

C108 EV@0.1U/10V_4

Under GPU

W1

XPWR_W1

W2

XPWR_W2

W3

XPWR_W3

W4

XPWR_W4

bga595-nvidia-n13p-gv2-s-a2 COMMON

VDD33 +3V_GFX/ +3V_MAIN

NVDD +VGPU_CORE

PXE_VDD +1.05V_GFX

FBVDDQ +1.35_GFX

t>0

N15x Power on sequance

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

N15S-GT (PCIE I/F) /NVDD

Date: Sheet of

7

PROJECT :

ZQ0

16 46Tuesday, April 08, 2014

8

14

+3V_GFX

3A

1

EC_FB_CLAMP[17,19,30]

R459 *EV@0_4

R444 EV@10K/F_4

For GC6 2.0 and 1.0 stuff EC_FB_CLAMP

PV modify

A A

FBA_ODT_L FBA_ODT_H FBA_RST# FBA_CKE_L FBA_CKE_H

TP93

B B

TP2

TP1

C C

FBA_CMD2 FBA_CMD18 FBA_CMD5 FBA_CMD3 FBA_CMD19

FBA_CMD1

FBA_CMD17

FBA_CMD31

+1.35V_GFX

FBA_CMD10[20] FBA_CMD11[20] FBA_CMD12[20] FBA_CMD13[20] FBA_CMD14[20] FBA_CMD15[20] FBA_CMD16[20]

FBA_CMD18[20] FBA_CMD19[20] FBA_CMD20[20] FBA_CMD21[20] FBA_CMD22[20] FBA_CMD23[20] FBA_CMD24[20] FBA_CMD25[20] FBA_CMD26[20] FBA_CMD27[20] FBA_CMD28[20] FBA_CMD29[20] FBA_CMD30[20]

VMA_CLK0[20]

VMA_CLK0#[20]

VMA_CLK1[20]

VMA_CLK1#[20]

R27 EV@10K/F_4 R10 EV@10K/F_4 R23 EV@10K/F_4 R28 EV@10K/F_4 R11 EV@10K/F_4

FBA_CMD0[20] FBA_CMD2[20]

FBA_CMD3[20] FBA_CMD4[20] FBA_CMD5[20] FBA_CMD6[20] FBA_CMD7[20] FBA_CMD8[20] FBA_CMD9[20]

R33 *EV@60.4_4 R39 *EV@60.4_4

FB_PLLAVDD = 55mA

+1.05V_GFX

D D

L1 EV@BLM15PX331SN1D

C59 EV@22U/6.3VS_6 C67 EV@0.1U/10V_4 C81 EV@0.1U/10V_4 C84 EV@0.1U/10V_4

+FB_PLLAVDD

FB_DLLAVDD = 15mA

1

FB_CLAMP

2

M24 M23

M27 M26 M25

M22

U21B

F3

FB_CLAMP

C27

FBA_CMD0

C26

FBA_CMD1

E24

FBA_CMD2

F24

FBA_CMD3

D27

FBA_CMD4

D26

FBA_CMD5

F25

FBA_CMD6

F26

FBA_CMD7

F23

FBA_CMD8

G22

FBA_CMD9

G23

FBA_CMD10

G24

FBA_CMD11

F27

FBA_CMD12

G25

FBA_CMD13

G27

FBA_CMD14

G26

FBA_CMD15 FBA_CMD16 FBA_CMD17

K24

FBA_CMD18

K23

FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22

K26

FBA_CMD23

K22

FBA_CMD24

J23

FBA_CMD25

J25

FBA_CMD26

J24

FBA_CMD27

K27

FBA_CMD28

K25

FBA_CMD29

J27

FBA_CMD30

J26

FBA_CMD31

F22

FBA_DEBUG0

J22

FBA_DEBUG1

D24

FBA_CLK0

D25

FBA_CLK0

N22

FBA_CLK1 FBA_CLK1

D18

FBA_WCK01

C18

FBA_WCK01

D17

FBA_WCK23

D16

FBA_WCK23

T24

FBA_WCK45

U24

FBA_WCK45

V24

FBA_WCK67

V25

FBA_WCK67

F16

FB_PLLAVDD

P22

FB_PLLAVDD

H22

FB_DLLAVDD

www.laptopblue.vn

INT

2

GF119NC

GF117

GF119

GF117FB_PLLAVDD

3

2/14 FBA

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8

FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FB_VREF_PROBE

COMMONbga595-nvidia-n13p-gv2-s-a2

4

E18

VMA_DQ0

F18

VMA_DQ1

E16

VMA_DQ2

F17

VMA_DQ3

D20

VMA_DQ4

D21

VMA_DQ5

F20

VMA_DQ6

E21

VMA_DQ7

E15

VMA_DQ8

D15

VMA_DQ9

F15

VMA_DQ10

F13

VMA_DQ11

C13

VMA_DQ12

B13

VMA_DQ13

E13

VMA_DQ14

D13

VMA_DQ15

B15

VMA_DQ16

C16

VMA_DQ17

A13

VMA_DQ18

A15

VMA_DQ19

B18

VMA_DQ20

A18

VMA_DQ21

A19

VMA_DQ22

C19

VMA_DQ23

B24

VMA_DQ24

C23

VMA_DQ25

A25

VMA_DQ26

A24

VMA_DQ27

A21

VMA_DQ28

B21

VMA_DQ29

C20

VMA_DQ30

C21

VMA_DQ31

R22

VMA_DQ32

R24

VMA_DQ33

T22

VMA_DQ34

R23

VMA_DQ35

N25

VMA_DQ36

N26

VMA_DQ37

N23

VMA_DQ38

N24

VMA_DQ39

V23

VMA_DQ40

V22

VMA_DQ41

T23

VMA_DQ42

U22

VMA_DQ43

Y24

VMA_DQ44

AA24

VMA_DQ45

Y22

VMA_DQ46

AA23

VMA_DQ47

AD27

VMA_DQ48

AB25

VMA_DQ49

AD26

VMA_DQ50

AC25

VMA_DQ51

AA27

VMA_DQ52

AA26

VMA_DQ53

W26

VMA_DQ54

Y25

VMA_DQ55

R26

VMA_DQ56

T25

VMA_DQ57

N27

VMA_DQ58

R27

VMA_DQ59

V26

VMA_DQ60

V27

VMA_DQ61

W27

VMA_DQ62

W25

VMA_DQ63

D19

VMA_DM0

D14

VMA_DM1

C17

VMA_DM2

C22

VMA_DM3

P24

VMA_DM4

W24

VMA_DM5

AA25

VMA_DM6

U25

VMA_DM7

E19

VMA_WDQS0

C15

VMA_WDQS1

B16

VMA_WDQS2

B22

VMA_WDQS3

R25

VMA_WDQS4

W23

VMA_WDQS5

AB26

VMA_WDQS6

T26

VMA_WDQS7

F19

VMA_RDQS0

C14

VMA_RDQS1

A16

VMA_RDQS2

A22

VMA_RDQS3

P25

VMA_RDQS4

W22

VMA_RDQS5

AB27

VMA_RDQS6

T27

VMA_RDQS7

GPU_PWR_GD ,PD at GPU power side

GPU_PWR_GD[37]

D23

GC6_FB_EN[10,19]

EC_FB_CLAMP[17,19,30]

stuff EC_FB_CLAMP for GC6 1.0 stuff GC6_FB_EN for GC6 2.0

4

VMA_DQ[63:0]

VMA_DQ[63:0] [20]

FBVDDQ + FBVDD = 3.116A

C4 EV@0.1U/10V_4 C2 EV@0.1U/10V_4

1 2

C30 EV@1U/10V_6

1 2

C394 EV@1U/10V_6 C12 EV@4.7U/6.3V_6 C426 EV@10U/6.3V_6 C395 EV@22U/6.3VS_6 C424 EV@4.7U/6.3V_6

VMA_DM[7:0] [20]

VMA_WDQS[7:0] [20]

VMA_RDQS[7:0] [20]

C454*EV@0.1u/10V_4 C453

R477 EV@0_4

R469 EV@0_4

R471 *EV@0_4

5

+1.35V_GFX

5

B26 C25 E23 E26 F14

F21 G13 G14 G15 G16 G18 G19 G20 G21

H24

H26

J21

K21

L22 L24 L26

M21

N21

R21

T21 V21

W21

HWPG_1.5VGFX[38]

+3V

2 1

U21D

12/14 FBVDDQ

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

FB_CALTERM_GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

EV@0.1U/10V_4

5

U23EV@SN74AHC1G32DCKR

3

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

R58 EV@4.7K_4

4

6

D22

FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

R476 EV@100K/F_4

6

2

DGPU_POK4

C120 *EV@1000P/50V_4

FBVDDQ_EN [38]

R38 EV@40.2/F_4

R35 EV@42.2/F_4

R36 EV@51.1/F_4

DGPU_PGOK-1

Q8 EV@METR3904-G

1 3

7

U21F

13/14 GND

A2

GND

AB17

GND

AB20

GND

AB24

GND

AC2

GND

AC22

GND

AC26

GND

AC5

GND

AC8

GND

AD12

GND

AD13

GND

A26

GND

AD15

GND

AD16

GND

AD18

GND

AD19

GND

AD21

GND

AD22

GND

AE11

GND

AE14

GND

AE17

GND

AE20

GND

AB11

GND

AF1

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF5

GND

AF8

GND

AG2

GND

AG26

GND

AB14

GND

B1

GND

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B27

GND

B5

GND

B8

GND

E11

GND

E14

GND

E17

GND

E2

GND

E20

GND

E22

GND

E25

GND

E5

GND

E8

GND

H2

GND

H23

GND

H25

GND

H5

+1.35V_GFX

+3V

R74 EV@4.7K_4

2

C123 EV@1000P/50V_4

Size Document Number Rev

N15S-GT (MEMEORY/GND)

Date: Sheet of

7

GND

K11

GND

K13

GND

K15

GND

K17

GND

L10

GND

L12

GND

L14

GND

L16

GND

L18

GND

L2

GND

L23

GND

L25

GND

L5

GND

M11

GND

+3V_GFX

R70 EV@4.7K_4

Q9 EV@DTC144EUA

1 3

Quanta Computer Inc.

PROJECT :

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND GND

COMMONbga595-nvidia-n13p-gv2-s-a2

R71

EV@100K/F_4

ZQ0

8

15

M13 M15 M17 N10 N12 N14 N16 N18 P11 P13 P15 P17 P2 P23 P26 P5 R10 R12 R14 R16 R18 T11 T13 T15 T17 U10 U12 U14 U16 U18 U2 U23 U26 U5 V11 V13 V15 V17 Y2 Y23 Y26 Y5

AA7 AB7

DGPU_PW ROK [10]

17 46Tuesday, April 08, 2014

8

3A

GF119

IFPD

NC

GF119

1

GF117

NC

GF117

NC

GF117GF119

NC

GF117

NC

NC NC

NC

GF117

NC

GF119 GF117

1

NC

NC NC

NC

NC NC

NC

GF117

NC NC

NC

U21G

4/14 IFPAB

AA6

IFPAB_RSET

V7

IFPAB_PLLVDD

W7

IFPAB_PLLVDD

A A

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

B B

IFPAB

U21H

5/14 IFPC

T6

IFPC_RSET

M7

IFPC_PLLVDD

N7

IFPC_PLLVDD

C C

P6

IFPC_IOVDD

U21I

6/14 IFPD

U6

IFPD_RSET

T7

IFPD_PLLVDD

R7

IFPD_PLLVDD

D D

R6

IFPD_IOVDD

bga595-nvidia-n13p-gv2-s-a2 COMMON

2

GF119

IFPA_TXC IFPA_TXC

IFPA_TXD0 IFPA_TXD0

IFPA_TXD1 IFPA_TXD1

IFPA_TXD2 IFPA_TXD2

IFPA_TXD3 IFPA_TXD3

IFPB_TXC IFPB_TXC

IFPB_TXD4 IFPB_TXD4

IFPB_TXD5 IFPB_TXD5

IFPB_TXD6 IFPB_TXD6

IFPB_TXD7 IFPB_TXD7

GPIO14

COMMONbga595-nvidia-n13p-gv2-s-a2

AC4 AC3

Y3 Y4

AA2 AA3

AA1 AB1

AA5 AA4

AB4 AB5

AB2 AB3

AD2 AD3

AD1 AE1

AD5 AD4

B3

IFPC

GF119GF117

DVI/HDMI DP

I2CW_SDA I2CW_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

GF119

I2CX_SDA I2CX_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

2

IFPC_AUX IFPC_AUX

IFPC_L3 IFPC_L3

IFPC_L2 IFPC_L2

IFPC_L1 IFPC_L1

IFPC_L0 IFPC_L0

GPIO15

COMMONbga595-nvidia-n13p-gv2-s-a2

DPDVI/HDMI

IFPD_AUX IFPD_AUX

IFPD_L3 IFPD_L3

IFPD_L2 IFPD_L2

IFPD_L1 IFPD_L1

IFPD_L0 IFPD_L0

GPIO17

GF119

3

GF117

DVI-DL

I2CY_SDA

NC NC

NC

I2CY_SCL

NC

TXC

NC

TXC

TXD0

NC NC

TXD0

NC

TXD1

NC

TXD1

NC

TXD2

NC

TXD2

U21J

7/14 IFPEF

www.laptopblue.vn

J7

IFPEF_PLLVDD

K7

IFPEF_PLLVDD

K6

IFPEF_RSET

GF119

DVI-SL/HDMI

I2CY_SDA I2CY_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

4

DP

J3

IFPE_AUX

J2

IFPE_AUX

J1

IFPE_L3

K1

IFPE_L3

K3

IFPE_L2

K2

IFPE_L2

M3

IFPE_L1

M2

IFPE_L1

M1

IFPE_L0

N1

IFPE_L0

5

U21K

3/14 DACA

GF119

W5

DACA_VDD

AE2

DACA_VREF

AF2

DACA_RSET

bga595-nvidia-n13p-gv2-s-a2 COMMON

IFPE

HPD_ENC

GF119

IFPF

3V_MAIN_EN[19]

+3V_MAIN

GF117

NC

GF117

NC

NC NC

NC

+3V_GFX

R85 EV@4.7K_4

3

DVI-DL

TXD3 TXD3

TXD4 TXD4

TXD5 TXD5

R439 *EV@10K_4

C64 *EV@1000p/50V_4

H6

IFPE_IOVDD

J6

IFPF_IOVDD

bga595-nvidia-n13p-gv2-s-a2 COMMON

N5 N4

N3 N2

R3 R2

R1 T1

T3 T2

C3

P4 P3

R5 R4

T5 T4

U4 U3

V4 V3

D4

DVI-SL/HDMI

3

2

1

2

HPD_E

GF119

I2CZ_SDA I2CZ_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_F

3V MAIN POWER

R324 *EV@10K_4

R57 *EV@200K_4

Q40 *EV@2N7002K

Q12

1 3

EV@MMBT3904-7-F

4

GPIO18

C2

DP

H4

IFPF_AUX

H3

IFPF_AUX

J5

IFPF_L3

J4

IFPF_L3

K5

IFPF_L2

K4

IFPF_L2

L4

IFPF_L1

L3

IFPF_L1

M5

IFPF_L0

M4

IFPF_L0

GPIO19

F7

+3V_GFX+3V_GFX

C117 *EV@0.022U/25V_4

60mil

1

2

*EV@AO3413

60mil

C116 *EV@0.022U/25V_4

3

Q6

1A-7 2013/10/21 add R5331 for not GC6 support.

+3V_GFX

+3V

R82 EV@4.7K_4

2

C51 EV@1000p/50V_4

PLLVDD = 38mA

+1.05V_GFX

L6 EV@BLM15PX331SN1D

C102 EV@0.1U/10V_4 C103 EV@22U/6.3VS_6

SP_PLLVDD = 17mA

L4 EV@BLM15PX181SN1D

C95 EV@0.1U/10V_4

C94 EV@0.1U/10V_4 C96 EV@4.7U/6.3V_6 C97 EV@22U/6.3VS_6

VID_PLLVDD = 41mA

R50 EVG@0_8

+3V_MAIN

N15V stuff not support GC6.

R84 EV@4.7K_4

Q11

1 3

EV@DTC144EU

3V_MAIN_PWGD

R83 *EV@100K/F_4

+1.05V_GFX and GPU core power EN

5

NV_PLLVDD

SP_PLLVDD

R420 EV@10K/F_4

27M_XTAL_IN_R 27M_XTAL_OUT

3V_MAIN_PWGD [37,38]

GF117

NC

TSEN_VREF

NC

XTAL_SSIN

6

GF119

GF117

NC NC

NC

NC NC

U21M

9/14 XTAL_PLL

L6

PLLVDD

M6

SP_PLLVDD

N6

VID_PLLVDD

A10

XTALSSIN

C11

XTALIN

6

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

NC

I2CA_SCL I2CA_SDA

GF119

GF117

7

1B-7 2013/12/20 Change resistor to 2.2k.

B7

I2CA_SCL

R430 EV@2.2K_4

A7

I2CA_SDA

R429 EV@2.2K_4

AE3 AE4

8

16

AG3 AF4 AF3

27M_XTAL_IN_R 27M_XTAL_OUT

C434

EV@10p/50V_4

XTALOUTBUFF

Size Document Number Rev

N15S-GT (DISPALY)

Date: Sheet of

7

C10

B10

XTALOUT

COMMONbga595-nvidia-n13p-gv2-s-a2

Quanta Computer Inc.

PROJECT :

BXTALOUT

Y3

1 3 2 4

EV@27MHZ

R424 EV@10K/F_4

ZQ0

18 46Tuesday, April 08, 2014

8

C431 EV@10p/50V_4

3A

1

For N15S-GT sku N15S-GT device ID=0x0FE4 R3=40.3k pull down.

1.ROM_SCLK =4.99K pull down

A A

2.ROM_SO = 4.99K pull down

3.ROM_SI= Memory strap setting

3.STRAP0 = 50k Pull pu.

4.Strap4~1 = reserve Pull pu and Pull down

For N15V-GL-B and N15V-GM-B sku Board_ID0= H=N15V-GM,L=N15V-GL Device ID=0x1140 R3= N.C.

1.ROM_SCLK =10K pull down.

2.ROM_SI= 10k pull down

3.ROM_SO= 10k pull down

4.Strap3~0 = RVL memory binary mode setting.

5.Strap4 =10k pull down

B B

E12

TP3 TP5

TP101 TP102 TP99

C C

D D

THERM-

F12

THERM+

AE5

JTAG_TCK

AD6

JTAG_TMS

AE6

JTAG_TDI

AF6

JTAG_TDO

AG4

JTAG_TRST#

PEGX_RST#[16]

R435 EV@0_4

1

TP6

R442 EV@40.2K/F_4

R3

U21N

8/14 MISC1

THERMDN

THERMDP

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST

2

Q38

EV@2N7002K

3

1

2

E10 F10

D1

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

C1

F6

F4 F5

GF117

NC NC

dGPU_OTP# [30]

2

U21L

10/14 MISC2

VMON_IN0 VMON_IN1

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

GF119

STRAP5_NC

MULTISTRAP_REF0_GND

GF119

MULTISTRAP_REF1_GND

MULTISTRAP_REF2_GND

I2CS_SCL I2CS_SDA

I2CC_SCL

I2CC_SDA

GF119

I2CB_SCL I2CB_SDA

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13

GF117

GF119

GPIO16

NC

GPIO20

NC

GPIO21

NC

COMMONbga595-nvidia-n13p-g v2-s-a2

GF117

NC

D9 D8

A9 B9

C9 C8

C6 B2 D6 C7 F9 A3 A4 B6 A6

VGA_OVT#

F8

VGA_ALERT#

C5 E7 D7 B4

DGPU_PSI

D5 E6 C4

3

www.laptopblue.vn

D12

ROM_CS

B12

ROM_SI

A12

ROM_SO

C12

ROM_SCLK

D11 D10

R458 *EV@10K/F_4

E9

CEC

SYS_PEX_RST_MON#

3

R451 EV@10K/F_4

3V_MAIN_EN [18]

PWM-VID [37] DGPU_PSI [37]

GPU_PEX_RST_HOLD# [16]

dGPU_OPP# = EC control

3

Q39 EV@2N7002K

dGPU_OPP# [30]

GPIO12 AC detect AC high DC low

R434

EVG@10K/F_4

GF117

NC

GPUT_CLK_L GPUT_DATA_L

DGPU_EDIDCLK DGPU_EDIDDATA

N12E_SCL N12E_SDA

FB_CLAMP_MON

*EVG@2N7002K

3V_MAIN_EN

FB_CLAMP_REQ#_R

GPIO12_ACIN

GPU_PEX_RST_HOLD#

GPIO12_ACIN

ROM_CS

ROM_SI

ROM_SO

ROM_SCLK

BUFRST

PGOOD

COMMONbga595-nvidia-n13p-g v2-s-a2

1B-7 2013/12/20 Change resistor to 2.2k.

R421 EV@2.2K_4 R425 EV@2.2K_4

R427 EV@2.2K_4 R426 EV@2.2K_4

R449 EV@0_4

1

Q24

2

+3V_GFX

1

2

+3V_GFX

3

4

+3V_GFX

ROM_SI ROM_SO ROM_SCLK

N15S Based on RVL. N15V pull down10k.

+3V_GFX

SYS_PEX_RST_MON# [16]

2ND_MBCLK[8,30]

2ND_MBDATA[8,30]

R468 *EVG@0_4TP98

R467 EV@0_4

R447 *EV@0_4

1

+3V_GFX

N15S -> GPIO0 un-stuff Q24 and EC_FB_CLAMP. GPIO6 Un-stuff Q26\R70 and FB_CLAMP_REQ#.

N15V -> GPIO0 stuff Q24 and EC_FB_CLAMP, un-stuff R75 GC6_FB_EN. GPIO6 stuff Q26\R70 and FB_CLAMP_REQ#, un-stuff R76,FB_Clamp_req#.

Q26 *EVG@2N7002K

2

4

*EV@10K/F_4

3

R411 *EV@10K/F_4TP4 R41 EV@10K_4

R410 EV@4.99K/F_4

+3V_MAIN

Q5

5

2 6

EC/S5 VGA/VGA

EV@2N7002DW

EC_FB_CLAMP [17,30]

GC6_FB_EN [10,17]

+3V_GFX

R482 *EVG@0_4 R481 *EV@0_4

R464

1C1-1

2014/02/6 add VGA_ALERT# PU 10K for FAE request.

VGA_ALERT# GPIO12_ACIN

DGPU_PSI

VGA_OVT#VGA_OVT#

GPU_PEX_RST_HOLD#

3V_MAIN_EN JTAG_TMS JTAG_TDI

JTAG_TRST# JTAG_TCK

1C-2

2014/01/13 add R678\R677 PU and R679 PD for ICT.

5

R413 *EV@4.99K/F_4

R415 *EV@4.99K/F_4

R414

EV@4.99K/F_4 R412 EV@4.99K/F_4

Pull Down 4.99k for N15S-GT. Pull Down 10k for N15V.

+3V_GFX

R44

R46

EV@4.7K_4

43

1

FB_CLAMP_REQ# [30] DGPU_EVENT# [10]

Strap

[3:0]

0100

1100 DDR3(L) 128MBx16x4, 64bit,1000MHz(900MHz) 0001 DDR3(L) 128MBx16x4, 64bit,1000MHz(900MHz) MICRO 1101 DDR3(L) 128MBx16x4, 64bit,1000MHz(900MHz) MICRO

R689 EV@10K/F_4 R448 EV@10K/F_4

R437 *EV@10K/F_4

R431 EV@10K/F_4

R472 EV@10K/F_4

R438 *EV@10K/F_4 R678 *EV@10K/F_4 R677 *EV@10K/F_4

R419 EV@10K/F_4 R679 *EV@10K/F_4

5

4.99k CS24992FB26 10k CS31002FB26 15k CS31502FB24 20k CS32002FB29

24.9k CS32492FB16

30.1k CS33012FB18

34.8k CS33482FB22

45.3k CS34532FB18

N15S-GT STRAP1---> 50k PU N15V-GM\GL STRAP4---> 10k PD

GPUT_CLK_L

GPUT_DATA_L

Default: HYNIX

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

VRAM Configuration Table

DESCRIPTION

0000

DDR3(L) 256MBx16x4, 64bit,1000MHz(

DDR3(L) 256MBx16x4, 64bit,,1000MHz(900MHz)

0010(0101) SAMSUNG 0110(1001) DDR3(L) 128MBx16x4, 64bit,1000MHz(900MHz) 0111(1010) DDR3(L) 128MBx16x4, 64bit,1000MHz(900MHz)

DDR3(L) 128MBx16x4, 64bit,,1000MHz(900MHz) SAMSUNG

1000(1011)

DDR3(L) 128MBx16x4, 64bit,1000MHz(900MHz)0001(0100)

DESCRIPTION

DDR3(L) 256MBx16x4, 64bit,1000MHz(900MHz)

+3V_GFX

GPIO

0 1

3 4 5 6 7 8

9 10 11 12 13

GPIO ASSIGNMENTS

6

R463 EV@49.9K/F_4

R461 *EV@10K/F_4

R445 *EV@24.9K/F_4

R440 *EV@45.3K/F_4

Vendor Vendor P/N

HYNIX HYNIX

I/O IN

FB_CLAMP_MON

OUT

MEM_VDD_CTL

OUT

LCD_BL_PWM OUT2LCD_VCC OUT

LCD_BLEN OUT

Reserved OUT

FB_CLAMP_TGL_REQ OUT

3D VISION I/O

OVERT I/O

ALERT OUT

MEM VREF_CTL OUT

PWR_VID GPU CORE_VDD PWM Control signal IN

PWR_LEVEL

PSI Phase Shedding

OUT

6

7

+3V_GFX+3V_MAIN

Logical Strap Bit Mapping

R457 *EV@30.1K/F_4

R443 *EV@15K/F_4

1 2

N15S Strap0 pull up 50k, strap1~4 reverve only. N15V Strap4 pull down 10k, strap0~3 based on RVL binary setting.

R462

*EV@10K/F_4 R460 *EV@10K/F_4

R441

*EVG@10K/F_4 R436

*EV@4.99K/F_4

Vendor

Vendor P/NROM_SI

HYNIX

H5TC4G63AFR-11C

K4W4G1646D-BC1A

HYNIX

H5TC2G63FFR-11C

MICRO

MT41J128M16JT-093G:K K4W2G1646Q-BC1A

MICRO

MT41J256M16HA-093G:E

QCI P/N

H5TC4G63AFR-11C H5TC2G63FFR-11C MT41J128M16JT-093G:K

MT41J256M16HA-093G:E

USAGE

4.99K 10K 15K 20K

24.9K

30.1K

34.8K

45.3K

PU-VDD PD

1000 0000 1001 0001

1011 0011 1100 1101 1110 0110 1111

AKD5PGWTW05 AKD5PGWTW13

FB Clamp monitor Memory VDD VID Panel Backlight PWM PANEL POWER ENABLE PANEL BACKLIGHT ENABLE

-Active low FB Clamp toggle request 3D VISION LEFT/RIGHT signal ACTIVE LOW THERMAL OVER TEMP ACTIVE LOW THERMAL ALERT MEMMORY VREF CONTROL

AC Power detect or power supply overdraw input

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

N15S-GT (GPIO/STRAPS)

Date: Sheet of

7

PROJECT :

00101010

0100 0101

0111

ZQ0

8

17

STN P/NQCI P/N

Note

3A

19 46Monday, April 07, 2014

8

3A

MP-1 20140401 update Footprint like as ZQN.

FBA_CMD9[17]

D D

FBA_CMD11[17] FBA_CMD8[17] FBA_CMD25[17] FBA_CMD10[17] FBA_CMD24[17] FBA_CMD22[17] FBA_CMD7[17] FBA_CMD21[17] FBA_CMD6[17] FBA_CMD29[17] FBA_CMD23[17] FBA_CMD28[17] FBA_CMD20[17] FBA_CMD4[17] FBA_CMD14[17]

FBA_CMD12[17] FBA_CMD27[17] FBA_CMD26[17]

VMA_CLK0[17]

VMA_CLK0#[17]

FBA_CMD3[17]

FBA_CMD2[17] FBA_CMD0[17]

C C

FBA_CMD30[17] FBA_CMD15[17] FBA_CMD13[17]

FBA_CMD5[17]

Should be 240 Ohms +-1%

B B

5

VREFC_VMA1 VREFD_VMA1

VMA_WDQS1 VMA_RDQS1

VMA_DM1 VMA_DM0

VMA_WDQS0 VMA_RDQS0

VMA_ZQ1

R32 EV@243/F_4

VRAM2

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3_HYNIX_256MX16

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7

VDD#K2

VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9

VSS#B3

VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_DQ[63..0][17]

VMA_DM[7..0][17]

VMA_WDQS[7..0][17]

VMA_RDQS[7..0][17]

E3

VMA_DQ11

F7

VMA_DQ9

F2

VMA_DQ14

F8

VMA_DQ8

H3

VMA_DQ12

H8

VMA_DQ10

G2

VMA_DQ15

H7

VMA_DQ13

D7

VMA_DQ5 VMA_DQ16

C3

VMA_DQ1

C8

VMA_DQ6

C2

VMA_DQ2

A7

VMA_DQ4

A2

VMA_DQ3

B8

VMA_DQ7

A3

VMA_DQ0

B2

+1.35V_GFX

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

4

www.laptopblue.vn

CHANNEL A: 256MB/512MB DDR3

VRAM4

VREFC_VMA1 VREFD_VMA1

FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14

FBA_CMD12 FBA_CMD27 FBA_CMD26

VMA_CLK0 VMA_CLK0# FBA_CMD3

FBA_CMD2 FBA_CMD0 FBA_CMD30 FBA_CMD15 FBA_CMD13

VMA_WDQS3 VMA_RDQS3

VMA_DM3 VMA_DM2

VMA_WDQS2 VMA_RDQS2

FBA_CMD5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

VMA_ZQ2 VMA_ZQ3

R407 EV@243/F_4

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL SDRAM DDR3

EV@VRAM _DDR3_HYNIX_256MX16

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2

VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ25

F7

VMA_DQ28

F2

VMA_DQ27

F8

VMA_DQ29

H3

VMA_DQ26

H8

VMA_DQ31

G2

VMA_DQ24

H7

VMA_DQ30

D7 C3

VMA_DQ23

C8

VMA_DQ18

C2

VMA_DQ21

A7

VMA_DQ19

A2

VMA_DQ22

B8

VMA_DQ17

A3

VMA_DQ20

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.35V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

3

VMA_CLK1[17]

VMA_CLK1#[17]

FBA_CMD19[17]

FBA_CMD18[17] FBA_CMD16[17]

Should be 240 Ohms +-1%

VREFC_VMA3 VREFD_VMA3

FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14

FBA_CMD12 FBA_CMD27 FBA_CMD26

FBA_CMD30 FBA_CMD15 FBA_CMD13

VMA_WDQS5 VMA_RDQS5

VMA_DM5 VMA_DM4

VMA_WDQS4 VMA_RDQS4

FBA_CMD5

R7 EV@243/F_4

HYU 256Mx16, PN HYU 128Mx16, PN

SAM 256Mx16, PN SAM 128Mx16, PN

VRAM1

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3_HYNIX_256MX16

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

2

󶁪󶁪󶁪󶁪

AKD5PGWTW08---AKD5PGWTW07

󶁪󶁪󶁪󶁪

AKD5MZDTW03---AKD5MZDTW02

QBC TOP B/S

󶁪󶁪󶁪󶁪

AKD5PZDT501---AKD5PZDT500

󶁪󶁪󶁪󶁪

AKD5MGGT535---AKD5MGGT534

E3

VMA_DQ40

F7

VMA_DQ45

F2

VMA_DQ42

F8

VMA_DQ46

H3

VMA_DQ43

H8

VMA_DQ47

G2

VMA_DQ41

H7

VMA_DQ44

D7

VMA_DQ34

C3

VMA_DQ36

C8

VMA_DQ32

C2

VMA_DQ38

A7

VMA_DQ33

A2

VMA_DQ37

B8

VMA_DQ35

A3

VMA_DQ39

B2

+1.35V_GFX

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

VREFC_VMA3 VREFD_VMA3

FBA_CMD9 FBA_CMD11 FBA_CMD8 FBA_CMD25 FBA_CMD10 FBA_CMD24 FBA_CMD22 FBA_CMD7 FBA_CMD21 FBA_CMD6 FBA_CMD29 FBA_CMD23 FBA_CMD28 FBA_CMD20 FBA_CMD4 FBA_CMD14

FBA_CMD12 FBA_CMD27 FBA_CMD26

VMA_CLK1 VMA_CLK1# FBA_CMD19

FBA_CMD18 FBA_CMD16 FBA_CMD30 FBA_CMD15 FBA_CMD13

VMA_WDQS7 VMA_RDQS7

VMA_DM7 VMA_DM6

VMA_WDQS6 VMA_RDQS6

FBA_CMD5

VMA_ZQ4

R404 EV@243/F_4

VRAM3

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3_HYNIX_256MX16

VDDQ#C1 VDDQ#C9 VDDQ#D2

VDDQ#H2 VDDQ#H9

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8

VDDQ#E9 VDDQ#F1

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

1

18

VMA_DQ62 VMA_DQ59 VMA_DQ60 VMA_DQ56 VMA_DQ61 VMA_DQ58 VMA_DQ63 VMA_DQ57

VMA_DQ54 VMA_DQ48 VMA_DQ55 VMA_DQ51 VMA_DQ53 VMA_DQ50 VMA_DQ52 VMA_DQ49

+1.35V_GFX

VMA_CLK0

R31 EV@160/F_4

VMA_CLK0#

A A

+1.35V_GFX

C25 EV@1U/6.3V_4 C416 EV@1U/6.3V_4 C37 EV@1U/6.3V_4 C50 EV@1U/6.3V_4

5

+1.35V_GFX

C69 EV@10U/6.3V_6 C419 EV@1U/6.3V_4

C402 EV@1U/6.3V_4 C417 EV@1U/6.3V_4 C8 EV@1U/6.3V_4

R405 EV@1.33K/F_4

VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3

R406 EV@1.33K/F_4

+1.35V_GFX

4

C413 EV@0.1U/10V_4

C412 EV@10U/6.3V_6 C401 EV@1U/6.3V_4

C35 EV@1U/6.3V_4 C22 EV@1U/6.3V_4

C36 EV@1U/6.3V_4 C398 EV@1U/6.3V_4 C5 EV@1U/6.3V_4 C11 EV@1U/6.3V_4

R37 EV@1.33K/F_4

R34 EV@1.33K/F_4

C28 EV@0.1U/10V_4

+1.35V_GFX

C393 EV@10U/6.3V_6 C392 EV@10U/6.3V_6 C23 EV@0.1U/10V_4

C415 EV@0.1U/10V_4 C48 EV@0.1U/10V_4C411 EV@1U/6.3V_4

C27 EV@0.1U/10V_4 C396 EV@0.1U/10V_4

VMA_CLK1

R9 EV@160/F_4

VMA_CLK1#

+1.35V_GFX

C421 EV@10U/6.3V_6 C58 EV@10U/6.3V_6

C414 EV@0.1U/10V_4 C3 EV@0.1U/10V_4 C6 EV@0.1U/10V_4

3

2

+1.35V_GFX+1.35V_GFX

+1.35V_GFX

R12 EV@1.33K/F_4

R8 EV@1.33K/F_4

C1 EV@0.1U/10V_4

Size Document Number Rev

Date: Sheet of

R401 EV@1.33K/F_4

R400 EV@1.33K/F_4

C400 EV@0.1U/10V_4

Quanta Computer Inc.

PROJECT :

DGPU Memory (DDR3)

1

ZQ0

3A

20 46Monday, April 07, 2014

3A

5

4

3

2

1

DP TO VGA

1A-1 2013/ 10/15 Change V GA ITE soltion to NXP. 1A-5 2013/ 10/18 Change V GA NXP soltion to ITE.

+3V

L10 80ohm@100MHz

D D

1C1-2

+3V

CRT_AUXP

R187*1M_4

CRT_AUXN

R189*1M_4

C C

IVDDO

L11 80ohm@100MH z

C185 10u/6.3V_6

30mils

C191 1u/6.3V_4

IVDDO_18

CRT_AUXP[2] CRT_AUXN[2]

20mils

L8 80 ohm@100M Hz

15mils

+5VMCU

1B-1

20131108 Change +5V to +5VMCU.

B B

TPM

1C-4 2014/01/15 TPM CO-lay nuvoton

A A

1A-11 2013/10/28 Change U5013.7 from +3V_S5 to +3V.

+3V

R223 TPM@0 _4 R684 TPMI@0_4

PLTRST#[7 ,13,16,24,26 ,27,30]

R212 *sh ort_4

IRQ_SERIRQ[10 ,30]

1A-11 2013/10/28 U5013 Pin8,15,28 left NC.

+3V_TPM_VD D

5

LPC_LAD0[8,24,30] LPC_LAD1[8,24,30] LPC_LAD2[8,24,30] LPC_LAD3[8,24,30]

PCLK_TPM[9]

LPC_LFRAM E#[8,24 ,30]

CLKRUN#[7 ,30]

R215 *TPM@ 4.7K

+3V_TPM_VD D

12

C251

TPM@0.1u/10V _4

C252

TPM@10u/6.3V _4

PCLK_TPM LPCFRAME# PLTRST#_TPM

R224 *sh ort_4

R683 *TPMN @0_4

12

R213 TPMN@4.7K

1 2

L29 80ohm@100MHz

link L29 to +3V directly (meet IVDDO vs OVDD sequence)

CRT_HPD[2]

R1382.2K_4 R1392.2K_4

12

C250 TPM@0.1u/10V _4

U10

26 23 20 17

21 22 16

27 15

7

LAD0 LAD1 LAD2 LAD3

LCLK LFRAME# LRESET#

SERIRQ CLKRUN# PP

C218 0.1u/10V_ 4 C216 0.1u/10V_ 4

C212 0.1u/10V_ 4 C210 0.1u/10V_ 4

C225 0.1u/10V_ 4 C229 0.1u/10V_ 4

RX_DVDD18

1B-1

*TPMN@10u/6.3 V_4

19

VDD24VDD

TPM SLB 9655 TT 1.2

GND4GND11GND18GND

CRT_TXP0[2] CRT_TXN0[2]

CRT_TXP1[2] CRT_TXN1[2]

C179

4.7u/6.3V_6

www.laptopblue.vn

C228

C227

C195

0.1u/10V_4

1u/6.3V_4

ISPSCL

ISPSDA

CRT_HPD

CRT_TXP0_C

CRT_TXN0_C CRT_TXP1_C

CRT_TXN1_C

CRT_AUXP_CCR T_AUXP CRT_AUXN_CCRT_AU XN

10mils

C2170.1u/10V_ 4

C2230.1u/10V_ 4

C2200.1u/10V_4

10mils

+5VMCU

20131108 Change TP to +5VMCU and 10kohm.

C682

5

VSB

LPCPD#

TESTB1/BADD

TEST1

XTALO

XTALI

GPIO2

GPIO

NC NC NC NC

TPM@SLB9655 TT_TSSOP28

25

4

40

26 27

29 30

20 19

18 17

25 31

10mils

22

10mils

24

32

C2050.1u/10V _4

43 42

R137 10K _4

R685 * TPMN@0_4 R680 *TPMN @0_4

12

C241 TPM@0.1u/10V _4

1A-9 2013/10/23 add R5335 Isolate SLB9660 NC.

28 9

R214 TPMI@0_4

8

R682 *TPMN @10K_4

14 13

2 6

R216 *2 0K/F_4

1 3 12 10

+3V_TPM_VD D

C193 10u/6.3V_6

U5

HPD

RX0P RX0N

RX1P RX1N

RXAUXP RXAUXN

DCAUXP DCAUXN

AVCC AVCC

PVCC

DVDD18

ASPVCC

PCSDA PCSCL

PLTRST#_TPM

+3V_TPM_VD D

0.1u/10V_4

15mils

1

2

DDCSCL

DDCSDA

PWDNB

37

+3V_SUS

+3V_S5

+3V_TPM_VD D

20mils

IVDDO

13

48

36

39

OVDD

IVDDO38IVDDO

IVDD3335IVDD33

IT6513FN

20mils

C224

0.1u/10V_4

12

46

44

IVDD

IVDD14IVDD

IVDD

45

MCUVDDH

47

MCURSTN

28

URDBG

15

ISPSCL

16

ISPSDA

23

VGADDCCLK

21

VGADDCSDA

3

VSYNC

4

HSYNC

10

VDDC

11

IORP

9

IOGP

8

IOBP

41

NC/VGADETECT

5

RSET

7

VDDA

6

COMP

34

XTALIN

33

XTALOUT

GND

IT6513N-QFN-48

49

TPMI@-->for SLB 9655 TPMN@-->for Nuv oton

SLB 9655 NPCT62 0

R685 Un-stuff stuff

C682 Un-stuff stuff

R683 Un-stuff stuff

R213 Un-stuffstuff

R682 Un-stuff stuff

R214

stuff

R684

stuff

3

C182

0.1u/10V_4

URDBG

ISPSCL

R151 22/J _4

ISPSDA

R156 22/J _4

R178 22/J _4 R179 22/J _4

VGA_RST

VGA_COMP

27M_CRT_IN 27M_CRT_OUT

Un-stuff

RX_DVDD18

C189

0.1u/10V_4

TP47

VSYNC HSYNC

C208

0.1u/10V_4

CRT_RED

CRT_GRE

CRT_BLU

C199

0.1u/10V_4

*10p/50V_4

20mils

L980ohm@ 100MHz

TP52

DDCCLK DDCDAT

VSYNC [22] HSYNC [22]

DAC_VDDC

TP46

R158 100/F _4

C209

0.1u/10V_4

1 3 2 4

C215

0.1u/10V_4

DAC_VDDC

Y1

*27MHZ

C214

0.1u/10V_4

C206

Green CLK Gen

+5V+5VMCU

DDCCLK [22] DDCDAT [ 22]

CRT_RED [22]

CRT_GRE [22 ]

CRT_BLU [2 2]

20mils

C198 *10p/50V_4

2013/12/13 remove Green GLK U9

1B-4

20mils

L1280ohm@100MHz

IVDDO_18

2

FingerPrint Conn

USBP2-[9]

USBP2+[9]

Power Button/Conn

NBSWO N#[13,30]

Size Document N umber Rev

Date: Sheet of

23

+5V

C474

CN6

*0.1u/10V_4

1

7

2

8 3 4 5 6

*FingerPrint/ B

1A-7 2013/10/22 Change CN4 to 6pin.

1B-6 2013/12/18 Change CN5 USB port to port2.

+3VPCU

C467 *0.1u/10V_4

CN4

1

LID#[22,30]

1A-1 20 13/10/15 chang e to 6pin. 1B-2 20 13/12/3 change to 4pin. 1B-3 20 13/12/10 chang e CN6 footprint .

Mini DP/HD3SS2521

5

2

6 3 4

PWR_4 P

Quanta Computer Inc.

PROJECT :

1

ZQ0

3A

21 4 7Tuesday, April 08, 2014

3A

1

CRT

1C-1 2014/01/10 Remove U29 and add U40 and U41.

U40

1

OE#

A A

HSYNC[21]

VSYNC[21]

HSYNC CRTHSYNC

VSYNC CRTVSYNC

2

A

3

GND

M74VHC1GT125DF2G

U41

1

OE#

2

A

3

GND

M74VHC1GT125DF2G

VCC

2

+5V

C677

5

4

Y

5

4

Y

0.1u/10V_4

+5V

C668

0.1u/10V_4

CRT_RED[21] CRT_GRE[21] CRT_BLU[21]

3

www.laptopblue.vn

R567 75/F_4

4

C471

R557

R561 75/F_4

5.6p/16V_4

75/F_4

U26

CRTHSYNC CRTHSYNC

CRTVSYNC CRTVSYNC DDCCLK

CRT_R1 CRT_R1 CRT_G1

DDCDAT DDCDAT

1

2

3

GND_3/8

4

5

*RClamp0524P U4

1

2

3

GND_3/8

4

5

*RClamp0524P

Q10

3

+5V

IN

AP2331SA-7

L32 BLM15BB470SN1D L31 BLM15BB470SN1D L30 BLM15BB470SN1D

C468

5.6p/16V_4

10

9 7

6

10

9 7

6

C464

5.6p/16V_4

10 9

7 6

10 9

7 6

5

1

OUT

2

GND

C463

5.6p/16V_4

CRTVDD5CRTVDD5

DDCCLK

CRT_G1

CRT_B1CRT_B1

C168 *0.1u/10V_4

CRTVDD5

CRT_R1 CRT_G1 CRT_B1 CRTHSYNC

C473

C470

5.6p/16V_4

C160 *0.22u/6.3V_4 C173 *220p/50V_4 C161 0.1u/10V_4 C458 10p/50V_4 C462 10p/50V_4 C457 *10p/50V_4 C460 *10p/50V_4

6 7

2 8 3 9 4

10

5

6

1617

CRTVDD5 CRTVSYNC CRTHSYNC DDCCLK

DDCDAT

CN3

111 12 13 14 15

CRT CONN

CRT_11 DDCDAT

CRTVSYNC DDCCLK

TP48

7

DDCDAT [21]

DDCCLK [21]

DDCDAT DDCCLK

Power trace tracking

8

CRTVDD5

R1542.2K_4 R1422.2K_4

+3V[2,5,7,8,9,10,11,13,14,15,16,17,18,21,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38] +5V[21,23,25,28,29,32,36]

+3VPCU[7,8,10,11,13,21,25,27,28,29,30,31,32,36,37,38]

VIN[31,32,33,34,35,36,37,38]

V_BLIGHT

CCD_PWR

C410

0.1u/10V_4_X7R

CN2

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

G_5

G_4

G_1

G_0

C409

1000p/50V_4

50398-04071-001

LCD Power

C10

1u/6.3V_4

EDP_VDD_EN_R

EDP_VDD_EN[2]

R29 *short_4

Touch screen level shift I2C(reserve)

1

I2C1_SDA_GPIO6[10]

I2C1_SCL_GPIO7[10]

4 3

Backlight Control

PCH_BLON[2]

PCH_BLON_EC[30]

1B-1 2013/11/28 Add BLON pin from PCH to lison.

R20 *short_4

R22 0_4

+3V

6 4 3

R30

100K_4

R337 *TSI@0_4

Q2

*TSI@2N7002DW

R347 *TSI@0_4

PCH_BLON_R

R21 100K_4

2N7002DW

U1

IN IN ON/OFF

G5243AT11U

6 2

5

Q3

1

OUT

2

GND

5

GND

R4 *TSI@10K_4

I2C1_SDA_GPIO6_CONN

+3V

I2C1_SCL_GPIO7_CONN

+3V

R16 10K_4

BL#

6

2

5

1

4 3

C14 *0.1u/10V_4

+3V

R5 *TSI@10K_4

TPD->100kHz,TS=400Khz Intel design guide suggestion MCP PIN 10u. Per inch 3u TS=3x5inch 400kHz10~100u =2.4~0.4k. 100Khz 10~100u=9k~1k.

+3VPCU

R17 10K_4

BL_ON

2

Q4 DTC144EUA

1 3

C13

C16

0.1u/10V_4

*2.2u/10V_8

R19 *100K_4

LID#

LID591#,EC intrnal PU

D1 1N4148WS

LCDVCC

C15

C18

0.01u/25V_4

22u/6.3V_8

LID# [21,30]

EC_FPBACK# [30]

LCD CONNECTOR

B B

R402 100K_4 R403 *100K_4 R15 100K_4

USBP6+[9]

USBP6-[9]

C C

EDP_AUX_C EDP_AUX#_C

R399 *short_4 R398 *short_4

TP_RST#

VIN

C21

4.7u/25V_8

R14 *100K_4 R6 *TSI@10K_4

USBP6+_R USBP6-_R

C24 1000p/50V_4

+3V

Touch Panel interrupt

TP_INT_PCH[10]

1A-5 2013/10/18 add 0ohm short TP interrap pin.

1A-5 2013/10/17 Change Touch screen

MP-1 20140328 Change Touch screen

MP-1 20140408 reserve 3V TP_PWR.

PCH_BRIGHT[2]

EDP_AUXP[2] EDP_AUXN[2]

eDP

EDP_TXP1[2] EDP_TXN1[2]

EDP_TXP0[2] EDP_TXN0[2]

CCD-USB Touch Panel

USBP5+[9] USBP5-[9]

D D

R397 *short_4 R396 *short_4

USBP5+_R USBP5-_R

+3V

2

3

Q1 *2N7002K

R2 TSI@0_4

power rail from 5V to 3V.

power rail from 3V to 5V.

EDP_HPD[2]

GPIO8[10]

BRIGHT

1

LCDVCC

EDP_AUX#

EDP_TX0

R1 *10K_4

TP_INT

R24 *SHORT_8

+3V

+5V +3V

C407 .1U/16V_4 C408 .1U/16V_4

C406 .1U/16V_4 C405 .1U/16V_4

C404 .1U/16V_4 C399 .1U/16V_4

TP_PWR

C7

0.1u/10V_4_X7R

VIN

MAX 1.5A

C19

TS_EN[30]

1A-13 2013/10/30 CN5002.6 add USB

R26 *Short_6 R25 *Short_6

C20

*1u/6.3V_4 R18 *Short_6

R13 0_6 R699 *0_4

I2C1_SCL_GPIO7_CONN I2C1_SDA_GPIO6_CONN

TS_EN

touch screen on/off pin to EC.

R698 *0_4

1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,

for issue debug.

C9

1000p/50V_4

*1u/6.3V_4

CCD_PWR

TP_PWR

BL_ON EDP_HPD

EDP_AUX_CEDP_AUX EDP_AUX#_C

EDP_TX1_C EDP_TX1#_C

EDP_TX0_C EDP_TX0#_CEDP_TX0#

USBP6+_R USBP6-_R

USBP5+_R USBP5-_R

R3 *short_4

TP_INT TP_RST#

TP_INTTS_EN

1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

PROJECT :

CRT/LVDS/CAMERA/LID

ZQ0

8

1A

22 47Tuesday, April 08, 2014

1A

5

HDMI

From PCH

INT_HDMITX2N[2] INT_HDMITX2P[2]

INT_HDMITX1N[2] INT_HDMITX1P[2]

INT_HDMITX0N[2] INT_HDMITX0P[2]

D D

INT_HDMICLK+[2] INT_HDMICLK-[2]

C C

4

3

2

www.laptopblue.vn

C527 0.1u/10V_4 C528 0.1u/10V_4

C525 0.1u/10V_4 C526 0.1u/10V_4

C530 0.1u/10V_4 C533 0.1u/10V_4

C524 0.1u/10V_4 C523 0.1u/10V_4

1B-1 20131108 Change +5V to +3V for DG.

+5V

INT_HDMITX2N_C INT_HDMITX2P_C

INT_HDMITX1N_C INT_HDMITX1P_C

INT_HDMITX0N_C INT_HDMITX0P_C

INT_HDMICLK+_C INT_HDMICLK-_C

R226

*100K/F_4

12

R641 470_4

12

R255 470_4

R235 *680_4

1 2

R231 *680_4

1 2

12

R639 470_4

3

Q31

2

2N7002E

1

12

R249

R241

470_4

INT_HDMICLK+_CONN

INT_HDMICLK-_CONN

12

R239

R248 470_4

R245 470_4

+5V

3

INT_HDMICLK+_CONN

INT_HDMICLK-_CONN

Q29

OUT

IN

GND

AP2331SA-7

R234 *short_4 R230 *short_4

1 2

C247 *220p/50V_4

D5 *AZ5125-01J

470_4

HDMI-detect

INT_HDMICLK+_C INT_HDMICLK-_C

HDMI_MB_HPD

INT_HDMITX0P_C INT_HDMITX0N_C

INT_HDMITX1P_C INT_HDMITX1N_C

INT_HDMITX2P_C INT_HDMITX2N_C

INT_HDMICLK+_C INT_HDMICLK-_C

HDMI_DDCCLK_MB HDMI_DDCDATA_MB

HDMI_5V

R218 *short_4

12

R221 20K_4

+3V+3V

HP_DET_CN

1

HDMI connector

CN10

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19

D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0CK+ CK Shield CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET

HDMI connector

SHELL1

GND GND

SHELL2

20

23 22

21

R63 1M_4

INT_HDMI_HPD[2]

I2C

B B

From PCH

HDMI_DDCCLK_SW[2]

HDMI_DDCDATA_SW[2]

A A

+3V

R165

2.2K_4

+3V

R166

2.2K_4

2

1

+3V

2

1

Q19

3

2N7002K

Q18

3

2N7002K

+5V+3V

21

+5V

21

D2 RB501V-40

R184

2.2K_4

D3 RB501V-40

R186

2.2K_4

HDMI_DDCCLK_MB

HDMI_DDCDATA_MB

INT_HDMITX2P_C

R246 *120/F_4

INT_HDMITX1P_C

R240 *120/F_4

INT_HDMITX0P_C

R253 *120/F_4

INT_HDMICLK+_C

R640 *120/F_4

Power trace tracking

+3V[2,5,7,8,9,10,11,13,14,15,16,17,18,21,22,24,25,26,27,28,29,30,32,33,34,35,36,37,38] +5V[21,22,25,28,29,32,36]

5

4

3

2

Size Document Number Rev

Date: Sheet of

1

EMI

2

3

Q20 2N7002K

INT_HDMITX2N_C

INT_HDMITX1N_C

INT_HDMITX0N_C

INT_HDMICLK-_C

HDMI_MB_HPD

Quanta Computer Inc.

PROJECT :

HDMI (PS8101)

ZQ0

23 47Tuesday, April 08, 2014

1

23 47Tuesday, April 08, 2014

1A

5

4

3

2

1

Mini Card 1 (MPC)

www.laptopblue.vn

26

D D

+WL_VDD +1.5V_WLAN

CN11

51

Reserved

49

Reserved

47

Reserved

45

Reserved

43

GND

41

+3.3Vaux

39

+3.3Vaux

37

GND

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

UIM_C4

17

UIM_C8

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

Reserved

3

Reserved

1

WAKE#

MINI-CARD1

1C-3 2014/01/14 Change Cn11 Footprint.

53

LED_WPAN# LED_WLAN#

LED_WWAN#

W_DISABLE#

UIM_RESET

GND54GND

+WL_VDD

CL_RST1#_WLAN CL_DATA1_WLAN CL_CLK1_WLAN

BT_PWRON_R

CLK_PCIE_WLAN_C CLK_PCIE_WLAN#_C

BT_POWERON[30]

PLTRST#[7,13,16,21,24,26,27,30]

CLK_PCI_LPC[9]

PCIE_TX4+_WLAN[9] PCIE_TX4-_WLAN[9]

PCIE_RX4+_WLAN[9] PCIE_RX4-_WLAN[9]

C C

CLK_PCIE_WLANP[9] CLK_PCIE_WLANN[9]

+WL_VDD

R645 *short_4

PLTRST#

R643 4.7K_4

TP138 R646 *0_4

R647 *0_4

R648 *short_4 R649 *short_4

PCIE_CLKREQ_WLAN#_R

PCIE_WAKE#_R

+3.3V

GND

+1.5V

GND

USB_D+

USB_D-

GND

SMB_DATA

SMB_CLK

+1.5V

GND

+3.3Vaux

PERST#

GND UIM_VPP UIM_CLK

UIM_DATA

UIM_PWR

+1.5V

GND

+3.3V

52 50 48 46 44

WLAN#

42

WWAN#

40 38 36 34 32 30 28 26 24 22 20 18

16 14 12 10 8 6 4 2

WLAN_CLK_SDATA

WLAN_CLK_SCLK

RF_EN

A_LFRAME#_R A_LAD3_R A_LAD2_R A_LAD1_R A_LAD0_R

2013/10/17 remove WLAN_OFF no IOAC support.

1A-4

TP137

USBP4+ [9] USBP4- [9]

R635 *0_4 R636 *0_4

R637 *short_4

R630 *0_4 R631 *0_4 R632 *0_4 R633 *0_4 R634 *0_4

PLTRST#

1A-12 2013/10/29 Change CN5008 to S0 of SMbus

CLK_SDATA [8,13,14,15] CLK_SCLK [8,13,14,15]

2013/10/17 remove R5224\R5225\R5226 no IOAC support.

1A-4

PLTRST# [7,13,16,21,24,26,27,30]

RF_EN [30]

LPC_LFRAME# [8,21,30] LPC_LAD3 [8,21,30] LPC_LAD2 [8,21,30] LPC_LAD1 [8,21,30] LPC_LAD0 [8,21,30]

Debug

+WL_VDD

+3V

B B

1A-4 2013/10/17 remove Q5020 no IOAC support.

R651 *SHORT_8

C532 10u/6.3V_6

C516

0.1u/10V_4

C514 *0.1u/10V_4

1C1-2 2014/03/08 Remove PCIE wake and

stuff R642, un-stuff Q44.

C520 *0.1u/10V_4

S0

PCIE_CLKREQ_WLAN#[9]

S5

A A

500mA for +1.5V

C517 *1000p/50V_4

3

C519 *0.1u/10V_4

+WL_VDD

2

Q44 *2N7002K

R642 *short_4

+1.5V_WLAN+WL_VDD

*10u/6.3V_8

1

R629 *0_6

C518

R650

4.7K_4

PCIE_CLKREQ_WLAN#_R

1A-4 2013/10/17 remove Q5019 no IOAC support.

Size Document Number Rev

Date: Sheet of

5

4

3

Date: Sheet of

2

+1.5V

Quanta Computer Inc.

PROJECT :

Mini-Card/WL/3G/SIM

1

ZQ0

24 47Monday, April 07, 2014

1A

5

2.5" SATA HDD (HDD)

4

www.laptopblue.vn

3

2

SATA ODD Connector

1

+5V_ODD

3

1

27

R159 *0_8

R172 22_8

+5V

CN12

23

GND23

1

GND1

2

RXP RXN

GND24

HDD CONN

11 12

*SATA_CONN

GND2

GND3

GND GND GND

GND

RSVD

GND

TXN TXP

3.3V

5V 5V 5V

12V 12V 12V

CN14

D D

FFC Type SATA HDD CON

C C

SATA_TXP0_C

3

SATA_TXN0_C

4 5

SATA_RXN0_C

6

SATA_RXP0_C

7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

24

1 2 3 4 5 6 7 8 9 10

DEVSLP0_R

SATA_TXP0_CN SATA_TXN0_CN

SATA_RXN0_CN SATA_RXP0_CN

+5V_HDD

R265 *0_4

60mil

+5V_HDD

1A-8 2013/10/23 remove C5056 is duplicater.

DEVSLP0_R

C531

0.01u/25V_4

1C-2 2014/01/13 change CN14 sata net name

and add C678~C681.

C679 *0.01u/16V_4 C681 *0.01u/16V_4

C680 *0.01u/16V_4 C678 *0.01u/16V_4

C353 0.01u/16V_4 C345 0.01u/16V_4

C343 0.01u/16V_4 C340 0.01u/16V_4

DEVSLP0 [10]

1B-4 2013/10/23 remove C5056 is duplicater.

C534

0.01u/25V_4

SATA_TXN0

SATA_RXN0 SATA_RXP0

*0.1u/16V_4

SATA_TXP0

C535

C529

*0.1u/16V_4

SATA_TXP0 [8] SATA_TXN0 [8]

SATA_RXN0 [8] SATA_RXP0 [8]

C537

10u/6.3V_6

R653 *SHORT_8

C539

+

100u/6.3V_3528

+5V

ODD Power (SATA)

ODD_POWER[30] PCH_ODD_EN[10]

1B-3 2013/12/10 change Cn20 Pin define.

CN7

GND14

GND1

RXP

RXN

GND2

TXN TXP

GND3

DP +5V +5V

RSVD

GND GND

GND15

C185Q2-11311-L

R199 *short_4

R192 *0_4

14 1

2 3 4 5 6 7

8 9 10 11 12 13

15

ODD_EN

12

SATA_TXP1_C SATA_TXN1_C

SATA_RXN1_C SATA_RXP1_C

R188 *100K

C188

0.01u/25V_4

R135 10K_4

+3VPCU

12

R200 100K

ODD_EN_Q

5

4 3

C492 0.01u/16V_4 C490 0.01u/16V_4

C484 0.01u/16V_4 C482 0.01u/16V_4

R160 10K_4

C200 *15p/50V_4

C187

C466

*0.1u/16V_4

0.01u/25V_4

EC_ODD_EJ [30]

+3V

+15V

R180 100K

6

2

2N7002DW Q23

1

+3V

+5V

12

SATA_TXP1 [8] SATA_TXN1 [8]

SATA_RXN1 [8] SATA_RXP1 [8] ODD_PRSNT# [8]

C186 *0.1u/16V_4

Q17 AO6402A

6 5 2 1

MOD_EN_5V

3

12

C234

0.1u/25V_6

+5V_ODD

+

C465

C459

10u/6.3V_6

*100u/6.3V_3528

1A-8 2013/10/23 remove R5017 5V is duplicater.

4

2

ODD_EN_Q

Q22

DMN601K-7

1A-9 2013/10/17 Change power LED from +3VPCU to +3V_S5.

B B

POWER LED

Power LED

PWRLED#[30] SUSLED#[30]

Battery

A A

5

4

3

BATLED0#[30] BATLED1#[30]

1A-10 2013/10/25 change LED from 3pin to 4pin.

for acer reqeust,

1A-11 2013/10/28 change LED from 4pin to 3pin.

and power LED to +3VPCU. 1B-2 2013/12/03 change LED from 3pin to 4pin. 1C1-1 2014/02/06 change Blue LED power rail to +5VPCU. 1C1-1 2014/02/11 add ESD on led. 1C1-1 2014/02/13 Change LED to lite-on and reisstor

base on test result.

R380 *1M_4 R376 *1M_4

R379 2K/F_4 R375 820/F_4

R383 *1M_4 R377 *1M_4

R384 2K/F_4 R688 820/F_4

+5VPCU +3VPCU

D23 *5.5V/25V/410P_4

1 2

Blue

3 4

LED1 POWER LED

Amber

1 2

D24 *5.5V/25V/410P_4

+5VPCU

+3VPCU

1 2

D25 *5.5V/25V/410P_4

Blue

3 4

LED2 POWER LED

Amber

1 2

D26 *5.5V/25V/410P_4

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

+5VPCU

2 1

+5VPCU

2 1

SATA HDD/LED/SW

+3VPCU

Quanta Computer Inc.

PROJECT :

ZQ0

25 47Tuesday, April 08, 2014

1

1A

5

LAN

D D

LANVCC

R621 2.2_6

1 2

C C

LANVCC+3V_S5

40 mils (Iout=1A)40 mils (Iout=1A)

C510

C509

0.1U/10V_4

10U/6.3V_6

Power trace tracking

+3V_S5[5,7,8,9,10,11,13,21,27,29,30,32,35,37] +3V

LANVCC

40 mils (Iout=1A)

C508

0.1U/10V_4

For RTL8111GS * Place 0.1uF CAP close to each VDD33 pin-- 11, 32

B B

Tramsformer

C493

0.1U/10V_4

C240

4.7U/6.3V_6

For Surge improvement C5117\C5111 close to pin 11,23.

C235

4.7U/6.3V_6

LANVCC

VDD10

LANVCC

R614 *0_8_S

40 mils (Iout=1A)

4

www.laptopblue.vn

VDD10

U7

33

GND

1

MDIP0

2

MDIN0

3

AVDD10(NC)

4

MDIP1

5

MDIN1

6

MDIP2(NC)

7

MDIN2(NC)

8

AVDD10

VDDREG/VDD33

RSET

10 mils

RTL8111GS-CG

C505

4.7U/6.3V_6

32

31

AVDD33

10

R197 2.49K/F_4

MDI_0+ MDI_0-

MDI_1+ MDI_1MDI_2+ MDI_2- GPP_TX3N_LAN

MDI_3+ MDI_3-

C501

0.1U/10V_4

RSET

30

AVDD10

AVDD33(NC)11MDIP3(NC)9MDIN3(NC)

12

28

CKXTAL229CKXTAL1

CLKREQB

27

26

LED0

HSIP13HSIN14REFCLK_P15REFCLK_N

C232 *10P/50V/COG_4

TP54 TP55 TP56

C233 *10P/50V/COG_4

25

LED1/GPO

LED2(LED1)

VDDREG(VDD33)

16

PCIE_REQ_LAN#_R

REGOUT

DVDD10(NC)

LANWAKEB

ISOLATEB

PERSTB

HSON HSOP

REGOUT

24 23 22 21 20 19 18 17

40 mils (Iout=1A) 40 mils (Iout=1A)

LAN_XTALI

LAN_XTAL2

REGOUT VDDREG/VDD33 VDD10

ISOLATEB

GPP_TX3P_LAN

ISOLATEB

L33 4.7uH

3

C230 10p/50V_4

1

2

Y2

25MHZ +-30PPM

4

3

C231 10p/50V_4

PCIE_LAN_WAKE#_R

C238 0.1U/10V_4 C239 0.1U/10V_4

+3V

R201 1K_4

R203 15K_4

CLK_PCIE_LANN [9]

CLK_PCIE_LANP [9]

PCIE_TX3-_LAN [9]

PCIE_TX3+_LAN [9]

1C-4 2014/01/15 SWAP PCIE LAN TX single.

RTL8111GS (SWR mode) support

4.7U/6.3V_6

C504

C506

0.1U/10V_4

2

PLTRST# [7,13,16,21,24,27,30]

PCIE_RX3-_LAN [9] PCIE_RX3+_LAN [9]

For RTL8111G(S) * Place 1uF CAP close to each VDD10 pin-- 22 (reserve)

For RTL8111G(S) * Place 0.1uF CAP close to each VDD10 pin-- 3, 8, 22, 30

C496

0.1U/10V_4

C494

0.1U/10V_4

PCIE_LAN_WAKE#[7]

C503

0.1U/10V_4

CLK_PCIE_LAN_REQ#[9]

Remove For Not Using SWR mode

C824,C825 close to Pin23.

C495

0.1U/10V_4

3

R191 *short_4

C500 1U/6.3V_4

+3V_S5

2

R209 *0/J_4

+3V_S5

2

13

VDD10

C499

0.1U/10V_4

1A-9

R208 10K/J_4

1

Q28 2N7002K

R190 *10K/J_4

Q25 *DTC144EUA

1

2013/10/23 add 10k for vensor suggestion.

PCIE_REQ_LAN#_R

PCIE_LAN_WAKE#_R

RJ45 Connector

U31

1

R607 1/F_4

MDI_0-

R611 1/F_4

U8

1

IO1

IO4

2

REF5GND

IO23IO3

*CM1293A-04SO

U9

1

IO1

IO4

2

REF5GND

IO23IO3

*CM1293A-04SO

Reserve for Surge

A A

Line to GND TVS

LANVCC

6

MDI_0+_CMDI_0-_C

4

MDI_1-_CMDI_1+_C

LANVCC

6

MDI_2+_CMDI_2-_C

4

MDI_3-_CMDI_3+_C

C512

0.01U/50V/X7R_4

5

MDI_1-

MDI_2+ MDI_2-

MDI_3+ MDI_3-

R620 1/F_4 R622 1/F_4

R623 1/F_4 R624 1/F_4

R625 1/F_4 R626 1/F_4

MDI_0+_C MDI_0-_C

MDI_1+_C MDI_1-_C

MDI_2+_C MDI_2-_C

MDI_3+_C MDI_3-_C

10 11 12

2 3

4 5 6

7 8 9

TD1+ TD1TCT1

TCT2 TD2+ TD2-

TD3+ TD3TCT3

TCT4 TD4+ TD4-

NS692417

4

MX1+ MX1MCT1

MCT2 MX2+

MX2-

MX3+

MX3-

MCT3

MCT4 MX4+

MX4-

24

LAN_MX0+MDI_0+

23

LAN_MX0-

22

LAN_MCT3

21

LAN_MCT2

20

LAN_MX1+MDI_1+

19

LAN_MX1-

18

LAN_MX2+

17

LAN_MX2-

16

LAN_MCT1

15

LAN_MCT0

14

LAN_MX3+

13

LAN_MX3-

Layout:All termination signal should have 30 mil trace

R206 75/F_12

R207 75/F_12

R210 75/F_12

R211 75/F_12

LANCT3

C497

220p/3KV_1808

1A-7 2013/10/22 Change LGND to GND

LAN_MX0+ LAN_MX0LAN_MX1+ LAN_MX2+ LAN_MX2LAN_MX1LAN_MX3+ LAN_MX3-

R600 0_12

3

R594 *1M_8

D22 *BS4200N-C_1812

D4 *BS4200N-C_1206

2

1 2 3 4 5 6 7 8

CN8

9

R205 *0/J_6

10

R219 *0/J_6

LAN_RJ45

1A-7 2013/10/22 CN5006 pin9/10

add R5332/r5333 for ESD protect.

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

PROJECT :

LAN (RTL8111GS)

1

ZQ0

1A

4726

5

USB 3.0 Connector

USBP0-[9]

USBP0+[9]

USB3_RXN0[9]

D D

USB3_RXP0[9]

USB3_TXN0[9] USB3_TXP0[9]

USB3_RXN0 USB3_RXP0

C335 0.1u/10V_4

1B-6 2013/12/18 Change CN12 USB2.0 port to port0.

USBP0-

USBP0+

USB3_TXN0_C USB3_TXP0_C

R313 *short_4 R317 *short_4

R334 *short_4 R326 *short_4

R304 *short_4 R298 *short_4C325 0.1u/10V_4 HOLE11

USBON#[27,30]

USB_OC0#[9]

4

www.laptopblue.vn

USBPWR1

CN13 USB3.0 CONN

USBP0-_R USBP0+_R

USB3_RXN0_R USB3_RXP0_R

USB3_TXN0_R USB3_TXP0_R

C3081u/6.3V_4

VC1*TVM0G5R5M261R_4

USBON#

1

VBUS

1

2

D-

2

3

D+

3

4

GND

5

SSRX-

5

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

9

11111010131312

12

+5V_S5

U12

5

C715*22U/6.3V_6

IN

4

EN

G524B2T11U

1C1-2

1

OUT

2

GND

3

/OC

G524B2T11U: Enable: Low Active /2.5A

USBP0-_R USBP0+_R USB3_RXN0_R USB3_RXP0_R

USB3_TXN0_R USB3_TXP0_R

2014/03/08 ChangeU12 footprint to sot23 and add VC2\VC1 change C307 to 3528.

Close USB3.0

C541

C714

470P/50V_4

1 2

RV3 *EGA_4

1 2

RV4 *EGA_4

1 2

RV6 *EGA_4

1 2

RV5 *EGA_4

1 2

RV2 *EGA_4

1 2

RV1 *EGA_4

C540

0.1u/10V_4

USBPWR1

C307

+

220U/6.3V/ESR35_3528

3

VC2 *TVM0G5R5M261R_4

HOLE(OTH)

HOLE3

*HG-C276D118P2

67 5

8

4

9

123

HOLE26

*H-C236D140P2

HOLE20 *O-ZQ0-1

*H-C236D140P2

1

HOLE23

*HG-C276D118P2

8 9

123

HOLE27

1

HOLE24

*HG-C276D118P2

8 9

123

67 5 4

2

67 5 4

HOLE25

*HG-C276D118P2

8 9

HOLE18 *H-ZQ0-1

1

HOLE28 *H-C236D140P2

1

HOLE1

*hg-tsbc276d118p2

8 9

123

HOLE8 *h-tsbc276d118p2

1

123

67 5 4

HOLE19 *H-ZQ0-1

HOLE17 *h-c102d102n

1

HOLE7

*hg-tr260x283bc276d189p2

8 9

123

HOLE10

*hg-tc276bc197d118p2

67 5

8

4

9

123

1

HOLE6 *SPAD-C236

1

67 5 4

HOLE9

*H-TC256BC236D161P2

1

*SPAD-C236

HOLE14 *SPAD-C236

HOLE16

*HG-C276D118P2

8 9

123

1

67 5 4

HOLE5

*H-TC256BC236D161P2

1

HOLE13 *SPAD-C236

1

HOLE29

*H-O114X91D114X91N

1

HOLE2

*HG-C276D118P2

8 9

123

HOLE12 *SPAD-C236

1

67 5 4

HOLE15

*H-TC256BC236D161P2

1

HOLE4 *SPAD-C236

1

HOLE22 *h-o102x165d102x165n

1

USB IO D/B

C C

+5V_S5

USBON#[27,30]

USB_OC1#[9]

D/B USB Port

USBP1-[9]

USBP1+[9]

D/B USB Port

USBP3-[9]

USBP3+[9]

1B-6 2013/12/18 Change CN16 USB2.0 port to port1\port2 for DB.

B B

+1.05V_S5 +1.35V_GFX

C435

C436

*0.1u/10V_4

C124 *0.1u/10V_4

*1000p/50V_4

C61 *1000p/50V_4

EMI

+VCCIN +V1.05M_VCCASW

A A

C403 *0.1u/10V_4

C141 *0.1u/10V_4

CN18

1 2 3 4 5 6 7 8 9 10 11 12 13 14

50501-01401-001

C397 *1000p/50V_4

C138 *1000p/50V_4

15 16

+3V

C156 *1000p/50V_4

+3V_S5

C242

C507

*0.1u/10V_4

*1000p/50V_4

Card Reader and Connector

USBP7-[9]

USBP7+[9]

R342 *short_4 R339 *short_4

DVDD

AVDD

TP64 TP65

C542

0.1u/16V_4

USBP7-_R USBP7+_R

C544 0.1u/10V_4

USBP7-_R USBP7+_R

MS_INS

SD_D7/MS_CLK

68p/50V_4

C346

1 2

2.2u/6.3V_6

TP67 TP66 TP69

SD/MMC CARD READER (MMC)

SD_WP/MS_D1 SD_WP_R SD_CDZ SD_D2/MS_D5 SD_D1/MS_D7 SD_D0/MS_D6

SD_CLK

SD_CMD SD_D3/MS_D4

DVDD

C543 0.1u/10V_4

VCC_XD

C359

4.7u/25V_8

U17

1

DVDD

2

DM

3

DP

4

AVDD

5

MS_INS

6

SB0

C683

25

SD_D6/MS_D3 SD_D5/MS_D2 SD_D4/MS_D0

R374 90.9_4 R368 90.9_4 R371 90.9_4 R369 90.9_4 R372 90.9_4

R367 90.9_4 C372

VCC_XD

R370 90.9_4 R373 90.9_4

SD_CDZ

GPIO0

RSTZ

VCC_XD

20

21

22

23

24

RSTZ

DVDD

PMOS

SD_CDZ

GL834L QFN24-3.3V

SB17SB38SB49SB510MS_BS11SB8

C684 68p/50V_4 C377 0.1u/10V_4

DVDD

19

DVDD

GPIO0

12

SD_D1/MS_D7 MS_BS SD_WP/MS_D1

SD_CD#_R SD_DATA2_R SD_DATA1_R SD_DATA0_R

SD_CLK_R

SD_CMD_R SD_DATA3_R

TP72

VDD18

SB13 SB12

SD_CMD

SD_CLK

SB9

QFN24-3.3V

C378

0.1u/16V_4

R362 *short_4

18

VDD18

17

SD_D2/MS_D5

16

SD_D3/MS_D4

15

SD_CMD

14

SD_CLK

13

SD_D0/MS_D6

TP83 TP71 TP70

PLTRST# [7,13,16,21,24,26,30]

1C-5 2014/01/14 add C684\C683\C685 for FAE request.

C685

68p/50V_4

C3830.1u/10V_4

CN1

11

WP

10

9 8 7 6 5 4 3 2 1

CD DATA2 DATA1 DATA0 VSS2 CLK VDD VSS1 CMD CD/DATA3

GND

GND12GND

14

13

GND

15

NC NC

SD-CARD

16 17

DVDD

R355 *1K_4

RSTZ

C366

R654 *Short_6

C348

2.2u/6.3V_6

L34 BLM18PG121SN

*1.6P/50V_4

R356 *100K_4

C382 *1.6P/50V_4

C347

4.7u/10V_6

C373 *1.6P/50V_4

DVDD+3V

0.1u/10V_4

1C-3 2014/01/14 change R654 to 0ohm.

C349

10u/6.3V_6

DVDD AVDD

C380 *1.6P/50V_4

C379 *1.6P/50V_4

SD_CLK SD_CDZ SD_D2/MS_D5 SD_D1/MS_D7 SD_D0/MS_D6 SD_D3/MS_D4

C381 *1.6P/50V_4

+1.35V_SUS +3VPCU +WL_VDD

C255 *0.1u/10V_4

C317 *1000p/50V_4

5

C17 *0.1u/10V_4

C546 *1000p/50V_4

C538 *0.1u/10V_4

C515 *1000p/50V_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

4

3

2

Date: Sheet of

PROJECT :

USB Port/ DB

ZQ0

27 47Tuesday, April 08, 2014

1

27 47Tuesday, April 08, 2014

1A

5

4

3

2

1

Codec(ADO)

D D

+1.5VA

C351 10u/6.3V_4

ADOGND

Place next to pin 40

Analog

Digital

C C

+5V

C337

0.1u/10V_4

C352

0.1u/10V_4

near Codec

R394 *short_4 R314 *short_4 R364 *short_4 R366 *short_4 R365 *short_4 R363 *short_4

C389 *1000p/50V_4

ADOGND

C354 *1000p/50V_4

+5V

C368

*0.1u/10V_4

C358 *10u/6.3V_6

L21 HCB2012KF220T60/6A/22ohm_8

U18

3

IN

2

GND

1

SHDN

*G923-330T1UF

R343 *0_4

B B

A A

C730, C787 close U37 pin3 and L65

5

ADOGND

near Codec

Low is power down amplifier output

+3V

ANALOG DIGITAL

4

OUT

5

SET

placed close to codec

C355 1u/10V_4

C350 10u/6.3V_4

L_SPK+

C339

L_SPK-

0.1u/10V_4

R_SPKR_SPK+

PD#

TP63

R296 *Short_6

C331

0.1u/10V_4

Place next to pin 1

R357 *29.4K/F_4

R358 *10K/F_4

ADOGND

+AZA_VDD

37 38 39 40 41 42 43 44 45 46 47 48

49

CBP AVSS2 LDO2-CAP AVDD2 PVDD1 SPK-L+ SPK-LSPK-RSPK-R+ PVDD2 PDB SPDIFO/GPIO2

DGND

+AZA_VDD

C332 10u/6.3V_4

C35710u/6.3V_4

36

C356 *10u/6.3V_6

www.laptopblue.vn

C3631u/10V_4

HPR HPL LINE1L-VREFO LINE1R-VREFO MIC2-VREFO CODEC_VREF

INT_AMIC-VREFO

C364 2.2U/6.3V_4 C362 10u/6.3V_4

R350 100K_4

1A-9 2013/10/24 add 100kohm on U5011 pin 26 with C5164.

ADOGND ADOGND

+5VA

C360

C365

0.1u/10V_4

10u/6.3V_4

Place next to pin 26

25

26

27

28

29

30

31

32

33

34

35

CBN

CPVEE

CPVDD

HP-OUT-R

VREF

HP-OUT-L

MIC2-VREFO

LINE1-VREFO-L

LINE1-VREFO-R

ALC283

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP

C326 10u/6.3V_4

DMIC_DAT_L

DMIC_CLK_L

ACZ_SDIN

C327 *22p/50V_4

+5VA

C367 *0.1u/10V_4

ADOGND

4

U15

AVSS1

AVDD1

24

LDO1-CAP

MIC1-CAP

MIC2-R/SLEEVE

MIC2-L/RING2

MONO-OUT

12

PCH_AZ_CODEC_RST#

R281 33_4

LINE2-L

23

LINE2-R

22

LINE1L_R

LINE1-L

21

LINE1R_R

LINE1-R

20

NC

19 18

SLEEVE

17

RING2

16 15

CODEC_JDREF

JDREF

14

Sense B

13

Sense A

1.6Vrms

PCBEEP BEEP_1

C329 1u/10V_4

C328 100p/50V_4

PCH_AZ_CODEC_RST# [8] PCH_AZ_CODEC_SYNC [8]

PCH_AZ_CODEC_SDIN0 [8]

PCH_AZ_CODEC_BITCLK [8]

PCH_AZ_CODEC_SDOUT [8]

Mute(ADO)Codec PWR 5V(ADO)

Internal Speaker

40mil for each signal

R_SPK+

R390 *Short_6

R_SPK-

R389 *Short_6

L_SPK-

R387 *Short_6

L_SPK+

R386 *Short_6

ADOGND

6/26 MIC change chanel for B-test.

T2 T1

C341 10u/6.3V_4

R328 20K/F_4

R320 39.2K/F_4

ADOGND

HP_JD#SENSEA

Placement near Audio Codec

Analog

Digital

D13 RB500V-40

D12 RB500V-40

C310

0.1u/10V_4

D14RB500V-40

D15RB500V-40

R_SPK+_1 R_SPK-_1 L_SPK-_1

C552

*68p/50V_4

3

R266 *short_4

R267 *0_4

C330 10u/6.3V_4

Place next to pin 9

AMP_MUTE#

PCH_AZ_CODEC_RST#PD#

L_SPK+_1

C551

*68p/50V_4

C548

*68p/50V_4

R269 47K_4

R268

4.7K_4

DVDD_IO

+AZA_VDD

R307 *1K_4

R315 *10K_4

C547

*68p/50V_4

SPKR [8,10]

PCBEEP_EC [30]

+3V +1.5V

CN19

6 345 2 1

SPK_CONN_4P

1B-2 2013/12/04 Change PN and footprint.

1B-5 2013/12/17 Change CN14 pin define

Grounding circuit(ADO)

PIN1, PIN4, PIN3, PIN6 are ANALOG

1

4 3

ADOGND

D-Mic

1B-5 2013/12/18 U34 pin6 reserve 0402 resistor for power noise issue.

+3V

R392 0_4

Universal Audio Jack

40mils

RING2

L24 80ohm@100MHz

SLEEVE

L22 80ohm@100MHz

40mils

1C-1 2014/1/06 Change R351\R388 from 47ohm to 65ohm

R351 56/F_4

HPL HPL_SYS

R388 56/F_4

R391

R352

*1K_4

LINE1R_R LINE1L_R

LINE1R-VREFO LINE1L-VREFO

1A-1 2013/10/15 swap CAP C8579/C8580 to Vrefo and

AMP_MUTE# [30]

resistor R5214/R5215 to Line in.

4.7u/6.3V_4C369

4.7u/6.3V_4C388

R354 4.7K_4 R385 4.7K_4

Codec PWR 3V/1.5V(ADO)

+1.5V

2N7002DW

6 2

5

Q37

DMIC_DAT_L DMIC_CLK_L

base on FAE request.

C342

1U/6.3V_4

2

SLEEVE

RING2

MIC2-VREFO

+3VPCU

C391 10u/6.3V_4 C390 0.1u/10V_4

U32

6

GND

VDD

5

CS

DATA

4

GND3CLK

D-MIC

1A-7 2013/10/22 del C5079.

R349

2.2K_4

HPR-1

L23 0_6

HPL-1

L25 0_6

SLEEVE_R

HPR_SYS

HPL_SYS

RING2_R

ESD 2'nd CY00G050B00

R335 *short_4

R318

100K_4

1 2

R283

2.2K_4

RING2_R

SLEEVE_R

C386 2200P/50V_4

D18 *VPORT 0402 151 MV0521

D19 *VPORT 0402 151 MV0521

D20 *VPORT 0402 151 MV0521

D21 *VPORT 0402 151 MV0521

+3V

R272

3

*100K_4

C376 2200P/50V_4

1

2

Q36

2N7002K

C313 *1u/10V_4

SLEEVE_R

RING2_R

C371 *100P/50V_4

C344 *100P/50V_4

ADOGNDADOGND ADOGND

+1.5VA

R301 10K_4

HPR_SYSHPR

HP_JD#

ADOGND

PCH_AZ_CODEC_RST#

CN16

4 2 6 5 7 1 3

COMBOJACK

ANALOG DIGITAL

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

ALC283/HP/SPK

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

PROJECT :

1

ZQ0

3B

4728

5

K/B (KBC)

CN15

1

MY0[30] MY1[30] MY2[30] MY3[30] MY4[30] MY5[30]

D D

C C

MY6[30] MY7[30] MY8[30] MY9[30] MY10[30] MY11[30] MY12[30] MY13[30] MY14[30] MY15[30] MY16[30] MY17[30] MX7[30] MX6[30] MX5[30] MX4[30] MX3[30] MX2[30] MX1[30] MX0[30]

1A-7 2013/10/22 change CN24 pin define based on spec. 1A-8 2013/10/22 change CN24 pin define based on spec based on ZRQ.

MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17 MX7 MX6 MX5 MX4 MX3 MX2 MX1 MX0

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

KB_CONN

27 28

4

TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay)

www.laptopblue.vn

7 8 5 3 1

CP6 *100p/50Vx4

7 8 5 3 1

CP5 *100p/50Vx4

7 8 5 3 1

CP3 *100p/50Vx4

7 8 5 3 1

CP1 *100p/50Vx4

7 8 5 3 1

CP2 *100p/50Vx4

7 8 5 3 1

CP4 *100p/50Vx4 C385 *100p/50V_4

C384 *100p/50V_4

MX3

6

MX2

4

MY17

2

MY16 MX7

6

MX6

4

MX5

2

MX4 MY3

6

MY2

4

MY1

2

MY0 MY7

6

MY6

4

MY5

2

MY4 MY11

6

MY10

4

MY9

2

MY8 MY15

6

MY14

4

MY13

2

MY12

MX1 MX0

TPD->100kHz,TS=400Khz Intel design guide suggestion MCP PIN 10u. Per inch 3u TS=3x5inch 400kHz10~100u =2.4~0.4k. 100Khz 10~100u=9k~1k.

I2C0_SDA_GPIO4[10]

I2C0_SCL_GPIO5[10]

3

+3V

+3V_S5

+3V_SUS

R660 *TDI@0_4

TDI@2N7002DW

1

4 3

R673 *TDI@0_4

6 2

5

Q45

+3V

R693 *0_4

R655 0_4

R656 *0_4

TPCLK[30]

TPDATA[30]

I2C_TP_SDA_R I2C_TP_SCL_R

R670 10K_4

2

1C-2 2014/01/13 Change TP power rail from +3V_S5

to +3V_SUS.

L35 0_6

+3V_S5

L36 *0_6

+3V_SUS

L37 *0_6

R675 *short_4 R676 *short_4

+3V

PTP_PWR_EN#[30]

TPD_INT#[2,30]

R669 10K_4

CPU FAN (THM)

+3VPCU

CPUFAN#[30]

R140 *10K_4

+3V

C196

2.2U_6

FANPWR = 1.6*VSET

+5V

U2

1 2

1 4

G991P11U

VIN2VO

GND

/FON

GND GND

VSET

GND

3 5 6 7 8

FANSIG[30]

TH_FAN_POWERTH_FAN_POW ER

C174

2.2U_6

1 2

2013/10/15 change pin define and add pwm IC U17.1A-1

RP2 *10K_10P8R

10

1

9

MX4

8

MX6

7 4

MX5 MX0 MX7

MX3

2 3

MX2

56

MX1

SMB1ALERT#[8]

C549

*0.1u/10V_4

C180 .01U_4

C686

0.1u/10V_4 R694 *0_4

30mils

C469 *.01U_4

1C-4 2014/01/15 reserve TP power rail +3V_S5.

R690 0_6

1

C550

*0.1u/10V_4

+3V

R563 10K_4

1C1-1 2014/02/17 Add Q47 for PTP

power EN and soft up R694\C713.

*AO3413

Q47

2

C713 *1000p/50V_4

1A-12

CN5

1 2 3

FAN_3P

and C712\C686.

3

+

C712

0.22u/25V_6

TPD_EN[30]

1A-5 2013/10/18 Change CN21 Pin8 for

I2C/PS2 TPD idendify.

2013/10/29 Change CN21 power rail to S5 change Q42 direction and net name, reseve PS2 PU to +3V.

1

C545

0.1u/10V_4

50mil

TPCLK_R TPDATA_R

I2C_TP_SDA_R I2C_TP_SCL_R

TPD_INT#

+TPVDD

32

CN17

1 2 3 4 5 6 789

10

TP CN

1A-42013/10/17 Change U17 to G991P11U and PU U17 pin1. 1A-92013/10/24 Add alert on U17.1 for CPU themal tempture.

KB_BL LED (KBC)

B B

1A-13 2013/10/31CN15 Pin2/3 swap.

+5V

KB_BL_LED[30]

A A

2

Q42

*KBL@DTC144EU

1 3

5

R638 *KBL@10K_4

+5V

1

2

3

C522 *KBL@2.2u/6.3V_6

Q43 *KBL@AO3413

C521 *KBL@4.7u/6.3V_6

R628 *KBL@0_4 C513 *KBL@0.01u/16V_4

+5V_KB_R+5V_KB

CN9

346 2

5

1

1A-7 2013/10/22 change CN25 pin define for spec.

1A-8 2013/10/23 change CN25 footprint.

*KBL@KB_backlight

4

Accelerometer Sensor(reserve only)

ACCEL_INTA[10]

ACCEL_INTA

C338 *GS@22P/50V_4

+G_SEN_PW

3

G_MBDATA[30] G_MBCLK[30]

R360 *GS@4.7K_4 R344 *GS@4.7K_4

+G_SEN_PW

R333 *GS@0_6

C375 *GS@0.1U/10V_4

G_MBDATA G_MBCLK

+G_SEN_PW G_MBDATA G_MBCLK

+G_SEN_PW

D16*GS@RB500V-40

R361 *GS@0_4 R359 *GS@0_4 R348 *GS@0_4

G_MBDATA_R G_MBCLK_R

+3V

C370 *GS@10u/6.3V_6

ACCEL_INTA_R

TP68

G_MBDATA_R G_MBCLK_R

C374 *GS@33P/50V_4 C361 *GS@33P/50V_4

U16

1

Vdd_IO

14

VDD

11

INT1

9

INT2

7

SA0

6

SDA

4

SCL

8

CS

*GS@LIS3DHTR

2

RESERVED RESERVED

GND GND GND GND

2

NC

3

NC

10 15

5 12 13 16

Quanta Computer Inc.

ZQ0

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

KB/TP/FAN

ZQ0

3A

29 47Tuesday, April 08, 2014

1

29 47Tuesday, April 08, 2014

3A

5

EC(KBC)

R257 2.2_6

1 2

+3VPCU

+3VPCU_EC and +3V_RTC minimum trace width 12mils.

D D

+3VPCU

D8 SDMK0340L-7-F

R256 100K_4

2 1

1 2

C282 1u/6.3V_4

C C

1A-5 2013/10/18 change U27 .87 for Touch pad ID

1A-13 2013/10/29 add U 27.35 for

B B

CLK_PCI_EC

R237 *22_4

C276 *10p/50V_4

for I2C/PS2 sol ution switch.

touch pad on/of f.

Please do not place any pull-up resistor on GPG0, GPG2, and GPG6 (Reserved hardware strapping).

1B-1 20 13/11/28 Add B LON pin from P CH to lison.

C244

0.1u/10V_4

SIO_EXT_SMI#[10]

SIO_EXT_SCI#[10]

HWPG_1.05V_EC#[5]

BT_POWERON[24]

PCH_SLP_SUS#[7]

PCH_SPI_CLK_EC[8]

SPI_CS0#_UR_ME[8]

PCH_SPI_SI_EC[8]

PCH_SPI_SO_EC[8]

L14 BLM15AG121SN1D(120,500MA)_4

12 mils

C266

C301

0.1u/10V_4

+3V

LPC_LAD0[8,21,24] LPC_LAD1[8,21,24] LPC_LAD2[8,21,24] LPC_LAD3[8,21,24]

PLTRST#[7,13,16,21,24,26,27]

CLK_PCI_EC[9]

LPC_LFRAME#[8,21,24]

TP61

IRQ_SERIRQ[10,21]

SIO_RCIN#[10]

PCH_BLON_EC[22]

SUSON[32,34]

MAINON[34,36]

EC_PWROK[5,7]

KB_BL_LED[29]

CPUFAN#[29]

TPD_EN[29]

TP60

AMP_MUTE#[28]

ACIN[31]

TEMP_MBAT[31] TS_EN[22] PCBEEP_EC[28]

D/C#[31]

G_MBDATA[29]

G_MBCLK[29]

MY16[29] MY17[29]

S5_ON[32,33,36]

ME_WR#[8]

MY0[29] MY1[29] MY2[29] MY3[29] MY4[29] MY5[29] MY6[29] MY7[29] MY8[29]

MY9[29] MY10[29] MY11[29] MY12[29] MY13[29] MY14[29] MY15[29]

C245

0.1u/10V_4

R232 2.2_6

1 2

PLTRST#

PROCHOT_EC SIO_A20GATE

BT_POWERON

E51_TXD

S5_ON

C286

0.1u/10V_4

WRST#

ECAGND

C292

0.1u/10V_4

C269

0.1u/10V_4

MX0[29] MX1[29] MX2[29] MX3[29] MX4[29] MX5[29] MX6[29] MX7[29]

10

9 8

7 22 13

6 17

126

5 15 23 14

4 16

119 123

80

104

33 88 81 87

109 108

71 72 73 35 34

107

95 94

105 101 102 103

56 57 32

100 106

36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55

4

+A3VPCU

www.laptopblue.vn

12 mils

+3V_RTC

+3VPCU_EC

C536

0.1u/10V_4

+3V_EC

U11

LAD0/GPM0(X) LAD1/GPM1(X) LAD2/GPM2(X) LAD3/GPM3(X) LPCRST#/WUI4/GPD2(Up) LPCCLK/GPM4(X) LFRAME#/GPM5(X)

LPCPD#/WUI6/GPE6(Dn) GA20/GPB5(X)

SERIRQ/GPM6(X) ECSMI#/GPD4(Up) ECSCI#/GPD3(Up) WRST# KBRST#/GPB6(X) PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT

CRX0/GPC0(Dn) CTX0/TMA0/GPB2(Dn)

DAC4/DCD0#/GPJ4(X) DSR0#/GPG6(X) GINT/CTS0#/GPD5(Up) PS2DAT1/RTS0#/GPF3(Up) DAC5/RIG0#/GPJ5(X) PS2CLK1/DTR0#/GPF2(Up) TXD/SOUT0/GPB1(Up) RXD/SIN0/GPB0(Up)

ADC5/DCD1#/WUI29/GPI5(X) ADC6/DSR1#/WUI30/GPI6(X) ADC7/CTS1#/WUI31/GPI7(X) RTS1#/WUI5/GPE5(Dn) PWM7/RIG1#/GPA7(Up) DTR1#/SBUSY/GPG1/ID7(Dn) CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn) CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)

FSCK/GPG7 FSCE#/GPG3 FMOSI/GPG4 FMISO/GPG5

KSO16/SMOSI/GPC3(Dn) KSO17/SMISO/GPC5(Dn) PWM6/SSCK/GPA6(Up)

SSCE0#/GPG2(X) SSCE1#/GPG0(X)

KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15

C263

0.1u/10V_4

11

114

VCC

VSTBY26VSTBY50VSTBY92VSTBY

LPC

CIR

EXTERNAL SERIAL FLASH

SPI ENABLE

KBMX

KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7

121

VSTBY

UART port

65

3

74

VBAT

AVCC

+3VPCU_ECPLL

127

VSTBY

C243

0.1u/10V_4

84

82

19

EGAD/WUI25/GPE1(Dn)

EGCS#/WUI26/GPE2(Dn)83EGCLK/WUI27/GPE3(Dn)

L80HLAT/BAO/WUI24/GPE0(Dn)

L13 BLM15AG121SN1D(120,500MA)_4

20

L80LLAT/WUI7/GPE7(Up)

GPIO

IT8587

WAKE UP

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)

VSS

VSS27VSS49VSS

VSS

AVSS

VSS

1

L16 BLM15AG121SN1D(120,500MA)_4

75

91

122

113

ECAGND

(For PLL Power)

HWPG

97

93

PECI/SMCLK2/WUI22/GPF6(Up)

PS2CLK0/TMB0/CEC/GPF0(Up)

WUI41/GPH5/ID5(Dn)98WUI42/GPH6/ID6(Dn)99WUI19/GPH3/ID3(Dn)96WUI40/GPH4/ID4(Dn)

SM BUS

CLKRUN#/WUI16/GPH0/ID0(Dn)

A/D D/A

CLOCK

VCORE

12

C272

0.1u/10V_4

SMDAT2/WUI23/GPF7(Up)

PS2DAT0/TMB1/GPF1(Up) PS2CLK2/WUI20/GPF4(Up) PS2DAT2/WUI21/GPF5(Up)

PS/2

PWM

TACH1A/TMA1/GPD7(Dn)

3

+3VPCU_EC

SUSC# [7,13]

SUSB# [7,13]

ODD_POWER [25] EC_ODD_EJ [25]

PTP_PWR_EN# [29]

CLKRUN# [7,21]

SMCLK0/GPB3(X) SMDAT0/GPB4(X) SMCLK1/GPC1(X) SMDAT1/GPC2(X)

PWM0/GPA0(Up) PWM1/GPA1(Up) PWM2/GPA2(Up) PWM3/GPA3(Up) PWM4/GPA4(Up) PWM5/GPA5(Up)

TACH0A/GPD6(Dn)

TMRI0/WUI2/GPC4(Dn) TMRI1/WUI3/GPC6(Dn)

PWRSW/GPE4(Up) RI1#/WUI0/GPD0(Up) RI2#/WUI1/GPD1(Up)

ADC0/GPI0(X) ADC1/GPI1(X) ADC2/GPI2(X) ADC3/GPI3(X)

ADC4/WUI28/GPI4(X)

TACH2/GPJ0(X)

GPJ1(X) DAC2/TACH0B/GPJ2(X) DAC3/TACH1B/GPJ3(X)

CK32KE/GPJ7

CK32K/GPJ6

IT8587E/FX

1C1-1 2014/02/17 Add U11. 98 GPIO5

for PTP power e n function.

110

MBCLK

111

MBDATA

115

2ND_MBCLK

116

2ND_MBDATA

117

EC_PECR_R

118 85

86 89 90

24 25 28

SUSLED#

29 30 31

47 48

120 124

125 18 21

112

66 67 68 69 70

76 77 78 79

2 128

2013/10/15 del fan Pwm 1A-1

NBSWON# dGPU_OPP#

ICMNT

C302 10u/6.3V_6

FB_CLAMP_REQ#

dGPU_OTP#

EC_FB_CLAMP

R177 *0_4

1A-12 2013/1 0/29 Swap U27 pin2 and pin128 . 1B-1 2013/11/27 conn ecto to GND of pin128. 1C1-01 2014/02/ 19 add SUSPWR ACK# to PCH.

SM BUS ARRANGEMENT TABLE

SM Bus 1

SM Bus 2

SM Bus 3

R217 43_4

ECAGND

Battery

PCH/VGA

G-Snesor

MBCLK [31] MBDATA [31]

2ND_MBCLK [8,19]

2ND_MBDATA [8,19]

EC_FPBACK# [22]

LID# [21,22] TPCLK [29] TPDATA [29]

PWRLED# [25]

BATLED1# [25]

SUSLED# [25]

BATLED0# [25]

APWORK [7]

FANSIG [29]

DNBSWON# [7]

DPWROK [7]

NBSWON# [13,21]

dGPU_OPP# [19]

SB_ACDC [31]

RSMRST# [7]

RF_EN [24]

ICMNT [31]

TPD_INT# [2,29]

VRON [35]

FB_CLAMP_REQ# [19]

dGPU_OTP# [19]

EC_FB_CLAMP [17,19]

PCH_PWROK [5,7]

USBON# [27]

PCH_SUSACK# [7] PCH_SUSPWRACK_R [7]

SM Bus 4

H_PECI [4]

2013/10/29 add U27.68 for

1A-12

touch pad inter rupt.

2

S5_ON NBSWON#

1C1-2 201 4/03/08 add R6 96\R697 PU.

dGPU_OTP# dGPU_OPP#

FB_CLAMP_REQ#

MAINON SUSON VRON PCH_SPI_SI_EC PCH_SPI_SO_EC

SM BUS PU(KBC)

MBCLK MBDATA

2ND_MBCLK 2ND_MBDATA

PROCHOT_EC

HWPG(KBC)

DDR=1.5V, D1 DNP and D2 POP DDR=1.35V, D1 POP and D2 DNP

HWPG_1.5V[36] HWPG_1.05V[5] HWPG_VDDR[34]

HWPG_1.05V_S5[13,33]

SYS_HWPG[32]

R329 100K_4

R250 10K_4 R627 10K_4

R696 EV@10K_4 R243 EV@10K_4 R697 EV@10K_4

R233 100K_4 R220 100K_4 R644 100K_4 R341 *10K_4 R222 *10K_4

R332 4.7K_4 R340 4.7K_4

R331 4.7K_4 R330 4.7K_4

3

Q32

2

2N7002K

1

D1

D10 RB500V-40

D2

D6 *RB500V-40 D11 RB500V-40 D9 RB500V-40 D7 RB500V-40

1

+3VPCU

+3V_GFX

+3VPCU

+3V_S5

H_PROCHOT# [4,31,35]

+3V

R228 10K_4

33

HWPG

For test only

A A

5

TP57

3 5

6

*Power Switch

SW1

2

NBSWON#

14

TP58

4

iRST

1A-4 2013/10/17 Del U22 becuse no support IOAC

3

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

KBC IT8587

ZQ0

3A

30 47Tuesday, April 08, 2014

1

30 47Tuesday, April 08, 2014

3A

1A-7 2013/10/22 change PJ1 Pin define

same as ZQN.

5

1A-14 2013/10/30 change Pin define revers.

PJ1

1 2 3 4

Power conn

D D

C C

ACIN[30]

ACPRESENT[7]

SB_ACDC[30]

20140304 Short Pad

B B

MBAT+

PJ2

1

10

2 3 4 5 6 7 89

50458-00801-V01

A A

PU2 *IP4223-CZ6

1

CH1

2

VN CH23CH3

Add ESD diode base on EC FAE suggestion

100p/50V_4

CH4

VP

PR18 *Short_4

PC16

0.1u/50V_6

PC20

6 5 4

5

0.1u/50V_6

PR38 100_4

MBDATA

MBCLKTEMP_MBAT

PC1

No need batt en pin

PR17 *0_4

PR37 *Short_4

PR30 100_4

PC26

*47p/50V_4

+3VPCU

PC2

2200p/50V_6

PR39 100_4

+3VPCU

PR14 *10K_4

6

1

PR12 100K_4

PR15

PC13

100K_4

0.1u/25V_4

2

5

PQ6 2N7002DW

4 3

20140328 EMI add.

PL12 HCB2012KF-800T50

PL13 HCB2012KF-800T50

TEMP_MBAT

PR35 1M_4

PC27 *47p/50V_4

MBCLK [30]

MBDATA [30]

1A-7 2013/10/22 change PJ2 Pin define

same as ZQN.

TEMP_MBAT [30]

+3VPCU

1A-10 2013/10/25 modify PJ2 footprint.

4

www.laptopblue.vn

VA1

PC3

0.1u/50V_6

PD3 1N4148WS

recommend 200mA at least.

PR9 *Short_6

20131024 Modify PN for low H.

PR11 10K/F_4

PR13 20_1206

PD2 P4SMAFJ20A

2 1

PR10

63.4K/F_4

24737_ACDET

24737_VCC

PC10

0.47u/25V_6

PC4

0.1u/50V_6

6

20

5

20140304 Short Pad

24737_CMPIN

PR36 *100K_4

8

9

11

3

10

4

BAT-V

+3VPCU

24737_BM#

PR25 10K_4

PR28

316K/F_4

PQ8 *2N7002K

MBDATA

PR19 *Short_4

MBCLK

PR21 *Short_4

PR26 *10K_4

PR33 *100K_4

PR34 100K/F_4

3

2

1

24737_CMPOUT

24737_ILIM

PC25

0.01u/25V_4

ICMNT[30]

24737_BM#

PC7

ACDET

VCC

ACOK#

SDA

SCL

BM#

CMPOUT

ILIM

CMPIN

PR41 *1.62K/F_4

3

PR3 220K_4

PR6 220K_4

0.1u/50V_6

2

BQ24737RGRR

IOUT

7

PC28 100p/50V_4

PC11

ACP

21

PU1

GND

GND22GND24GND23GND

24737_CMPOUT

1 6 2 3

PQ3

IMD2AT108

24737_ACP

24737_ACN

PC8

0.1u/50V_6

1

ACN

REGN

BTST

HIDRV

PHASE

LCDRV

PGND

25

PR42

*0_4

2

VA2

PQ1 AOL1413

1 3

5 4

PD1

SBR1045SP5-13

1

52

2

4

PR7 *Short_4

PR1

0.01/F_0612

3

1 2

D/C# [30]

20140304 Short Pad

PC12

PR16

*Short_6

3

1

24737_SRP

24737_SRN

PQ9 *2N7002K

1u/16V_6

PD4 RB500V-40

PC15 47n/50V_6

PC21

0.1u/25V_4

PC23

0.1u/25V_4

PC24

0.1u/25V_4

H_PROCHOT# [4,30,35]

16

24737_REGN

17

24737_BST

18

24737_DH

19

24707_LX

15

14

PR209 10_6

13

SRP

PR210 7.5_6

12

SRN

12/23 Change to avoid revise BATT

+1.05V

PR40

*100K_4

2

4

Limit set on 60W/3.16A

4

3

2

UMA->0.02/F CS+0208FP04 DIS->0.01/F

PR2 *Short_4

24737_ACN

24737_ACP

PR5 *Short_4

20140304 Short Pad

52

3

52

3

2200p/50V_6

PQ5 MDV1528

1

PQ7 MDV1528

1

1 3

PR4 33K/F_4

PQ4 2N7002K

PC18

2200p/50V_6

PQ2 AOL1413

2

4

3

1

10U/25V_8

PC9

6.8uH_7X7X3

PR22 *4.7_6

PC22 *680p/50V_6

PL1

PC5

0.1u/50V_6

24737_SRP 24737_SRN

VIN

PC14

4.7u/25V_8

PR23

*Short_4

PC6 2200p/50V_6

PR20

0.01/F_0612

1 2

PR24 *Short_4

20140304 Short Pad

REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 3.965A current limit

Pin10 ILIM=0.793V Rsr = 0.01ohm

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Charger(BQ24737RGRR)

Date: Sheet of

PROJECT :

ZQ0

1

34

52

PR8 10K_4

BAT-V24737_DL

PC17

10U/25V_8

20131009 CHANGE

31 47Tuesday, April 08, 2014

PC19

2A

5

4

3

2

1

MAIND

MAIND [33,36]

SYS_SHDN#

20140304 C1-Stage Remove Jumper 20140304 C1-Stage Remove Jumper

D D

+5VPCU

C C

B B

A A

S5_ON

VIN

+5VPCU 5 Volt +/- 5% TDC : 6.8A PEAK : 9A OCP : 11A Width : 280mil

12

+

PC29 33U/25V_6x4.5

20140304 C1-Stage Remove Jumper

PR50

PC40

0.1u/50V_6

PR66 1M_6

PR61 1M_6

15.4K/F_4

PR54 10K/F_4

2

+

PC39

220u/6.3V_6X4.2

OCP:11A

L(ripple current) =(9-5)*5/(2.2u*0.3M*9) =3.367A Iocp=11-(3.367/2)=9.316A Vth=9.316A*14mOhm+1mV=131.43mV R(Ilim)=(131.43mV*8)/10uA =105.14K

2

1 3

PQ18

DTC144EU

5

3

1

PC30

4.7u/25V_8

+15V

PR62 22_8

PQ19 2N7002K

PL2

2.2uH_7X7X3

PR53

4.7_6

680p/50V_6

2

PC47

0.1u/50V_6

PR60 22_8

+5V_S5+3V_S5

PR63 22_8

3

1

PC31 2200p/50V_6

MDV1528

MDV1595S

PQ20 2N7002K

www.laptopblue.vn

SYS_SHDN# [10,36]

PR43 *Short_6

VL 3V_LDO

PC32 10u/6.3V_6

7

PGOOD

20

EN1

16

DRVH1

17

VBST1

18

SW1

15

DRVL1

2

VFB1

14

VO1

4

3

TDC : 3.77A PEAK : 5.02A Width : 160mil

19

51225_VCLK

52

1

13

VREG5

PU3

TPS51225RUKR

CS11CS25VCLK

51225_CS1

51225_CS2

PR58 52.3K/F_4

PR57 107K/F_4

PQ15

MDV1528Q

PR44 10K/F_4

PC33 0.1u/25V_4

3

VREG3

PR59 *Short_6

3

PC34 4.7u/6.3V_6

6

EN2

10

DRVH2

9

VBST2

8

SW2

11

DRVL2

4

VFB2

21

GND

22

GND

GND23GND24GND25GND

+3VPCU

3

2

1

TDC : 0.69A PEAK : 0.92A Width : 40mil

SYS_SHDN# 51225_DH2

PR48

51225_VBST2 51225_SW2 51225_DL2 51225_FB2

PQ16 AO3404

+3V +3V_S5

PC37

1/F_6

0.1u/50V_6

1/13 Adding +3V_SUS power for touch pad (By acer request)

+3VPCU

3

2

1

TDC : 0.6A PEAK : 0.81A Width : 40mil

SUSON[30,34]

PQ17 AO3404

4

51225_VIN

12

VIN

26

+5V

PQ10

PQ12

+15V_ALWP

2

SYS_HWPG[30]

SYS_SHDN#

PR45

*Short_4

20140304 Short Pad

52

4

3

1

PC38

0.1u/50V_6

4

3

PC45

0.1u/50V_6

+5VPCU

4

3

TDC : 3A PEAK : 4A Width : 120mil

2

1

2

1

VIN +5VPCU

PR65 *1M_6

S5D MAIND MAIND S5D

PC49 *2.2n/50V_4

4

+15VVIN

3

1

52

1

PD5 1PS302

PD6 1PS302

PR64 1M_6

PQ21

2N7002K

3

PC48

0.1u/50V_6

PR46 *Short_4

51225_DH1

PR49

51225_VBST1 51225_SW1

1/F_6

51225_DL1 51225_FB1

52

PQ14

MDV1528Q

1

+5V_S5

+3VPCU

51225_EN1

PC46

0.1u/50V_6

PR47 *100K/F_4

PR56 *Short_6

35

VIN

PR227 *1M_6

PR228 *1M_6

PC36

4.7u/25V_8

+3VPCU

3.3 Volt +/- 5% TDC : 3A PEAK : 4A OCP : 5A Width : 120mil

+3VPCU

20140304 C1-Stage Remove Jumper

PR52

6.81K/F_4

PC41

PR55 10K/F_4PC44

0.1u/50V_6

OCP:5A

L(ripple current) =(9-3.3)*3.3/(6.8u*0.355M*9) ~0.865A Iocp=5-(0.865/2)=4.57A Vth=4.57A*14mOhm+1mV=64.94mV R(Ilim)=(64.94mV*8)/10uA ~51.95K

+3V_SUS

PR225 *22_8

3

2

PQ54 *2N7002K

1

Size Document Number Rev

Date: Sheet of

+

+15VVIN

2

SYSTEM 5V/3V (TPS51225)

PC42 220u/6.3V_6X4.2

VIN +3VPCU

PR229

PR230

*1M_6

2

3

1

*2N7002K

SUSD

PQ53

PC164 *2.2n/50V_4

Quanta Computer Inc.

PROJECT :

ZQ0

1

3

PQ56 *AO3404

1

+3V_SUS

TDC : 0.038A PEAK : 0.05A Width : 20mil

32 47Tuesday, April 08, 2014

2A

PC35 2200p/50V_6

52

PQ11 MDV1528

3

1

PL3

6.8uH_7X7X3

52

PQ13 MDV1595S

3

1

2

*DTC144EU

PQ57

PR51

4.7_6

PC43 680p/50V_6

1 3

2

5

4

3

2

1

www.laptopblue.vn

1

PQ24

MDV1528Q

33 47Tuesday, April 08, 2014

36

+1.05V

2A

20140304 C1-Stage Remove Jumper

D D

+3V

PR67 100K/F_4

PQ51 *PDTC143TT

12

VIN

1 3 2 5

PGOOD EN TRIP TST GND

PR222 *1M_4

PR218 *1M_4

HWPG_1.05V_S5[13,30]

S5_ON[30,32,36]

C C

OCP=9A L ripple current =(19-1.05)*1.05/(2.2u*290k*19) =1.555A Vtrip=10-(1.555/2)*14mohm =115.12mV Rlimit=115.12mV/10uA*8=92.09Kohm

B B

PR68 *Short_4

PR71 *100K/F_4

PR70 93.1K/F_4 PR72 464K/F_4

51211V_EN 51211V_VBST 51211V_TRIP 51211V_TST

1C-1 2014/1/06 add PR224 PU to 3VPU.

+3V

PR224 *100K/F_4

PR220

MODPHY_EN[10]

A A

*0_4

PC152

*1u/10V_4

12

PR221 *100K_4

2

1 3

7

V5IN

PU4

TPS51211DSCR

GND13GND14GND15GND

16

2

DRVH

VBST

SW

DRVL

GND

4

3

1

FB

9 10 8 6 11

PR217 *22_8

PQ42 *2N7002K

+5VPCU

PC52 1u/10V_4

51211V_DRVH

51211V_SW 51211V_DRVL

51211V_FB

+15V+1.05V_MODPHY

2

3

1

PR69 *Short_6

PR219 *1M_4

PQ55 *2N7002K

52

4

PC53

0.1u/50V_6

MDV1595S

PQ23

3

1

52

4

3

1

VFB=0.7V

+1.05V_MODPHY +1.05V

1C-1 2014/1/06 add 0ohm pass

1.05V_Modphy to 1.05V.

+1.05V_S5

3

PC151 *2.2n/50V_4

2

PQ41 *AO3404

1

MODPHY_D

PQ22 MDV1528

PR223 0_8

+1.05V_MODPHY

PC50 2200p/50V_6

PL4

2.2uH_7X7X3

PR73

4.7_6

PC56 680p/50V_6

PC51

4.7u/25V_8

20140304 C1-Stage Remove Jumper

PR74

5.1K/F_4

PC54

0.1u/50V_6

PR75 10K/F_4

MAIND[32,36]

1B-2 2013/12/03 change PQ24 to DFN 3x3 size

+1.05V_MODPHY TDC : 1.43A PEAK : 1.9A

Size Document Number Rev

Width : 80mil

Date: Sheet of

5

4

3

2

Date: Sheet of

VIN

+1.05V_S5

+1.05V

+

PC55 330u/2.5V_6X4.2

1.05 Volt +/- 5% TDC : 5.7A PEAK : 7.2A OCP : 9A Width : 240mil

+1.05V_S5

4

MAIND

3

TDC : 2.4A PEAK : 3.2A Width : 100mil

Quanta Computer Inc.

PROJECT :

+1.05V_S5 (TPS51211)

ZQ0

1

52

5

TDC : 0.75A PEAK : 1A

+DDR_VTT_RUN

Width : 40mil

4

3

2

www.laptopblue.vn

1

37

PC57

D D

TDC : 0.38A PEAK : 0.5A

DDR_VTTREF

10u/6.3V_6

Width : 20mil

PC59

0.22u/10V_4

+3V

21

20

PGOOD

17

S3

16

S5

19

MODE

18

TRIP

26

PAD

51216_REF

PR84 10K/F_4

22

PAD

REFIN

REF

8

6

51216_REFIN

PR76

100K/F_4

C C

HWPG_VDDR[30]

MAINON[30,36]

SUSON[30,32]

PR77

*0_4 PR78

*Short_4 PR80

200K/F_4 PR81

26.1K/F_4

51216_S3

51216_S5

51216_MODE

51216_TRIP

VREF=1.8V

PC68

B B

51216_S551216_S3

PR85 *0_4

0.1u/10V_4

PC58 10u/6.3V_6

4

5

VTTREF

VTTGND

PU5

TPS51216RUKR

VDDQSNS

9

25

Close to IC

Greater than or equal 40mil

+5VPCU

20140304 C1-Stage Remove Jumper

PC60

12

14

15

13

11

10

PR83 *Short_6

10u/6.3V_6

51216_DRVH

51216_VBST

51216_SW

51216_DRVL

PR79 2/F_6

2

3

1

VTT

VTTSNS

PAD24PAD

VLDOIN

V5IN

DRVH

VBST

SW

DRVL

PGND

GND

PAD

7

23

PC61 1u/10V_4

PC64

0.1u/50V_6

PQ52

FDMS3660S

VIN

+1.35V_SUS

1.35 Volt +/- 5%

2

D1D1D1

PC62 2200p/50V_4

PC63

4.7u/25V_8

20140304 C1-Stage Remove Jumper

G1

1

S1/D2

8

9

51216_SW

G2

S2S2S2

567

PL11

2.2uH_7X7X3

11/4 Change to 2.2uH

PR82

4.7_6

PC67 680p/50V_6

PC65

0.1u/50V_6

+

PC66 330u/2.5V_6X4.2

TDC : 5.6A PEAK : 7.5A OCP : 10A Width : 240mil

+1.35V_SUS

+1.35V_SUS [4,5,14,15,27]

RDSon=2.2mohm

Close to output cap

PR86

30.1K/F_4

DDR_VTTT_PG_CTRL[4]

OCP=10A L ripple current

A A

=(19-1.35)*1.35/(2.2u*400k*19) =1.425A Vtrip=10-(1.425/2)*2.2mohm =20.432mV Rlimit=20.432mV/10uA*8=16.35Kohm

PR216 *Short_4

5

51216_S3

PC69

0.01u/25V_4

DDR=1.35V PR84=10K/F_4 PR86=30.1K/F_4

4

Mode Frequency Discharge mode

200K 400K Tracking Discharge

100K 300K Tracking Discharge

S3 S5

S0

S3 (mainon off)

S4/S5

1 0

1 1

3

ON ON ON OFF

VTTREF+1.35VSUS

ON ON

OFF

OFF OFF0 0

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDR 1.35V(TPS51216)

Date: Sheet of

2

Date: Sheet of

PROJECT :

1

ZQ0

2A

34 47Monday, April 07, 2014

5

4

3

2

1

www.laptopblue.vn

20140113 PU6\PU12

1C-2

IMON offset

VIN

PR87

D D

C C

B B

2M/F_4

PR96

51624_OCP-I

*2M/F_4

PR97

150K/F_4

PC88

0.1u/10V_4

H_PROCHOT#[ 4,30,31]

VR_SVID_CLK[5] VR_SVID_ALERT#[ 5] VR_SVID_DATA[5]

IMVP_PWRGD[ 5,10]

VRON_CPU[5]

VRON[30]

20131014 add

VCC_SENSE[5] VSS_SENSE[12]

VR_SVID_CLK VR_SVID_ALERT# VR_SVID_DATA

PR122 *Short_4

PR124 *0_4 PR29 *Short_4

Parallel

51624_VRON

PR98 100K/F_4

+1.05V

PR111

PR110

130/F_4

20140304 Short Pad

PR112

*75/F_4

+3V

PR119

PR118

PR120

*100K/F_4

+VCCIN

PR130 *10_4

PR134 *10_4

Close to the CPU side.

BW-U 15W (1 phase)

Icc TDC PL2󶁪14A Icc Max󶁪32A OCP󶁪37A Fsw󶁪1.2MHz

VCORE L/L󶁪󶁪󶁪󶁪

A A

R_DC_LL󶁪- 2.0mV/A R_AC_LL󶁪- 7.0mV/A

+3V_S5 51624_VREF +5V_S5

PR88

1_6

PC154

1u/6.3V_4

PR89

PR90

PR91

665K/F_4

36.5K/F_4

20K/F_4

PR100

PR101

100K/F_4

PR99

PC77

0.33u/10V_4

Close to VR

51624_O-USR

51624_F-IMAX

51624_VREF

56_4

PR113

PR115 *Short_4 PR116 *Short_4 PR117 *Short_4

+3V+3V

*100K/F_4

PC91 *330p/50V_4

PC94 *0.01u/50V_4

*56_4

51624_CLK 51624_ALERT# 51624_DATA

51624_SKIP# 51624_VRON 51624_VFB 51624_GFB

51624_VREF

PR213 *Short_4

PR125 *Short_4

PR212 4.99K/F_4

51624_VDD

9

10

2

27

VDD

VREF

O-USR

30

VR_HOT

31

VCLK

32

ALERT

1

VDIO

3

PGOOD

7

SKIP

8

VR_ON

24

VFB

23

GFB

51624_COMP

PC90

PR128

*100p/50V_4

PR132

4.75K/F_4

F-IMAX

TPS51624RSM

OCP-I12IMON

DROOP25COMP

13

26

51624_DROOP

51624_IMON

51624_OCP-I

10K/F_4

PC93

1500p/50V_4

BW-U 28W (1 phase)

Icc TDC PL2󶁪19A Icc Max󶁪40A OCP󶁪47A Fsw󶁪800KHz

VCORE L/L󶁪󶁪󶁪󶁪

R_DC_LL󶁪- 2.0mV/A R_AC_LL󶁪- 7.0mV/A

Place NTC close to the VCORE Hot-Spot.

PR92

*90.9K/F_4

*39.2K/F_4

39K/F_4

PR102

150K/F_4

51624_B-RAMP

51624_SLEWA

28

11

14

15

V5A

SLEWA

THERM

B-RAMP

PU7

PAD

GND29PAD34PAD35PAD36PAD37PAD38PAD39PAD40PAD41PAD

33

PR129

374K/F_4

PC92

4700p/25V_4

PR133

39K/F_4

51624_THERM 51624_V5A 51624_VBAT

16

VBAT

PWM1 PWM2 MODE

CSP1 CSN1 CSN2 CSP2

NC

N/C

42

PR93

100K/F_4_4250NTC

1n/50V_4

PC78

PR103

9.09K/F_4

6

51624_PWM1

5

51624_PWM2

4

51624_MODE

17

51624_CSP1

18

51624_CSN1

19

51624_CSN2

20

51624_CSP2

21 22

PR123 0_8

For BW 1 Phase

51624_CSP2

51624_PWM2

51624_CSN2

20/F_6

PR94

PR95

10K/F_4

PC79

2.2u/10V_6

PR121 150K/F_4

+3V_S5

PR131 0_4

PR136

PR135

*0_4

0_4

change footprint for SMT request.

PR105

2.2/F_6

Rmode

100K Ohm

150K OhmONON

PR214 *2.2/F_6

+5V_S5

51624_SKIP# 51624_PWM1

CS_BSTR1

+5V_S5

51624_SKIP# 51624_PWM2

CS_BSTR2

PC70 1u/10V_4

2

1

SKIP#

8

PWM

6

BOOT_R

7

CS_BST1

BOOT

PU6

PC84

CSD97374CQ4M

0.22u/25V_6

Add 11 GND VIAs for thermal pad

51624_CSP1

51624_CSN1

PS3 OSR

ON

OFF

PC163 *1u/10V_4

2

1

SKIP#

8

PWM

6

BOOT_R

7

CS_BST2

BOOT

PC158

PU12

*CSD97374CQ4M

*0.22u/25V_6

Add 11 GND VIAs for thermal pad

51624_CSP2

51624_CSN2

5

VDD

VIN

4 3 9

Close to the VR side.

CS_SW1

VSW

PGND

PAD

PC86 *0.1u/25V_4

PC89 *0.1u/25V_4

For BW 1 Phase

VIN

5

VDD

VIN

4 3 9

Close to the VR side.

CS_SW2

VSW

PGND

PAD

PC155 *0.1u/25V_4

PC157 *0.1u/25V_4

PC71

0.1u/50V_6

PR108

PC87

0.12u/10V_4

PR114

Close with phase1 inductor

PC161

0.1u/50V_6

PR126

PC156

*0.15u/10V_4

PR215

Close with phase1 inductor

20140304 C1-Stage Remove Jumper

PC72

PC73

2200p/50V_4

4.7u/25V_8

PL6

0.15uH_7X7X4

1 2

3

4

PR104

2.2_6

PC85

1000p/50V_6

PR106 2.26K/F_4

PR107 *Short_4

2.94K/F_4

PR109

16.9K/F_4

10K/F_4_3435KNTC

PC160

PC162

*2200p/50V_4

*4.7u/25V_8

PL10

*0.15uH_7X7X4

1 2

3

4

PR31

*2.2_6

PC138

*1000p/50V_6

PR32 *1.82K/F_4

PR127 *0_4

*2.67K/F_4

PR27

*22.6K/F_4

*10K/F_4_3435KNTC

PC74

4.7u/25V_8

DCR= 0.66mOhm

PC82

PC80

22u/6.3V_8

0.1u/10V_4

PC159

*4.7u/25V_8

DCR= 0.66mOhm

PC139

PC141

*22u/6.3V_8

*0.1u/10V_4

12

+

PC75

33U/25V_6x4.5

+

PC81

PC83

22u/6.3V_8

*330u/2V_7343

PC140

*22u/6.3V_8

38

VIN

+VCCIN

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014 35 47

Date: Sheet of

Tuesday, April 08, 2014 35 47

Date: Sheet of

5

4

3

2

Tuesday, April 08, 2014 35 47

PROJECT :

+VCCIN(TPS51624)

ZQ0

1

2A

1

20140304 C1-Stage Remove Jumper

+3VPCU

+3V

PR137

MAINON

PR139 *Short_4

100K/F_4

1000p/50V_4

PC101

*100p/50V_4

A A

HWPG_1.5V[30]

PC102

PC95

10u/6.3V_6

8.06K/F_4

PC103

1500p/50V_4

PR141

PC96

0.1u/25V_6

2

3

4

www.laptopblue.vn

PC99

10u/6.3V_6

+1.5V

20140304 C1-Stage Remove Jumper

PC100 10u/6.3V_6

PR142 121K/F_4

PU8 TPS54318RTER

16

VIN

1

VIN

2

VIN

14

PWRGD

15

EN

7

COMP

8

RT/CLK

9

SS

PC104

0.01u/25V_4

+1.5V

1.5Volt +/- 5% TDC : 0.6A

R1

R2

PEAK : 0.8A Width : 40mil

PR140 100K/F_4

PR143 113K/F_4

PC98

0.1u/10V_4

10

PH

11

PH

12

PH

13

PR138 *Short_6

BOOT

6

VSNS

3

GND

4

GND

5

AGND

PAD17PAD18PAD19PAD20PAD21PAD

22

PC97

0.1u/50V_6

1.5V_VSNS

VFB=0.8V

PL7

1uH_7X7X3

5

39

V0=0.8*(R1+R2)/R2

B B

VIN

Thermal protection

PD7

3 2

5 6

84

+

-

+

-

DA2J10100L

PR144 1M_6

1 3

1

PU9A AS393MTR-E1

7

PU9B AS393MTR-E1

2

PC106

0.1u/50V_6

VIN

PR145

1

PQ27 AO3409

2

PR152 *100K/F_6

PQ30 DTC144EU

1 3

3

PR151 *Short_6

SYS_SHDN# [10,32]

PR155 200K_6

PC107

0.1u/50V_6

2

3

2

PQ34 2N7002K

1

MAINON[30,34]

3

1M_4

MAINON_ON_G

PR150 1M_4

PR146 22_8

3

2

PQ31 2N7002K

1

3

2

1

PR147 22_8

PQ32 2N7002K

+1.05V

PR148 22_8

3

2

2N7002K

1

4

+15V+5V+3V

PR149 1M_4

MAIND

3

2

PQ33 2N7002K

1

Size Document Number Rev

Date: Sheet of

+1.5V/Thermal Protect

MAIND [32,33]

PC105 *2200p/50V_4PQ28

Quanta Computer Inc.

PROJECT :

ZQ0

36 47Tuesday, April 08, 2014

5

36 47Tuesday, April 08, 2014

2A

Need fine tune for thermal protect point

Note placement position TEMP=85C

2

PR153

1.58K/F_4

VLVL

S5_ON

DTC144EU

PR154 200K/F_4

2.469V

PR157 200K/F_4

PQ29

S5_ON[30,32,33]

C C

11/4 Change to 1.47K/F

PR156

10K/F_4_3435NTC

3

2

S5_ON

D D

PQ35 2N7002K

1

LM393_PIN2

For EC control thermal protection (output 3.3V)

1

5

4

3

2

1

www.laptopblue.vn

+5V_S5

40

PR158 *EV@SHORT_6

D D

3V_MAIN_PWGD

PR162 EV@100K/F_4

VGPU_EN[8]

3V_MAIN_PWGD[18,38]

DGPU_PSI[19]

PWM-VID[19]

C C

DGPU_PSI

+3V_S5

PR173 EV@10K_4

PR176 *EV@0_4

+3VPCU

PR189 *EV@10K_4

1658R-VREF

VIN

PR184 *EV@0_4

3V_MAIN_PWGD

DGPU_PSI

PWM-VID

Phase Number of Operation

B B

Standby Function

20131018 no need standby function

PC136

*EV@1U/10V_4

11/4 Change to 6.81K/F 11/4 Change to 12.4K/F

PR165

*EV@499K/F_4

R2

R3

R4

R5

+VGPU_CORE

PR159 EV@12.4K/F_4

1658R-OCS/CB

1658R-EN

1658R-PSI

1658R-VID

1658R-VREF

1658R-REFADJ

1658R-REFIN

R1

PR172

EV@20K/F_4

PC122

EV@2700P/50V_4

2

12

PR161 EV@6.81K/F_4

PC113 *EV@0.01U/25V_4

1 2

PR163 *EV@1/F_4

PR164 *EV@Short_4

PR166 *EV@Short_4

PR167 *EV@Short_4

1 2

PC119 EV@1U/10V_4

EV@20K/F_4

12

EV@2K/F_4

EV@18.2K/F_4

PR179 *EV@5.1K/F_4

3

PQ40 *EV@2N7002K

1

PR170

PR174

PR178

PR182

EV@0_4

PU10

9

3

4

5

8

6

7

PC121

*E@0.01U/25V_4

12

PC130

*EV@22P/50V_4

1658R-PVCC

18

OCS/CB

PVCC

EN

PSI

EV@UP1658RQKF

VID

VREF

REFADJ

REFIN

FB

11

1658R-FB

PR180

*EV@Short_4

12

PC112 EV@1U/10V_4

1

1658R-BOOT1

BOOT1

2

BOOT2

COMP

FBRTN

20 19

15 14 16 17

13 12 10

1658R-FBRTN

1658R-UGATE1 1658R-PHASE1 1658R-LGATE1

1658R-BOOT2 1658R-UGATE2 1658R-PHASE2 1658R-LGATE2

1658R-PG 1658R-COMP

PR177

PR181

*EV@Short_4

12

PC123

EV@16K/F_6

PR169 EV@10K_4

1 2

PR171 *EV@Short_4

12

EV@4700P/25V_4

PC124

EV@22P/50V_4

+3V

GPU_PWR_GD [17]

UGATE1

PHASE1 LGATE1

UGATE2

PHASE2

LGATE2

PGOOD

GND

21

1658R-BOOT1

EV@0.22u/25V_6

1658R-UGATE1

1658R-PHASE1

1658R-LGATE1

1658R-BOOT2

1658R-UGATE2

1658R-PHASE2

1658R-LGATE2

EV@2.2/F_6

PC114

PR175

EV@2.2/F_6

PC125

EV@0.22u/25V_6

4

PQ37 EV@AON6752

4

PQ39 EV@AON6752

5

213

5

213

5

213

PQ38 EV@AON6414AL

5

213

PC115

PQ36 EV@AON6414AL

PR168 EV@2.2/F_6

PC120 EV@1000p/50V_6

VIN

PC126

PR183 EV@2.2/F_6

PC135 EV@1000p/50V_6

EV@2200p/50V_4

EV@0.24uH_7X7X3

EV@2200p/50V_4

EV@0.24uH_7X7X3

PC108

EV@0.1u/50V_6

PL8

PC127

EV@0.1u/50V_6

PL9

PR160

20140304 C1-Stage Remove Jumper

PC109

PC110

EV@4.7u/25V_8

DCR=1.1m ohm

+

PC118

PC117

PC116

EV@10u/6.3V_8

EV@0.1u/10V_4

PC128

EV@4.7u/25V_8PC131

EV@330u/2V_7343

PC129

EV@4.7u/25V_8

DCR=1.1m ohm

+

PC133

PC132

EV@10u/6.3V_8

EV@0.1u/10V_4

PC134

EV@330u/2V_7343

EV@330u/2.5V_6X4.2

12

+

PC111

EV@33U/25V_6x4.5

+VGPU_CORE

VIN

PR185 *EV@0_4

VGA_VCCSENSE[16]

VGA_VSSSENSE[16]

A A

5

Parallel

PR186 *EV@Short_4 PR187 *EV@Short_4

PR188 *EV@0_4

4

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014 37 47

Date: Sheet of

Monday, April 07, 2014 37 47

Date: Sheet of

3

2

Monday, April 07, 2014 37 47

N15S-GT

+VGPU_CORE Countinue current:26A Peak current:60A OCP:75A FSW:300KHz L/L=0mV/A

Quanta Computer Inc.

PROJECT :

+VGPU_CORE(UP1642PQAG)

ZQ0

1

2A

5

4

3

2

1

www.laptopblue.vn

+1.05V_GFX[16,17,18] +1.35V_GFX[17,20,27] +3V_GFX[16,17,18,19,30]

D D

VIN

PR197 EV@1M_4

PR201 EV@1M_4

3V_MAIN_PWGD[18,37]

PR200 *EV@Short_4

PC146

*EV@1u/10V_4

12

PR202 EV@100K_4

2

PQ45

1 3

EV@PDTC143TT

PR198 EV@22_8

3

2

PQ44 EV@2N7002K

1

+15V+1.05V_GFX

PR199 EV@1M_4

dGPU_D1

3

2

PQ46 EV@2N7002K

1

+1.05V_S5

4

PC145 *EV@2.2n/50V_4

3

52

1

PQ43

EV@MDV1528Q

+1.05V_GFX

+1.05V_GFX TDC : 1.73A PEAK : 2.3A Width : 80mil

41

VIN

C C

12

PR208 EV@100K_4

HWPG_1.5VGFX

1.5GFX_EN

1.5GFX_TRIP

1.5GFX_TST

2

PQ48

1 3

EV@PDTC143TT

1

PGOOD

3

EN

2

TRIP

5

TST

12

GND

PR196 EV@100K/F_4

PC144

*EV@1u/10V_4

PR206 *EV@Short_4

PC148

*EV@1u/10V_4

+3V

PR195 EV@78.7K/F_4 PR191 EV@464K/F_4

DGPU_PW R_EN[10]

B B

HWPG_1.5VGFX[17]

FBVDDQ_EN[17]

PR194 *EV@Short_4

11/4 Change to 78.7K/F

OCP=8A L ripple current =(19-1.5)*1.5/(2.2u*290k*19) =2.165A Vtrip=8-(2.165/2)*14mohm =96.84mV Rlimit=96.84mV/10uA*8=77.47Kohm

A A

PR203 EV@1M_4

PR207 EV@1M_4

7

V5IN

PU11

EV@TPS51211DSCR

GND13GND14GND15GND

16

DRVH

VBST

DRVL

GND

9 10 8

SW

6 11

FB

4

3

2

1

+5V_S5

1.5GFX_DRVH

1.5GFX_VBST

1.5GFX_SW

1.5GFX_DRVL

1.5GFX_FB

PR204 EV@22_8

PQ49 EV@2N7002K

PC143 EV@1u/10V_4

2

PR211

*EV@SHORT_6

+15V+3V_GFX

PR205 EV@1M_4

3

PQ50 EV@2N7002K

1

PC149

EV@0.1u/50V_6

PQ25

EV@MDV1595S

dGPU_D

4

3

4

3

VFB=0.704V

PC147 *EV@2.2n/50V_4

52

PQ26 EV@MDV1528

1

52

1

+3VPCU

3

2

1

PR192 *EV@4.7_6

PC142 *EV@680p/50V_6

PQ47 EV@AO3404

PC137 EV@2200p/50V_6

PL5

EV@2.2uH_7X7X3

+3V_GFX

PC76 EV@4.7u/25V_8

2014/03/01 change PR193 to 9.3K for +1.35V.1C1-1

PR193 EV@9.31K/F_4

PR190 EV@10K/F_4

+3V_GFX TDC : 0.17A PEAK : 0.23A Width : 20mil

VIN

+

PC153 EV@0.1u/50V_6

PC150 EV@330u/2V_7343

+1.35V_GFX

1.35 Volt +/- 5% TDC : 3.3A PEAK : 4.3A OCP : 8A Width : 160mil

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014 38 47

Date: Sheet of

Tuesday, April 08, 2014 38 47

Date: Sheet of

5

4

3

2

Tuesday, April 08, 2014 38 47

PROJECT :

+1.35V_GFX/+1.05V_GFX/+3V_GFX

1

ZQ0

2A

1

2

3

4

5

6

7

8

www.laptopblue.vn

VGA power up sequence

42

+3VPCU

A A

PCH +3V_GFX

dGPU_PWR_EN

MOSFET

VGA_VID

VIN

VGPU_EN

PWM

VGPU_PWRGD

EC_FB_CLAMP

+VGPU_CORE

VIN

OR Gate

FBVDDQ_EN

PWM

+1.35V_GFX

HWPG_1.5VGFX VGPU_PWRGD

+1.05V_S5

1.05V_GFX_EN

MOSFET +1.05V_GFX

DGPU_PWROK

EC

B B

VGA Reset

PCH

PLTRST#

DGPU_HOLD_RST#

PEX_RST timing

I/O 3.3V

PEX_RST

C C

D D

Trise >= 1uS Tfail <=500nS

PEGX_RST#

Power States

POWER PLANE

VIN +3V_RTC +3VPCU +5VPCU +15V

+5V_S5 +5V

+1.35VSUS +DDR_VTT_RUN LCDVCC +1.5V +1.05V +VCCIN +VGPU_CORE S0VGPU_ENExternal GPU POWER +3V_GFX External GPU POWER dGPU_PWR_EN S0 +1.35V_GFX +1.05V_GFX

VOLTAGE

+10V~+19V +3V~+3.3V +3.3V +5V +15V +3.3V +5V +5V +3.3V +1.35V +0.675V +3.3V +1.5V +1.05V variation variation +3.3V +1.35V +1.05V

DESCRIPTION

RTC POWER EC POWER USB CHARGE POWER CHARGE PUMP POWER LAN/BT POWER USB POWER HDD/SPK/HDMI POWER PCH/GPU/Peripheral component POWER+3V CPU/SODIMM/MD POWER SODIMM/MD Termination POWER LCD POWER MINI CARD/NEW CARD POWER PCH CORE VCCST POWER MAINON CPU CORE POWER

External GPU POWER External GPU POWER

CONTROL SIGNAL

ALWAYSMAIN POWER ALWAYS ALWAYS ALWAYS

S5_ON+3V_S5 S5_ON MAINON MAINON SUSON MAINON LVDS_VDDEN MAINON

VRON

FBVDDQ_EN

1.05V_GFX_ENS0S0

ACTIVE IN

ALWAYS ALWAYS ALWAYS ALWAYS ALWAYSALWAYS S0-S5 S0-S5 S0 S0 S0-S3 S0 S0 S0 S0 S0

Thermal Follow Chart

CPU CORE PWR

GPU NTC Thermal Protection

GPU CORE PWR

H_PROCHOT#

dGPU_OPP#

GPU_THAL#

H/W Throttling

GPIO12_ACIN

CPU NTC Thermal Protection

HSW ULT

SM-Bus1

EC

dGPU_ALT#

dGPU_OTP#

dGPU

PM_THRMTRIP# SYS_SHDN#

SM-Bus1

FAN1_PWM

FAN2_PWM

WIRE-AND

GPIO12 HW throttle over power protect

CPU FAN

GPU FAN

3V/5 V SYS PWR

Quanta Computer Inc.

PROJECT :

dGPU_OPP# EC notify HW throttle over power protect dGPU_ALT# for ADPS circuit to infrom EC NV dGPU VPS Alert dGPU_OTP# VGA thrmtrip# => inform EC over temperature protect

1

2

3

4

5

6

Size Document Number Rev

PWR Status & GPU PWR CRL & THRM

Date: Sheet of

7

PROJECT :

ZQ0

39 47Monday, April 07, 2014

8

3A

5

Battery Mode

Support Deep Sx

MAINON

+5V

+3V

+1.05V

MAINON

9

8

21

22

21

?

17

21

11

10

12

21

8

18

19

23

24

28

27

25

24

12

2929

HWPG_VDDR

HWPG_1.05V

HWPG_1.5V

+5VPCU

3

+3VPCU

D D

3

S5 PWR

VIN

1

DDR VDDQ VR

S3

S5

C C

+3VPCU

3

1.5V VR

EN

+5V_S5

+3V_S5

S5_ON

+1.35V_SUS

DDR_VTTREF

+DDR_VTT_RUN

HWPG_VDDR

PG

DDR_PG_CTRL

MAINON

+0.75V_ON

SUSON

26

+1.5V

HWPG_1.5V

PG

RUN PWR

B B

A A

3

9

+5VPCU

+3VPCU

+1.05V_S5

PCH

MOS1 MOS2

MOS3

G

VIN

1

+1.05V_S5

VR

EN

S5_ON

MAINON

5

PG

+1.05V_S5

HWPG_1.05V

4

VIN

3V/5V

VR

EN2

1

VL

+15V

EN1

NBSWON#

www.laptopblue.vn

3 3

+3VPCU +5VPCU

3V_LDO

2

PWR BTN

7

30

HWPG

+0.75V_ON

EC_PWROK

32b30a

HWPG_1.05V_EC#

3

+3VPCU

3

2

depend on A measure

+3.3V_DSW

result to implement

EC

VRON

MAINON

for B test

5a

13 14 15

S5_ON

SUSON

8172131

DSW_ON

6

DPWROK RSMRST#

SB_ACDC DNBSWON# SUSC# SUSB#

PCH_SUSACK# PCH_SUSPWARN# PCH_SLP_SUS#

34

31

16 20

31

35 38

IMVP_PWRGD

EC_PWROK

4

2

+3.3V_DSW

EN

Delay DSW power well 10ms

EC_PWROK PCH_CLK PLTRST#

?

SVID

37

+1.05V

VIN

1

IMVP VR

0 ohm

EN

PG

+1.05V_VCCST

+VCCIN

IMVP_PWRGD

VRON_CPU

VRON

33

34

32a

32b

12

31

36

HWPG_1.05V_EC#

30a

HWPG+1ms

HWPG_1.05V

EC_PWROK

SYS_PWROK

VCCST_PWRGD_EN

CPU

4

3

2

5b

SYS_PWROK

36

10K ohm

1

CHARGER

DPWROK

RSMRST#

ACPRESENT PWRBTN# SLP_S4# SLP_S3# SUSACK SUSWRAN SLP_SUS#

APWROK PCH_PWROK

PLTRST#

SYS_PWROK

BAT-VVIN

Battery

DSW PWR

PCH

3

SUS PWR

ASW PWR

SPI PWR

HSIO PWR

PLL PWR

CORE PWR

SDIO PWR

HDA PWR

+3VPCU or +3.3V_DSW

43

+3VCC_S5

+1.05V

+3V_S5

+V1.05DX_MODPHY

+1.05V

+3V

+3V_S5

38

PLTRST#

CORE PWR

CPU

RESET#

PROCPWRGD

SVID

22

37

Size Document Number Rev

Date: Sheet of

VDDQ PWR

VCCST PWR

VR_ENVRON_CPU

SM_PG_CNTL1

DDR_PG_CTRL

VR_READY

VCCST_PWRGD

IMVP_PWRGD

VCCST_PWRGD_EN

32a

34

Quanta Computer Inc.

PROJECT :

Power Sequence

1

+VCCIN

+1.35V_SUS

+1.05V_VCCST

ZQ0

40 47Monday, April 07, 2014

3A

1

2

3

4

5

6

7

8

+3V_S5

www.laptopblue.vn

+3V

44

SDRAM

2.2K2.2K

AP2

A A

SMB_PCH_CLK

AH1

SMB_PCH_DAT

+3.3V_RUN

2N7002DW Level shift

CLK_SCLK CLK_SDATA

4.7K4.7K

Touch PAD

+WL_VDD

XDP

WLAN

Haswell ULT

+3V_S5

2N7002DW Level shift

WLAN_CLK_SCLK WLAN_CLK_SDATA

4.7K

+3V_S5

B B

AN1

SMB_ME0_CLK

AK1

SMB_ME0_DAT

2.2K2.2K

+3V_S5

AU3

SMB_ME1_CLK

AH3

SMB_ME1_DAT

*2.2K*2.2K

+3V_S5

*2N7002DW Level shift

3V3MISC

C C

SIO

2ND_MBDATA

116

2ND_MBCLK

115

10K10K

+3V_GFX

2N7002DW Level shift

+3VPCU

4.7K4.7K

dGPU

100

ITE8587

10K10K

D D

1

110

MBCLK

111 MBDATA

2

3

4

100

5

Battery

Charger

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

6

Date: Sheet of

7

PROJECT :

Block Diagram

ZQ0

3A

41 47Monday, April 07, 2014

8

3A

󱬯󱬯󱬯󱬯󳴣󳴣󳴣󳴣󴞱󴞱󴞱󴞱defult

5

󴖤󴖤󴖤󴖤󳴣󳴣󳴣󳴣󴞱󴞱󴞱󴞱reserve

SYS_HWPG

1

D D

PWR

3V_LDO

1

EN!

EN2

PWRGD3V_LDO

3V/5V

TPS51225

Vin

S5_Vout

S3_Vout

VIN

C C

HWPG_1.05V

PWRGD

S5_ON

MAINON

Vin

+1.05V_S5

TPS51211

EN

Vout

HWPG_1.5VGFX

10

VGPU_PWRGD

9

+1.05V_S5

VIN

2

EC

B B

4

EC

4

www.laptopblue.vn

+5VPCU

+3VPCU

dGPU_PWR_EN

PCH

MDV1528Q

MAIND

4

MDV1528Q

AND Gate

1.05V_GFX_EN

MDV1528Q

S5D

2

MDV1528Q

MAIND

4

AO3404

S5D

2

AO3404

MAIND

4

AO3404

+1.05V

+1.05V_GFX

3

+5V_S5

+5V

+3V_S5

+3V

+3V_GFX

EC

9

7

VIN

7

EC_FB_CLAMP

VGPU_PWRGD

VGPU_EN

VRON_CPU

VRON

2

VIN

PCH

Vin

VIN

OR Gate

PWRGD

CPU VCCIN

VGPU_EN

TPS51622 EN

Vin

FBVDDQ_EN

IMVP_PWRGD

Vout

PWRGD

VGPU Core

uP1642 EN

PWRGD

+1.35V_GFX

Vin

TPS51211

VGPU_PWRGD

Vout

HWPG_1.5VGFX

EN

+VCCIN

Vout

1

45

9

+VGPU_CORE

10

+1.35V_GFX

HWPG_VDDR

3

EC

DDR_VTTT_PG_CTRL

PCH

A A

EC

MAINON

4

+0.75V_ON

S5 EN

S3 EN

PWRGDSUSON

+1.35V_SUS

TPS51216

Vin

S5_Vout

S3_Vout

+1.35V_SUS DDR_VTTREF

+DDR_VTT_RUN

+3VPCU

Vin

MAINON

VIN

5

4

3

2

PWRGD

+1.5V

TPS54318

EN

HWPG_1.5V

Vout

+1.5V

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

ULT PWR CONTROL

ZRQ

42 47Monday, April 07, 2014

1

42 47Monday, April 07, 2014

3A

5

Version

Model

ZQ0

D D

C C

B B

A A

2013/10/15 change pin define and add pwm IC.(page31)1

1A-1

2 2013/10/15 Change VGA ITE solution to NXP.(page 23) 3 2013/10/15 power board CN change to 6pin.(Page 23) 4 2013/10/15 U5017.12 change 27M crystal to VGA IC.(Page 23)

2013/10/15 U5017 .14 add power rail +3V_RTC(page23)5 6 2013/10/15 strap0 R672 DG 50k PU.(Page 19) 7 2013/10/15 Change AND gat to Q63 D-MOS.(Page 19) 8 2013/10/15 change pin define and add pwm IC U17.(Page 46) 9 2013/10/15 for GC6 stuff R228\R1013\R226\R1012.un-stuff Q24 \Q26\R227\R1011. (Page19 ) 10 20131015 For GC6 NV DG GC6_FB_EN PD.(Page10) 11 2013/10/15 following up acer define and swap USB3 and USB2 port.(Page9) 12 2013/10/15 swap CAP C8579/C8580 to Vrefo and resistor R5214/R5215 to Line in.(Page30) 13 2013/10/15 U27.30/U27.31 del fan Pwm signal.(Page32) 14 20131015 change LVDS\USB3\RJ45\FAN\TPD\USB DB CN\DC-IN CN\Power Button\Cardreader\KB BLK CN\Power board, footprint.

1 2013/10/16 JDIM5 Swap M_B_DQS2/M_B_DQ S3 and swap M_B_DQS#2/M_B_DQ S#3.(page15)

1A-2

2 2013/10/16 JDIM6 Chage net name M_B_DQS#[7:0] to M_A_DQS#[7:0].(page14) 3 2013/10/16 Add RTC charge circuit.(page8) 4 2013/10/16 BT1.1 Chage +3V_RTC_0 to VCCTC_2.(page8) 5 2013/10/15 change power rail from +3V_RTC_0 to VCCRTC_2.(page23)

1 2013/10/16 change R5285 from 330 to 100ohm for charge RTC battery.(page23)

1A-3

2 2013/10/16 2013/10/16 U58 add 0ohm R5322 /R5323 for SMBus reserve for FW burnning.(page 23) 3 2013/10/16 U58 pin24/25 add 33ohm for HSYNC/VSYNC.(page23) 4 2013/10/16 U58.37 add 10 ohm for test pin avide i2c impact.(page 23) 5 2013/10/16 U24 ball K4/G2 BIOS suggestion change SMI/SCI to GPIO0~15.(page 10) 6 2013/10/16 Add U34 flash 4M ROM reserve for ZQ0D.(page8) 7 2013/10/16 change SMbus VGA to PCH SML0CLK/SML0DATA.(page 8)

1 2013/10/17 Change EC pin define for 2014 GPIO table.(page32)

1A-4

2 2013/10/17 Change All short pad to resistor.(All) 3 2013/10/17 Change U17 to G991P11U and PU U17 pin1.(page31) 4 2013/10/17 Remove Q25\R231\R232 because not support GPIO9 for ADPS circuit to infrom EC NV dGPU VPS Alert.(page19) 5 2013/10/17 remove Q5020 no IOAC support.(page26) 6 2013/10/17 remove R5224\R5225\R5226 no IOAC support.(page26) 7 2013/10/17 remove WLAN_OFF no IOAC support.(page26) 8 2013/10/17 Del U22 becuse no support IOAC.(page32)

1 2013/10/18 Change CN21 Pin8 for I2C/PS2 TPD idendify.(Page31)

1A-5

2 2013/10/18 Change VGA NXP soltion to ITE.(page23) 3 2013/10/18 design change R5293 from 22ohm to 33ohm.(page23) 4 2013/10/18 Change Touch screen power rail from 5V to 3V.(page24) 5 2013/10/18 add 0ohm short TP interrap pin.(page24) 6 2013/10/18 change U27.87 for Touch pad ID for I2C/PS2 solution switch.(page 32)

1 2013/10/18 Change Q63 to MOS.(page19). 2 2013/10/21 reversal PEG lan for layout.(page9).

1A-6

3 2013/10/21 Del APWORK.(page5) 4 2013/10/19 Swap DDR so-ddim pin for layout request.(page14,15)

1 2013/10/22 change CN24 pin define based on spec.(page31) 2 2013/10/22 change CN25 pin define for spec.(page31)

1A-7

3 2013/10/22 Change CN4 to 6pin.(page23) 4 2013/10/22 change Y5004 to +/-10PPM(page23) 5 2013/10/21 add R5331 between 3V_GFX and 3V_MIN for not GC6 support.(page20) 6 2013/10/22 change PJ1 Pin define same as ZQN.(page33) 7 2013/10/22 Change LGND to GND.(page28) 8 2013/10/22 CN5006 pin9/10 add R5332/r5333 for ESD protect.(page28) 9 2013/10/22 Change CN5009\CN5013\Y7 footprint.

1 2013/10/22 change CN24 pin define based on spec based on ZRQ.(page31)

1A-8

2 2013/10/23 change CN25 footprint.(page31) 3 2013/10/23 Change DIMM1_SA0/SA1 to DIMM0_SA0/SA1.(page14) 4 20131022 Change GPIO83/84 GPU GC6 pin to GPIO2/3.(page10) 5 2013/10/21 Swap PEG to nomroal mode.(page9) 6 2013/10/23 remove R5017 5V is duplicater.(page27). 7 2013/10/23 remove C5056 is duplicater.(page27) 8 2013/10/23 change CN5008\CN25 footprint to match DXF. 9 2013/10/23 add scrow Hole footprint.

1 2013/10/17 Change power LED from +3VPCU to +3V_S5.(page27)

1A-9

2 2013/10/24 add 100kohm on U5011 pin 26 with C5164 for discharge(page30) 3 2013/10/23 add 10k for vendor suggestion.(page28) 4 2013/10/23 add R5335 Isolate SLB9660 NC.(page23). 5 2013/10/24 Add alert on U17.1 for CPU themal tempture.(page31).

1 2013/10/25 remove 1.35GFX_PDG NET.(page20)

1A-10

2 2013/10/25 remove 1.35GFX_PDG (page20) 3 2013/10/25 remove 1.35GFX POWER(page20) 4 2013/10/25 reserve AV2 ball to GND.(page6) 5 20131025 reserve A5 ball to 100k PU 3VPCU.(page6) 6 2013/10/25 modify PJ2 footprint.(page33) 7 2013/10/25 change LED from 3pin to 4pin for acer reqeust,(page27)

1 2013/10/28 Change U5013.7 from +3V_S5 to +3V.(page23)

1A-11

2 2013/10/28 change LED from 4pin to 3pin and power LED to +3VPCU.(page27) 3 2013/10/28 U5013 Pin8,15,28 left NC.(page23)

1 2013/10/29 Change CN21 power rail to S5,change Q42 direction and net name reseve PS2 PU to +3V.(page31)

1A-12

2 20131029 Change GPIO45 to PU S5,duble GPIO58 one is GPIO56.(page10). 3 2013/10/28 reserve AV2 ball to TP.(page8) 4 20131028 reserve A5 ball toTP.(page6) 5 2013/10/29 Change CN5008 to S0 of SMbus(page26) 6 2013/10/29 Swap U27 pin2 and pin128,add U27.68 for touch pad interrupt.(page32) 1 20131030 add touch pad interrupt pin on gpio83.(page10)

1A-13

2 2013/10/30 move Q42 to page02 change U24.U7 net name.(page2). 3 2013/10/30 CN5002.6 add USB touch screen on/off pin to EC.(page24) 4 2013/10/29 add U27.35 for touch pad on/off.(page32)

4

CHANGE LIST

3

2

1

www.laptopblue.vn

PROJECT MODEL

DOC NO.

: PART NUMBER: DRAWING BY: REVISON:

5

ZQ0 APPROVED BY:

4

DATE:

Quanta Computer Inc.

PROJECT :

ZQ0

PROJECT :

ZQ0

PROJECT :

Change li st-1

ZQ0

3A

43 47Monday, April 07, 2014

1

Size Doc ument Number Rev

Date: Sheet of

3

2

Date: Sheet of

5

Version

Model

ZQ0

D D

C C

1B-2

1 2013/12/04 change PQ24 to DFN 3x3 size.(page35) 2 2013/12/04 Change Cn14 PN and footprint.(page30). 3 2013/12/04 change LED from 3pin to 4pin..(page27) 4 2013/12/4 change cN6 to 4pin.(page23) 5 2013/12/04 change GPIO36/GPI037 to PU..(page9)

1 2013/12/10 change Cn20 Pin define.(page25)

1B-3

2 2013/12/10 change Q3.3 from +3V to +3VPCU.(page22). 3 2013/12/10 change CN6 footprint..(page21)

1 2013/12/12 Remove U9 Green CLK circuit.(page21)

1B-4

2013/12/17 Change CN14 pin define.(page28)1

1B-5

2013/12/17 Change R8051 to 0402 s ize.(page16)2

1 2013/12/18 Change USB port USB3.0 to port0,USB2.0 to port1 and port3,Fingerprint to usb port2.

1B-6

2013/12/17 Change R8051 to 0402 s ize.(page16)2

3 2013/12/18 U34 pin6 reserve 0402 resis tor for power noise issue.(page28)

1 2013/12/20 add U29 VSYNC and HSYNC by pass resistor.(page22)

1B-7

2 20131220 Change +3VPCU to +3V_S5 non deep sx(page10). 3 2013/12/20 del c8521 and R8391..(page16)

1 2014/1/06 add 0ohm pass 1.05V_Modphy to 1.05V.(page33)

1C-1

2 2014/1/06 add PR2 24 PU to 3V.(page33). 3 2014/1/06 Change R351\R3 88 from 47ohm to 65ohm base on FAE request..(page28) 4 2014/01/10 Remove U29 and add U40 and U41..(page22)

1 2014/01/13 Change TP power rail from +3V_S5 to +3V_SUS.(page29)

1C-2

2 20140113 PU6\PU12 change footprint for SMT request.(page35). 3 2014/01/13 change CN14 sata net name and add C678~C681.(page25) 4 2014/01/13 add R678\R677 PU and R679 PD for ICT..(page19) 5 2014/01/13 1/13 Adding +3V_SUS power for touch pad (acer request).(page32)

1 2014/01/14 change R654 to 0ohm.(page27)

1C-3

2 2014/01/14 Change Cn11 Footprint.(page24).

1 2014/01/15 reserve TP power rail +3V_S5..(page29)

1C-4

2 2014/01/15 TPM CO-lay nuvoton(page21). 3 2014/01/15 SWAP PCIE LAN TX single.(page26).

1 2014/03/01 change PR193 to 9.3K for +1.35V.(page38)

1C1-1

2 2014/02/17 Add U11.98 GPIO5 for PTP power en function.(page30). 3 2014/02/17 Add Q47 for PTP power EN and soft start R694\C713 and C712\C686.(page29) 4 2014/02/06 change Blue LED power rail to +5VPCU and add ESD and Change LED to lite-on and R379=820,R375=680 base on test result.(page25) 5 2014/02/6 add VGA_ALERT# PU 10 K for FAE request.(page19) 6 2014/02/19 add R692 for SUSPWRACK# to EC.(page07) 7 2014/03/01 Change 0ohm to short pad. 8 2014/03/01 link L29 to +3V directly(meet IVDDO vs OVDD sequence)(page 21)

1 2014/03/08 add R696\R697 PU..(page30)

1C1-2

2 2014/03/08 ChangeU12 footprint to sot23 and add VC2\VC1 change C307 to 3528.(page27). 3 2014/03/08 Remove PCIE wake and stuff R642, un-stuff Q44..(page24) 4 2014/03/11 Add R698 for TS_EN short TP_INT,for issue debug.(page22)

4

CHANGE LIST

3

2

1

www.laptopblue.vn

B B

A A

PROJECT MODEL

DOC NO.

: PART NUMBER: DRAWING BY: REVISON:

5

ZRQ APPROVED BY:

4

DATE:

3

2

Quanta Computer Inc.

PROJECT :

ZQ0

PROJECT :

ZQ0

PROJECT :

Change li st-2

ZQ0

44 44Monday, April 07, 2014

1

Size Doc ument Number Rev

Date: Sheet of

3A

Acer e5-471G Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual