Acer e5-471G Schematic

5

ZQ0_GDDR3 BWD ULT SYSTEM BLOCK DIAGRAM

DDR3L-SODIMM CHA

D D

DDR3L-SODIMM CHB

SATA - HDD

SATA ODD

Cardreader CONN. 2in 1

P27

GL843L (cardreader)

CCD(Camera)

C C

Touch Screen

Blue Tooth

Fingerprint(Option)

I/O board

I/O Board Conn.USB2 IO*2

P14

P15

P27

P22

P24

P21

P27

4

3

2

www.laptopblue.vn

Dual Channel DDR III 1066/1333/1600 MHZ

SATA0

SATA1

USB2-7

USB2-6

USB2-5

USB2-4

USB2-2

USB2-2,3

P8

BATTERY

Azalia

BRODWELL ULT 15W

MCP 1168pins

IMC

DC+GT3

40 mm X 24 mm

SATA

Integrated PCH

USB3.0/2.0

USB2.0

RTC IHDA

P2~P13

LPC

PCI-E x4 TX/RX

CLK

eDP

CLK

PCI-E x1

CLK

SPI

GPU

PCIE-5

EDP

DDI2

DP

DDI1

USB3-1

USB2-0

X'TAL

32.768KHz

X'TAL 24MHz

SPI ROM 8M+4M

N15S-GT N15V-GM N15V-GL

P8

P16~P19

ITE6513

P21

X'TAL 27MHz

PCIE-4

PCIE-3

VRAM

DDR3

eDP Conn.

VGA Conn.

HDMI Conn.

USB3 Port MB side

RTL8111

MINI CARD WLAN+BT

10/100/1G

P22

P23

P20

P27

P24

P26

X'TAL 25MHz

1

BOM

IV@ : iGPU EV@ : Optimus EVG@ : GC6 KBL@ : Keyboard backlight TPM@ : TPM 8M@ :8M FLASH ROM 4M@ :4M FLASH ROM GS@ :G-SENSOR TDI@ :TOUCH PAD I2C TSU@ :TOUCH SCREEN USB TSI@ :TOUCH SCREEN I2C

RJ45

P26

01

P29

EC

IT8587

Touch PAD

P29

TPM(option)

P32

Fan Driver

(Fan signal)

P29

3

P21

2

BQ24737RGRR

Batery Charger

TPS51225RUKR

+3V/+5V

TPS51624RSM

+VCCIN

TPS51211DSCR

+1.05V_S5/+1.05V

TPS51216RUKR

+1.35V_SUS

P31

TPS54318RTER

+1.5V

P32

UP1658RQKF

+VGPU_CORE

P33

PS51211DSCR

+1.5V_GFX/1.05V_GFX/3V_GFX

P34

Size Document Number Rev

Date: Sheet of

Thermal Protection

P35

Discharger

P36

P37

P38

Quanta Computer Inc.

PROJECT :

Block Diagram

1

ZQ0

1 46Monday, April 07, 2014

P36

3A

B B

D-MIC

Int. D-MIC

P28

Universal HP

A A

5

ALC283

AUDIO CODEC

P28 P28

P28

Speaker*2

K/B Con.

BACKLIGHT (OPTION)

4

P29

Power board

HALL SENSOR (Option)

5

4

3

2

1

www.laptopblue.vn

Haswell ULT (DISPLAY,eDP)

U25A

HSW_ULT_DDR3L

02

D D

HDMI

CRT

ITE FAE suggest CAP should be at PCH side.

C C

B B

INT_HDMITX0N[23] INT_HDMITX0P[23] INT_HDMITX1N[23] INT_HDMITX1P[23] INT_HDMITX2N[23] INT_HDMITX2P[23]

INT_HDMICLK-[23] INT_HDMICLK+[23]

CRT_TXN0[21] CRT_TXP0[21] CRT_TXN1[21] CRT_TXP1[21]

PCH_BRIGHT[22]

PCH_BLON[22]

EDP_VDD_EN[22]

TP110

BOARD_ID4[10] BOARD_ID1[10] BOARD_ID2[10]

PCH_BRIGHT PCH_BLON PCH_VDDEN

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PME#

TPD_INT#_D DGPU_SELECT# BOARD_ID4 BOARD_ID1 BOARD_ID2

C54 C55

B58

C58

B55 A55 A57 B57

C51 C50 C53

B54

C49

B50 A53 B53

AD4

B8 A9 C6

U6 P4 N4 N2

U7 L1 L3 R5 L4

DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3

DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3

U25I

EDP_BKLCTL EDP_BKLEN EDP_VDDEN

PIRQA/GPIO77 PIRQB/GPIO78 PIRQC/GPIO79 PIRQD/GPIO80 PME

+3V

GPIO55

+3V

GPIO52

+3V

GPIO54

+3V

GPIO51

+3V

GPIO53

eDP SIDEBAND

+3V +3V +3V +3V +3V_S5

PCIE

1 OF 19

HSW_ULT_DDR3L

9 OF 19

EDPDDI

DISPLAY

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3

EDP_AUXN

EDP_AUXP

EDP_RCOMP

EDP_DISP_UTIL

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN DDPC_AUXN

DDPB_AUXP

DDPC_AUXP

DDPB_HPD DDPC_HPD

EDP_HPD

C45 B46 A47 B47

C47 C46 A49 B49

A45 B45

D20 A43

B9 C9 D9 D11

C5 B6 B5 A6

C8 A8 D6

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_AUXN EDP_AUXP

EDP_RCOMP

CRT_CLK CRT_DATA

CRT_AUX#_C CRT_AUX_C

R61 100K_4

EDP_TXN0 [22] EDP_TXP0 [22] EDP_TXN1 [22] EDP_TXP1 [22]

EDP_AUXN [22] EDP_AUXP [22]

R149 24.9/F_4

R466 *0_4

R66 *0_4

HDMI_DDCCLK_SW [23] HDMI_DDCDATA_SW [23]

C447 *short_4 C446 *short_4

INT_HDMI_HPD [23] CRT_HPD [21] EDP_HPD [22]

R454

4.7K_4

PCH_BRIGHTDP_UTIL

CRT_AUXN [21] CRT_AUXP [21]

eDP Panel

+VCCIOA_OUT

eDP_RCOMP Trace length < 100 mils Trace width = 20 mils Trace spacing = 25 mils

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# DGPU_SELECT# CRT_CLK CRT_DATA TPD_INT#_D

CRT_AUXN CRT_AUXP

R93 10K_4 R501 10K_4 R80 10K_4 R495 10K_4 R485 10K_4 R60 2.2K_4 R52 2.2K_4 R75 TPD@100K_4

+3V

R433 *100K_4

R432*100K_4

+3V

2

TPD_INT#[29,30]

A A

5

Q46

3

2N7002K

1

1A-13 2013/10/30 move Q42 to page02

change U24.U7 net name.

TPD_INT#_D

4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

3

Monday, April 07, 2014

2

PROJECT :

Haswell 3/5 (DDI/eDP)

ZQ0

2 46

1

3A

5

Change Data and DQS to interleave.

Haswell ULT (DDR3L) Haswell Processor (DDR3)

U25C

AH63

M_A_DQ0[14] M_A_DQ1[14] M_A_DQ2[14] M_A_DQ3[14] M_A_DQ4[14]

D D

C C

M_A_DQ5[14] M_A_DQ6[14] M_A_DQ7[14] M_A_DQ8[14] M_A_DQ9[14] M_A_DQ10[14] M_A_DQ11[14] M_A_DQ12[14] M_A_DQ13[14] M_A_DQ14[14] M_A_DQ15[14] M_B_DQ0[15] M_B_DQ1[15] M_B_DQ2[15] M_B_DQ3[15] M_B_DQ4[15] M_B_DQ5[15] M_B_DQ6[15] M_B_DQ7[15] M_B_DQ8[15] M_B_DQ9[15] M_B_DQ10[15] M_B_DQ11[15] M_B_DQ12[15] M_B_DQ13[15] M_B_DQ14[15] M_B_DQ15[15] M_A_DQ16[14] M_A_DQ17[14] M_A_DQ18[14] M_A_DQ19[14] M_A_DQ20[14] M_A_DQ21[14] M_A_DQ22[14] M_A_DQ23[14] M_A_DQ24[14] M_A_DQ25[14] M_A_DQ26[14] M_A_DQ27[14] M_A_DQ28[14] M_A_DQ29[14] M_A_DQ30[14] M_A_DQ31[14] M_B_DQ16[15] M_B_DQ17[15] M_B_DQ18[15] M_B_DQ19[15] M_B_DQ20[15] M_B_DQ21[15] M_B_DQ22[15] M_B_DQ23[15] M_B_DQ24[15] M_B_DQ25[15] M_B_DQ26[15] M_B_DQ27[15] M_B_DQ28[15] M_B_DQ29[15] M_B_DQ30[15] M_B_DQ31[15]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8

M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15

M_B_DQ0

M_B_DQ1

M_B_DQ2

M_B_DQ3

M_B_DQ4

M_B_DQ5

M_B_DQ6

M_B_DQ7

M_B_DQ8

M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31

AH62 AK63 AK62 AH61 AH60 AK61 AK60 AM63 AM62 AP63 AP62 AM61 AM60 AP61 AP60 AP58 AR58 AM57 AK57 AL58 AK58 AR57 AN57 AP55 AR55 AM54 AK54 AL55 AK55 AR54 AN54 AY58

AW58

AY56

AW56

AV58 AU58 AV56 AU56 AY54

AW54

AY52

AW52

AV54 AU54 AV52 AU52 AK40 AK42 AM43 AM45 AK45 AK43 AM40 AM42 AM46 AK46 AM49 AK49 AM48 AK48 AM51 AK51

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

HSW_ULT_DDR3L

DDR CHANNEL A

4

3

2

www.laptopblue.vn

HSW_ULT_DDR3L

DDR CHANNEL B

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1 SA_CKE0

SA_CKE1 SA_CKE2 SA_CKE3

SA_CS#0 SA_CS#1

SA_ODT0

SA_RAS

SA_WE

SA_CAS SA_BA0

SA_BA1 SA_BA2

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7

SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1

AU37 AV37 AW36 AY36

AU43 AW43 AY42 AY43

AP33 AR32

AP32 AY34

AW34 AU34

AU35 AV35 AY41

AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42

AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48

AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49

AP49 AR51 AP51

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQS#0 M_A_DQS#1 M_B_DQS#0 M_B_DQS#1 M_A_DQS#2 M_A_DQS#3 M_B_DQS#2 M_B_DQS#3

M_A_DQS0 M_A_DQS1 M_B_DQS0 M_B_DQS1 M_A_DQS2 M_A_DQS3 M_B_DQS2 M_B_DQS3

+VREF_CA_CPU +VREFDQ_SA_M3 +VREFDQ_SB_M3

M_A_CLK0# [14]

M_A_CLK0 [14]

M_A_CLK1# [14]

M_A_CLK1 [14]

M_A_CKE0 [14] M_A_CKE1 [14]

M_A_CS#0 [14] M_A_CS#1 [14]

TP38

M_A_RAS# [14] M_A_WE# [14] M_A_CAS# [14]

M_A_BS#0 [14] M_A_BS#1 [14] M_A_BS#2 [14] M_A_A[15:0] [14]

M_A_DQS#0 [14] M_A_DQS#1 [14] M_B_DQS#0 [15] M_B_DQS#1 [15] M_A_DQS#2 [14] M_A_DQS#3 [14] M_B_DQS#2 [15] M_B_DQS#3 [15]

M_A_DQS0 [14] M_A_DQS1 [14] M_B_DQS0 [15] M_B_DQS1 [15] M_A_DQS2 [14] M_A_DQS3 [14] M_B_DQS2 [15] M_B_DQS3 [15]

U25D

AY31

M_A_DQ32[14] M_A_DQ33[14] M_A_DQ34[14] M_A_DQ35[14] M_A_DQ36[14] M_A_DQ37[14] M_A_DQ38[14] M_A_DQ39[14] M_A_DQ40[14] M_A_DQ41[14] M_A_DQ42[14] M_A_DQ43[14] M_A_DQ44[14] M_A_DQ45[14] M_A_DQ46[14] M_A_DQ47[14] M_B_DQ32[15] M_B_DQ33[15] M_B_DQ34[15] M_B_DQ35[15] M_B_DQ36[15] M_B_DQ37[15] M_B_DQ38[15] M_B_DQ39[15] M_B_DQ40[15] M_B_DQ41[15] M_B_DQ42[15] M_B_DQ43[15] M_B_DQ44[15] M_B_DQ45[15] M_B_DQ46[15] M_B_DQ47[15] M_A_DQ48[14] M_A_DQ49[14] M_A_DQ50[14] M_A_DQ51[14] M_A_DQ52[14] M_A_DQ53[14] M_A_DQ54[14] M_A_DQ55[14] M_A_DQ56[14] M_A_DQ57[14] M_A_DQ58[14] M_A_DQ59[14] M_A_DQ60[14] M_A_DQ61[14] M_A_DQ62[14] M_A_DQ63[14] M_B_DQ48[15] M_B_DQ49[15] M_B_DQ50[15] M_B_DQ51[15] M_B_DQ52[15] M_B_DQ53[15] M_B_DQ54[15] M_B_DQ55[15] M_B_DQ56[15] M_B_DQ57[15] M_B_DQ58[15] M_B_DQ59[15] M_B_DQ60[15] M_B_DQ61[15] M_B_DQ62[15] M_B_DQ63[15]

M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AW31

AY29

AW29

AV31 AU31 AV29 AU29 AY27

AW27

AY25

AW25

AV27 AU27 AV25 AU25

AM29

AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26

AM26

AK25 AL25 AY23

AW23

AY21

AW21

AV23 AU23 AV21 AU21 AY19

AW19

AY17

AW17

AV19 AU19 AV17 AU17 AR21 AR22 AL21

AM22

AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20

AM20

AR18 AP18

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3

SB_CS#0 SB_CS#1

SB_ODT0

SB_RAS

SB_WE

SB_CAS SB_BA0

SB_BA1 SB_BA2

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7

SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7

AM38 AN38 AK38 AL38

AY49 AU50 AW49 AV50

AM32 AK32

AL32 AM35

AK35 AM33

AL35 AM36 AU49

AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46

AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18

AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18

M_B_ODT0

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_A_DQS#4 M_A_DQS#5 M_B_DQS#4 M_B_DQS#5 M_A_DQS#6 M_A_DQS#7 M_B_DQS#6 M_B_DQS#7

M_A_DQS4 M_A_DQS5 M_B_DQS4 M_B_DQS5 M_A_DQS6 M_A_DQS7 M_B_DQS6 M_B_DQS7

1

M_B_CLK0# [15]

M_B_CLK0 [15]

M_B_CLK1# [15]

M_B_CLK1 [15]

M_B_CKE0 [15] M_B_CKE1 [15]

M_B_CS#0 [15] M_B_CS#1 [15]

TP43

M_B_RAS# [15] M_B_WE# [15] M_B_CAS# [15]

M_B_BS#0 [15] M_B_BS#1 [15] M_B_BS#2 [15] M_B_A[15:0] [15]

M_A_DQS#4 [14] M_A_DQS#5 [14] M_B_DQS#4 [15] M_B_DQS#5 [15] M_A_DQS#6 [14] M_A_DQS#7 [14] M_B_DQS#6 [15] M_B_DQS#7 [15]

M_A_DQS4 [14] M_A_DQS5 [14] M_B_DQS4 [15] M_B_DQS5 [15] M_A_DQS6 [14] M_A_DQS7 [14] M_B_DQS6 [15] M_B_DQS7 [15]

03

B B

3 OF 19

A A

5

4

3

4 OF 19

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

2

Monday, April 07, 2014

PROJECT :

Haswell 2/5 (DDR3 I/F)

ZQ0

3A

3 46

1

3 46

3A

5

4

3

2

1

www.laptopblue.vn

04

H_PECI (50ohm) Route on microstrip only

D D

C C

Spacing >18 mils Trace Length: 0.4~6.125 iches

H_PWRGOOD (50ohm) Trace Length: 1~11.25 inches

CPU_PLTRST# (50ohm) Trace Length: 10~17 inches

H_PECI[30] XDP_PRDY# [13]

H_PROCHOT#[30,31,35]

TP79 TP25

R525 56_4

SM_RCOMP[0:2] Trace length < 500 mils Trace width = 12~15 mils Trace spacing = 20 mils

PROC_DETECT CATERR# H_PECI

H_PROCHOT#_RH_PROCHOT#

H_PWRGOOD_R

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

DDR_PG_CTRL

Haswell ULT (SIDEBAND)

THERMAL

DDR3L

DSW

HSW_ULT_DDR3L

MISC

JTAG

PWR

2 OF 19

D61 K61 N62

K63

C61

AU60

AV60

AU61

AV15 AV61

U25B

PROC_DETECT CATERR PECI

PROCHOT

PROCPWRGD

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST SM_PG_CNTL1

PRDY

PREQ PROC_TCK PROC_TMS

PROC_TRST

PROC_TDI

PROC_TDO

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

J62

XDP_PRDY#

K62

XDP_PREQ#

E60

XDP_TCK0

E61

XDP_TMS_CPU

E59

XDP_TRST#

F63

XDP_TDI_CPU

F62

XDP_TDO_CPU

J60

XDP_BPM#0

H60

XDP_BPM#1

H61

XDP_BPM#2

H62

XDP_BPM#3

K59

XDP_BPM#4

H63

XDP_BPM#5

K60

XDP_BPM#6

J61

XDP_BPM#7CPU_DRAMRST#

XDP_PREQ# [13] XDP_TCK0 [8,13] XDP_TMS_CPU [13] XDP_TRST# [8,13] XDP_TDI_CPU [13] XDP_TDO_CPU [13]

XDP_BPM#0 [13]

XDP_BPM#1 [13]

TP82 TP80 TP23 TP81 TP124 TP24

TCK,TMS Trace Length < 9000mils

BPM#[0:7] Trace Length 1~6 inches Length match < 300 mils

B B

DRAM COMP

R157 200/F_4

R155 120/F_4

R148 100/F_4

PU/PD of CPU

H_PROCHOT#

A A

H_PWRGOOD_R

R522 *62_4

R524 62_4

R51 10K_4

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

5

+VCCIO_OUT

+1.05V_VCCST

DRAMRST

CPU DRAM

CPU_DRAMRST#

+1.35V_SUS

12

4

XDP_TDO_CPU

XDP_TCK0 XDP_TRST#

470_4

R141 51_4

R62 51_4 R555 *51_4

R227 *short_4

+1.05V_VCCST

12

C271

*0.1u/10V_4

DDR3_DRAMRST# [14,15]

3

DDR3L ODT GENERATIONXDP PU/PD

+5V_S5

12

R695

R306

*220K/F_4

220K/F_4

DDR_VTTT_PG_CTRL[34]

2

+3V_SUS

12

0.1u/10V_4

+1.35V_SUS

3

2

1

+1.35V_SUS

U13

5

VCC

12

C333

4

Y

74AUP1G07GW

R321 66.5/F_4 Q35 2N7002K

R322 66.5/F_4

R323 66.5/F_4R182

R325 66.5/F_4

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

1

NC

2

A

GND

Haswell 1/5 (PEG/DMI/FDI)

R316 *short_4

3

M_A_ODT0_DIMM [14] M_A_ODT1_DIMM [14] M_B_ODT0_DIMM [15] M_B_ODT1_DIMM [15]

Quanta Computer Inc.

PROJECT :

1

ZQ0

DDR_PG_CTRL

4 46

3A

5

VDDQ Output Decoupling Recommendations

330uFx2 7343 22uFx11 10uFx10

D D

+1.35V_SUS

C C

+1.05V_VCCST

VRON_CPU IMVP_PWRGD

B B

BOT socket side 5 onTOP, 6 on BOT inside socket cavity

0805

5 onTOP, 5 on BOT inside socket cavity

0805

C476

C478

10u/6.3V_6

+

C486 *470u/2V_7343

R45 *SHORT_8

C145

2.2u/6.3V_6

VCC_SENSE[35]

R65 *10K_4 R76 10K_4

PWR_DEBUG[13]

+1.05V_VCCST+1.05V

+1.05V_VCCST

C178 10u/6.3V_6

+VCCIN

C150 *4.7u/6.3V_6

+1.35V_CPU 1.4A

+1.35V_CPU

C477 10u/6.3V_6

C157

2.2u/6.3V_6

R583 100/F_4 R423 *short_4

300mA 300mA

VCCST_PWRGD[13]

IMVP_PWRGD[10,35]

R72 *short_4

R68 150_6

C479

2.2u/6.3V_6

+VCCIO_OUT

+VCCIOA_OUT

VRON_CPU[35]

C475 10u/6.3V_6

C184

2.2u/6.3V_6

+VCCIN

C480 10u/6.3V_6

TP16 TP41

TP42

TP18 TP14 TP50

TP17 TP31 TP22 TP85 TP32 TP49 TP44 TP36 TP40 TP37 TP39 TP20 TP34

TP29 TP9

ULT_RVSD_61 ULT_RVSD_62

ULT_RVSD_63 ULT_RVSD_64

VCC_SENSE_R ULT_RVSD_65

ULT_RVSD_66 ULT_RVSD_67 ULT_RVSD_68

H_CPU_SVIDART# H_CPU_SVIDCLK H_CPU_SVIDDAT VCCST_PWRGD VRON_CPU IMVP_PWRGD

PWR_DEBUG_R

ULT_RVSD_69 ULT_RVSD_70 ULT_RVSD_71 ULT_RVSD_72 ULT_RVSD_73 ULT_RVSD_74 ULT_RVSD_75 ULT_RVSD_76 ULT_RVSD_77 ULT_RVSD_78 ULT_RVSD_79 ULT_RVSD_80 ULT_RVSD_81

+1.05V_VCCST

+VCCIN

4

3

2

www.laptopblue.vn

Haswell ULT (POWER)

+

C422 *470u/2V_7343

C73

C190 22u/6.3V_8

C133 22u/6.3V_8

C135 22u/6.3V_8

C204 22u/6.3V_8

C137 *22u/6.3V_8

C46 22u/6.3V_8

C136 22u/6.3V_8

C167 22u/6.3V_8

C125 22u/6.3V_8

C126 *22u/6.3V_8

22u/6.3V_8

C132 22u/6.3V_8

C127 22u/6.3V_8

C172 22u/6.3V_8

C71 *22u/6.3V_8

C100 22u/6.3V_8

C201 22u/6.3V_8

C169 22u/6.3V_8

C170 22u/6.3V_8

C129 *22u/6.3V_8

VCC Output Decoupling Recommendations

470uFx4 7343 22uFx8 22uFx11 10uFx11

TOP socket side 4 on TOP, 4 on BOT near socket edge

0805 0805

TOP, inside socket cavity

0805

BOT, inside socket cavity

+VCCIN 32A

C113 22u/6.3V_8

C140 22u/6.3V_8

C165 22u/6.3V_8

C203 22u/6.3V_8

C74 *22u/6.3V_8

+VCCIN

C75 22u/6.3V_8

C202 22u/6.3V_8

C171 22u/6.3V_8

C130 22u/6.3V_8

C128 *22u/6.3V_8

AH26

AJ31 AJ33

AJ37 AN33 AP43 AR48

AY35

AY40

AY44

AY50

AC58

AB23

AD23 AA23 AE59

AD60 AD59 AA59 AE60 AC59 AG58

AC22 AE22 AE23

AB57 AD57 AG57

L59

J58

F59 N58

E63 A59

E20

L62 N63 L63 B59 F60 C59

D63 H59 P62 P60 P61 N59 N61 T59

U59 V59

C24 C28 C32

U25L

RSVD RSVD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VCC RSVD RSVD

VCC_SENSE RSVD VCCIO_OUT VCCIOA_OUT RSVD RSVD RSVD

VIDALERT VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY

VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

VCCST VCCST VCCST

VCC VCC VCC VCC VCC VCC

HSW_ULT_DDR3L

HSW ULT POWER

12 OF 19

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57

VCCST PWRGD

+1.05V_VCCST

R601

VCCST_PWRGD

SVID

H_CPU_SVIDDAT

H_CPU_SVIDART#

10K_4 R603 *short_4

C498 *0.1u/10V_4

R602 *0_4

VCCST_PWRGD_EN

1A-6 2013/10/21 Del APWORK.

Layout note: need routing together and ALERT need between CLK and DATA.

+VCCIO_OUT

R535 *130/F_4

Place PU resistor close to CPU

CRB is via +1.05V PG

+3V_S5

VCCST_PWRGD_R

HWPG_1.05V_EC

+1.05V_VCCST

R540 130/F_4

R528 *short_4

R502 43_4

C502

0.1u/10V_4

R55 *0_8

5

4

Q41

*2N7002K

R618 *short_4 R617 *0_4

+VCCIO_OUT+1.05V

+1.05V_VCCST

1

U29

VCC

Y

74AUP1G07GW

3

1

R539 75_4

1

NC

2

A

3

GND

Reserve from EC

2

PCH_PWROK [7,30]

EC_PWROK [7,30]

C118 *4.7u/6.3V_6

+VCCIO_OUT

R534 *75_4

05

VCCST_PWRGD_EN

HWPG_1.05V_EC# [30]

VR_SVID_DATA [35]

VR_SVID_ALERT# [35]

HWPG_1.05V for DDR=1.5V

+3V

A A

C268 *1000p/50V_4

2

Q30

1 3

*MMBT3904-7-F

+1.05V

R225 *4.7K_4

5

R229 *4.7K_4

C270 *1000p/50V_4

+3V

R236 *4.7K_4

HWPG_1.05V [30]

2

Q33

1 3

*DTC144EU

R247 *100K/F_4

10/30 reserve DDR=1.5V ,This block POP

4

3

2

H_CPU_SVIDCLK

R548 *short_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

PROJECT :

Haswell 4/5 (POWER)

1

VR_SVID_CLK [35]

ZQ0

5 46

3A

5

4

www.laptopblue.vn

Haswell ULT (CFG,RSVD)

U25S

3

HSW_ULT_DDR3L

2

1

06

D D

NOA_STBN_0[13] NOA_STBN_1[13] NOA_STBP_0[13] NOA_STBP_1[13]

C C

1A-10 20131025 reserve A5 ball to 100k PU 3VPCU. 1A-12 20131028 reserve A5 ball toTP.

TP100

CFG0[13] CFG1[13] CFG2[13] CFG3[13] CFG4[8,13] CFG5[13] CFG6[13] CFG7[13] CFG8[13]

CFG9[13] CFG10[13] CFG11[13] CFG12[13] CFG13[13] CFG14[13] CFG15[13]

R515 49.9/F_4

R452 8.2K_4

NOA_STBN_0 NOA_STBN_1 NOA_STBP_0 NOA_STBP_1

CFG_RCOMP

REFPKG_OCC

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

TD_IREF

AC60 AC62 AC63 AA63 AA60

Y62 Y61 Y60 V62 V61 V60

U60

T63 T62 T61 T60

AA62

U63

AA61

U62

V63

J20

H18

B12

A5 E1

D1

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCOMP RSVD RSVD

RSVD RSVD RSVD TD_IREF

RESERVED

PROC_OPI_RCOMP

19 OF 19

RSVD_TP RSVD_TP

RSVD

RSVD_TP RSVD_TP

RSVD_TP

RSVD RSVD

RSVD

RSVD RSVD

VSS VSS

RSVD RSVD

AV63 AU63

C63 C62 B43

A51 B51

L60 N60 W23

Y22 AY15

AV62 D58

P22 N21

P20 R20

OPI_COMP1

R576 49.9/F_4

Processor Strapping

1 0

CFG0 EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKED CFG1 PCH/ PCH LESS MODE SELECTION

B B

CFG3 PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

CFG 8 ALLOW THE USE OF NOA ON LOCKED UNITS

(DEFAULT) NORMAL OPERATION; NO STALL

(DEFAULT) NORMAL OPERATION

DISABLED NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT

DISABLED(DEFAULT); IN THIS CASE, NOA WILL BE DISABLED IN LOCKED UNITS AND ENABLED IN UN-LOCKED UNITS

STALL

PCH-LESS MODE

ENABLED AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT

ENABLED; NOA WILL BE AVAILABLE REGARDLESS OF THE LOCKING OF THE UNIT

CFG0

CFG1

CFG3

CFG8

R134 *1K_4

R552 *1K_4

R549 *1K_4

R537 *1K_4

CFG9 NO SVID PROTOCOL CAPABLE VR CONNECTED

A A

CFG10 SAFE MODE BOOT

5

VRS SUPPORTING SVID PROTOCOL ARE PRESENT

POWER FEATURES ACTIVATED DURING RESET

4

NO VR SUPPORTING SVID IS PRESENT. THE CHIP WILL NOT GENERATE (OR RESPOND TO) SVID ACTIVITY

POWER FEATURES (ESPECIALLY CLOCK GATINE ARE NOT ACTIVATED

3

CFG9

CFG10

R532 *1K_4

R126 *1K_4

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

PROJECT :

Haswell 5/5 (CFG/GND)

1

ZQ0

6 46

3A

5

PCH_SUSACK#[30]

PCH_SUSPWRACK_R[30]

SYS_PWROK EC_PWROK

RSMRST#[30]

DNBSWON#[30] ACPRESENT[31]

D D

1C1-1 2014/02/19 add R692 for SUSPWRACK# to EC.

PCH_SUSPWRACK

SYS_RESET#[13]

R613 *short_4 R609 *0_4 R608 *0_4

R168 *0_4 R173 *0_4

C207 *1u/6.3V_4

R604 *0_4 R605 *0_4

R596 *short_4 R692 *short_4 R274 *short_4 R277 *short_4

TP111 TP51

SUSACK#_R

SUSACK#_R SYS_RESET#

SYS_PWROK_R EC_PWROK_R APWROK_R PCI_PLTRST#

PCH_RSMRST#

PCH_SUSPWRACK

PCH_PWRBTN# PCH_ACPRESENT PCH_BATLOW# PCH_SLP_S0#_R PCH_SLP_WLAN#

4

www.laptopblue.vn

AK2 AC3 AG2 AY7 AB5 AG7

AW6

AV4

AL7

AJ8

AN4

AF3

AM5

Haswell ULT PCH (PM)

U25H

SUSACK SYS_RESET SYS_PWROK PCH_PWROK APWROK

+3V_S5

PLTRST

RSMRST SUSWARN/SUSPWRDNACK/GPIO30 PWRBTN ACPRESENT/GPIO31 BATLOW/GPIO72 SLP_S0 SLP_WLAN/GPIO29

HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

DSW DSW DSW +3V_S5 DSW

8 OF 19

+3V +3V_S5 +3V_S5 DSW

+3V_S5

3

SUS_STAT/GPIO61

DSWVRMEN

DPWROK

DSW

CLKRUN/GPIO32

DSW DSW DSW DSW DSW

WAKE

SUSCLK/GPIO62

SLP_S5/GPIO63

SLP_S4 SLP_S3

SLP_A

SLP_SUS

SLP_LAN

AW7

DSWVREN

AV5

DPWROK_R

AJ5

PCIE_LAN_WAKE#

V5

CLKRUN#

AG4

GPIO61

AE6

PCH_SUSCLK

AP5

PCH_SLP_S5#

AJ6

SUSC#

AT4

SUSB#

AL5

PCH_SLP_A#

AP4

PCH_SLP_SUS#

AJ7

PCH_SLP_LAN#

2

Deep Sx

R599 *0_4

TP123 TP11

TP12

DSWVREN [8] DPWROK [30] PCIE_LAN_WAKE# [26]

CLKRUN# [21,30]

PCH_SLP_S5# [13]

SUSC# [13,30] SUSB# [13,30] PCH_SLP_A# [13]

PCH_SLP_SUS# [30]

1

07

C C

PCH PM PU/PD

+3V

CLKRUN# SYS_RESET#

B B

A A

PCH_RSMRST# SYS_PWROK DPWROK_R PCH_SUSCLK

PCH_SUSPWRACK GPIO61

1C-5 2014/01/16 Change R264 from 10k to 1k

for wake on lan issue.

PCH_ACPRESENT PCH_BATLOW# PCIE_LAN_WAKE# PCH_PWRBTN#

R505 8.2K_4 R516 10K_4

R590 10K_4 R616 *10K_4 R598 100K/F_4 R110 *10K_4

+3V_S5

R176 *10K_4 R521 *10K_4

+3V_S5

R122 10K_4 R262 8.2K_4 R264 1K_4 R261 *10K_4

+3VPCU

R116 *10K_4 R275 *8.2K_4 R276 *1K_4 R273 *10K_4

5

DSW PU

Power Sequence

PCH_PWROK[5,30]

R595

100K_4

EC_PWROK SYS_PWROK_R

R353 *short_4 R612 *0_4 R597 *short_4

Non Deep Sx

EC_PWROK_R

DPWROK_RRSMRST#

PLTRST# Buffer Deep Sx Circuit

+3V

PCI_PLTRST#

2 1

3 5

C213 0.1u/10V_4

4

U6 TC7SH08FU

R175 100K_4

PLTRST# [13,16,21,24,26,27,30]

+3V_S5 +3VCC_S5

*0.33u/10V_6

SYSPWOK

+3V_S5

C511 *0.1u/10V_4

2

SYS_PWROK[13]

4

SYS_PWROK

4

U30 TC7SH08FU

3 5

R619 *0_4

EC_PWROK

1

3

EC_PWROK [5,30] IMVP_PWRGD_3V [10]

R615 10K_4

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

2

Tuesday, April 08, 2014

APWORK[30]

R610 *short_4

Speed up 250ms to boot up for EC power on 250 ms

Non Deep Sx

R300 *Short_6

1

R302

C237

PCH_SLP_SUS#

*100K_4

2

Q27 *2N7002K

Quanta Computer Inc.

PROJECT :

LPT 1/6 (DMI/FDI/VGA)

2

3

1

Q34 *AO3413

R303 *0_6

ZQ0

R606 10K_4

3

7 46

1

APWROK_R

3A

RTC Clock 32.768KHz (RTC)

C481 15p/50V_4

C485 15p/50V_4

RTC Circuitry (RTC)

D D

R345 *S hort_6

+3VPCU

R346 1K _4

VCCRTC_2

1A-2

HDA

C C

PCH JTAG

B B

ULT Strapping Table

VCCRTC_2

+3V_RTC_[0:2]

12

Trace width = 20 mils

BT1

2013/10/16 Chage +3V_RTC_0 to VCCTC_2.

PCH_AZ_CODEC_RST#[28]

PCH_AZ_CODEC_SDOUT[28]

PCH_AZ_CODEC_BITCLK[28]

PCH_AZ_CODEC_SYNC[28]

JTAG_TCK,JTAG_TMS Trace Length < 9000mils

XDP_TMS XDP_TDI PCH_JTAG_TDO PCH_JTAGX

XDP_TCK1

Pin Name Strap description

GPIO81(SPKR)

HDA_SDO

INTVRMEN

GPIO66

GPIO86

GPIO15

A A

CFG4

DSWVREN

5

RTC_X1

R574

Y5

10M_4

32.768KHZ

RTC_X2

2013/11/20 D24 down size.

+3V_RTC

D17

BAT54C

R174 33_ 4 R580 33_ 4 R584 33_ 4

C483 *10p/50V_4

R181 33_ 4 C219 *10p/50V_4

+3V_RTC Trace width = 30 mils

R336

20K/F_4

R338

20K/F_4

C676 1u/6.3V_4

C671 1u/6.3V_4

C670 1u/6.3V_4

+3V_RTC_2

+3V_RTC_1

12

1B-1

MP remove(Intel)

R541 51_4 R542 51_4 R529 51_4 R538 *1K_4

R546 *51_4

No reboot on TCO Timer expiration

Flash Descriptor Security Override / Intel ME Debug Mode

+1.05V_S5

Integrated 1.05V VRM enable ALWAYS

Top-Block Swap override

Boot BIOS Strap Bit

TLS(Transport layer security)

DP presence strap

Deep Sx well on die VR enable

5

RTC_RST#

12

J1 *JUMP

SRTC_RST#

12

J2 *JUMP

HDA_RST#_R HDA_SDO_R HDA_BCLK_R

HDA_SYNC_R

Sampled

PWROK

R591 1M_4

+3V_RTC

RTC_RST#[13]

PCH_AZ_CODEC_SDIN0[28]

XDP_TRST#[4,13]

XDP_TCK1[13] XDP_TDI[13]

R530 0_4

XDP_TDO[13] XDP_TMS[13]

R547 0_4

XDP_TCK0[4,13]

TP135

1A-10

2013/10/25 reserve AV2 ball to GND.

1A-12

2013/10/28 reserve AV2 ball to TP.

RTC charge circuit

1 3

Q21

MMBT3904

1A-2

2013/10/16 Add RTC charge circuit.

Configuration note

0 = Default enable (iPD 20K)

1 =Disable No-Reboot mode

0 = Default can program ME (iPD 20K)

1 =can't program ME

1=Should be always pull-up

0 = Default disable (iPD 20K)

1 = Enable TBS function

0 = Default SPI (iPD 20K)

1 =LPC

0 = Default enable w/o confidentiality(iPD 20K)

1 =Default enable with confidentiality

0 = Enable an external display port is connected to the eDP

1 =disable

1=Should be always pull-up

4

Haswell ULT PCH (RTC/HDA/SATA/SPI)

www.laptopblue.vn

U25E

AW5

RTC_X1 RTC_X2 SM_INTRUDER# PCH_INTVRMEN

RTC_RST#

HDA_BCLK_R HDA_SYNC_R HDA_RST#_R

HDA_SDO_R

XDP_TCK1 XDP_TDI PCH_JTAG_TDO

PCH_JTAGX

PCH_EDM

20MIL

VCCRTC_3 VCCRTC_4VCCRTC_2

R193 4.7K_4

2

4

RTCX1

AY5

RTCX2

AU6

INTRUDER

AV7

INTVRMEN

AV6

SRTCRST

AU7

RTCRST

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST/I2S_MCLK

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN/I2S1_TXD

AV10

HDA_DOCK_RST/I2S1_SFRM

AY8

I2S1_SCLK

AU62

PCH_TRST

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD

AC4

RSVD

AE63

JTAGX

AV2

RSVD

+5V_S5

R202 4.7K_4 R550 *S hort_6

R195

68.1K/F_4

R194

150K/F_4

R508 *1 K_4

+3V

HDA_SDO_R

R592 330 K_4

+3V_RTC

GPIO66[10]

R578 *1 K_4

+3V

GPIO86[10]

R136 *1K_4

+3V

GPIO15[10]

R99 8.2K_4

+3V_S5

DSWVREN[7]

R589 330 K_4

+3V_RTC

HSW_ULT_DDR3L

RTC

AUDIO SATA

JTAG

5 OF 19

SPKR

R582 *short_4

PCH_INTVRMEN

GPIO66

GPIO86

GPIO15

CFG4

CFG4[6,13]

DSWVREN

+3V +3V +3V +3V

SPKR [10,28]

ME_WR# [30]

R588 *3 30K_4

R577 *1 K_4

R129 *1 K_4

R95 *1K_4

R544 1K _4

R585 *3 30K_4

3

SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3

SATA_TN0/PETN6_L3 SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2

SATA_TN1/PETN6_L2 SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1

SATA_TN2/PETN6_L1 SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0 SATA_RP3/PERP6_L0

SATA_TN3/PETN6_L0 SATA_TP3/PETP6_L0

SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37

SATA_IREF

RSVD RSVD

SATA_RCOMP

SATALED

3

J5 H5 B15 A15

J8 H8 A17 B17

J6 H6 B14 C15

F5 E5 C17 D17

V1

VGPU_EN

U1

ODD_PRSNT#

V6

GPIO36

AC1

GPIO37

A12

SATA_IREF

L11 K10 C12

SATA_RCOMP

U3

SATA_LED#

SATA_RCOMP Impedance = 50 ohm Trace length < 500 mils Trace spacing = 15 mils

PCH SPI ROM(8M+4M)

15ohm CS01502JB12 33ohm CS03302JB29

PCH_SPI_CS0#

PCH_SPI_SO PCH_SPI_SO_EC

+3V_PCH_ME

3.3K is original and for no support fast read function

R573 *short_4

R453 3.01 K/F_4 R510 10K _4

R103 8M4M@15_4

R489 8M@15_4

R106 *1 K_4

PCH_SPI_CS1# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO

C461 *22p/50V_4

+3V_PCH_ME

SATA_RXN0 [25] SATA_RXP0 [25] SATA_TXN0 [25] SATA_TXP0 [25]

SATA_RXN1 [25] SATA_RXP1 [25] SATA_TXN1 [25] SATA_TXP1 [25]

PCH_SPI_CLK_R PCH_SPI_SI_R PCH_SPI_SO_R

PCH_SPI_CLK_EC[30]

PCH_SPI_SI_EC[30] PCH_SPI_SO_EC[30]

SPI_CS0#_UR_ME[30]

2

Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)

HDD

ODD

VGPU_EN [37 ]

ODD_PRSNT# [25]

TP108

+V1.05S_ASATA3PLL

+V1.05S_ASATA3PLL +3V

U14

1 2

SPI_SO_8M

3

4

W25Q64FW -- 8MB

SPI_WP_IO2_ME

PCH_SPI_IO2

PCH_SPI_IO3

R553 *4M@33_4 R551 *4M@33_4

R565 *1 K_4

1A-3 2013/10/16 Add U34 f lash 4M ROM re serve for ZQ0D .

+3V_PCH_ME

R109 10K_4

CS# IO1/DO IO2/WP#

GND

PCH_SPI_CLK_EC PCH_SPI_SI_EC

R543 *4M@33_4 R531 *4M@33_4 R98 *4M@33_4

LPC_LAD0[21,24,30] LPC_LAD1[21,24,30] LPC_LAD2[21,24,30] LPC_LAD3[21,24,30]

LPC_LFRAME#[21,24,30]

PCH_SPI_CLK PCH_SPI_CS1# PCH_SPI_SI

PCH_SPI_SO PCH_SPI_IO2 PCH_SPI_IO3

GPIO37 GPIO36

R507*10K_4 R162 10K_4

1A-14

2013/12/02 change GPIO36 to PD.

1B-2

2013/12/04 change GPIO36/GPI037 to PU.

Option: 4M@ ->Stuff 33o hm. 8M@->Stuff 15oh m.(default) 8M4M@->8M flash ROM stuff 15o hm(default), 4M flash ROM stuff 33oh m.

+3V_PCH_ME+3V_S5

8

VCC

7

SPI_HOLD_IO3_ME

IO3/HOLD#

6

SPI_CLK_8M

CLK

5

SPI_SI_8M

IO0/DI

R533 8M@15_4 R526 8M@15_4

U28

CE#

VDD SCK SI SO

HOLD#

WP#

VSS

*4M@ROM-4M_EC

SPI_CS0#_UR_ME

SPI_WP_IO2_EC SPI_WP_IO2_ME

SPI_HOLD_IO3_EC SPI_HOLD_IO3_ME

8

7

SPI_HOLD_IO3_EC

4

PCH_SPI_CLK_R

PCH_SPI_SI_R

PCH_SPI_SO_R

PCH_SPI_CS0# PCH_SPI_CS1#

only 0ohm option

2

R566 *4 M@33_4 R91 8M4M@15_4

R564 *4M@33_4 R146 8M4M@15_4

1 6 5 2

3

SPI_WP_IO2_EC

R112 8M @0_4 R587 *4 M@0_4

U25G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME

AA3

SPI_CLK

Y7

SPI_CS0

Y4

SPI_CS1

AC2

SPI_CS2

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

R51710K_4 R9710K_4

VGPU_EN

C147 0.1u/10V_4

R147 *1 K_4 R145 8M4M@15_4 R153 8M4M@15_4

reserve for SPI fast read

+3V_PCH_ME

C489 *4M@0.1u/10V_4

R51110K_4

+3V

+3V_PCH_ME

PCH_SPI_CLK

PCH_SPI_SI

C162 *22p/50V_4

1

HSW_ULT_DDR3L

LPC

+3V_S5 +3V_S5 +3V_S5

SMBUS

+3V_S5 +3V_S5 +3V_S5

+3V_S5

SML1ALERT/PCHHOT/GPIO73

+3V_S5 +3V_S5

C-LINKSPI

SMBALERT/GPIO11

SML0ALERT/GPIO60

SML1CLK/GPIO75

SML1DATA/GPIO74

7 OF 19

SMBus

SMBus(PCH)

SMB_PCH_DAT

SMB_PCH_CLK

PCH_XDP_WLAN/S5 DDR_TP/S0

SMBus(EC)

2ND_MBCLK[19,30]

2ND_MBDATA[19,30]

EC/S5 PCH/S5

AN2

SMBALERT#SRTC_RST#

AP2

SMB_PCH_CLK

SMBCLK

AH1

SMB_PCH_DAT

SMBDATA

AL2

SMB0ALERT#

AN1

VGA_MBCLK

SML0CLK

AK1

SML0DATA

+3V_S5

VGA_MBDATA

AU4

SMB1ALERT#

AU3

SMB_ME1_CLK

AH3

SMB_ME1_DAT

AF2

CL_CLKPCH_SPI_CS0#

CL_CLK

AD2

CL_DAT

CL_DATA

AF4

CL_RST#

CL_RST

R545 10K_4 R575 10K_4

R285 2.2K_4 R284 2.2K_4 R536 2.2K_4 R164 2.2K_4

+3V_S5

2ND_MBCLK 2ND_MBDATA

Size Document Number Rev

Date: Sheet of

SMB0ALERT# SMB1ALERT# SMBALERT#

SMB_PCH_CLK SMB_PCH_DAT VGA_MBDATA VGA_MBCLK

+3V

R289

4.7K_4

Q14

5

2 6

2N7002DW

*2.2K_4

Q15

5

2 6

*2N7002DW

R280 *s hort_4 R282 *s hort_4

Quanta Computer Inc.

PROJECT :

LPT 2/6 (SATA/HDA/SPI)

Tuesday, April 08, 2014

1

43

1

R290

43

1

SMB1ALERT# [29]

TP87 TP86 TP89

2013/10/16 change SMbus VGA to PCH SML0CLK/SML0DATA.

1A-3

R279

4.7K_4

CLK_SDATA [13,14 ,15,24]

CLK_SCLK [13,14,15,24]

R278 *2.2K_4R586 *4M@33_4 R572 *1 K_4

SMB_ME1_CLK

SMB_ME1_DAT

SMB_ME1_CLK SMB_ME1_DAT

ZQ0

8 46

08

3A

5

Haswell ULT PCH (PCIE,USB3.0,USB2.0)

1A-6 2013/10/21 reversal PEG lan for layout. 1A-8 2013/10/21 Swap PEG to nomroal mode.

PEG_RX#0[16]

D D

PEG x4

LANWLAN

C C

B B

PEG_RX0[16]

PEG_TX#0[16]

PEG_TX0[16]

PEG_RX#1[16]

PEG_RX1[16]

PEG_TX#1[16]

PEG_TX1[16]

PEG_RX#2[16]

PEG_RX2[16]

PEG_TX#2[16]

PEG_TX2[16]

PEG_RX#3[16]

PEG_RX3[16]

PEG_TX#3[16]

PEG_TX3[16]

PCIE_RX3-_LAN[26] PCIE_RX3+_LAN[26 ]

PCIE_TX3-_LAN[26] PCIE_TX3+_LAN[26]

PCIE_RX4-_WLAN[24] PCIE_RX4+_WLAN[24]

PCIE_TX4-_WLAN[24]

PCIE_TX4+_WLAN[24]

+V1.05S_ AUSB3PL L

C444 EV@0.22 u/10V_4 C445 EV@0.22 u/10V_4

C451 EV@0.22 u/10V_4 C452 EV@0.22 u/10V_4

C432 EV@0.22 u/10V_4 C433 EV@0.22 u/10V_4

C449 EV@0.22 u/10V_4 C450 EV@0.22 u/10V_4

C439 0.1u/10 V_4 C438 0.1u/10 V_4

C441 0.1u/10 V_4 C440 0.1u/10 V_4

R571 3.01K/F_4

R570 *short_4

C_PEG_TX# 0 C_PEG_TX0

C_PEG_TX# 1 C_PEG_TX1

C_PEG_TX# 2 C_PEG_TX2

C_PEG_TX# 3 C_PEG_TX3

PCIE_TX3PCIE_TX3+

PCIE_TX4PCIE_TX4+

PCIE_RCOMP PCIE_IREF

F10 E10

C23 C22

F8 E8

B23 A23

H10 G10

B21 C21

E6 F6

B22 A21

G11 F11

C29 B30

F13 G13

B29 A29

G17 F17

C30 C31

F15 G15

B31 A31

E15 E13 A27 B27

U25K

PERN5_L0 PERP5_L0

PETN5_L0 PETP5_L0

PERN5_L1 PERP5_L1

PETN5_L1 PETP5_L1

PERN5_L2 PERP5_L2

PETN5_L2 PETP5_L2

PERN5_L3 PERP5_L3

PETN5_L3 PETP5_L3

PERN3 PERP3

PETN3 PETP3

PERN4 PERP4

PETN4 PETP4

PERN1/USB3RN3 PERP1/USB3RP3

PETN1/USB3TN3 PETP1/USB3TP3

PERN2/USB3RN4 PERP2/USB3RP4

PETN2/USB3TN4 PETP2/USB3TP4

RSVD RSVD PCIE_RCOMP PCIE_IREF

PCIE USB

+3V_S5 +3V_S5

4

www.laptopblue.vn

HSW_ULT_DDR3L

11 OF 19

+3V_S5 +3V_S5

+3V_S5 +3V_S5 +3V_S5 +3V_S5

DSW

USB2N0

DSW

USB2P0

DSW

USB2N1

DSW

USB2P1

DSW

USB2N2

DSW

USB2P2

DSW

USB2N3

DSW

USB2P3

DSW

USB2N4

DSW

USB2P4

DSW

USB2N5

DSW

USB2P5

DSW

USB2N6

DSW

USB2P6

DSW

USB2N7

DSW

USB2P7

USB3RN1 USB3RP1

USB3TN1 USB3TP1

USB3RN2 USB3RP2

USB3TN2 USB3TP2

USBRBIAS

OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43

1A-1 2013/10/15 following up acer define and swap USB3 and USB2

USB2 port.

RSVD RSVD

AN8 AM8

AR7 AT7

AR8 AP8

AR10 AT10

AM15 AL15

AM13 AN13

AP11 AN11

AR13 AP13

G20 H20

C33 B34

E18 F18

B33 A33

AJ10 AJ11 AN10 AM10

AL3 AT1 AH2 AV3

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

USBCOMP

USBP0- [27] USBP0+ [27]

USBP1- [27] USBP1+ [27]

USBP2- [21] USBP2+ [21]

USBP3- [27] USBP3+ [27]

USBP4- [24] USBP4+ [24]

USBP5- [22] USBP5+ [22]

USBP6- [22] USBP6+ [22]

USBP7- [27] USBP7+ [27]

USB3_RXN0 [27] USB3_RXP 0 [27]

USB3_TXN0 [27] USB3_TXP0 [27]

R123 22.6/F_4

USB_OC0# [27 ] USB_OC1# [27 ]

MB USB3.0 DB USB2.0 DB FingerPrint DB USB2.0 BT Touch screen CCD Card reader

USBCOMP Impedance = 50 ohm Trace length < 500 mils Trace spacing = 15 mils

MB USB3.0

MB U3 DB U2

3

1B-2 2013/11/15 Swap LAN and WLAN

Request clk port base on DG.

CLK_PCIE_LANN[26]

LANWLANVGA

CLK_PCIE_LANP[26]

CLK_PCIE_LAN_REQ #[26]

CLK_PCIE_WLANN[24] CLK_PCIE_WLANP[24 ]

PCIE_CLKREQ_WLAN#[24]

CLK_PCIE_VGA#[16]

CLK_PCIE_VGA[16]

CLK_PEGA_REQ#[16]

USB Overcurrent

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

TP75 TP73 TP84

TP10

R519 *short_4

R493 *short_4

R87 *short_4

+3V_S5

RP1

10

9 8 7 4

10K_10P 8R

2

Haswell ULT PCH (CLOCK)

U25F

CLK_PCIE_N0 CLK_PCIE_P0 CLK_PCIE_REQ0#

CLK_PCIE_REQ1#

CLK_PCIE_REQ2#

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

1 2 3

56

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5/GPIO23

HSW_ULT_DDR3L

+3V

CLK_PCIE_REQ0# CLK_PCIE_REQ1# CLK_PCIE_REQ2# CLK_PCIE_REQ3# CLK_PCIE_REQ5#

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLK_PCIE_REQ4#

CLOCK

SIGNALS

6 OF 19

R504 10K_ 4 R102 10K_ 4 R518 10K_ 4 R492 10K_ 4 R503 10K_ 4

R465 10K_ 4 R418 10K_ 4 R185 10K_ 4 R271 10K_ 4

R90 10K_4 R92 *1K_4

XTAL24_IN

XTAL24_OUT

RSVD RSVD

DIFFCLK_BIASREF

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLKOUT_LPC_0 CLKOUT_LPC_1

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

+3V

XTAL24_IN

XTAL24_OUT

A25 B25

K21 M21 C26

C35 C34 AK8 AL8

AN15 AP15

B35 A35

R446 1M_4

XTAL24_IN XTAL24_OUT

ICLK_BIAS TESTLOW_C35

TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLK_PCH_PCI3 CLK_PCH_PCI4

C221

*18p/50V _4

1

C443 12p/50V_4

Y4 24MHz

2 4

1 3

C442 12p/50V_4

R47 3.01K/F_4

*18p/50V _4

R170TPM@22_4 R17122_4 R16922_4

C226

09

+V1.05S_ AXCK_LCPLL

PCLK_TPM [2 1] CLK_PCI_LPC [24 ] CLK_PCI_EC [30]

CLK_PCIE_XDPN [13] CLK_PCIE_XDPP [13]

PCLK_TPMCLK_P CI_LPCCLK_PCI_EC

C222

*TPM@18p/50V_4

A A

Quanta Computer Inc.

PROJECT :

Size Docum ent Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

5

4

3

2

Tuesday, April 08, 2014

PROJECT :

LPT 3/6 (PCIE/USB/CLK)

ZQ0

9 46

1

9 46

3A

5

Haswell ULT PCH (GPIO,CPU/MISC,NCTF)

LowHigh

GPIO8

D D

C C

Touch panel No touch panel

GPIO8[22] GPIO15[8]

DGPU_PWROK[17]

TP26 TP132 TP15 TP53

DGPU_HOLD_RST#[16]

DGPU_PWR_EN[38]

MODPHY_EN[33]

TP33

ACCEL_INTA[29]

TP13

DEVSLP0[25]

SPKR[8,28]

BOARD_ID0 GPIO8 LAN_DISABLE# GPIO15 SKU_ID0 DGPU_PWROK GPIO24 WK_GPIO27 GPIO28 GPIO26

GPIO56 GPIO57 GPIO58 GPIO59 GPIO44 GPIO47 DGPU_HOLD_RST# DGPU_PWR_EN DGPU_PW_CTRL# MODPHY_EN GPIO13 GPIO14 GPIO25 GPIO45 ACCEL_INTA

GPIO9 GPIO10 DEVSLP0 BOARD_ID3 DEVSLP1 SKU_ID1 SPKR

Board ID

+3V

R497 10K_4

BOARD_ID1[2]

R89 10K_4

B B

BOARD_ID2[2]

R491 10K_4 R554 10K_4 R124 *10K_4

BOARD_ID4[2]

R488 10K_4

BOARD_ID0

BOARD_ID1

BOARD_ID2 BOARD_ID3

BOARD_ID4

Low

BOARD_ID0

BOARD_ID1

A A

BOARD_ID2

BOARD_ID3

BOARD_ID4

(Default)

Reserve for Touch pad, default(low)

DTPM

Non-Dolly (Default)

R498 *10K_4

R88 *10K_4

R490 *10K_4 R121 10K_4

R487 *10K_4

High

N15V-GM-BN15V-GL-B

ReserveReserved

No DTPM

Dolly

5

U25J

P1

BMBUSY/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO33

C4

SDIO_POWER_EN/GPIO70

L2

DEVSLP1/GPIO38

N5

DEVSLP2/GPIO39

V2

SPKR/GPIO81

RAM ID

SKU ID

R509 *IV@10K_4 R86 *IV@10K_4

UMA Only

dGPU Only

Switchable (Mux)

Optimize (Muxless)

4

3

2

www.laptopblue.vn

HSW_ULT_DDR3L

D60

+3V

+3V_S5 +3V_S5

+3V +3V +3V_S5 DSW +3V_S5 +3V_S5

+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V +3V +3V

+3V +3V_S5 +3V_S5 DSW +3V_S5 +3V_S5

+3V_S5 +3V_S5

SKU_ID1 SKU_ID0 VGA H/W

0

1

4

+3V_S5

GPIO

+3V

+3V +3V +3V +3V

10 OF 19

SKU_ID0 SKU_ID1

Signal

UMA

0

GPU

1

0

UMA+GPU dGPU/SG UMA boot

UMA

1

+3V

CPU/ MISC

+3V +3V +3V

GSPI0_MISO/GPIO85

+3V

GSPI0_MOSI/GPIO86

+3V +3V +3V

GSPI1_MISO/GPIO89

+3V +3V

UART0_RXD/GPIO91

+3V

UART0_TXD/GPIO92

+3V

UART0_RTS/GPIO93

SERIAL IO

+3V

UART0_CTS/GPIO94

+3V +3V +3V

UART1_RST/GPIO2

+3V

UART1_CTS/GPIO3

+3V +3V +3V +3V +3V +3V +3V +3V +3V +3V

R512 EV@10K_4 R143 EV@10K_4

Setup Menu

Hidden

UMA boot

Hidden

GPU boot

UMA/SG

UMA boot

THRMTRIP

RCIN/GPIO82

SERIRQ

PCH_OPI_RCOMP

RSVD RSVD

GSPI0_CS/GPIO83 GSPI0_CLK/GPIO84

GSPI1_CS/GPIO87 GSPI1_CLK/GPIO88

GSPI_MOSI/GPIO90

UART1_RXD/GPIO0 UART1_TXD/GPIO1

I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69

+3V

THRMTRIP#

V4

SIO_RCIN#

T4

IRQ_SERIRQ

AW15 AF20 AB21

R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2

OPI_COMP2

TP_INT_PCH GPIO84 GPIO85 GPIO86 GPIO87 GPIO88 GPIO89 GPIO90 GPIO91 GPIO92 GPIO93 GPIO94 SIO_EXT_SMI# SIO_EXT_SCI# DGPU_EVENT# GC6_FB_EN GPIO4 GPIO5 GPIO6 GPIO7

GPIO65 GPIO66 GPIO67 GPIO68 GPIO69

R579 49.9/F_4

CPU thermal trip

IMVP_PWRGD_3V

+1.05V_VCCST

THRMTRIP#

IMVP_PWRGD[5,35]

3

SIO_RCIN# [30]

IRQ_SERIRQ [21,30]

20131030 add touch pad

1A-13

interrupt pin on gpio83.

TP_INT_PCH [22]

GPIO86 [8]

SIO_EXT_SMI# [30] SIO_EXT_SCI# [30]

DGPU_EVENT# [19]

GC6_FB_EN [17,19] I2C0_SDA_GPIO4 [29] I2C0_SCL_GPIO5 [29] I2C1_SDA_GPIO6 [22] I2C1_SCL_GPIO7 [22]

PCH_ODD_EN [25]

1A-14

2013/11/01 change GPIO64 to PCH_ODD_EN and PD.

+1.05V_VCCST

3

2

1

R132 1K_4

R133

2

1K_4

1 3

Q16 MMBT3904-7-F

U3

NC1VCC

2

A

GND3Y

74AUP1G07GW

20130926 chnge GPIO port

2013/10/16 BIOS suggestion change SMI/SCI to GPIO0~15

1A-3

GPIO66 [8]

GPU GC6 2.0 function use GPIO2/3.

Q13 FDV301N

SYS_SHDN# [32,36]

+1.05V_VCCST

5

12

C154

0.1u/10V_4

4

+3V

2

R144 10K_4

1

PCH GPIO PU/PD

IRQ_SERIRQ DEVSLP0 DEVSLP1

SIO_RCIN# SIO_EXT_SMI# SIO_EXT_SCI#

GPIO85

GPIO87

GPIO88

GPIO89

GPIO90

GPIO91

GPIO92

GPIO93

GPIO94

R470 *10K_4

R514 *100K_4

R150 *EVG@10K_4

PCH_ODD_EN

GPIO65

TP_INT_PCH

GPIO84

I2C0_SDA_GPIO4

I2C0_SCL_GPIO5

GPIO67

GPIO68

GPIO69

DGPU_PWR_EN

I2C1_SDA_GPIO6

I2C1_SCL_GPIO7

DGPU_HOLD_RST#

GC6_FB_EN

1A-1 20131015 For GC6 NV DG GC6_FB_EN PD. 1A-8 20131022 Change GPIO83/84 GPU GC6 pin

to GPIO2/3.

1A-12 20131029 Change GPIO45 to PU S5,

duble GPIO58 one is GPIO56.

high UMA Only

GPU power is control by PCH

low

R500 EV@100K_4

GPIO (Discrete, SG or Optimize)

DGPU_PW_CTRL#

DGPU_PWROK

DGPU_PWROK PD on GPU side

LAN_DISABLE# GPIO8

ACCEL_INTA GPIO24 GPIO28 GPIO47 GPIO57 GPIO56 GPIO59 GPIO26 GPIO58 GPIO44 GPIO13 GPIO14 GPIO9 GPIO10 GPIO45

GPIO25

WK_GPIO27

1B-7 20131220 Change +3VPCU to +3V_S5

IMVP_PWRGD_3V [7]

Size Document Number Rev

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

Date: Sheet of

Tuesday, April 08, 2014

GPIO27 : If not used then use

8.2-kΩ to 10-kΩ pull-down to GND.

Quanta Computer Inc.

PROJECT :

LPT 4/6 (GPIO/MISC)

R494 10K_4 R496 *10K_4 R486 *10K_4 R506 10K_4 R73 10K_4 R131 10K_4

R77 10K_4 R152 10K_4 R67 10K_4 R81 10K_4 R484 10K_4 R483 10K_4 R78 10K_4 R480 10K_4 R479 10K_4 R69 10K_4 R473 10K_4 R94 10K_4 R59 10K_4 R474 2.2K_4 R475 2.2K_4 R130 10K_4 R128 10K_4 R581 10K_4 R513 10K_4 R54 10K_4 R53 10K_4 R478 10K_4 R79 *IV@10K_4

R499 *IV@1K_4

R96 *10K_4

R260 10K_4 R167 10K_4

R114 *10K_4 R101 10K_4 R520 10K_4 R113 10K_4

R104 10K_4 R183 10K_4 R163 10K_4 R120 10K_4 R523 10K_4 R558 10K_4 R115 10K_4 R263 10K_4 R161 10K_4 R105 10K_4 R127 10K_4 R556 *10K_4

R125 *10K_4 R560 *10K_4 R559 10K_4

non deep sx

1

ZQ0

10

+3V

+3V_S5

+3VPCU

10 46

3A

5

C437 *1u/6.3V_4 C163 1u/6.3V_4 C175 1u/6.3V_4

+1.05V

25mA

C149 1u/6.3V_4

R43 *SHORT_8

+1.05V_S5

+1.05V_DCPSUS2

Deep Sx

+3VPCU

+3V_S5

D D

R292 *0_6

+1.05V_S5

Non Deep Sx

+3V

C C

+1.05V

C164 1u/6.3V_4

WW15 4/10 Intel VCCDSW3 G3 can't boot issue.

C472

+PCH_VCCDSW+VCCPDSW

0.47u/25V_6

+1.05V_MODPHY

1.741A

C181 *1u/6.3V_4

R294 *0_6

C177

10u/6.3V_6

R568 *0_6

R569 *Short_6

C152

1u/6.3V_4

R49 *SHORT_8

+3VCC_S5

+V1.05S_AIDLE

10mA

C166

1u/6.3V_4

+V3.3DX_1.5DX_1.8DX_AUDIO

0.114A

41mA

C114 22u/6.3V_8

+1.05V

63mA

+3VCC_S5

PCH VCCHSIO Power

4

www.laptopblue.vn

1.838A

K9

L10

M9 N8 P9

+V1.05S_AUSB3PLL

+V1.05S_ASATA3PLL

+V1.05S_APLLOPI

+1.05V_DCPSUS3

C236 22u/6.3V_8

+VCCPDSW

+V3.3S_VCCPCORE

+V1.05S_AXCK_DCB +V1.05S_AXCK_LCPLL

C119 1u/6.3V_4

B18 B11

Y20

AA21

W21

AH14

AH13

AC9 AA9

AH10

K19 A20

R21 T21 K18 M20

V21 AE20 AE21

J13

V8

W9

J18

J17

Haswell ULT PCH (Power)

U25M

VCCHSIO VCCHSIO VCCHSIO VCC1_05 VCC1_05 VCCUSB3PLL VCCSATA3PLL

RSVD VCCAPLL VCCAPLL

DCPSUS3

VCCHDA

DCPSUS2

VCCSUS3_3 VCCSUS3_3 VCCDSW3_3 VCC3_3 VCC3_3

VCCCLK VCCCLK VCCACLKPLL VCCCLK VCCCLK VCCCLK RSVD RSVD RSVD VCCSUS3_3 VCCSUS3_3

HSW_ULT_DDR3L

HSIO

OPI

USB3

HDA

VRM

GPIO/LPC

LPT LP POWER

13 OF 19

3

RTC

SPI

CORE

THERMAL SENSOR

SERIAL IO

SUS OSCILLATOR

USB2

VCCSUS3_3

VCCRTC DCPRTC

VCCSPI

VCCASW VCCASW

VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCC1_05 DCPSUSBYP DCPSUSBYP

VCCASW

DCPSUS1 DCPSUS1

VCCTS1_5

VCC3_3 VCC3_3

VCCSDIO VCCSDIO

DCPSUS4

RSVD VCC1_05 VCC1_05

AH11 AG10 AE7

Y8

AG14 AG13

J11 H11 H15 AE8 AF22 AG19 AG20 AE9 AF9 AG8 AD10 AD8

J15 K14 K16

U8 T9

AB8

AC20 AG16 AG17

+VCCRTCEXT

+V3.3M_PSPI

PCH_VCC_1_1_21

+V1.05S_CORE_PCH

+1.05V_DCPSUS1

18mA

+PCH_VCCDSW

+V1.05M_VCCASW

0.109A

R293 *0_6

C143 1u/6.3V_4

+V3.3S_VCCSDIO +1.05V_DCPSUS4

2

R119 *Short_6

+V1.05M_VCCASW

+1.05V_S5

3mA 1mA

17mA

R291 *0_6

C197 1u/6.3V_4

C131

0.1u/10V_4

+V1.5S_VCCATS +V3.3S_VCCPTS

C139 1u/6.3V_4

C488

0.1u/10V_4

C148 1u/6.3V_4

0.658A

C142 1u/6.3V_4

+1.05V_S5

+1.05V +1.05V

C491

0.1u/10V_4

R117 *Short_6

R118 *0_6

C144

0.1u/10V_4

C159 1u/6.3V_4

C153 1u/6.3V_4

R108 *SHORT_8

C134 22u/6.3V_8

R111 *Short_6 R107 *Short_6

C183 1u/6.3V_4

C194 1u/6.3V_4

+3VCC_S5

+3V_RTC

C487 1u/6.3V_4

R48 *SHORT_8

C192 10u/6.3V_6

R100 *Short_6

1

11

+3V_S5 +3V

+1.05V

+1.5V +3V

+3V

+V1.05S_APLLOPI+1.05V

C99 1u/6.3V_4

+V1.05S_VCCUSBCORE

2

B B

1A-1 2013/10/11 del LDO change to MOS.

+1.05V_MODPHY +V1.05S_AUSB3PLL +1.05V_MODPHY +V1.05S_ASATA3PLL

A A

L7 2.2uH/210mA_8

C88

47u/6.3V_8

C77 47u/6.3V_8

C115 1u/6.3V_4

L28 2.2uH/120mA_6 C68

C89

47u/4V_8

42mA41mA

C79 47u/4V_8

C448 1u/6.3V_4

2013/10/31 PN change to H=0.85.L17 H=0.9

5

4

VCCAPLL power

L3 2.2uH/210mA_8

PCH HDA Power

+3V_S5

R196 *Short_6

3

C121

*47u/6.3V_8

11mA

+V3.3DX_1.5DX_1.8DX_AUDIO

C155

0.1u/10V_4

Place close to ball

57mA

C122 *47u/6.3V_8

R270 *SHORT_8

C151 1u/6.3V_4

+1.05V +V1.05S_AXCK_DCB

L5 2.2uH/210mA_8

+1.05V +V1.05S_AXCK_LCPLL

L2 2.2uH/210mA_8

+1.05V

0.2A

C112

47u/6.3V_8

C104 47u/6.3V_8

C158 1u/6.3V_4

31mA

47u/6.3V_8

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

C76 47u/6.3V_8

Quanta Computer Inc.

PROJECT :

LPT 5/6 (POWER)

C111 1u/6.3V_4

1

ZQ0

11 46

3A

5

4

3

2

1

www.laptopblue.vn

Haswell ULT (GND)

12

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

U25O

HSW_ULT_DDR3L

15 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31

D33 D34 D35 D37 D38 D39 D41 D42 D43 D45 D46 D47 D49

D50 D51 D53 D54 D55 D57 D59 D62

G18 G22

H13

E11 E17 F20 F26 F30 F34 F38 F42 F46 F50 F54 F58 F61

HSW_ULT_DDR3L

U25P

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

D5

VSS VSS VSS VSS VSS VSS VSS VSS VSS

D8

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS VSS

16 OF 19

VSS_SENSE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS

VSS

H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63

V58 AH46 V23 E62 AH16

VSS_SENSE_R

U25R

AT2

RSVD

AU44

RSVD

AV44

RSVD

D15

RSVD

F22

RSVD

H22

RSVD

J21

RSVD

R422 *short_4 R428 100/F_4

HSW_ULT_DDR3L

D D

C C

B B

A11 A14 A18 A24 A28 A32 A36 A40 A44 A48 A52 A56

AA1 AA58 AB10 AB20 AB22

AB7

AC61 AD21

AD3

AD63

AE10

AE5 AE58 AF11 AF12 AF14 AF15 AF17 AF18

AG1

AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57

AJ13 AJ14 AJ23 AJ25 AJ27 AJ29

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

U25N

14 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20

AP22 AP23 AP26 AP29

AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49

AR52

AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63

AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55

AP3

AR5

AU1

HSW_ULT_DDR3L

18 OF 19

VSS_SENSE [35]

RSVD RSVD RSVD RSVD

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

N23 R23 T23 U10

AL1 AM11 AP7 AU10 AU15 AW14 AY14

U25Q

DC_TEST_AY2_AW2 DC_TEST_AY3_AW3 TP_DC_TEST_AY60

TP134

DC_TEST_AY61_AW 61 DC_TEST_AY62_AW 62 TP_DC_TEST_B2

A A

5

TP77

DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_B62_B63

DC_TEST_C1_C2

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

4

HSW_ULT_DDR3L

17 OF 19

DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63

3

A3

DC_TEST_A3_B3

A4

TP_DC_TEST_A4

A60

TP_DC_TEST_A60

A61

DC_TEST_A61_B61

A62

TP_DC_TEST_A62

AV1

TP_DC_TEST_AV1

AW1

TP_DC_TEST_AW 1

AW2

DC_TEST_AY2_AW2

AW3

DC_TEST_AY3_AW3

AW61

DC_TEST_AY61_AW 61

AW62

DC_TEST_AY62_AW 62

AW63

TP_DC_TEST_AW 63

TP76 TP74 TP78

TP95 TP94

TP133

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

2

Monday, April 07, 2014

PROJECT :

LPT 6/6 (GND)

1

ZQ0

12 46

3A

5

H_SYS_PWROK_XDP

R287 *1K_4

+3V_S5

4

3

2

www.laptopblue.vn

1

13

+3V

D D

C C

B B

XDP_DBRESET_N

R657 *1K_4

HWPG_1.05V_S5[30,33]

SYS_PWROK[7]

R667 *0_6

R288 *0_4

APS3

XDP_PREQ#[4] XDP_PRDY#[4]

XDP_BPM#0[4] XDP_BPM#1[4]

PWR_DEBUG[5]

CLK_SDATA[8,14,15,24]

R668 *0_6

CFG0[6] CFG1[6]

CFG2[6] CFG3[6]

CFG4[6,8] CFG5[6]

CFG6[6] CFG7[6]

CLK_SCLK[8,14,15,24] XDP_TCK1[8] XDP_TCK0[4,8]

APS

CN20

A A

*ACES_88511-180N

1

APS1

1

2

3

APS3

3

4

5

6

7

APS7

7

8

9

10

11

12

13

14

15

16

17

18

5

R666 *0_6

R665 *0_4

R659 *0_6 R664 *0_4 R663 *0_4 R662 *0_4

R661 *0_6 R674 *0_4 R671 *0_4 R672 *0_4

+3VCC_S5

SYS_RESET#

SUSB# [7,30] PCH_SLP_S5# [7]

SUSC# [7,30] PCH_SLP_A# [7]

RTC_RST# [8] NBSWON# [21,30] SYS_RESET# [7]

4

+3VPCU

APS7APS1

VCCST_PWRGD[5]

XDP_PREQ_N XDP_PRDY_N

CFG0 CFG1

CFG2 CFG3

CFG4 CFG5

CFG6 CFG7

VCCST_PWRGD_XDP NBSWON#

H_SYS_PWROK_XDP

U19

NC1VCC

2

A

3

GND

*74AUP1G07GW

XDP_TDO

XDP_TDI

XDP_TMS

XDP_TRST_N

R393 *10K_4

NOA_STBP_0 NOA_STBN_0

CFG8 CFG9

CFG10 CFG11

NOA_STBP_1 NOA_STBN_1

CFG12 CFG13

CFG14 CFG15

CK_XDP_P_R CK_XDP_N_R

XDP_RST_R_N XDP_DBRESET_N

XDP_TDO XDP_TRST_N XDP_TDI XDP_TMS

+3V

NOA_STBP_0 [6] NOA_STBN_0 [6]

CFG8 [6] CFG9 [6]

CFG10 [6] CFG11 [6]

NOA_STBP_1 [6] NOA_STBN_1 [6]

CFG12 [6] CFG13 [6]

CFG14 [6] CFG15 [6]

R417 *0_4R286 *1K_4 R416 *0_4

R204 *1K_4 R658 *0_4

R395 *51_4

C176 *0.1u/10V_4

U20

14

VCC

2

1A

1

1OE

5

2A

4

2OE

9

3A

10

3OE

12

4A

13

4OE

*74CBTLV3126

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

SYS_RESET#

1B

2B

3B

4B

DPAD

GND

CPU/PCH XDP

Tuesday, April 08, 2014

CLK_PCIE_XDPP [9] CLK_PCIE_XDPN [9]

PLTRST# [7,16,21,24,26,27,30]

+1.05V_S5

3

6

8

11

15 7

Quanta Computer Inc.

PROJECT :

XDP_TDO_CPU [4]

XDP_TDI_CPU [4]

XDP_TMS_CPU [4]

XDP_TRST# [4,8]

ZQ0

13 46

1

3A

TP125

TP106

TP128

TP117

TP129

TP35

TP131

TP121 TP120

TP27

TP130

TP19 TP107

TP113

TP109

TP114

TP118

TP115

TP112

TP116

TP122

TP28

TP127

TP30

TP97

TP62 TP140

TP96

TP8

TP59

TP136

TP139 TP88

TP119 TP45

TP90

TP126

TP91

TP7

TP92

XDP_TDO[8]

XDP_TDI[8]

XDP_TMS[8]

+1.05V

+3V

5

*0.1u/10V_4

4

Y

3

C387

12

1

M_A_A[15:0][3]

A A

M_A_BS#0[3] M_A_BS#1[3] M_A_BS#2[3] M_A_CS#0[3] M_A_CS#1[3] M_A_CLK0[3] M_A_CLK0#[3] M_A_CLK1[3] M_A_CLK1#[3] M_A_CKE0[3] M_A_CKE1[3] M_A_CAS#[3] M_A_RAS#[3]

CLK_SCLK[8,13,15,24]

CLK_SDATA[8,13,15,24]

M_A_ODT0_DIMM[4] M_A_ODT1_DIMM[4]

M_A_DQS[7:0][3]

M_A_DQS#[7:0][3]

C296 10u/6.3V_6

+DDR_VTT_RUN

M_A_WE#[3]

C295 10u/6.3V_6

C312 1u/6.3V_4

C294

0.1u/10V_4

R258 10K_4 R254 10K_4

1A-8

2013/10/23 Change DIMM1_SA0/SA1

B B

to DIMM0_SA0/SA1.

1A-2

2013/10/16 Chage net name M_B_DQS#[7:0] to

C C

+1.35V_SUS

C315 10u/6.3V_6

+3V

C298

2.2u/6.3V_6

D D

M_A_DQS#[7:0].

Place these Caps near SO-DIMM

C320 10u/6.3V_6

C293 10u/6.3V_6

C314 10u/6.3V_6

C289

0.1u/10V_4

1

C319

0.1u/10V_4

C318

0.1u/10V_4

C303 1u/6.3V_4

2

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

C291

0.1u/10V_4

2

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

C316

0.1u/10V_4

C323 1u/6.3V_4

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

JDIM2A

www.laptopblue.vn

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM1_H=4.0_STD

+SMDDR_VREF_DIMM

+

C297

C321

330u/2V_7343

0.1u/10V_4

C305 1u/6.3V_4

C306

4.7u/6.3V_6

3

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

2.2u/6.3V_6

3

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

+SMDDR_VREF_DQ0

C336

0.1u/10V_4

C311

4.7u/6.3V_6

C299

C288

2.2u/6.3V_6

C324

4.7u/6.3V_6

4

M_A_DQ2 [3] M_A_DQ6 [3] M_A_DQ7 [3] M_A_DQ3 [3] M_A_DQ0 [3] M_A_DQ1 [3] M_A_DQ5 [3] M_A_DQ4 [3] M_A_DQ9 [3]

M_A_DQ8 [3] M_A_DQ15 [3] M_A_DQ11 [3] M_A_DQ12 [3] M_A_DQ13 [3] M_A_DQ14 [3] M_A_DQ10 [3] M_A_DQ16 [3] M_A_DQ17 [3] M_A_DQ19 [3] M_A_DQ18 [3] M_A_DQ21 [3] M_A_DQ20 [3] M_A_DQ23 [3] M_A_DQ22 [3] M_A_DQ25 [3] M_A_DQ24 [3] M_A_DQ31 [3] M_A_DQ26 [3] M_A_DQ28 [3] M_A_DQ29 [3] M_A_DQ27 [3] M_A_DQ30 [3] M_A_DQ33 [3] M_A_DQ32 [3] M_A_DQ35 [3] M_A_DQ34 [3] M_A_DQ36 [3] M_A_DQ37 [3] M_A_DQ39 [3] M_A_DQ38 [3] M_A_DQ46 [3] M_A_DQ44 [3] M_A_DQ41 [3] M_A_DQ45 [3] M_A_DQ40 [3] M_A_DQ42 [3] M_A_DQ43 [3] M_A_DQ47 [3] M_A_DQ49 [3] M_A_DQ52 [3] M_A_DQ54 [3] M_A_DQ53 [3] M_A_DQ48 [3] M_A_DQ55 [3] M_A_DQ51 [3] M_A_DQ50 [3] M_A_DQ56 [3] M_A_DQ60 [3] M_A_DQ58 [3] M_A_DQ62 [3] M_A_DQ57 [3] M_A_DQ61 [3] M_A_DQ63 [3] M_A_DQ59 [3]

CHA CHB

4

+VREF_CA_CPU

M3 solution

+VREFDQ_SA_M3

M3 solution

SA0SA1

0 0

01

5

DDR3_DRAMRST#[4,15]

R382 *Short_6

R238 *Short_6

5

R259 *10K_4

+3V

+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM

R311 2/F_6

C334

0.022u/16V_4

1 2

R381

24.9/F_4

R244 2/F_6

C287

0.022u/16V_4

1 2

R242

24.9/F_4

6

+1.35V_SUS

2.48A

+3V

PM_EXTTS#0

C309 *0.1u/10V_4

+SMDDR_VREF_DQ0

M1 solution

+1.35V_SUS

R310

1.8K/F_4

R295

1.8K/F_4

M1 solution

+1.35V_SUS

R252

1.8K/F_4

R251

1.8K/F_4

6

7

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4.0_STD

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+DDR_VTT_RUN

Vref_CA

+SMDDR_VREF_DIMM

C322 470p/50V_4

Vref_DQ

+SMDDR_VREF_DQ0

C300 470p/50V_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

Date: Sheet of

Monday, April 07, 2014

PROJECT :

DDR3 MEMORY SO-DIMM A

7

ZQ0

14 46

8

14

8

3A

Acer e5-471G Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual