Acer E5-421 Schematic

5

4

3

2

1

ZQN BLOCK DIAGRAM

D D

DDRIII-SODIMM1 (STD)

DDRIII-SODIMM2 (RVS)

One Channel DDR III

SATA 0

SATA - HDD

C C

SATA 1

SATA - ODD

USB 2.0 Connector

CardReader Connector

USB/IO Board Connector

GL834L

Card Reader

USB2.0(Port 0 and Port 5)

USB2.0(Port 6)

BEEMA

IMC

CLK

SATA0

SATA1

USB2.0

BGA 769

FT3B

APU

PEG TX/RX

eDP

Display

HDMI

USB3.0

PCI-E x1

PEG0~3(PCI-E x4)

INT_eDP

INT_CRT

INT_HDMI

USB3

X'TAL

32.768KHz

GPU

Jet XT(25W)

29mm X 29mm

USB-1 (CCD)

USB-3 (TouchS)

PCIE-1

USB-7

X'TAL

27.0MHz

eDP/CCD Con.

USB 3.0 Connector

Channel B

CRT Con.

HDMI Con.

MINI CARD WLAN

VRAM

VRAM DDR3-512MB*4 = 2GB

SD

X'TAL 48MHz

B B

Touch Pad Connector

MCU

USB2.0(Port 2)I2C

PCIE-2

RTL8111GS-CG

10/100/1G

X'TAL 25MHz

RJ45

CLK

BQ24737

Batery Charger

TPS51225

3V/5V

TPS51216

+1.5V_SUS

TPS51211

0.95V_S5

Size Document Number Rev

Date: Sheet of

3

SPI ROM

8M

BATTERY

2

SPI

Azalia

ALC283-CG

AUDIO CODEC

A A

Universal Jack

5

4

K/B Con.

IHDA

LPC

EC

ITE8587

HALL SENSOR

RTC

Fan Driver

P20

P21

P22

P23

ISL62771

CPU core/VAXG

TPS54318RTER

+1.8V

TPS54318RTER

+1.5V_GFX

TPS54318RTER

+PCIE_VDDC_GFX

TPS51728RHAR

GPU_Core

Quanta Computer Inc.

PROJECT :

Block Diagram

ZQN

1

P24

P25

1 39Tuesday, April 29, 2014

1A

1

2

3

4

5

6

7

8

Power Sequence

ACIN

3V/5VPCU

4

NBSWON#

DNBSWON #

S5_ON/S5

RSMRST#

PCIE_WAKE#

SUSC

SUSB

SUSON

MAINON

VR_ON

CPU_CORE

VRM_PWRGD

HWPG

ECPWROK

PWR_GOOD

PCI_RST#

Thermal Follow Chart

APU CORE PWR

CORE_PW M_PROCHOT#

5

H/W Th rottling

SM-Bus

APU

EC

6

THERM_ALERT#

PROCHOT_EC

CPUFAN#

S5_ON

FANFAN Driver

NTC Thermal Protection

Size Document Number Rev

PWR Status & GP U PW R CRL

Date: Sheet of

7

SYS_SHDN#

Quanta Computer Inc.

PROJECT :

3V/5 V SYS PW R

ZQN

2 39Tuesday , April 29, 201 4

8

1A

A A

B B

Power States

POWER PLANE

VIN

+1.5V_RTC

+3VPCU

+5VPCU

+15V

VOLTAGE

+10V~+19V

+1.5V

+3.3V

+5V

+15V

+3.3V

C C

+5V_S5

+5V

DESCRIPTION

RTC POWE R

EC POW ER

CHARGE POWER

CHARGE PUMP POW ER

LAN/ TPM POWE R

USB POWE R

APU POWER+1.8V+1.8V_S5 S0-S5S5_ON

+0.95V_S 5 +0.95V APU CORE POWER S0-S5S5_ON

+5V

+1.5VSUS

+SMDDR_VTT

+1.8V

+1.5V

+0.95V

+VDDNB_CORE

LCDVCC

+VGPU_CORE

D D

+1.5V_GFX

+1.8V_GFX

+3V_GFX

1

+5V

+3.3V

+1.5V

+0.75V

+1.8V

+1.5V

+0.95V

variation

+3.3V

variation

+1.5V

+1.8V

+3V

HDD/ODD/Codec /TP/CRT/HDMI POWER

APU/Peripheral co mponent /WL AN POWER+3V

CPU/SODIMM CORE POWE R

SODIMM Terminatio n POWE R

APU POWER

MINI CARD

APU CORE POW ER MAINON

APU CORE POW ER

LCD POW ER

GPU POWE R

2

CONTROL SIGNAL

ALWAYSMAIN POWER

ALWAYS

S5_ON+3V_S5

S5_ON

MAINON

SUSON

MAINON

VRON

LVDS_VDDEN

DGPU_PW REN S0

DGPU_PW REN

3

ACTIVE IN

ALWAYS

ALWAYSALWAYS

S0-S5

S0

S0-S3

S0

5

4

3

2

1

M_A_DQ[0..63] <9,10>

R10

P_GPP_RXP0

R8

PCIE_RXP1<24> PCIE_RXN1<24>

PCIE_RXP2_LAN<23> PCIE_RXN2_LAN<23>

+0.95V +0.95V

+1.5V_SUS

R330 1.69K/F_4 R3291K/F_4

PEG_RXP0<11> PEG_RXN0<11>

PEG_RXP1<11> PEG_RXN1<11>

PEG_RXP2<11> PEG_RXN2<11>

PEG_RXP3<11> PEG_RXN3<11>

+1.5V_SUS

R467

1K/F_4

R464

1K/F_4

PCIE_RXP1 PCIE_RXN1

PCIE_RXP2_LAN PCIE_RXN2_LAN

P_TX_ZVDD_095 P_RX_ZVDD_095

C627

C630

1000P/50V_4

0.1U/10V_4

R5 R4

N5 N4

N10

N8

W8

L5 L4

J5 J4

G5 G4

D7 E7

P_GPP_RXN0

P_GPP_RXP1 P_GPP_RXN1

P_GPP_RXP2 P_GPP_RXN2

P_GPP_RXP3 P_GPP_RXN3

P_TX_ZVDD_095

P_GFX_RXP0 P_GFX_RXN0

P_GFX_RXP1 P_GFX_RXN1

P_GFX_RXP2 P_GFX_RXN2

P_GFX_RXP3 P_GFX_RXN3

C633

0.47u/10V_4

1 2

U24A

KABINI

PART 1 OF 9

GFX

FT3B_Beema

P_GPP_TXP0 P_GPP_TXN0

P_GPP_TXP1 P_GPP_TXN1

P_GPP_TXP2 P_GPP_TXN2

P_GPP_TXP3 P_GPP_TXN3

PCIE I/F

P_RX_ZVDD_095

P_GFX_TXP0 P_GFX_TXN0

P_GFX_TXP1 P_GFX_TXN1

P_GFX_TXP2 P_GFX_TXN2

P_GFX_TXP3 P_GFX_TXN3

L2 L1

PCIE_TXP1_C

K2

PCIE_TXN1_C

K1

PCIE_TXP2_LAN_C

J2

PCIE_TXN2_LAN_C

J1

H2 H1

W7

PEG_TXP0_C

G2

PEG_TXN0_C

G1

PEG_TXP1_C

F2

PEG_TXN1_C

F1

PEG_TXP2_C

E2

PEG_TXN2_C

E1

PEG_TXP3_C

D2

PEG_TXN3_C

D1

C565 0.1U/10V_4 C566 0.1U/10V_4

C571 0.1U/10V_4 C572 0.1U/10V_4

C559 *EV@0.1u/10V_4 C550 *EV@0.1u/10V_4

C558 *EV@0.1u/10V_4 C557 *EV@0.1u/10V_4

C570 *EV@0.1u/10V_4 C569 *EV@0.1u/10V_4

C556 *EV@0.1u/10V_4 C555 *EV@0.1u/10V_4

Power trace tracking

+1.5V_SUS<7,9,10,32,37>

+1.5V_SUS

PCIE_TXP1 <24> PCIE_TXN1 <24>

PCIE_TXP2_LAN <23> PCIE_TXN2_LAN <23>

PEG_TXP0 <11> PEG_TXN0 <11>

PEG_TXP1 <11> PEG_TXN1 <11>

PEG_TXP2 <11> PEG_TXN2 <11>

PEG_TXP3 <11> PEG_TXN3 <11>

KABINI

PART 2 OF 9

U24B

MEMORY I/F

FT3B_Beema

M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7

M_DATA8

M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15

M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23

M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31

M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39

M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47

M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55

M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63

M_CHECK0 M_CHECK1 M_CHECK2 M_CHECK3 M_CHECK4 M_CHECK5 M_CHECK6 M_CHECK7

M_ZVDDIO_MEM_S

M_VREF

M_VREFDQ

B30 A32 B35 A36 B29 A30 A34 B34

B37 A38 D40 D41 B36 A37 B41 C40

F40 F41 K40 K41 E40 E41 J40 J41

M41 N40 T41 U40 L40 M40 R40 T40

AF40 AF41 AK40 AK41 AE40 AE41 AJ40 AJ41

AM41 AN40 AT41 AU40 AL40 AM40 AR40 AT40

AV41 AW40 BA38 AY37 AU41 AV40 AY39 AY38

BA36 AY35 BA32 AY31 BA37 AY36 BA33 AY32

V41 W40 AB40 AC40 U41 V40 AA41 AB41

AD41 AD40 AC38

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7

M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15

M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23

M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31

M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39

M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47

M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55

M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

+M_ZVDDIO M_VREF

R466 39.2/F_4

M_A_A[15:0]<9,10>

D D

M_A_BS#[2..0]<9,10>

M_DM[7..0]<9,10>

C C

R113 1K/F_4

+1.5V_SUS

M_A_EVENT#<9,10>

B B

DDR3_DRAMRST#<9,10>

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_BS#0 M_A_BS#1 M_A_BS#2

M_DM0 M_DM1 M_DM2 M_DM3 M_DM4 M_DM5 M_DM6 M_DM7

M_A_DQS0<9,10> M_A_DQS#0<9,10> M_A_DQS1<9,10> M_A_DQS#1<9,10> M_A_DQS2<9,10> M_A_DQS#2<9,10> M_A_DQS3<9,10> M_A_DQS#3<9,10> M_A_DQS4<9,10> M_A_DQS#4<9,10> M_A_DQS5<9,10> M_A_DQS#5<9,10> M_A_DQS6<9,10> M_A_DQS#6<9,10> M_A_DQS7<9,10> M_A_DQS#7<9,10>

M_A_CLK0<9> M_A_CLK0#<9> M_A_CLK1<9> M_A_CLK1#<9> M_B_CLK0<10> M_B_CLK0#<10> M_B_CLK1<10> M_B_CLK1#<10>

M_A_CKE0<9> M_A_CKE1<9> M_B_CKE0<10> M_B_CKE1<10>

M_A_ODT0<9> M_A_ODT1<9> M_B_ODT0<10> M_B_ODT1<10>

M_A_CS#0<9> M_A_CS#1<9> M_B_CS#0<10> M_B_CS#1<10>

M_A_RAS#<9,10> M_A_CAS#<9,10> M_A_WE#<9,10>

AG38

W35 W38 W34

AG34

AN34

AJ38

AG35

AG40 AN41 AY40 AY34

AH41 AH40 AP41 AP40 BA40 AY41 AY33 BA34 AA40

AC35 AC34

AA34 AA32 AE38 AE37 AA37 AA38

AE34

AN38 AU38 AN37 AR37

AJ34 AR38 AL38 AN35

AJ37 AL34 AL35

U38 U37 U34 R35 R38 N38

R34 N37

L38 L35

N34

B32 B38 G40 N41

Y40

B33 A33 B40 A40 H41 H40 P41 P40

Y41

G38

L34 J38 J37 J34

M_ADD0 M_ADD1 M_ADD2 M_ADD3 M_ADD4 M_ADD5 M_ADD6 M_ADD7 M_ADD8 M_ADD9 M_ADD10 M_ADD11 M_ADD12 M_ADD13 M_ADD14 M_ADD15

M_BANK0 M_BANK1 M_BANK2

M_DM0 M_DM1 M_DM2 M_DM3 M_DM4 M_DM5 M_DM6 M_DM7 M_DM8

M_DQS_H0 M_DQS_L0 M_DQS_H1 M_DQS_L1 M_DQS_H2 M_DQS_L2 M_DQS_H3 M_DQS_L3 M_DQS_H4 M_DQS_L4 M_DQS_H5 M_DQS_L5 M_DQS_H6 M_DQS_L6 M_DQS_H7 M_DQS_L7 M_DQS_H8 M_DQS_L8

M_CLK_H0 M_CLK_L0 M_CLK_H1 M_CLK_L1 M_CLK_H2 M_CLK_L2 M_CLK_H3 M_CLK_L3

M_RESET_L M_EVENT_L

M0_CKE0 M0_CKE1 M1_CKE0 M1_CKE1

M0_ODT0 M0_ODT1 M1_ODT0 M1_ODT1

M0_CS_L0 M0_CS_L1 M1_CS_L0 M1_CS_L1

M_RAS_L M_CAS_L M_WE_L

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

ME M/PCIE (1/6)

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

ZQN

1A

3 39Tuesday, March 11, 2014

1

3 39Tuesday, March 11, 2014

1A

5

4

3

2

1

+3V

R397 1K/F_4 R423 1K/F_4 R410 1K/F_4 R407 1K/F_4 R391 4.7K_4 R378 4.7K_4

APU_VDD_18

+3V

+1.8V

R412 300_4

R406 300_4

R388 1K/F_4 R389 *1K/F_4

R109 *1K/F_4 R108 *1K/F_4

D D

Can remove on MP(For HDT test)

APU_RST#

C C

APU_PWRGD APU_PWRGD_BUF

CORE_PWM_PROCHOT# APU_SIC APU_SID APU_ALERT#

DDCCLK DDCDATA

APU_RST#

APU_PWRGD

CRT_HSYNC

APU_LDT_RST_HTPA# APU_PWRGD_BUF

U23

1

1A

2

GND

3

2A

*SN74LVC2G07DCKR

HDMI

eDP

Reserve

+3V

C605

*0.1U/10V_4

APU_LDT_RST_HTPA#

6

1Y

5

VCC

4

2Y

CORE_PWM_PROCHOT#<5,29,34>

VDD_095_FB_H<33>

VDD_095_FB_L<33>

APU_RST#

R424 *0_4

APU_PWRGD

R413 *0_4

*150p/50V_4

C607

INT_HDMITX2P<22>

INT_HDMITX2N<22>

INT_HDMITX1P<22>

INT_HDMITX1N<22>

INT_HDMITX0P<22>

INT_HDMITX0N<22>

INT_HDMICLK+<22>

INT_HDMICLK-<22>

VDD_095_FB_H VDD_095_FB_L

EDP_TX0<21> EDP_TX0#<21>

EDP_TX1<21> EDP_TX1#<21>

C606

*150p/50V_4

Power trace tracking

+3V

+3V<5,7,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37>

APU_VDD_18<7,34>

APU_VDD_18

INT_HDMITX2P INT_HDMITX2N

INT_HDMITX1P INT_HDMITX1N

INT_HDMITX0P INT_HDMITX0N

INT_HDMICLK+ INT_HDMICLK-

EDP_TX0 EDP_TX0#

EDP_TX1 EDP_TX1#

SVT SVC SVD

APU_SIC APU_SID

LDT_RST#

LDT_PWRGD

CORE_PWM_PROCHOT#

APU_ALERT#

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

A9

TDP1_TXP0

B9

TDP1_TXN0

A10

TDP1_TXP1

B10

TDP1_TXN1

A11

TDP1_TXP2

B11

TDP1_TXN2

A12

TDP1_TXP3

B12

TDP1_TXN3

A4

LTDP0_T XP0

B4

LTDP0_T XN0

A5

LTDP0_T XP1

B5

LTDP0_T XN1

A6

LTDP0_T XP2

B6

LTDP0_T XN2

A7

LTDP0_T XP3

B7

LTDP0_T XN3

K15

DISP_CLKIN_H

H15

DISP_CLKIN_L

G31

SVT

D27

SVC

E29

SVD

B22

SIC

B21

SID

B20

APU_RST_L

A20

LDT_RST_ L

B19

APU_PWROK

A19

LDT_PWROK

A22

PROCHOT_L

B18

ALERT_L

D29

TDI

D31

TDO

D35

TCK

D33

TMS

G27

TRST_L

B25

DBRDY

A25

DBREQ_L

D23

VDDCR_NB_SENSE

G23

VDDCR_CPU_SENSE

E25

VDDIO_MEM_S_SENSE

E23

VSS_SENSE

AV33

VDD_095_F B_H

AU33

VDD_095_F B_L

VSS_SENSE APU_VDD_RUN_FB_L VDDCR_APU_SENSE

VDDCR_NB_SENSE

FT3B_Beema

R85 *SHORT_4 R84 *SHORT_4

R93 *SHORT_4

R90 *SHORT_4

ANALOG/DISPLA Y/MISC

DISPLAYPORT 0 DISPLA YPORT 1

CLK

SER

JTAG CTRL

KABINI

PART 4 OF 9

U24D

DP_150_ZVSS

DP_2K_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

DP MISC

TDP1_AUXP TDP1_AUXN

TDP1_HPD

LTDP0_AUXP LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_GREEN

DAC_BLUE

DAC_HSYNC DAC_VSYNC

DAC_SCL

VGA DAC

DAC_SDA

DAC_ZVSS

THERMDA THERMDC

DIECRACKMON

PLLTEST1

PLLTEST0 BYPASSCLK_H BYPASSCLK_L

PLLCHRZ_H

TEST

PLLCHRZ_L

GIO_TSTDT M0_SERIALCLK

GIO_TSTDT M0_CLKINIT

USB_ATEST0 USB_ATEST1 M_ANALOGIN

M_ANALOGOUT

TMON_CAL

HDMI_EN/DP_STEREOSYNC

APU_VDD_RUN_FB_H

VDDIO_MEM_S_SENSEVDDIO_MEM_S_SENSE_R

APU_VDDNB_RUN_FB_H

M_TEST

FREE_2

BP0 BP1 BP2 BP3

DP_150_ZVSS

B16

DP_2K_ZVSS

A21

APU_BLEN

B17

APU_DISP_ON

A17

APU_DPST_PWM

A18

HDMI_DDCCLK_SW

D17

HDMI_DDCDATA_SW

E17

HDMI_HPD

H19

EDP_AUX

D15

EDP_AUX#

E15

EDP_HPD

H17

B14 A14 B15

CRT_HSYNC

G19

CRT_VSYNC

E19

D19 D21

DAC_ZVSS

A16

APU_THERMDA_R

H27

APU_THERMDC_R

H29 D25 A27

BP0

B27

BP1

A26

BP2

B26

BP3

B28

PLLTEST1

A28

PLLTEST0 BYPASSCLK_H

B24

BYPASSCLK_L

A24

PLLCHRZ_H

AV35

PLLCHRZ_L

AU35

M_TEST

E33

FREE_2

A29

GIO_TSTDTMO_SERIALCLK

H21

GIO_TSTDTM0_CLKINIT

H25

USB_ATEST0

AJ10

USB_ATEST1

AJ8

M_ANALOGIN

R32

M_ANALOGOUT

N32

TMON_CAL

AP29

DP_STEREOSYNC

E21

R400 150/F_4 R425 2k/F_4

R380 *SHORT_4 R387 *SHORT_4

R404 499/F_4

TP24 TP25

TP64

TP28 TP29 TP27

TP65

TP21 TP20 TP67 TP68 TP26

R381 *1K/F_4 R382 *1K/F_4

APU_VDD_RUN_FB_L <34> APU_VDD_RUN_FB_H <34>

VDDIO_MEM_S_SENSE <32>

APU_VDDNB_RUN_FB_H <34>

APU_BLEN <21,29> APU_DISP_ON <21> APU_DPST_PWM <21>

HDMI_DDCCLK_SW <22> HDMI_DDCDATA_SW <22>

HDMI_HPD <22>

EDP_AUX <21> EDP_AUX# <21>

EDP_HPD <21>

HSYNC <21>

R383

VSYNC <21>

DDCCLK <21>

DDCDATA <21>

R446 *1K/F_4

R445 *1K/F_4 R444 *1K/F_4 R449 1K/F_4 R450 1K/F_4 R441 510/F_4 R440 510/F_4

R87 *1K/F_4 R86 *1K/F_4 R97 *1K/F_4 R98 *1K/F_4

150/F_4

DIFFERENTIAL ROUTING

+1.8V

R390

150/F_4

R396

150/F_4

CRT_R <21> CRT_G <21> CRT_B <21>

HDT(Hardware Debug Tool ) Connector

B B

+1.8V +1.8V +1.8V

R117 1K/F_4

APU_TRST#

R118 *SHORT_4

R119 10K_4 R120 10K_4 R121 10K_4

HDT_TRST# APU_PWRGD_BUF

Serial VID

R422

R432

R439

*1K/F_4

SVT

SVC

SVD

A A

APU_PWRGD

5

CN1

1

CPU_VDDIO

3

GND

5

GND

7

GND

9

CPU_TRST_L

11

CPU_DBRDY 3

13

CPU_DBRDY 2

15

CPU_DBRDY 1

17

GND

19

CPU_VDDIO

*HDT

+1.8V

R421 33_4

R438 33_4

R431 33_4

R405 *SHORT_4

HDT+ HEADER / PLACE ON TOP

R437

R420

*300/F_4

R403

R436

*220/F_4

*0_4

CPU_TCK

CPU_TMS

CPU_TDI

CPU_TDO

CPU_PWROK_BUF

CPU_RST_L_BUF

CPU_DBRDY 0

CPU_DBREQ_L

CPU_PLLTEST0

CPU_PLLTEST1

R430

*300/F_4

R429

*0_4

APU_TCK

2

APU_TMS

4

APU_TDI

6

APU_TDO

8 10

APU_LDT_RST_HTPA#

12

APU_DBRDY

14

APU_DBREQ#

16

J108_PLLTST0

18

J108_PLLTST1

20

R399

*2.2K_4

APU_SVT <34>

APU_SVC <34>

APU_SVD <34>

APU_PWRGD_SVID_REG <34>

VFIX MODE

SVDSVC

0

0 0 110 0.9V

11

4

R105 1K/F_4 R106 1K/F_4 R107 1K/F_4

R110 1K/F_4 R111 *SHORT_4 R112 *SHORT_4

VID Override table (VDD)

Boot Voltage

1.1V

1.0V

0.8V

SMBUS (Internal Thermal sensor)

+3V

2

3

2N7002K Q33

2

3

2N7002K Q31

R426 *0_4 R411 *0_4

THERM_ALERT# APU_ALERT#

MMST3904-7-F

*MMST3904-7-F

PLLTEST0 PLLTEST1

2ND_MBCLK<12,29>

2ND_MBDATA<12,29>

THERM_ALERT#<28>

3

Q30

Q29

1

+3V

2

+3V

2

R401 10K/F_4

13

R392 *10K/F_4

CORE_PWM_PROCHOT#

13

APU_SIC

APU_SID

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DIS/MISC (2/6)

Date: Sheet of

Date: Sheet

PROJECT :

ZQN

of

4 39Tuesday, April 29, 2014

1

1A

5

4

3

2

1

Test mode setting (Follow AMD's suggestion)

+3V_S5

NC,no install by default

R409 *1K/F_4

R386 *1K/F_4

R374 *1K/F_4

TEST2 TEST1 TEST0 Description

D D

0

0 0

0

1

TMS

1 TMS

External pull-up

C C

+3V_S5

To Azalia

B B

Board ID

+3V

A A

APU_TEST0

APU_TEST1

APU_TEST2

FCH TAP accessible from APU when TAPEN is asserted FCH JTAG pins are overloaded for multiple functions, in this configuration the FCH JTAG are used as non-JTAG pins

1

Reserved

X

Reserved

FCH JTAG multi-function pins are configured as

0

JTAG pins, in this configuration the FCH TAP can be accessed from FCH JTAG pins

Use on ATE only Yuba JTAG enabled 1

+3V

R451 2.2K_4

R448 2.2K_4

R379 *10K/ F_4

J1 *0_ 4

R88 *10K/F_4

R92 100K_4

R416 2. 2K_4

R417 2. 2K_4

R332 10 K/F_4

R331 10 K/F_4

ACZ_SDOUT_R

ACZ_SYNC_R

ACZ_BCLK_R

ACZ_RST#_R

PCH_AZ_CODEC_SDIN0

ACZ_BCLK_R

PCH_AZ_CODEC_SDIN0

R104 *10K_4 R443 *10K_4 R434 *10K_4 R419 *10K_4 R428 10K_4

GPIO

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

+3V_S5

(Depend on cable) (Depend on cable)

R360 *10K/F _4 R315 *10K/F _4 R314 *10K/F _4 R313 *10K/F _4

CLK_SCLK

CLK_SDATA

SYS_RST#

R316 33_4

R327 33_4

R317 33_4

R324 33_4

R328 *10K/F _4

R323 *10K/F _4

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4

High

d'TPM

d'GPU

17"

Reserve

Touch

RAMID_0 RAMID_1 RAMID_2 RAMID_3

R408 15K/F_4

R385 15K/F_4

R373 15K/F_4

TP_I2C_INT#_APU

PCIE_WAKE#

SCL1

SDA1

USB_OC1#

USB_OC2#

R101 10K_4 R442 10K_4 R433 10K_4 R418 10K_4 R427 *10K_4

R365 10K/F_4 R326 10K/F_4 R325 10K/F_4 R322 10K/F_4

PCH_AZ_CODEC_SDOUT <2 5>

PCH_AZ_CODEC_SYNC <25>

PCH_AZ_CODEC_BITCLK <25>

PCH_AZ_CODEC_RST# <25>

PCH_AZ_CODEC_SDIN0 <25>

Low

i'TPM

UMA

14"

Reserve

None Touch

S0-domai n

DGPU_PWREN<37>

TP SMBus

TP_SMCLK<2 8>

PLTRST#<24 ,29>

PCIE_CLKREQ_WLAN#<24> PCIE_REQ_LAN#<23>

PCIE_REQ_GPU#<12>

CORE_PWM_PROCHOT#<4,29,34>

+3V

PR191 *EV@100K/F_6

R531 *SHORT_4

C616 *EV@0.1U/10V_4

R461 *2.2K_4

1

R453 *0_4

DNBSWON#<29> SYS_PWRGD<8,28 > SYS_RST#<8>

PCIE_LAN_WAKE#<23,24>

SIO_A20GATE<29> SIO_EXT_SCI#<29> SIO_EXT_SMI#<29> LPCPD#<24,28>

CLK_SCLK<9 ,10,24> CLK_SDATA<9,10,24>

S5-domai n

BOARD_ID4<21>

DGPU_RST_L<11>

+3V_S5

2

+3V_S5

C597 150P/50V_4

PLTRST#

SUSB#<8,29> SUSC#<2 9>

KBRST#<29>

SPKR<25>

R100 *0_4 R560 10 K/F_4

R558 10 K/F_4 R559 10 K/F_4

GPU_Enable

Q34

3

SCL1

*2N7002K

R367 33_4

R91 *SHORT_ 4 C220 *100p/50V_4

TP63 TP60 TP57

PCIE_CLKREQ_WLAN# PCIE_REQ_LAN#

R447 *0_4

BOARD_ID0 BOARD_ID1 BOARD_ID2

BOARD_ID3 BOARD_ID4

PROCHOT#_CT RL

GEVENT2#<8>

PE_PWRGD<37>

PCH_RSMRST#<29>

LPC_RST#_R

PCIE_RST#

PCH_RSMRST#_R

DNBSWON# SYS_PWRGD SYS_RST#

PCIE_WAKE#

SUSB# SUSC#

APU_TEST0 APU_TEST1 APU_TEST2

KBRST# SIO_A20GATE

SIO_EXT_SCI# SIO_EXT_SMI#

LPCPD#

CLK_SCLK CLK_SDATA

SCL1 SDA1

TP_INT_APU

GPU_Enable

RAMID_0

GEVENT2#

TS interrupt (reserve only)

RAMID_1 RAMID_2 RAMID_3RAMID_0RAM

R462

Reserve Reserve Reserve Reserve Reserve

5

TP_SMDATA<28>

4

*2.2K_4

2

1

R454 *0_4

Q35

3

*2N7002K

SDA1

3

U24C

AY4

LPC_RST_L

AY9

PCIE_RST_L

AY5

RSMRST_L

BA8

PWR_BTN_L

AM19

PWR_GOOD

AY7

SYS_RESET_L/GEVENT19_L

AW11

WAKE_L/GEVENT8_L

AY3

SLP_S3_L

BA5

SLP_S5_L

AU13

TEST0

AY10

TEST1/TMS

AY6

TEST2

AR23

KBRST_L

AR31

GA20IN/GEVENT0_ L

AN5

LPC_PME_L/GEVENT3_ L

AL7

LPC_SMI_L/GEVENT23 _L

AV2

LPC_PD_L/G EVENT5_L/SPI_TPM_CS_L

AP15

AC_PRES/IR_RX0/G EVENT16_L

AV13

IR_TX0/GEVENT21_ L

BA9

IR_TX1/GEVENT6_L

BA10

IR_RX1/GEVENT20 _L

AV15

IR_LED_L/L LB_L/GPIO184

AU29

CLK_REQ0_L /SATA_IS0_L/SATA_ZP0_L/GPI O60

AW29

CLK_REQ1_L /GPIO61

AR27

CLK_REQ2_L /GPIO62

AV27

CLK_REQ3_L /SATA_IS1_L/SATA_ZP1_L/GPI O63

AY29

CLK_REQG_L /GPIO65/OSCIN

AU25

SCL0/GPIO4 3

AV25

SDA0/GPIO47

AY11

SCL1/GPIO2 27

BA11

SDA1/GPIO22 8

AP27

GPIO49

AY28

GPIO50

BA28

GPIO51

AV23

GPIO55

AP21

GPIO57

BA26

GPIO58

AV19

GPIO59

AY27

GPIO64

BA27

SPKR/GPIO66

AU21

GPIO68

AY26

GPIO69

AV21

GPIO70

AM21

GPIO71

BA3

GPIO174

AV17

GEVENT2_L

BA4

GEVENT4_L

AR15

GEVENT7_L

AP17

GEVENT10_L

AP11

GEVENT11_L

AN8

GEVENT17_L

AU17

BLINK/GEVENT18_L

BA6

GEVENT22_L

BA29

GENINT1_L/G PIO32

AP23

GENINT2_L/G PIO33

AV31

FANOUT0/GPIO52

AU31

FANIN0/GPIO56

+1.8V_S5

R366 47K/F_4

D3

RB500V-40

TP_INT_APU

1

Q32 *2N7002K

C598

0.1u/10V_ 4

+3V

2

ACPI / WAKE UP

EVENTS

USB_SS_ZVDD_095 _USB3_DUAL

GPIO

USB_OC0_L/ SPI_TPM_CS_L/TRST_L/GEVENT12_L

FT3B_Bee ma

PCH_RSMRST#_R

R435 *10K_4

LDO +3V PU in Panel device

3

R368 *10K_4

USB

OC

KABINI

PART 3 OF 9

TP_INT <21 >

USB_OC1_L/ TDI/GEVENT13_L USB_OC2_L/ TCK/GEVENT14_L USB_OC3_L/ TDO/GEVENT15_L

HD

USBCLK/14M_25 M_48M_OSC

USB_ZVSS

USB_HSD0P USB_HSD0N

USB_HSD1P USB_HSD1N

USB

MISC

USB

1.1

USB_HSD2P USB_HSD2N

USB_HSD3P USB_HSD3N

USB_HSD4P USB_HSD4N

USB_HSD5P USB_HSD5N

USB_HSD6P USB_HSD6N

USB_HSD7P USB_HSD7N

USB

2.0

USB_HSD8P USB_HSD8N

USB_HSD9P USB_HSD9N

USB_SS_ZVSS

USB_SS_TX0P

USB_SS_TX0N

USB_SS_RX0P USB_SS_RX0N

USB

3.0

USB_SS_TX1P

USB_SS_TX1N

USB_SS_RX1P USB_SS_RX1N

AZ_BITCLK

AZ_SDOUT AZ_SDIN0/GPIO1 67 AZ_SDIN1/GPIO1 68 AZ_SDIN2/GPIO1 69 AZ_SDIN3/GPIO1 70

AZ_SYNC

AZ_RST_L

AUDIO

2

W4

USB_ZVSS

AG4

AL4 AL5

AJ4 AJ5

AG7 AG8

AG1 AG2

AF1 AF2

AE1 AE2

AD1 AD2

AC1 AC2

AB1 AB2

AA1 AA2

USB_SS_ZVSS

AE10

USB_ZVDD

AE8

T2 T1

V2 V1

R1 R2

W1 W2

TP_I2C_INT#_APU

AY8

USB_OC1#

AW1

USB_OC2#

AV1

USB_OC3#

AY1

AN2 AN1 AK2 AK1 AM1 AL2 AM2 AL1

PCIERST#<11,23,24 ,27>

R76 *33_4 R79 11.8K/F_ 4

R81 1K/F_ 4 R80 1K/F_4

USB_OC1# <2 7> USB_OC2# <2 7>

TP53

ACZ_BCLK_R ACZ_SDOUT_R PCH_AZ_CODEC_SDIN0 RAMID_3 RAMID_1 RAMID_2 ACZ_SYNC_R ACZ_RST#_R

*MC74VHC1G08DFT 2G

PCIERST#

Power trace tracking

TP19

USBP0+ <27> USBP0- <27>

USBP1+ <21> USBP1- <21>

USBP2+ <24> USBP2- <24>

USBP3+ <21> USBP3- <21>

USBP5+ <27> USBP5- <27>

USBP6+ <27> USBP6- <27>

USBP7+ <24> USBP7- <24>

USBP8+ <27> USBP8- <27>

Daughter board side USB2.0

Camera USB

USB to I2C

Touch Panel

Daughter board side USB2.0

Card reader

WLAN Min-Card

USB Combo 3.0/2.0

+0.95V_DUAL

USB30_TX1+ <27>

USB30_TX1- <27>

USB30_RX1+ <27>

USB30_RX1- <27>

3

R89 *0_ 4

U7

4

R82 *SHORT_ 4

Size Docu ment Number Rev

GPIO/ USB/AZ (3/6)

Date: Sheet of

+3V

Q6

R95

2

*2N7002K

*10K_4

1

+3V_S5+3V_S5

R78

35

+0.95V_DUAL<7 >

*4.7K_4

1

2

C207 150P/50V_4

+3V<4,7,9,10 ,21,22,23,2 4,25,27,28 ,29,31,32,3 3,34,35,36 ,37>

+1.8V<4,7,35>

+3V_S5<6,7,8,23 ,24,26,27, 28,29,31,36 >

Quanta Computer Inc.

PROJECT :

1

TP_I2C_INT# <24,28>

R83 33_4

+3V

+1.8V

+3V_S5

+0.95V_DUAL

ZQN

PCIE_RST#PCIERST_R#

5 39Tuesday , April 29, 201 4

1A

5

D D

SATA HDD

SATA ODD

+0.95V

C C

CLK_PCIE_VGAP<11> CLK_PCIE_VGAN<11>

CLK_PCIE_LANP<23> CLK_PCIE_LANN<23>

B B

C544 5.6p/16V_4

C546 5.6p/16V_4

13

R309 *SHORT_4 R307 *SHORT_4

CLK_PCIE_WLAN<24> CLK_PCIE_WLAN#<24>

R333 *SHORT_4 R321 *SHORT_4

2

Y3 48MHZ

4

SATA_TXP 0<26> SATA_TXN0<26>

SATA_RXN0<26> SATA_RXP0<26>

SATA_TXP 1<26> SATA_TXN1<26>

SATA_RXN1<26> SATA_RXP1<26>

TP66

R310

1M_4

4

SATA_TXP 0 SATA_TXN0

SATA_RXN0 SATA_RXP0

SATA_TXP 1 SATA_TXN1

SATA_RXN1 SATA_RXP1

SATA_ZVS S

R961K/F_4

SATA_ZVDD

R941K/F_4

CLK_PCIE_VGAP_R CLK_PCIE_VGAN_R

CLK_PCIE_LANP_R CLK_PCIE_LANN_R

48M_X1

48M_X2

BA14

SATA_TX0P

AY14

SATA_TX0N

BA16

SATA_RX0N

AY16

SATA_RX0P

AY19

SATA_TX1P

BA19

SATA_TX1N

AY17

SATA_RX1N

BA17

SATA_RX1P

AR19

SATA_ZVSS

AP19

SATA_ZVDD_095

BA30

SATA_ACT_L/GPIO67

AY12

SATA_X1

BA12

SATA_X2

U4

GFX_CLKP

U5

GFX_CLKN

AC8

GPP_CLK0P

AC10

GPP_CLK0N

AE4

GPP_CLK1P

AE5

GPP_CLK1N

AC4

GPP_CLK2P

AC5

GPP_CLK2N

AA5

GPP_CLK3P

AA4

GPP_CLK3N

AP13

X14M_25M_48M_OSC

N2

X48M_X1

N1

X48M_X2

U24E

KABINI

PART 5 OF 9

SERIAL

ATA

FT3B_Beema

SD

CARD

SPI

ROM

3

SD__PWR_CTRL

SD_CLK/GPIO73

SD_CMD/GPIO74

SD_CD/GPIO75

SD_WP/GPIO76

SD_DATA0/GPIO77 SD_DATA1/GPIO78 SD_DATA2/GPIO79 SD_DATA3/GPIO80

SD_LED/GPIO45

SPI_CLK/GPIO162 SPI_CS1_L/GPIO165 SPI_CS2_L/GPIO166

SPI_DO/GPIO163

SPI_DI/GPIO164

SPI_HOLD_L/GEVENT9_L

SPI_WP_L/GPIO161

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME_L

LDRQ0_L SERIRQ/GPIO48 LPC_CLKRUN_L

32K_X1

32K_X2

RTCCLK

VDDBT_RTC_G

BA23 AY22

AY23 AY20 BA20

BA22 AY21 AY24 BA24

AY25

AU7 AW9 AR4 AR11 AR7 AU11 AU9

AY2 AW2

AT2 AT1 AR2 AR1 AP2 AP1 AV29 AP25

AJ2

AJ1

AV11

AN4

SPI_CLK SPI_CS1#

SPI_SO SPI_SI SPI_HOLD SPI_WP

LPC_CLK0_R

LPC_CLK1_R LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME#

LDRQ#0 SERIRQ

LPC_CLKRUN#_R

+1.5V_RTC_R

*SHORT_ PAD

R355 22_4 R352 22_4 R351 22_4 R359 *22_4 R364 22_4

R356 22_4

32K_X1

32K_X2

20MIL

12

G1

TP51

R99 *SHORT_4

R312 20M_4

C198

0.1U/10V_4

APU SPI ROM

SPI_CS1# SPI_CLK

C601 22p/50V_4

SPI_SO SPI_SI SPI_SDI

SPI_WP SPI_WP_R

TP61 TP58 TP52 TP59 TP56 TP62 TP55

R75 10 K_4

12

RTC_CLK <8>

C199

0.22u/10V_4

PCLK_TPM <24> LPC_CLK0 <8>

CLK_LPC_DEBUG <24>

C545 22p/50V _4

C547 22p/50V _4

2

SPI_CS<29> SPI_SCK<29> SPI_SDO<29> SPI_SDI<29>

+3V_S5

CLK_PCI_775 <29> LPC_CLK1 <8> LPC_LAD0 <24,29> LPC_LAD1 <24,29> LPC_LAD2 <24,29> LPC_LAD3 <24,29> LPC_LFRAME# <8,24,29>

SERIRQ <24,29> LPC_CLKRUN# <24,28,29>

Y2

32.768KHZ

C196

1u/10V_4

R525 33_4 R526 33_4 R527 33_4 R528 33_4

R375 33_4 R393 33_4

R384 33_4 R372 33_4 R370 10K/F_ 4

R369 *SHORT_4

C592 *15p/50V_4 C595 *15p/50V_4

+1.5V_RTC

AP2138N-1.5TRG1

Vender Size Quanta P/N

1st

AMIC

?

MAX MX25L6436E

?

EON

?

USE GROUND GUARD FOR 32K_X1 AND 32K_X2

Q4

1

VOUT

3

VIN

GND

2

8M 8M 8M 8M 8M

SPI_CS SPI_SCK

SPI_SDOSATA_ACT#

+3VRTC

AKE3EFP0N07

AKE3EGN0Q01

AKE3EZN0Q01

+3V_S5

R376

10K/F_4

1 6 5 2

3

20MIL20MIL

C197

1u/10V_4

?

U22

CE# SCK SI SO

WP#

SPI_W25Q64FVSSIQ

D2

BAT54C

1

Vender P/N

W25Q64FVSSIQWND

GD25B64BSIGRGGD

EN25QH64-104HIP

+3V_S5

8

VDD

7

HOLD#

4

VSS

R72 *SHORT_4

+3VPCU_R

20MIL

+VCCRTC_2

?

+3V_S5

R398

10K/F_4

R70

1K/F_4

C222

0.1U/10V_4

SPI_HOLD

+3VPCU

+BAT

ZQN

12

1A

6 39Tuesday, April 29, 2014

1A

CN10

CR2032_CONN

Power trace tracking

A A

5

+3V<4,5,7,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37>

+0.95V_S5<7,33>

+3V_S5<5,7,8,23,24,26,27,28,29,31,36>

+3VPCU<21,25,26,28,29,30,31,35,37>

+3V

+0.95V_S5

+3V_S5

+3VPCU

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

SATA/CLK/LPC (4/6 )

Date: Sheet of

4

3

2

Date: Sheet of

PROJECT :

1

5

4

3

2

1

+1.5V_SUS +VDD_CORE

C257

180p/50V_4

D D

C270

0.1u/10V_4

C261 1U/10V_4

+1.5V APU_VDDIO_AZ

R103 *SHORT_6

C C

B B

+3V_S5 APU_VDD33_ALW

R402 *SHORT_8

C269

180p/50V_4

C263

0.1u/10V_4

C264

0.1u/10V_4

C243

4.7U/6.3V_6

APU_VDDIO_AZ

C232

1U/10V_4

180p/50V_4

C604

4.7U/6.3V_6

C266

C259

180p/50V_4

C258

C272

1U/10V_4

C267

C262

1U/10V_4

0.1u/10V_4

PLACE ON TOP LAYER

C230

C231

1U/10V_4

180p/50V_4

PLACE ON BOT LAYER

C229

1U/10V_4

C603

1U/10V_4

C289

10u/6.3V_8

C602

1U/10V_4

C271 1U/10V_4

C265 1U/10V_4

10u/6.3V_8

C283

C273

10u/6.3V_8

C268 1U/10V_4

C260 1U/10V_4

APU_VDD18_ALW

APU_VDD33_ALW

+0.95V_DUAL

VDD_0.95V_ALW

APU_VDDIO_AZ

U24F

J35

VDDIO_MEM_S_1

L32

VDDIO_MEM_S_2

L37

VDDIO_MEM_S_3

N35

VDDIO_MEM_S_4

R31

VDDIO_MEM_S_5

R37

VDDIO_MEM_S_6

U32

VDDIO_MEM_S_7

U35

VDDIO_MEM_S_8

W31

VDDIO_MEM_S_9

W32

VDDIO_MEM_S_10

W37

VDDIO_MEM_S_11

AA31

VDDIO_MEM_S_12

AA35

VDDIO_MEM_S_13

AC32

VDDIO_MEM_S_14

AC37

VDDIO_MEM_S_15

AE31

VDDIO_MEM_S_16

AE35

VDDIO_MEM_S_17

AG32

VDDIO_MEM_S_18

AG37

VDDIO_MEM_S_19

AJ35

VDDIO_MEM_S_20

AL32

VDDIO_MEM_S_21

AL37

VDDIO_MEM_S_22

AR35

VDDIO_MEM_S_23

AL10

VDDIO_AZ_ALW_1

AL11

VDDIO_AZ_ALW_2

B1

VDD_18_ALW_1

B2

VDD_18_ALW_2

AL13

VDD_33_ALW_1

AM13

VDD_33_ALW_2

AR5

VDD_095_USB3_DUAL1

AU4

VDD_095_USB3_DUAL2

AV7

VDD_095_USB3_DUAL3

AW5

VDD_095_USB3_DUAL4

AE11

VDD_095_ALW_1

AE13

VDD_095_ALW_2

AJ11

VDD_095_ALW_3

AJ13

VDD_095_ALW_4

KABINI

PART 7 OF 9

FT3B_Beema

VDDCR_CPU_1 VDDCR_CPU_2 VDDCR_CPU_3 VDDCR_CPU_4 VDDCR_CPU_5 VDDCR_CPU_6 VDDCR_CPU_7 VDDCR_CPU_8

VDDCR_CPU_9 VDDCR_CPU_10 VDDCR_CPU_11 VDDCR_CPU_12 VDDCR_CPU_13 VDDCR_CPU_14 VDDCR_CPU_15 VDDCR_CPU_16 VDDCR_CPU_17 VDDCR_CPU_18 VDDCR_CPU_19 VDDCR_CPU_20 VDDCR_CPU_21 VDDCR_CPU_22 VDDCR_CPU_23 VDDCR_CPU_24 VDDCR_CPU_25 VDDCR_CPU_26

VDDCR_NB_1 VDDCR_NB_2 VDDCR_NB_3

POWER

VDDCR_NB_4 VDDCR_NB_5 VDDCR_NB_6 VDDCR_NB_7 VDDCR_NB_8

VDDCR_NB_9 VDDCR_NB_10 VDDCR_NB_11 VDDCR_NB_12 VDDCR_NB_13 VDDCR_NB_14 VDDCR_NB_15 VDDCR_NB_16 VDDCR_NB_17 VDDCR_NB_18 VDDCR_NB_19 VDDCR_NB_20 VDDCR_NB_21

VDD_095_GFX_1 VDD_095_GFX_2 VDD_095_GFX_3

VDD_18_1 VDD_18_2 VDD_18_3 VDD_18_4

VDD_33_1 VDD_33_2

VDD_095_1 VDD_095_2 VDD_095_3 VDD_095_4 VDD_095_5 VDD_095_6 VDD_095_7 VDD_095_8 VDD_095_9

L21 L23 L25 L27 L29 N21 N23 N27 R21 R23 R27 U21 U23 U27 W21 W23 W27 AA21 AA23 AA27 AC21 AC23 AC27 AE21 AE23 AE27

L13 L17 N11 N13 N17 R11 R13 R17 U13 U17 W13 W17 AA13 AA17 AC13 AC17 AE15 AE17 AE19 AG17 AG21

A2 A3 B3 C3

AM15 AM17

AG23 AG27 AJ21 AJ27 AL21 AL23 AL27 AM23 AM25

U10 W10 AA10

+VDDNB_CORE

APU_VDD_18

APU_VDD_33

APU_VDD_0.95

VDD_095_GFX

C214

1U/10V_4

C112

10u/6.3V_8

C234 1U/10V_4

C235 1U/10V_4

C225

10u/6.3V_8

L17

PBY160808T-60 0Y-N(60,3A)

C226

10u/6.3V_8

C593

10u/6.3V_8

C212 1U/10V_4

C204 1U/10V_4

42R

C200

10u/6.3V_8

C238 1U/10V_4

C249 1U/10V_4

C223

C152

10u/6.3V_8

C205 1U/10V_4

C202 1U/10V_4

APU_VDD_0.95 +0.95V

C241

1U/10V_4

C203

C245

10u/6.3V_8

C248

C237

1U/10V_4

C251

C246

1U/10V_4

C224

10u/6.3V_8

C211 1U/10V_4

C216 1U/10V_4

R124 *SHORT_8

C111

10u/6.3V_8

C217 1U/10V_4

C213 1U/10V_4

C247

180p/50V_4

C236 1U/10V_4

C252 1U/10V_4

C206 180p/50V_4

C215 1U/10V_4

C250 1U/10V_4

If P_GFX [3:0] ar e not us ed, lea ve VDD_0 95_GFX u nconnect ed.

C253

1U/10V_4

C240

1U/10V_4

C256

1U/10V_4

C255

1U/10V_4

C284

10u/6.3V_8

C285

10u/6.3V_8

U24G

A8

VSS_1

A13

VSS_2

A23

VSS_3

A31

VSS_4

A35

VSS_5

A39

VSS_6

B8

VSS_7

B13

VSS_8

B23

VSS_9

B31

VSS_10

B39

VSS_11

C1

VSS_12

C2

VSS_13

C5

VSS_14

C7

VSS_15

C9

VSS_16

C11

VSS_17

C13

VSS_18

C15

VSS_19

C17

VSS_20

C19

VSS_21

C21

VSS_22

C23

VSS_23

C25

VSS_24

C27

VSS_25

C29

VSS_26

C31

VSS_27

C33

VSS_28

C35

VSS_29

C37

VSS_30

C39

VSS_31

C41

VSS_32

D9

VSS_33

D11

VSS_34

D13

VSS_35

E3

VSS_36

E4

VSS_37

E9

VSS_38

E11

VSS_39

E13

VSS_40

E27

VSS_41

E31

VSS_42

E35

VSS_43

E38

VSS_44

E39

VSS_45

G3

VSS_46

G7

VSS_47

G11

VSS_48

G13

VSS_49

G15

VSS_50

G17

VSS_51

G21

VSS_52

G25

VSS_53

G29

VSS_54

G35

VSS_55

G37

VSS_56

G39

VSS_57

G41

VSS_58

H11

VSS_59

H13

VSS_60

H23

VSS_61

H31

VSS_62

C254

1U/10V_4

FT3B_Beema

C239

1U/10V_4

KABINI

PART 8 OF 9

GROUND

C242

180p/50V_4

VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124

J3 J7 J8 J39 K11 K13 K17 K19 K21 K23 K25 K27 K29 K31 L3 L7 L8 L10 L11 L15 L19 L31 L39 L41 M1 M2 N3 N7 N15 N19 N25 N29 N31 N39 P1 P2 R3 R7 R15 R19 R25 R29 R39 R41 U1 U2 U3 U7 U8 U11 U15 U19 U25 U29 U31 U39 W3 W5 W11 W15 W19 W25

W29 W39 W41

AA11 AA15 AA19 AA25 AA29 AA39

AC11 AC15 AC19 AC25 AC29 AC31 AC39 AC41

AE25 AE29 AE32 AE39

AG10 AG11 AG13 AG15 AG19 AG25 AG29 AG31 AG39 AG41

AJ15 AJ17 AJ19 AJ23 AJ25 AJ29 AJ31 AJ32 AJ39

AL15 AL17 AL19 AL25 AL29

U24H

VSS_125 VSS_126 VSS_127

Y1

VSS_128

Y2

VSS_129

AA3

VSS_130

AA7

VSS_131

AA8

VSS_132 VSS_133 VSS_1134 VSS_135 VSS_136 VSS_137 VSS_138

AC3

VSS_139

AC7

VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148

AE3

VSS_149

AE7

VSS_150 VSS_151 VSS_152 VSS_153 VSS_154

AG3

VSS_155

AG5

VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166

AH1

VSS_167

AH2

VSS_168

AJ3

VSS_169

AJ7

VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179

AL3

VSS_180

AL8

VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186

KABINI

PART 9 OF 9

GROUND

FT3B_Beema

VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242

VSSBG_DAC

VBURN

PSEN

AL39 AL41 AM11 AM27 AM31 AN3 AN7 AN39 AP31 AR3 AR13 AR17 AR21 AR25 AR29 AR39 AR41 AU1 AU2 AU3 AU15 AU19 AU23 AU27 AU39 AV9 AW3 AW7 AW13 AW15 AW17 AW19 AW21 AW23 AW25 AW27 AW31 AW33 AW35 AW37 AW39 AW41 AY13 AY15 AY18 AY30 BA2 BA7 BA13 BA15 BA18 BA21 BA25 BA31 BA35 BA39

A15 AL31 AM29

C563

1U/10V_4

S5 DOMAI N

R55 *SHORT_8

R59 *0_8

S0 DOMAI N

C562

C548

1U/10V_4

C549

180p/50V_4

C177

10u/6.3V_8

C553

C191

1U/10V_4

10u/6.3V_8

R347 *SHORT_8

4

C567

1U/10V_4

C583

10u/6.3V_8

C551

1U/10V_4

C588

1U/10V_4

C573

1U/10V_4

C554

0.1U/10V_4

C575

1U/10V_4

C162

0.1U/10V_4

C587

1U/10V_4

C589

1U/10V_4

C568

0.1U/10V_4

C576

1U/10V_4

C586

1U/10V_4

3

C552

180p/50V_4

C574

180p/50V_4

+0.95V

C192

10u/6.3V_8

R51 *SHORT_8

C287

10u/6.3V_8

VDD_0.95V_ALW+0.95V_S5+1.8V APU_VDD_18

C286

1U/10V_4

C176

10u/6.3V_8

C184

1U/10V_4

C166

10u/6.3V_8

C288

1U/10V_4

C190

10u/6.3V_8

C189

1U/10V_4

C156

10u/6.3V_8

C282

1U/10V_4

C210

1U/10V_4

2

C193

180p/50V_4

C208

1U/10V_4

Power trace tracking

C209

C219

1U/10V_4

Size Document Number Rev

Date: Sheet

Date: Sheet of

+1.5V_SUS<3,9,10,32,37> +1.5V<24,25,32,35> +3V_S5<5,6,8,23,24,26,27,28,29,31,36> +3V<4,5,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +1.8V<4,35> +1.8V_S5<5,8,35,37> +0.95V<3,6,33,35> +0.95V_S5<33>

Quanta Computer Inc.

PROJECT :

POWER/GND(5/6)

+1.5V_SUS +1.5V

+3V_S5

+3V +1.8V

+1.8V_S5 +0.95V

+0.95V_S5

ZQN

1A

of

7 39Tuesday, April 29, 2014

1

7 39Tuesday, April 29, 2014

+3V APU_VDD_33

R102 *SHORT_8

A A

+1.8V_S5 APU_VDD18_ALW

R308 *SHORT_8

C218

4.7U/6.3V_6

C542

4.7U/6.3V_6

5

C221

1U/10V_4

C560

1U/10V_4

+0.95V +0.95V_S5 +0.95V_DUAL

C228

C227

180p/50V_4

1U/10V_4

C561

C564

1U/10V_4

5

4

3

2

1

STRAPS PINS

D D

LPC_CLK0<6>

LPC_CLK1<6>

LPC_LFRAME#<6,24,29>

GEVENT2#<5>

RTC_CLK<6>

C C

LPC_CLK0

LPC_CLK1

LPC_LFRAME#

GEVENT2#

RTC_CLK

OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS.

+3V_S5 +3V_S5 +3V_S5+3V_S5

R354 *10K/F_4

R353 2K/F_4

R358 10K/F_4

R357 *2K/F_4

R320 10K/F_4

R319 *2K/F_4

R415 *10K/F_4

R414 2K/F_4

+3V_S5

R395 *10K_4

R394 *2K/F_4

DEBUG STRAPS

REQUIRED STRAPS

PULL HIGH

PULL LOW

RTC_CLK

Normal power up

DEFAULT

Fast power on

LPC_CLK0

BOOT FAIL TIMER ENABLED

BOOT FAIL TIMER DISABLED

DEFAULT

LPC_CLK1

CLKGEN ENABLED

DEFAULT

CLKGEN DISABLED

LFRAME#

SPI ROM

DEFAULT

LPC ROM

GEVENT2#

1.8V SPI ROM

3.3V SPI ROM

DEFAULT

Power trace tracking

+3V<4,5,7,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37>

+3V_S5<5,6,7,23,24,26,27,28,29,31,36>

+3V

+3V_S5

B B

SYS PWRGD

+3V_S5

2

D5 *1N4148WS

D7 1N4148WS

D6 1N4148WS

R169

100K_4

3

Q16 2N7002K

1

4

2

SYS_RST#<5>

SUSB#<5,29>

PWROK_EC<29>

A A

HWPG<29>

5

+1.8V_S5

R142 10K/F_4

C316

0.1U/10V_4

3

Q10 2N7002K

1

2

1

SYS_PWRGD_R

+3V_S5

3 5

*TC7SH08FU

C308 *0.1U/10V_4

U10

SYS_PWRGD

4

R134 *SHORT_4

3

SYS_PWRGD <5,28>

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

STRAP(6/6)

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZQN

1A

8 39Tuesday, April 29, 2014

1

8 39Tuesday, April 29, 2014

1A

5

4

3

2

1

2.48A

+3V

+1.5V_SUS

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM_H=4_STD

+SMDDR_VREF

3mA

PC2100 DDR3 SDRAM SO-DIMM

R223 *0_6

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

VTT1 VTT2

+1.5V_SUS

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

R219 1K/F_4

+DDR_VREF

R211 1K/F_4

+SMDDR_VTT

M_A_A[15:0]<3,10>

D D

M_A_BS#0<3,10> M_A_BS#1<3,10> M_A_BS#2<3,10> M_A_CS#0<3> M_A_CS#1<3> M_A_CLK0<3> M_A_CLK0#<3> M_A_CLK1<3> M_A_CLK1#<3> M_A_CKE0<3> M_A_CKE1<3> M_A_CAS#<3,10> M_A_RAS#<3,10>

R198 10K_4 R200 10K_4

C C

B B

+1.5V_SUS +1.5V_SUS

Place these Caps near So-Dimm1.

M_A_WE#<3,10>

CLK_SCLK<5,10,24>

CLK_SDATA<5,10,24>

M_A_ODT0<3> M_A_ODT1<3>

M_DM[7..0]<3,10>

M_A_DQS[7:0]<3,10>

M_A_DQS#[7:0]<3,10>

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM2_SA0 DIMM2_SA1

M_DM0 M_DM1 M_DM2 M_DM3 M_DM4 M_DM5 M_DM6 M_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM_H=4_STD

PC2100 DDR3 SDRAM SO-DIMM

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

(204P)

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQ[63:0] <3,10>

M_A_EVENT#<3,10>

DDR3_DRAMRST#<3,10>

+DDR_VREF2 +DDR_VREF

Stitching Cap

M_A_EVENT#

C325 0.1u/10V_4

C332 0.1u/10V_4 C380 1000p/50V_4 C383 0.1u/10V_4

+DDR_VREF2 +DDR_VREF

C416 0.1u/10V_4 C408 1000p/50V_4

C398 0.1u/10V_4

C430 0.1u/10V_4

C384

0.22u/10V_4

+1.5V_SUS

C418

0.22u/10V_4

C389

0.22u/10V_4

C419

0.22u/10V_4

C421

0.22u/10V_4

C422

0.22u/10V_4

C439

0.22u/10V_4

+SMDDR_VTT

C438

0.22u/10V_4

C440

0.22u/10V_4

C437

0.22u/10V_4

+SMDDR_VTT

C436

0.22u/10V_4

+1.5V_SUS

C357

180p/50V_4

C359

180p/50V_4

+SMDDR_VREF

R209 *0_6

3mA

C423

0.22u/10V_4

A A

+1.5V_SUS

C427

0.22u/10V_4

C426

0.22u/10V_4

C385

0.22u/10V_4

5

C388

0.22u/10V_4

C420

0.22u/10V_4

C391

0.22u/10V_4

C387

0.22u/10V_4

C386

0.22u/10V_4

C392

0.22u/10V_4

C390

0.22u/10V_4

C417

0.22u/10V_4

C425

0.22u/10V_4

4

C394

0.22u/10V_4

C424

0.22u/10V_4

C429

0.22u/10V_4

C411

0.22u/10V_4

C381

0.22u/10V_4

Power trace tracking

3

C413

0.22u/10V_4

+1.5V_SUS<3,7,10,32,37>

+3V<4,5,7,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37>

+SMDDR_VTT<10,32>

+SMDDR_VREF<32> +DDR_VREF2<10>

2

Size Document Number Rev

DDRIII SO-DIMM-1

Date: Sheet of

+1.5V_SUS

20K=>1K

Quanta Computer Inc.

PROJECT :

R206 1K/F_4

+DDR_VREF2

R191 1K/F_4

1

ZQN

9 39Thursday, March 27, 2014

1A

1

2

3

4

5

6

7

8

2.48A

+3V

+1.5V_SUS

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM_H=4_RVS

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+SMDDR_VTT

M_A_A[15:0]<3,9>

A A

M_A_BS#0<3,9> M_A_BS#1<3,9> M_A_BS#2<3,9> M_B_CS#0<3> M_B_CS#1<3> M_B_CLK0<3> M_B_CLK0#<3> M_B_CLK1<3> M_B_CLK1#<3>

+3V

R163 10K_4 R162 10K_4

B B

10/1 For DIM1

C C

+1.5V_SUS +1.5V_SUS

Place these Caps near So-Dimm1.

M_B_CKE0<3> M_B_CKE1<3> M_A_CAS#<3,9> M_A_RAS#<3,9> M_A_WE#<3,9>

CLK_SCLK<5,9,24>

CLK_SDATA<5,9,24>

M_B_ODT0<3> M_B_ODT1<3>

M_DM[7..0]<3,9>

M_A_DQS[7:0]<3,9>

M_A_DQS#[7:0]<3,9>

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM1_SA0 DIMM1_SA1

M_DM0 M_DM1 M_DM2 M_DM3 M_DM4 M_DM5 M_DM6 M_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

JDIM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM_H=4_RVS

PC2100 DDR3 SDRAM SO-DIMM

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

(204P)

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQ[63:0] <3,9>

M_A_EVENT#<3,9>

DDR3_DRAMRST#<3,9>

+DDR_VREF2

+DDR_VREF

M_A_EVENT#

C376 0.1u/10V_4 C346 0.1u/10V_4 C348 1000p/50V_4 C323 0.1u/10V_4

C358 0.1u/10V_4 C360 1000p/50V_4 C349 0.1u/10V_4

C350 0.1u/10V_4

C367

0.22u/10V_4

+1.5V_SUS

C335

0.22u/10V_4

D D

+1.5V_SUS

C345

0.22u/10V_4

C374

0.22u/10V_4

C341

0.22u/10V_4

C375

0.22u/10V_4

1

C373

0.22u/10V_4

C372

0.22u/10V_4

C369

0.22u/10V_4

C370

0.22u/10V_4

C336

0.22u/10V_4

C337

0.22u/10V_4

2

C343

0.22u/10V_4

C340

0.22u/10V_4

C371

0.22u/10V_4

C339

0.22u/10V_4

C338

0.22u/10V_4

C342

0.22u/10V_4

+SMDDR_VTT

C344

0.22u/10V_4

3

C318

0.22u/10V_4

C330

0.22u/10V_4

C368

0.22u/10V_4

C310

0.22u/10V_4

C333

0.22u/10V_4

C324

0.22u/10V_4

C366

0.22u/10V_4

Power trace tracking

4

C315

0.22u/10V_4

+SMDDR_VTT

C365

0.22u/10V_4

C326

0.22u/10V_4

C347

0.22u/10V_4

Quanta Computer Inc.

+1.5V_SUS<3,7,9,32,37>

+3V<4,5,7,9,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37>

+SMDDR_VTT<9,32>

+SMDDR_VREF<9,32> +DDR_VREF2<9>

5

6

Size Document Number Rev

DDRIII SO-DIMM-1

Date: Sheet of

Quanta Computer Inc.

PROJECT :

7

ZQN

1A

10 39Thursday, February 20, 2014

8

PART 1 0F 9

U19A

AA38

W36

W38

U36

U38

R36

R38

N36

N38 M37

M35

H37

H35 G36

G38

Y37

Y35

V37

V35

T37

T35

P37

P35

L36

L38 K37

K35 J36

J38

F37

F35 E37

PCIE_RX0P

PCIE_RX0N

PCIE_RX1P

PCIE_RX1N

PCIE_RX2P

PCIE_RX2N

PCIE_RX3P

PCIE_RX3N

PCIE_RX4P

PCIE_RX4N

PCIE_RX5P

PCIE_RX5N

PCIE_RX6P

PCIE_RX6N

PCIE_RX7P

PCIE_RX7N

PCIE_RX8P

PCIE_RX8N

PCIE_RX9P

PCIE_RX9N

PCIE_RX10P

PCIE_RX10N

PCIE_RX11P

PCIE_RX11N

PCIE_RX12P

PCIE_RX12N

PCIE_RX13P

PCIE_RX13N

PCIE_RX14P

PCIE_RX14N

PCIE_RX15P

PCIE_RX15N

PCI EXPRESS INTERFACE

PEG _TXP0<3> PEG _TXN0<3 >

PEG _TXP1<3> PEG _TXN1<3 >

PEG _TXP2<3> PEG _TXN2<3 >

PEG _TXP3<3> PEG _TXN3<3 >

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PCIE_TX10P

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13P

PCIE_TX13N

PCIE_TX14P

PCIE_TX14N

PCIE_TX15P

PCIE_TX15N

Y33 Y32

W33 W32

U33 U32

U30 U29

T33 T32

T30 T29

P33 P32

P30 P29

N33 N32

N30 N29

L33 L32

L30 L29

K33 K32

J33 J32

K30 K29

H33 H32

PEG _RXP0_ C PEG _RXN0_C

PEG _RXP1_ C PEG _RXN1_C

PEG _RXP2_ C PEG _RXN2_C

PEG _RXP3_ C PEG _RXN3_C

C53 1 *EV@0 .1u/10V_ 4 C53 8 *EV@0 .1u/10V_ 4

C52 8 *EV@0 .1u/10V_ 4 C53 0 *EV@0 .1u/10V_ 4

C52 5 *EV@0 .1u/10V_ 4 C52 6 *EV@0 .1u/10V_ 4

C52 3 *EV@0 .1u/10V_ 4 C52 2 *EV@0 .1u/10V_ 4

DGP U_RST_L<5>

PCI ERST#<5,23 ,24,27>

+3V_ GFX

C54 1 *EV@0 .1u/10V_ 4

U20

2

1

*EV@T C7SH08 FU(F)

3 5

PEG _RXP0 <3 >

PEG _RXN0 <3>

PEG _RXP1 <3 >

PEG _RXN1 <3>

PEG _RXP2 <3 >

PEG _RXN2 <3>

PEG _RXP3 <3 >

PEG _RXN3 <3>

4

PER ST#_BUF

R30 0

*EV@1 00K_4

CLOCK

PCIE_REFCLKP

PCIE_REFCLKN

TEST_PG

PERSTB

*EV@GPU_M2

CALIBRATION

PCIE_CALR_TX

PCIE_CALR_RX

PCI E_CALR _TX

Y30

PCI E_CALR _RX

Y29

R34 *EV@1 .69K/F_4

R35 *EV@1 K/F_4R66 *E V@1K_4

+PCI E_VDD C_GFX

Quanta Computer Inc.

PROJECT :

Size D ocument Numb er Rev

Date: Sheet

PROJECT :

Opal(Jet)_M2/PEG*16

ZQN

of

11 38Thursday, F ebruary 20, 20 14

A1A

TES T_PG

AB35 AA36

AH16

AA30

CLK _PCIE_ VGAP<6> CLK _PCIE_ VGAN< 6>

PER ST#_BUF

+3V_GFX

R349 *EV@10K_4

R350 *EV@100_4

DGPU_AC_DC#<29>

SYS_SHDN#<31,35,36 >

3

Q27

*EV@2N7002K

1

Opal only, DNI for Jet

+1.8V_GFX

L9 *EV@BLM15BD121SN1D_0 .3A_4

PCIE_REQ_GPU#

+3V_GFX

R77 *EV@10K_4

1

3

*EV@2N7002K Q5

2

R341 *EV@10K_4

+1.8V_GFX

Place cl ose to C hip

R68

*EV@499/F_4

C186

R60

*EV@249/F_4

*EV@0.1u/10V_ 4

+3V_GFX

PU:Disable ML PS PD:Enable MLPS

on-die thermal sensor power : 1.8V@13mA

1.8V GPI O

+3V_GFX

GPU_DPRSLPVR<36>

PWRCNTRL2<36>

PWRCNTRL0<36> PWRCNTRL3<36>

PWRCNTRL1<36>

PCIE_REQ_GPU#<5>

PWRCNTRL4<36> PWRCNTRL5<36>

C163 *EV@10u/6.3V_ 6

R63 *EV@4.7K_4 R64 *EV@4.7K_4

R61 *EV@4.7K_4 R62 *EV@4.7K_4

R65 *EV@0_4

TP16 TP9 TP17

GPU_AC_DC#

TP7 TP15 TP10 TP11 TP13

TP6 TP12

PCIE_REQ_GPU#

TP5

GPU_VREFG

R43 *EV@1K_4

R46 *EV@5.11K/F _4

R339 *EV@10K_4 R338 *EV@10K_4 R337 *EV@10K_4 R336 *EV@10K_4 R335 *EV@10K_4

R48 *EV@10K_4

C159

*EV@1u/6.3V_4

TP18

GPU_SMBCLK GPU_SMBDAT

GPU_SCL GPU_SDA

GPU_GPIO0_TP GPU_GPIO1_TP GPU_GPIO2_TP

R348 *EV@10K_4

GPU_GPIO8 GPU_GPIO9 GPU_GPIO10 GPU_GPIO11 GPU_GPIO12

TP14

ALT#_GPIO17

GPIO_19_CTF

GPU_GPIO21 GPU_GPIO22

GPU_GENERICC

TP4

TP8

R340 *EV@4.7 K_4

TESTEN

GPU_D+ GPU_D-

GPU_GPIO28

+1.8V_TSVDD

C160

*EV@0.1u/10V_ 4

AD29 AC29

AK21

AR10

AW10

AU10 AP10 AV11

AR12

AW12

AU12 AP12

AH23

AK26

AH20 AH18 AN16

AH17

AK17

AH15

AK16

AM16 AM14 AM13 AK14 AG30 AN14 AM17

AK13 AN13

AG32 AG33

AK19

AK20

AH26 AH24

AC30

AK24

AH13

AD28

AM23 AN23 AK23

AM24

AG29

AK32

AJ21

AW8

AW3

AW5

AW6

AT11

AJ23

AJ26

AJ17

AJ13

AJ16

AL16

AL13 AJ14

AJ19

AJ20

AJ24

AL21

AL24

AF29

AL31

AJ32 AJ33

AR8 AU8 AP8

AR3 AR1 AU1 AU3

AP6

AU5 AR6

AU6 AT7 AV7 AN7 AV9

AT9

MUTI GFX

GENLK_CLK

GENLK_VSYNC

SWAPLOCKA

SWAPLOCKB

DVPCNTL_MVP_0

DVPCNTL_MVP_1

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2

DVPCLK

DVPDATA_0

DVPDATA_1

DVPDATA_2

DVPDATA_3

DVPDATA_4

DVPDATA_5

DVPDATA_6

DVPDATA_7

DVPDATA_8

DVPDATA_9

DVPDATA_10

DVPDATA_11

DVPDATA_12

DVPDATA_13

DVPDATA_14

DVPDATA_15

DVPDATA_16

DVPDATA_17

DVPDATA_18

DVPDATA_19

DVPDATA_20

DVPDATA_21

DVPDATA_22

DVPDATA_23

SMBCLK

SMBDATA

SCL

I2C

SDA

GENERAL PURPOSE I/O

GPIO_0

GPIO_1

GPIO_2

GPIO_5_AC_BATT

GPIO_6

GPIO_7_BLON

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11

GPIO_12

GPIO_13

GPIO_14_HPD2

GPIO_15_PWRCNTL_0

GPIO_16

GPIO_17_THERMAL_INT

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_21

GPIO_22_ROMCSB

CLKREQB

GPIO_29

GPIO_30

GENERICA

GENERICB

GENERICC

GENERICD

GENERICE_HPD4

GENERICF_HPD 5

GENERICG_HPD6

CEC_1

HPD1

VREFG

BACO

PX_EN

DEBUG

TESTEN

JTAG_TRSTB

JTAG_TDI

JTAG_TCK

JTAG_TMS

JTAG_TDO

THERMAL

DPLUS

DMINUS

GPIO_28_FDO

TS_A

TSVDD

TSVSS

SMBus

PART 2 0F 9

*EV@GPU_M2

U19B

AU24

TXCAP_DPA3P

AV23

TXCAM_DPA3N

AT25

TX0P_DPA2P

AR24

TX0M_DPA2N

DPA

DPB

DPC

DPD

DAC1

MLPS

DDC/AUX

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

AVSSN#1

AVSSN#2

AVSSN#3

NC_TSVSSQ

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDCCLK_AUX6P

DDCDATA_AUX6N

DDCVGACLK

DDCVGADATA

HSYNC

VSYNC

AVSSQ

VDD1DI

VSS1DI

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

AD39

R

AD37

AE36

G

AD35

AF37

B

AE38

RSET

AVDD

NC#1

NC#2

NC#3

NC#4

NC#5

NC#6

NC#7

NC#8

NC#9

AC36 AC38

AB34

R301 *EV@499/F_4

AD34 AE34

AC33 AC34

V13 U13 AC31 AD30 AC32 AD32 AF32 AA29 AG21

R297 *EV@10K_4 R298 *EV@10K_4

AF33

PS_0

AM34

PS_0

PS_1

AD31

PS_1

PS_2

AG31

PS_2

PS_3

AD33

PS_3

AM26 AN26

AM27

AUX1P

AL27

AUX1N

AM19 AL19

AN20

AUX2P

AM20

AUX2N

AL30 AM30

AL29 AM29

AN21 AM21

AK30 AK29

AJ30 AJ31

PS_0 <14>

PS_1 <14>

PS_2 <14>

PS_3 <14>

+3V_GFX

Thermal

GPUT_CLK

GPUT_DATA

DAC1 Analog Power : 1.8V@18mA

DAC1 Digital Power : 1.8V@117mA

R362 *EV@10K_4

C138

*EV@0.1u/10V_ 4

C124

*EV@0.1u/10V_ 4

2ND_MBCLK<4,2 9>

2ND_MBDATA<4 ,29>

ALT#_GPIO17

C137

*EV@1u/6.3V_4

C125

*EV@1u/6.3V_4

R363 *EV@10K_4

+3V_GFX

5

2

6

*EV@2N7002DW

R377 *EV@0_4

R371 *EV@0_4

+3V_GFX

R361 *EV@10K_4

U6

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

*EV@G780P81U

Opal only, DNI for Jet

+1.8V_AVDD

L6

*EV@BLM15BD121SN1D_3 00MA

C134

*EV@10u/6.3V_ 6

+1.8V_VDD1DI

L5

*EV@BLM15BD121SN1D_3 00MA

C119

*EV@10u/6.3V_ 6

Size Docu ment Number Rev

Date: Sheet of

Date: Sheet

Q28

GPUT_CLK

43

GPUT_DATA

1

+3V_GFX

C599 *EV@0.1u/10V_ 4

1

VCC

2

DXP

3

DXN

5

GND

GPU_D+

C578

*EV@2200p/50 V_4

GPU_D-

+1.8V_GFX

Quanta Computer Inc.

PROJECT :

Opal(Jet )_M2 /GPI O_DP_CRT _I2C

ZQN

12 38T hursday, F ebruary 2 0, 2014

A1A

of

+1.8V_GFX

*EV@PBY160808T-501Y_1.2A_6L10

C173 *EV@10u/6.3V_6

237mA

C170

*EV@1u/6.3V_4

DPLL_PVDD

C171

*EV@0.1u/10V_4

PART 9 0F 9

U19G

U19I

PART 7 0F 9

LVDS CONTROL

VARY_BL

DIGON

AK27

R54 *EV@10K_4

AJ27

R52 *EV@10K_4

+PCIE_VDDC_GFX

+1.8V_GFX

+PCIE_VDDC_GFX

*EV@PBY160808T-501Y_1.2A_6L16

C188 *EV@10u/6.3V_6

*EV@FCM1005KF-221T03_0.3AL1

C47

*EV@10u/6.3V_6

*EV@BLM15BD121SN1D_0.3A_4L14

C185

*EV@10u/6.3V_6

*EV@BLM15BD121SN1D_0.3AL13

C183

*EV@10u/6.3V_6

C174

*EV@1u/6.3V_4

C53

*EV@1u/6.3V_4

75mA

C179

*EV@1u/6.3V_4

C172

*EV@1u/6.3V_4

DPLL_PVDD

280mA

DPLL_VDDC

C181

*EV@0.1u/10V_4

150mA

MPLL_PVDD

C62

*EV@0.1u/10V_4

SPLL_PVDD

C167

*EV@0.1u/10V_4

100mA

SPLL_VDDC

R57 *EV@0_4

R303 *EV@0_4

C175

*EV@0.1u/10V_4

AM32

AN31

AN32

AM10

AN9

AN10

AF30 AF31

H7 H8

DPLL_PVDD

DPLL_VDDC

DPLL_PVSS

MPLL_PVDD

SPLL_PVDD

SPLL_VDDC

SPLL_PVSS

NC_XTAL_PVDD

NC_XTAL_PVSS

PLLS/XTAL

*EV@GPU_M2

GPU_XTALIN

AV33

XTALIN

GPU_XTALOUT

AU34

XTALOUT

AW34

XO_IN

AW35

XO_IN2

AK10

CLKTESTA

CLKTESTB

CLKTESTA

AL10

CLKTESTB

route 50ohms single-ended/100ohms diff and keep short

R334

*EV@1M_4

R318 *EV@10K_4

R311 *EV@10K_4

C580

*EV@0.1u/10V_4

R343 *EV@51.1/F_4

Debug only, for clock observation

C585 *EV@10p/50V_4

Y4

*EV@27MHZ

2 4

1 3

C584 *EV@10p/50V_4

C579 *EV@0.1u/10V_4

R342

*EV@51.1/F_4

TXOUT_U3P

TXOUT_U3N

TXOUT_L3P

TXOUT_L3N

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

LVTMDP

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

*EV@GPU_M2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

Opal(Jet)_M2/ XTAL_LVDS

ZQN

13 38Thursday, February 20, 2014

A1A

PS_3 [3:1]

H5TC2G63FFR-11C (128Mb*16) 2Gb

Hynix

H5TC4G63AFR-11C (256Mb*16) 4Gb

K4W2G1646Q-BC1A (128Mb*16) 2Gb

Samsung

K4W4G1646D-BC1A (256Mb*16) 4Gb

MT41J128M16JT-093G:K (128Mb*16) 2Gb

Micron

MT41J256M16HA-093G:E (256Mb*16) 4Gb

System Memory Aperture size

GPIO9 GPIO13GPIO12GPIO11

BIOSROM

0

Reservd

0

128M

256M

64M

AKD5MZDTW05 *4

AKD5MZDTW05 *8

AKD5PGWTW13 *4

AKD5PGWTW13 *8

AKD5MGST513 *4

AKD5MGST513 *8

AKD5PGWT504 *4

AKD5PGWT504 *8

AKD5MGSTL25 *4

AKD5MGSTL25 *8

AKD5PZSTL02 *4

AKD5PZSTL02 *8

1G

2G

4G

1G

2G

4G

1G

2G

4G

ROMIDCFG0 ROMIDCFG1 ROMIDCFG2

000

0 01

0

1 11

0

0 0

Opal

MLPSVendor P/N STN B/S P/N SizeVendor

001

011

101

Jet

MLPS

000

110

010

111

100

CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

MLPS_DISABLE

TX_PWRS_ENB

TX_DEEMPH_EN

BIF_GEN3_EN_A

BIF_VGA DIS

ROMIDCFG[2:0]

BIOS_ROM_EN

AUD[1] AUD[0]

CEC_DIS

RESERVED RESERVED RESERVED RESERVED

AUD_PORT_CONN_PINSTRAP[2]

AUD_PORT_CONN_PINSTRAP[1]

AUD_PORT_CONN_PINSTRAP[0]

MLPS GPIO PIN

NA

GPIO_28_FDO

PS_1[4]

GPIO0

GPIO1

PS_1[5]

GPIO2

PS_1[1]

GPIO9

PS_2[4]

GPIO[13:11]

PS_0[3..1]

PS_2[3]

GPIO22

HSYNC

NA

VSYNC

NA

PS_0[4]

GENLK_VSYNC

GENLK_CLK

PS_1[3]

GPIO8

PS_1[2]

GPIO21

NA NA

GENERICC

PS_3[5]

PS_3[4]

PS_0[5]

DESCRIPTION OF DEFAULT SETTINGS

Enable MLPS, NA for Thames/Whistler/Seymour X 0: Enable MLPS, disable GPIO PINSTRAP 1: Disable MLPS, enable GPIO PINSTRAP

Transmitter Power Savings Enable 0: 50% Tx output swing 1: Full Tx output swing

PCIE Transmitter De-emphasis Enable 0: Tx de-emphasis disabled 1: Tx de-emphasis enabled

PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 0: GEN3 not supported at power-on 1: GEN3 supported at power-on

VGA Control 0: VGA controller capacity ena bled 1: VGA controller capacity disable d (for multi-GPU)

Serial ROM type or Memory Aperture Size Select

If GPIO22 = 0, defines memory aperture size If GPIO22 = 1, defines ROM type

100 - 512Kbit M25P05A (ST) 101 - 1Mbit M25P10A (ST) 101 - 2Mbit M25P20 (ST ) 101 - 4Mbit M25P40 (ST ) 101 - 8Mbit M25P80 (ST ) 100 - 512Kbit Pm25LV512 (Chin gis) 101 - 1Mbit Pm25LV010 (Chingis)

Enable external BIOS ROM device 0: Disabled 1: Enabled

00 - No audio function 01 - Audio for DP only 10 - Audio for DP and HDMI if dongle is detected 11 - Audio for both DP and HDMI HDMI must only be enabled on syst ems that are legally entitled. It is the responsibility of the system designe r to ensure that the system is entitle d to support this featur e.

Enable CEC function. Reserved for Thames/Whistler/Seymour 0: Disabled 1: Enabled

NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET

Reserved Reserved Reserved Reserved (for Th ames/Whistler/Seymour only)

NA NA NA

STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS 111 = 0 usable endpo ints 110 = 1 usable endpo ints 101 = 2 usable endpo ints 100 = 3 usable endpo ints 011 = 4 usable endpo ints 010 = 5 usable endpo ints 001 = 6 usable endpo ints 000 = all endpoints are usable

Default Setting

X

0 0 0 0

XXX

X

1

0

XXX

X

XX

VDDC_CT VDDC_CT

R305

R_pu

PS_0<12> PS_1<12>

PS_2<12> PS_3<1 2>

PS_0 PS_1

C543

Ca Ca

*EV@82n/16V_4

PS_2 PS_3

C153

Ca

*EV@680n/6.3 V_4

*EV@8.45K/F_4

R_pd

R306 *EV@2K/F_4

VDDC_CT VDDC_CT

R50

R_pu

*EV@0_4

R_pd

R49 *EV@4.75K/F_4

Ca

C135 *EV@0.1u/10V_ 4

C126 *EV@680n/6.3 V_4

R_pu

R_pd

R_pu

R_pd

R44 *EV@0_4

R45 *EV@4.75K/F_4

R42 *EV@0_4

R41 *EV@4.75K/F_4

MLPS

R_pu R_pd

NC

4.53K

3.24K

3.4K

4.75K

2K CS23242F B098.45K

2K

4.99K

5.62K

10K

NC

Bits [3: 1]

000

001

010

011

100

101

110

1114.75K

Ra P/N

CS22002F B19

2K

3.24K

CS23402F B084.53K

3.4K

CS24532F B086.98K

4.53K

CS24752F B12

4.75K

CS24992F B26

4.99K

CS25622F B18

5.62K

CS26982F B01

6.98K

CS28452F B12

8.45K

CS31002F B26

10K

MLPS Bit Bits [5:1]

PS_0

PS_1

PS_2

PS_3

11000

00000

00XXX

Ca Bi ts [5:4 ]

680nF

82nF

10nF

NC

Size Document Number Rev

Date: Sheet of

00

01

10

11

Opal(Jet )_M2 / STRAPS_T hermal

P/N

CH4681K9 B0001001

CH3823K1 B00

CH31003K B11

Quanta Computer Inc.

PROJECT :

ZQN

14 3 8Tuesday, Marc h 11, 2014

A1A

+1.5V_GFX

C158 *EV@4.7u/6.3V_ 6

C96 *EV@1u/6.3V_4

C71 *EV@0.1u/10V_ 4

C115 *EV@0.1u/10V_ 4

Level translation between cor e and I/O, excluding memory receivers.

+1.8V_GFX

I/O power for 3.3-V pins, such as GPIOs.

+3V_GFX

Opal only, DNI for Jet

+1.8V_GFX

Power for all DVP pins; DVPDATA_[23:0]—DVO or GPIO.

C128 *EV@4.7u/6.3V_ 6

C61 *EV@1u/6.3V_4

C58 *EV@1u/6.3V_4

C54 *EV@0.1u/10V_ 4

C57 *EV@0.1u/10V_ 4

L11 *EV@BLM15BD121SN1D_0 .3A_4

L12 *EV@BLM15BD121SN1D_0 .3A

L8

*EV@BLM15BD121SN1D_3 00MA

(2.2A)

C50 *EV@4.7u/6.3V_ 6

C65 *EV@0.1u/10V_ 4

C59 *EV@0.1u/10V_ 4

GPUVDDC_SENSE<36>

GPUVSS_SENSE<36 >

C136 *EV@1u/6.3V_4

VDDC_CT

C10 *EV@10u/6.3V_ 6

C70 *EV@1u/6.3V_4

C161 *EV@0.1u/10V_ 4

C81 *EV@0.1u/10V_ 4

C591

*EV@22u/6.3V_ 8

(17mA)

C169 *EV@4.7u/6.3V_ 6

C141 *EV@1u/6.3V_4

(60mA)

C178 *EV@4.7u/6.3V_ 6

C168 *EV@4.7u/6.3V_ 6

(300mA)

C148 *EV@4.7u/6.3V_ 6

C146 *EV@4.7u/6.3V_ 6

C139 *EV@1u/6.3V_4

GPUVDDC/GPUVSS route a differtial pair.

R74 *SHORT_4

R73 *SHORT_4

03/17 sh ort Pad

C52 *EV@10u/6.3V_ 6

C63 *EV@1u/6.3V_4

C142 *EV@1u/6.3V_4

C155 *EV@1u/6.3V_4

C140 *EV@0.1u/10V_ 4

C60 *EV@1u/6.3V_4

VDDC_CT

C154 *EV@0.1u/10V_ 4

VDDR3

C164 *EV@1u/6.3V_4

VDDR4

GPUVDDC_SENSE_GPU

TP50

GPUVSS_SENSE_GPU

AD11

AG10

AF26 AF27 AG26 AG27

AF23 AF24 AG23 AG24

AD12 AF11 AF12 AF13

AF15 AG11 AG13 AG15

AF28

AG28

AH29

U19E

PART 5 0F 9

MEM I/O

AC7

VDDR1

AF7

VDDR1

AJ7

VDDR1

AK8

VDDR1

AL9

VDDR1

G11

VDDR1

G14

VDDR1

G17

VDDR1

G20

VDDR1

G23

VDDR1

G26

VDDR1

G29

VDDR1

H10

VDDR1

J7

VDDR1

J9

VDDR1

K11

VDDR1

K13

VDDR1

K8

VDDR1

L12

VDDR1

L16

VDDR1

L21

VDDR1

L23

VDDR1

L26

VDDR1

L7

VDDR1

M11

VDDR1

N11

VDDR1

P7

VDDR1

R11

VDDR1

U11

VDDR1

U7

VDDR1

Y11

VDDR1

Y7

VDDR1

LEVEL

TRANSLATION

VDD_CT

I/O

VDDR3

DVP

VDDR4

VOLTAGE

SENESE

FB_VDDC

FB_VDDCI

FB_GND

PCIE

BACO

CORE

ISOLATED

*EV@GPU_M2

CORE I/O

NC_PCIE_VDDR

NC_BIF_VDDC

PCIE_PVDD

PCIE_VDDC

BIF_VDDC

AA31 AA32 AA33 AA34 W30 Y31 V28 W29 AB37

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

N27 T27

AA15

VDDC

AA17

VDDC

AA20

VDDC

AA22

VDDC

AA24

VDDC

AA27

VDDC

AB16

VDDC

AB18

VDDC

AB21

VDDC

AB23

VDDC

AB26

VDDC

AB28

VDDC

AC17

VDDC

AC20

VDDC

AC22

VDDC

AC24

VDDC

AC27

VDDC

AD18

VDDC

AD21

VDDC

AD23

VDDC

AD26

VDDC

AF17

VDDC

AF20

VDDC

AF22

VDDC

AG16

VDDC

AG18

VDDC

AH22

VDDC

AH27

VDDC

AH28

VDDC

M26

VDDC

N24

VDDC

R18

VDDC

R21

VDDC

R23

VDDC

R26

VDDC

T17

VDDC

T20

VDDC

T22

VDDC

T24

VDDC

U16

VDDC

U18

VDDC

U21

VDDC

U23

VDDC

U26

VDDC

V17

VDDC

V20

VDDC

V22

VDDC

V24

VDDC

V27

VDDC

Y16

VDDC

Y18

VDDC

Y21

VDDC

Y23

VDDC

Y26

VDDC

Y28

VDDC

AA13

VDDCI

AB13

VDDCI

AC12

VDDCI

AC15

VDDCI

AD13

VDDCI

AD16

VDDCI

M15

VDDCI

M16

VDDCI

M18

VDDCI

M23

VDDCI

N13

VDDCI

N15

VDDCI

N17

VDDCI

N20

VDDCI

N22

VDDCI

R12

VDDCI

R13

VDDCI

R16

VDDCI

T12

VDDCI

T15

VDDCI

V15

VDDCI

Y13

VDDCI

2.5A

1.4A

C132 *EV@1u/6.3V_4

C108 *EV@1u/6.3V_4

C130 *EV@10u/6.3V_ 6

VDDCI

PCIE_VDDR

C97 *EV@0.1u/10V_ 4

C87 *EV@1u/6.3V_4

C80 *EV@1u/6.3V_4

C72 *EV@4.7u/6.3V_ 6

C114 *EV@0.1u/10V_ 4

C85 *EV@1u/6.3V_4

C78 *EV@1u/6.3V_4

C122 *EV@1u/6.3V_4

C129 *EV@10u/6.3V_ 6

(8.8A)

C75 *EV@1u/6.3V_4

C73 *EV@4.7u/6.3V_ 6

C98 *EV@1u/6.3V_4

C56 *EV@1u/6.3V_4

C74 *EV@1u/6.3V_4

C120 *EV@1u/6.3V_4

C145 *EV@10u/6.3V_ 6

C99 *EV@1u/6.3V_4

C76 *EV@1u/6.3V_4

C91 *EV@1u/6.3V_4

(440mA)

L4 *EV@HCB1608KF- 121T30_3 A_6

C95 *EV@4.7u/6.3V_ 6

C83 *EV@1u/6.3V_4

(30A)

C107 *EV@1u/6.3V_4

C133 *EV@1u/6.3V_4

C94 *EV@10u/6.3V_ 6

C89 *EV@1u/6.3V_4

C79 *EV@1u/6.3V_4

C127 *EV@4.7u/6.3V_ 6

L2 *EV@HCB1608KF-12 1T30_3A_6 L3 *EV@HCB1608KF-12 1T30_3A_6

C82 *EV@1u/6.3V_4

3.9A

C84 *EV@1u/6.3V_4

C109 *EV@1u/6.3V_4

C131 *EV@1u/6.3V_4

C118 *EV@4.7u/6.3V_ 6

+1.8V_GFX

C67 *EV@4.7u/6.3V_ 6

+VGPU_CORE

C77 *EV@1u/6.3V_4

C121 *EV@1u/6.3V_4

C117 *EV@4.7u/6.3V_ 6

+PCIE_VDDC_GFX

C64 *EV@4.7u/6.3V_ 6

C68 *EV@4.7u/6.3V_ 6

C90 *EV@1u/6.3V_4

C93 *EV@4.7u/6.3V_ 6

C66 *EV@4.7u/6.3V_ 6

C88 *EV@1u/6.3V_4

C144 *EV@4.7u/6.3V_ 6

C116 *EV@1u/6.3V_4

C101 *EV@4.7u/6.3V_ 6

+VGPU_CORE

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet

Date: Sheet of

PROJECT :

Opal(Jet )_M2 / M ainPo wer

ZQN

15 3 8Monday, March 17 , 2014

of

A1A

Opal only, DNI for Jet

+1.8V_GFX

*EV@PBY160808T-501Y-N_1.2AL7

C147 *EV@4.7u/6.3V_6

(330mA)

C151 *EV@1u/6.3V_4

DPEF_VDD18

C150 *EV@0.1u/10V_4

Opal only, DNI for Jet

R304 *EV@150/F_4

DP_VDDR DP_VDDC

AN24

DP_VDDR

AP24

DP_VDDR

AP25

DP_VDDR

AP26

DP_VDDR

AU28

DP_VDDR

AV29

DP_VDDR

AP20

DP_VDDR

AP21

DP_VDDR

AP22

DP_VDDR

AP23

DP_VDDR

AU18

DP_VDDR

AV19

DP_VDDR

AH34

DP_VDDR

AJ34

DP_VDDR

AF34

DP_VDDR

AG34

DP_VDDR

AM37

DP_VDDR

AL38

DP_VDDR

CALIBRATION

AW28

DPAB_CALR

AW18

DPCD_CALR

AM39

DPEF_CALR

PART 8 0F 9

U19H

Opal/Jet : NC PIN

DP GND

DP_VDDC

DP_VSSR

AP31 AP32 AN33 AP33

AP13 AT13 AP14 AP15

AL33 AM33 AK33 AK34

AN27 AP27 AP28 AW24 AW26 AN29 AP29 AP30 AW30 AW32 AN17 AP16 AP17 AW14 AW16 AN19 AP18 AP19 AW20 AW22 AN34 AP39 AR39 AU37 AF39 AH39 AK39 AL34 AV27 AR28 AV17 AR18 AN38 AM35

DPAB_VDD10

Opal only, DNI for Jet

(330mA)

C187

*EV@4.7u/6.3V_6

C165

*EV@1u/6.3V_4

L15 *EV@PBY160808T-501Y-N_1.2A

C180

*EV@0.1u/10V_4

+PCIE_VDDC_GFX

*EV@GPU_M2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Date: Sheet

PROJECT :

Opal(Jet)_M2/ DP_Powers

ZQN

of

16 38Thursday, February 20, 2014

A1A

<VGA>

AB39

U19F

PART 6 0F 9

PCIE_VSS

E39

PCIE_VSS

F34

PCIE_VSS

F39

PCIE_VSS

G33

PCIE_VSS

G34

PCIE_VSS

H31

PCIE_VSS

H34

PCIE_VSS

H39

PCIE_VSS

J31

PCIE_VSS

J34

PCIE_VSS

K31

PCIE_VSS

K34

PCIE_VSS

K39

PCIE_VSS

L31

PCIE_VSS

L34

PCIE_VSS

M34

PCIE_VSS

M39

PCIE_VSS

N31

PCIE_VSS

N34

PCIE_VSS

P31

PCIE_VSS

P34

PCIE_VSS

P39

PCIE_VSS

R34

PCIE_VSS

T31

PCIE_VSS

T34

PCIE_VSS

T39

PCIE_VSS

U31

PCIE_VSS

U34

PCIE_VSS

V34

PCIE_VSS

V39

PCIE_VSS

W31

PCIE_VSS

W34

PCIE_VSS

Y34

PCIE_VSS

Y39

PCIE_VSS

F15 F17 F19 F21 F23 F25 F27 F29 F31 F33

F7

F9 G2 G6 H9

J2

J27

J6

J8

K14

K7

L11 L17

L2

L22 L24

L6

M17 M22 M24 N16 N18

N2

N21 N23 N26

N6

R15 R17

R2

R20 R22 R24 R27

R6

T11 T13 T16 T18 T21 T23

T26 U15 U17

U2 U20 U22 U24 U27

U6 V11 V16 V18 V21 V23 V26

W2

W6 Y15 Y17 Y20 Y22 Y24 Y27

GND

*EV@GPU_M2

VSS_MECH

A3

GND

A37

GND

AA16

GND

AA18

GND

AA2

GND

AA21

GND

AA23

GND

AA26

GND

AA28

GND

AA6

GND

AB12

GND

AB15

GND

AB17

GND

AB20

GND

AB22

GND

AB24

GND

AB27

GND

AC11

GND

AC13

GND

AC16

GND

AC18

GND

AC2

GND

AC21

GND

AC23

GND

AC26

GND

AC28

GND

AC6

GND

AD15

GND

AD17

GND

AD20

GND

AD22

GND

AD24

GND

AD27

GND

AD9

GND

AE2

GND

AE6

GND

AF10

GND

AF16

GND

AF18

GND

AF21

GND

AG17

GND

AG2

GND

AG20

GND

AG22

GND

AG6

GND

AG9

GND

AH21

GND

AJ10

GND

AJ11

GND

AJ2

GND

AJ28

GND

AJ6

GND

AK11

GND

AK31

GND

AK7

GND

AL11

GND

AL14

GND

AL17

GND

AL2

GND

AL20

GND

AL23

GND

AL26

GND

AL32

GND

AL6

GND

AL8

GND

AM11

GND

AM31

GND

AM9

GND

AN11

GND

AN2

GND

AN30

GND

AN6

GND

AN8

GND

AP11

GND

AP7

GND

AP9

GND

AR5

GND

B11

GND

B13

GND

B15

GND

B17

GND

B19

GND

B21

GND

B23

GND

B25

GND

B27

GND

B29

GND

B31

GND

B33

GND

B7

GND

B9

GND

C1

GND

C39

GND

E35

GND

E5

GND

F11

GND

F13

GND

A39 AW1 AW39

Quanta Computer Inc.

PROJECT :

Size Docu ment Number Rev

Date: Sheet of

PROJECT :

Opal(Jet )_M2 / GND

ZQN

17 38T hursday, F ebruary 2 0, 2014

A1A

<VGA>

VMA_BA0<19> VMA_BA1<19> VMA_BA2<19>

(0.7*VDD R1)

C51 *EV@1u/6.3V_4

(0.7*VDD R1)

VMA_DQ[63..0]

VMA_DM[7..0]

VMA_RDQS[7..0]

VMA_WDQS[7..0]

VMA_MA[15..0]

VMA_BA0 VMA_BA1 VMA_BA2

VMA_DQ[63..0]<19>

VMA_DM[7..0]<19>

VMA_RDQS[7..0]<19>

VMA_WDQS[7..0]<19>

VMA_MA[15..0]<19>

Place MVREF div iders and Caps close to ASIC

+1.5V_GFX

R26 *EV@40.2/F_4

R24 *EV@100/F_4

+1.5V_GFX

R28 *EV@40.2/F_4

VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63

MVREFDA MVREFSA

R31 *EV@12 0/F_4

AG12

AH12

C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10

G8

K9

K10

G9

A8

C8

E8 A6

C6

E6 A5

L18 L20

L27 N12

M12 M27

DQA0_0

DQA0_1

DQA0_2

DQA0_3

DQA0_4

DQA0_5

DQA0_6

DQA0_7

DQA0_8

DQA0_9

DQA0_10

DQA0_11

DQA0_12

DQA0_13

DQA0_14

DQA0_15

DQA0_16

DQA0_17

DQA0_18

DQA0_19

DQA0_20

DQA0_21

DQA0_22

DQA0_23

DQA0_24

DQA0_25

DQA0_26

DQA0_27

DQA0_28

DQA0_29

DQA0_30

DQA0_31

DQA1_0

DQA1_1

DQA1_2

DQA1_3

DQA1_4

DQA1_5

DQA1_6

DQA1_7

DQA1_8

DQA1_9

DQA1_10

DQA1_11

DQA1_12

DQA1_13

DQA1_14

DQA1_15

DQA1_16

DQA1_17

DQA1_18

DQA1_19

DQA1_20

DQA1_21

DQA1_22

DQA1_23

DQA1_24

DQA1_25

DQA1_26

DQA1_27

DQA1_28

DQA1_29

DQA1_30

DQA1_31

MVREFDA

MVREFSA

NC_MEM_CALRN0

NC_MEM_CALRN1

NC_MEM_CALRN2

NC_MEM_CALRP1

MEM_CALRP0

MEM_CALRP2

PART 3 0F 9

GDDR5/DDR3

*EV@GPU_M2

VMB_BA0<20> VMB_BA1<20> VMB_BA2<20>

C110 *EV@1u/6.3V_4

VMB_DQ[63..0]

VMB_DM[7..0]

VMB_RDQS[7..0]

VMB_WDQS[7..0]

VMB_MA[15..0]

VMB_BA0 VMB_BA1 VMB_BA2

VMB_DQ0 VMB_DQ1 VMB_DQ2 VMB_DQ3 VMB_DQ4 VMB_DQ5 VMB_DQ6 VMB_DQ7 VMB_DQ8 VMB_DQ9 VMB_DQ10 VMB_DQ11 VMB_DQ12 VMB_DQ13 VMB_DQ14 VMB_DQ15 VMB_DQ16 VMB_DQ17 VMB_DQ18 VMB_DQ19 VMB_DQ20 VMB_DQ21 VMB_DQ22 VMB_DQ23 VMB_DQ24 VMB_DQ25 VMB_DQ26 VMB_DQ27 VMB_DQ28 VMB_DQ29 VMB_DQ30 VMB_DQ31 VMB_DQ32 VMB_DQ33 VMB_DQ34 VMB_DQ35 VMB_DQ36 VMB_DQ37 VMB_DQ38 VMB_DQ39 VMB_DQ40 VMB_DQ41 VMB_DQ42 VMB_DQ43 VMB_DQ44 VMB_DQ45 VMB_DQ46 VMB_DQ47 VMB_DQ48 VMB_DQ49 VMB_DQ50 VMB_DQ51 VMB_DQ52 VMB_DQ53 VMB_DQ54 VMB_DQ55 VMB_DQ56 VMB_DQ57 VMB_DQ58 VMB_DQ59 VMB_DQ60 VMB_DQ61 VMB_DQ62 VMB_DQ63

MVREFDB MVREFSB

AA12

U19D

PART 4 0F 9

DQB0_0

DQB0_1

DQB0_2

DQB0_3

DQB0_4

DQB0_5

DQB0_6

DQB0_7

DQB0_8

DQB0_9

DQB0_10

DQB0_11

DQB0_12

DQB0_13

DQB0_14

DQB0_15

DQB0_16

DQB0_17

DQB0_18

DQB0_19

DQB0_20

DQB0_21

DQB0_22

DQB0_23

DQB0_24

DQB0_25

DQB0_26

DQB0_27

DQB0_28

DQB0_29

DQB0_30

DQB0_31

DQB1_0

DQB1_1

DQB1_2

DQB1_3

DQB1_4

DQB1_5

DQB1_6

DQB1_7

DQB1_8

DQB1_9

DQB1_10

DQB1_11

DQB1_12

DQB1_13

DQB1_14

DQB1_15

DQB1_16

DQB1_17

DQB1_18

DQB1_19

DQB1_20

DQB1_21

DQB1_22

DQB1_23

DQB1_24

DQB1_25

DQB1_26

DQB1_27

DQB1_28

DQB1_29

DQB1_30

DQB1_31

MVREFDB

MVREFSB

GDDR5/DDR3

*EV@GPU_M2

MAB0_0/MAB_0

MAB0_1/MAB_1

MAB0_2/MAB_2

MAB0_3/MAB_3

MAB0_4/MAB_4

MAB0_5/MAB_5

MAB0_6/MAB_6

MAB0_7/MAB_7

MAB1_0/MAB_8

MAB1_1/MAB_9

MAB1_2/MAB_10

MAB1_3/MAB_11

MAB1_4/MAB_12

MAB1_5/BA2

MAB1_6/BA0

MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

MEMORY INTERFACE B

WCKB1B_1/DQMB_7

EDCB0_0/QSB_0

EDCB0_1/QSB_1

EDCB0_2/QSB_2

EDCB0_3/QSB_3

EDCB1_0/QSB_4

EDCB1_1/QSB_5

EDCB1_2/QSB_6

EDCB1_3/QSB_7

DDBIB0_0/QSB_0B

DDBIB0_1/QSB_1B

DDBIB0_2/QSB_2B

DDBIB0_3/QSB_3B

DDBIB1_0/QSB_4B

DDBIB1_1/QSB_5B

DDBIB1_2/QSB_6B

DDBIB1_3/QSB_7B

ADBIB0/ODTB0

ADBIB1/ODTB1

MAB0_8/MAB_13

MAB1_8/MAB_14

MAB0_9/MAB_15

MAB1_9/RSVD

C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3

Y5 AA4 AB6 AB1 AB3

AD6 AD1 AD3 AD5

AF1 AF3 AF6

AG4 AH5 AH6

AJ4 AK3 AF8 AF9

AG8 AG7

AK9 AL7

AM8 AM7

AK1 AL4

AM6 AM1 AN4

AP3 AP1 AP5

Y12

RASB0B

RASB1B

CASB0B

CASB1B

CSB0B_0

CSB0B_1

CSB1B_0

CSB1B_1

DRAM_RST

CLKB0B

CLKB1B

WEB0B

WEB1B

VMB_MA0

P8

VMB_MA1

T9

VMB_MA2

P9

VMB_MA3

N7

VMB_MA4

N8

VMB_MA5

N9

VMB_MA6

U9

VMB_MA7

U8

VMB_MA8

Y9

VMB_MA9

W9

VMB_MA10

AC8

VMB_MA11

AC9

VMB_MA12

AA7

VMB_BA2

AA8

VMB_BA0

Y8

VMB_BA1

AA9

VMB_DM0

H3

VMB_DM1

H1

VMB_DM2

T3

VMB_DM3

T5

VMB_DM4

AE4

VMB_DM5

AF5

VMB_DM6

AK6

VMB_DM7

AK5

VMB_RDQS0

F6

VMB_RDQS1

K3

VMB_RDQS2

P3

VMB_RDQS3

V5

VMB_RDQS4

AB5

VMB_RDQS5

AH1

VMB_RDQS6

AJ9

VMB_RDQS7

AM5

VMB_WDQS0

G7

VMB_WDQS1

K1

VMB_WDQS2

P1

VMB_WDQS3

W4

VMB_WDQS4

AC4

VMB_WDQS5

AH3

VMB_WDQS6

AJ8

VMB_WDQS7

AM3

T7 W7

VMB_CLK0

L9

CLKB0

VMB_CLK0#

L8

VMB_CLK1

AD8

CLKB1

VMB_CLK1#

AD7

VMB_RAS0#

T10

VMB_RAS1#

Y10

VMB_CAS0#

W10

VMB_CAS1#

AA10

VMB_CS0#

P10 L10

VMB_CS1#

AD10 AC10

VMB_CKE0

U10

CKEB0

VMB_CKE1

AA11

CKEB1

VMB_WE0#

N10

VMB_WE1#

AB11

VMB_MA13

T8

VMB_MA14

W8

VMB_MA15

U12 V12

GPU_DRAM_RST

AH11

VMB_ODT0 <20> VMB_ODT1 <20>

VMB_CLK0 <20> VMB_CLK0# <20>

VMB_CLK1 <20> VMB_CLK1# <20>

VMB_RAS0# <20 > VMB_RAS1# <20 >

VMB_CAS0# <20 > VMB_CAS1# <20 >

VMB_CS0# <20>

VMB_CS1# <20>

VMB_CKE0 <20> VMB_CKE1 <20>

VMB_WE0# <20> VMB_WE1# <20>

VMB_DQ[63..0]<20>

R38 *EV@40.2/F_4

R37 *EV@100/F_4

R40 *EV@40.2/F_4

VMB_DM[7..0]<20>

VMB_RDQS[7..0]<20>

VMB_WDQS[7..0]<20>

VMB_MA[15..0]<20>

(0.7*VDD R1)

U19C

VMA_MA0

G24

MAA0_0/MAA_0

MAA0_1/MAA_1

MAA0_2/MAA_2

MAA0_3/MAA_3

MAA0_4/MAA_4

MAA0_5/MAA_5

MAA0_6/MAA_6

MAA0_7/MAA_7

MAA1_0/MAA_8

MAA1_1/MAA_9

MAA1_2/MAA_10

MAA1_3/MAA_11

MAA1_4/MAA_12

MAA1_5/MAA_BA2

MAA1_6/MAA_BA0

MAA1_7/MAA_BA1

MEMORY INTERFACE A

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

WCKA1B_1/DQMA_7

EDCA0_0/QSA_0

EDCA0_1/QSA_1

EDCA0_2/QSA_2

EDCA0_3/QSA_3

EDCA1_0/QSA_4

EDCA1_1/QSA_5

EDCA1_2/QSA_6

EDCA1_3/QSA_7

DDBIA0_0/QSA_0B

DDBIA0_1/QSA_1B

DDBIA0_2/QSA_2B

DDBIA0_3/QSA_3B

DDBIA1_0/QSA_4B

DDBIA1_1/QSA_5B

DDBIA1_2/QSA_6B

DDBIA1_3/QSA_7B

ADBIA0/ODTA0

ADBIA1/ODTA1

MAA0_8/MAA_13

MAA1_8/MAA_14

MAA0_9/MAA_15

MAA1_9/RSVD

CLKA0B

CLKA1B

RASA0B

RASA1B

CASA0B

CASA1B

CSA0B_0

CSA0B_1

CSA1B_0

CSA1B_1

VMA_MA1

J23

VMA_MA2

H24

VMA_MA3

J24

VMA_MA4

H26

VMA_MA5

J26

VMA_MA6

H21

VMA_MA7

G21

VMA_MA8

H19

VMA_MA9

H20

VMA_MA10

L13

VMA_MA11

G16

VMA_MA12

J16

VMA_BA2

H16

VMA_BA0

J17

VMA_BA1

H17

VMA_DM0

A32

VMA_DM1

C32

VMA_DM2

D23

VMA_DM3

E22

VMA_DM4

C14

VMA_DM5

A14

VMA_DM6

E10

VMA_DM7

D9

VMA_RDQS0

C34

VMA_RDQS1

D29

VMA_RDQS2

D25

VMA_RDQS3

E20

VMA_RDQS4

E16

VMA_RDQS5

E12

VMA_RDQS6

J10

VMA_RDQS7

D7

VMA_WDQS0

A34

VMA_WDQS1

E30

VMA_WDQS2

E26

VMA_WDQS3

C20

VMA_WDQS4

C16

VMA_WDQS5

C12

VMA_WDQS6

J11

VMA_WDQS7

F8

J21 G19

VMA_CLK0

H27

CLKA0

VMA_CLK0#

G27

VMA_CLK1

J14

CLKA1

VMA_CLK1#

H14

VMA_RAS0#

K23

VMA_RAS1#

K19

VMA_CAS0#

K20

VMA_CAS1#

K17

VMA_CS0#

K24 K27

VMA_CS1#

M13 K16

VMA_CKE0

K21

CKEA0

VMA_CKE1

J20

CKEA1

VMA_WE0#

K26

WEA0B

VMA_WE1#

L15

WEA1B

VMA_MA13

H23

VMA_MA14

J19

VMA_MA15

M21 M20

VMA_ODT0 <19> VMA_ODT1 <19>

VMA_CLK0 <19> VMA_CLK0# <19>

VMA_CLK1 <19>

VMA_CLK1# <19>

VMA_RAS0# <19> VMA_RAS1# <19>

VMA_CAS0# <19> VMA_CAS1# <19>

VMA_CS0# <19>

VMA_CS1# <19>

VMA_CKE0 <19> VMA_CKE1 <19>

VMA_WE0# <19> VMA_WE1# <19>

+1.5V_GFX

R27 *EV@100/F_4

C55 *EV@1u/6.3V_4

R39 *EV@100/F_4

C123 *EV@1u/6.3V_4

Place MVREF div iders and Caps close to ASIC

25mm (max) 5mm (max) 25mm (max)

GPU_DRAM_RST

Place all these componets very close to GPU (within 25mm) and keep all components close to each other ** This basic topology should be used for DRAM_RAT for DDR3/GDDR5

These Capacitors and Resistor values arre an example only The series R and || cap values will depend on the DRAM loads and will have to be calculated for differrent Memory, DRAM loads and board to pass Reset Signal Spec

R345 *EV@10/F_4 R346 *EV@51/F_4

R344 *EV@4.99K/F_4

DRST_R

C581

*EV@120p/50V_ 4

MEM_RST# <19,20>

Quanta Computer Inc.

PROJECT :

Size Docu ment Number Rev

Date: Sheet of

PROJECT :

Opal(Jet )_M2 / M EM Interf ace

ZQN

18 38T hursday, F ebruary 2 0, 2014

A1A

5

VMA_DQ[63..0]<18>

VMA_DM[7..0]<18>

VMA_RDQS[7..0]<18 >

VMA_WDQS[7..0]<18>

D D

C C

VMA_DQ[63..0]

VMA_DM[7..0]

VMA_RDQS[7..0]

VMA_WDQS[7..0]

VMA_MA13<18> VMA_MA14<18> VMA_MA15<18>

VMA_CLK0#<18> VMA_CKE0<18>

VMA_RAS0#<18> VMA_CAS0#<18>

MEM_RST#<18,2 0>

U1

VREFC_VMA1

M8

VREFD_VMA1

VMA_MA0<18> VMA_MA1<18> VMA_MA2<18> VMA_MA3<18> VMA_MA4<18> VMA_MA5<18> VMA_MA6<18> VMA_MA7<18> VMA_MA8<18>

VMA_MA9<18> VMA_MA10<18> VMA_MA11<18> VMA_MA12<18>

VMA_BA0<18 >

VMA_BA1<18 >

VMA_BA2<18 >

VMA_CLK0<18>

VMA_ODT0<1 8>

VMA_CS0#<18>

VMA_WE0#<18 >

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA13 VMA_MA14 VMA_MA14 VMA_MA15 VMA_MA15

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLK0 VMA_CLK0# VMA_CKE0

VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#

VMA_RDQS3

VMA_DM0 VMA_DM1 VMA_DM3

VMA_WDQS3

MEM_RST#

VMA_ZQ1

R3

*EV@243 /F_4

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

*EV@VRAM _DDR 3

100-B ALL SDRAM DDR 3

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_DQ7

E3

VMA_DQ3

DQL0

F7

VMA_DQ5

DQL1

F2

VMA_DQ1 VMA_DQ13

DQL2

F8

VMA_DQ4

DQL3

H3

VMA_DQ0

DQL4

H8

VMA_DQ6

DQL5

G2

VMA_DQ2

DQL6

H7

DQL7

VMA_DQ25

D7

VMA_DQ31

DQU0

C3

VMA_DQ27

DQU1

C8

VMA_DQ30

DQU2

C2

VMA_DQ24

DQU3

A7

VMA_DQ29

DQU4

A2

VMA_DQ26

DQU5

B8

VMA_DQ28

DQU6

A3

DQU7

+1.5V_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA2 VREFD_VMA2

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLK0 VMA_CLK0# VMA_CKE0

VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#

VMA_RDQS1VMA_RDQS0 VMA_RDQS2

VMA_DM2

VMA_WDQS1VMA_WDQS0 VMA_WDQS2

MEM_RST#

VMA_ZQ2

R6

*EV@243 /F_4

4

3

2

1

CHANNEL A: 512MB DDR3 (64M*16*4pcs)

U16

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

*EV@VRAM _DDR 3

100-B ALL SDRAM DDR 3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9

VDD#G7

VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2

VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9

VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VREFC_VMA3

VMA_DQ12

E3

VMA_DQ11

F7

VMA_DQ8

F2 F8

VMA_DQ15

H3

VMA_DQ14

H8

VMA_DQ9

G2

VMA_DQ10

H7

VMA_DQ22

D7

VMA_DQ19

C3

VMA_DQ20

C8

VMA_DQ16

C2

VMA_DQ21

A7

VMA_DQ17

A2

VMA_DQ23

B8

VMA_DQ18

A3

+1.5V_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VMA_CLK1<18>

VMA_CLK1#<18>

VMA_CKE1<18>

VMA_ODT1<18>

VMA_CS1#<18> VMA_RAS1#<1 8> VMA_CAS1#<1 8> VMA_WE1#< 18>

VREFD_VMA3

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA13 VMA_MA14 VMA_MA14 VMA_MA15 VMA_MA15

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLK1 VMA_CLK1# VMA_CKE1

VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#

VMA_RDQS6 VMA_RDQS4

VMA_DM6 VMA_DM4

VMA_WDQS6 VMA_WDQS4

MEM_RST#

U17

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

VDDQ#A1

ODT

L2

CS

VDDQ#A8

J3

RAS

VDDQ#C1

K3

CAS

VDDQ#C9

L3

WE

VDDQ#D2 VDDQ#E9

VDDQ#F1

F3

DQSL

VDDQ#H2

C7

DQSU

VDDQ#H9

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

VMA_ZQ3 VMA_ZQ4

L8

ZQ

VSSQ#B1

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

*EV@VRAM _DDR 3

100-B ALL SDRAM DDR 3

VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

R279

*EV@243 /F_4

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9

VSS#T1

VSS#T9

VMA_DQ48

E3

VMA_DQ54

F7

VMA_DQ51

F2

VMA_DQ52

F8

VMA_DQ49

H3

VMA_DQ53

H8

VMA_DQ50

G2

VMA_DQ55

H7

VMA_DQ38

D7

VMA_DQ35

C3

VMA_DQ39

C8

VMA_DQ33

C2

VMA_DQ36

A7

VMA_DQ34

A2

VMA_DQ37

B8

VMA_DQ32

A3

+1.5V_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA4 VREFD_VMA4

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLK1 VMA_CLK1# VMA_CKE1

VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#

VMA_RDQS7 VMA_RDQS5

VMA_DM7 VMA_DM5

VMA_WDQS7 VMA_WDQS5

MEM_RST#

R276

*EV@243 /F_4

U2

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

*EV@VRAM _DDR 3

100-B ALL SDRAM DDR 3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_DQ62

E3

VMA_DQ57

F7

VMA_DQ60

F2

VMA_DQ59

F8

VMA_DQ61

H3

VMA_DQ56

H8

VMA_DQ63

G2

VMA_DQ58

H7

VMA_DQ43

D7

VMA_DQ47

C3

VMA_DQ40

C8

VMA_DQ46

C2

VMA_DQ42

A7

VMA_DQ45

A2

VMA_DQ41

B8

VMA_DQ44

A3

+1.5V_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Group-A1 VREFGroup-A0 VREF

C488

*EV@0.1u /10V_4

+1.5V_GFX +1.5V_GFX+1.5V_GFX +1.5V_GFX

R274 *EV@4.99 K/F_4

VREFC_VMA2 VREFD_VMA2

R275

*EV@4.99 K/F_4

C30 *EV@1u/6 .3V_4

C4 *EV@1u/6 .3V_4

C11 *EV@4.7u /6.3V_6

C489

*EV@0.1u /10V_4

C512 *EV@1u/6 .3V_4

C6 *EV@1u/6 .3V_4

C506 *EV@4.7u /6.3V_6

4

C484 *EV@1u/6 .3V_4

C517 *EV@1u/6 .3V_4

R270 *EV@4.99 K/F_4

R271

*EV@4.99 K/F_4

C504 *EV@4.7u /6.3V_6

C487 *EV@1u/6 .3V_4

C5 *EV@1u/6 .3V_4

C486

*EV@0.1u /10V_4

C516 *EV@1u/6 .3V_4

C3 *EV@1u/6 .3V_4

Group-A1 decoupling CAP

C17 *EV@1u/6 .3V_4

C2 *EV@1u/6 .3V_4

3

+1.5V_GFX+1.5V_GFX

+1.5V_GFX

C32 *EV@1u/6 .3V_4

C519 *EV@1u/6 .3V_4

C491 *EV@4.7u /6.3V_6

R277 *EV@4.99 K/F_4

VREFC_VMA3 VREFD_VMA3

C34 *EV@1u/6 .3V_4

C18 *EV@1u/6 .3V_4

C49 *EV@4.7u /6.3V_6

R278

*EV@4.99 K/F_4

C497 *EV@1u/6 .3V_4

C1 *EV@1u/6 .3V_4

C490 *EV@4.7u /6.3V_6

C494

*EV@0.1u /10V_4

C496 *EV@1u/6 .3V_4

C518 *EV@1u/6 .3V_4

C508 *EV@4.7u /6.3V_6

R9 *EV@4.99 K/F_4

R10

*EV@4.99 K/F_4

C498 *EV@1u/6 .3V_4

C495 *EV@1u/6 .3V_4

C21 *EV@4.7u /6.3V_6

2

C13

*EV@0.1u /10V_4

C19 *EV@1u/6 .3V_4

C499 *EV@1u/6 .3V_4

R7 *EV@4.99 K/F_4

VREFC_VMA4 VREFD_VMA4

R8

*EV@4.99 K/F_4

C16 *EV@1u/6 .3V_4

C20 *EV@1u/6 .3V_4

C12

*EV@0.1u /10V_4

B B

R5 *EV@4.99 K/F_4

VREFC_VMA1

R4

*EV@4.99 K/F_4

C8

*EV@0.1u /10V_4

MEM_A0 CLK

VMA_CLK0

VMA_CLK0#

R2 *EV@40.2 /F_4

A A

R1 *EV@40.2 /F_4

C7 *EV@0.01 u/25V_4

5

R272 *EV@4.99 K/F_4

VREFD_VMA1

R273

*EV@4.99 K/F_4

Group-A0 decoupling CAP

C511 *EV@1u/6 .3V_4

+1.5V_GFX

C485 *EV@1u/6 .3V_4

+1.5V_GFX

C23 *EV@4.7u /6.3V_6

C46 *EV@1u/6 .3V_4

C9 *EV@1u/6 .3V_4

C22 *EV@4.7u /6.3V_6

+1.5V_GFX+1.5V_GFX+1.5V_GFX +1.5V_GFX

R14 *EV@4.99 K/F_4

R13

*EV@4.99 K/F_4

C15

*EV@0.1u /10V_4

MEM_A1 CLK

VMA_CLK1

C515

*EV@1u/6 .3V_4

C493

*EV@1u/6 .3V_4

VMA_CLK1#

R11 *EV@40.2 /F_4

Quanta Com puter Inc.

PROJECT :

Size Doc umen t Num ber Rev

Date: Sh eet

PROJECT :

Opal(Jet)_M2/VRAM_A

1

C14

*EV@0.01 u/25V_4

ZQN

19 38Thurs day, Febru ary 20, 201 4

R12 *EV@40.2 /F_4

of

A1A

5

VMB_CLK0<18> VMB_CLK0#<18> VMB_CKE0<18>

VMB_ODT0<18>

VMB_RAS0#<18> VMB_CAS0#<18> VMB_WE0#<18>

MEM_RST#<18,19>

VMB_MA0<18> VMB_MA1<18> VMB_MA2<18> VMB_MA3<18> VMB_MA4<18> VMB_MA5<18> VMB_MA6<18> VMB_MA7<18> VMB_MA8<18>

VMB_MA9<18> VMB_MA10<18> VMB_MA11<18> VMB_MA12<18> VMB_MA13<18> VMB_MA14<18> VMB_MA15<18>

VMB_BA0<18>

VMB_BA1<18>

VMB_BA2<18>

VMB_CS0#<18>

VMB_DQ[63..0]

VMB_DM[7..0]

VMB_RDQS[7..0]

VMB_WDQS[7..0]

VREFC_VMB1 VREFD_VMB1

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA13 VMB_MA13 VMB_MA13 VMB_MA14 VMB_MA14 VMB_MA14 VMB_MA14 VMB_MA15 VMB_MA15 VMB_MA15 VMB_MA15

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLK0 VMB_CLK0# VMB_CKE0

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

VMB_RDQS0 VMB_RDQS2

VMB_DM0 VMB_DM2

VMB_WDQS0 VMB_WDQS2

MEM_RST#

VMB_ZQ1

*EV@243/F_4

U4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ

NC#J1 NC#L1 NC#J9 NC#L9

100-BALL SDRAM DDR3

*EV@VRAM _DDR3

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

N8 M3

J7 K7 K9

K1 L2

J3 K3 L3

F3 C7

E7 D3

G3 B7

T2

L8

R30

J1 L1

J9 L9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VMB_DQ7

E3

VMB_DQ2

F7

VMB_DQ4

F2

VMB_DQ1

F8

VMB_DQ5

H3

VMB_DQ0

H8

VMB_DQ6

G2

VMB_DQ3

H7

VMB_DQ18

D7

VMB_DQ23

C3

VMB_DQ17

C8

VMB_DQ21

C2

VMB_DQ19

A7 A2

VMB_DQ16

B8

VMB_DQ20

A3

+1.5V_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VMB_DQ[63..0]<18>

VMB_DM[7..0]<18>

VMB_RDQS[7..0]<18>

VMB_WDQS[7..0]<18>

D D

C C

4

3

2

CHANNEL B: 512MB DDR3 (64M*16*4pcs)

VREFC_VMB2 VREFD_VMB2

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLK0 VMB_CLK0# VMB_CKE0

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

VMB_RDQS1 VMB_RDQS3

VMB_DM1 VMB_DM3

VMB_WDQS1 VMB_WDQS3

MEM_RST#

VMB_ZQ2 VMB_ZQ3 VMB_ZQ4

*EV@243/F_4

U18

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ

NC#J1 NC#L1 NC#J9 NC#L9

100-BALL SDRAM DDR3

*EV@VRAM _DDR3

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2

VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

N8 M3

J7 K7 K9

K1 L2 J3 K3 L3

F3

C7

E7

D3

G3

B7

T2

L8

R36

J1 L1 J9 L9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VMB_DQ9

E3

VMB_DQ13

F7

VMB_DQ10

F2

VMB_DQ14

F8

VMB_DQ8

H3

VMB_DQ15

H8

VMB_DQ11

G2

VMB_DQ12

H7

VMB_DQ29

D7

VMB_DQ27

C3

VMB_DQ28

C8

VMB_DQ25

C2

VMB_DQ30

A7

VMB_DQ24VMB_DQ22

A2

VMB_DQ31

B8

VMB_DQ26

A3

+1.5V_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GFX +1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VMB_CLK1<18>

VMB_CLK1#<18> VMB_CKE1<18>

VMB_ODT1<18>

VMB_CS1#<18> VMB_RAS1#<18> VMB_CAS1#<18> VMB_WE1#<18>

VREFC_VMB3 VREFD_VMB3

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLK1 VMB_CLK1# VMB_CKE1

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

VMB_RDQS6 VMB_RDQS5

VMB_DM6 VMB_DM5

VMB_WDQS6 VMB_WDQS5

MEM_RST# MEM_RST#

*EV@243/F_4

U21

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ

NC#J1 NC#L1 NC#J9 NC#L9

100-BALL SDRAM DDR3

*EV@VRAM _DDR3

VDD#B2 VDD#D9

VDD#G7

VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#M1 VSS#M9 VSS#P1 VSS#P9

VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

N8 M3

J7 K7 K9

K1 L2

J3 K3 L3

F3 C7

E7 D3

G3 B7

T2

L8

R47

J1 L1

J9 L9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VSS#J2 VSS#J8

VMB_DQ50

E3

VMB_DQ55

F7

VMB_DQ51

F2

VMB_DQ53

F8

VMB_DQ49

H3

VMB_DQ54

H8

VMB_DQ48

G2

VMB_DQ52

H7

VMB_DQ46

D7

VMB_DQ43

C3

VMB_DQ45

C8

VMB_DQ42

C2

VMB_DQ44

A7

VMB_DQ40

A2

VMB_DQ47

B8

VMB_DQ41

A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMB4 VREFD_VMB4

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLK1 VMB_CLK1# VMB_CKE1

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

VMB_RDQS7 VMB_RDQS4

VMB_DM7 VMB_DM4

VMB_WDQS7 VMB_WDQS4

R296

*EV@243/F_4

U5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

*EV@VRAM _DDR3

100-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

1

VMB_DQ62

E3

VMB_DQ58

F7

VMB_DQ61

F2

VMB_DQ59

F8

VMB_DQ60

H3

VMB_DQ56

H8

VMB_DQ63

G2

VMB_DQ57

H7

VMB_DQ33

D7

VMB_DQ37

C3

VMB_DQ35

C8

VMB_DQ38

C2

VMB_DQ32

A7

VMB_DQ39

A2

VMB_DQ34

B8

VMB_DQ36

A3

+1.5V_GFX+1.5V_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Group-B0 VREF

B B

+1.5V_GFX

R290 *EV@4.99K/F_4

R291

*EV@4.99K/F_4

C42

*EV@1u/6.3V_4

C590

*EV@1u/6.3V_4

C40

*EV@1u/6.3V_4

C33

*EV@1u/6.3V_4

+1.5V_GFX

C521

*EV@0.1u/10V_ 4

C36

*EV@4.7u/6.3V_ 6

C44

*EV@1u/6.3V_4

C106

*EV@1u/6.3V_4

C492

*EV@4.7u/6.3V_ 6

R292 *EV@4.99K/F_4

VREFC_VMB2 VREFD_VMB2

R293

*EV@4.99K/F_4

C41

*EV@1u/6.3V_4

C45

*EV@1u/6.3V_4

C527

*EV@4.7u/6.3V_ 6

4

C524

*EV@0.1u/10V_ 4

C113

*EV@1u/6.3V_4

C537

*EV@1u/6.3V_4

C35

*EV@4.7u/6.3V_ 6

R33 *EV@4.99K/F_4

VREFC_VMB1 VREFD_VMB1

R32

*EV@4.99K/F_4

C69

*EV@0.1u/10V_ 4

MEM_B0 CLK MEM_B1 CLK

VMB_CLK0

VMB_CLK0#

R29 *EV@40.2/F_4

A A

R25 *EV@40.2/F_4

C48 *EV@0.01u/25 V_4

5

+1.5V_GFX+1.5V_GFX+1.5V_ GFX+1.5V_ GFX

C24

*EV@1u/6.3V_4

C594

*EV@1u/6.3V_4

R288 *EV@4.99K/F_4

R289

*EV@4.99K/F_4

C43

*EV@1u/6.3V_4

C536

*EV@1u/6.3V_4

C86

*EV@4.7u/6.3V_ 6

C520

*EV@0.1u/10V_ 4

C535

*EV@1u/6.3V_4

Group-B1 VREF

Group-B1 decoupling CAPGroup-B0 decoupling CAP

+1.5V_GFX

3

C103

*EV@1u/6.3V_4

C100

*EV@1u/6.3V_4

C529

*EV@4.7u/6.3V_ 6

R302 *EV@4.99K/F_4

VREFC_VMB3 VREFD_VMB3

R299

*EV@4.99K/F_4

C600

*EV@1u/6.3V_4

C38

*EV@1u/6.3V_4

C143

*EV@4.7u/6.3V_ 6

C540

*EV@0.1u/10V_ 4

C582

*EV@1u/6.3V_4

C534

*EV@1u/6.3V_4

C92

*EV@4.7u/6.3V_ 6

C201

*EV@1u/6.3V_4

C596

*EV@1u/6.3V_4

R71 *EV@4.99K/F_4

R69

*EV@4.99K/F_4

C105

*EV@1u/6.3V_4

C533

*EV@1u/6.3V_4

C149

*EV@4.7u/6.3V_ 6

2

C194

*EV@0.1u/10V_ 4

C104

*EV@1u/6.3V_4

C31

*EV@1u/6.3V_4

C37

*EV@4.7u/6.3V_ 6

+1.5V_GFX+1.5V_GFX+1.5V_GFX+1.5V_GFX

R294 *EV@4.99K/F_4

VREFC_VMB4 VREFD_VMB4

R295

*EV@4.99K/F_4

C102

*EV@1u/6.3V_4

C532

*EV@1u/6.3V_4

C539

*EV@0.1u/10V_ 4

VMB_CLK1

C577

*EV@1u/6.3V_4

Size Docu ment Number Rev

Date: Sheet of

VMB_CLK1#

R67 *EV@4.99K/F_4

R58

*EV@4.99K/F_4

Opal(Jet )_M2 /VRAM _B

C182

*EV@0.1u/10V_ 4

R53 *EV@40.2/F_4

C157 *EV@0.01u/25 V_4

Quanta Computer Inc.

PROJECT :

ZQN

20 38T uesday, Marc h 11, 2014

1

20 38T uesday, Marc h 11, 2014

R56 *EV@40.2/F_4

A1A

1

CRT

A A

2

CRT_R<4>

CRT_G<4>

CRT_B<4>

3

R123

150/F_4

CRT_R

CRT_G

CRT_B

R122

150/F_4

+5V

L23 BLM18BB470_6

L21 BLM18BB470_6

L18 BLM18BB470_6

R116

150/F_4

4

F1

FUSE_KMC3S110RY/1. 1A_1206

12

CRT_R1

CRT_B1

C276

3.3p/50 V_4

D20 SSM22 LLPT

C278

C281

3.3p/50 V_4

5

C614 0 .1u/10V_4

CRTVDD5

L22 BLM18BB470_6

L20 BLM18BB470_6

L19 BLM18BB470_6

CRT_R2

CRT_G2

CRT_B2

C280 *10p/50V_4

6

C279 *10p/50V_4

C277

*10p/50V_4

7

CN6

1617

6

7 2 8 3 9 4

10

5

111

12

13

14

15

CRT_CONN

CRT_11

DDCDAT_1CRT_G1

CRTHSYNC

CRTVSYNC

DDCCLK_1

TP32

8

+3V

C619

0.1u/10 V_4

C613 0.22u/25V_6

+3V

C625

0.1u/10 V_4

LCD CONNECTOR

B B

EDP_HPD<4>

C C

R281 1 00K_4 R280 *10 0K_4

EDP_AUX_C EDP_AUX#_C

EDP_HPD

R282

100K_4

R17 *10 0K_4 R15 1 00K_4

+3V

EDP_AUX#<4>

EDP_TX1<4> EDP_TX1#<4>

EDP_TX0<4> EDP_TX0#<4>

Camera USB

Touch Panel

D D

CRTVDD5

CRT_BYP

CRT_R2 CRT_G2

CRT_B2

EDP_AUX<4>

U25

1

VCC_SYNC

7

VCC_DDC

8

BYP

2

VCC_VIDEO

3

VIDEO_1

4

VIDEO_2

5

VIDEO_3

6

GND

CM2009-02 QR

SYNC_OUT2 SYNC_OUT1

SYNC_IN2 SYNC_IN1

DDC_IN1 DDC_IN2

DDC_OUT1 DDC_OUT2

16 14

15 13

10 11

9 12

CRT_VSYNC2 CRT_HSYNC2

VSYNC HSYNC

DDCCLK_R DDCDATA_R

DDCCLK_1 DDCDAT_1

R455 *SHO RT_4 R456 *SHO RT_4

R457 *SHO RT_4 R458 *SHO RT_4

R114 2 k/F_4 R115 2 k/F_4

DDCCLK DDCDATA

CRTVSYNC CRTHSYNC

CRTVDD5

VSYNC <4> HSYNC <4>

DDCCLK <4> DDCDATA <4>

C608 *0.1u/ 10V_4

C609 *10p/5 0V_4

C610 *10p/5 0V_4

C274 *10p/5 0V_4

C275 *10p/5 0V_4

CRTVDD5

CRTVSYNC

CRTHSYNC

DDCCLK_1

DDCDAT_1

Power trace tracking

+3V<4,5,7,9, 10,22,23,2 4,25,27,28, 29,31,32,3 3,34,35,36 ,37> +5V<22,25,2 6,28,31,35 >

+3VPCU<6,25,26,2 8,29,30,31 ,35,37>

VIN< 30,31,32,33 ,34,35,36, 37>

LCD Power

+3V

R18

100K_4

APU_BLEN_R

6

4

3

R21

100K_4

U3

IN

ON/OFF

G5243AT11 U

2

Q1 2N7002K

1

OUT

2

GND

5

GND

+3V

R20

10K_4

R19

10K_4

3

2

BL#

3

Q2 2N7002K

1

1 3

C27

*0.1u/10V_ 4

BL_ON

C25

*10u/6.3V_ 6

+3VPCU

R23 *100K_4

LID591#

LID591#,EC intrnal PU

D1 1N4148WS

2

Q3 DTC144EUA

C26

0.1u/10 V_4

LCDVCC

C28

C29

0.01u/2 5V_4

22u/6.3 V_8

LID591# <2 6,29>

EC_FPBACK# <29>

TP_PWR_RCCD_ PWR

C514

C513

0.1u/10 V_4 1000p/5 0V_4

R285 *SHO RT_6

I2C TOUCH

R286 *SHO RT_6

R284 *SHO RT_6

R283 *SHO RT_6

R287 *SHO RT_4

C507 0 .1U/16V_4 C505 0 .1U/16V_4

C503 0 .1U/16V_4 C500 0 .1U/16V_4

C501 0 .1U/16V_4 C502 0 .1U/16V_4

TS_Enable<29>

TP_INT<5>

BOARD_ID4<5>

USBP1+ USBP1-

USBP3+ USBP3-

TP3

TP1 TP2

VIN

+3V

APU_DPST_PWM<4>

EDP_AUX#

EDP_TX1

EDP_TX0

USBP1+<5>

USBP1-<5>

USBP3+<5> USBP3-<5>

I2C TOUCH

For Touch or None-Touch

C510

0.1u/10 V_4

V_BLIGHT

LCDVCC

CCD_PWR

TP_PWR_R

BRIGHT

BL_ON EDP_HPD

EDP_AUX_CEDP_AUX EDP_AUX#_C

EDP_TX1_C EDP_TX1#_CEDP_TX1#

EDP_TX0_C EDP_TX0#_CEDP_TX0#

TP_CLK TP_DATA

TP_INT TP_RST#

C509

1000p/5 0V_4

CN3

APU_DISP_ON<4 >

Panel_50 398

G_5

40 39 38 37 36 35 34 33 32

G_4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

G_1 9 8 7 6 5 4 3 2 1

G_0

Backlight Control

APU_BLEN<4,29>

C39

1u/6.3V_ 4

R16 *SHORT_4

R22 *SHORT_4

APU_DISP_ON_R

Quanta Computer Inc.

PROJECT :

Size Do cument Number Rev

Date: Sheet

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

PROJECT :

CRT/LVDS/CAMERA/LID

ZQN

8

1A

of

21 39Tuesday, Ap ril 29, 2014

5

4

3

2

1

HDMI

INT_HDMITX2N<4> INT_HDMITX2P<4>

INT_HDMITX1N<4> INT_HDMITX1P<4>

D D

INT_HDMITX0N<4> INT_HDMITX0P<4>

INT_HDMICLK+<4> INT_HDMICLK-<4>

C C

C652 0.1u/10V_4 C653 0.1u/10V_4

C647 0.1u/10V_4 C648 0.1u/10V_4

C649 0.1u/10V_4 C650 0.1u/10V_4

C644 0.1u/10V_4 C643 0.1u/10V_4

499/F_4 P/N: CS14992FB24

+5V

HDMI DDC Bus

B B

HDMI_DDCCLK_SW<4>

INT_HDMITX2N_C INT_HDMITX2P_C

INT_HDMITX1N_C INT_HDMITX1P_C

INT_HDMITX0N_C INT_HDMITX0P_C

INT_HDMICLK+_C INT_HDMICLK-_C

R196

100K/F_4

R177

2.2K_4

INT_HDMITX2P_C

INT_HDMITX2N_C INT_HDMITX1P_C

INT_HDMITX1N_C INT_HDMITX0P_C

INT_HDMITX0N_C INT_HDMICLK+_C

R183

499/F_4

R205

499/F_4

R199

499/F_4

+5V

Q13

3

IN

AP2331SA-7

1

OUT

2

GND

HDMI-detect

C642 *220p/50V_4

HDMI_MB_HPD

21

R190

499/F_4

D8 RB501V-40

R160

2.2K_4

D9 RB501V-40

R185

499/F_4

HDMI_DDCCLK_MB

R176

R179

R194

499/F_4

3

Q21

2

2N7002K

1

+5V

+3V

2

Q14

1

3

2N7002K

+5V

+3V

INT_HDMICLK-_C

HDMI_DDCCLK_MB HDMI_DDCDATA_MB

HDMI_MB_HPD

D22 *VARS_AZ5125_4

HDMI_5V

HDMI connector

CN11

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19

R159

100K_4

+3V

R188 10K_4

Q18 2N7002K

2

3

2

1

D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0CK+ CK Shield CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET

HDMI_CONN

+3V

R184 10K_4

3

1

SHELL1

GND

SHELL2

Q19 2N7002K

20

23

22

21

HDMI_HPD <4>

EMI

INT_HDMITX2P_C

R482 *100_4

INT_HDMITX2N_C

INT_HDMITX1P_C

R480 *100_4

INT_HDMITX1N_C

INT_HDMITX0P_C

R481 *100_4

INT_HDMITX0N_C

INT_HDMICLK+_C

R479 *100_4

INT_HDMICLK-_C

R178

2.2K_4

HDMI_DDCDATA_SW<4>

A A

5

2

Q15

1

3

2N7002K

R161

2.2K_4

4

HDMI_DDCDATA_MB

Power trace tracking

+3V<4,5,7,9,10,21,23,24,25,27,28,29,31,32,33,34,35,36,37> +5V<21,25,26,28,31,35>

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

HDMI (PS8101)

ZQN

1A

22 39Tuesday, April 29, 2014

1

5

LAN

D D

LANVCC

R174 *SHORT_8

C C

LANVCC+3V_S5

40 mils (Iout=1A)40 mils (Iout=1A)

C305

C306

10U/6.3V_6

0.1U/10V_4

Power trace tracking

+3V_S5<5,6,7,8,24,26, 27,28,29,31 ,36> +3V<4,5,7,9,1 0,21,22,24 ,25,27,28, 29,31,32,33 ,34,35,36, 37>

LANVCC

VDD10

LANVCC

4

XTAL2

VDD10

33

1 2 3 4 5 6 7 8

U9

GND

MDIP0 MDIN0 AVDD10(NC) MDIP1 MDIN1 MDIP2(NC) MDIN2(NC) AVDD10

RSET

10 mils

31

32

AVDD33

RTL8111G S-CG

10

30

RSET

28

AVDD10

CKXTAL229CKXTAL1

CLKREQB

AVDD33(NC)11MDIP3(NC)9MDIN3(NC)

12

25

27

26

LED0

LED1/GPO

LED2(LED1)

VDDREG(VDD33)

HSIP13HSIN14REFCLK_P15REFCLK_N

16

PCIE_REQ_LAN#_R

REGOUT

DVDD10(NC)

LANWAKEB

ISOLATEB

PERSTB

HSON HSOP

24 23 22 21 20 19 18 17

R133 2.49K/ F_4

MDI_0+ MDI_0-

MDI_1+ MDI_1MDI_2+ MDI_2- GPP_TX2N_LAN

MDI_3+ MDI_3-

XTAL1

REGOUT VDDREG/VDD33 VDD10

ISOLATEB

GPP_TX2P_LAN

3

C312 12p/50V_4

1

2

Y1

25MHZ +-30PPM

4

3

C317 12p/50V_4

PCIE_LAN_WAKE#_R

C328 0.1U/10V_4 C327 0.1U/10V_4

CLK_PCIE_LANN <6> CLK_PCIE_LANP <6> PCIE_TXN2_LAN <3> PCIE_TXP2_LAN <3>

+3V

R158 1K_4

PCIERST# <5,1 1,24,27> PCIE_RXN2_LAN <3> PCIE_RXP2_LAN < 3>

Consider VCC33 may be connected to Main Power or chipset/bios's GPO, the pull-low resistor R14 can be NC only when Main Power or chipset/bios's GPO can ensure to drive the ISOLATEB pin to a voltage level < 0.8V at the system state S1~S5.

If the ISOLATEB pin can not be well-controlled to a voltage level < 0.8V at S1~S5, the pull-low resistor R14 is needed to make sure the LAN chip is well isolated.

R156 *15K_4

2

+3V

R139 *10K_4

2

PCIE_REQ_LAN#<5>

PCIE_LAN_WAKE#<5,24 >

3

1

Q9 *2N7002K

R140 *SHORT_4

+3V_S5

R164 *10K_4

2

Q11

13

*DTC144EUA

R170 *SHORT_4

1

PCIE_REQ_LAN#_R

PCIE_LAN_WAKE#_R

LANVCC

40 mils (Iout=1A)

C352

4.7U/6.3V_6

C296

4.7U/6.3V_6

C307

0.1U/10V_4

For RTL8 111GS * Place 0 .1uF,4.7uF CAP clos e to each VDD33 pin-- 1 1, 32

B B

Transformer

A A

C299

0.1U/10V_4

5

C291

0.01u/50 V_4

R171 *SHORT_8

40 mils (Iout=1A)

MDI_0+

MDI_0-

TCT LANCT3

MDI_1+

MDI_1-

MDI_2+

MDI_2-

MDI_3+

MDI_3-

VDDREG/VDD33

C334

C329

4.7U/6.3V_6

0.1U/10V_4

Remove F or Not Using SW R mode

close to Pin23.

U27

1

TD1+

2

TD1-

3

TCT1

4

TCT2

5

TD2+

6

TD2-

7

TD3+

8

TD3-

9

TCT3

10

TCT4

11

TD4+

12

TD4-

NS692417

4

MX1+

MX1-

MCT1

MCT2

MX2+

MX3+

MCT3

MCT4

MX4+

40 mils (Iout=1A) 40 mils (Iout=1A)

Layout:A ll termi nation signal s hould ha ve 30 mil trac e

LAN_MX0+

24

LAN_MX0-

23

LAN_MCT0

22

LAN_MCT1

21

LAN_MX1+

20

LAN_MX1-

19

MX2-

LAN_MX2+

18

LAN_MX2-

17

MX3-

MX4-

LAN_MCT2

16

LAN_MCT3

15

LAN_MX3+

14

LAN_MX3-

13

R127 75/F_8

R129 75/F_8

R131 75/F_8

R132 75/F_8

L25 4. 7uH

C309

1000p/3 KV_1808

RTL8111 GS (SWR mode) support

C353

4.7U/6.3V_6

LGND

3

C351

0.1U/10V_4

R126

*1M_8

For RTL8 111G(S) * Place 0 .1uF CAP close to each VDD10 pin-- 3 , 8, 22, 30

C298

0.1U/10V_4

D4 *BS4200N-C_181 2

C304

0.1U/10V_4

C303

0.1U/10V_4

RJ45 Connector

Need Check P/N and F/P

2

LAN_MX0+ LAN_MX0LAN_MX1+ LAN_MX2+ LAN_MX2LAN_MX1LAN_MX3+ LAN_MX3-

C301

0.1U/10V_4

For RTL8 111G(S) * Place 1 uF CAP close to e ach VDD10 pin-- 22 (reserv e)

VDD10REGOUT

C302

C297

1U/6.3V_4

0.1U/10V_4

CN9

1 2 3 4 5 6 7 8

LAN_RJ45

9 10

LGND

Size Docu ment Number Rev

Date: Sheet of

LAN (RTL811 1GS)

Tuesday , April 29, 201 4

R143 *SHORT_120 6

C290 *0.01u/50V_4

C322 *0.1U/10V_4

R125 *SHORT_120 6

Quanta Computer Inc.

PROJECT :

1

ZQN

LGND

1A

3923

5

4

3

2

1

Mini Card 1 (MPC)

BT_POWERON#<29>

DTC144EUA

D D

C C

TPM USB2I2C

B B

2/18 Check DNS parts and power source(+3V or +3V_S5)

SERIRQ<6,29> PCLK_TPM<6>

LPC_CLKRUN#<6,28,29>

LPCPD#<5,28>

R130 *0_4 R536 *0_4

TPM_VDD

PLTRST#

D31 *RB500V-40

D32 *NT@RB500V-40

R538 *NT@10K_4

R537 *NT@0_4

CLK_PCIE_WLAN<6> CLK_PCIE_WLAN#<6>

PCIE_CLKREQ_WLAN#<5>

C293 *10p/50V_4

CLK_LPC_DEBUG<6>

PCIE_LAN_WAKE#<5,23>

Q38

1 3

PLTRST#<5,29>

PCIE_TXP1<3> PCIE_TXN1<3>

PCIE_RXP1<3> PCIE_RXN1<3>

LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 LPC_LFRAME# SERIRQ_R

PLTRST#_R

2

+WL_VDD

TP69

+WL_VDD +3V

R487

10K_4

BT_PWRON

17

LAD3

20

LAD2/SPI_IRQ

23

LAD1/MOSI

26

LAD0/MISO

22

LFRAME/SCS

27

SERIRQ

21

LCLK/SCLK

15

CLKRUN/GPIO04

16

LRESET/SPI_RST

28

LPCPD

U8

PLTRST#

2

TPM_VDD

24

VDD3

19

R485

*10K_4

R486 *SHORT_4

R488 *0_4 R489 *0_4

+WL_VDD

R483 *SHORT_4 R484 *SHORT_4

PCIE_CLKREQ_WLAN#_R

13

DTC144EUA Q36

Q37 DTC144EUA

13

VDD2

PCIE_WAKE#_R

TPM_VSB

5

10

VSB

VDD1

PP

GPX/GPIO2

GPIO1

GPIO0/XOR_OUT

GPIO3/BADD

TEST

NC1 NC2 NC3 NC4

GND2

GND14GND318GND4

SP@NPCT620/650_TSSOP2 8

11

25

AL000650K00 : NPCT650AA0WX AL009655K01 : SNI SLB9655TT1.2

BT_PWRON_R

CL_RST1#_WLAN CL_DATA1_WLAN CL_CLK1_WLAN

CLK_PCIE_WLAN_C

CLK_PCIE_WLAN#_C

7 6 2

1 9 8

3 12 13 14

CN12

51

Reserved

49

Reserved

47

Reserved

45

Reserved

43

GND

41

+3.3Vaux

39

+3.3Vaux

37

GND

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

UIM_C4

17

UIM_C8

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

Reserved

3

Reserved

1

WAKE#

MINI-CARD

R541 *IF@4.7K_4 R540 *IF@4.7K_4

1 2

R138 *IF@20K_4

TP71 TP72

R468 *IF@0_4

R542 *NV@10K_4

PLTRST#_R

53

+3.3V

GND

+1.5V

LED_WPAN#

LED_WLAN#

LED_WWAN#

GND

USB_D+

USB_D-

GND

SMB_DATA

SMB_CLK

+1.5V

GND

+3.3Vaux

PERST#

W_DISABLE#

GND

UIM_VPP

UIM_RESET

UIM_CLK UIM_DATA UIM_PWR

+1.5V

GND

+3.3V

GND54GND

TPM_VDD

+WL_VDD +1.5V_WLAN

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18

16 14 12 10 8 6 4 2

WL_CLK_SDATA WL_CLK_SCLK

RF_EN

A_LFRAME#_R A_LAD3_R A_LAD2_R A_LAD1_R A_LAD0_R

+3V +WL_VDD

USBP7+ <5>

C674 1U/10V_4

I2C_INT#

R512 2.2K_4 R510 2.2K_4

USBP7- <5>

CLK_SDATA <5,9,10>

CLK_SCLK <5,9,10>

PCIERST# <5,11,23,27>

RF_EN <29>

LPC_LFRAME# <6,8,29> LPC_LAD3 <6,29> LPC_LAD2 <6,29> LPC_LAD1 <6,29> LPC_LAD0 <6,29>

I2C_PWR

C669

4.7U/6.3V_6

C670

0.1u/10V_4

12

24

18

4 5 6

1 20 21 22 23

2

I2C_PWR

U28

Debug

VCCD

VDDD

CY7C65211-24TXI

GPIO_0

GPIO_8 GPIO_9 GPIO_10

SCB_0_GPIO_6 SCB_0_GPIO_2 SCB_0_GPIO_3 SCB_0_GPIO_4 SCB_0_GPIO_5 SCB_0_GPIO_7

R476 *0_4 R477 *0_4

R478 *0_4 R470 *0_4 R471 *0_4 R472 *0_4 R473 *0_4

TP_PWR TP_PWR

+3V

R547 *0_4

R548 *SHORT_4

TP_I2C_SCL<28> TP_I2C_SDA<28> USBP2+ <5>

I2C_PWR

R490 *SHORT_8

C639 *1000p/50V_4

VSSD1 VSSD2 VSSD3

VSSA EPAD

VBUS

USBDP USBDM

GPIO_11

GPIO_1

SUSPEND

WAKEUP

XRES

MCU_65211-24LTXI

C655 10u/6.3V_6

C637 *0.1u/10V_4

3 13 16 17 25

15

10 11

7 19 8 9 14

+1.5V_WLAN

*10u/6.3V_8

C636

+WL_VDD

C641

0.1u/10V_4

R469 *0_6

R519 *0_4

C678

4.7U/6.3V_6

C638 *0.1u/10V_4

+3V

C677

0.1u/10V_4

USBP2- <5>

+1.5V

R520 *SHORT_4

C640 *0.1u/10V_4

+3V

A A

TPM_VDD

C295 *0.1U/10V_4

C294 *0.1U/10V_4

C313 *0.1U/10V_4

5

C311 *0.1U/10V_4

R128

*0_4

C292 *10u/6.3V_6

+3V For Infineon +3V_S5 For nuvoton

R543 *IF@0_4

+3V

R544 *NV@0_4

+3V_S5

4

C686

*0.1u/10V_4

TPM_VSB

C687 *10u/6.3V_6

R553

Q45

TP_I2C_INT#<5,28>

BAT54C

R551 *0_4

3

2

10K_4

I2C_INT#

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet

Date: Sheet of

PROJECT :

Mini-Card/WL/3 G/SIM

ZQN

of

24 39Tuesday, April 29, 2014

1

1A

5

4

3

2

1

Codec(ADO)

HP-R2

HP-L2

LINE1-VREFO-L

LINE1-VREFO-R

MIC2-VREFO

CODEC_VREF

D D

+1.5VA

C443

10u/6.3V_4

ADOGND

Place ne xt to p in 40

Analog

Digital

C C

L28

+5V

PBY160808T-600Y-N(60,3A)

C444

0.1u/10V_4

near Cod ec

Tied at one point only under the codec or near the codec

R216 *SHORT_4

R239 *0_4 R241 *0_4 R261 *0_4 R518 *0_4 R233 *0_4

C465 *1000p/50V_4

B B

C679 *0.1u/10V_4

ADOGND

Cap need near AVDD1 and AVDD2 power source input

C415

10u/6.3V_4

near Cod ec

Low is power down amplifier output

C414

0.1u/10V_4

+3V

placed c lose to codec

ADOGND

C442 10u/6.3V_4

+5V_PVDD

L_SPK+

C434

L_SPK-

0.1u/10V_4

R_SPK-

R_SPK+

PD#

TP49

R207 *SHORT_6

0.1u/10V_4

Place ne xt to p in 1

+AZA_VDD

37

38

39

40

41

42

43

44

45

46

47

48

49

C44610u/6.3 V_4

36

CPVDD

CBP

AVSS2

LDO2-CAP

AVDD2

PVDD1

SPK-L+

SPK-L-

SPK-R-

SPK-R+

PVDD2

PDB

SPDIFO/GPIO2

DGND

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CL K3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP

+AZA_VDD

C403

10u/6.3V_4

R215 22_4

C399 10p/50V_4

C452

1u/10V_4

C409

DMIC_DAT_L

DMIC_CLK_L

need check with DMIC vender

35

CBN

C4501u /10V_4

34

CPVEE

DMIC_CLK

32

33

31

HP-OUT-L

HP-OUT-R

ALC283

29

30

MIC2-VREFO

LINE1-VREFO-L

LINE1-VREFO-R

C407 10u/6.3V_ 4

close to codec

ACZ_SDIN

C397 22p/50V_4

28

VREF

INT_AMIC-VREFO

27

25

26

AVSS1

AVDD1

LDO1-CAP

MIC1-CAP

MIC2-R/SLEEVE

MIC2-L/RING2

MONO-OUT

12

PCH_AZ_CODEC_RST#

R214 33_4

C458 2.2u/6.3V_4

C457 10u/6.3V_4

R232 100K_4

U13

LINE2-L

LINE2-R

LINE1-L

LINE1-R

NC

JDREF

Sense B

Sense A

PCBEEP

24

23

22

21

20

19

18

17

16

15

14

13

1.6Vrms

LINE2-L

LINE2-R

LINE1-L

LINE1-R

SLEEVE

RING2

CODEC_JDREF

SENSEA

ADOGND

+5VA

C448

C449

0.1u/10V_4

10u/6.3V_4

Place ne xt to p in 26

ADOGND

T1

T2

close to codec

C435 10u/6.3V_4

trace width of SLEEVE & RING2 are required at least 40mil and its length should be asshort as possible

R221 20K/F_4

R218 39.2K/F_4

ADOGND

HP_JD#

Placement near Audio Codec

BEEP_1

R202 47K_4

R201

C395

4.7K_4

100p/50V_4

PCH_AZ_CODEC_RST# <5>

PCH_AZ_CODEC_SYNC <5>

DVDD_IO

PCH_AZ_CODEC_SDIN0 <5>

PCH_AZ_CODEC_BITCLK <5>

PCH_AZ_CODEC_SDOUT <5>

ADOGND

Analog

Digital

D12 1N4148WSC396 0.1u/10V_4

D15 1N4148WS

R208 *0_4

R203 *SHORT_4

C400

C406

0.1u/10V_4

10u/6.3V_4

Place ne xt to p in 9

SPKR <5>

PCBEEP_EC<29>

+3V +1.5V

Grounding circuit(ADO)

+3VRTC

+3VPCU

R238

C483 *10u/6.3V_4 C482 0.1u/10V_4

U29

6

GND

VDD

5

CS

DATA

4

GND3CLK

D-MIC

R237

*100K_4

1

2

100K_4

+3V

3

1

R265 *0_4

R264 *SHORT_4

PIN1, PIN4, PIN3, PIN6 are ANALOG

Q23

1

4 3

ADOGND

2N7002DW

D-Mic

6

2

5

DMIC_DAT_L

DMIC_CLK_L

SLEEVE

RING2

+3V

HEADPHONE/MIC/LINE combo (AMP)

FB1/FB2(SLEEVE/RING2) should choose DC resistance (Rdc) < 30m-ohm to get the best audio performance for HP crosstalk

MIC2-VREFO

SLEEVE

HP-L2

HP-R2 HP-R4

LINE1-L

LINE1-VREFO-L

LINE1-VREFO-R

LINE1-R

R247 2.2K_4

R258 2.2K_4

RING2

L37 BLM15AG121SS1_0.5A_4

L32 BLM15AG121SS1_0.5A_4

C676 4.7U/6.3V_6

R514 4.7K_4

R249 4.7K_4

C469 4.7U/6.3V_6

HP-L3

HP-R3

L31 BLM15AG121SS1_0.5A_4

L33 BLM15AG121SS1_0.5A_4

R515 56/F_4

R256 56/F_4

C464

100p/50V_4

ADOGND

C480

100p/50V_4

SLEEVE_L

RING2_L

C675

100p/50V_4

*VARS/14V_4

Q24

BSS138-7-F

2

D35

C473

100p/50V_4

+1.5V

12

R235

*100K_4

R234 10K_4

C459 *1u/10V_4

12

*VARS/14V_4

HP-L4

HP_JD#

D36

PCH_AZ_CODEC_RST#

12

D19

*VARS/14V_4

Combo Jack

CN17

4 3 1

2 5 6 7

ADO-JACK_2SJ3052-005111F

3

C664

*1000P/50V_4

3

+1.5V

2

R186 *2.2K_4

Q20

*BSS138-7-F

1

C680

*1000P/50V_4

PCH_AZ_CODEC_RST#

AMP_MUTE# <29>

CN16

R_SPK+_1 R_SPK-_1 L_SPK-_1 L_SPK+_1

SPK_CONN_4P

Codec PWR 1.5V(ADO)

ANALOG DIGITAL

+1.5V

1U/6.3V_4

6 345 2 1

2

L29 HCB1608KF-121T30_3A_6

C441

+1.5VA

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

ALC283/HP/SPK

Date: Sheet of

Tuesday, April 29, 2014

Date: Sheet of

Tuesday, April 29, 2014

Date: Sheet of

Tuesday, April 29, 2014

PROJECT :

1

ZQN

3925

3B

Mute(ADO)Codec PWR 5V(ADO)

ANALOG DIGITAL

+5V

C445

A A

*0.1u/10V_4

C447

*10u/6.3V_6

close pin3

L30 HCB2012KF220T60/6A_8

U14

3

OUT

IN

2

GND

1

SET

SHDN

*G923-330T1UF

R222 *0_4

5

4

5

ADOGND

R227 *29.4K/F_4

R226 *10K/F_4

C454

*10u/6.3V_6

+5VA

ADOGND

C453

*0.1u/10V_4

Internal Speaker

R_SPK+ R_SPKL_SPKL_SPK+

4

+AZA_VDD

PD#

C410 *1u/10V_4

R496 *SHORT_6 R495 *SHORT_6 R494 *SHORT_6 R497 *SHORT_6

R210 1K_4

D23 *RB500V-40

R213 10K_4

D14 RB500V-40

40mil for each signal

C666

*1000P/50V_4

Place these EMI components next to codec

C665

*1000P/50V_4

5

4

3

2

1

2.5" SATA HDD

SATA ODD

Need Check P/N and F/P

CN13

D D

C C

HDD_CONN

Power Switch Board.

B B

GND23

GND1

RXP RXN

GND2

TXN TXP

GND3

3.3V

3.3V GND GND GND

GND

RSVD

GND

12V 12V 12V

GND24

23

1

SATA_TXP0_C

2

SATA_TXN0_C

3 4

SATA_RXN0_C

5

SATA_RXP0_C

6 7

8 9 10 11 12 13 14

5V

15

5V

16

5V

17 18 19 20 21 22

24

C658

0.01u/25V_4

C657

0.01u/25V_4

C663 0.01u/16V_4 C661 0.01u/16V_4

C660 0.01u/16V_4 C659 0.01u/16V_4

60mil

C646 *0.1u/10V_4

C654 *0.1u/10V_4

C651 10u/6.3V_6

SATA_TXP0 <6> SATA_TXN0 <6>

SATA_RXN0 <6> SATA_RXP0 <6>

+5V_HDD

+

C645

100u/6.3V_3528

R491 *SHORT_8

+

C656

*100u/6.3V_1206

+5V

CN8

ODD_C185Q2-11311-L

GND14

GND1

RXP RXN

GND2

TXN TXP

GND3

+5V +5V

RSVD

GND GND

GND15

14

1 2 3 4 5 6 7

8

DP

9 10 11 12 13

15

SATA_TXP1_C SATA_TXN1_C

SATA_RXN1_C SATA_RXP1_C

SATA_DP

C611

0.01u/25V_4

C635 0.01u/16V_4 C634 0.01u/16V_4

C631 0.01u/16V_4 C628 0.01u/16V_4

R459 *1K_4

C617

0.01u/25V_4

TP70

C618

*0.1u/10V_4

SATA_TXP1 <6> SATA_TXN1 <6>

SATA_RXN1 <6> SATA_RXP1 <6>

C612

*0.1u/10V_4

+5V_ODD

C615

10u/6.3V_6

R463 *SHORT_8

+

C620

*100u/6.3V_3528

+5V

Indicitor LED

+5V_S5

+3VPCU

CN7

5

1

LID591#<21,29> NBSWON#<29>

2 3 4

6

PowerB_CONN

+3V_S5

+3VPCU

+5V_S5

+5VPCU

LED1

1

2

LED_ORG/BLUE

LED2

1

2

LED_ORG/BLUE

3

4

3

4

R263 2k/F_4

R260 820_4

R257 2k/F_4

R259 820_4

R521 *1M_4 R522 *1M_4

R523 *1M_4 R524 *1M_4

BATLED0# <29>

BATLED1# <29>

+3V_S5

PWRLED# <29>

SUSLED# <29>

+3VPCU

+5VPCU

Power Blue

SLEEP_AMBER

FULLY_BLUE

CHARGING_AMBER

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet

PROJECT :

SATA HDD/LED/SW

ZQN

1A

of

26 39Tuesday, April 29, 2014

1

5

USB 3.0 Connector

USBP8-<5> USBP8+<5>

C461 *1.6P/50 V_4

USB30_RX1-<5> USB30_RX1+<5>

D D

C456 *1.6P/50 V_4

USB30_TX1-<5> USB30_TX1+<5>

USB30_TX1-

USB30_TX1+

USBON#<29>

USB_OC1#<5 >

USBP8USBP8+

USB30_RX1USB30_RX1+

C432 0.1u/ 10V_4 C431 0.1u/ 10V_4

USB30_TX1-_C USB30_TX1+_C

+5V_S5 USBPWR1

C405

1u/6.3V_4

U12

5

IN

4

/EN

G524D2T 11U

1

OUT

2

GND

3

/OC

C433

*1.6P/50V_4

C401

470p/50 V_4

4

C428

*1.6P/50V_4

C402

0.1u/10V_ 4

USBPWR1

CN14 USB3.0_CONN

1

VBUS

1

2

D-

2

3

D+

3

4

GND

5

SSRX-

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

9

12

C412

100u/6.3 V_1206

3

2

1

HOLE(OTH)

SP4

SP2

*SPAD-C236

1

SP3

*SPAD-C236

1

SP6

*SPAD-C236

1

SP1

*SPAD-C236

1

*SPAD-C236

1

SP7

*SPAD-C236

1

HOLE2

*HG-C276D118 P2

USBP8-

USBP8+

USB30_RX1-

USB30_RX1+

11111010131312

USB30_TX1-_C

USB30_TX1+_C

1 2

RV3 *VARS_4

RV4 *VARS_4

1 2

RV6 *VARS_4

1 2

RV5 *VARS_4

1 2

RV2 *VARS_4

1 2

RV1 *VARS_4

8 9

123

HOLE10

*HG-C276D118 P2

8 9

123

HOLE20

*H-TC236BC256 D161P2

1

*HG-C276D118 P2

67 5

8

4

9

*HG-C276D118 P2

67 5

8

4

9

*H-TC236BC256 D161P2

HOLE24 *H-O91X114D91X114N

1

HOLE3

123

HOLE14

123

HOLE21

1

HOLE1

*O-ZQN-6

67

8

5

9

4

123

HOLE15

*HG-C276D118 P2

67

8

5

9

4

123

HOLE22 H-C236D140P2

1

67 5 4

HOLE17 H-C236D140P2

HOLE6

*HG-TC276BC19 7D118P2

8 9

123

HOLE16

*HG-C276D118 P2

8 9

123

HOLE19 H-C236D140P2

1

67 5 4

1

HOLE4

*O-ZQN-5

1

HOLE18 *H-TC236BC256 D161P2

1

HOLE8 *h-c102d1 02n

1

HOLE9

*O-ZQN-1

8 9

HOLE5

*O-ZQN-2

8 9

123

67 5 4

HOLE7

*HG-C276D118 P2

8 9

123

HOLE12

*O-ZQN-3

HOLE23 H-O102X165D102 X165N

1

67 5 4

1

G524D2T11U: Enable: Low Active /OCP 1.5A

C C

USB D/B

+5V_S5

USBON#

USB_OC2#<5>

USBP5-<5>

D/B USB Port

B B

USBP5+<5>

USBP0-<5>

USBP0+<5>

CN18

1 2

15 3 4 5 6 7 8 9 10 11 12 13

16 14

USB_DB_Conn

Card Reader and Connector

C662 0.1u/ 10V_4

C685

68p/50V_ 4

DVDD

AVDD

C455

0.1u/10V_ 4

1 2

C451

2.2u/6.3 V_6

USBP6-<5>

USBP6+<5>

4.7U/6.3V_6

DVDD

C684 68p/50V_4

C668 0.1u/10V_4

VCC_XD

C460

U15

1

DVDD

2

DM

3

DP

4

AVDD

5

MS_INS

6

SB0

25

SD_CDZ

RSTZ

VCC_XD

21

22

23

24

RSTZ

DVDD

PMOS

SD_CDZ

GL834L QFN24-3.3V

SB17SB38SB49SB510MS_BS11SB8

C462 0.1 u/10V_4

DVDD

20

19

DVDD

GPIO0

12

VDD18

SB13 SB12

SD_CMD

SD_CLK

SB9

GL834L

SD_D1/MS_D7

SD_WP/MS_D1

R246 *SHORT_4

18

VDD18 SD_D2/MS_D5

17

SD_D3/MS_D4

16

SD_CMD

15

SD_CLK

14

SD_D0/MS_D6

13

PCIERST# <5,11,23, 24>

C683

C472

68p/50V_ 4

0.1u/10V_ 4

RSTZ

C467

*0.1u/10V_ 4

R242 *SHORT_6

C463

10u/6.3V_ 6

DVDD AVDD

R248 *100K_4

L36

BLM18PG121_ 6

DVDD

R244 *1K_4

C667

4.7u/10V_ 6

DVDD+3V

SD/MMC CARD READER (MMC)

EMI

A A

+3V_S5

C378

C314

*1000p/50 V_4

+3V +VDDNB_CORE

5

C233

0.1u/10V_ 4

C300 *1000p/50 V_4

C195 *1000p/50 V_4

+3V

C244

0.1u/10V_ 4

C362 1000p/5 0V_4

+5VPCU

C364

0.1u/10V_ 4

SD_WP/MS_D1 SD_CDZ SD_D2/MS_D5 SD_D1/MS_D7 SD_D0/MS_D6

SD_CLK

VCC_XD

SD_CMD SD_D3/MS_D4

4

R255 *SHORT_4

R240 *SHORT_4 R254 90.9/F_4 R243 90.9/F_4 R245 90.9/F_4

R251 90.9/F_4

R252 90.9/F_4 R253 90.9/F_4

C474

*4.7u/6.3V_ 6

C475

0.1u/10V_ 4

SD_WP_R SD_CD#_R SD_DATA2_R SD_DATA1_R SD_DATA0_R

SD_CLK_R

SD_CMD_R SD_DATA3_R

T6VARS_0.2pF/5V_ 4

T7VARS_0.2pF/5V_ 4

T3VARS_0.2pF/5V_ 4

T4VARS_0.2pF/5V_ 4

T8VARS_0.2pF/5V_ 4

T5VARS_0.2pF/5V_ 4

T9VARS_0.2pF/5V_ 4

T10VARS_0.2 pF/5V_4

3

11 10

9 8 7 6 5 4 3 2 1

CN2

W/P CARD/DET DATA2 DATA1 DATA0 VSS2 CLK VDD VSS1 CMD CD/DATA3

SD-CARD

C477

C471

C470

*10p/50V_4

GND13GND

GND

14

12

15

2

C466

*10p/50V_4

Size Docu ment Number Rev

Date: Sheet of

USB P ort/ D B

SD_CLK_R SD_CMD_R SD_DATA2_R SD_DATA1_R SD_DATA0_R SD_DATA3_R

C476

C468

*10p/50V_4

Quanta Computer Inc.

PROJECT :

ZQN

1

R250 *330_4

1A

27 39Tuesday , April 29, 201 4

1A

5

4

3

2

1

KEYBOARD (KBC)

<EMI>

CN15

1

MY0

2

MY1

3

MY2

4

MY3

5

D D

27 28

KB_ CONN

C C

Power Domain change

03/28 install and change to 10k

B B

TP_ I2C_INT #

6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17

TP_ PWR

MY4 MY5 MY6 MY7 MY8 MY9

MX7 MX6 MX5 MX4 MX3 MX2 MX1 MX0

R22 8

10K _4

1

MY0 <29> MY1 <29> MY2 <29> MY3 <29> MY4 <29> MY5 <29> MY6 <29> MY7 <29> MY8 <29>

MY9 <29> MY10 <29 > MY11 <29 > MY12 <29 > MY13 <29 > MY14 <29 > MY15 <29 > MY16 <29 > MY17 <29 >

MX7 <29> MX6 <29> MX5 <29> MX4 <29> MX3 <29> MX2 <29> MX1 <29> MX0 <29>

+3V_ S5

R23 0 *2.2K_ 4

2

Q22

3

*2N700 2K

R22 4 *SHOR T_4

TPD _INT# <29>

03/17 short Pad

TOUCH PAD(TPD)

TP_ PWR

R50 7

R50 5

10K _4

A A

TPC LK<29 >

TPD ATA<29>

10K _4

R50 6 *SHOR T_4 R50 4 *SHOR T_4

C67 2 *10p /50V_4 C67 1 *10p /50V_4

5

SMABUS

MX7 MX6 MX5 MX4

MY3 MY2 MY1 MY0

MY7 MY6 MY5 MY4

MY8 MY9 MY10 MY11

MX3 MX2 MX1 MX0

MY12 MY13 MY14 MY15

MY16

C47 8 *220 p/50V_4

MY17

C47 9 *220 p/50V_4

+3V_ S5

TP_ PWR_E N#<29 >

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

TPC LK_CN TPD ATA_CN

TP_ SMDATA<5>

TP_ SMCLK<5 > TP_ I2C_INT #<5,24 > TPD _EN<29 >

TP_ I2C_SD

I2C

TP_ I2C_SC

4

TP_ I2C_SC L<24>

TP_ I2C_SD A< 24>

R54 9 *0_4

Q44 AO3 413

1

R55 0

100 K_4

CP5 *220 p_8P4R

CP1 *220 p_8P4R

CP2 *220 p_8P4R

CP3 *220 p_8P4R

CP6 *220 p_8P4R

CP4 *220 p_8P4R

R50 2 *0_4 R50 0 *0_4

+3VP CU

RP1

10

9

MX4

8

MX5

7 4

MX6 MX7

4 3

1

TP_ PWR

3

2

C67 3

0.1u/10 V_4

40mil

*10K _10P8R

Q43

2N700 2KDW

R53 2 *0_4 R53 3 *0_4

1

MX3

2

MX2

3

MX1 MX0

56

TP_ PWR

5

2

6

I2C HID =>ELAN0501 I2C CID =>ELAN0000 I2C bus address =>0x15 I2C High/Low active? =>Active Low PS2 HID =>ETD050A PS2 CID =>PNP0F13

Elan VIDElan PID 0x04F30x0400

CN20

219 3 4 5 6 7 8

TP_ CONN

CPU FAN CTRL(THM)

+5V

1 2

THER M_ALERT #<4>

CPUF AN#<2 9>

Keyboard Backlight

R53 4

R53 5

2.2K _4

TP_ I2C_SC

TP_ I2C_SD

10

3

C62 1

2.2u/6.3 V_6

U26

1

4

G99 1P11U

VIN2VO

GND

/FON

GND GND

VSET

GND

FANPWR = 1.6*VSET

+5V

R26 2 *10 0K_4

KEY_B L_EN<29 >

LPC Power down

3 5 6 7 8

Q26 *AO3 413

1

2

SYS_P WRGD<5,8>

2

FANS IG<2 9>

1 2

2

3

1

LPC _CLKRUN#<6,24 ,29>

TH_F AN_POW ERTH_ FAN_POW ER

C62 3

2.2u/6.3 V_6

3

Q25

*2N700 2K

C62 2

0.01 u/16V_4

VKB L

C48 1 *0.1u/10 V_4

+3V_ S5

2

Size D ocument Numb er Rev

Date: Sheet of

Date: Sheet

30mils

C62 4

*0.01u/5 0V_4

R15 7 *100 K_4

SYS_P WRGD _Q

3

Q12

*FDV 301N

1

+3V

R46 0

10K _4

CN5

1 2 345

FAN_ 3P

CN19

6 345 2 1

*KBL _CONN_4P

R15 5 22K /F_4

LPC PD#

3

2

Q8 *2N700 2K

1

3

2

1

Quanta Computer Inc.

PROJECT :

KB/TP/FAN

1

Q7 *2N700 2K

ZQN

28 39Tuesd ay, April 29, 20 14

LPC PD#

<5,24 >

1A

of

5

4

3

2

1

EC(KBC)

R204 2 .2_6

1 2

+3VPCU

+3VPCU_EC and +3V_RTC

D D

minimum trace width 12mils.

+3VPCU

D10

R173

SDMK0340L-7 -F

100K_4

2 1

1 2

C C

B B

A A

C363 1u/6.3V_ 4

CLK_PCI_77 5

R175

*22_4

C361 *10p/50V_4

WRST#

SPI_SCK<6>

SPI_CS<6>

SPI_SDO<6>

SPI_SDI<6 >

L27 EMI FILTER FCM1608KF-12 1T04(120,0. 4A)

12 mils

C320

C379

0.1u/10 V_4

LPC_LAD0<6 ,24> LPC_LAD1<6 ,24> LPC_LAD2<6 ,24> LPC_LAD3<6 ,24>

PLTRST#<5 ,24>

CLK_PCI_77 5<6>

LPC_LFRAME#<6,8, 24>

SIO_A20GATE<5>

SERIRQ<6,24> SIO_EXT_SMI#<5> SIO_EXT_SCI#<5>

KBRST#<5>

APU_BLEN<4 ,21> SUSON<3 2>

MAINON<3 2,35>

BT_POWERON#<24>

PWROK_EC<8> KEY_BL_EN<28> CPUFAN#<28> TPD_EN<28>

AMP_MUTE#<25>

ACIN<30>

TEMP_MBAT<30>

TS_Enable<21> PCBEEP_EC<25>

D/C#<30 >

R136 *SHORT_4 R152 *SHORT_4 R137 *SHORT_4 R150 *SHORT_4

MY16<28> MY17<28>

S5_ON<31 ,33,35>

MY0<28> MY1<28> MY2<28> MY3<28> MY4<28> MY5<28> MY6<28> MY7<28> MY8<28>

MY9<28> MY10<28> MY11<28> MY12<28> MY13<28> MY14<28> MY15<28>

C382

0.1u/10 V_4

+3V

C321

0.1u/10 V_4

R172 *SHORT_6

PLTRST# CLK_PCI_77 5

PROCHOT_EC

SIO_A20GATE SERIRQ

SIO_EXT_SMI# SIO_EXT_SCI#

BT_POWERON

KEY_BL_EN CPUFAN#

TPD_EN

TEMP_MBAT

PCH_SPI_CLK_EC SPI_CS0#_UR_ ME PCH_SPI_SO_EC PCH_SPI_SI_EC

MY16 MY17

S5_ON

C377

0.1u/10 V_4

ECAGND

+A3VPCU

12 mils

+3VRTC

+3VPCU_EC

C354

C404

0.1u/10 V_4

+3V_EC

C356

0.1u/10 V_4

U11

10

LAD0/GPM0(X)

9

LAD1/GPM1(X)

8

LAD2/GPM2(X)

7

LAD3/GPM3(X)

22

LPCRST#/WUI4/GPD2(Up)

13

LPCCLK/GPM4(X)

6

LFRAME#/GPM5(X)

17

LPCPD#/WUI6/GPE6(Dn)

126

GA20/GPB5(X)

5

SERIRQ/GPM6(X)

15

ECSMI#/GPD4(Up)

23

ECSCI#/GPD3(Up)

14

WRST#

4

KBRST#/GPB6(X)

16

PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT

119

CRX0/GPC0(Dn)

123

CTX0/TMA0/GPB2(Dn)

80

DAC4/DCD0#/GPJ4(X)

104

DSR0#/GPG6(X)

33

GINT/CTS0#/GPD5(Up)

88

PS2DAT1/RTS0#/GPF3(Up)

81

DAC5/RIG0#/GPJ5(X)

87

PS2CLK1/DTR0#/GPF2(Up)

109

TXD/SOUT0/GPB1(Up)

108

RXD/SIN0/GPB0(Up)

71

ADC5/DCD1#/WUI29/GPI5(X)

72

ADC6/DSR1#/WUI30/GPI6(X)

73

ADC7/CTS1#/WUI31/GPI7(X)

35

RTS1#/WUI5/GPE5(Dn)

34

PWM7/RIG1#/GPA7(Up)

107

DTR1#/SBUSY/GPG1/ID7(Dn)

95

CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)

94

CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)

105

FSCK/GPG7

101

FSCE#/GPG3

102

FMOSI/GPG4

103

FMISO/GPG5

56

KSO16/SMOSI/GPC3(Dn)

57

KSO17/SMISO/GPC5(Dn)

32

PWM6/SSCK/GPA6(Up)

100

SSCE0#/GPG2(X)

106

SSCE1#/GPG0(X)

36

KSO0/PD0

37

KSO1/PD1

38

KSO2/PD2

39

KSO3/PD3

40

KSO4/PD4

41

KSO5/PD5

42

KSO6/PD6

43

KSO7/PD7

44

KSO8/ACK#

45

KSO9/BUSY

46

KSO10/PE

51

KSO11/ERR#

52

KSO12/SLCT

53

KSO13

54

KSO14

55

KSO15

MX0<28> MX1<28> MX2<28> MX3<28> MX4<28> MX5<28> MX6<28> MX7<28>

C331

11

VCC

VSTBY26VSTBY50VSTBY92VSTBY

LPC

EXTERNAL SERIAL FLASH

SPI ENABLE

KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7

0.1u/10 V_4

114

121

3

74

VBAT

AVCC

VSTBY

CIR

UART port

KBMX

65

L26 EMI FILTER FCM1608KF-12 1T04(120,0. 4A)

+3VPCU_ECPLL

L24 EMI FILTER FCM1608KF-12 1T04(120,0. 4A)

C319

0.1u/10 V_4

127

19

84

20

82

VSTBY

EGAD/WUI25/GPE1(Dn)

EGCS#/WUI26/GPE2(Dn)83EGCLK/WUI27/GPE3(Dn)

L80LLAT/WUI7/GPE7(Up)

L80HLAT/BAO/WUI24/GPE0(Dn)

GPIO

IT8587

VSS

VSS27VSS49VSS

VSS

AVSS

VSS

1

75

91

122

113

ECAGND

+3VPCU_EC

(For PLL Power)

HWPG SUSC# SUSB#

USB_CHG_MODE USB_EC_ON

97

93

PECI/SMCLK2/WUI22/GPF6(Up)

PS2CLK0/TMB0/CEC/GPF0(Up)

WUI41/GPH5/ID5(Dn)98WUI42/GPH6/ID6(Dn)99WUI19/GPH3/ID3(Dn)96WUI40/GPH4/ID4(Dn)

SM BUS

PS2CLK2/WUI20/GPF4(Up) PS2DAT2/WUI21/GPF5(Up)

PS/2

CLKRUN#/WUI16/GPH0/ID0(Dn)

PWM

WAKE UP

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)

A/D D/A

CLOCK

VCORE

12

C355

0.1u/10 V_4

SUSC# <5> SUSB# <5,8>

TP_PWR_EN# <28>

TP36 TP40

LPC_CLKRUN# <6,2 4,28>

R168 8 .2K/F_4

SMCLK0/GPB3(X) SMDAT0/GPB4(X) SMCLK1/GPC1(X) SMDAT1/GPC2(X)

SMDAT2/WUI23/GPF7(Up)

PS2DAT0/TMB1/GPF1(Up)

PWM0/GPA0(Up) PWM1/GPA1(Up) PWM2/GPA2(Up) PWM3/GPA3(Up) PWM4/GPA4(Up) PWM5/GPA5(Up)

TACH0A/GPD6(Dn)

TACH1A/TMA1/GPD7(Dn)

TMRI0/WUI2/GPC4(Dn) TMRI1/WUI3/GPC6(Dn)

PWRSW/GPE4(Up) RI1#/WUI0/GPD0(Up) RI2#/WUI1/GPD1(Up)

ADC0/GPI0(X) ADC1/GPI1(X) ADC2/GPI2(X) ADC3/GPI3(X)

ADC4/WUI28/GPI4(X)

TACH2/GPJ0(X)

GPJ1(X) DAC2/TACH0B/GPJ2(X) DAC3/TACH1B/GPJ3(X)

CK32KE/GPJ7

CK32K/GPJ6

+3V

110

MBCLK

111

MBDATA 2ND_MBCLK

115

2ND_MBDATA

116 117 118

85

R529 100K_4

86 89 90

24 25 28 29 30 31

47

FANSIG

48

120

DNBSWON#

124

125

NBSWON#

dGPU_OPP#

18 21

PCH_RSMRST#

112

ICM

66 67

C393 10u/ 6.3V_6

68 69

VRON

R193 *SHORT_4

FB_CLAMP_REQ#

70

76

dGPU_FB_CLAMP

77 78 79

2 128

R154 *SHORT_4

IT8587E/FX

SM BUS ARRANGEMENT TABLE

SM Bus 1

Battery

SM Bus 2

PCH/VGA

N/A

SM Bus 3

MBCLK <30> MBDATA <30>

2ND_MBCLK <4 ,12>

EC_FPBACK# <21>

TPCLK <2 8> TPDATA <28>

NBSWON# <2 6>

TP44

ECAGND

TP46

TP43

USBON# <27>

2ND_MBDATA <4 ,12>

LID591# <2 1,26>

PWRLED# <26> BATLED1# <26> SUSLED# <26> BATLED0# <26>

FANSIG <28>

DNBSWON# <5>

PCH_RSMRST# <5>

RF_EN <2 4>

ICM <30>

TPD_INT# <28> VDDA_PWRGD <34>

DGPU_AC_DC# <12>

SM Bus 4

5

4

3

External PU(KBC)

ProcHOT

HWPG(KBC)

Power sequence

NBSWON#

DNBSWON#

SUSON

SUSB#

PWROK_EC

PLTRST#

HWPG

MAINON

PCH_RSMRST#

S5_ON

2

VRM_PWRGD<34>

HWPG_1.8VS5<35>

HWPG_1.5V<32>

HWPG_0.95 VS5<33>

SYS_HWPG<31>

PROCHOT_EC

MBCLK MBDATA

2ND_MBCLK 2ND_MBDATA

S5_ON

NBSWON#

SIO_EXT_SMI# SIO_EXT_SCI#

DNBSWON#

KBRST# SERIRQ

MAINON VRON PLTRST#

TP37

TP39

TP38

TP41

TP48

TP45

TP47

TP42

TP33

TP35

R149 4.7K_4 R148 4.7K_4

R147 4.7K_4 R146 4.7K_4

R153 10K_4

R144 10K_4

R182 *10K_4 R189 *10K_4

R145 10K_4

R166 10K_4

R165 *10K_4 R180 1 00K_4 R195 1 00K_4 R187 1 00K_4

3

2

R181

1

100K_4

D13 1N4148WS

D16 1N4148WS

D18 1N4148WS

D11 1N4148WS

D17 1N4148WS

Size Do cument Number Rev

Date: Sheet of

+3VPCU

+3V_S5

+3VPCU

+3V_S5

+3V

CORE_PWM_PROCHO T# <4,5,34>

Q17

2N7002K

+3V

R212

10K_4

HWPG

*TME-532W-Q-T/R( 439)

SW1

21

3 4

5

6

Quanta Computer Inc.

PROJECT :

WPCE885 & FLASH

ZQN

1

29 39Tuesday, Ap ril 29, 2014

NBSWON#

HWPG <8>

1A

5

CN4

1 2 3 4

DC-IN

D D

C C

ACIN<29>

B B

PJ1

1

10

2 3 4 5 6 7 89

C114F3-108A1-L_Batt_CONN

03/17 short Pad

*SHORT_4

REV:A 上件, REV:B有外殼改不上件

A A

TEMP_MBAT

PU1 CM1293A-04SO

1

CH1

2

VN

CH23CH3

Add ESD diode base on EC FAE suggestion

BATT_EN#

PR6

CH4

VP

BAT-V

PC11

0.1u/50V_6

MBDATA_R

6

5

4

5

MBCLK_R

*47p/50V_4

PR4 100_4

MBDATA

+3VPCU

MBCLK

PR7 100_4

PC5

PR3 100_4

PC1 *47p/50V_4

+3VPCU

TEMP_MBAT

MBCLK <29>

MBDATA <29>

PC36

0.1u/50V_6

PR155 100K_4

3

1

PR8 1M_4

2

PQ1

2N7002K

2200p/50V_4

+3VPCU

PC37

TEMP_MBAT <29>

4

VA1

recommend 200mA at least.

PD2 1N4148WS

PR25 100K_4

+3VPCU

PR153 10K _4

PR156 *10K _4

PR1 316K /F_4

24737_BM#

*2N7002K

4

PR245 *100K_4

2

PQ72

PC35

0.1u/50V_6

PR22 20_1206

3

1

MBDATA

MBCLK

PR11

100K/F_4

2 1

PR15 10K/F_4

PC6

0.01u/25V_4

PD4 P4SMAFJ20A

24737_BM#

24737_CMPOUT

ICM<29>

PR18

63.4K/F_4

24737_ACDET

24737_VCC

PC103

0.47u/25V_6

24737_ILIM

24737_CMPIN

PR17 *100K_4

PC13

0.1u/50V_6

PC22

0.1u/50V_6

6

ACDET

20

VCC

5

ACOK#

8

SDA

9

SCL

11

BM#

3

CMPOUT

10

ILIM

4

CMPIN

PR246 *1.62K/F_4

ICM

IOUT

7

100p/50V_4

2

3

PR12 220K/F_4

PR5 220K/F_4

PC20

0.1u/50V_6

ACP

PU8

BQ24737RGRR

GND

GND22GND24GND23GND

21

24737_CMPOUT

PC12

3

1 6

2

3

PQ2

IMD2AT108

24737_ACP

24737_ACN

PC107

0.1u/50V_6

1

ACN

REGN

HIDRV

PHASE

LCDRV

PGND

25

PR244

*0_4

1

3

BTST

SRP

SRN

PQ6 AOL1413

4

5

4

24737_REGN

16

24737_BST

17

24737_DH

18

24707_LX

19

24737_DL

15

14

PR227 10/F_6

13

PR228 7.5_6

12

PR247

*100K_4

2

VA2

52

RB500V-40

+3V

3

1

PD3 SBR1045SP5-13

1

3

2

PC2 1u/16V_6

PD1

PC14 47n/50V_6

24737_SRP

0.1u/25V_4

PC101

0.1u/25V_4

BAT-V

0.1u/25V_4

CORE_PWM_PROCHOT# [4,5,30,35]

PQ71 *2N7002K

PC8

PC7

2

PR27

0.02/F_0612

D/C# <29>

4

2

3

PR16 *SHORT_4

PR19 *SHORT_4

52

1

52

1

PQ4 MDV1528

PQ32 MDV1528

1

BAT-V

PQ3 AOL1413

1

3

PR23 33K/F_4

2

PQ5 2N7002K

PC4

PC104

10u/25V_8

PC174

1000p/50V_4

24737_ACN

24737_ACP

PC3

2200p/50V_4

6.8uH_7X7X3

PR2

2.2/F_6

PC9

2200p/50V_6

PL1

24737_SRP

BAT-V

PC23

0.1u/50V_6

VIN

PC19

4.7u/25V_6

PR154

0.01/F_0612

PC18

2200p/50V_4

REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 3.965A current limit

Pin10 ILIM=0.793V Rsr = 0.01ohm

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Charger(BQ24737RGRR)

Date: Sheet of

PROJECT :

1

4

3

1

30 39Tuesday, April 29, 2014

52

PR24 10K_4

PC105

10u/25V_8

PC175

0.01u/25V_4

1A

MAIND

5

MAIND <32,33,35>

SYS_SHDN#

4

SYS_SHDN# <12,35,36>

3

2

1

+3VPCU

1

52

3

52

3

PD6 1PS302

PD5 1PS302

4

2

1

2

1

PC85

0.1u/50V_6

SYS_HWPG<29>

SYS_SHDN#

PR223

*SHORT_4

PC83

0.1u/50V_6

3

PC87

0.1u/50V_6

PR122

*SHORT_4

PR119

1/F_6

PC86

0.1u/50V_6

51225_EN1

51225_DH1

51225_VBST1

51225_SW1

51225_DL1

51225_FB1

PR128 *SHORT_6

PR120 *100K/F_4

D D

+5VPCU

C C

B B

VIN

220u/6.3V_6X4.2

OCP:10A

L(ripple current) =(9-5)*5/(3.3u*0.3M*9) =2.244A Iocp=10-(2.244/2)=8.877A Vth=(8.877A*14mOhm)+1mV=125.287mV R(Ilim)=(125.287mV*8)/10uA ~100.23K

+

+5VPCU 5 Volt +/- 5% TDC : 6.2A PEAK : 8.3A OCP : 10A Width : 260mil

+

PC160

0.1u/50V_6

12

PC168

33u/25V_6x4.5

PC79

PR123

15.4K/F_4

PR124 10K/F_4

PC166

4.7u/25V_6

3.3uH_7X7X3

+15V

PL10

PR121

2.2/F_6

PC88

0.1u/50V_6

PC167

2200p/50V_4

MDV1528

MDV1595S

PC82

2200p/50V_6

PR129 22_8

PQ51

PQ50

+15V_ALWP

VL

PC80 10u/6.3V_6

51225_VIN

13

12

7

PGOOD

20

EN1

16

DRVH1

17

VBST1

18

SW1

15

DRVL1

2

VFB1

14

VO1

19

51225_VCLK

VREG5

PU6

TPS51225RUKR

CS11CS25VCLK

51225_CS1

51225_CS2

PR226 100K/F_4

PR126 100K/F_4

VIN

26

PR117 *SHORT_6

3V_LDO

PC81 0.1u/25V_4

PC165 4.7u/6.3V_6

3

EN2

VREG3

DRVH2

VBST2

SW2

DRVL2

VFB2

GND

GND23GND24GND25GND

PR127 *SHORT_6

PR224 10K/F_4

6

10

9

8

11

4

21

22

SYS_SHDN#

51225_DH2

51225_VBST2

51225_SW2

51225_DL2

51225_FB2

PC84

PR118

0.1u/50V_6

1/F_6

OCP:9A

L(ripple current) =(9-3.3)*3.3/(3.3u*0.355M*9) ~1.784A Iocp=9-(1.784/2)=8.108A Vth=(8.108A*14mOhm)+1mV=114.512mV R(Ilim)=(114.512mV*8)/10uA =91.609K

VIN

PC162

2200p/50V_4

52

PQ49

MAIND

MDV1528

3

1

PL9

3.3uH_7X7X3

52

PQ48 MDV1595S

3

1

4

PR116

2.2/F_6

PC78

2200p/50V_6

+5VPCU

52

PQ22

MDV1528Q

3

1

TDC : 3.2A PEAK : 4.3A Width : 140mil

+5V

4

PC161

4.7u/25V_6

+3VPCU

3.3 Volt +/- 5% TDC : 5.1A PEAK : 6.8A OCP : 9A Width : 220mil

PR225

6.49K/F_4

PR125 10K/F_4

+3VPCU

3

2

MAIND S5D

1

TDC : 1.8A PEAK : 2.4A Width : 80mil

+3VPCU

PC159

0.1u/50V_6

PQ15 AO3404

+3V +3V_S5

+

PC158 220u/6.3V_6X4.2

+3VPCU

2

3

PQ21 AO3404

1

TDC : 0.3A PEAK : 0.4A Width : 20mil

BOT

PC192 1000p/50V_4

PC193 0.1u/25V_4

PC194 1000p/50V_4

PC195 0.1u/25V_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

SYSTEM 5V/3V (T PS51 225)

Date: Sheet of

PROJECT :

1

31 39Tuesday, April 29, 2014

1A

PR114 22_8

PQ19 2N7002K

+15VVIN

2

+5V_S5+3V_S5

PR110 1M_6

A A

S5_ON<29,33,35>

2

PQ17

DTC144EUA

1 3

5

PR111 1M_6

PR115 22_8

PQ20 2N7002K

3

2

1

3

2

1

3

1

PR113 1M_6

PQ18

2N7002K

VIN

PR112 *1M_6

*2200p/50V_4

4

S5D

PC77

+5VPCU

52

4

3

PQ23

MDV1528Q

1

+5V_S5

TDC : 3A PEAK : 4A Width : 120mil

VIN

TOP

PC178 1000p/50V_4

PC179 0.1u/25V_4

VIN

PC180 1000p/50V_4

PC181 0.1u/25V_4

VIN

PC182 1000p/50V_4

PC183 0.1u/25V_4

+3VPCU

PC184 1000p/50V_4

PC185 0.1u/25V_4

3

+1.5V_SUS

+3VPCU

VIN

PC186 1000p/50V_4

PC187 0.1u/25V_4

+1.5V_SUS

PC188 1000p/50V_4

PC189 0.1u/25V_4

2

5

4

3

2

1

TDC : 0.75A PEAK : 1A

+SMDDR_VTT

+1.5V_SUS

Width : 40mil

PC99

D D

TDC : 0.38A PEAK : 0.5A

+SMDDR_VREF

10u/6.3V_6

PC94 10u/6.3V_6

MAIND<31,33,35>

Width : 20mil

PC92

0.22u/10V_4

+3V

PC96

12

14

15

13

11

10

10u/6.3V_6

51216_DRVH

51216_VBST

51216_SW

51216_DRVL

4

PAD21PAD

REFIN8REF

51216_REFIN

5

VTTREF

PU7

TPS51216RUKR

VDDQSNS

9

25

20

PGOOD

17

S3

16

S5

19

MODE

18

TRIP

26

PAD

51216_REF

PR133 10K/F_4

22

6

PR137

100K/F_4

C C

HWPG_1.5V<29>

MAINON<29,35>

SUSON<29>

PR144 *SHORT_4

PR143 *SHORT_4

PR141 200K/F_4

PR140 53.6K/F_4

51216_S3

51216_S5

51216_MODE

51216_TRIP

VREF=1.8V

B B

SUSON

PR139 *0_4

PR142 100K_4

51216_S551216_S3

PC90

0.1u/10V_4

3

1

VTTGND

2

VTT

PAD

7

23

VLDOIN

V5IN

DRVH

VBST

SW

DRVL

PGND

GND

PR145 *SHORT_6

VTTSNS

PAD24PAD

PR138 2_6

+5V_S5

Greater than or equal 40mil

PC95 1u/10V_4

4

PC98

0.1u/50V_6

4

RDSon=4.3mohm

VDDIO_MEM_S_SENSE_PR

5

213

5

213

PQ53 AON6414AL

PQ52 AON6756

PC169

2200p/50V_4

PL11

0.68uH_7X7X3

PR134

*2.2/F_6

PC97

*2200p/50V_6

PC91

*0.1u/50V_6

PC93

4.7u/25V_6

PR132 *SHORT_4

PR130 *100_4

PC163

0.1u/50V_6

+

PC164

330u/2.5V_6X4.2

VDDIO_MEM_S_SENSE <4>

3

1

PQ24 AO3404

TDC : 0.64A PEAK : 0.85A Width : 20mil

+1.5V

+1.5V_SUS

2

VIN

+1.5V_SUS

1.5 Volt +/- 5% TDC : 10.42A PEAK : 13.85A OCP : 18A Width : 415mil

PR131

51K/F_4

PC89

0.01u/25V_4

Mode Frequency Discharge mode

200K 400K Tracking Discharge

OCP=18A L ripple current =(19-1.5)*1.5/(0.68u*400k*19) =5.079A

A A

Vtrip=18-(5.079/2)*4.3mohm =0.06647V Rlimit=0.06647/10uA*8~53.183Kohm

5

4

100K 300K Tracking Discharge

S3 S5

S0

S3 (mainon off)

S4/S5

1

0

1

3

ON

ON ON

OFF

VTTREF+1.35VSUS

ON ON

OFF

OFF OFF0 0

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDR 1.5V(TPS51216)

Date: Sheet of

2

Date: Sheet

PROJECT :

1A

of

32 39Tuesday, April 29, 2014

1

5

4

3

2

1

D D

+3V

PR103

100K/F_4

HWPG_0.95VS5<29>

S5_ON<29,31,35>

C C

B B

PR101 *SHORT_4

PR217

*100K/F_4

OCP=7A L ripple current =(19-0.95)*0.95/(2.2u*290k*19) =1.415A Vtrip=[7-(1.415/2)]*14mohm =88.097mV Rlimit=88.097mV/10uA*8=70.48Kohm

PR218 73.2K/F_4

PR108 464K/F_4

1

PGOOD

3

EN

2

TRIP

5

TST

12

GND

+5VPCU

7

V5IN

PU5

TPS51211DSCR

GND13GND14GND15GND

16

PC73 1u/10V_4

DRVH

VBST

SW

DRVL

GND

FB

4

51211V_DRVH

9

51211V_VBST

10

51211V_SW

8

51211V_DRVL

6

11

51211V_FB

VFB=0.7V

PR109

*SHORT_6

PC74

0.1u/50V_6

PQ47

MDV1595S

PC76

2200p/50V_4

52

PQ16

4

MDV1528

3

1

52

3

1

PL8

2.2uH_7X7X3

PR222

*2.2/F_6

PC157

*2200p/50V_6

PR104

*SHORT_4

PR100

3.65K/F_4

PR215

10K/F_4

PR219

*SHORT_4

PC75

4.7u/25V_6

PC68

*0.1u/50V_6

PR106 *100_4

PR107 *0_4

VIN

PC155

0.1u/50V_6

+0.95V_S5

+

PC156

330u/2.5V_6X4.2

+0.95V_S5

0.95 Volt +/- 5% TDC : 3.9A PEAK : 5.2A OCP : 7A Width : 160mil

VDD_095_FB_H <4>

VDD_095_FB_L < 4>

52

4

MAIND<31,32,35>

MAIND

PQ46

MDV1528Q

3

1

+0.95V TDC : 2.7A PEAK : 3.6A

A A

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

+0.95V

Quanta Computer Inc.

PROJECT :

+0.95V_S5(TPS51211)

Width : 120mil

33 39Tuesday, April 29, 2014

1

1A

5

+VDDNB_CORE

PC116 PR59 10_4

APU_VDDNB_RUN_FB_H<4>

D D

62771_EN

PR160 100K/F_4

C C

B B

Place NTC close to the VDDNB Hot-Spot. OCP=100'C

APU_VDD_RUN_FB_H<4>

APU_VDD_RUN_FB_L<4>

A A

CORE_PWM_PROCHOT#<4,5,29>

APU_PWRGD_SVID_REG<4>

PR176

NTC_470K_4

PR55 *SHORT_4

PR54 *SHORT_4

5

PR58 *SHORT_4

VRM_PWRGD<29>

APU_SVC<4>

APU_SVD<4>

APU_VDD_18<4 ,7>

APU_SVT<4 >

VDDA_PWRGD<29>

PR52

PR174

27.4K/F_4 NTC_470K_4

PR53

10K/F_4

Place NTC close to the VDDCORE Hot-Spot. OCP=100'C

+VDD_CORE

PR56 10_4

PR57 10_4

Close to the CPU side.

PR50

27.4K/F_4

PR51

10K/F_4

Close to the CPU side.

330p/50 V_4

PR166

41.2K/F_ 4

+3V

PR171 10K/F_4

PR168 *SHORT_4

VRM_PWRGD

PR33 *SHORT_4

PR32 *SHORT_4

PR31 *SHORT_4

PR30 *SHORT_4

PR29 *SHORT_4

PR28 *SHORT_4

PC111

PR161

133K/F_4

PR170

*0_4

PC117

330p/50 V_4

PC118

0.01u/16 V_4

0.1u/10V_ 4

62771_SVC

62771_SVD

62771_VD DIO

62771_SVT

62771_EN

62771_PW ROK

NTC_NB

NTC

IMON_NB

IMON

PR159

133K/F_4

PC122

680p/50 V_4

PC27

1000p/5 0V_4

PC26

680p/50 V_4

PC30 390p/50 V_4

PC29 100p/50 V_4

62771_C OMP

PC31 390p/50 V_4

PR172

PC119

1000p/5 0V_4

Load line setting

62771_F B_NB

62771_C OMP_NB

35

20

3

4

5

6

7

8

9

1

11

2

10

PC109

0.1u/10V_ 4

PC32 100p/50 V_4

2K/F_4

Load line setting

PR38

1.54K/F_ 4

PR40 300/F_4

PR39 2K/F_4

PR42 133K/F_4

PGOOD_NB

PGOOD

SVC

VR_HOT_L

SVD

VDDIO

SVT

ENABLE

PWROK

NTC_NB

NTC

IMON_NB

IMON

36

19

PR43 133K/F_4

PR173 300/F_4

PR169

2.26K/F_ 4

4

+5V_S5

PR45 *SHORT_6

PR44

1/F_6

PR36

330_4

ISUMP_NB40ISUMN_NB

ISEN1

ISUMN_NB

39

ISEN212ISEN113ISUMP14ISUMN

ISEN2

OCP

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB

BOOT2

UGATE2

PHASE2

LGATE2

LGATE1

PHASE1

UGATE1

BOOT1

PC28

0.15u/10 V_4

EP

PR35 1K_4

PR164 10K_4

1Phase RC time constant

34

33

32

31

30

29

28

27

24

23

22

21

41

PC115

47n/16V_ 4

PC120 1 u/10V_4

62771_VSEN_ NB

38

37

FB_NB

VSEN_NB

COMP_NB

PU2

ISL62771HRZ-T

VSEN16RTN

FB18COMP

17

62771_VSEN

62771_R TN

62771_FB

4

PC121 1 u/10V_4

62771_VD DP

62771_VD D

26

25

VDD

VDDP

15

ISUMN

PR41

487/F_4

1Phase OCP

RC time constant

PC113

0.15u/10 V_4

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB

LGATE_1

PHASE_1

UGATE_1

BOOT_1

PR165

3

PC25

47n/16V_ 4

PR162

11K/F_4

Add 9 GND VIAs for thermal pad

PR167

2.61K/F_ 4

11K/F_4

PR175 NTC_10K/F_4

PC110

0.1u/10V_ 4

3

PR157

2.61K/F_ 4

Close with PHASE_NB inductor

PR177 NTC_10K/F_4

VSUM+

Close with phase1 inductor

VSUM-

VSUMG+

VSUMG-

PC112

0.1u/10V_ 4

+5V_S5

BOOT_NB

UGATE_NB

PHASE_NB

LGATE_NB

BOOT_1

UGATE_1

PHASE_1

LGATE_1

PR46

2.2/F_6

PC33

0.22u/25 V_6

PR47

2.2/F_6

PC34

0.22u/25 V_6

4

VSUMG+

VSUMG-

4

VSUM+

VSUM-

2

5

213

PQ33 AON6414AL

5

213

PQ36 AON6752

PR34 3.65K/F_4

PR163 1/F_4

5

213

PQ34 AON6414AL

5

213

PQ35 AON6752

PR37 3.65K/F_4

PR158 1/F_4

2

PC125

4.7u/25V_ 6

0.36uH_10X10X4

1 2

PR49

PC43

PC40

4.7u/25V_ 6

PL4

3

4

2.2_6

1000p/5 0V_6

PC39

0.1u/50V_ 6

AMD Beema 25W

+VDD_CORE TDC : 20A PEAK : 25A OCP : 31A Width : 840mil Load Line = -40mV/A

PC42

4.7u/25V_ 6

PL3

0.36uH_10X10X4

1 2

3

PR48

*2.2_6

PC38

*1000p/50 V_6

PC124

4.7u/25V_ 6

4

PC41

0.1u/50V_ 6

1

VIN

PC126

2200p/5 0V_4

DCR=1.1mOhm

+

PC46

330u/2V_ 7343

PC49

PC48

10u/6.3V_ 6

0.1u/10V_ 4

+VDDNB_CORE TDC : 13A PEAK : 17A OCP : 22A Width : 680mil Load Line = -40mV/A

12

+

PC123

2200p/5 0V_4

PC127

33u/25V_ 6x4.5

DCR=1.1mOhm

+

PC44

330u/2V_ 7343

PC47

10u/6.3V_ 6

0.1u/10V_ 4

PC128

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

VDD / VDDNB CORE ( ISL62771) 1A

1

+VDDNB_CORE

+

PC45

*330u/2V_7 343

VIN

+VDD_CORE

+

PC129

*330u/2V_7 343

34 3 9Tuesday, Apr il 29, 2014

5

4

3

2

1

+3VPCU

PR78

10K/F_4

PC66

0.1u/25V_ 6

PR77 121K/F_4

PU3 TPS54318RT ER

16

VIN

1

VIN

2

VIN

14

PWRGD

15

EN

7

COMP

8

RT/CLK

9

SS

PC57

0.01u/25 V_4

10

PH

11

PH

12

PH

13

BOOT

6

VSNS

3

GND

4

GND

5

AGND

PAD17PAD18PAD19PAD20PAD21PAD

22

PC60

0.1u/50V_ 6

1.8V_VSNS

VFB=0.8V

PL7

1uH_7X7X3

PR79 100K/F_4

PC63

*100p/50V_ 4

PC65

10u/6.3V_ 6

PC61

1200p/5 0V_4

+3V

D D

HWPG_1.8VS5<29>

S5_ON<29,31, 33>

PR92 *SHORT_4

PC64

1000p/5 0V_4

R1

R2

+1.8V_S5

1.8 Volt +/- 5% TDC : 2.26A PEAK : 3A Width : 90mil

PR80 100K/F_4

PR83

78.7K/F_ 4

PC144

0.1u/10V_ 4

PC145

10u/6.3V_ 6

+1.8V_S5

PC147 10u/6.3V_ 6

MAIND

+1.8V_S5

3

2

TDC : 1.13A PEAK : 1.5A Width : 50mil

PQ45 AO3404

1

+1.8V

Vo=0.8*[(R1+R2)/R2]

C C

VIN

PD7 DA2J10100L

Thermal protection

PR187

1.54K/F_ 4

VLVL

S5_ON

PR186 200K/F_4

2.469V

PR185 200K/F_4

PQ44

DTC144EUA

B B

NTC_R for setting TEMP. 887/F_4 for 86'C --->now (CS18872FB01)

1.5K/F_4 for 70'C

VIN

PR147 1M_4

MAINON_ON_G

PQ31 DTC144EUA

PR148 1M_4

MAINON<29,32 >

A A

2

PR146 *100K/F_6

1 3

PR149 22_8

3

2

PQ26 2N7002K

1

PR152 22_8

3

2

1

PQ30 2N7002K

3

2

1

PR135 22_8

PQ27 2N7002K

+1.5V+ 1.8V

3

2

1

PR150 22_8

PQ28 2N7002K

+0.95V

2

+15V+5V+3V

PR151 22_8

3

1

PQ29 2N7002K

PR136 1M_4

MAIND

3

2

PQ25 2N7002K

1

PC100 *2200p/50 V_4

MAIND <31,3 2,33>

(CS21502FB14)

S5_ON

PR188

NTC_10K/F_4

3

2

PQ43 2N7002K

1

PR189 1M_6

1

PQ42 AO3409

2

1 3

PU10A AS393MTR-E1

PU10B AS393MTR-E1

1

7

3

PC132

0.1u/50V_ 6

PR182 *SHORT_6

PR184 200K_6

PC133

0.1u/50V_ 6

SYS_SHDN# <12 ,31,36>

3

2

PQ41 2N7002K

1

2

84

3

+

2

-

5

+

6

-

For EC control thermal protection (output 3.3V)

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

+1.8V/+1.5V/Thermal

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

1

1A

of

35 3 9Tuesday, Apr il 29, 2014

5

+3V_S5

PR208 *EV @100K_4

2

PQ14

D D

C C

THAL_GPU_VR

GPU_PG_EN<37>

GPU_DPRSLPVR<12>

Check EN level

0.95_GFX_EN<37>

B B

A A

51728_V5FILT

GPUVDDC_SENSE<15>

GPUVSS_SENSE<15>

1 3

PR204

*EV@0_4

Parallel

5

*EV@PDTC143TT

SYS_SHDN# <12,31,35>

+1.8V_GFX

PR229 *EV@10K/F_4

GPU_PG_EN

PR213 *EV@100K/F_4

PR214 *EV@2.2K_4

PR206 *EV@100K/F_4

PR89 *SHORT_4

PWRCNTRL0<12>

PWRCNTRL1<12>

PWRCNTRL2<12>

PWRCNTRL3<12>

PWRCNTRL4<12>

PWRCNTRL5<12>

+3V

PR95

PR93

*SHORT_4

*EV@0_4

THRM=0.75V/60uA=12.5K TEMP=87C

PR67 *SHORT_4

PR66 *SHORT_4

+3V

PR90 *EV@10K/F_4

PR87 *EV@100 K/F_4

PR105 *EV @200_4

PR192 *SHORT_4 PC149

PR195 *SHORT_4

PR198 *SHORT_4

PR203 *SHORT_4

PR207 *SHORT_4

PR211 *SHORT_4

PC70 *EV@68p/50V_4

PC69 *EV@1200p/50V_4

51728_VREF

PC152 *EV@0.22u/10V_6

PR210

*EV@316K/F_4

PR178

*EV@NTC_100K/F_4

+VGPU_CORE

PR68 *EV@100_4

PR71 *EV@100_4

Close to the GPU side.

4

PR98 *EV@100 K/F_4

51728_PCNT

51728_EN

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

51728_DROOP

PR99

*EV@8.2K/F_4

PR97

*EV@0_4

51728_SLEW

*EV@4.02K/F_4

51728_VFB

51728_GFB

PC72

*EV@1000p/50V_4

4

+3V_GFX

Default 0.9V

PR84 *EV@10 K/F_4

PR86 *EV@10 K/F_4

PR88 *EV@10 K/F_4

PR91 *EV@10 K/F_4

PR94 *EV@10 K/F_4

PR96 *EV@10 K/F_4

33

PGD

34

PG

13

PCNT

12

SLP

35

EN

10

THAL

20

VID0

19

VID1

18

VID2

17

VID3

16

VID4

15

VID5

14

VID6

*EV@TPS51728RHAR

39

DROOP

40

VREF

37

SLEW

9

THRM

PR179

8

PC71 *EV@1000p/50V_4

GFB7VFB

+5V_S5

26

V5IN

PU4

IMON

11

51728_IMON

PR102 *EV@12.4K/F_4

41

PR212 *EV@10K/F_4

DRVH2

VBST2

DRVL2

DRVH1

VBST1

DRVL1

TONSEL

TRIPSEL

OSRSEL

V5FILT

PwPd

PR209 *EV@10K/F_4

PC143 *EV@2.2u/10V_6

LL2

CSP2

CSN2

LL1

CSP1

CSN1

PGND

PU

GND2TPAD142TPAD243TPAD344TPAD445TPAD546TPAD647TPAD748TPAD849TPAD950TPAD1051TPAD1152TPAD1253TPAD1354TPAD1455TPAD1556TPAD16

57

PR197 *EV@10K/F_4

PR205 *EV@10K/F_4

PR201 *EV@10K/F_4

51728_DRVH2

30

51728_VBST2

29

51728_LL2

28

51728_DRVL2

27

51728_CSP2

3

51728_CSN2THAL_GPU_VR

4

51728_DRVH1

21

51728_VBST1

22

51728_LL1

23

51728_DRVL1

24

51728_CSP1

6

51728_CSN1

5

25

51728_TONSEL

36

51728_TRIPSEL

31

51728_OSRSEL

32

PR200 *SHORT_4

PR196

*SHORT_4

1

51728_V5FILT51728_TONSEL

38

PC146

*EV@2.2u/10V_6

PC67

*EV@3300p/50V_4

3

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

PR193 *EV@10K/F_4

+3V

PR85

*EV@0_4

PR202 *EV @0_4

PR216 *SHORT_8

3

51728_VBST2

51728_DRVH2

51728_LL2

51728_DRVL2

51728_VBST1

51728_DRVH1

*EV@10K/F_4

51728_LL1

51728_DRVL1

PR199 *EV @0_4

PC140

*EV@0.22u/25V_6

PR194

*EV@10K/F_4

PR81

*EV@2.2/F_6

PC141

*EV@0.22u/25V_6

PR190

Close to the VR side.

PR82

*EV@2.2/F_6

Close to the VR side.

4

51728_CSP2

PC148 *EV@0.1u/25V_4

51728_CSN2

*EV@0.1u/25V_4

4

PC151 *EV@0.1u/25V_4

PC150 *EV@0.1u/25V_4

5

213

*EV@AON6414AL

5

213

*EV@AON6752

5

213

PQ40 *EV@AON6414AL

5

213

PQ37 *EV@AON6752

51728_CSP1

51728_CSN1

2

VIN

PC62

PQ39

PQ38

PC153

*EV@0.015u/16V_4

PR183

*EV@NTC_100K/F_4

PC137

PR75

*EV@2.2_6

PC154

*EV@0.015u/16V_4

PR180

*EV@NTC_100K/F_4

2

*EV@0.1u/50V_6

*EV@0.24uH_7X7X3

1 2

PR76

*EV@2.2_6

PC59

*EV@1000p/50V_6

PR74

*EV@28.7K/F_4

*EV@0.1u/50V_6

PL5

*EV@0.24uH_7X7X3

1 2

3

PC56

*EV@1000p/50V_6

PR181

*EV@28.7K/F_4

1

PC142

PC136

PC138

*EV@4.7u/25V_6

PL6

3

4

PR70 *SHORT_4

PR73 *EV@16.2K/F_4

*EV@2200p/50V_4

*EV@4.7u/25V_6

DCR=1.1mOhm

PC55

PC52

*EV@10u/6.3V_6

*EV@0.1u/10V_4

+

PC131

*EV@330u/2V_7343

+VGPU_CORE

Opal-XT 25W/Jet-XT 25W

PR220

*EV@412K/F_4

PC58

PC135

*EV@4.7u/25V_6

DCR=1.1mOhm

4

PC53

*EV@0.1u/10V_4

PR69 *SHORT_4

PR72 *EV@1 6.2K/F_4

PR221

*EV@412K/F_4

Size Document Number Rev

Date: Sheet

Date: Sheet of

+VGPU_CORE Countinue current:32A Peak current:42.6A OCP:52A Load Line=0mV/A

12

+

PC139

*EV@2200p/50V_4

+

PC54

PC130

*EV@10u/6.3V_6

*EV@330u/2.5V_6X4.2

PC134

*EV@33U/25V_6x4.5

+

PC51

*EV@330u/2V_7343

Quanta Computer Inc.

PROJECT :

+VGPU CORE(TPS 51728)

VIN

+VGPU_CORE

A1A

of

36 39Tuesday, April 29, 2014

1

36 39Tuesday, April 29, 2014

5

+3VP CU

+3V_ GFX

D D

0.95 _GFX_E N<36>

+3V_ GFX

PR2 1 *SHORT _4 PR2 0 *SHORT _4

PR2 6 *EV@1 0K/F_4

PC2 1

*EV@1 000p/5 0V_4

*EV@1 00p/50 V_4

*EV@1 0u/6.3V_6

PC1 6

PC1 5

HWP G_+PCIE _VDDC _GFX

PR1 0

*EV@1 0K/F_4

PC1 0

*EV@1 200p/5 0V_4

PC1 7

*EV@0 .1u/25V_6

4

PR1 4 *EV@1 21K/F_ 4

PU9 *EV @TPS54 318RTE R

16

VIN

1

VIN

2

VIN

14

PWRGD

15

EN

7

COMP

8

RT/CLK

9

SS

PC1 02 *EV@0 .01u/25V_ 4

3

+0.95V

2

+PCI E_VDD C_GFX

1

0.95 Volt +/- 5% TDC : 1.64A

10

PH

11

PH

12

PH

13

BOOT

6

VSNS

3

GND

4

GND

5

AGND

PAD17PAD18PAD19PAD20PAD21PAD

22

PC1 08

*EV@0 .1u/50V_6

1.5V _SN

VFB=0.8V

PL2

*EV@1 uH_7X7X3

R1

R2

PEAK : 2.18A Width : 90mil

PR9 *EV@7 8.7K/F_ 4

*EV@0 .1u/10V_4

PR1 3 *EV@4 12K/F_ 4

PC1 06

PC1 14 *EV@1 0u/6.3V_6

PC2 4

*EV@1 0u/6.3V_6

C C

+15V

VIN

PR6 4 *EV@1 M_4

3

Q39 *EV@A O3413

1

2

PR6 3 *EV@1 M_4

2

3

1

0.95 _GFX_E N

B B

A A

2

PQ1 1

*EV@2 N7002K

1

+3V

*EV@0 .1u/10V_4C6 88

R45 2 *EV@ 100K_4

DGP U_PWRE N<5>

5

+1.8V _GFX

2

+3V_ GFX

3

Q40

*EV@2 N7002K

PR6 2 *EV@2 2_8

3

PQ1 0

*EV@2 N7002K

1

TDC : 0.02A PEAK : 0.025A Width : 20mil

C68 1 *EV@0 .1u/10V_4

+3V_ GFX

2

PR6 1 *EV@2 2_8

3

PQ9

*EV@2 N7002K

1

4

+1.5V _GFX

2

PR2 32 *EV@2 2_8

3

PQ5 5 *EV@2 N7002K

1

2

Vo=0.8*[(R1+R2)/R2]

+1.8V _S5

PR2 43 *EV@1 M_4

3

PQ6 8

*EV@2 N7002K

1

*EV@2 200p/5 0V_4

2

PC1 73

3

PQ8 *EV@A O3404

1

+1.8V _GFX

TDC : 0.75A PEAK : 1A Width : 40mil

+1.5V _GFX

GPU_P G_EN<36>

PR2 36 *EV@1 K_4

2

PQ5 6 *EV@MMB T3904-7 -F_200 MA

1 3

3

1

+3V

PR2 33

*EV@1 0K/F_4

PQ5 4

*EV@2 N7002K

+3V_ GFX

2

VIN

PR2 31 *EV@1 M_4

PR2 30 *EV@1 M_4

PR2 34

*EV@1 0K/F_4

3

PQ5 7

*EV@2 N7002K

1

+15V

PR6 5 *EV@1 M_4

3

2

PQ1 2

*EV@2 N7002K

1

Size D ocument Numb er Rev

Date: Sheet of

Date: Sheet

PX_ MODE_D

PC5 0

*EV@2 200p/5 0V_4

PE_ PWRGD <5 >

GPU_POWER/VDDC_GFX

+1.5V _SUS

52

TDC : 2.57A PEAK : 3.42A

1

*EV@MD V1528 Q

Width : 100mil

PQ1 3

of

37 39Tues day, April 29, 2 014

4

3

Quanta Computer Inc.

PROJECT :

+1.5V _GFX

A1A

Acer E5-421 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual