5
4
3
2
1
!"
D D
C C
Cardreader
CONN. 2in 1
P28
I/O board
B B
Zoro_SL (ZRW) SKL ULT SYSTEM BLOCK DIAGRAM
DDR3L-SODIMM CHA
P12
DDR3L-SODIMM CHB
P13
SATA - HDD
SATA ODD
RTS5170
(cardreader)
CCD(Camera)
Touch Screen
Blue Tooth
I/O Board Conn.USB2 IO*1
P25
P25
P28
P21
P21
P26
P28
Dual Channel DDR III
1066/1333/1600 MHZ
SATA0
SATA1
USB2-8
USB2-7
USB2-6
USB2-5
USB2-4
P6
BATTERY
Azalia
SKY LAKE ULT 15W
MCP 1356pins
IMC
DC+GT3e
42 mm X 24 mm
SATA
Integrated PCH
USB2.0
DMIC_CLK0
DMIC_DATA0
RTC
IHDA
P2~P10
LPC
PCI-E x4
TX/RX
CLK
eDP
USB3.0/2.0
CLK
PCI-E x1
CLK
I2C_0
SPI
DP
PCIE1-4
EDP
DDI2
DDI1
USB3-1 & USB3-2
USB2-1 & USB2-2
X'TAL
32.768KHz
X'TAL 24MHz
SPI ROM
8M+4M
GPU
N16S-GT
N16V-GM
P7
P14~P19
ITE6516
PS8201
X'TAL 27MHz
P20
P22
PCIE-6
PCIE-5
VRAM
DDR3
P18~P19
eDP Conn.
VGA Conn.
HDMI Conn.
P21
P21
P22
USB3 Port MB side
CN13 -> USB3 port 2 ( up )
CN16 -> USB3 port 1 ( down )
MINI CARD
WLAN+BT
RTL8111H
10/100/1G
P26
P23
X'TAL 25MHz
IV@ : iGPU
EV@ : Optimus
GT@ : N16S-GT / GC6
GM@ : N16V-GM / WO GC6
DR@ : For Dual Rank ( VRAM 8 pcs)
KBL@ : Keyboard backlight
TPM@ : TPM
TPM_N@: For TPM 2.0
TPM_l@ : For TPM 1.2
8M@ : 8M FLASH ROM
4M@ : 4M FLASH ROM
GS@ :G-SENSOR
TDI@ : TOUCH PAD I2C
TSU@ : TOUCH SCREEN USB
TSI@ : TOUCH SCREEN I2C
GT3@ : GT3 CPU
NAC@ : Non IOAC
IOAC@ : For IOAC
P28
RJ45
P23
BOM
K/B
BL
Con.
EC
IT8987
P27
Touch PAD
P27
HALL
SENSOR
3
P17
P29
Fan Driver
(Fan signal)
TPM(option)
P27
P25
2
BQ24780RUYR
Batery C harger
TPS51225
+3V/+5V
RT8237CZQW
+1V_S5
NB681GD-Z
+VCCOPC/+VCCEOPIO
G5316RZ1D
+1.35VSUS
P30
MDV1528Q
+5V_S5/+3V_S5/+3V/+5V
P31
ISL95859HRT Z-T
+VCORE/VCCSA/VCCGT
P32
P33
Thermal Protection
P35
Discharger
UP1658RQKF
+VGPU_CORE
P31
RT8068AZQW
P38
+1.05V_GFX/+3V_GFX
+1.5V_GFX
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
P7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Block Diagram
Block Diagram
Block Diagram
1
P40
ZRW
ZRW
ZRW
P41
P42
148Monday, July 20, 2015
148Monday, July 20, 2015
148Monday, July 20, 2015
D-MIC
Int. D -MIC
P24
Universal HP
A A
ALC25 5
AUDIO CODEC
P24 P24
P24
Speaker*2
LED
P27
K/B Con.
P27
5
4
3A
3A
3A
5
4
3
2
1
Skylake ULT (DISPLAY,eDP)
AT16
AU16
D63
A54
C65
C63
A65
C55
D55
B54
C56
A6
A7
BA5
AY5
H66
H65
SKL_ULT
DDI
DISPLAY SIDEBANDS
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
U35D
CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#
CPU MISC
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
SKL_ULT/BGA
REV = 1
SKL_ULT
1 OF 20
+3V_S5
+3V_S5
+3V_S5
+3V_S5
EDP
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
4 OF 20
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
C47
EDP_TXN0
C46
EDP_TXP0
D46
EDP_TXN1
C45
EDP_TXP1
A45
B45
A47
B47
E45
EDP_AUXN
F45
EDP_AUXP
B52
G50
F50
E48
CRT_AUX#_C
F48
CRT_AUX_C
G46
F46
L9
INT_HDMI_HPD
L7
CRT_HPD
L6
R567 *short_4
N9
R571 *short_4
L10
EDP_HPD
R12
PCH_BLON
R11
PCH_BRIGHT
U13
PCH_VDDEN
?
B61
XDP_TCK0
D60
XDP_TDI_CPU
A61
XDP_TDO_CPU
C60
XDP_TMS_CPU
B59
XDP_TRST#
B56
XDP_TCK1
D59
XDP_TDI
A56
PCH _JTAG_TDO
C59
XDP_TMS
C61
A59
PCH_TRST#
PCH_JTAGX
EDP_TXN0 (21)
EDP_TXP0 (21)
EDP_TXN1 (21)
EDP_TXP1 (21)
EDP_AUXN (21)
EDP_AUXP (21)
R546 *0_4
R553 *0_4
C671 *short_4
C670 *short_4
Rev:D change to shortpad
R539 *short_4
R549 *short_4
R517 *short_4
Rev:D change to shortpad
?
XDP_TDO
R795 0_4
XDP_TDI
R796 0_4
If use Intel DCI USB 3.0 fixture need to short
1. XDP_TDO <--> XDP_TDO_CPU
2. XDP_TDI <--> XDP_TDI_CPU
3. XDP_TMS <--> XDP_TMS_CPU
R797 0_4
PCH_BRIGHTDP_UTIL
CRT_AUXN (20)
CRT_AUXP (20)
INT_HDMI_HPD (22)
CRT_HPD (20)
KBSMI# (29)
EC_SCI# (29)
EDP_HPD (21)
PCH_BLON (21)
PCH_BRIGHT (21)
EDP_VDD_EN (21)
XDP_TDO
XDP_TRST#
XDP_TCK0
XDP_TDO_CPU
XDP_TDI_CPU
XDP_TMS_CPUXDP_TMS
Rev:F add
eDP Panel
PCH JTAG
TCK,TMS
Trace Length < 9000mi ls
H_PWRGOOD (50ohm )
Trace Length: 1~11.25 inc hes
CRT_AUXN
CRT_AUXP
CRT_CLK
CRT_DATA
KBSMI#
EC_SCI#
CRT_HPD
EDP_HPD
100k pull-down on PCH side
JTAG_TCK,JTAG_TMS
Trace Length < 9000mils
R533 *100K_4
R532 *100K_4
R577 2.2K_4
R152 2.2K_4
R780 20K/F_4
R781 20K/F_4
Rev:D add
R564 100K_4
R563 100K_4
Change to +1V_VCCST 11/6
XDP_TDO_CPU
XDP_TMS
XDP_TDI
PCH _JTAG_TDO
PCH_JTAGX
XDP_TRST#
XDP_TCK0
XDP_TCK1
PCH_TRST#
2/16
,XDP_TCK1,XDP_ TMS
don't need pull up or pull down
5/29 XDP_TCK0 R558 Stuff
R559 51_4
R514 51_4
R515 51_4
R538 51_4
R513 *1K_4
R535 *51_4
R558 51_4
R537 *51_4
R534 51_4
D D
HDMICRT
+VCCIO
C C
+1V_VCCST
CPU_THRMTRIP#
R5291K_4
CATERR#
Rev:E Stuff only for C2 build Debug
Ramp will remove
+VCCIO
R465 1K_4
B B
R78849.9/F_4
H_PROCHOT#
H_PROCHOT#(29,30,36)
Avoid 125Mhz
BPM#[0:7]
Trace Length 1~6 inches
Length match < 300 mils
H_PECI (50ohm )
Route on mi crostrip only
Spacing >18 mi ls
Trace Length: 0.4~6.125 iches
SM_RCOMP[0: 2]
Trace length < 500 m ils
Trace width = 12~15 m ils
Trace spacing = 20 m ils
INT_HDMITX2N(22)
INT_HDMITX2P(22)
INT_HDMITX1N(22)
INT_HDMITX1P(22)
INT_HDMITX0N(22)
INT_HDMITX0P(22)
INT_HDMICLK-(22)
INT_HDMICLK+(22)
CRT_TXN0(20)
CRT_TXP0(20)
CRT_TXN1(20)
ITE FAE suggest CAP
should be at PCH side.
HDMI_DDCCLK_SW(22)
HDMI_DDCDATA_SW(22)
CRT_TXP1(20)
PCH_ODD_EN(25)
eDP_RCOMP
Trace length < 100 mils
Trace width = 20 mils
Trace spacing = 25 mils
H_PECI(29)
THRMTRIP#
DGPU_PW_CTRL#(4)
HDMI_DDCCLK_SW
HDMI_DDCDATA_SW
CRT_CLK
CRT_DATA
EDP_RCOMP
R15424.9/F_4
TP65
R531 499/F_4
R530 100/F_4
TP89
TP90
TP64
TP62
U35A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKL_ULT/BGA
REV = 1
CATERR#
H_PECI
H_PROCHOT#_RH_PROCHOT#
CPU_THRMTRIP#
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
DGPU_PW_CTRL#
R635 49.9/F_4
R646 49.9/F_4
R158 49.9/F_4
R162 49.9/F_4
!#
+3V
+3V
MP remove(Inte l)
+1V_VCCST
+1V_VCCST
+1V_VCCST
2
R488
*1K_4
1 3
Q5 MMBT3904-7-F
3
Q31
FDV301N
1
R74
1K_4
2
SYS_SHDN# (31,40)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
3
2
Monday, July 20, 2015
PROJECT :
Skylake 1/4 (DDI/eDP)
Skylake 1/4 (DDI/eDP)
Skylake 1/4 (DDI/eDP)
ZRW
ZRW
ZRW
1
3A
3A
248
248
248
3A
CPU thermal trip
+1V_VCCST
U33
NC1VCC
A A
IMVP_PWRGD(36)
2
A
GND3Y
74AUP1G07GW
R478 *0_4
5
C628
0.1u/16V_4
4
+3V
12
R485
10K_4
IMVP_PWRGD_3V (8)
IMVP_PWRGD_3V
THRMTRIP#
5
4
5
4
3
2
1
Change Data and DQS to interleave.
!$
?
D D
C C
B B
M_A_DQ0(12)
M_A_DQ1(12)
M_A_DQ2(12)
M_A_DQ3(12)
M_A_DQ4(12)
M_A_DQ5(12)
M_A_DQ6(12)
M_A_DQ7(12)
M_A_DQ8(12)
M_A_DQ9(12)
M_A_DQ10(12)
M_A_DQ11(12)
M_A_DQ12(12)
M_A_DQ13(12)
M_A_DQ14(12)
M_A_DQ15(12)
M_A_DQ16(12)
M_A_DQ17(12)
M_A_DQ18(12)
M_A_DQ19(12)
M_A_DQ20(12)
M_A_DQ21(12)
M_A_DQ22(12)
M_A_DQ23(12)
M_A_DQ24(12)
M_A_DQ25(12)
M_A_DQ26(12)
M_A_DQ27(12)
M_A_DQ28(12)
M_A_DQ29(12)
M_A_DQ30(12)
M_A_DQ31(12)
M_A_DQ32(12)
M_A_DQ33(12)
M_A_DQ34(12)
M_A_DQ35(12)
M_A_DQ36(12)
M_A_DQ37(12)
M_A_DQ38(12)
M_A_DQ39(12)
M_A_DQ40(12)
M_A_DQ41(12)
M_A_DQ42(12)
M_A_DQ43(12)
M_A_DQ44(12)
M_A_DQ45(12)
M_A_DQ46(12)
M_A_DQ47(12)
M_A_DQ48(12)
M_A_DQ49(12)
M_A_DQ50(12)
M_A_DQ51(12)
M_A_DQ52(12)
M_A_DQ53(12)
M_A_DQ54(12)
M_A_DQ55(12)
M_A_DQ56(12)
M_A_DQ57(12)
M_A_DQ58(12)
M_A_DQ59(12)
M_A_DQ60(12)
M_A_DQ61(12)
M_A_DQ62(12)
M_A_DQ63(12)
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U35B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SKL_ULT/BGA
REV = 1
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR CH - A
2 OF 20
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
AM69
AT69
AT70
BA64
AY64
AY60
BA60
BA38
AY38
AY34
BA34
BA30
AY30
AY26
BA26
AW50
AT52
AY67
AY68
BA67
AW67
?
M_A_ODT0
M_A_ODT1
M_A_A5
M_A_A9
M_A_A6
M_A_A8
M_A_A7
M_A_A12
M_A_A11
M_A_A15
M_A_A14
M_A_A13
M_A_A2
M_A_A10
M_A_A1
M_A_A0
M_A_A3
M_A_A4
M_A_DQS#0
M_A_DQS0
M_A_DQS#1
M_A_DQS1
M_A_DQS#2
M_A_DQS2
M_A_DQS#3
M_A_DQS3
M_A_DQS#4
M_A_DQS4
M_A_DQS#5
M_A_DQS5
M_A_DQS#6
M_A_DQS6
M_A_DQS#7
M_A_DQS7
DDR0_ALERT#
TP_DDR0_PARITY #
+VREF_CA_CPU
+VREFDQ_SA_M3
+VREFDQ_SB_M3
DDR_VTT_CTRL
R621 *10K_4
M_A_CLK0# (12)
M_A_CLK0 (12)
M_A_CLK1# (12)
M_A_CLK1 (12)
M_A_CKE0 (12)
M_A_CKE1 (12)
M_A_CS#0 (12)
M_A_CS#1 (12)
M_A_ODT0_DIMM (12)
M_A_ODT1_DIMM (12)
M_A_BS#2 (12)
M_A_CAS# (12)
M_A_WE# (12)
M_A_RAS# (12)
M_A_BS#0 (12)
M_A_BS#1 (12)
M_A_DQS#0 (12)
M_A_DQS0 (12)
M_A_DQS#1 (12)
M_A_DQS1 (12)
M_A_DQS#2 (12)
M_A_DQS2 (12)
M_A_DQS#3 (12)
M_A_DQS3 (12)
M_A_DQS#4 (12)
M_A_DQS4 (12)
M_A_DQS#5 (12)
M_A_DQS5 (12)
M_A_DQS#6 (12)
M_A_DQS6 (12)
M_A_DQS#7 (12)
M_A_DQS7 (12)
TP21
+1.35VSUS
2
1 3
Q35
*DTC144EU
+3V_S5
R682
*100K_4
M_B_DQ0(13)
M_B_DQ1(13)
M_B_DQ2(13)
M_B_DQ3(13)
M_B_DQ4(13)
M_B_DQ5(13)
M_B_DQ6(13)
M_B_DQ7(13)
M_B_DQ8(13)
M_B_DQ9(13)
M_B_DQ10(13)
M_B_DQ11(13)
M_B_DQ12(13)
M_B_DQ13(13)
M_B_DQ14(13)
M_B_DQ15(13)
M_B_DQ16(13)
M_B_DQ17(13)
M_B_DQ18(13)
M_B_DQ19(13)
M_B_DQ20(13)
M_B_DQ21(13)
M_B_DQ22(13)
M_B_DQ23(13)
M_B_DQ24(13)
M_B_DQ25(13)
M_B_DQ26(13)
M_B_DQ27(13)
M_B_DQ28(13)
M_B_DQ29(13)
M_B_DQ30(13)
M_B_DQ31(13)
M_B_DQ32(13)
M_B_DQ33(13)
M_B_DQ34(13)
M_B_DQ35(13)
M_B_DQ36(13)
M_B_DQ37(13)
M_B_DQ38(13)
M_B_DQ39(13)
M_B_DQ40(13)
M_B_DQ41(13)
M_B_DQ42(13)
M_B_DQ43(13)
M_B_DQ44(13)
M_B_DQ45(13)
M_B_DQ46(13)
M_B_DQ47(13)
M_B_DQ48(13)
M_B_DQ49(13)
M_B_DQ50(13)
M_B_DQ51(13)
M_B_DQ52(13)
M_B_DQ53(13)
M_B_DQ54(13)
M_B_DQ55(13)
M_B_DQ56(13)
M_B_DQ57(13)
M_B_DQ58(13)
M_B_DQ59(13)
M_B_DQ60(13)
M_B_DQ61(13)
M_B_DQ62(13)
M_B_DQ63(13)
DDR_VTTT_PG_CTRL (35)
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AF65
AF64
AK65
AK64
AF66
AF67
AK67
AK66
AF70
AF68
AH71
AH68
AF71
AF69
AH70
AH69
AT66
AU66
AP65
AN65
AN66
AP66
AT65
AU65
AT61
AU61
AP60
AN60
AN61
AP61
AT60
AU60
AU40
AT40
AT37
AU37
AR40
AP40
AP37
AR37
AT33
AU33
AU30
AT30
AR33
AP33
AR30
AP30
AU27
AT27
AT25
AU25
AP27
AN27
AN25
AP25
AT22
AU22
AU21
AT21
AN22
AP22
AP21
AN21
Stuff Q54 for both UMA and GPU in DDR_VTT_CNTL
SKL ULT (DDR3L)SKL ULT (DDR3L)
U35C
DDR1_DQ[0]/DDR0_DQ[16]
DDR1_DQ[1]/DDR0_DQ[17]
DDR1_DQ[2]/DDR0_DQ[18]
DDR1_DQ[3]/DDR0_DQ[19]
DDR1_DQ[4]/DDR0_DQ[20]
DDR1_DQ[5]/DDR0_DQ[21]
DDR1_DQ[6]/DDR0_DQ[22]
DDR1_DQ[7]/DDR0_DQ[23]
DDR1_DQ[8]/DDR0_DQ[24]
DDR1_DQ[9]/DDR0_DQ[25]
DDR1_DQ[10]/DDR0_DQ[26]
DDR1_DQ[11]/DDR0_DQ[27]
DDR1_DQ[12]/DDR0_DQ[28]
DDR1_DQ[13]/DDR0_DQ[29]
DDR1_DQ[14]/DDR0_DQ[30]
DDR1_DQ[15]/DDR0_DQ[31]
DDR1_DQ[16]/DDR0_DQ[48]
DDR1_DQ[17]/DDR0_DQ[49]
DDR1_DQ[18]/DDR0_DQ[50]
DDR1_DQ[19]/DDR0_DQ[51]
DDR1_DQ[20]/DDR0_DQ[52]
DDR1_DQ[21]/DDR0_DQ[53]
DDR1_DQ[22]/DDR0_DQ[54]
DDR1_DQ[23]/DDR0_DQ[55]
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_DQ[25]/DDR0_DQ[57]
DDR1_DQ[26]/DDR0_DQ[58]
DDR1_DQ[27]/DDR0_DQ[59]
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_DQ[29]/DDR0_DQ[61]
DDR1_DQ[30]/DDR0_DQ[62]
DDR1_DQ[31]/DDR0_DQ[63]
DDR1_DQ[32]/DDR1_DQ[16]
DDR1_DQ[33]/DDR1_DQ[17]
DDR1_DQ[34]/DDR1_DQ[18]
DDR1_DQ[35]/DDR1_DQ[19]
DDR1_DQ[36]/DDR1_DQ[20]
DDR1_DQ[37]/DDR1_DQ[21]
DDR1_DQ[38]/DDR1_DQ[22]
DDR1_DQ[39]/DDR1_DQ[23]
DDR1_DQ[40]/DDR1_DQ[24]
DDR1_DQ[41]/DDR1_DQ[25]
DDR1_DQ[42]/DDR1_DQ[26]
DDR1_DQ[43]/DDR1_DQ[27]
DDR1_DQ[44]/DDR1_DQ[28]
DDR1_DQ[45]/DDR1_DQ[29]
DDR1_DQ[46]/DDR1_DQ[30]
DDR1_DQ[47]/DDR1_DQ[31]
DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]
SKL_ULT/BGA
REV = 1
M_A_A[15:0]
DDR0_ALERT#
DDR1_ALERT#
&-./-)0122304)41)56%)
?
SKL_ULT
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR CH - B
3 OF 20
M_A_A[15:0] (12)
DDR1_ODT[1]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
DDR1_MA[3]
DDR1_MA[4]
DDR1_PAR
?
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
M_B_ODT0
M_B_ODT1
M_B_A5
M_B_A9
M_B_A6
M_B_A8
M_B_A7
M_B_A12
M_B_A11
M_B_A15
M_B_A14
M_B_A13
M_B_A2
M_B_A10
M_B_A1
M_B_A0
M_B_A3
M_B_A4
M_B_DQS#0
M_B_DQS0
M_B_DQS#1
M_B_DQS1
M_B_DQS#2
M_B_DQS2
M_B_DQS#3
M_B_DQS3
M_B_DQS#4
M_B_DQS4
M_B_DQS#5
M_B_DQS5
M_B_DQS#6
M_B_DQS6
M_B_DQS#7
M_B_DQS7
DDR1_ALERT#
TP_DDR1_PARITY #
CPU_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
M_B_A[15:0]
M_B_CLK0# (13)
M_B_CLK1# (13)
M_B_CLK0 (13)
M_B_CLK1 (13)
M_B_CKE0 (13)
M_B_CKE1 (13)
M_B_CS#0 (13)
M_B_CS#1 (13)
M_B_ODT0_DIMM (13)
M_B_ODT1_DIMM (13)
M_B_BS#2 (13)
M_B_CAS# (13)
M_B_WE# (13)
M_B_RAS# (13)
M_B_BS#0 (13)
M_B_BS#1 (13)
M_B_DQS#0 (13)
M_B_DQS0 (13)
M_B_DQS#1 (13)
M_B_DQS1 (13)
M_B_DQS#2 (13)
M_B_DQS2 (13)
M_B_DQS#3 (13)
M_B_DQS3 (13)
M_B_DQS#4 (13)
M_B_DQS4 (13)
M_B_DQS#5 (13)
M_B_DQS5 (13)
M_B_DQS#6 (13)
M_B_DQS6 (13)
M_B_DQS#7 (13)
M_B_DQS7 (13)
%&'()*+(,
TP18
M_B_A[15:0] (13)
DRAMRST
+1.35VSUS
A A
CPU DRAM
CPU_DRAMRST#
5
4
3
12
R679
470_4
R670 *short_4
12
C750
*0.1u/16V_4
DDR3_DRAMRST# (12 ,13)
2
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
PROJECT :
Skylake 2/3 (DDR3 I/F)
Skylake 2/3 (DDR3 I/F)
Skylake 2/3 (DDR3 I/F)
R685120/F_4
R67880.6/F_4
R681100/F_4
ZRW
ZRW
ZRW
3A
3A
348
348
1
348
3A
5
4
3
2
1
SKL ULT (SIDEBAND ) GPIO
H_PECI (50ohm)
Route on microstrip only
Spacing >18 mils
Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
Touch PAD
Touch Screen
R196*IV@10K_4
R256*100K_4
R199*10K_4
UMA boot
GPU boot
+3V
Trace Length: 1~11.25 inches
UART2 for RMT
HDA
PCH_AZ_CODEC_SYNC(24)
PCH_AZ_CODEC_BITCLK(24)
PCH_AZ_CODEC_SDOUT(24)
PCH_AZ_CODEC_SDIN0(24)
PCH_AZ_CODEC_RST#(24)
Reserve connect to DMI C (acer request 1/14)
SPKR
R624 *20K_4
D D
+3V_S5
I2C0_SDA
R1672.2K_4
I2C0_SCL
R1662.2K_4
I2C1_SDA
R165*2.2K_4
I2C1_SCL
R169*2.2K_4
PU 2.2K for touch pad I2C bus(400 KHz)
+3V
+3V
DGPU_PW_CTRL#
C C
high
low
DGPU_PW_CTRL#(2)
R127 EV@100K_4
GPU Control PU/PD
R220*EV@10K_4
R257*10K_4
R204*10K_4
20131015 For GC6 NV DG GC6_FB_EN PD.1A-1
R208 10K_4
UMA Only
GPU power is control by PCH
GPIO (Discrete, SG or Optimize)
DGPU_PW_CTRL#
DGPU_PWROK
VGPU_EN
DGPU_PWR_EN
GC6_FB_EN
DGPU_HOLD_RST#
R115 IV@1K_4
DGPU_PWROK PD on GPU side
Setup
DGPU_PW_CTRL#
UMA Only
SG/Optimise
VGA H/W
Menu
Signal
UMA
1
0
Hidden
Hidden
GPU
545659-103
Add GPU Power Con trol Siganls
Touch PAD
Touch Screen
DMIC_CLK0_L(24)
DMIC_DATA0_L(24)
DGPU_HOLD_RST#(14)
DGPU_PWR_EN(42)
DGPU_PWROK(16)
GC6_FB_EN(15,17)
DGPU_EVENT#(17)
C739
*10p/50V_4
ODD_PRSNT#(25)
VGPU_EN(41)
ACCEL_INTA(27)
TP_INT_PCH(21)
I2C0_SDA(27)
I2C0_SCL(27)
I2C1_SDA(21)
I2C1_SCL(21)
C742 *10p/50V_4
R667 33_4
R644 33_4
R645 33_4
R660 33_4R110 *10K_4
R769 *33_4
R770 *33_4
Strapping
SPKR(24)
TPD_INT#_D
UART2_RXD
UART2_TXD
UART2_RTS#
UART2_CTS#
I2C0_SDA
I2C0_SCL
I2C1_SDA
I2C1_SCL
HDA_SYNC_R
HDA_BCLK_R
HDA_SDO_R
HDA_RST#_R
DMIC_CLK0_R
DMIC_DATA0_R
SPKR
GSPI0_MOSI
GSPI1_MOSI
Skylake-U Strapping Table
Pin Name Strap description
GPP_B14 (SPKR)
B B
GPP_B18
(GSPI0_MOSI)
GPP_C2
(SMBALERT#)
GPP_B22
(GSPI1_MOSI)
GPP_C5
(SML0ALERT#)
SPI0_MOSI
SPI0_MISO
GPP_B23
(SML1ALERT#
/PCHHOT#)
SPI0_IO2
A A
SPI0_IO3
HDA_SDO /
I2S_TXD0
GPP_E19
(DDPB_CTRLDATA)
GPP_E21
(DDPC_CTRLDATA)
Top-Block Swap override PCH_PWROK
No reboot PCH_PWROK
TLS Confidentiality
Boot BIOS Strap Bit (BBS)
eSPI or LPC
Reserved
Reserved
Reserved
Reserved
Reserved
Flash Descriptor Security
Override / Intel ME Debug Mode
Display Port B Det ected
Display Port C Detec ted
5
Sampled
RSMRST#
PCH_PWROK
RSMRST#
RSMRST#
RSMRST#
RSMRST#
RSMRST#
RSMRST#
PCH_PWROK
PCH_PWROK
PCH_PWROK
Configuration note
0 = *Disable T op Swap (iPD 20K)
1 = Enable Top Swap Mode
0 = *Disable No Reboot (iPD 20K)
1 = Enable No Reboot Mode
0 = *Disable I ntel ME Cryp to TLS(iPD 20K)
1 = Enable Int el ME Cryp to T LS
0 = *SPI (iP D 20K)
1 = LPC
0 = *LPC is sel ected for EC (iPD 20K)
1 = eSPI select ed for EC
+3V
+3V
+3V_S5
+3V
+3V_S5
(iPU 15 ~ 40K)
(iPU 15 ~ 40K)
(iPD 20K)
(iPU 15 ~ 40K)
(iPU 15 ~ 40K)
0 = *Enable secu rity in the Flash
Description (iPD 20K)
1 = Disable Fl ash Descriptor Securi ty (Override)
0 = *Port B i s not detected ( iPD 20K)
1 =Port B i s detected
0 = *Port C i s not detected ( iPD 20K)
1 =Port C is det ected
4
R625 *1K_4
R619 *1K_4
R160 *10K_4
R207 *1K_4
change location to near CPU to prevent impact HDA_SDO signal
HDA_SDO_R
AN8
AP7
AP8
AR7
AM5
AN7
AP5
AN5
AB1
AB2
W4
AB3
AD1
AD2
AD3
AD4
U7
U6
U8
U9
AH9
AH10
AH11
AH12
AF11
AF12
BA22
AY22
BB22
BA21
AY21
AW22
J5
AY20
AW20
AK7
AK6
AK9
AK10
H5
D7
D8
C8
AW5
R586 *1K_4
R737 1K_4
U35F
LPSS ISH
GPP_B15/GSPI0_CS#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA
GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
SKL_ULT/BGA
REV = 1
U35G
AUDIO
HDA_SYNC/I2S0_SFRM
HDA_BLK/I2S0_SCLK
HDA_SDO/I2S0_TXD
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
GPP_D23/I2S_MCLK
I2S1_SFR M
I2S1_TX D
GPP_F1/I2S2_SFRM
GPP_F0/I2S2_SCLK
GPP_F2/I2S2_TXD
GPP_F3/I2S2_RXD
GPP_D19/DMIC_CLK0
GPP_D20/DMIC_DATA0
GPP_D17/DMIC_CLK1
GPP_D18/DMIC_DATA1
+3V_S5
GPP_B14/SPKR
SKL_ULT/BGA
REV = 1
SPKR
GSPI0_MOSI
GSPI1_MOSI
3
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+3V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
ME_WR# (29)
SKL_ULT
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
SKL_ULT
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
7 OF 20
SMBALERT# (7)
SML0ALERT# (7)
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+1.8V_S5
+1.8V_S5
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
6 OF 20
SDIO/SDXC
SD GPI
SD GPI
SD GPI
SD GPI
SD GPI
SD GPI
SD GPI
SD GPI
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
+1.8V_S5
?
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
GPP_D9
GPP_D10
GPP_D11
GPP_D12
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
?
R174200/F_4
Touchpad INT
2
Reserve UART FFC conn ector for Win 7 debug
UART2_RXD
R275 *49.9K/F_4
UART2_TXD
R280 *49.9K/F_4
UART2_RTS#
R283 *49.9K/F_4
UART2_CTS#
R290 *49.9K/F_4
+5V
CN3
UART2_RXD
UART2_TXD
UART2_RTS#
UART2_CTS#
TPD_INT#_D
S5 S5
TPD_INT#(27,29)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
1
2
3
7
4 8
5
6
*UART Function
+3V_S5
R177TDI@100K_4
+3V
2
1
Skylake 6/7 (PEG/DMI/FDI)
Skylake 6/7 (PEG/DMI/FDI)
Skylake 6/7 (PEG/DMI/FDI)
3
Q20
TDI@2N7002K
R164 *0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
!7
+3V_S5
TPD_INT#_D
ZRW
ZRW
ZRW
448
448
448
3A
3A
3A
5
Backside cap
C184
1U/6.3V_2
C243
22u/6.3V_6
C233
22u/6.3V_6
C226
22u/6.3V_6
C203
22u/6.3V_6
C219
22u/6.3V_6
C224
22u/6.3V_6
C236
22u/6.3V_6
Backside cap
C214
C245
C676
1U/6.3V_2
1U/6.3V_2
D D
C282
C272
C273
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
10u/6.3V_4
C289
22u/6.3V_6
10u/6.3V_4
Backside cap
C259
10u/6.3V_4
C189
1U/6.3V_2
C647
10u/6.3V_4
C252
1U/6.3V_2
C651
10u/6.3V_4
Backside cap
C212
C196
1U/6.3V_2
1U/6.3V_2
C181
C228
1U/6.3V_2
1U/6.3V_2
+VCCEOPIO
C708
GT3@10u/6.3V_4
+1.8V_PRIM
GT3@10u/6.3V_4
C C
B B
A A
C687
R565
C709
GT3@10u/6.3V_4
Backside cap
C686
GT3@10u/6.3V_4
GT3@0_6
5
Backside cap
+1.8V_PRIM+1.8V_S5
C201
1U/6.3V_2
Backside cap
C269
1U/6.3V_2
For 2+3e CPU
For 2+3e CPU
C186
10u/6.3V_4
C197
1U/6.3V_2
C262
1U/6.3V_2
C237
1U/6.3V_2
C185
10u/6.3V_4
C194
1U/6.3V_2
C215
1U/6.3V_2
C209
1U/6.3V_2
C682
GT3@10u/6.3V_4
C155
10u/6.3V_4
C193
1U/6.3V_2
+1.35VSUS
Backside cap
+1V_SUS
C227
C246
1U/6.3V_2
1U/6.3V_2
C285
1U/6.3V_2
Backside cap
C688
GT3@1U/6.3V_2
Backside cap
C158
C232
10u/6.3V_4
10u/6.3V_4
Backside cap
C241
C188
1U/6.3V_2
1U/6.3V_2
C318
10u/6.3V_4
C326
10u/6.3V_4
R194 *short_4
1 2
Rev:F change to Shortpad
+VCCIO
Rev:F change to Shortpad
+1V_SUS
Rev:F change to Shortpad
4
C255
C251
22u/6.3V_6
22u/6.3V_6
C657
C257
10u/6.3V_4
10u/6.3V_4
C235
C222
1U/6.3V_2
1U/6.3V_2
C200
1U/6.3V_2
100 ohm near CPU
1.0V_CPU 3A
C681
C684
GT3@1U/6.3V_2
GT3@1U/6.3V_2
For 2+3e CPU
C218
10u/6.3V_4
C240
1U/6.3V_2
Backside cap
C313
C328
1U/6.3V_2
10u/6.3V_4
Primary side cap
C323
10u/6.3V_4
+VDDQC
C299
1U/6.3V_2
R550 *shor t_6
Primary side cap
R135 *shor t_6
R112 *shor t_6
4
+VCCCORE
+1.8V_PRIM
+VCCOPC
+VCCOPC_SRC(33)
681_AGND(33)
For 2+3e CPU
+VCCOPC_SRC
681_AGND
+VCCOPC
C685
C683
GT3@1U/6.3V_2
GT3@1U/6.3V_2
C161
C151
10u/6.3V_4
10u/6.3V_4
C198
C239
1U/6.3V_2
1U/6.3V_2
100 ohm Near CPU
VCCGT_SEN SE(36)
VSSGT_SE NSE(36)
C311
C308
1U/6.3V_2
1U/6.3V_2
C325
C327
10u/6.3V_4
10u/6.3V_4
+1V_VCCST
C286
10u/6.3V_4
C677
1U/6.3V_4
Backside cap
Primary side cap
+VCCOPC
For 2+3e CPU
+1.8V_PRIM
C689
GT3@1U/6.3V_2
+VCCGT
C223
10u/6.3V_4
C204
1U/6.3V_2
C205
1U/6.3V_2
R155
100/F_4
R161
100/F_4
C312
1U/6.3V_2
+VCCSTG
TP12
TP20
R172 GT3@100/F_4
R634 GT3@0_4
R636 GT3@0_4
R176 GT3@100/F_4
+VCCEOPIO
R633 GT3@0_4
R632 GT3@0_4
C148
10u/6.3V_4
C206
1U/6.3V_2
C195
1U/6.3V_2
+VCCGT
+1.35VSUS
C176
1U/6.3V_4
+VCCPLL
C172
1U/6.3V_4
A30
A34
A39
A44
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
G30
K32
AK32
AB62
P62
V62
H63
G61
AC63
AE63
AE62
AG62
AL63
AJ62
A48
A53
A58
A62
A66
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
REV = 1
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
A18
A22
AL23
K20
K21
U35L
VCC_A30
S0
VCC_A34
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
S0
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
SKL_ULT/BGA
REV = 1
SKL_ULT
U35M
CPU POWER 2 OF 4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
S0
VCCGT
0.55~1.5V
VCCGT
VCCGT
VCCGT
VCCGT
2+3e peak 6A
VCCGT
2+3e TPY 4A
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
SKL_ULT/BGA
U35N
SKL_ULT
CPU POWER 3 OF 4
S3
DDR3L
VDDQ_AU23
VDDQ_AU28
1.35V
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
VCCST
S3
1.0V
VCCSTG_A22
S0
VCCPLL_OC
S0
1.0V
VCCPLL_K20
VCCPLL_K21
S3
1.0V
SKL_ULT/BGA
3
?
SKL_ULT
CPU POWER 1 OF 4
VCC
0.55V~1.5V
2+2 peak 24A
2+2 TPY 17A
2+3e peak 24A
2+3e TPY 17A
1.0V
S0
Sx
1.8V
GT3 CPU
1.0V
?
VCCGT
S0
0.55~1.5V
2+2 peak 31A
2+2 TPY 15A
2+3e peak 56A
2+3e TPY 17A
VCCGTX
2+2 X
13 OF 20
?
S0
0.85V/0.95V
2A
S0
1.15V
2+2 peak 5A
2+2 TPY 4A
2+3e peak 5.1A
2+3e TPY 5A
120mA
40mA
1.0V
260mA
120mA
14 OF 20
3
3A
50mA
3A
12 OF 20
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
VCCIO
3.0A
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
REV = 1
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
?
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
?
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
?
+VCCGT
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
R109 100/F_4
R122 100/F_4
100 ohm near CPU
+VCCCORE
C174
1U/6.3V_4
C199
47u/6.3V_8
C693
22u/6.3V_6
C692
22u/6.3V_6
+VCCGT
C303
GT3@22u/6.3V_6
C291
GT3@10u/6.3V_4
TP86
TP87
TP17
TP14
VSASS_SEN SE (36)
VSA_SENSE (36)
+VCCSA
C666
47u/6.3V_8
C679
10u/6.3V_4C258
R96 100/ F_4
R98 100/ F_4
+VCCSTG
C190
47u/6.3V_8
C705
22u/6.3V_6
C704
22u/6.3V_6
C310
GT3@22u/6.3V_6
C279
GT3@10u/6.3V_4
+VCCIO
+VCCSA
2
Primary side cap
C645
C144
47u/6.3V_8
47u/6.3V_8
Primary side cap
C667
C674
10u/6.3V_4
10u/6.3V_4
+VCCCORE
100 ohm Near CPU
VCORE_SE NSE (36)
VCORESS_ SENSE (36)
H_CPU_SVIDART#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
Primary side cap
C702
47u/6.3V_8
Primary side cap
C706
C178
22u/6.3V_6
22u/6.3V_6
Primary side cap
C202
C694
47u/6.3V_6
22u/6.3V_6
E3A C202 change to 47u/6.3v_6
Primary side cap
C277
C302
22u/6.3V_6
GT3@22u/6.3V_6
REV:F Stuff C277,C274,C275
For 2+3e CPU
Backside cap
C324
C281
GT3@10u/6.3V_4
GT3@10u/6.3V_4
Backside cap
C283
C284
10u/6.3V_4
10u/6.3V_4
Primary side cap
C701
C710
1U/6.3V_4
1U/6.3V_4
Backside cap
C254
C238
10u/6.3V_4
10u/6.3V_4
Backside cap
C207
C278
1U/6.3V_2
1U/6.3V_2
Primary side cap
C114
C643
10u/6.3V_4
10u/6.3V_4
2
C650
47u/6.3V_8
C664
10u/6.3V_4
C171
22u/6.3V_6
C691
22u/6.3V_6
C307
GT3@22u/6.3V_6
C316
GT3@10u/6.3V_4
C266
1U/6.3V_2
C700
1U/6.3V_4
C247
10u/6.3V_4
C216
1U/6.3V_2
C641
10u/6.3V_4
C690
47u/6.3V_8
C659
47u/6.3V_8
C673
10u/6.3V_4
C707
22u/6.3V_6
C703
22u/6.3V_6
C274
22u/6.3V_6
C280
GT3@10u/6.3V_4
Imax 3(A)
C297
1U/6.3V_2
C711
1U/6.3V_4
C229
10u/6.3V_4
C242
1U/6.3V_2
C165
10u/6.3V_4
C150
47u/6.3V_8
C663
C675
10u/6.3V_4
10u/6.3V_4
+1V_VCCST
SVID
R138
100/F_4
H_CPU_SVIDDAT
Place PU resistor
close to CPU
Place PU resistor
close to CPU
H_CPU_SVIDART#
R552 220_4
H_CPU_SVIDCLK
C697
C248
47u/6.3V_8
47u/6.3V_8
C210
47u/6.3V_6
E3A C210 change to 47u/6.3v_6
C275
C276
22u/6.3V_6
GT3@22u/6.3V_6
C317
C290
GT3@10u/6.3V_4
GT3@10u/6.3V_4
C264
C298
1U/6.3V_2
1U/6.3V_2
C263
C221
10u/6.3V_4
10u/6.3V_4
C267
C260
1U/6.3V_2
1U/6.3V_2
C642
C157
10u/6.3V_4
10u/6.3V_4
1
C678
10u/6.3V_4
Layout note: need routing together
and ALERT need between CLK and DATA.
C814
1000P/50V_4
+1V_VCCST
C696
47u/6.3V_8
C288
10u/6.3V_4
C249
1U/6.3V_2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C816
C815
*1000P/50V_4
*1000P/50V_4
REV:F add 1000p
R134
54.9/F_4
Skylake 12/13/1 4 (POWER)
Skylake 12/13/1 4 (POWER)
Skylake 12/13/1 4 (POWER)
Monday , J uly 20, 201 5
Monday , J uly 20, 201 5
Monday , J uly 20, 201 5
C818
C817
*1000P/50V_4
*1000P/50V_4
H_CPU_SVIDDAT (36)
VR_SVID_ALE RT#_VCOR E (36)
H_CPU_SVIDCLK (36)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
!8
C819
*1000P/50V_4
ZRW
ZRW
ZRW
548
548
548
3A
3A
3A
5
4
3
2
1
Skylake ULT (GPU, SATA , ODD, CLK ,USB2&3)
?
U35H
PCIE/USB3/SATA
PEG_RX#0(14)
PEG_RX0(14)
D D
dGPU PEG*4
LAN
WIFI
C C
B B
PEG_TX#0(14)
PEG_TX0(14)
PEG_RX#1(14)
PEG_RX1(14)
PEG_TX#1(14)
PEG_TX1(14)
PEG_RX#2(14)
PEG_RX2(14)
PEG_TX#2(14)
PEG_TX2(14)
PEG_RX#3(14)
PEG_RX3(14)
PEG_TX#3(14)
PEG_TX3(14)
PCIE_RX5-_LAN(23)
PCIE_RX5+_LAN(23)
PCIE_TX5-_LAN(23)
PCIE_TX5+_LAN(23)
PCIE_RX6-_WLAN(26)
PCIE_RX6+_WLAN(26)
PCIE_TX6-_WLAN(26)
PCIE_TX6+_WLAN(26)
CLK_PCIE_VGA#(14)
CLK_PCIE_VGA(14)
CLK_PEGA_REQ#(14)
N16S VGALANWLAN
CLK_PCIE_LANN(23)
CLK_PCIE_LANP(23)
CLK_PCIE_LAN_REQ#(23)
CLK_PCIE_WLANN(26)
CLK_PCIE_WLANP(26)
PCIE_CLKREQ_WLAN#(26)
HDD
ODD
C653 EV@0.22u/10V_4
C652 EV@0.22u/10V_4
C656 EV@0.22u/10V_4
C655 EV@0.22u/10V_4
C661 EV@0.22u/10V_4
C662 EV@0.22u/10V_4
C654 EV@0.22u/10V_4
C660 EV@0.22u/10V_4
C668 0.1u/16V_4
C669 0.1u/16V_4
C648 0.1u/16V_4
C649 0.1u/16V_4
SATA_RXN0(25)
SATA_RXP0(25)
SATA_TXN0(25)
SATA_TXP0(25)
SATA_RXN1(25)
SATA_RXP1(25)
SATA_TXN1(25)
SATA_TXP1(25)
R562 100/F_4
TP91
TP92
R235
*short_4
TP22
TP25
TP73
R229
*short_4
R224
*short_4
XDP_PRDY#
XDP_PREQ#
PIRQA#
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
Rev:D change to shortpad
A A
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
R234 10K_4
R215 10K_4
R227 10K_4
R618 10K_4
R228 10K_4
R223 10K_4
+3V
C_PEG_TX#0
C_PEG_TX0
C_PEG_TX#1
C_PEG_TX1
C_PEG_TX#2
C_PEG_TX2
C_PEG_TX#3
C_PEG_TX3
PCIE_TX5ÂPCIE_TX5+
PCIE_TX6ÂPCIE_TX6+
PCIE_RCOMPN
PCIE_RCOMPP
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_T XN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_T XN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_T XN
A21
PCIE7_TXP/SATA0_T XP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_T XN
C21
PCIE8_TXP/SATA1A_T XP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_T XN
C24
PCIE11_TXP/SATA1B_T XP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_T XN
B25
PCIE12_TXP/SATA2_T XP
SKL_ULT/BGA
REV = 1
U35J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKL_ULT/BGA
REV = 1
+3V_S5
5
4
SKL_ULT
SSIC / USB3
USB2
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
+3V_S5
GPP_E2/SATAXPCIE2/SATAGP2
+3V_S5
+3V_S5
8 OF 20
?
SKL_ULT
CLOCK SIGNALS
+3V_S5
CLKOUT_ITPXDP_N
+3V_S5
+3V_S5
+3V_S5
+3V_S5
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XCLK_BIASREF
+3V_S5
+3V_S5
10 OF 20
Rev:D add for EC reset RTC
EC_RTCRST(29)
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2_COMP
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
?
F43
E43
BA17
E37
XTAL24_IN
E35
XTAL24_OUT
E42
AM18
RTCX1
AM20
RTCX2
AN18
SRTCRST#
AM16
RTCRST#
?
2
R786
100K_4
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
USB2N_1
AB10
USB2P_1
AD6
USB2N_2
AD7
USB2P_2
AH3
USB2N_3
AJ3
USB2P_3
AD9
USB2N_4
AD10
USB2P_4
AJ1
USB2N_5
AJ2
USB2P_5
AF6
USB2N_6
AF7
USB2P_6
AH1
USB2N_7
AH2
USB2P_7
AF8
USB2N_8
AF9
USB2P_8
AG1
USB2N_9
AG2
USB2P_9
AH7
USB2N_10
AH8
USB2P_10
AB6
AG3
USB2_ID
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
CLK_PCIE_XDPN
CLK_PCIE_XDPP
SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTC_X1
RTC_X2
SRTC_RST#
RTC_RST#
SRTC_RST#
3
PQ6059
*2N7002K
1
Rev:E Reserve o nly Rev:E Reser ve only
USB3_RXN0 (28)
USB3_RXP0 (28)
USB3_TXN0 (28)
USB3_TXP0 (28)
USB3_RXN1 (28)
USB3_RXP1 (28)
USB3_TXN1 (28)
USB3_TXP1 (28)
USBP0- (28)
USBP0+ (28)
USBP1- (28)
USBP1+ (28)
USBP3- (28)
USBP3+ (28)
USBP4- (26)
USBP4+ (26)
USBP5- (21)
USBP5+ (21)
USBP6- (21)
USBP6+ (21)
USBP7- (28)
USBP7+ (28)
USBCOMP
R178 113/F_4
USB2_ID
R587 1K_4
R778 1K_4
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
SATA_DEVSLP0
SATA_DEVSLP1
SATA_DEVSLP2
SATAGP0
SATAGP1
SATAGP2
TP93
TP94
SUSCLK (26)
R512 2.7K/F_4
R768 *60.4/F_4
RTC_RST# (11)
1V power plane
0.71 checklist p14
3
1A-1
USB_OC0# (28)
USB_OC1# (28)
USB_OC2# (28)
DEVSLP0 (25)
EC_RTCRST
MB USB3.0 CN16 ( Charger IC ) Down
MB USB3.0 CN13 -> Up
MB USB3.0 CN16 ( Charger IC ) Down
MB USB3.0 CN13 -> Up
DB USB2.0
BT
Touch Screen
CCD
Card reader
USBCOMP
Impedance = 50 ohm
Trace length < 500 m ils
Trace spacing = 15 m ils
MB U3
MB U3
DB U2
+1V_S5
Reserve PD 60 ohm in E42
ball for Cannonlake U
RTC_RST#
3
2
PQ6060
*2N7002K
1
Add SSD ID 1/1 4
Hight is SSD , Low is ODD
SSD_ID(25)
Skylake-U userd 24 MHz (50 Ohm ESR) XTAL
XTAL24_IN
XTAL24_OUT
Note: Change Y4 to 38.4 MHz(ESR 30 ohm) for Cannonlake U
RTC Clock 32.768KHz (RTC)
Trace length < 1000 mils
RTC Circuitry (RTC)
+3VPCU
On SKL voltage at VCCRTC does not exceed 3.2V
R304
1.5K/F_4
VCCRTC_2
R301
45.3K/F_4
2013/10/16 Chage +3V_RTC_0 to VCCTC_2.
1A-2
1. AHL03003057 DBV CR2032
2. AHL03003003 VDE CR2032
2
PCH PU/PD
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
SATA_DEVSLP0
SATA_DEVSLP1
SATA_DEVSLP2
PIRQA#
SATAGP1
SATAGP2
R568 10K_4
C351 6.8p/50V_4
C362 6.8p/50V_4
1B-1
R308 1K_4
12
BT1
BAT_CONN
SATAGP0
C665 10P/50V_4
4
3
Y4
R536
24MHz
1M_4
1
2
C658 10P/50V_4
12
Y2
32.768KHZ
D7
+3V_RTC_2
+3V_RTC_1
+3V_RTC_[0:2]
Trace width = 20 m ils
BAT54C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
+3V_S5
R541 10K_4
R540 10K_4
R543 10K_4
R542 10K_4
R573 *10K_4
R574 *10K_4
R575 *10K_4
R631 *10K_4
R569 *10K_4
R566 *10K_4
+3V_S5
R570 100K_4
CH01006JB08 -> 10p
CH01506JB06 -> 15p
CH-6806TB01 -> 6.8p
RTC_X1
R255
10M_4
RTC_X2
+3V_RTC
+3V_RTC
Trace width = 30 m ils
R299
20K/F_4
R300
20K/F_4
C381
1u/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Skylake 9/10 (PEG/USB/CLK)
Skylake 9/10 (PEG/USB/CLK)
Skylake 9/10 (PEG/USB/CLK)
!9
+3V
24MHz: BG624000078
38.4MHz : ?
BG332768453 - > SEG
BG332768104 - > TXC
12
C380
1u/6.3V_4
C382
1u/6.3V_4
ZRW
ZRW
ZRW
1
RTC_RST#
J1
*JUMP
SRTC_RST#
3A
3A
648
648
648
3A
5
4
3
2
1
?
U35E
SPI - FLASH
EC_RCIN#
PCH_SPI_CS0#
PCH_SPI_CS1#
AV2
SPI0_CLK
AW3
SPI0_MISO
AV3
SPI0_MOSI
AW2
SPI0_IO2
AU4
SPI0_IO3
AU3
SPI0_CS0#
AU2
SPI0_CS1#
AU1
SPI0_CS2#
SPI - TOUCH
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
C LINK
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
AW13
GPP_A0/RCIN#
AY11
GPP_A6/SERIRQ
SKL_ULT/BGA
REV = 1
PCH_SPI_SO
PCH_SPI_SO_EC
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
only 0ohm option
1A-13
+3V_S5
+3V_S5
+3V_PCH_ME
PCH_SPI_CLK
PCH_SPI_SO
PCH_SPI_SI
PCH_SPI_IO2
D D
For M.2 wifi module must
Rev:D change to shortpad
C C
SPI ROM
Skylake
3.3V
B B
Vender Size Quanta P/N Vender P/N
8M
8M
PCH_SPI_CLK_EC(29)
PCH_SPI_SI_EC(29)
PCH_SPI_SO_EC(29)
SPI_CS0#_UR_ME(29)
SIO_RCIN#(29)
IRQ_S ERIRQ(25,29)
AKE3EFP0N07
AKE2EZN0Q00
+3V_PCH_ME
PCH_SPI_IO3
PCH_SPI_CS0#
PCH_SPI_CS1# SML0ALERT#
CL_CLK
TP68
CL_DAT
TP66
CL_RST#
TP67
R652 *short_4
IRQ_S ERIRQ
W25Q64FVSSIQWND
GD25B64CSIGRGGD
R689 *4M@33_4
R641 *4M@33_4
R594 *4M@33_4
R602 8M@0_4
R603 *4M@0_4
R591 10K_4
SPI_CS0#_UR_ME
SKL_ULT
+3V_S5
LPC
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
5 OF 20
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
PCH SPI ROM(8M+4M)
15ohm CS01502JB12
33ohm CS03302JB29
PCH_SPI_CS0#
R588 8M@15_4
3.3K is original and for no
support fast read function
PCH_SPI_CS1#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
C745 *22p/50V_4
R649 1K_4
R669 *4M@33_4
R658 *4M@33_4
R604 *4M@33_4
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
+3V_PCH_ME
SPI_SO_8M
SMBUS, SMLINK
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
GPP_A14/SUS_STAT#/ ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESP I_CLK
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI _IO0
GPP_A2/LAD1/ESPI _IO1
GPP_A3/LAD2/ESPI _IO2
GPP_A4/LAD3/ESPI _IO3
GPP_A5/LFRAME#/ESPI _CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
Rev:D change to shortpad
R700 *short_6
+3V_S5
U41
1
CS#
2
IO3/HOLD#
IO1/DO
3
4
W25Q64FV -- 8MB
SPI_WP_IO2_ME
PCH_SPI_IO2
PCH_SPI_IO3
R597 *1K_4
IO2/WP#
GND
IO0/DI
PCH_SPI_CLK_EC
PCH_SPI_SI_EC
R596 *4M@33_4
R589 8M4M@15_4
R238 *4M@33_4
R239 8M4M@15_4
U39
1
CE#
6
SCK
5
SI
2
SO
3
WP#
*4M@ROM-4M_EC
SPI_WP_IO2_EC
R7
PCH_MBCLK0_R
R8
PCH_MBDAT0_R
R10
SMBALERT#
R9
VGA_MBC LK
W2
VGA_MBD ATA
W1
W3
SMB_ME1_CLK
V3
SMB_ME1_DAT
AM7
SML1ALERT#
eSPI change to 15 ohm
AY13
R659 *short_4
BA13
R640 *short_4
BB13
R653 *short_4
AY12
R668 *short_4
BA12
BA11
R748 *0_4
C806 0.1u/16V_4
eSPI change to 15 ohm
AW9
R623 22/J_4
AY9
AW11
R626 22/J_4
R627 22/J_4
CLKRUN#
2/10 add C806 for EMI request ,
?
R748 no stuiff from EC site
move at CPU site
+3V_PCH_ME
8
VCC
7
SPI_HOLD_IO3_ME
6
SPI_CLK_8M
CLK
5
SPI_SI_8M
R687 8M@15_4
R654 8M@15_4
SPI_HOLD_IO3_ME
8
VDD
7
SPI_HOLD_IO3_EC
HOLD#
4
VSS
Rev:D change to shortpad
R698 1K_4R650 8M4M@15_4
R684 8M4M@15_4
R691 8M4M@15_4
SPI_WP_IO2_EC
SPI_WP_IO2_ME
SPI_HOLD_IO3_EC
R232 *1K_4
C741
*4M@0.1u/16V_4
Strapping
SMBALERT# (4)
SML0ALERT# (4)
SMB1ALERT# (27)
ckl v0.71 p.24
LPC_LAD0 (25,26,29)
LPC_LAD1 (25,26,29)
LPC_LAD2 (25,26,29)
LPC_LAD3 (25,26,29)
LPC_LFRAME# (25,26,29)
ESPI_RST# (29)
CLK_PCI_EC (29)
PCLK_TPM (25)
CLK_PCI_LPC (26)
CLKRUN# (25,29)
+3V_PCH_ME
C754 0.1u/16V_4
PCH_SPI_CLK
PCH_SPI_SI
C747
*22p/50V_4
reserve for SPI fast read
+3V_PCH_ME
CLKRUN#
IRQ_S ERIRQ
EC_RCIN#
R630 8.2K/F_4
R629 10K_4
R639 10K_4
SMBus
PCH_MBCLK0_R
PCH_MBDAT0_R
VGA_MBD ATA
VGA_MBC LK
SML1ALERT#
Termination Resistor Requirement for PCH PCHHOT# Pin
Reserve PU 150K resister
+3V
S5 S0
SMBus(PCH)
PCH_MBDAT0_R
PCH_MBCLK0_R
PCH_XDP_WLAN/S5 DDR_TP/S0
R5782.2K_4
R5802.2K_4
R5852.2K_4
R5822.2K_4
R205*150K_4
D2B change to 2.2k
R576
2.2K_4
Q32
5
2
6
43
1
2N7002DW
SMBus(EC)
2ND_MBCLK(17,29)
2ND_MBDATA(17,29)
EC/S5
2ND_MBCLK
2ND_MBDATA
R171 *short_4
R175 *short_4
Rev:D change to shortpad
+3V
+3V_S5
+3V_S5
!:
R572
2.2K_4
CLK_SDATA (12,13,27)
CLK_SCLK (12,13,27)
SMB_ME1_CLK
SMB_ME1_DAT
1A-3 2013/10/16 Add U34 flash 4M ROM reserve for ZQ0D.
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
4
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
3
2
Monday, July 20, 2015
PROJECT :
Skylake 5 (SATA/HDA/SPI)
Skylake 5 (SATA/HDA/SPI)
Skylake 5 (SATA/HDA/SPI)
ZRW
ZRW
ZRW
748
748
1
748
3A
3A
3A
5
4
3
2
1
PCI_PLTRST#
SYS_RESET#(11)
+VCCIO
11/12 Reserve PU 10K
R544 *10K_4
D D
Rev:D change to shortpad
PROC_PWRGD
Rev:D change to shortpad
Board ID
C1D
2
1
RAM_ID1
RAM_ID2
RAM_ID3
Board_ID0
Board_ID1
Board_ID2
Board_ID3
Board_ID4
Board_ID5
Board_ID6
Board_ID7
?@AB
IOACNon IOAC
G-sensor No G-sensor
TPM
touch panel
+3V
C332 0.1u/16V_4
U14
3 5
TC7SH08FU
<+'&%=>%!
R610 10K_4
R612 10K_4
R614 10K_4
R595 10K_4
R598 10K_4
R605 10K_4
R592 10K_4
R606 10K_4
R764 10K_4
R766 10K_4
VRAM 2GB VRAM 4GB
C C
<+'&%=>%"
<+'&%=>%#
<+'&%=>%$
<+'&%=>%7
B B
No TPM
No touch panel
PLTRST# Buffer
A A
PCI_PLTRST#
RSMRST#(29)
SYS_PWROK
R556 *short_4
R643 *0_4
PCH_SUSPWRACK_R(29)
PCH_SUSACK#(29)
PCIE_LAN_WAKE#(23,26)
+1.8V_S5
R611 *10K_4
R613 *10K_4
R615 *10K_4
R600 *10K_4
R599 *10K_4
R608 *10K_4
R590 *10K_4
R593 10K_4
R607 *10K_4
R765 *10K_4
R767 *10K_4
<+'&%=>%8
<+'&%=>%9
<+'&%=>%: Reserve
4
R214
100K_4
Realtek
Audio codec
(Default)
Reserved
(Default)
PLTRST# (14,23,25,26,29)
R655 *short_4
R554 10K_4
VCCST_PWRGD
R622 *0_4
R617 *0_4
SYS_RESET#
PCH_RSMRST#
PCIE_LAN_WAKE#
?@ABC1D
CPU DSP
ReserveReserved
PROC_PWRGD
SYS_PWROK_R
EC_PWROK_R
DPWROK_R PCH_ACPRESENT
PCH_SUSPWRACK
SUSACK#_R
TP84
For platforms not supporting Deep
Sx, connect directly to RSMRST#
U35K
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWR GD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL_ULT/BGA
REV = 1
U35I
CSI-2
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
SKL_ULT/BGA
Power Sequence
PCH_PWROK(29)
SYSPWOK
SYSTEM POWER MANAGEMENT
I
I
REV = 1
SYS_PWROK
5
4
?
SKL_ULT
GPP_B12/SLP_S0#
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
SKL_ULT
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
+1.8V_S5
Rev:D change to shortpad
DPWROK_R PCH_RSMRST#
DPWROK_R
U8
*TC7SH08FU
+3V_S5
+3V_S5
+3V_S5
+3V_S5
GPD9/SLP_WLAN#
+3V_S5
+3V_S5
GPD1/ACPRESENT
+3V_S5
+3V_S5
+3V_S5
+3V_S5
GPP_B11/EXT_PWR_GATE#
+3V_S5
+3V_S5
11 OF 20
?
+3V_S5
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
9 OF 20
EMMC
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC_RCOMP
?
GPP_B2/VRALERT#
Non Deep Sx
R647 *short_4
EC_PWROK SYS_PWROK_R
R131 *0_4
No Deep Sx
+3V_S5
4
3 5
R113 *0_4
R560 *short_4
Rev:D change to shortpad
R661 *short_4
R674 *0_4
C168 *0.1u/16V_4
2
EC_PWROK
1
GPD10/SLP_S5#
GPD3/PWRBTN#
GPD0/BATLOW#
Rev:D change to shortpad
GPD4/SLP_S3#
GPD5/SLP_S4#
SLP_SUS#
SLP_LAN#
GPD6/SLP_A#
GPP_A11/PME#
INTRUD ER#
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
INTRUDER#
AM10
MPHY_EXT_PWR
AM11
PCH_VRALERT#
?
R145 100/F_4
RAM_ID1
RAM_ID2
RAM_ID3
Board_ID0
Board_ID1
Board_ID2
Board_ID3
Board_ID4
Board_ID5
Board_ID6
Board_ID7
R616200/F_4
EC_PWROK_R
DPWROK_C (29)
EC_PWROK (29)
IMVP_PWRGD_3V (2)
R130
*10K_4
3
SUSB#
SUSC#
PCH_SLP_S5#
PCH_SLP_SUS#
PCH_SLP_LAN#
PCH_SLP_WLAN#
PCH_SLP_A#
PCH_PWRBTN#
PCH_BATLOW#
R249 1M_4
TP19
TP63
Board_ID4 (21)
REV:E tPLT17(max
200us) ->SLP_S3#
assertion to IMVP
VR_ON(VRON) deassert ion
VRON(33, 36)
REV:F Stuff R792
TP29
SUS0# (29)
SUSB# (11,29,31)
SUSC# (11,29)
PCH_SLP_S5# (11)
PCH_SLP_SUS# (29)
TP30
Rev:D change to shortpad
TP23
R677*short_4
R676*short_4
U50
*TC7SH08FU
VCCST_PWRGD
TP74
+3V_RTC
4
R792 0_4
C136
*0.1u/16V_4
PCH_SLP_A# (11)
DNBSWON# (29)
ACPRESENT (29)
+3V_S5
C813 *0.1u/16V_4
2
1
3 5
+1V_VCCST
R89 60.4/F_4
Shortpad change
to 60.4 ohm. 11/6
VCCST_PWRGD_EN
REV:E tPLT15 (max 200us)
->SLP_S4# assertion to
VDDQ(+1.35VSUS) ram p
down start(SUSON)
REV:F Stuff R790
SUSB#
VRON_EC
CRB is via +1.05V PGVCCST PWRGD
+3V_S5
C164
R85
0.1u/16V_4
1K_4
VCCST_PWRGD_R
R103 *0_4
R102 0_4
2013/10/21 Del APWORK.1A-6
2
SUSON
SUSON(32,35)
VRON_EC (29)
U6
5
NC
VCC
A
4
GND
Y
74AUP1G07GW
PCH_PWROK
HWPG
Rev:D change netmane for HWPG
PCH_VRALERT#
SYS_RESET#
PCH_ACPRESENT
PCH_BATLOW#
PCIE_LAN_WAKE#
MPHY_EXT_PWR
PCH_RSMRST#
PCH_PWROK
SYS_PWROK_R
DPWROK_C
+3V_S5
C811 *0.1u/16V_4
4
U48
3 5
*TC7SH08FU
R790 0_4
REV:E tPLT18 (max 200 us)
->SLP_S3# assertion to
VCCIO VR(MAIND for +1V_S5
to +VCCIO) disabled
MAINON(35,40)
REV:F Stuff R791
B2A
S0->S5 & S0->S3
Power of sequence 1 us
SUSB# -> VCCST_PWRGD
1
2
VCCST_PWRGD_EN_L
3
HWPG (29)
!;
+3V
R211 10K_4
R561 10K_4
R651 8.2K/F_4
R628 8.2K/F_4
R250 10K_4
R195 *1K_4
R642 10K_4
R648 10K_4
R555 10K_4
R675 100K_4
2
SUSC#
1
SUSON_EC
4
U47
TC7SH08FU
R777 *0_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
+3V_S5
Rev:F add
SUSON_EC (29)
+3V_S5
C812 *0.1u/16V_4
2
4
U49
*TC7SH08FU
R791 0_4
+3V_S5
C808 0.1u/16V_4
2
1
VCCST_PWRGD_EN
3 5
Skylake 9/11 (PWROK/Board_ID)
Skylake 9/11 (PWROK/Board_ID)
Skylake 9/11 (PWROK/Board_ID)
SUSB#
1
MAINON_EC
3 5
SUSB#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
MAINON_EC (29)
ZRW
ZRW
ZRW
848
848
848
3A
3A
3A
5
4
3
2
1
U35S
E68
AL25
AL27
BA70
BA68
B67
D65
D67
E70
C68
D68
C67
G69
G68
H70
G71
H69
G70
E63
E66
E60
AY2
AY1
K46
K45
C71
B70
A52
G65
E61
F71
F70
F63
F66
E8
D1
D3
F60
J71
J68
F65
F61
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMOD E
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
REV = 1
D D
CFG4
R156 49.9/F_4
+1V_S5
C C
B B
CFG_RCOMP
R153 1.5K/F_4
RESERVED SIGNALS -1
SKL_ULT/BGA
SKL_ULT
?
19 OF 20
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
ZVM#
RSVD_TP_AW71
RSVD_TP_AW70
MSM#
PROC_SELECT#
BB68
BB69
AK13
AK12
BB2
BA3
AU5
TP5
AT5
TP6
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
TP4
A69
B69
AY3
D71
C70
C54
D54
AY4
TP1
BB3
TP2
AY71
AR56
AW71
AW70
AP56
C64
?
Rev:D change to shortpa d
Rev:F Remove Short Jumper for all +1V_S5
+1V_S5
TP95
Rev:F reserve TP
+1V_S5
Rev:F Stuff C699
+1V_S5
+1V_S5
+1V_S5
+1V_S5
+3VPCU
+3V_S5
+3V
+1.5V
+3V_S5
R759 *short_4
Rev:D change to
shortpad
R760 *short_4
R762 *GT3@0_4
R761 100K_4
+1V_S5
+3V_S5
+1V_S5
+1V_S5
+1V_VCCST
VCCPRIM_1P0 & VCCPRIM_CORE Short
AB19
AB20
P18
AF18
C698 1U/6.3V_4
C699 47u/6.3V_8
C695 1U/6.3V_4
C191 1U/6.3V_4
C182 47u/6.3V_8
C179 1U/6.3V_4
C225 *1U/6.3V_4
R210 *0_6
R212 *short_6
R789 0_6
R683 *0_6
C748 1U/6.3V_4
R193 *short_6
R186 *short_6
LPM_ZVM_N (33)
C192 1U/6.3V_4
C261 1U/6.3V_4
C173 1U/6.3V_4
For 2+3e CPU No Stuff
TP88
+VCCDSW_1P0
C7121U/6.3V_4
C793 1U/6.3V_4
+VCCPDSW_3P3
C314*0.1U/16 V_4
+VCCHDA
+VCCPSPI
+VCCPRIM_3P3
AF19
AB17
AD17
AD18
AJ17
AJ19
AJ16
AF20
AF21
AJ21
AK20
V20
V21
AL1
K17
L1
N15
N16
N17
P15
P16
K15
L15
V15
Y18
T19
T20
N18
SKL_ULT
U35O
CPU POWER 4 OF 4
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
DCPDSW_1P0
VCCMPHYAON_1P0
VCCMPHYAON_1P0
VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16
VCCAMPHYPLL_1P0
VCCAMPHYPLL_1P0
VCCAPLL_1P0
VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18
VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17
1.5V
VCCHDA
3.3V
VCCSPI
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
1.0V
SKL_ULT/BGA
REV = 1
1.0V
S5
1.0V
1.0V
30mA
11mA
1.0V
642mA
1.0V
S5
1.0V
22mA
S5
1.0V
1.258A
1.0V
S5
1.0V
S5
3.3V
118mA
3.3V
1.0V
33mA
?
696mA
2.574A
75mA with AJ21 pin
6mA
26mA
696mA
S5
S5
+3V
75mA
696mA
15 OF 20
44mA
S5
33mA
41mA
VCCPRIM_3P3_V19
1.0V
VCCPRIM_1P0_T1
1.8V
<1mA
VCCRTCPRIM_3P3
3.0V+
RTC
1.0V
135mA
S5
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
S5
S5
VCCPGPPG
VCCATS_1P8
VCCRTC_AK19
VCCRTC_BB14
GPIO Group Power Plane
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
?
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_3P3
+VCCPRIM_1P0
+VCCATS_1P8
+VCCPRTCPRIM_3P3
V0P85A_VID0
V0P85A_VID1
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
C250 1U/6.3V_4
C349 1U/6.3V_4
+VCCPRTC
C322 1U/6.3V_4
DCPRTC
C680 *1U/6.3V_4
C672 1U/6.3V_4
C292 *1U/6.3V_4
C268 1U/6.3V_4
C230 1U/6.3V_4
C265 *1U/6.3V_4
R198*short_6
R185*short_6C217 1U/6.3V_4
R182*short_6
R187*short_6
R179*short_6
R192*short_6
R188*short_6
C256 1U/6.3V_4
C270 *1U/6.3V_4
R180*short_6
R240*short_6
C348 0.1U/16V_4
R252*short_6
C352 0.1U/16V_4
C732 0.1U/16V_4
TP31
TP16
Rev:D change to shortpad
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+1.8V_S5
+3V_S5
+1V_S5
+1.8V_S5
+3V_S5
+3V_RTC
+1V_S5
!E
Pin Name Strap description Configuration
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted
CFG[1]
CFG[2]
Reserved Configuration lane
PCI Express* Static x16 Lane Numbering Reversal
1 = *Normal Operation; No stall (iPU 3K)
0 = Stall
1 = *Normal Operation(iPU 3K)
0 = Lan number reversed
Note
H & S processor used only
CFG[3] Reserved Configuration lane
CFG[4]
CFG[6:5] PCI Express* Bifunction
A A
eDP enable
CFG[7] PEG Training
CFG[19:8]
Reserved Configuration lane
5
1 = Disabled (iPU 3K)
0 = *Enabled
00 = 1x8, 2x4 PCI Expres s*
01 = reserved
10 = 2x8 PCI Express*
11 = 1x16 PCI Express*
1 = *PEG Train immediatedly follow
RESET# de-asserti on (iPU 3K)
0 = PEG wait for B IOS for training
4
CFG4
R548 1K_4
H & S processor used only
H & S processor used only
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
2
Monday, July 20, 2015
PROJECT :
Skylake PCH-LP 15/19 (POWER)
Skylake PCH-LP 15/19 (POWER)
Skylake PCH-LP 15/19 (POWER)
ZRW
ZRW
ZRW
3A
3A
948
948
1
948
3A
5
4
3
2
1
Skylake ULT (GND)
GND 3 OF 3
?
18 OF 20
U35R
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
?
SKL_ULT
U35T
SPARE
L18
L2
+1.8V_S5
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
?
R775 *0_4
*1U/6.3V_4
Reserve 1uF no stuff in CPU U11,U12 ball
support Cannonlake-U PCH
2
AW69
RSVD_AW69
AW68
RSVD_AW68
AU56
RSVD_AU56
AW48
RSVD_AW48
C7
RSVD_C7
U12
RSVD_U12
U11
RSVD_U11
H11
C794
Size Docu ment Number Rev
Size Docu ment Number Rev
Size Docu ment Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
RSVD_H11
SKL_ULT/BGA
REV = 1
Skylake 10/17/18 (GND)
Skylake 10/17/18 (GND)
Skylake 10/17/18 (GND)
Monday, July 20, 2 015
Monday, July 20, 2 015
Monday, July 20, 2 015
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
20 OF 20
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
ZRW
ZRW
ZRW
1
G10
G22
G43
G45
G48
G52
G55
G58
G60
G63
G66
H15
H18
H71
J11
J13
J25
J28
J32
J35
J38
J42
K16
K18
K22
K61
K63
K64
K65
K66
K67
K68
K70
K71
L11
L16
L17
F8
G5
G6
J8
SKL_ULT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL_ULT/BGA
REV = 1
?
A67
A70
AA2
AA4
AA65
AA68
AB15
AB16
AB18
AB21
AB8
AD13
AD16
AD19
AD20
AD21
AD62
AD8
AE64
AE65
AE66
AE67
AE68
AE69
AF1
AF10
AF15
AF17
AF2
AF4
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH6
AH63
AH64
AH67
AJ15
AJ18
AJ20
AJ4
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AK8
AL2
AL28
AL32
AL35
AL38
AL4
AL45
AL48
AL52
AL55
AL58
AL64
A5
REV = 1
SKL_ULT
GND 1 OF 3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL_ULT/BGA
D D
C C
B B
A A
5
16 OF 20
U35P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
?
4
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV1
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA10
BA14
BA18
BA2
BA23
BA28
BA32
BA36
F68
BA45
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
REV = 1
SKL_ULT
GND 2 OF 3
SKL_ULT/BGA
?
17 OF 20
U35Q
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
?
3
"!
F6
E3
C11
B11
A11
D12
C12
F52
?
10 48
10 48
10 48
3A
3A
3A
5
4
3
2
1
""
D D
C C
B B
R289 *0_6
Intel APS Fixture use
CN2
A A
*ACES_88511-180N
1
APS1
1
2
2
3
APS3
3
4
4
5
5
6
6
7
APS7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
R291 *0_6
R282 *0_4
R278 *0_6
R279 *0_4
R274 *0_4
R273 *0_4
R271 *0_6
R268 *0_4
R265 *0_4
R267 *0_4
APS3
+3V_S5
SYS_RESET#
R272 *0_6
SUSB# (8,29,31)
PCH_SLP_S5# (8)
SUSC# (8,29)
PCH_SLP_A# (8)
RTC_RST# (6)
NBSWON# (27,29)
SYS_RESET# (8)
5
4
APS7APS1
+3VPCU
+3VPCU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
3
2
Monday, July 20, 2015
PROJECT :
CPU/PCH XDP
CPU/PCH XDP
CPU/PCH XDP
ZRW
ZRW
ZRW
11 48
11 48
11 48
1
3A
3A
3A
5
M_A_A[15: 0](3)
D D
M_A_BS#0(3)
M_A_BS#1(3)
M_A_BS#2(3)
M_A_CS#0(3)
M_A_CS#1(3)
M_A_CLK0(3)
M_A_CLK0#(3)
M_A_CLK1(3)
M_A_CLK1#(3)
M_A_CKE0(3)
M_A_CKE1(3)
M_A_CAS#(3)
M_A_RAS#(3)
CLK_SCLK(7,13,27)
CLK_SDATA(7,13,27)
M_A_ODT0_DI MM(3)
M_A_ODT1_DI MM(3)
M_A_DQS[7: 0](3)
M_A_DQS#[7 :0](3)
C430
10u/6.3V_6
M_A_WE#(3)
C445
10u/6.3V_6
+VDDQ_VTT
5
C444
0.1u/16V_4
C468
1u/6.3V_4
R332 10K_4
R335 10K_4
1A-8
2013/10/23 Change DIMM1_SA0/SA1
C C
to DIMM0_SA0/SA1.
1A-2
2013/10/16 Chage net name M_B_DQS#[7:0] to
B B
+1.35VSUS
C470
10u/6.3V_6
+3V
C439
2.2u/6.3V_6
A A
M_A_DQS#[7:0].
Place these Caps near SO-DIMM
C472
10u/6.3V_6
C448
0.1u/16V_4
C432
10u/6.3V_6
C471
10u/6.3V_6
C446
0.1u/16V_4
C434
1u/6.3V_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
C466
0.1u/16V_4
C447
0.1u/16V_4
107
119
109
108
114
121
101
103
102
104
115
110
113
197
201
202
200
116
120
136
153
170
187
137
154
171
188
135
152
169
186
C464
0.1u/16V_4
C467
1u/6.3V_4
98
97
96
95
92
91
90
86
89
85
84
83
80
78
79
73
74
11
28
46
63
12
29
47
64
10
27
45
62
JDIM2A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM1_H=4.0_ST D
+
C486
330u/2V_7343
C442
1u/6.3V_4
4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
+SMDDR_VREF_DIMM
C480
0.1u/16V_4
2.2u/6.3V_6
C449
4.7U/10V_6
4
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
+SMDDR_VREF_DQ0
C473
0.1u/16V_4
C463
4.7U/10V_6
C443
C441
2.2u/6.3V_6
C455
4.7U/10V_6
M_A_DQ0 (3)
M_A_DQ4 (3)
M_A_DQ6 (3)
M_A_DQ7 (3)
M_A_DQ1 (3)
M_A_DQ5 (3)
M_A_DQ3 (3)
M_A_DQ2 (3)
M_A_DQ12 (3)
M_A_DQ8 (3)
M_A_DQ10 (3)
M_A_DQ14 (3)
M_A_DQ9 (3)
M_A_DQ13 (3)
M_A_DQ15 (3)
M_A_DQ11 (3)
M_A_DQ17 (3)
M_A_DQ21 (3)
M_A_DQ22 (3)
M_A_DQ18 (3)
M_A_DQ20 (3)
M_A_DQ16 (3)
M_A_DQ23 (3)
M_A_DQ19 (3)
M_A_DQ28 (3)
M_A_DQ24 (3)
M_A_DQ30 (3)
M_A_DQ31 (3)
M_A_DQ25 (3)
M_A_DQ29 (3)
M_A_DQ27 (3)
M_A_DQ26 (3)
M_A_DQ36 (3)
M_A_DQ33 (3)
M_A_DQ38 (3)
M_A_DQ39 (3)
M_A_DQ32 (3)
M_A_DQ37 (3)
M_A_DQ34 (3)
M_A_DQ35 (3)
M_A_DQ44 (3)
M_A_DQ45 (3)
M_A_DQ46 (3)
M_A_DQ47 (3)
M_A_DQ40 (3)
M_A_DQ41 (3)
M_A_DQ42 (3)
M_A_DQ43 (3)
M_A_DQ48 (3)
M_A_DQ52 (3)
M_A_DQ55 (3)
M_A_DQ54 (3)
M_A_DQ53 (3)
M_A_DQ49 (3)
M_A_DQ51 (3)
M_A_DQ50 (3)
M_A_DQ59 (3)
M_A_DQ58 (3)
M_A_DQ56 (3)
M_A_DQ57 (3)
M_A_DQ62 (3)
M_A_DQ63 (3)
M_A_DQ60 (3)
M_A_DQ61 (3)
CHA
CHB
3
+VREF_CA_CPU
M3 solution
+VREFDQ_SA_M3
M3 solution
SA0SA1
00
01
3
DDR3_DRAMRST#(3,13)
R362 *Short_6
R327 *Short_6
R347 *10K_4
+3V
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
R363 2/F_6
C478
0.022u/16V_4
1 2
R357
24.9/F_4
R328 2/ F_6
C427
0.022u/16V_4
1 2
R325
24.9/F_4
2
+1.35VSUS
2.48A
+3V
PM_EXTTS#0
C465 * 0.1u/16V_4
+SMDDR_VREF_DQ0
M1 solution
+1.35VSUS
R358
1.8K/F_4
R346
1.8K/F_4
M1 solution
+1.35VSUS
R330
1.8K/F_4
R331
1.8K/F_4
2
1
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=4.0_ST D
PC2100 DDR3 SDRAM SO-DIMM
(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
GND
GND
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
+VDDQ_VTT
Vref_CA
+SMDDR_VREF_DIMM
C479
470p/50V_4
Vref_DQ
+SMDDR_VREF_DQ0
C440
470p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
PROJECT :
DDR3 MEMORY SO-DIMM A
DDR3 MEMORY SO-DIMM A
DDR3 MEMORY SO-DIMM A
1
ZRW
ZRW
ZRW
12 48
12 48
12 48
"#
3A
3A
3A
5
4
3
2
1
M_B_A[15:0](3)
D D
M_B_BS#0(3)
M_B_BS#1(3)
M_B_BS#2(3)
M_B_CS#0(3)
M_B_CS#1(3)
M_B_CLK0(3)
M_B_CLK0#(3)
M_B_CLK1(3)
M_B_CLK1#(3)
M_B_CKE0(3)
M_B_CKE1(3)
M_B_CAS#(3)
M_B_RAS#(3)
CLK_SCLK(7,12,27)
CLK_SDATA(7,12,27)
M_B_ODT0_DIMM(3)
M_B_ODT1_DIMM(3)
M_B_DQS[7:0](3)
M_B_DQS#[7:0](3)
C402
10u/6.3V_6
C404
10u/6.3V_6
+VDDQ_VTT
M_B_WE#(3)
C421
0.1u/16V_4
R323 10K_4
R305 10K_4
+3V
C C
B B
1A-2
2013/10/16 Swap M_B_DQS2/M_B_DQS3 and swap
M_B_DQS#2/M_B_DQS#3.
+1.35VSUS
C419
10u/6.3V_6
+3V
Place these Caps near SO-DIMM
C418
10u/6.3V_6
C420
10u/6.3V_6
C401
10u/6.3V_6
C400
0.1u/16V_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DQS1
M_B_DQS0
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#1
M_B_DQS#0
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
C403
0.1u/16V_4
C416
0.1u/16V_4
C399
0.1u/16V_4
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=4.0_RVS
+SMDDR_VREF_DIMM
+
C433
330u/2V_7343
0.1u/16V_4
C422
PC2100 DDR3 SDRAM SO-DIMM
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2.2u/6.3V_6
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
+SMDDR_VREF_DQ1
C423
0.1u/16V_4
C393
C392
2.2u/6.3V_6
M_B_DQ12 (3 )
M_B_DQ8 (3)
M_B_DQ11 (3 )
M_B_DQ10 (3 )
M_B_DQ9 (3)
M_B_DQ13 (3 )
M_B_DQ15 (3 )
M_B_DQ14 (3 )
M_B_DQ4 (3)
M_B_DQ0 (3)
M_B_DQ3 (3)
M_B_DQ6 (3)
M_B_DQ5 (3)
M_B_DQ1 (3)
M_B_DQ2 (3)
M_B_DQ7 (3)
M_B_DQ17 (3 )
M_B_DQ16 (3 )
M_B_DQ18 (3 )
M_B_DQ19 (3 )
M_B_DQ21 (3 )
M_B_DQ20 (3 )
M_B_DQ22 (3 )
M_B_DQ23 (3 )
M_B_DQ24 (3 )
M_B_DQ25 (3 )
M_B_DQ30 (3 )
M_B_DQ31 (3 )
M_B_DQ28 (3 )
M_B_DQ29 (3 )
M_B_DQ26 (3 )
M_B_DQ27 (3 )
M_B_DQ36 (3 )
M_B_DQ37 (3 )
M_B_DQ39 (3 )
M_B_DQ35 (3 )
M_B_DQ32 (3 )
M_B_DQ33 (3 )
M_B_DQ34 (3 )
M_B_DQ38 (3 )
M_B_DQ44 (3 )
M_B_DQ45 (3 )
M_B_DQ42 (3 )
M_B_DQ43 (3 )
M_B_DQ41 (3 )
M_B_DQ40 (3 )
M_B_DQ46 (3 )
M_B_DQ47 (3 )
M_B_DQ48 (3 )
M_B_DQ52 (3 )
M_B_DQ55 (3 )
M_B_DQ54 (3 )
M_B_DQ49 (3 )
M_B_DQ53 (3 )
M_B_DQ50 (3 )
M_B_DQ51 (3 )
M_B_DQ57 (3 )
M_B_DQ56 (3 )
M_B_DQ58 (3 )
M_B_DQ62 (3 )
M_B_DQ61 (3 )
M_B_DQ60 (3 )
M_B_DQ63 (3 )
M_B_DQ59 (3 )
DDR3_DRAMRST#(3,12)
+VREFDQ_SB_M3
M3 solution
R324 * 10K_4
+3V
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
R302 * Short_6
R307 2/F_6
1 2
+1.35VSUS
2.48A
+3V
PM_EXTTS#1
C415 * 0.1u/16V_4
+SMDDR_VREF_DQ1
C397
0.022u/16V_4
R313
24.9/F_4
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199
77
122
125
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
DDR3-DIMM1_H=4.0_RVS
M1 solution
+1.35VSUS
R309
1.8K/F_4
R310
1.8K/F_4
JDIM1B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
Vref_DQ
+SMDDR_VREF_DQ1
PC2100 DDR3 SDRAM SO-DIMM
CHA
CHB
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
(204P)
VTT1
VTT2
GND
GND
C391
470p/50V_4
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
+VDDQ_VTT
SA0SA1
00
01
"$
A A
C388
2.2u/6.3V_6
C390
0.1u/16V_4
C429
1u/6.3V_4
C396
1u/6.3V_4
C426
1u/6.3V_4
C395
1u/6.3V_4
5
C394
4.7U/10V_6
4
C417
4.7U/10V_6
C414
4.7U/10V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
DDRIII Memory SO-DIMM B
DDRIII Memory SO-DIMM B
DDRIII Memory SO-DIMM B
PROJECT :
ZRW
ZRW
ZRW
3A
3A
3A
13 48Monday, July 20, 2015
13 48Monday, July 20, 2015
13 48Monday, July 20, 2015
1
1
2
3
4
5
6
7
8
+1.05V_GFX
A A
Near GPU
C605 EV@22U/6.3VS_6
C72 EV@22U/6.3VS_6
C78 EV@4.7U/10V_6
C111 EV@4.7U/10V_6
C63 EV@4.7U/10V_6
C97 EV@1U/6.3V_4
C91 EV@1U/6.3V_4
Under GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A
+1.05V_GFX
PEX_PLL_HVDD +
PEX_SVDD_3V3 = 143mA
B B
100 ohm near GPU
C C
R72 EV@0_6
+1.05V_GFX
D D
Near GPU
Under GPU
1
C64 EV@22U/6.3VS_6
C87 *22U/6.3VS_6
C65 *10U/10V_6
C90 EV@4.7U/10V_6
C602 EV@4.7U/10V_6
Near GPU
Under GPU
C119 EV@1U/6.3V_4
C121 EV@1U/6.3V_4
+3V_GFX
C131 EV@0.1U/16V_4
C135 EV@4.7U/10V_6
C132 EV@4.7U/10V_6
Near GPU
+VGPU_CORE
VGA_VCCSENSE(41)
VGA_VSSSENSE(41)
R481 *200/F_4
PEX_TSTCLK
PEX_TSTCLK#
CX300T30001 Change to 0ohm
PEX_PLLVDD
C80EV@4.7U/10V_6
C96EV@1U/6.3V_4
C92EV@0.1U/16V_4
PEX_PLLVDD = 130mA
EV@10K/F_4
R79
R473EV@2.49K/F_4
TESTMODE
PEX_TERMP
R123
EV@100_4
R124
EV@100_4
AA22
AB23
AC24
AD25
AE26
AE27
AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27
AA8
AA9
AB8
AF22
AE22
AA14
AA15
AD9
AF25
F2
F1
2
U34A
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_PLL_HVDD
PEX_PLL_HVDD
PEX_SVDD_3V3
VDD_SENSE
GND_SENSE
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_PLLVDD
PEX_PLLVDD
TESTMODE
PEX_TERMP
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1/14 PCI_EXPRESS
PEX_WAKE
PEX_RST
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
PEX_TX1
PEX_TX1
PEX_RX1
PEX_RX1
PEX_TX2
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX3
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
PEX_RX4
PEX_RX4
PEX_TX5
PEX_TX5
PEX_RX5
PEX_RX5
PEX_TX6
PEX_TX6
PEX_RX6
PEX_RX6
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX10
PEX_TX10
PEX_RX10
PEX_RX10
PEX_TX11
PEX_TX11
PEX_RX11
PEX_RX11
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_TX13
PEX_TX13
PEX_RX13
PEX_RX13
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX15
PEX_TX15
PEX_RX15
PEX_RX15
GF119GF11 7
COMMONbga595-nvidia-n13p-gv2-s-a2
3
AB6
AC7
AC6
AE8
AD8
AC9
AB9
AG6
AG7
AB10
AC10
AF7
AE7
AD11
AC11
AE9
AF9
AC12
AB12
AG9
AG10
AB13
AC13
AF10
AE10
AD14
AC14
AE12
AF12
AC15
AB15
AG12
AG13
AB16
AC16
AF13
AE13
AD17
AC17
AE15
AF15
AC18
AB18
AG15
AG16
AB19
AC19
AF16
AE16
AD20
AC20
AE18
AF18
AC21
AB21
AG18
AG19
AD23
AE23
AF19
AE19
AF24
AE24
AE21
AF21
AG24
AG25
AG21
AG22
C134 *0.1U/16V_4
VGA_RST#
PEX_CLKREQ#
PEG_RXP0_C
PEG_RXN0_C
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
R86 EV@0_4
R91 EV@10K/F_4
C632 EV@0.22U/10V_4
C638 EV@0.22U/10V_4
C627 EV@0.22U/10V_4
C629 EV@0.22U/10V_4
C626 EV@0.22U/10V_4
C610 EV@0.22U/10V_4
C609 EV@0.22U/10V_4
C607 EV@0.22U/10V_4
PLTRST#(8,23,25,26,29)
DGPU_HOLD_RST#(4)
N16V stuff it, not support GC6 2.0
GPU_PEX_R ST_HOLD#(17)
PEX_CLKREQ#
4
PEGX_RST# (17)
+3V_GFX
CLK_PCIE_VGA (6)
CLK_PCIE_VGA# (6)
PEG_RX0 (6)
PEG_RX#0 (6)
PEG_TX0 (6)
PEG_TX#0 (6)
PEG_RX1 (6)
PEG_RX#1 (6)
PEG_TX1 (6)
PEG_TX#1 (6)
PEG_RX2 (6)
PEG_RX#2 (6)
PEG_TX2 (6)
PEG_TX#2 (6)
PEG_RX3 (6)
PEG_RX#3 (6)
PEG_TX3 (6)
PEG_TX#3 (6)
EV@MC74VHC1G08DFT2G
SYS_PEX_RST
U10
2
1
SYS_PEX_RST_MON#
R132 GM@0_4
GPU_PEX_R ST_HOLD#
+3V
C180
EV@0.1U/16V_4
4
SYS_PEX_RST
3 5
SYS_PEX_RST_MON# (17)
U7
GT@MC74VH C1G08DFT2G
2
1
+3V_GFX
Follow Z09 to isolate CLK_REQ#
2
1
Q10
EV@2N7002K
R92 *0_4
3
5
NVDD = 32.22 ~ 26. 66 A
Under GPU
C88 EV@1U/6.3V_4
C128 EV@1U/6.3V_4
C125 EV@1U/6.3V_4
C130 EV@1U/6.3V_4
C113 EV@4.7U/10V_6
C86 EV@4.7U/10V_6
C118 EV@4.7U/10V_6
C112 EV@4.7U/10V_6
C120 EV@4.7U/10V_6
C93 EV@4.7U/10V_6
C109 EV@4.7U/10V_6
C116 EV@4.7U/10V_6
C126 EV@4.7U/10V_6
C123 EV@4.7U/10V_6
12
+
C85
EV@330u_2.5V_3528
C159 EV@22U/6.3V_8
C153 EV@47u/6.3V_8
C160 EV@4.7U/6.3VS_6
C140 EV@4.7U/6.3VS_6
C146 EV@4.7U/6.3VS_6
C149 EV@4.7U/6.3VS_6
C163 EV@4.7U/6.3VS_6
Near GPU
R143 EV@0_4
+3V
C175
GT@0.1U/16V_ 4
4
PEGX_RST#
3 5
CLK_PEGA_REQ# (6)
PU at page 9
+VGPU_CORE
K10
K12
K14
K16
K18
L11
L13
L15
L17
M10
M12
M14
M16
M18
N11
N13
N15
N17
P10
P12
P14
P16
P18
R11
R13
R15
R17
T10
T12
T14
T16
T18
U11
U13
U15
U17
V10
V12
V14
V16
V18
SYS_PEX_RST_MON#
R142
GT@100K/F_4
R114
EV@100K/F_4
U34E
11/14 NVVDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
bga595-nvidia-n13p-gv2-s-a2
COMMON
6
AD10
AD7
B19
F11
TP5
V5
V6
G1
G2
G3
G4
G5
G6
G7
V1
V2
W1
W2
W3
W4
ALL 3.3V
+3VGFX & +3V3_AON
+VGACORE
PEX_VDD
+1.05V_GFX
FBVDDQ
+1.5V_GFX
"7
U34C
14/14 XVDD/VDD33
NC
NC
NC
3V3AUX_NC
FERMI_RSVD1_NC
FERMI_RSVD2_NC
CONFIGURABLE
POWER CHANN ELS
* nc on substrate
XPWR_G1
XPWR_G2
XPWR_G3
XPWR_G4
XPWR_G5
XPWR_G6
XPWR_G7
XPWR_V1
XPWR_V2
XPWR_W1
XPWR_W2
XPWR_W3
XPWR_W4
bga595-nvidia-n13p-gv2-s-a2 COMMON
t>0NVVDD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
N16S-GT (PCIE I/F) /NVDD
N16S-GT (PCIE I/F) /NVDD
N16S-GT (PCIE I/F) /NVDD
Monday, July 20, 2015
Monday, July 20, 2015
Monday, July 20, 2015
VDD33 = 56mA
G10
VDD33
VDD33
VDD33
VDD33
G12
G8
G9
+3V_GFX
C117 EV@0.1U/16V_4
C145 EV@4.7U/10V_6
1 2
C138 EV@1U/10V_6
C143 EV@4.7U/10V_6
1 2
C137 EV@1U/10V_6
C124 EV@0.1U/16V_4
C127 EV@0.1U/16V_4
Under GPU
+3V_MAIN
Under GPU
Power up
sequence
t>=0
Power down
sequence
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRW
ZRW
ZRW
14 48
14 48
14 48
8
Near GPU
3A
3A
3A
1
R525 EV@10K/F_4
FBA_CMD0
A A
FBA_ODT_L
FBA_CKE_L
FBA_ODT_H
FBA_CKE_H
FBA_RST#
B B
C C
FB_PLLAVDD = 55mA
+1.05V_GFX
D D
+1.5V_GFX
EV@BLM15PX330SN1DEV_4
L1
C79 EV@22U/6.3VS_6
C76 EV@0.1U/16V_4
C89 EV@0.1U/16V_4
C77 EV@0.1U/16V_4
FBA_CMD3
FBA_CMD16
FBA_CMD19
FBA_CMD20
VMA_CLK0(18 ,19)
VMA_CLK0#(18,1 9)
VMA_CLK1(18 ,19)
VMA_CLK1#(18,1 9)
R60 EV@10K/F_4
R59 EV@10K/F_4
R47 EV@10K/F_4
R43 EV@10K/F_4
R453 EV@10K/F_4
FBA_CMD0(18,19)
FBA_CMD1(19)
FBA_CMD2(18)
FBA_CMD3(18,19)
FBA_CMD4(18,19)
FBA_CMD5(18,19)
FBA_CMD6(18,19)
FBA_CMD7(18,19)
FBA_CMD8(18,19)
FBA_CMD9(18,19)
FBA_CMD10(18,19)
FBA_CMD11(18,19)
FBA_CMD12(18,19)
FBA_CMD13(18,19)
FBA_CMD14(18,19)
FBA_CMD15(18,19)
FBA_CMD16(18,19)
FBA_CMD17(19)
FBA_CMD18(18)
FBA_CMD19(18,19)
FBA_CMD20(18,19)
FBA_CMD21(18,19)
FBA_CMD22(18,19)
FBA_CMD23(18,19)
FBA_CMD24(18,19)
FBA_CMD25(18,19)
FBA_CMD26(18,19)
FBA_CMD27(18)
FBA_CMD28(18,19)
FBA_CMD29(18,19)
FBA_CMD30(19)
R80 *60.4_4
R87 *60.4_4
+FB_PLLAVDD
FB_DLLAVDD = 15mA
1
PS_FB_CLAMP
2
F3
C27
C26
E24
F24
D27
D26
F25
F26
F23
G22
G23
G24
F27
G25
G27
G26
M24
M23
K24
K23
M27
M26
M25
K26
K22
J23
J25
J24
K27
K25
J27
J26
F22
J22
D24
D25
N22
M22
D18
C18
D17
D16
T24
U24
V24
V25
F16
P22
H22
2
U34B
FB_CLAMP
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_DEBUG0
FBA_DEBUG1
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_WCK01
FBA_WCK01
FBA_WCK23
FBA_WCK23
FBA_WCK45
FBA_WCK45
FBA_WCK67
FBA_WCK67
FB_PLLAVDD
FB_PLLAVDD
FB_DLLAVDD
INT
bga595-nvidia-n13p-gv2-s-a2
GF119NC
GF117
GF119
GF117FB_PLLAVDD
3
3
2/14 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FB_VREF_PROBE
COMMON
E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24
AA24
Y22
AA23
AD27
AB25
AD26
AC25
AA27
AA26
W26
Y25
R26
T25
N27
R27
V26
V27
W27
W25
D19
D14
C17
C22
P24
W24
AA25
U25
E19
C15
B16
B22
R25
W23
AB26
T26
F19
C14
A16
A22
P25
W22
AB27
T27
D23
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
TP2
4
VMA_DQ[63:0]
FBVDDQ + FBVDD = 3.116A
C71 EV@0.1U/16V_4
C82 EV@0.1U/16V_4
1 2
C95 EV@1U/10V_6
1 2
C74 EV@1U/10V_6
C73 EV@4.7U/10V_6
C69 EV@4.7U/10V_6
C84 EV@10U/6.3V_6
C83 EV@22U/6.3V_8
VMA_DM[7:0] (18,19)
VMA_WDQS[7:0] (18,19)
VMA_RDQS[7:0] (18,19)
4
5
VMA_DQ[63:0] (18,19)
+1.5V_GFX
FBA_CMD4
R458EV@100/F_4
FBA_CMD5
R461EV@100/F_4
FBA_CMD6
FBA_CMD7
R50EV@100/F_4
FBA_CMD8
R445EV@100/F_4
FBA_CMD9
R41EV@100/F_4
FBA_CMD10
R22EV@100/F_4
FBA_CMD11
R62EV@100/F_4
FBA_CMD12
R455EV@100/F_4
FBA_CMD13
R24EV@100/F_4
FBA_CMD14
R451EV@100/F_4
FBA_CMD15
R64EV@100/F_4
FBA_CMD21
R21EV@100/F_4
FBA_CMD22
R30EV@100/F_4
FBA_CMD23
R18EV@100/F_4
FBA_CMD24
R40EV@100/F_4
FBA_CMD25
R55EV@100/F_4
FBA_CMD26
R27EV@100/F_4
FBA_CMD27
R31EV@100/F_4
FBA_CMD28
R54EV@100/F_4
FBA_CMD29
R49EV@100/F_4
FBA_CMD30
R35EV@100/F_4
5
U34D
12/14 FBVDDQ
B26
FBVDDQ
C25
FBVDDQ
E23
FBVDDQ
E26
FBVDDQ
F14
FBVDDQ
F21
FBVDDQ
G13
FBVDDQ
G14
FBVDDQ
G15
FBVDDQ
G16
FBVDDQ
G18
FBVDDQ
G19
FBVDDQ
G20
FBVDDQ
G21
FBVDDQ
H24
FBVDDQ
H26
FBVDDQ
J21
FBVDDQ
K21
FBVDDQ
L22
FBVDDQ
L24
FBVDDQ
L26
FBVDDQ
M21
FBVDDQ
N21
FBVDDQ
R21
FBVDDQ
T21
FBVDDQ
V21
FBVDDQ
W21
FBVDDQ
bga595-nvidia-n13p-gv2-s-a2
COMMON
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
R459EV@100/F_4
R462EV@100/F_4
R46EV@100/F_4R45EV@100/F_4
R51EV@100/F_4
R446EV@100/F_4
R42EV@100/F_4
R23EV@100/F_4
R61EV@100/F_4
R456EV@100/F_4
R25EV@100/F_4
R452EV@100/F_4
R63EV@100/F_4
R20EV@100/F_4
R29EV@100/F_4
R17EV@100/F_4
R39EV@100/F_4
R56EV@100/F_4
R26EV@100/F_4
R32EV@100/F_4
R57EV@100/F_4
R48EV@100/F_4
R36EV@100/F_4
D22
C24
B25
+1.5V_GFX
6
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
R84 EV@40.2/F_4
R73 EV@42.2/F_4
R71 EV@51.1/F_4
For support GC6 1.0
For support GC6 2.0
EC_FB_CLAMP(17,2 9)
GC6_FB_EN(4,17)
GPU_PWR _GD(41)
6
7
U34F
A2
GND
AB17
GND
AB20
GND
AB24
GND
AC2
GND
AC22
GND
AC26
GND
AC5
GND
AC8
GND
AD12
GND
AD13
GND
A26
GND
AD15
GND
AD16
GND
AD18
GND
AD19
GND
AD21
GND
AD22
GND
AE11
GND
AE14
GND
AE17
GND
AE20
GND
AB11
GND
AF1
GND
AF11
GND
AF14
GND
AF17
GND
AF20
GND
AF23
GND
AF5
GND
AF8
GND
AG2
GND
AG26
GND
AB14
GND
B1
GND
B11
GND
B14
GND
B17
GND
B20
GND
B23
GND
B27
GND
B5
GND
B8
GND
E11
GND
E14
GND
E17
GND
E2
GND
E20
GND
E22
GND
E25
GND
E5
GND
E8
GND
H2
GND
H23
GND
H25
GND
H5
+1.5V_GFX
R140 *0_4
R139 GT@0_4
+3V
2
1
3 5
R137 GM@0_4
GND
K11
GND
K13
GND
K15
GND
K17
GND
L10
GND
L12
GND
L14
GND
L16
GND
L18
GND
L2
GND
L23
GND
L25
GND
L5
GND
M11
GND
bga595-nvidia-n13p-gv2-s-a2 COMMON
C177
GT@0.1U/16V_ 4
GT@NL17SZ 32DFT2G
4
U9
N16V stuff it, not support GC6 2.0
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
7
PROJECT :
N16S-GT (MEMORY/GND)
N16S-GT (MEMORY/GND)
N16S-GT (MEMORY/GND)
13/14 GND
R126
EV@100K/F_4
ZRW
ZRW
ZRW
8
"8
M13
GND
M15
GND
M17
GND
N10
GND
N12
GND
N14
GND
N16
GND
N18
GND
P11
GND
P13
GND
P15
GND
P17
GND
P2
GND
P23
GND
P26
GND
P5
GND
R10
GND
R12
GND
R14
GND
R16
GND
R18
GND
T11
GND
T13
GND
T15
GND
T17
GND
U10
GND
U12
GND
U14
GND
U16
GND
U18
GND
U2
GND
U23
GND
U26
GND
U5
GND
V11
GND
V13
GND
V15
GND
V17
GND
Y2
GND
Y23
GND
Y26
GND
Y5
GND
AA7
GND
AB7
GND
FBVDDQ_EN (42)
15 48
15 48
15 48
8
3A
3A
3A