How it Works
Acer
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A
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Aspire E5-574
Energy-related Product directive
5 pgs113.73 Kb0
Schematic
2 pgs29.32 Kb0
Schematic
48 pgs2.14 Mb0

Acer Aspire E5_574, Aspire E5_574G Schematic

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Page 1
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Dr-Bios.com
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!"
D D
C C
Cardreader CONN. 2in 1
P28
I/O board
B B
Zoro_SL (ZRW) SKL ULT SYSTEM BLOCK DIAGRAM
DDR3L-SODIMM CHA
P12
DDR3L-SODIMM CHB
P13
SATA - HDD
SATA ODD
RTS5170 (cardreader)
CCD(Camera)
Touch Screen
Blue Tooth
I/O Board Conn.USB2 IO*1
P25
P25
P28
P21
P21
P26
P28
Dual Channel DDR III 1066/1333/1600 MHZ
SATA0
SATA1
USB2-8
USB2-7
USB2-6
USB2-5
USB2-4
P6
BATTERY
Azalia
SKY LAKE ULT 15W
MCP 1356pins
IMC
DC+GT3e
42 mm X 24 mm
SATA
Integrated PCH
USB2.0
DMIC_CLK0 DMIC_DATA0
RTC
IHDA
P2~P10
LPC
PCI-E x4 TX/RX
CLK
eDP
USB3.0/2.0
CLK
PCI-E x1
CLK
I2C_0
SPI
DP
PCIE1-4
EDP
DDI2
DDI1
USB3-1 & USB3-2
USB2-1 & USB2-2
X'TAL
32.768KHz
X'TAL 24MHz
SPI ROM 8M+4M
GPU
N16S-GT N16V-GM
P7
P14~P19
ITE6516
PS8201
X'TAL 27MHz
P20
P22
PCIE-6
PCIE-5
VRAM
DDR3
P18~P19
eDP Conn.
VGA Conn.
HDMI Conn.
P21
P21
P22
USB3 Port MB side CN13 -> USB3 port 2 ( up ) CN16 -> USB3 port 1 ( down )
MINI CARD WLAN+BT
RTL8111H
10/100/1G
P26
P23
X'TAL 25MHz
IV@ : iGPU EV@ : Optimus GT@ : N16S-GT / GC6 GM@ : N16V-GM / WO GC6 DR@ : For Dual Rank ( VRAM 8 pcs) KBL@ : Keyboard backlight TPM@ : TPM TPM_N@: For TPM 2.0 TPM_l@ : For TPM 1.2 8M@ : 8M FLASH ROM 4M@ : 4M FLASH ROM GS@ :G-SENSOR TDI@ : TOUCH PAD I2C TSU@ : TOUCH SCREEN USB TSI@ : TOUCH SCREEN I2C GT3@ : GT3 CPU NAC@ : Non IOAC IOAC@ : For IOAC
P28
RJ45
P23
BOM
K/B BL Con.
EC
IT8987
P27
Touch PAD
P27
HALL SENSOR
3
P17
P29
Fan Driver
(Fan signal)
TPM(option)
P27
P25
2
BQ24780RUYR
Batery C harger
TPS51225
+3V/+5V
RT8237CZQW
+1V_S5
NB681GD-Z
+VCCOPC/+VCCEOPIO
G5316RZ1D
+1.35VSUS
P30
MDV1528Q
+5V_S5/+3V_S5/+3V/+5V
P31
ISL95859HRT Z-T
+VCORE/VCCSA/VCCGT
P32
P33
Thermal Protection
P35
UP1658RQKF
+VGPU_CORE
P31
RT8068AZQW
P38
+1.05V_GFX/+3V_GFX +1.5V_GFX
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
P7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Block Diagram
Block Diagram
Block Diagram
1
P40
ZRW
ZRW
ZRW
P41
P42
148Monday, July 20, 2015
148Monday, July 20, 2015
148Monday, July 20, 2015
D-MIC
Int. D -MIC
P24
Universal HP
A A
ALC25 5
AUDIO CODEC
P24 P24
P24
Speaker*2
LED
P27
K/B Con.
P27
5
4
3A
3A
3A
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Skylake ULT (DISPLAY,eDP)
AT16 AU16
D63 A54 C65 C63 A65
C55 D55 B54 C56
A6
A7 BA5 AY5
H66 H65
SKL_ULT
DDI
DISPLAY SIDEBANDS
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
U35D
CATERR# PECI PROCHOT# THERMTRIP# SKTOCC#
CPU MISC
BPM#[0] BPM#[1] BPM#[2] BPM#[3]
GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3
PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP
SKL_ULT/BGA
REV = 1
SKL_ULT
1 OF 20
+3V_S5 +3V_S5 +3V_S5 +3V_S5
EDP
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
4 OF 20
EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
EDP_AUXN EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP
GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
JTAG
PROC_TCK
PROC_TDI PROC_TDO PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS
PCH_TRST#
JTAGX
C47
EDP_TXN0
C46
EDP_TXP0
D46
EDP_TXN1
C45
EDP_TXP1
A45 B45 A47 B47
E45
EDP_AUXN
F45
EDP_AUXP
B52
G50 F50 E48
CRT_AUX#_C
F48
CRT_AUX_C
G46 F46
L9
INT_HDMI_HPD
L7
CRT_HPD
L6
R567 *short_4
N9
R571 *short_4
L10
EDP_HPD
R12
PCH_BLON
R11
PCH_BRIGHT
U13
PCH_VDDEN
?
B61
XDP_TCK0
D60
XDP_TDI_CPU
A61
XDP_TDO_CPU
C60
XDP_TMS_CPU
B59
XDP_TRST#
B56
XDP_TCK1
D59
XDP_TDI
A56
PCH _JTAG_TDO
C59
XDP_TMS
C61 A59
PCH_TRST#
PCH_JTAGX
EDP_TXN0 (21) EDP_TXP0 (21) EDP_TXN1 (21) EDP_TXP1 (21)
EDP_AUXN (21) EDP_AUXP (21)
R546 *0_4 R553 *0_4
C671 *short_4 C670 *short_4
Rev:D change to shortpad
R539 *short_4
R549 *short_4
R517 *short_4
Rev:D change to shortpad
?
XDP_TDO
R795 0_4
XDP_TDI
R796 0_4
If use Intel DCI USB 3.0 fixture need to short
1. XDP_TDO <--> XDP_TDO_CPU
2. XDP_TDI <--> XDP_TDI_CPU
3. XDP_TMS <--> XDP_TMS_CPU
R797 0_4
PCH_BRIGHTDP_UTIL
CRT_AUXN (20) CRT_AUXP (20)
INT_HDMI_HPD (22) CRT_HPD (20) KBSMI# (29) EC_SCI# (29) EDP_HPD (21)
PCH_BLON (21) PCH_BRIGHT (21)
EDP_VDD_EN (21)
XDP_TDO
XDP_TRST#
XDP_TCK0
XDP_TDO_CPU
XDP_TDI_CPU
XDP_TMS_CPUXDP_TMS
Rev:F add
eDP Panel
PCH JTAG
TCK,TMS Trace Length < 9000mi ls
H_PWRGOOD (50ohm ) Trace Length: 1~11.25 inc hes
CRT_AUXN
CRT_AUXP
CRT_CLK CRT_DATA KBSMI# EC_SCI#
CRT_HPD EDP_HPD
100k pull-down on PCH side
JTAG_TCK,JTAG_TMS Trace Length < 9000mils
R533 *100K_4
R532 *100K_4
R577 2.2K_4 R152 2.2K_4 R780 20K/F_4 R781 20K/F_4
Rev:D add
R564 100K_4 R563 100K_4
Change to +1V_VCCST 11/6
XDP_TDO_CPU XDP_TMS XDP_TDI PCH _JTAG_TDO PCH_JTAGX
XDP_TRST# XDP_TCK0 XDP_TCK1 PCH_TRST#
2/16 ,XDP_TCK1,XDP_ TMS don't need pull up or pull down
5/29 XDP_TCK0 R558 Stuff
R559 51_4 R514 51_4 R515 51_4 R538 51_4 R513 *1K_4
R535 *51_4 R558 51_4 R537 *51_4 R534 51_4
D D
HDMICRT
+VCCIO
C C
+1V_VCCST
CPU_THRMTRIP#
R5291K_4
CATERR#
Rev:E Stuff only for C2 build Debug Ramp will remove
+VCCIO
R465 1K_4
B B
R78849.9/F_4
H_PROCHOT#
H_PROCHOT#(29,30,36)
Avoid 125Mhz
BPM#[0:7] Trace Length 1~6 inches Length match < 300 mils
H_PECI (50ohm ) Route on mi crostrip only Spacing >18 mi ls Trace Length: 0.4~6.125 iches
SM_RCOMP[0: 2] Trace length < 500 m ils Trace width = 12~15 m ils Trace spacing = 20 m ils
INT_HDMITX2N(22) INT_HDMITX2P(22) INT_HDMITX1N(22) INT_HDMITX1P(22) INT_HDMITX0N(22) INT_HDMITX0P(22)
INT_HDMICLK-(22) INT_HDMICLK+(22)
CRT_TXN0(20) CRT_TXP0(20) CRT_TXN1(20)
ITE FAE suggest CAP should be at PCH side.
HDMI_DDCCLK_SW(22)
HDMI_DDCDATA_SW(22)
CRT_TXP1(20)
PCH_ODD_EN(25)
eDP_RCOMP Trace length < 100 mils Trace width = 20 mils Trace spacing = 25 mils
H_PECI(29)
THRMTRIP#
DGPU_PW_CTRL#(4)
HDMI_DDCCLK_SW HDMI_DDCDATA_SW
CRT_CLK CRT_DATA
EDP_RCOMP
R15424.9/F_4
TP65
R531 499/F_4 R530 100/F_4
TP89 TP90 TP64 TP62
U35A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKL_ULT/BGA
REV = 1
CATERR# H_PECI H_PROCHOT#_RH_PROCHOT# CPU_THRMTRIP#
XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3
DGPU_PW_CTRL#
R635 49.9/F_4 R646 49.9/F_4 R158 49.9/F_4 R162 49.9/F_4
!#
+3V
+3V
MP remove(Inte l)
+1V_VCCST
+1V_VCCST
+1V_VCCST
2
R488
*1K_4
1 3
Q5 MMBT3904-7-F
3
Q31
FDV301N
1
R74 1K_4
2
SYS_SHDN# (31,40)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
3
2
Monday, July 20, 2015
PROJECT :
Skylake 1/4 (DDI/eDP)
Skylake 1/4 (DDI/eDP)
Skylake 1/4 (DDI/eDP)
ZRW
ZRW
ZRW
1
3A
3A
248
248
248
3A
CPU thermal trip
+1V_VCCST
U33
NC1VCC
A A
IMVP_PWRGD(36)
2
A
GND3Y
74AUP1G07GW
R478 *0_4
5
C628
0.1u/16V_4
4
+3V
12
R485 10K_4
IMVP_PWRGD_3V (8)
IMVP_PWRGD_3V
THRMTRIP#
5
4
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Change Data and DQS to interleave.
!$
?
D D
C C
B B
M_A_DQ0(12) M_A_DQ1(12) M_A_DQ2(12) M_A_DQ3(12) M_A_DQ4(12) M_A_DQ5(12) M_A_DQ6(12) M_A_DQ7(12) M_A_DQ8(12) M_A_DQ9(12) M_A_DQ10(12) M_A_DQ11(12) M_A_DQ12(12) M_A_DQ13(12) M_A_DQ14(12) M_A_DQ15(12) M_A_DQ16(12) M_A_DQ17(12) M_A_DQ18(12) M_A_DQ19(12) M_A_DQ20(12) M_A_DQ21(12) M_A_DQ22(12) M_A_DQ23(12) M_A_DQ24(12) M_A_DQ25(12) M_A_DQ26(12) M_A_DQ27(12) M_A_DQ28(12) M_A_DQ29(12) M_A_DQ30(12) M_A_DQ31(12) M_A_DQ32(12) M_A_DQ33(12) M_A_DQ34(12) M_A_DQ35(12) M_A_DQ36(12) M_A_DQ37(12) M_A_DQ38(12) M_A_DQ39(12) M_A_DQ40(12) M_A_DQ41(12) M_A_DQ42(12) M_A_DQ43(12) M_A_DQ44(12) M_A_DQ45(12) M_A_DQ46(12) M_A_DQ47(12) M_A_DQ48(12) M_A_DQ49(12) M_A_DQ50(12) M_A_DQ51(12) M_A_DQ52(12) M_A_DQ53(12) M_A_DQ54(12) M_A_DQ55(12) M_A_DQ56(12) M_A_DQ57(12) M_A_DQ58(12) M_A_DQ59(12) M_A_DQ60(12) M_A_DQ61(12) M_A_DQ62(12) M_A_DQ63(12)
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8
M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
U35B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SKL_ULT/BGA
REV = 1
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5]
DDR CH - A
2 OF 20
DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]
DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]
DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1]
DDR0_MA[3] DDR0_MA[4]
DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
DDR_VTT_CNTL
AU53 AT53 AU55 AT55
BA56 BB56 AW56 AY56
AU45 AU43 AT45 AT43
BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54
AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52
AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26
AW50 AT52
AY67 AY68 BA67
AW67
?
M_A_ODT0 M_A_ODT1
M_A_A5 M_A_A9 M_A_A6 M_A_A8 M_A_A7
M_A_A12 M_A_A11 M_A_A15 M_A_A14
M_A_A13
M_A_A2
M_A_A10 M_A_A1 M_A_A0 M_A_A3 M_A_A4
M_A_DQS#0
M_A_DQS0
M_A_DQS#1
M_A_DQS1
M_A_DQS#2
M_A_DQS2
M_A_DQS#3
M_A_DQS3
M_A_DQS#4
M_A_DQS4
M_A_DQS#5
M_A_DQS5
M_A_DQS#6
M_A_DQS6
M_A_DQS#7
M_A_DQS7
DDR0_ALERT# TP_DDR0_PARITY #
+VREF_CA_CPU +VREFDQ_SA_M3 +VREFDQ_SB_M3
DDR_VTT_CTRL
R621 *10K_4
M_A_CLK0# (12)
M_A_CLK0 (12)
M_A_CLK1# (12)
M_A_CLK1 (12)
M_A_CKE0 (12) M_A_CKE1 (12)
M_A_CS#0 (12) M_A_CS#1 (12) M_A_ODT0_DIMM (12) M_A_ODT1_DIMM (12)
M_A_BS#2 (12)
M_A_CAS# (12) M_A_WE# (12) M_A_RAS# (12) M_A_BS#0 (12)
M_A_BS#1 (12)
M_A_DQS#0 (12) M_A_DQS0 (12) M_A_DQS#1 (12) M_A_DQS1 (12) M_A_DQS#2 (12) M_A_DQS2 (12) M_A_DQS#3 (12) M_A_DQS3 (12) M_A_DQS#4 (12) M_A_DQS4 (12) M_A_DQS#5 (12) M_A_DQS5 (12) M_A_DQS#6 (12) M_A_DQS6 (12) M_A_DQS#7 (12) M_A_DQS7 (12)
TP21
+1.35VSUS
2
1 3
Q35 *DTC144EU
+3V_S5
R682 *100K_4
M_B_DQ0(13) M_B_DQ1(13) M_B_DQ2(13) M_B_DQ3(13) M_B_DQ4(13) M_B_DQ5(13) M_B_DQ6(13) M_B_DQ7(13) M_B_DQ8(13) M_B_DQ9(13) M_B_DQ10(13) M_B_DQ11(13) M_B_DQ12(13) M_B_DQ13(13) M_B_DQ14(13) M_B_DQ15(13) M_B_DQ16(13) M_B_DQ17(13) M_B_DQ18(13) M_B_DQ19(13) M_B_DQ20(13) M_B_DQ21(13) M_B_DQ22(13) M_B_DQ23(13) M_B_DQ24(13) M_B_DQ25(13) M_B_DQ26(13) M_B_DQ27(13) M_B_DQ28(13) M_B_DQ29(13) M_B_DQ30(13) M_B_DQ31(13) M_B_DQ32(13) M_B_DQ33(13) M_B_DQ34(13) M_B_DQ35(13) M_B_DQ36(13) M_B_DQ37(13) M_B_DQ38(13) M_B_DQ39(13) M_B_DQ40(13) M_B_DQ41(13) M_B_DQ42(13) M_B_DQ43(13) M_B_DQ44(13) M_B_DQ45(13) M_B_DQ46(13) M_B_DQ47(13) M_B_DQ48(13) M_B_DQ49(13) M_B_DQ50(13) M_B_DQ51(13) M_B_DQ52(13) M_B_DQ53(13) M_B_DQ54(13) M_B_DQ55(13) M_B_DQ56(13) M_B_DQ57(13) M_B_DQ58(13) M_B_DQ59(13) M_B_DQ60(13) M_B_DQ61(13) M_B_DQ62(13) M_B_DQ63(13)
DDR_VTTT_PG_CTRL (35)
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8
M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21
Stuff Q54 for both UMA and GPU in DDR_VTT_CNTL
SKL ULT (DDR3L)SKL ULT (DDR3L)
U35C
DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]
SKL_ULT/BGA
REV = 1
M_A_A[15:0]
DDR0_ALERT# DDR1_ALERT#
&-./-)0122304)41)56%)
?
SKL_ULT
DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]
DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]
DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR CH - B
3 OF 20
M_A_A[15:0] (12)
DDR1_ODT[1]
DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]
DDR1_MA[3] DDR1_MA[4]
DDR1_PAR
?
AN45 AN46 AP45 AP46
AN56 AP55 AN55 AP53
BB42 AY42 BA42 AW42
AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52
BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47
AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21
AN43 AP43 AT13 AR18 AT18 AU18
M_B_ODT0 M_B_ODT1
M_B_A5 M_B_A9 M_B_A6 M_B_A8 M_B_A7
M_B_A12 M_B_A11 M_B_A15 M_B_A14
M_B_A13
M_B_A2
M_B_A10 M_B_A1 M_B_A0 M_B_A3 M_B_A4
M_B_DQS#0
M_B_DQS0
M_B_DQS#1
M_B_DQS1
M_B_DQS#2
M_B_DQS2
M_B_DQS#3
M_B_DQS3
M_B_DQS#4
M_B_DQS4
M_B_DQS#5
M_B_DQS5
M_B_DQS#6
M_B_DQS6
M_B_DQS#7
M_B_DQS7
DDR1_ALERT# TP_DDR1_PARITY # CPU_DRAMRST#
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
M_B_A[15:0]
M_B_CLK0# (13) M_B_CLK1# (13)
M_B_CLK0 (13) M_B_CLK1 (13)
M_B_CKE0 (13) M_B_CKE1 (13)
M_B_CS#0 (13) M_B_CS#1 (13) M_B_ODT0_DIMM (13) M_B_ODT1_DIMM (13)
M_B_BS#2 (13)
M_B_CAS# (13) M_B_WE# (13) M_B_RAS# (13) M_B_BS#0 (13)
M_B_BS#1 (13)
M_B_DQS#0 (13) M_B_DQS0 (13) M_B_DQS#1 (13) M_B_DQS1 (13) M_B_DQS#2 (13) M_B_DQS2 (13) M_B_DQS#3 (13) M_B_DQS3 (13) M_B_DQS#4 (13) M_B_DQS4 (13) M_B_DQS#5 (13) M_B_DQS5 (13) M_B_DQS#6 (13) M_B_DQS6 (13) M_B_DQS#7 (13) M_B_DQS7 (13)
%&'()*+(,
TP18
M_B_A[15:0] (13)
DRAMRST
+1.35VSUS
A A
CPU DRAM
CPU_DRAMRST#
5
4
3
12
R679 470_4
R670 *short_4
12
C750
*0.1u/16V_4
DDR3_DRAMRST# (12 ,13)
2
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
PROJECT :
Skylake 2/3 (DDR3 I/F)
Skylake 2/3 (DDR3 I/F)
Skylake 2/3 (DDR3 I/F)
R685120/F_4
R67880.6/F_4
R681100/F_4
ZRW
ZRW
ZRW
3A
3A
348
348
1
348
3A
Page 4
5
Dr-Bios.com
4
3
2
1
SKL ULT (SIDEBAND ) GPIO
H_PECI (50ohm) Route on microstrip only Spacing >18 mils Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
Touch PAD
Touch Screen
R196*IV@10K_4
R256*100K_4
R199*10K_4
UMA boot
GPU boot
+3V
Trace Length: 1~11.25 inches
UART2 for RMT
HDA
PCH_AZ_CODEC_SYNC(24)
PCH_AZ_CODEC_BITCLK(24)
PCH_AZ_CODEC_SDOUT(24)
PCH_AZ_CODEC_SDIN0(24)
PCH_AZ_CODEC_RST#(24)
Reserve connect to DMI C (acer request 1/14)
SPKR
R624 *20K_4
D D
+3V_S5
I2C0_SDA
R1672.2K_4
I2C0_SCL
R1662.2K_4
I2C1_SDA
R165*2.2K_4
I2C1_SCL
R169*2.2K_4
PU 2.2K for touch pad I2C bus(400 KHz)
+3V
+3V
DGPU_PW_CTRL#
C C
high
low
DGPU_PW_CTRL#(2)
R127 EV@100K_4
GPU Control PU/PD
R220*EV@10K_4
R257*10K_4
R204*10K_4
20131015 For GC6 NV DG GC6_FB_EN PD.1A-1
R208 10K_4
UMA Only
GPU power is control by PCH GPIO (Discrete, SG or Optimize)
DGPU_PW_CTRL#
DGPU_PWROK
VGPU_EN
DGPU_PWR_EN
GC6_FB_EN
DGPU_HOLD_RST#
R115 IV@1K_4
DGPU_PWROK PD on GPU side
Setup
DGPU_PW_CTRL#
UMA Only
SG/Optimise
VGA H/W
Menu
Signal
UMA
1
0
Hidden
Hidden
GPU
545659-103
Add GPU Power Con trol Siganls
Touch PAD
Touch Screen
DMIC_CLK0_L(24) DMIC_DATA0_L(24)
DGPU_HOLD_RST#(14)
DGPU_PWR_EN(42)
DGPU_PWROK(16) GC6_FB_EN(15,17)
DGPU_EVENT#(17)
C739 *10p/50V_4
ODD_PRSNT#(25)
VGPU_EN(41)
ACCEL_INTA(27)
TP_INT_PCH(21)
I2C0_SDA(27)
I2C0_SCL(27)
I2C1_SDA(21)
I2C1_SCL(21)
C742 *10p/50V_4
R667 33_4 R644 33_4 R645 33_4
R660 33_4R110 *10K_4
R769 *33_4 R770 *33_4
Strapping
SPKR(24)
TPD_INT#_D
UART2_RXD UART2_TXD UART2_RTS# UART2_CTS#
I2C0_SDA I2C0_SCL
I2C1_SDA I2C1_SCL
HDA_SYNC_R HDA_BCLK_R HDA_SDO_R
HDA_RST#_R
DMIC_CLK0_R DMIC_DATA0_R
SPKR
GSPI0_MOSI
GSPI1_MOSI
Skylake-U Strapping Table
Pin Name Strap description
GPP_B14 (SPKR)
B B
GPP_B18 (GSPI0_MOSI)
GPP_C2 (SMBALERT#)
GPP_B22 (GSPI1_MOSI)
GPP_C5 (SML0ALERT#)
SPI0_MOSI
SPI0_MISO
GPP_B23 (SML1ALERT# /PCHHOT#)
SPI0_IO2
A A
SPI0_IO3
HDA_SDO / I2S_TXD0
GPP_E19 (DDPB_CTRLDATA)
GPP_E21 (DDPC_CTRLDATA)
Top-Block Swap override PCH_PWROK
No reboot PCH_PWROK
TLS Confidentiality
Boot BIOS Strap Bit (BBS)
eSPI or LPC
Reserved
Reserved
Reserved
Reserved
Reserved
Flash Descriptor Security Override / Intel ME Debug Mode
Display Port B Det ected
Display Port C Detec ted
5
Sampled
RSMRST#
PCH_PWROK
RSMRST#
RSMRST#
RSMRST#
RSMRST#
RSMRST#
RSMRST#
PCH_PWROK
PCH_PWROK
PCH_PWROK
Configuration note
0 = *Disable T op Swap (iPD 20K)
1 = Enable Top Swap Mode
0 = *Disable No Reboot (iPD 20K)
1 = Enable No Reboot Mode
0 = *Disable I ntel ME Cryp to TLS(iPD 20K)
1 = Enable Int el ME Cryp to T LS
0 = *SPI (iP D 20K)
1 = LPC
0 = *LPC is sel ected for EC (iPD 20K)
1 = eSPI select ed for EC
+3V
+3V
+3V_S5
+3V
+3V_S5
(iPU 15 ~ 40K)
(iPU 15 ~ 40K)
(iPD 20K)
(iPU 15 ~ 40K)
(iPU 15 ~ 40K)
0 = *Enable secu rity in the Flash Description (iPD 20K)
1 = Disable Fl ash Descriptor Securi ty (Override)
0 = *Port B i s not detected ( iPD 20K)
1 =Port B i s detected
0 = *Port C i s not detected ( iPD 20K)
1 =Port C is det ected
4
R625 *1K_4
R619 *1K_4
R160 *10K_4
R207 *1K_4
change location to near CPU to prevent impact HDA_SDO signal
HDA_SDO_R
AN8
AP7 AP8
AR7
AM5 AN7
AP5
AN5
AB1 AB2 W4 AB3
AD1 AD2 AD3 AD4
U7 U6
U8 U9
AH9
AH10
AH11 AH12
AF11 AF12
BA22 AY22 BB22 BA21 AY21
AW22
J5
AY20
AW20
AK7 AK6 AK9
AK10
H5 D7
D8 C8
AW5
R586 *1K_4
R737 1K_4
U35F
LPSS ISH
GPP_B15/GSPI0_CS# GPP_B16/GSPI0_CLK GPP_B17/GSPI0_MISO GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS# GPP_B20/GSPI1_CLK GPP_B21/GSPI1_MISO GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD GPP_C9/UART0_TXD GPP_C10/UART0_RTS# GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD GPP_C21/UART2_TXD GPP_C22/UART2_RTS# GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL
SKL_ULT/BGA
REV = 1
U35G
AUDIO
HDA_SYNC/I2S0_SFRM HDA_BLK/I2S0_SCLK HDA_SDO/I2S0_TXD HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_RST#/I2S1_SCLK GPP_D23/I2S_MCLK I2S1_SFR M I2S1_TX D
GPP_F1/I2S2_SFRM GPP_F0/I2S2_SCLK GPP_F2/I2S2_TXD GPP_F3/I2S2_RXD
GPP_D19/DMIC_CLK0 GPP_D20/DMIC_DATA0
GPP_D17/DMIC_CLK1 GPP_D18/DMIC_DATA1
+3V_S5
GPP_B14/SPKR
SKL_ULT/BGA
REV = 1
SPKR
GSPI0_MOSI
GSPI1_MOSI
3
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5
+3V_S5
+1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
ME_WR# (29)
SKL_ULT
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
SKL_ULT
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
7 OF 20
SMBALERT# (7)
SML0ALERT# (7)
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+1.8V_S5 +1.8V_S5
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
6 OF 20
SDIO/SDXC
SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3
GPP_G5/SD_CD# GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
+1.8V_S5
?
AB11 AB13 AB12 W12 W11 W10 W8 W7
BA9 BB9
AB7
AF13
GPP_D9 GPP_D10 GPP_D11 GPP_D12
P2 P3 P4 P1
M4 N3
N1 N2
AD11 AD12
U1 U2 U3 U4
AC1 AC2 AC3 AB4
AY8 BA8 BB7 BA7 AY7 AW7 AP13
?
R174200/F_4
Touchpad INT
2
Reserve UART FFC conn ector for Win 7 debug
UART2_RXD
R275 *49.9K/F_4
UART2_TXD
R280 *49.9K/F_4
UART2_RTS#
R283 *49.9K/F_4
UART2_CTS#
R290 *49.9K/F_4
+5V
CN3
UART2_RXD UART2_TXD UART2_RTS# UART2_CTS#
TPD_INT#_D
S5 S5
TPD_INT#(27,29)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
1 2 3
7 4 8 5 6
*UART Function
+3V_S5
R177TDI@100K_4
+3V
2
1
Skylake 6/7 (PEG/DMI/FDI)
Skylake 6/7 (PEG/DMI/FDI)
Skylake 6/7 (PEG/DMI/FDI)
3
Q20
TDI@2N7002K
R164 *0_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
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TPD_INT#_D
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Dr-Bios.com
Backside cap
C184
1U/6.3V_2
C243 22u/6.3V_6
C233 22u/6.3V_6
C226 22u/6.3V_6
C203 22u/6.3V_6
C219 22u/6.3V_6
C224 22u/6.3V_6
C236 22u/6.3V_6
Backside cap
C214
C245
C676
1U/6.3V_2
1U/6.3V_2
D D
C282
C272
C273 22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
10u/6.3V_4
C289 22u/6.3V_6
10u/6.3V_4
Backside cap
C259 10u/6.3V_4
C189
1U/6.3V_2
C647 10u/6.3V_4
C252
1U/6.3V_2
C651 10u/6.3V_4
Backside cap
C212
C196
1U/6.3V_2
1U/6.3V_2
C181
C228
1U/6.3V_2
1U/6.3V_2
+VCCEOPIO
C708
GT3@10u/6.3V_4
+1.8V_PRIM
GT3@10u/6.3V_4
C C
B B
A A
C687
R565
C709 GT3@10u/6.3V_4
Backside cap
C686 GT3@10u/6.3V_4
GT3@0_6
5
Backside cap
+1.8V_PRIM+1.8V_S5
C201
1U/6.3V_2
Backside cap
C269
1U/6.3V_2
For 2+3e CPU
For 2+3e CPU
C186 10u/6.3V_4
C197
1U/6.3V_2
C262
1U/6.3V_2
C237
1U/6.3V_2
C185 10u/6.3V_4
C194
1U/6.3V_2
C215
1U/6.3V_2
C209
1U/6.3V_2
C682 GT3@10u/6.3V_4
C155 10u/6.3V_4
C193
1U/6.3V_2
+1.35VSUS
Backside cap
+1V_SUS
C227
C246
1U/6.3V_2
1U/6.3V_2
C285
1U/6.3V_2
Backside cap
C688
GT3@1U/6.3V_2
Backside cap
C158
C232
10u/6.3V_4
10u/6.3V_4
Backside cap
C241
C188
1U/6.3V_2
1U/6.3V_2
C318 10u/6.3V_4
C326 10u/6.3V_4
R194 *short_4
1 2
Rev:F change to Shortpad
+VCCIO
Rev:F change to Shortpad
+1V_SUS
Rev:F change to Shortpad
4
C255
C251
22u/6.3V_6
22u/6.3V_6
C657
C257
10u/6.3V_4
10u/6.3V_4
C235
C222
1U/6.3V_2
1U/6.3V_2
C200
1U/6.3V_2
100 ohm near CPU
1.0V_CPU 3A
C681
C684
GT3@1U/6.3V_2
GT3@1U/6.3V_2
For 2+3e CPU
C218 10u/6.3V_4
C240
1U/6.3V_2
Backside cap
C313
C328
1U/6.3V_2
10u/6.3V_4
Primary side cap
C323 10u/6.3V_4
+VDDQC
C299
1U/6.3V_2
R550 *shor t_6
Primary side cap
R135 *shor t_6
R112 *shor t_6
4
+VCCCORE
+1.8V_PRIM
+VCCOPC
+VCCOPC_SRC(33)
681_AGND(33)
For 2+3e CPU
+VCCOPC_SRC 681_AGND
+VCCOPC
C685
C683
GT3@1U/6.3V_2
GT3@1U/6.3V_2
C161
C151
10u/6.3V_4
10u/6.3V_4
C198
C239
1U/6.3V_2
1U/6.3V_2
100 ohm Near CPU
VCCGT_SEN SE(36) VSSGT_SE NSE(36)
C311
C308
1U/6.3V_2
1U/6.3V_2
C325
C327
10u/6.3V_4
10u/6.3V_4
+1V_VCCST
C286 10u/6.3V_4
C677
1U/6.3V_4
Backside cap
Primary side cap
+VCCOPC
For 2+3e CPU
+1.8V_PRIM
C689
GT3@1U/6.3V_2
+VCCGT
C223 10u/6.3V_4
C204
1U/6.3V_2
C205
1U/6.3V_2
R155 100/F_4
R161 100/F_4
C312
1U/6.3V_2
+VCCSTG
TP12
TP20
R172 GT3@100/F_4
R634 GT3@0_4 R636 GT3@0_4
R176 GT3@100/F_4
+VCCEOPIO
R633 GT3@0_4 R632 GT3@0_4
C148 10u/6.3V_4
C206
1U/6.3V_2
C195
1U/6.3V_2
+VCCGT
+1.35VSUS
C176
1U/6.3V_4
+VCCPLL
C172
1U/6.3V_4
A30 A34 A39
A44 AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40 AM32 AM33 AM35 AM37 AM38
G30
K32
AK32
AB62
P62
V62
H63
G61
AC63 AE63
AE62 AG62
AL63 AJ62
A48
A53
A58
A62
A66 AA63 AA64 AA66 AA67 AA69 AA70 AA71 AC64 AC65 AC66 AC67 AC68 AC69 AC70 AC71
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
REV = 1
AU23 AU28 AU35 AU42 BB23 BB32 BB41 BB47 BB51
AM40
A18
A22
AL23
K20
K21
U35L
VCC_A30
S0
VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62 VCCOPC_P62 VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE VSSOPC_SENSE
VCCEOPIO
S0
VCCEOPIO
VCCEOPIO_SENSE VSSEOPIO_SENSE
SKL_ULT/BGA
REV = 1
SKL_ULT
U35M
CPU POWER 2 OF 4
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
S0
VCCGT
0.55~1.5V
VCCGT VCCGT VCCGT VCCGT
2+3e peak 6A
VCCGT
2+3e TPY 4A
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGT_SENSE VSSGT_SENSE
SKL_ULT/BGA
U35N
SKL_ULT
CPU POWER 3 OF 4
S3
DDR3L
VDDQ_AU23 VDDQ_AU28
1.35V
VDDQ_AU35 VDDQ_AU42 VDDQ_BB23 VDDQ_BB32 VDDQ_BB41 VDDQ_BB47 VDDQ_BB51
VDDQC
VCCST
S3
1.0V
VCCSTG_A22
S0
VCCPLL_OC
S0
1.0V
VCCPLL_K20 VCCPLL_K21
S3
1.0V
SKL_ULT/BGA
3
?
SKL_ULT
CPU POWER 1 OF 4
VCC
0.55V~1.5V
2+2 peak 24A 2+2 TPY 17A
2+3e peak 24A 2+3e TPY 17A
1.0V
S0
Sx
1.8V
GT3 CPU
1.0V
?
VCCGT
S0
0.55~1.5V
2+2 peak 31A 2+2 TPY 15A
2+3e peak 56A 2+3e TPY 17A
VCCGTX
2+2 X
13 OF 20
?
S0
0.85V/0.95V
2A
S0
1.15V
2+2 peak 5A 2+2 TPY 4A 2+3e peak 5.1A 2+3e TPY 5A
120mA
40mA
1.0V
260mA
120mA
14 OF 20
3
3A
50mA
3A
12 OF 20
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70
VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56
VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63 VCCGTX_BB57 VCCGTX_BB66
VCCGTX_SENSE VSSGTX_SENSE
VCCIO
3.0A
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VCCIO_SENSE VSSIO_SENSE
VSSSA_SENSE VCCSA_SENSE
REV = 1
VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42
VCC_J30 VCC_J33 VCC_J37
VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43
VCC_SENSE VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
?
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
?
G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43
E32 E33
B63 A63 D64
G20
?
+VCCGT
N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62
AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66
AK62 AL61
R109 100/F_4
R122 100/F_4
100 ohm near CPU
+VCCCORE
C174
1U/6.3V_4
C199 47u/6.3V_8
C693 22u/6.3V_6
C692 22u/6.3V_6
+VCCGT
C303 GT3@22u/6.3V_6
C291 GT3@10u/6.3V_4
TP86 TP87
TP17 TP14
VSASS_SEN SE (36) VSA_SENSE (36)
+VCCSA
C666 47u/6.3V_8
C679 10u/6.3V_4C258
R96 100/ F_4
R98 100/ F_4
+VCCSTG
C190 47u/6.3V_8
C705 22u/6.3V_6
C704 22u/6.3V_6
C310 GT3@22u/6.3V_6
C279 GT3@10u/6.3V_4
+VCCIO
+VCCSA
2
Primary side cap
C645
C144
47u/6.3V_8
47u/6.3V_8
Primary side cap
C667
C674
10u/6.3V_4
10u/6.3V_4
+VCCCORE
100 ohm Near CPU
VCORE_SE NSE (36) VCORESS_ SENSE (36)
H_CPU_SVIDART# H_CPU_SVIDCLK H_CPU_SVIDDAT
Primary side cap
C702 47u/6.3V_8
Primary side cap
C706
C178
22u/6.3V_6
22u/6.3V_6
Primary side cap
C202
C694
47u/6.3V_6
22u/6.3V_6
E3A C202 change to 47u/6.3v_6
Primary side cap
C277
C302
22u/6.3V_6
GT3@22u/6.3V_6
REV:F Stuff C277,C274,C275
For 2+3e CPU
Backside cap
C324
C281
GT3@10u/6.3V_4
GT3@10u/6.3V_4
Backside cap
C283
C284
10u/6.3V_4
10u/6.3V_4
Primary side cap
C701
C710
1U/6.3V_4
1U/6.3V_4
Backside cap
C254
C238
10u/6.3V_4
10u/6.3V_4
Backside cap
C207
C278
1U/6.3V_2
1U/6.3V_2
Primary side cap
C114
C643
10u/6.3V_4
10u/6.3V_4
2
C650 47u/6.3V_8
C664 10u/6.3V_4
C171 22u/6.3V_6
C691 22u/6.3V_6
C307 GT3@22u/6.3V_6
C316 GT3@10u/6.3V_4
C266
1U/6.3V_2
C700
1U/6.3V_4
C247 10u/6.3V_4
C216
1U/6.3V_2
C641 10u/6.3V_4
C690 47u/6.3V_8
C659 47u/6.3V_8
C673 10u/6.3V_4
C707 22u/6.3V_6
C703 22u/6.3V_6
C274 22u/6.3V_6
C280 GT3@10u/6.3V_4
Imax 3(A)
C297
1U/6.3V_2
C711
1U/6.3V_4
C229 10u/6.3V_4
C242
1U/6.3V_2
C165 10u/6.3V_4
C150 47u/6.3V_8
C663
C675
10u/6.3V_4
10u/6.3V_4
+1V_VCCST
SVID
R138 100/F_4
H_CPU_SVIDDAT
Place PU resistor close to CPU
Place PU resistor close to CPU
H_CPU_SVIDART#
R552 220_4
H_CPU_SVIDCLK
C697
C248
47u/6.3V_8
47u/6.3V_8
C210 47u/6.3V_6
E3A C210 change to 47u/6.3v_6
C275
C276
22u/6.3V_6
GT3@22u/6.3V_6
C317
C290
GT3@10u/6.3V_4
GT3@10u/6.3V_4
C264
C298
1U/6.3V_2
1U/6.3V_2
C263
C221
10u/6.3V_4
10u/6.3V_4
C267
C260
1U/6.3V_2
1U/6.3V_2
C642
C157
10u/6.3V_4
10u/6.3V_4
1
C678 10u/6.3V_4
Layout note: need routing together and ALERT need between CLK and DATA.
C814 1000P/50V_4
+1V_VCCST
C696 47u/6.3V_8
C288 10u/6.3V_4
C249
1U/6.3V_2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C816
C815
*1000P/50V_4
*1000P/50V_4
REV:F add 1000p
R134
54.9/F_4
Skylake 12/13/1 4 (POWER)
Skylake 12/13/1 4 (POWER)
Skylake 12/13/1 4 (POWER)
Monday , J uly 20, 201 5
Monday , J uly 20, 201 5
Monday , J uly 20, 201 5
C818
C817
*1000P/50V_4
*1000P/50V_4
H_CPU_SVIDDAT (36)
VR_SVID_ALE RT#_VCOR E (36)
H_CPU_SVIDCLK (36)
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Skylake ULT (GPU, SATA , ODD, CLK ,USB2&3)
?
U35H
PCIE/USB3/SATA
PEG_RX#0(14)
PEG_RX0(14)
D D
dGPU PEG*4
LAN
WIFI
C C
B B
PEG_TX#0(14)
PEG_TX0(14)
PEG_RX#1(14)
PEG_RX1(14)
PEG_TX#1(14)
PEG_TX1(14)
PEG_RX#2(14)
PEG_RX2(14)
PEG_TX#2(14)
PEG_TX2(14)
PEG_RX#3(14)
PEG_RX3(14)
PEG_TX#3(14)
PEG_TX3(14)
PCIE_RX5-_LAN(23) PCIE_RX5+_LAN(23) PCIE_TX5-_LAN(23)
PCIE_TX5+_LAN(23)
PCIE_RX6-_WLAN(26) PCIE_RX6+_WLAN(26)
PCIE_TX6-_WLAN(26) PCIE_TX6+_WLAN(26)
CLK_PCIE_VGA#(14)
CLK_PCIE_VGA(14)
CLK_PEGA_REQ#(14)
N16S VGALANWLAN
CLK_PCIE_LANN(23)
CLK_PCIE_LANP(23)
CLK_PCIE_LAN_REQ#(23)
CLK_PCIE_WLANN(26) CLK_PCIE_WLANP(26)
PCIE_CLKREQ_WLAN#(26)
HDD
ODD
C653 [email protected]/10V_4 C652 [email protected]/10V_4
C656 [email protected]/10V_4 C655 [email protected]/10V_4
C661 [email protected]/10V_4 C662 [email protected]/10V_4
C654 [email protected]/10V_4 C660 [email protected]/10V_4
C668 0.1u/16V_4 C669 0.1u/16V_4
C648 0.1u/16V_4 C649 0.1u/16V_4
SATA_RXN0(25)
SATA_RXP0(25) SATA_TXN0(25) SATA_TXP0(25)
SATA_RXN1(25)
SATA_RXP1(25) SATA_TXN1(25) SATA_TXP1(25)
R562 100/F_4
TP91 TP92
R235
*short_4
TP22
TP25
TP73
R229
*short_4
R224
*short_4
XDP_PRDY# XDP_PREQ# PIRQA#
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
Rev:D change to shortpad
A A
CLK_PCIE_REQ0# CLK_PCIE_REQ1# CLK_PCIE_REQ2# CLK_PCIE_REQ3# CLK_PCIE_REQ4# CLK_PCIE_REQ5#
R234 10K_4 R215 10K_4 R227 10K_4 R618 10K_4 R228 10K_4 R223 10K_4
+3V
C_PEG_TX#0 C_PEG_TX0
C_PEG_TX#1 C_PEG_TX1
C_PEG_TX#2 C_PEG_TX2
C_PEG_TX#3 C_PEG_TX3
PCIE_TX5­PCIE_TX5+
PCIE_TX6­PCIE_TX6+
PCIE_RCOMPN PCIE_RCOMPP
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_T XN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_T XN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_T XN
A21
PCIE7_TXP/SATA0_T XP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_T XN
C21
PCIE8_TXP/SATA1A_T XP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_T XN
C24
PCIE11_TXP/SATA1B_T XP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_T XN
B25
PCIE12_TXP/SATA2_T XP
SKL_ULT/BGA
REV = 1
U35J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKL_ULT/BGA
REV = 1
+3V_S5
5
4
SKL_ULT
SSIC / USB3
USB2
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5
+3V_S5
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1
+3V_S5
GPP_E2/SATAXPCIE2/SATAGP2
+3V_S5
+3V_S5
8 OF 20
?
SKL_ULT
CLOCK SIGNALS
+3V_S5
CLKOUT_ITPXDP_N
+3V_S5
+3V_S5
+3V_S5
+3V_S5
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XCLK_BIASREF
+3V_S5
+3V_S5
10 OF 20
Rev:D add for EC reset RTC
EC_RTCRST(29)
USB3_1_RXN USB3_1_RXP USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN USB3_2_RXP/SSIC_1_RXP USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN USB3_3_RXP/SSIC_2_RXP USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN USB3_4_RXP USB3_4_TXN
USB3_4_TXP
USB2_COMP
USB2_VBUSSENSE
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2
GPP_E8/SATALED#
?
F43 E43
BA17
E37
XTAL24_IN
E35
XTAL24_OUT
E42
AM18
RTCX1
AM20
RTCX2
AN18
SRTCRST#
AM16
RTCRST#
?
2
R786 100K_4
H8 G8 C13 D13
J6 H6 B13 A13
J10 H10 B15 A15
E10 F10 C15 D15
AB9
USB2N_1
AB10
USB2P_1
AD6
USB2N_2
AD7
USB2P_2
AH3
USB2N_3
AJ3
USB2P_3
AD9
USB2N_4
AD10
USB2P_4
AJ1
USB2N_5
AJ2
USB2P_5
AF6
USB2N_6
AF7
USB2P_6
AH1
USB2N_7
AH2
USB2P_7
AF8
USB2N_8
AF9
USB2P_8
AG1
USB2N_9
AG2
USB2P_9
AH7
USB2N_10
AH8
USB2P_10
AB6 AG3
USB2_ID
AG4
A9 C9 D9 B9
J1 J2 J3
H2 H3 G4
H1
CLK_PCIE_XDPN CLK_PCIE_XDPP
SUSCLK
XTAL24_IN XTAL24_OUT
XCLK_BIASREF
RTC_X1 RTC_X2
SRTC_RST# RTC_RST#
SRTC_RST#
3
PQ6059 *2N7002K
1
Rev:E Reserve o nly Rev:E Reser ve only
USB3_RXN0 (28) USB3_RXP0 (28) USB3_TXN0 (28) USB3_TXP0 (28)
USB3_RXN1 (28) USB3_RXP1 (28) USB3_TXN1 (28) USB3_TXP1 (28)
USBP0- (28) USBP0+ (28)
USBP1- (28) USBP1+ (28)
USBP3- (28) USBP3+ (28)
USBP4- (26) USBP4+ (26)
USBP5- (21) USBP5+ (21)
USBP6- (21) USBP6+ (21)
USBP7- (28) USBP7+ (28)
USBCOMP
R178 113/F_4
USB2_ID
R587 1K_4 R778 1K_4
USB_OC0# USB_OC1# USB_OC2# USB_OC3#
SATA_DEVSLP0 SATA_DEVSLP1 SATA_DEVSLP2
SATAGP0 SATAGP1 SATAGP2
TP93 TP94
SUSCLK (26)
R512 2.7K/F_4 R768 *60.4/F_4
RTC_RST# (11)
1V power plane
0.71 checklist p14
3
1A-1
USB_OC0# (28) USB_OC1# (28) USB_OC2# (28)
DEVSLP0 (25)
EC_RTCRST
MB USB3.0 CN16 ( Charger IC ) Down
MB USB3.0 CN13 -> Up
MB USB3.0 CN16 ( Charger IC ) Down
MB USB3.0 CN13 -> Up
DB USB2.0
BT
Touch Screen
CCD
Card reader
USBCOMP Impedance = 50 ohm Trace length < 500 m ils Trace spacing = 15 m ils
MB U3 MB U3 DB U2
+1V_S5
Reserve PD 60 ohm in E42 ball for Cannonlake U
RTC_RST#
3
2
PQ6060 *2N7002K
1
Add SSD ID 1/1 4
Hight is SSD , Low is ODD
SSD_ID(25)
Skylake-U userd 24 MHz (50 Ohm ESR) XTAL
XTAL24_IN XTAL24_OUT
Note: Change Y4 to 38.4 MHz(ESR 30 ohm) for Cannonlake U
RTC Clock 32.768KHz (RTC)
Trace length < 1000 mils
RTC Circuitry (RTC)
+3VPCU
On SKL voltage at VCCRTC does not exceed 3.2V
R304
1.5K/F_4
VCCRTC_2
R301
45.3K/F_4
2013/10/16 Chage +3V_RTC_0 to VCCTC_2.
1A-2
1. AHL03003057 DBV CR2032
2. AHL03003003 VDE CR2032
2
PCH PU/PD
USB_OC0# USB_OC1# USB_OC2# USB_OC3#
SATA_DEVSLP0 SATA_DEVSLP1 SATA_DEVSLP2 PIRQA#
SATAGP1 SATAGP2
R568 10K_4
C351 6.8p/50V_4
C362 6.8p/50V_4
1B-1
R308 1K_4
12
BT1
BAT_CONN
SATAGP0
C665 10P/50V_4
4
3
Y4
R536
24MHz
1M_4
1
2
C658 10P/50V_4
12
Y2
32.768KHZ
D7
+3V_RTC_2
+3V_RTC_1
+3V_RTC_[0:2] Trace width = 20 m ils
BAT54C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
+3V_S5
R541 10K_4 R540 10K_4 R543 10K_4 R542 10K_4
R573 *10K_4 R574 *10K_4 R575 *10K_4 R631 *10K_4
R569 *10K_4 R566 *10K_4
+3V_S5
R570 100K_4
CH01006JB08 -> 10p CH01506JB06 -> 15p CH-6806TB01 -> 6.8p
RTC_X1
R255 10M_4
RTC_X2
+3V_RTC
+3V_RTC
Trace width = 30 m ils
R299
20K/F_4
R300
20K/F_4
C381 1u/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Skylake 9/10 (PEG/USB/CLK)
Skylake 9/10 (PEG/USB/CLK)
Skylake 9/10 (PEG/USB/CLK)
!9
+3V
24MHz: BG624000078
38.4MHz : ?
BG332768453 - > SEG
BG332768104 - > TXC
12
C380 1u/6.3V_4
C382 1u/6.3V_4
ZRW
ZRW
ZRW
1
RTC_RST#
J1 *JUMP
SRTC_RST#
3A
3A
648
648
648
3A
Page 7
5
Dr-Bios.com
4
3
2
1
?
U35E
SPI - FLASH
EC_RCIN#
PCH_SPI_CS0# PCH_SPI_CS1#
AV2
SPI0_CLK
AW3
SPI0_MISO
AV3
SPI0_MOSI
AW2
SPI0_IO2
AU4
SPI0_IO3
AU3
SPI0_CS0#
AU2
SPI0_CS1#
AU1
SPI0_CS2#
SPI - TOUCH
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
C LINK
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
AW13
GPP_A0/RCIN#
AY11
GPP_A6/SERIRQ
SKL_ULT/BGA
REV = 1
PCH_SPI_SO PCH_SPI_SO_EC
PCH_SPI_CLK_R PCH_SPI_SI_R PCH_SPI_SO_R
only 0ohm option
1A-13
+3V_S5
+3V_S5
+3V_PCH_ME
PCH_SPI_CLK PCH_SPI_SO PCH_SPI_SI PCH_SPI_IO2
D D
For M.2 wifi module must
Rev:D change to shortpad
C C
SPI ROM
Skylake
3.3V
B B
Vender Size Quanta P/N Vender P/N
8M 8M
PCH_SPI_CLK_EC(29)
PCH_SPI_SI_EC(29) PCH_SPI_SO_EC(29)
SPI_CS0#_UR_ME(29)
SIO_RCIN#(29)
IRQ_S ERIRQ(25,29)
AKE3EFP0N07
AKE2EZN0Q00
+3V_PCH_ME
PCH_SPI_IO3 PCH_SPI_CS0# PCH_SPI_CS1# SML0ALERT#
CL_CLK
TP68
CL_DAT
TP66
CL_RST#
TP67
R652 *short_4
IRQ_S ERIRQ
W25Q64FVSSIQWND
GD25B64CSIGRGGD
R689 *4M@33_4 R641 *4M@33_4 R594 *4M@33_4
R602 8M@0_4 R603 *4M@0_4
R591 10K_4
SPI_CS0#_UR_ME
SKL_ULT
+3V_S5
LPC
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5
5 OF 20
+3V_S5
+3V_S5 +3V_S5
+3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
PCH SPI ROM(8M+4M)
15ohm CS01502JB12 33ohm CS03302JB29
PCH_SPI_CS0#
R588 8M@15_4
3.3K is original and for no support fast read function
PCH_SPI_CS1# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO
C745 *22p/50V_4
R649 1K_4
R669 *4M@33_4 R658 *4M@33_4 R604 *4M@33_4
PCH_SPI_CLK_R PCH_SPI_SI_R PCH_SPI_SO_R
+3V_PCH_ME
SPI_SO_8M
SMBUS, SMLINK
+3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
GPP_A14/SUS_STAT#/ ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESP I_CLK
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI _IO0 GPP_A2/LAD1/ESPI _IO1 GPP_A3/LAD2/ESPI _IO2 GPP_A4/LAD3/ESPI _IO3
GPP_A5/LFRAME#/ESPI _CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
Rev:D change to shortpad
R700 *short_6
+3V_S5
U41
1
CS#
2
IO3/HOLD#
IO1/DO
3
4
W25Q64FV -- 8MB
SPI_WP_IO2_ME
PCH_SPI_IO2
PCH_SPI_IO3
R597 *1K_4
IO2/WP#
GND
IO0/DI
PCH_SPI_CLK_EC PCH_SPI_SI_EC
R596 *4M@33_4 R589 8M4M@15_4
R238 *4M@33_4 R239 8M4M@15_4
U39
1
CE#
6
SCK
5
SI
2
SO
3
WP#
*4M@ROM-4M_EC
SPI_WP_IO2_EC
R7
PCH_MBCLK0_R
R8
PCH_MBDAT0_R
R10
SMBALERT#
R9
VGA_MBC LK
W2
VGA_MBD ATA
W1
W3
SMB_ME1_CLK
V3
SMB_ME1_DAT
AM7
SML1ALERT#
eSPI change to 15 ohm
AY13
R659 *short_4
BA13
R640 *short_4
BB13
R653 *short_4
AY12
R668 *short_4
BA12 BA11
R748 *0_4
C806 0.1u/16V_4
eSPI change to 15 ohm
AW9
R623 22/J_4
AY9 AW11
R626 22/J_4 R627 22/J_4
CLKRUN#
2/10 add C806 for EMI request ,
?
R748 no stuiff from EC site move at CPU site
+3V_PCH_ME
8
VCC
7
SPI_HOLD_IO3_ME
6
SPI_CLK_8M
CLK
5
SPI_SI_8M
R687 8M@15_4 R654 8M@15_4
SPI_HOLD_IO3_ME
8
VDD
7
SPI_HOLD_IO3_EC
HOLD#
4
VSS
Rev:D change to shortpad
R698 1K_4R650 8M4M@15_4
R684 8M4M@15_4
R691 8M4M@15_4
SPI_WP_IO2_EC SPI_WP_IO2_ME
SPI_HOLD_IO3_EC
R232 *1K_4
C741 *[email protected]/16V_4
Strapping
SMBALERT# (4)
SML0ALERT# (4)
SMB1ALERT# (27)
ckl v0.71 p.24
LPC_LAD0 (25,26,29) LPC_LAD1 (25,26,29) LPC_LAD2 (25,26,29)
LPC_LAD3 (25,26,29) LPC_LFRAME# (25,26,29) ESPI_RST# (29)
CLK_PCI_EC (29)
PCLK_TPM (25) CLK_PCI_LPC (26)
CLKRUN# (25,29)
+3V_PCH_ME
C754 0.1u/16V_4
PCH_SPI_CLK
PCH_SPI_SI
C747 *22p/50V_4
reserve for SPI fast read
+3V_PCH_ME
CLKRUN# IRQ_S ERIRQ EC_RCIN#
R630 8.2K/F_4 R629 10K_4 R639 10K_4
SMBus
PCH_MBCLK0_R PCH_MBDAT0_R VGA_MBD ATA VGA_MBC LK
SML1ALERT#
Termination Resistor Requirement for PCH PCHHOT# Pin Reserve PU 150K resister
+3V
S5 S0
SMBus(PCH)
PCH_MBDAT0_R
PCH_MBCLK0_R
PCH_XDP_WLAN/S5 DDR_TP/S0
R5782.2K_4 R5802.2K_4 R5852.2K_4 R5822.2K_4
R205*150K_4
D2B change to 2.2k
R576
2.2K_4
Q32
5
2
6
43
1
2N7002DW
SMBus(EC)
2ND_MBCLK(17,29) 2ND_MBDATA(17,29)
EC/S5
2ND_MBCLK 2ND_MBDATA
R171 *short_4 R175 *short_4
Rev:D change to shortpad
+3V
+3V_S5
+3V_S5
!:
R572
2.2K_4
CLK_SDATA (12,13,27)
CLK_SCLK (12,13,27)
SMB_ME1_CLK SMB_ME1_DAT
1A-3 2013/10/16 Add U34 flash 4M ROM reserve for ZQ0D.
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
4
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
3
2
Monday, July 20, 2015
PROJECT :
Skylake 5 (SATA/HDA/SPI)
Skylake 5 (SATA/HDA/SPI)
Skylake 5 (SATA/HDA/SPI)
ZRW
ZRW
ZRW
748
748
1
748
3A
3A
3A
Page 8
5
Dr-Bios.com
4
3
2
1
PCI_PLTRST#
SYS_RESET#(11)
+VCCIO
11/12 Reserve PU 10K
R544 *10K_4
D D
Rev:D change to shortpad
PROC_PWRGD
Rev:D change to shortpad
Board ID
C1D
2
1
RAM_ID1 RAM_ID2 RAM_ID3 Board_ID0 Board_ID1 Board_ID2 Board_ID3 Board_ID4
Board_ID5 Board_ID6 Board_ID7
?@AB
IOACNon IOAC
G-sensor No G-sensor
TPM
touch panel
+3V
C332 0.1u/16V_4
U14
3 5
TC7SH08FU
<+'&%=>%!
R610 10K_4 R612 10K_4 R614 10K_4 R595 10K_4 R598 10K_4 R605 10K_4 R592 10K_4
R606 10K_4 R764 10K_4 R766 10K_4
VRAM 2GB VRAM 4GB
C C
<+'&%=>%"
<+'&%=>%#
<+'&%=>%$
<+'&%=>%7
B B
No TPM
No touch panel
PLTRST# Buffer
A A
PCI_PLTRST#
RSMRST#(29)
SYS_PWROK
R556 *short_4 R643 *0_4
PCH_SUSPWRACK_R(29)
PCH_SUSACK#(29)
PCIE_LAN_WAKE#(23,26)
+1.8V_S5
R611 *10K_4 R613 *10K_4 R615 *10K_4 R600 *10K_4 R599 *10K_4 R608 *10K_4 R590 *10K_4 R593 10K_4
R607 *10K_4 R765 *10K_4 R767 *10K_4
<+'&%=>%8
<+'&%=>%9
<+'&%=>%: Reserve
4
R214 100K_4
Realtek Audio codec
(Default)
Reserved (Default)
PLTRST# (14,23,25,26,29)
R655 *short_4
R554 10K_4
VCCST_PWRGD
R622 *0_4 R617 *0_4
SYS_RESET#
PCH_RSMRST#
PCIE_LAN_WAKE#
?@ABC1D
CPU DSP
ReserveReserved
PROC_PWRGD
SYS_PWROK_R EC_PWROK_R
DPWROK_R PCH_ACPRESENT
PCH_SUSPWRACK
SUSACK#_R
TP84
For platforms not supporting Deep Sx, connect directly to RSMRST#
U35K
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWR GD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL_ULT/BGA
REV = 1
U35I
CSI-2
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
SKL_ULT/BGA
Power Sequence
PCH_PWROK(29)
SYSPWOK
SYSTEM POWER MANAGEMENT
I I
REV = 1
SYS_PWROK
5
4
?
SKL_ULT
GPP_B12/SLP_S0#
+3V_S5
+3V_S5
+3V_S5
+3V_S5 +3V_S5 +3V_S5
SKL_ULT
+1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5 +1.8V_S5
Rev:D change to shortpad
DPWROK_R PCH_RSMRST#
DPWROK_R
U8 *TC7SH08FU
+3V_S5 +3V_S5
+3V_S5
+3V_S5
GPD9/SLP_WLAN#
+3V_S5
+3V_S5
GPD1/ACPRESENT
+3V_S5 +3V_S5
+3V_S5
+3V_S5
GPP_B11/EXT_PWR_GATE#
+3V_S5 +3V_S5
11 OF 20
?
+3V_S5
GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7
9 OF 20
EMMC
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK GPP_F12/EMMC_CMD
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC_RCOMP
?
GPP_B2/VRALERT#
Non Deep Sx
R647 *short_4
EC_PWROK SYS_PWROK_R
R131 *0_4
No Deep Sx
+3V_S5
4
3 5
R113 *0_4
R560 *short_4
Rev:D change to shortpad
R661 *short_4
R674 *0_4
C168 *0.1u/16V_4
2
EC_PWROK
1
GPD10/SLP_S5#
GPD3/PWRBTN#
GPD0/BATLOW#
Rev:D change to shortpad
GPD4/SLP_S3# GPD5/SLP_S4#
SLP_SUS# SLP_LAN#
GPD6/SLP_A#
GPP_A11/PME#
INTRUD ER#
C37 D37 C32 D32 C29 D29 B26 A26
E13 B7
AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1
AM2 AM3 AP4
AT1
AT11 AP15 BA16 AY16
AN15 AW15 BB17 AN16
BA15 AY15 AU13
AU11 AP16
INTRUDER#
AM10
MPHY_EXT_PWR
AM11
PCH_VRALERT#
?
R145 100/F_4
RAM_ID1 RAM_ID2 RAM_ID3 Board_ID0 Board_ID1 Board_ID2 Board_ID3 Board_ID4
Board_ID5 Board_ID6 Board_ID7
R616200/F_4
EC_PWROK_R
DPWROK_C (29)
EC_PWROK (29)
IMVP_PWRGD_3V (2)
R130 *10K_4
3
SUSB# SUSC# PCH_SLP_S5#
PCH_SLP_SUS# PCH_SLP_LAN# PCH_SLP_WLAN# PCH_SLP_A#
PCH_PWRBTN#
PCH_BATLOW#
R249 1M_4
TP19
TP63
Board_ID4 (21)
REV:E tPLT17(max 200us) ->SLP_S3# assertion to IMVP VR_ON(VRON) deassert ion
VRON(33, 36)
REV:F Stuff R792
TP29
SUS0# (29)
SUSB# (11,29,31) SUSC# (11,29) PCH_SLP_S5# (11)
PCH_SLP_SUS# (29)
TP30
Rev:D change to shortpad
TP23
R677*short_4
R676*short_4
U50 *TC7SH08FU
VCCST_PWRGD
TP74
+3V_RTC
4
R792 0_4
C136 *0.1u/16V_4
PCH_SLP_A# (11) DNBSWON# (29)
ACPRESENT (29)
+3V_S5
C813 *0.1u/16V_4
2
1
3 5
+1V_VCCST
R89 60.4/F_4
Shortpad change to 60.4 ohm. 11/6
VCCST_PWRGD_EN
REV:E tPLT15 (max 200us)
->SLP_S4# assertion to VDDQ(+1.35VSUS) ram p down start(SUSON)
REV:F Stuff R790
SUSB#
VRON_EC
CRB is via +1.05V PGVCCST PWRGD
+3V_S5
C164
R85
0.1u/16V_4
1K_4
VCCST_PWRGD_R
R103 *0_4 R102 0_4
2013/10/21 Del APWORK.1A-6
2
SUSON
SUSON(32,35)
VRON_EC (29)
U6
5
NC
VCC
A
4
GND
Y
74AUP1G07GW
PCH_PWROK HWPG
Rev:D change netmane for HWPG
PCH_VRALERT# SYS_RESET#
PCH_ACPRESENT PCH_BATLOW#
PCIE_LAN_WAKE#
MPHY_EXT_PWR
PCH_RSMRST# PCH_PWROK SYS_PWROK_R DPWROK_C
+3V_S5
C811 *0.1u/16V_4
4
U48
3 5
*TC7SH08FU
R790 0_4
REV:E tPLT18 (max 200 us)
->SLP_S3# assertion to VCCIO VR(MAIND for +1V_S5 to +VCCIO) disabled
MAINON(35,40)
REV:F Stuff R791
B2A S0->S5 & S0->S3 Power of sequence 1 us SUSB# -> VCCST_PWRGD
1
2
VCCST_PWRGD_EN_L
3
HWPG (29)
!;
+3V
R211 10K_4 R561 10K_4
R651 8.2K/F_4 R628 8.2K/F_4
R250 10K_4
R195 *1K_4
R642 10K_4 R648 10K_4 R555 10K_4 R675 100K_4
2
SUSC#
1
SUSON_EC
4
U47 TC7SH08FU
R777 *0_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
+3V_S5
Rev:F add
SUSON_EC (29)
+3V_S5
C812 *0.1u/16V_4
2
4
U49 *TC7SH08FU
R791 0_4
+3V_S5
C808 0.1u/16V_4
2
1
VCCST_PWRGD_EN
3 5
Skylake 9/11 (PWROK/Board_ID)
Skylake 9/11 (PWROK/Board_ID)
Skylake 9/11 (PWROK/Board_ID)
SUSB#
1
MAINON_EC
3 5
SUSB#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
MAINON_EC (29)
ZRW
ZRW
ZRW
848
848
848
3A
3A
3A
Page 9
5
Dr-Bios.com
4
3
2
1
U35S
E68
AL25 AL27
BA70 BA68
B67 D65 D67 E70 C68 D68 C67
G69
G68 H70 G71 H69 G70
E63
E66
E60
AY2 AY1
K46 K45
C71 B70
A52
G65
E61
F71
F70
F63
F66
E8
D1 D3
F60
J71 J68
F65
F61
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]
CFG[16] CFG[17]
CFG[18] CFG[19]
CFG_RCOMP
ITP_PMOD E
RSVD_AY2 RSVD_AY1
RSVD_D1 RSVD_D3
RSVD_K46 RSVD_K45
RSVD_AL25 RSVD_AL27
RSVD_C71 RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70 RSVD_TP_BA68
RSVD_J71 RSVD_J68
VSS_F65 VSS_G65
RSVD_F61 RSVD_E61
REV = 1
D D
CFG4
R156 49.9/F_4
+1V_S5
C C
B B
CFG_RCOMP
R153 1.5K/F_4
RESERVED SIGNALS -1
SKL_ULT/BGA
SKL_ULT
?
19 OF 20
RSVD_TP_BB68 RSVD_TP_BB69
RSVD_TP_AK13 RSVD_TP_AK12
RSVD_BB2 RSVD_BA3
RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2
RSVD_B3 RSVD_A3
RSVD_AW1
RSVD_E1 RSVD_E2
RSVD_BA4 RSVD_BB4
RSVD_A4 RSVD_C4
RSVD_A69 RSVD_B69
RSVD_AY3
RSVD_D71 RSVD_C70
RSVD_C54 RSVD_D54
VSS_AY71
ZVM#
RSVD_TP_AW71 RSVD_TP_AW70
MSM#
PROC_SELECT#
BB68 BB69
AK13 AK12
BB2 BA3
AU5
TP5
AT5
TP6
D5 D4 B2 C2
B3 A3
AW1
E1 E2
BA4 BB4
A4 C4
BB5
TP4
A69 B69
AY3
D71 C70
C54 D54
AY4
TP1
BB3
TP2
AY71 AR56
AW71 AW70
AP56 C64
?
Rev:D change to shortpa d
Rev:F Remove Short Jumper for all +1V_S5
+1V_S5
TP95
Rev:F reserve TP
+1V_S5
Rev:F Stuff C699
+1V_S5
+1V_S5
+1V_S5
+1V_S5
+3VPCU
+3V_S5
+3V
+1.5V
+3V_S5
R759 *short_4
Rev:D change to shortpad
R760 *short_4 R762 *GT3@0_4
R761 100K_4
+1V_S5
+3V_S5
+1V_S5
+1V_S5
+1V_VCCST
VCCPRIM_1P0 & VCCPRIM_CORE Short
AB19 AB20
P18
AF18
C698 1U/6.3V_4
C699 47u/6.3V_8
C695 1U/6.3V_4
C191 1U/6.3V_4
C182 47u/6.3V_8
C179 1U/6.3V_4
C225 *1U/6.3V_4
R210 *0_6 R212 *short_6
R789 0_6
R683 *0_6
C748 1U/6.3V_4
R193 *short_6
R186 *short_6
LPM_ZVM_N (33)
C192 1U/6.3V_4
C261 1U/6.3V_4
C173 1U/6.3V_4
For 2+3e CPU No Stuff
TP88
+VCCDSW_1P0
C7121U/6.3V_4
C793 1U/6.3V_4
+VCCPDSW_3P3
C314*0.1U/16 V_4
+VCCHDA
+VCCPSPI
+VCCPRIM_3P3
AF19
AB17
AD17 AD18
AJ17
AJ19
AJ16
AF20 AF21
AJ21
AK20
V20 V21
AL1
K17
L1
N15 N16 N17 P15 P16
K15
L15
V15
Y18
T19 T20
N18
SKL_ULT
U35O
CPU POWER 4 OF 4
VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0
VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE
DCPDSW_1P0
VCCMPHYAON_1P0 VCCMPHYAON_1P0
VCCMPHYGT_1P0_N15 VCCMPHYGT_1P0_N16 VCCMPHYGT_1P0_N17 VCCMPHYGT_1P0_P15 VCCMPHYGT_1P0_P16
VCCAMPHYPLL_1P0 VCCAMPHYPLL_1P0
VCCAPLL_1P0
VCCPRIM_1P0_AB17 VCCPRIM_1P0_Y18
VCCDSW_3P3_AD17 VCCDSW_3P3_AD18 VCCDSW_3P3_AJ17
1.5V
VCCHDA
3.3V
VCCSPI
VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
1.0V
SKL_ULT/BGA
REV = 1
1.0V
S5
1.0V
1.0V
30mA
11mA
1.0V
642mA
1.0V
S5
1.0V
22mA
S5
1.0V
1.258A
1.0V
S5
1.0V
S5
3.3V
118mA
3.3V
1.0V
33mA
?
696mA
2.574A
75mA with AJ21 pin
6mA
26mA
696mA
S5
S5
+3V
75mA
696mA
15 OF 20
44mA
S5
33mA 41mA
VCCPRIM_3P3_V19
1.0V
VCCPRIM_1P0_T1
1.8V
<1mA
VCCRTCPRIM_3P3
3.0V+
RTC
1.0V
135mA
S5
GPP_B0/CORE_VID0 GPP_B1/CORE_VID1
S5
S5
VCCPGPPG
VCCATS_1P8
VCCRTC_AK19 VCCRTC_BB14
GPIO Group Power Plane
AK15 AG15 Y16 Y15 T16 AF16 AD15
V19
T1
AA1
AK17
AK19 BB14
BB10
A14
K19
L21
N20
L19
A10
AN11 AN13
?
+VCCPGPPA +VCCPGPPB
+VCCPGPPC +VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_3P3
+VCCPRIM_1P0
+VCCATS_1P8
+VCCPRTCPRIM_3P3
V0P85A_VID0 V0P85A_VID1
VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
C250 1U/6.3V_4
C349 1U/6.3V_4
+VCCPRTC
C322 1U/6.3V_4
DCPRTC
C680 *1U/6.3V_4
C672 1U/6.3V_4
C292 *1U/6.3V_4 C268 1U/6.3V_4 C230 1U/6.3V_4 C265 *1U/6.3V_4
R198*short_6 R185*short_6C217 1U/6.3V_4 R182*short_6 R187*short_6 R179*short_6
R192*short_6
R188*short_6 C256 1U/6.3V_4 C270 *1U/6.3V_4
R180*short_6
R240*short_6
C348 0.1U/16V_4
R252*short_6
C352 0.1U/16V_4 C732 0.1U/16V_4
TP31 TP16
Rev:D change to shortpad
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5
+1.8V_S5
+3V_S5
+1V_S5
+1.8V_S5 +3V_S5
+3V_RTC
+1V_S5
!E
Pin Name Strap description Configuration
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted
CFG[1]
CFG[2]
Reserved Configuration lane
PCI Express* Static x16 Lane Numbering Reversal
1 = *Normal Operation; No stall (iPU 3K)
0 = Stall
1 = *Normal Operation(iPU 3K)
0 = Lan number reversed
Note
H & S processor used only
CFG[3] Reserved Configuration lane
CFG[4]
CFG[6:5] PCI Express* Bifunction
A A
eDP enable
CFG[7] PEG Training
CFG[19:8]
Reserved Configuration lane
5
1 = Disabled (iPU 3K)
0 = *Enabled
00 = 1x8, 2x4 PCI Expres s* 01 = reserved 10 = 2x8 PCI Express* 11 = 1x16 PCI Express*
1 = *PEG Train immediatedly follow RESET# de-asserti on (iPU 3K)
0 = PEG wait for B IOS for training
4
CFG4
R548 1K_4
H & S processor used only
H & S processor used only
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
2
Monday, July 20, 2015
PROJECT :
Skylake PCH-LP 15/19 (POWER)
Skylake PCH-LP 15/19 (POWER)
Skylake PCH-LP 15/19 (POWER)
ZRW
ZRW
ZRW
3A
3A
948
948
1
948
3A
Page 10
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Dr-Bios.com
4
3
2
1
Skylake ULT (GND)
GND 3 OF 3
?
18 OF 20
U35R
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
?
SKL_ULT
U35T
SPARE
L18 L2
+1.8V_S5
L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21
?
R775 *0_4
*1U/6.3V_4
Reserve 1uF no stuff in CPU U11,U12 ball support Cannonlake-U PCH
2
AW69
RSVD_AW69
AW68
RSVD_AW68
AU56
RSVD_AU56
AW48
RSVD_AW48
C7
RSVD_C7
U12
RSVD_U12
U11
RSVD_U11
H11
C794
Size Docu ment Number Rev
Size Docu ment Number Rev
Size Docu ment Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
RSVD_H11
SKL_ULT/BGA
REV = 1
Skylake 10/17/18 (GND)
Skylake 10/17/18 (GND)
Skylake 10/17/18 (GND)
Monday, July 20, 2 015
Monday, July 20, 2 015
Monday, July 20, 2 015
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
20 OF 20
RSVD_F6
RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52
ZRW
ZRW
ZRW
1
G10 G22 G43 G45 G48
G52 G55 G58
G60 G63 G66 H15 H18 H71
J11 J13 J25 J28 J32 J35 J38 J42
K16 K18 K22 K61 K63 K64 K65 K66 K67 K68 K70 K71
L11 L16 L17
F8
G5
G6
J8
SKL_ULT
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL_ULT/BGA
REV = 1
?
A67 A70 AA2
AA4 AA65 AA68 AB15 AB16 AB18 AB21
AB8
AD13 AD16 AD19 AD20 AD21 AD62
AD8 AE64 AE65 AE66 AE67 AE68 AE69
AF1 AF10 AF15 AF17
AF2
AF4 AF63 AG16 AG17 AG18 AG19 AG20 AG21 AG71 AH13
AH6 AH63 AH64 AH67
AJ15 AJ18 AJ20
AJ4 AK11 AK16 AK18 AK21 AK22 AK27 AK63 AK68 AK69
AK8
AL2
AL28 AL32 AL35 AL38
AL4
AL45 AL48 AL52 AL55 AL58 AL64
A5
REV = 1
SKL_ULT
GND 1 OF 3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL_ULT/BGA
D D
C C
B B
A A
5
16 OF 20
U35P
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58
?
4
AT63 AT68 AT71 AU10 AU15 AU20 AU32 AU38
AV1 AV68 AV69 AV70 AV71
AW10 AW12 AW14 AW16 AW18 AW21 AW23 AW26 AW28 AW30 AW32 AW34 AW36 AW38 AW41 AW43 AW45 AW47 AW49 AW51 AW53 AW55 AW57
AW6 AW60 AW62 AW64 AW66
AW8
AY66
B10 B14 B18 B22 B30 B34 B39 B44 B48 B53 B58 B62 B66 B71
BA1 BA10 BA14 BA18
BA2 BA23 BA28 BA32 BA36
F68
BA45
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
REV = 1
SKL_ULT
GND 2 OF 3
SKL_ULT/BGA
?
17 OF 20
U35Q
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41
?
3
"!
F6 E3 C11 B11 A11 D12 C12 F52
?
10 48
10 48
10 48
3A
3A
3A
Page 11
5
Dr-Bios.com
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3
2
1
""
D D
C C
B B
R289 *0_6
Intel APS Fixture use
CN2
A A
*ACES_88511-180N
1
APS1
1
2
2
3
APS3
3
4
4
5
5
6
6
7
APS7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
R291 *0_6
R282 *0_4
R278 *0_6 R279 *0_4 R274 *0_4 R273 *0_4
R271 *0_6
R268 *0_4
R265 *0_4
R267 *0_4
APS3
+3V_S5
SYS_RESET#
R272 *0_6
SUSB# (8,29,31)
PCH_SLP_S5# (8) SUSC# (8,29) PCH_SLP_A# (8)
RTC_RST# (6)
NBSWON# (27,29)
SYS_RESET# (8)
5
4
APS7APS1
+3VPCU
+3VPCU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
3
2
Monday, July 20, 2015
PROJECT :
CPU/PCH XDP
CPU/PCH XDP
CPU/PCH XDP
ZRW
ZRW
ZRW
11 48
11 48
11 48
1
3A
3A
3A
Page 12
5
Dr-Bios.com
M_A_A[15: 0](3)
D D
M_A_BS#0(3) M_A_BS#1(3) M_A_BS#2(3) M_A_CS#0(3) M_A_CS#1(3) M_A_CLK0(3) M_A_CLK0#(3) M_A_CLK1(3) M_A_CLK1#(3) M_A_CKE0(3) M_A_CKE1(3) M_A_CAS#(3) M_A_RAS#(3)
CLK_SCLK(7,13,27)
CLK_SDATA(7,13,27)
M_A_ODT0_DI MM(3) M_A_ODT1_DI MM(3)
M_A_DQS[7: 0](3)
M_A_DQS#[7 :0](3)
C430 10u/6.3V_6
M_A_WE#(3)
C445 10u/6.3V_6
+VDDQ_VTT
5
C444
0.1u/16V_4
C468 1u/6.3V_4
R332 10K_4 R335 10K_4
1A-8
2013/10/23 Change DIMM1_SA0/SA1
C C
to DIMM0_SA0/SA1.
1A-2
2013/10/16 Chage net name M_B_DQS#[7:0] to
B B
+1.35VSUS
C470
10u/6.3V_6
+3V
C439
2.2u/6.3V_6
A A
M_A_DQS#[7:0].
Place these Caps near SO-DIMM
C472 10u/6.3V_6
C448
0.1u/16V_4
C432 10u/6.3V_6
C471 10u/6.3V_6
C446
0.1u/16V_4
C434 1u/6.3V_4
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
DIMM0_SA0 DIMM0_SA1
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
C466
0.1u/16V_4
C447
0.1u/16V_4
107
119
109 108
114 121 101 103 102 104
115 110 113 197 201 202 200
116 120
136 153 170 187
137 154 171 188
135 152 169 186
C464
0.1u/16V_4
C467 1u/6.3V_4
98 97 96 95 92 91 90 86 89 85
84 83
80 78
79
73 74
11 28 46 63
12 29 47 64
10 27 45 62
JDIM2A
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA
ODT0 ODT1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
DDR3-DIMM1_H=4.0_ST D
+
C486 330u/2V_7343
C442 1u/6.3V_4
4
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
+SMDDR_VREF_DIMM
C480
0.1u/16V_4
2.2u/6.3V_6
C449
4.7U/10V_6
4
5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
+SMDDR_VREF_DQ0
C473
0.1u/16V_4
C463
4.7U/10V_6
C443
C441
2.2u/6.3V_6
C455
4.7U/10V_6
M_A_DQ0 (3) M_A_DQ4 (3) M_A_DQ6 (3) M_A_DQ7 (3) M_A_DQ1 (3) M_A_DQ5 (3) M_A_DQ3 (3) M_A_DQ2 (3) M_A_DQ12 (3)
M_A_DQ8 (3) M_A_DQ10 (3) M_A_DQ14 (3) M_A_DQ9 (3) M_A_DQ13 (3) M_A_DQ15 (3) M_A_DQ11 (3) M_A_DQ17 (3) M_A_DQ21 (3) M_A_DQ22 (3) M_A_DQ18 (3) M_A_DQ20 (3) M_A_DQ16 (3) M_A_DQ23 (3) M_A_DQ19 (3) M_A_DQ28 (3) M_A_DQ24 (3) M_A_DQ30 (3) M_A_DQ31 (3) M_A_DQ25 (3) M_A_DQ29 (3) M_A_DQ27 (3) M_A_DQ26 (3) M_A_DQ36 (3) M_A_DQ33 (3) M_A_DQ38 (3) M_A_DQ39 (3) M_A_DQ32 (3) M_A_DQ37 (3) M_A_DQ34 (3) M_A_DQ35 (3) M_A_DQ44 (3) M_A_DQ45 (3) M_A_DQ46 (3) M_A_DQ47 (3) M_A_DQ40 (3) M_A_DQ41 (3) M_A_DQ42 (3) M_A_DQ43 (3) M_A_DQ48 (3) M_A_DQ52 (3) M_A_DQ55 (3) M_A_DQ54 (3) M_A_DQ53 (3) M_A_DQ49 (3) M_A_DQ51 (3) M_A_DQ50 (3) M_A_DQ59 (3) M_A_DQ58 (3) M_A_DQ56 (3) M_A_DQ57 (3) M_A_DQ62 (3) M_A_DQ63 (3) M_A_DQ60 (3) M_A_DQ61 (3)
CHA
CHB
3
+VREF_CA_CPU
M3 solution
+VREFDQ_SA_M3
M3 solution
SA0SA1
00
01
3
DDR3_DRAMRST#(3,13)
R362 *Short_6
R327 *Short_6
R347 *10K_4
+3V
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
R363 2/F_6
C478
0.022u/16V_4
1 2
R357
24.9/F_4
R328 2/ F_6
C427
0.022u/16V_4
1 2
R325
24.9/F_4
2
+1.35VSUS
2.48A
+3V
PM_EXTTS#0
C465 * 0.1u/16V_4
+SMDDR_VREF_DQ0
M1 solution
+1.35VSUS
R358
1.8K/F_4
R346
1.8K/F_4
M1 solution
+1.35VSUS
R330
1.8K/F_4
R331
1.8K/F_4
2
1
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=4.0_ST D
PC2100 DDR3 SDRAM SO-DIMM
(204P)
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
GND GND
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
205 206
+VDDQ_VTT
Vref_CA
+SMDDR_VREF_DIMM
C479 470p/50V_4
Vref_DQ
+SMDDR_VREF_DQ0
C440 470p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
PROJECT :
DDR3 MEMORY SO-DIMM A
DDR3 MEMORY SO-DIMM A
DDR3 MEMORY SO-DIMM A
1
ZRW
ZRW
ZRW
12 48
12 48
12 48
"#
3A
3A
3A
Page 13
5
Dr-Bios.com
4
3
2
1
M_B_A[15:0](3)
D D
M_B_BS#0(3) M_B_BS#1(3) M_B_BS#2(3) M_B_CS#0(3) M_B_CS#1(3) M_B_CLK0(3) M_B_CLK0#(3) M_B_CLK1(3) M_B_CLK1#(3) M_B_CKE0(3) M_B_CKE1(3) M_B_CAS#(3) M_B_RAS#(3)
CLK_SCLK(7,12,27)
CLK_SDATA(7,12,27)
M_B_ODT0_DIMM(3) M_B_ODT1_DIMM(3)
M_B_DQS[7:0](3)
M_B_DQS#[7:0](3)
C402 10u/6.3V_6
C404 10u/6.3V_6
+VDDQ_VTT
M_B_WE#(3)
C421
0.1u/16V_4
R323 10K_4 R305 10K_4
+3V
C C
B B
1A-2
2013/10/16 Swap M_B_DQS2/M_B_DQS3 and swap M_B_DQS#2/M_B_DQS#3.
+1.35VSUS
C419
10u/6.3V_6
+3V
Place these Caps near SO-DIMM
C418 10u/6.3V_6
C420 10u/6.3V_6
C401 10u/6.3V_6
C400
0.1u/16V_4
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
DIMM1_SA0 DIMM1_SA1
M_B_DQS1 M_B_DQS0 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#1 M_B_DQS#0 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
C403
0.1u/16V_4
C416
0.1u/16V_4
C399
0.1u/16V_4
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM1_H=4.0_RVS
+SMDDR_VREF_DIMM
+
C433 330u/2V_7343
0.1u/16V_4
C422
PC2100 DDR3 SDRAM SO-DIMM
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
2.2u/6.3V_6
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
+SMDDR_VREF_DQ1
C423
0.1u/16V_4
C393
C392
2.2u/6.3V_6
M_B_DQ12 (3 ) M_B_DQ8 (3) M_B_DQ11 (3 ) M_B_DQ10 (3 ) M_B_DQ9 (3) M_B_DQ13 (3 ) M_B_DQ15 (3 ) M_B_DQ14 (3 )
M_B_DQ4 (3) M_B_DQ0 (3) M_B_DQ3 (3) M_B_DQ6 (3) M_B_DQ5 (3) M_B_DQ1 (3) M_B_DQ2 (3)
M_B_DQ7 (3) M_B_DQ17 (3 ) M_B_DQ16 (3 ) M_B_DQ18 (3 ) M_B_DQ19 (3 )
M_B_DQ21 (3 )
M_B_DQ20 (3 ) M_B_DQ22 (3 ) M_B_DQ23 (3 ) M_B_DQ24 (3 ) M_B_DQ25 (3 ) M_B_DQ30 (3 ) M_B_DQ31 (3 ) M_B_DQ28 (3 ) M_B_DQ29 (3 ) M_B_DQ26 (3 ) M_B_DQ27 (3 ) M_B_DQ36 (3 ) M_B_DQ37 (3 ) M_B_DQ39 (3 ) M_B_DQ35 (3 ) M_B_DQ32 (3 ) M_B_DQ33 (3 ) M_B_DQ34 (3 ) M_B_DQ38 (3 ) M_B_DQ44 (3 ) M_B_DQ45 (3 ) M_B_DQ42 (3 ) M_B_DQ43 (3 ) M_B_DQ41 (3 ) M_B_DQ40 (3 ) M_B_DQ46 (3 ) M_B_DQ47 (3 ) M_B_DQ48 (3 ) M_B_DQ52 (3 ) M_B_DQ55 (3 ) M_B_DQ54 (3 ) M_B_DQ49 (3 ) M_B_DQ53 (3 ) M_B_DQ50 (3 ) M_B_DQ51 (3 ) M_B_DQ57 (3 ) M_B_DQ56 (3 ) M_B_DQ58 (3 ) M_B_DQ62 (3 ) M_B_DQ61 (3 ) M_B_DQ60 (3 ) M_B_DQ63 (3 ) M_B_DQ59 (3 )
DDR3_DRAMRST#(3,12)
+VREFDQ_SB_M3
M3 solution
R324 * 10K_4
+3V
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
R302 * Short_6
R307 2/F_6
1 2
+1.35VSUS
2.48A
+3V
PM_EXTTS#1
C415 * 0.1u/16V_4
+SMDDR_VREF_DQ1
C397
0.022u/16V_4
R313
24.9/F_4
75 76 81 82 87 88 93 94
99 100 105 106 111 112 117 118 123 124
199
77 122 125
198
30
1
126
2 3 8
9 13 14 19 20 25 26 31 32 37 38 43
DDR3-DIMM1_H=4.0_RVS
M1 solution
+1.35VSUS
R309
1.8K/F_4
R310
1.8K/F_4
JDIM1B
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
VDDSPD
NC1 NC2 NCTEST
EVENT# RESET#
VREF_DQ VREF_CA
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15
Vref_DQ
+SMDDR_VREF_DQ1
PC2100 DDR3 SDRAM SO-DIMM
CHA
CHB
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
(204P)
VTT1 VTT2
GND GND
C391 470p/50V_4
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
205 206
+VDDQ_VTT
SA0SA1
00
01
"$
A A
C388
2.2u/6.3V_6
C390
0.1u/16V_4
C429 1u/6.3V_4
C396 1u/6.3V_4
C426 1u/6.3V_4
C395 1u/6.3V_4
5
C394
4.7U/10V_6
4
C417
4.7U/10V_6
C414
4.7U/10V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
DDRIII Memory SO-DIMM B
DDRIII Memory SO-DIMM B
DDRIII Memory SO-DIMM B
PROJECT :
ZRW
ZRW
ZRW
3A
3A
3A
13 48Monday, July 20, 2015
13 48Monday, July 20, 2015
13 48Monday, July 20, 2015
1
Page 14
1
Dr-Bios.com
2
3
4
5
6
7
8
+1.05V_GFX
A A
Near GPU
C605 EV@22U/6.3VS_6 C72 EV@22U/6.3VS_6 C78 [email protected]/10V_6 C111 [email protected]/10V_6 C63 [email protected]/10V_6
C97 EV@1U/6.3V_4 C91 EV@1U/6.3V_4
Under GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A
+1.05V_GFX
PEX_PLL_HVDD + PEX_SVDD_3V3 = 143mA
B B
100 ohm near GPU
C C
R72 EV@0_6
+1.05V_GFX
D D
Near GPU
Under GPU
1
C64 EV@22U/6.3VS_6 C87 *22U/6.3VS_6 C65 *10U/10V_6 C90 [email protected]/10V_6 C602 [email protected]/10V_6
Near GPU
Under GPU
C119 EV@1U/6.3V_4 C121 EV@1U/6.3V_4
+3V_GFX
C131 [email protected]/16V_4 C135 [email protected]/10V_6
C132 [email protected]/10V_6
Near GPU
+VGPU_CORE
VGA_VCCSENSE(41)
VGA_VSSSENSE(41)
R481 *200/F_4
PEX_TSTCLK PEX_TSTCLK#
CX300T30001 Change to 0ohm
PEX_PLLVDD
C80[email protected]/10V_6 C96EV@1U/6.3V_4
C92[email protected]/16V_4
PEX_PLLVDD = 130mA
EV@10K/F_4
R79
R473[email protected]/F_4
TESTMODE
PEX_TERMP
R123 EV@100_4
R124 EV@100_4
AA22 AB23 AC24 AD25 AE26 AE27
AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27
AA8 AA9
AB8
AF22 AE22
AA14 AA15
AD9
AF25
F2
F1
2
U34A
PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
PEX_PLL_HVDD PEX_PLL_HVDD
PEX_SVDD_3V3
VDD_SENSE
GND_SENSE
PEX_TSTCLK_OUT PEX_TSTCLK_OUT
PEX_PLLVDD PEX_PLLVDD
TESTMODE
PEX_TERMP
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
1/14 PCI_EXPRESS
PEX_WAKE
PEX_RST
PEX_CLKREQ
PEX_REFCLK PEX_REFCLK
PEX_TX0 PEX_TX0
PEX_RX0 PEX_RX0
PEX_TX1 PEX_TX1
PEX_RX1 PEX_RX1
PEX_TX2 PEX_TX2
PEX_RX2 PEX_RX2
PEX_TX3 PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_RX4 PEX_RX4
PEX_TX5 PEX_TX5
PEX_RX5 PEX_RX5
PEX_TX6 PEX_TX6
PEX_RX6 PEX_RX6
PEX_TX7 PEX_TX7
PEX_RX7 PEX_RX7
PEX_TX8 PEX_TX8
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_RX9 PEX_RX9
PEX_TX10 PEX_TX10
PEX_RX10 PEX_RX10
PEX_TX11 PEX_TX11
PEX_RX11 PEX_RX11
PEX_TX12 PEX_TX12
PEX_RX12 PEX_RX12
PEX_TX13 PEX_TX13
PEX_RX13 PEX_RX13
PEX_TX14 PEX_TX14
PEX_RX14 PEX_RX14
PEX_TX15 PEX_TX15
PEX_RX15 PEX_RX15
GF119GF11 7
COMMONbga595-nvidia-n13p-gv2-s-a2
3
AB6
AC7
AC6
AE8 AD8
AC9 AB9
AG6 AG7
AB10 AC10
AF7 AE7
AD11 AC11
AE9 AF9
AC12 AB12
AG9 AG10
AB13 AC13
AF10 AE10
AD14 AC14
AE12 AF12
AC15 AB15
AG12 AG13
AB16 AC16
AF13 AE13
AD17 AC17
AE15 AF15
AC18 AB18
AG15 AG16
AB19 AC19
AF16 AE16
AD20 AC20
AE18 AF18
AC21 AB21
AG18 AG19
AD23 AE23
AF19 AE19
AF24 AE24
AE21 AF21
AG24 AG25
AG21 AG22
C134 *0.1U/16V_4
VGA_RST#
PEX_CLKREQ#
PEG_RXP0_C PEG_RXN0_C
PEG_RXP1_C PEG_RXN1_C
PEG_RXP2_C PEG_RXN2_C
PEG_RXP3_C PEG_RXN3_C
R86 EV@0_4
R91 EV@10K/F_4
C632 [email protected]/10V_4 C638 [email protected]/10V_4
C627 [email protected]/10V_4 C629 [email protected]/10V_4
C626 [email protected]/10V_4 C610 [email protected]/10V_4
C609 [email protected]/10V_4 C607 [email protected]/10V_4
PLTRST#(8,23,25,26,29)
DGPU_HOLD_RST#(4)
N16V stuff it, not support GC6 2.0
GPU_PEX_R ST_HOLD#(17)
PEX_CLKREQ#
4
PEGX_RST# (17)
+3V_GFX
CLK_PCIE_VGA (6) CLK_PCIE_VGA# (6)
PEG_RX0 (6) PEG_RX#0 (6)
PEG_TX0 (6) PEG_TX#0 (6)
PEG_RX1 (6) PEG_RX#1 (6)
PEG_TX1 (6) PEG_TX#1 (6)
PEG_RX2 (6) PEG_RX#2 (6)
PEG_TX2 (6) PEG_TX#2 (6)
PEG_RX3 (6) PEG_RX#3 (6)
PEG_TX3 (6) PEG_TX#3 (6)
EV@MC74VHC1G08DFT2G
SYS_PEX_RST
U10
2
1
SYS_PEX_RST_MON#
R132 GM@0_4
GPU_PEX_R ST_HOLD#
+3V
C180 [email protected]/16V_4
4
SYS_PEX_RST
3 5
SYS_PEX_RST_MON# (17)
U7
GT@MC74VH C1G08DFT2G
2
1
+3V_GFX
Follow Z09 to isolate CLK_REQ#
2
1
Q10 EV@2N7002K
R92 *0_4
3
5
NVDD = 32.22 ~ 26. 66 A
Under GPU
C88 EV@1U/6.3V_4 C128 EV@1U/6.3V_4 C125 EV@1U/6.3V_4 C130 EV@1U/6.3V_4 C113 [email protected]/10V_6 C86 [email protected]/10V_6 C118 [email protected]/10V_6 C112 [email protected]/10V_6 C120 [email protected]/10V_6 C93 [email protected]/10V_6 C109 [email protected]/10V_6 C116 [email protected]/10V_6 C126 [email protected]/10V_6 C123 [email protected]/10V_6
12
+
C85 EV@330u_2.5V_3528
C159 EV@22U/6.3V_8 C153 EV@47u/6.3V_8
C160 [email protected]/6.3VS_6 C140 [email protected]/6.3VS_6 C146 [email protected]/6.3VS_6 C149 [email protected]/6.3VS_6 C163 [email protected]/6.3VS_6
Near GPU
R143 EV@0_4
+3V
C175 [email protected]/16V_ 4
4
PEGX_RST#
3 5
CLK_PEGA_REQ# (6)
PU at page 9
+VGPU_CORE
K10 K12 K14 K16 K18 L11 L13 L15
L17 M10 M12 M14 M16 M18
N11
N13
N15
N17
P10
P12
P14
P16
P18
R11
R13
R15
R17
T10
T12
T14
T16
T18
U11
U13
U15
U17
V10
V12
V14
V16
V18
SYS_PEX_RST_MON#
R142 GT@100K/F_4
R114 EV@100K/F_4
U34E
11/14 NVVDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
bga595-nvidia-n13p-gv2-s-a2
COMMON
6
AD10
AD7
B19
F11
TP5
V5 V6
G1 G2 G3 G4 G5 G6 G7
V1 V2
W1 W2 W3 W4
ALL 3.3V +3VGFX & +3V3_AON
+VGACORE
PEX_VDD +1.05V_GFX
FBVDDQ +1.5V_GFX
"7
U34C
14/14 XVDD/VDD33
NC NC NC
3V3AUX_NC
FERMI_RSVD1_NC FERMI_RSVD2_NC
CONFIGURABLE
POWER CHANN ELS
* nc on substrate
XPWR_G1 XPWR_G2 XPWR_G3 XPWR_G4 XPWR_G5 XPWR_G6 XPWR_G7
XPWR_V1 XPWR_V2
XPWR_W1 XPWR_W2 XPWR_W3 XPWR_W4
bga595-nvidia-n13p-gv2-s-a2 COMMON
t>0NVVDD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
N16S-GT (PCIE I/F) /NVDD
N16S-GT (PCIE I/F) /NVDD
N16S-GT (PCIE I/F) /NVDD
Monday, July 20, 2015
Monday, July 20, 2015
Monday, July 20, 2015
VDD33 = 56mA
G10
VDD33 VDD33
VDD33 VDD33
G12
G8 G9
+3V_GFX
C117 [email protected]/16V_4
C145 [email protected]/10V_6
1 2
C138 EV@1U/10V_6
C143 [email protected]/10V_6
1 2
C137 EV@1U/10V_6
C124 [email protected]/16V_4 C127 [email protected]/16V_4
Under GPU
+3V_MAIN
Under GPU
Power up sequence
t>=0
Power down sequence
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRW
ZRW
ZRW
14 48
14 48
14 48
8
Near GPU
3A
3A
3A
Page 15
1
Dr-Bios.com
R525 EV@10K/F_4
FBA_CMD0
A A
FBA_ODT_L
FBA_CKE_L
FBA_ODT_H
FBA_CKE_H
FBA_RST#
B B
C C
FB_PLLAVDD = 55mA
+1.05V_GFX
D D
+1.5V_GFX
EV@BLM15PX330SN1DEV_4
L1
C79 EV@22U/6.3VS_6 C76 [email protected]/16V_4 C89 [email protected]/16V_4 C77 [email protected]/16V_4
FBA_CMD3
FBA_CMD16
FBA_CMD19
FBA_CMD20
VMA_CLK0(18 ,19)
VMA_CLK0#(18,1 9)
VMA_CLK1(18 ,19)
VMA_CLK1#(18,1 9)
R60 EV@10K/F_4
R59 EV@10K/F_4
R47 EV@10K/F_4
R43 EV@10K/F_4
R453 EV@10K/F_4
FBA_CMD0(18,19) FBA_CMD1(19) FBA_CMD2(18) FBA_CMD3(18,19) FBA_CMD4(18,19) FBA_CMD5(18,19) FBA_CMD6(18,19) FBA_CMD7(18,19) FBA_CMD8(18,19)
FBA_CMD9(18,19) FBA_CMD10(18,19) FBA_CMD11(18,19) FBA_CMD12(18,19) FBA_CMD13(18,19) FBA_CMD14(18,19) FBA_CMD15(18,19) FBA_CMD16(18,19)
FBA_CMD17(19)
FBA_CMD18(18) FBA_CMD19(18,19) FBA_CMD20(18,19) FBA_CMD21(18,19) FBA_CMD22(18,19) FBA_CMD23(18,19) FBA_CMD24(18,19) FBA_CMD25(18,19) FBA_CMD26(18,19) FBA_CMD27(18) FBA_CMD28(18,19) FBA_CMD29(18,19) FBA_CMD30(19)
R80 *60.4_4 R87 *60.4_4
+FB_PLLAVDD
FB_DLLAVDD = 15mA
1
PS_FB_CLAMP
2
F3
C27 C26 E24
F24 D27 D26
F25
F26
F23 G22 G23 G24
F27 G25 G27 G26
M24 M23
K24 K23
M27 M26 M25
K26 K22
J23
J25
J24 K27 K25
J27
J26
F22
J22
D24 D25 N22
M22
D18 C18 D17 D16
T24 U24 V24 V25
F16
P22
H22
2
U34B
FB_CLAMP
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
FBA_DEBUG0 FBA_DEBUG1
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
FBA_WCK01 FBA_WCK01 FBA_WCK23 FBA_WCK23 FBA_WCK45 FBA_WCK45 FBA_WCK67 FBA_WCK67
FB_PLLAVDD
FB_PLLAVDD
FB_DLLAVDD
INT
bga595-nvidia-n13p-gv2-s-a2
GF119NC
GF117
GF119
GF117FB_PLLAVDD
3
3
2/14 FBA
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8
FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FB_VREF_PROBE
COMMON
E18 F18 E16 F17 D20 D21 F20 E21 E15 D15 F15 F13 C13 B13 E13 D13 B15 C16 A13 A15 B18 A18 A19 C19 B24 C23 A25 A24 A21 B21 C20 C21 R22 R24 T22 R23 N25 N26 N23 N24 V23 V22 T23 U22 Y24 AA24 Y22 AA23 AD27 AB25 AD26 AC25 AA27 AA26 W26 Y25 R26 T25 N27 R27 V26 V27 W27 W25
D19 D14 C17 C22 P24 W24 AA25 U25
E19 C15 B16 B22 R25 W23 AB26 T26
F19 C14 A16 A22 P25 W22 AB27 T27
D23
VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63
VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7
VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7
VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7
TP2
4
VMA_DQ[63:0]
FBVDDQ + FBVDD = 3.116A
C71 [email protected]/16V_4 C82 [email protected]/16V_4
1 2
C95 EV@1U/10V_6
1 2
C74 EV@1U/10V_6 C73 [email protected]/10V_6 C69 [email protected]/10V_6 C84 EV@10U/6.3V_6 C83 EV@22U/6.3V_8
VMA_DM[7:0] (18,19)
VMA_WDQS[7:0] (18,19)
VMA_RDQS[7:0] (18,19)
4
5
VMA_DQ[63:0] (18,19)
+1.5V_GFX
FBA_CMD4
R458EV@100/F_4
FBA_CMD5
R461EV@100/F_4
FBA_CMD6 FBA_CMD7
R50EV@100/F_4
FBA_CMD8
R445EV@100/F_4
FBA_CMD9
R41EV@100/F_4
FBA_CMD10
R22EV@100/F_4
FBA_CMD11
R62EV@100/F_4
FBA_CMD12
R455EV@100/F_4
FBA_CMD13
R24EV@100/F_4
FBA_CMD14
R451EV@100/F_4
FBA_CMD15
R64EV@100/F_4
FBA_CMD21
R21EV@100/F_4
FBA_CMD22
R30EV@100/F_4
FBA_CMD23
R18EV@100/F_4
FBA_CMD24
R40EV@100/F_4
FBA_CMD25
R55EV@100/F_4
FBA_CMD26
R27EV@100/F_4
FBA_CMD27
R31EV@100/F_4
FBA_CMD28
R54EV@100/F_4
FBA_CMD29
R49EV@100/F_4
FBA_CMD30
R35EV@100/F_4
5
U34D
12/14 FBVDDQ
B26
FBVDDQ
C25
FBVDDQ
E23
FBVDDQ
E26
FBVDDQ
F14
FBVDDQ
F21
FBVDDQ
G13
FBVDDQ
G14
FBVDDQ
G15
FBVDDQ
G16
FBVDDQ
G18
FBVDDQ
G19
FBVDDQ
G20
FBVDDQ
G21
FBVDDQ
H24
FBVDDQ
H26
FBVDDQ
J21
FBVDDQ
K21
FBVDDQ
L22
FBVDDQ
L24
FBVDDQ
L26
FBVDDQ
M21
FBVDDQ
N21
FBVDDQ
R21
FBVDDQ
T21
FBVDDQ
V21
FBVDDQ
W21
FBVDDQ
bga595-nvidia-n13p-gv2-s-a2
COMMON
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
R459EV@100/F_4 R462EV@100/F_4 R46EV@100/F_4R45EV@100/F_4 R51EV@100/F_4 R446EV@100/F_4 R42EV@100/F_4 R23EV@100/F_4 R61EV@100/F_4 R456EV@100/F_4 R25EV@100/F_4 R452EV@100/F_4 R63EV@100/F_4 R20EV@100/F_4 R29EV@100/F_4 R17EV@100/F_4 R39EV@100/F_4 R56EV@100/F_4 R26EV@100/F_4 R32EV@100/F_4 R57EV@100/F_4 R48EV@100/F_4 R36EV@100/F_4
D22
C24
B25
+1.5V_GFX
6
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
R84 [email protected]/F_4
R73 [email protected]/F_4
R71 [email protected]/F_4
For support GC6 1.0
For support GC6 2.0
EC_FB_CLAMP(17,2 9)
GC6_FB_EN(4,17)
GPU_PWR _GD(41)
6
7
U34F
A2
GND
AB17
GND
AB20
GND
AB24
GND
AC2
GND
AC22
GND
AC26
GND
AC5
GND
AC8
GND
AD12
GND
AD13
GND
A26
GND
AD15
GND
AD16
GND
AD18
GND
AD19
GND
AD21
GND
AD22
GND
AE11
GND
AE14
GND
AE17
GND
AE20
GND
AB11
GND
AF1
GND
AF11
GND
AF14
GND
AF17
GND
AF20
GND
AF23
GND
AF5
GND
AF8
GND
AG2
GND
AG26
GND
AB14
GND
B1
GND
B11
GND
B14
GND
B17
GND
B20
GND
B23
GND
B27
GND
B5
GND
B8
GND
E11
GND
E14
GND
E17
GND
E2
GND
E20
GND
E22
GND
E25
GND
E5
GND
E8
GND
H2
GND
H23
GND
H25
GND
H5
+1.5V_GFX
R140 *0_4
R139 GT@0_4
+3V
2
1
3 5
R137 GM@0_4
GND
K11
GND
K13
GND
K15
GND
K17
GND
L10
GND
L12
GND
L14
GND
L16
GND
L18
GND
L2
GND
L23
GND
L25
GND
L5
GND
M11
GND
bga595-nvidia-n13p-gv2-s-a2 COMMON
C177 [email protected]/16V_ 4
GT@NL17SZ 32DFT2G
4
U9
N16V stuff it, not support GC6 2.0
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
7
PROJECT :
N16S-GT (MEMORY/GND)
N16S-GT (MEMORY/GND)
N16S-GT (MEMORY/GND)
13/14 GND
R126 EV@100K/F_4
ZRW
ZRW
ZRW
8
"8
M13
GND
M15
GND
M17
GND
N10
GND
N12
GND
N14
GND
N16
GND
N18
GND
P11
GND
P13
GND
P15
GND
P17
GND
P2
GND
P23
GND
P26
GND
P5
GND
R10
GND
R12
GND
R14
GND
R16
GND
R18
GND
T11
GND
T13
GND
T15
GND
T17
GND
U10
GND
U12
GND
U14
GND
U16
GND
U18
GND
U2
GND
U23
GND
U26
GND
U5
GND
V11
GND
V13
GND
V15
GND
V17
GND
Y2
GND
Y23
GND
Y26
GND
Y5
GND
AA7
GND
AB7
GND
FBVDDQ_EN (42)
15 48
15 48
15 48
8
3A
3A
3A
Page 16
1
Dr-Bios.com
U34G
4/14 IFPAB
GF117GF11 9
NC
NC
GF117
GF117
GF117
NC
NC NC
NC
NC
NC
NC
NC
NC
NC
GF119
AA6
IFPAB_ RSET
V7
TP60
TP56
A A
TP53
TP57
B B
TP9 TP50
C C
TP59
TP54
TP8
IFPAB_ PLLVDD
W7
IFPAB_ PLLVDD
W6
IFPA_IOV DD
Y6
IFPB_IO VDD
IFPAB
bga595-nvidia-n13p-gv2-s-a2
U34H
5/14 IFPC
T6
IFPC_ RSET
M7
IFPC_ PLLVDD
N7
IFPC_ PLLVDD
P6
IFPC_ IOVDD
bga595-nvidia-n13p-gv2-s-a2
U34I
6/14 IFPD
U6
IFPD_ RSET
T7
IFPD_ PLLVDD
R7
IFPD_ PLLVDD
GF119
GF119
IFPD
D D
R6
TP10
IFPD_ IOVDD
1
GF119
GF117
NC
2
GF117
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC
DVI/HDMI DP
I2CW _SDA
NC
I2CW _SCL
NC
NC NC
NC NC
NC NC
NC NC
NC
GF117
NC NC
NC NC
NC NC
NC NC
NC NC
NC
2
GF119
IFPA_T XC IFPA_T XC
IFPA_T XD0 IFPA_T XD0
IFPA_T XD1 IFPA_T XD1
IFPA_T XD2 IFPA_T XD2
IFPA_T XD3 IFPA_T XD3
IFPB_T XC IFPB_T XC
IFPB_T XD4 IFPB_T XD4
IFPB_T XD5 IFPB_T XD5
IFPB_T XD6 IFPB_T XD6
IFPB_T XD7 IFPB_T XD7
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
I2CX_S DA I2CX_S CL
GPIO14
COMMON
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
3
U34J
7/14 IFPEF
AC4 AC3
Y3 Y4
AA2 AA3
AA1 AB1
AA5 AA4
AB4 AB5
AB2 AB3
AD2 AD3
AD1 AE1
AD5 AD4
B3
TP11
TP55
TP52
TP51
J7
K7
K6
H6
J6
GF119
IFPEF_ PLLVD D
IFPEF_ PLLVD D
IFPEF_ RSET
GF119
IFPE_IO VDD
IFPF_IO VDD
IFPE
IFPF
IFPC
GF119GF117
bga595-nvidia-n13p-gv2-s-a2
N5
IFPC_ AUX
N4
IFPC_ AUX
N3
IFPC_ L3
N2
GF119
IFPC_ L3
IFPC_ L2 IFPC_ L2
IFPC_ L1 IFPC_ L1
IFPC_ L0 IFPC_ L0
GPIO15
COMMON
DPDVI/HDMI
IFPD_ AUX IFPD_ AUX
IFPD_ L3 IFPD_ L3
IFPD_ L2 IFPD_ L2
IFPD_ L1 IFPD_ L1
IFPD_ L0 IFPD_ L0
GPIO17
COMMONbga595-nvidia-n13p-gv2-s-a2
R3 R2
R1 T1
T3 T2
C3
P4 P3
R5 R4
T5 T4
U4 U3
V4 V3
D4
+1.05V_GFX
+1.05V_GFX
3
L3
HWPG_1.5VGFX(42)
GF117
NC
GF117
NC
NC
NC NC
NC
NC NC
NC
NC NC
NC NC
GF117
NC
GF117
NC
NC NC
NC NC
NC NC
NC NC
NC NC
NC
PLLVDD = 38mA
EV@BLM15PX330SN1D_4
L2
C133 [email protected]/16V_4 C154 EV@22U/6.3VS_6
SP_PLLVDD = 17mA
EV@HCB1005KF-181T15(180,1500MA)
C129 [email protected]/16V_4
C156 [email protected]/16V_4 C152 [email protected]/10V_6 C142 EV@22U/6.3VS_6
VID_PLLVDD = 41mA
R524 EV@10K/F_4
DB-->SI change 10/25 Use G-CLK
4
DVI-DL
I2CY_S DA I2CY_S CL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
HPD_ENC
DVI-DL
TXD3 TXD3
TXD4 TXD4
TXD5 TXD5
27M_XTAL_IN_R 27M_XTAL_OUT
R83 [email protected]_4
4
GF119
DVI-SL/HDMI
I2CY_S DA I2CY_S CL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
HPD_E
GF119
DVI-SL/HDMI
I2CZ_ SDA I2CZ_ SCL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
HPD_F
NV_PLLVDD
SP_PLLVDD
XTAL_SSIN
DGPU_POK2
C139 *1000P/50V_4
U34M
L6
M6
N6
A10
C11
bga595-nvidia-n13p-gv2-s-a2
2
1 3
DP
IFPE_A UX IFPE_A UX
IFPE_L 3 IFPE_L 3
IFPE_L 2 IFPE_L 2
IFPE_L 1 IFPE_L 1
IFPE_L 0 IFPE_L 0
GPIO18
DP
IFPF_AU X IFPF_AU X
IFPF_L 3 IFPF_L 3
IFPF_L 2 IFPF_L 2
IFPF_L 1 IFPF_L 1
IFPF_L 0 IFPF_L 0
GPIO19
COMMON
9/14 XTAL_PLL
PLLVDD SP_PLLVDD
VID_PLL VDD
XTALSSIN
XTALIN
DGPU_PGOK-1
Q7 EV@METR3904-G
5
J3 J2
J1 K1
K3 K2
M3 M2
M1 N1
TP61
TP49
C2
GC6 Power control
H4 H3
J5 J4
K5 K4
L4 L3
M5 M4
F7
+3V_MAIN
GF119
NC
GF117
+3V
5
R104 [email protected]_4
R82 [email protected]_4
2
C141 EV@1000P/50V_4
+3V_MAIN_EN(17)
XTALOUT BUFF
+3V_GFX
R108 [email protected]_4
Q12
EV@DTC144EUA
1 3
XTALOUT
U34K
3/14 DACA
W5
DACA_VDD
AE2
DACA_VREF
AF2
DACA_RSET
bga595-nvidia-n13p-gv2-s-a2
C162 *1000p/50V_4
C10
B10
COMMON
R105 EV@100K/F_4
6
GF119
+3V_GFX
R118 EV@10K_4
2
1 3
BXTALOUT
DGPU_PWROK (4)
6
GF117
NC
TSEN_VREF
NC
3V MAIN POWER
3/11 GC6 timing issue from 200K change to 100K
R117 GT@10K_4
R116 GT@100K_4
3
2
Q17 GT@2N7002K
1
Q8 EV@MMBT3904-7-F
R504 EV@10K/F_4
GF117
NC NC
NC NC
NC
NC
NC
+3V
R81 [email protected]_4
C147 EV@1000p/50V_4
GF119
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
C167
[email protected]/25 V_4
C166
[email protected]/25 V_4
2
7
I2CA_S CL I2CA_S DA
COMMON
2
1A-7
+3V_GFX
R90 [email protected]/F_4
Q6
1 3
EV@DTC144EU
B7
I2CA_SCL
R521 [email protected]_4
A7
I2CA_SDA
R502 [email protected]_4
AE3 AE4
AG3
AF4
AF3
+3V_GFX+3V_GFX
60mil
1
3
Q11 GT@AO3413
60mil
R97
GM@0_8
+3V_MAIN
N16V stuff not support GC6 2.0.
3V_MAIN_PWGD
R88 *100K/F_4
8
"9
3V_MAIN_PWGD (41,42)
+1.05V_GFX and GPU core power EN
DB-->SI change 10/25 Use G-CLK
C639
41
27M_XTAL_IN_R 27M_XTAL_OUT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
7
Y3
EV@27MHZ +-10PPM
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N16S-GT (DISPLAY)
N16S-GT (DISPLAY)
N16S-GT (DISPLAY)
EV@10P/50V_4
2 3
EV@10P/50V_4
ZRW
ZRW
ZRW
C644
16 48
16 48
16 48
8
3A
3A
3A
Page 17
1
Dr-Bios.com
TP7 TP6
A A
TP4
TP3
JTAG_TCK
TP47
JTAG_TMS
TP48
JTAG_TDI
TP46
JTAG_TDO
TP45
JTAG_TRST#
B B
C C
&3O3JP3)!)1BQ)M34D332 5,R=H?&+HH>65S)K2T)5,>+"#='*>6
GPU_THROTTING#(30)
+3V_GFX
D D
+3V_GFX
THERM-
THERM+
PEGX_RST #(14)
VGA_OVT#
R509 *10K/F_4
R510 [email protected]/F_4
U34N
8/14 MISC1
E12
THERMDN
F12
THERMDP
AE5
JTAG_TCK
AD6
JTAG_TMS
AE6
JTAG_TDI
AF6
JTAG_TDO
AG4
JTAG_TRST
bga595-nvidia-n13p-gv2-s-a2
1
R758
*EV@0_4
2
3
Q16
EV@2N7002K
GPIO12_ACIN
R94EV@10K/F_4
R518EV@10K/F_4
R111EV@100K/F_4
R511EV@10K/F_4
GPU_PEX_RST_HOLD#
R501EV@10K/F_4
R516EV@10K/F_4
R498*10K/F_4
R489*10K/F_4
R490EV@10K/F_4
R497*10K/F_4
GPIO12_ACIN
GPU_EVENT#
1
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
DGPU_OTP# (29)
1
DGPU_PSI
VGA_OVT#
ALERT
JTAG_TMS
JTAG_TDI
JTAG_TRST#
JTAG_TCK
2
U34L
10/14 MISC2
E10
VMON_IN0
F10
VMON_IN1
D1
STRAP0
D2
STRAP1
E4
STRAP2
E3
STRAP3
D3
STRAP4
GF119
C1
STRAP5_NC
F6
MULTISTRAP_ REF0_GN D
F4
MULTISTRAP_ REF1_GN D
F5
MULTISTRAP_ REF2_GN D
bga595-nvidia-n13p-gv2-s-a2 COMMON
GF117
NC NC
GF117
GF117
NC
GF119
I2CS_SCL
I2CS_SDA
I2CC_SCL I2CC_SDA
GF119
I2CB_SCL
I2CB_SDA
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 OVERT
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13
GF119
GPIO16
NC
GPIO20
NC
GPIO21
NC
COMMON
D9
GPUT_CLK_L
D8
GPUT_DATA_L
A9
DGPU_EDIDCLK
B9
DGPU_EDIDDATA
C9
N12E_SCL
C8
N12E_SDA
C6
FB_CLAMP_MON
B2 D6 C7 F9 A3
+3V_MAIN_EN
A4
GPU_EVENT#
B6 A6
VGA_OVT#
F8
ALERT
C5 E7 D7
GPIO12_ACIN
B4
D5
GPU_GPIO16
E6 C4
GPU_PEX_RST_HOLD#
GF117
NC
NC
GPIO ASSIGNMENTS
GPIO12 AC detect AC high DC low
+3V_GFX
dGPU_OPP# = EC control
2
EV@2N7002K Q9
3
DGPU_OPP# (29)
N16S-GM/-GT/-LP VRAM Configuration Table ROM_SI
0101 0x5
1100 0xC DDR3L 256Mx16, 64bit, 4Gb,1000MHz H5TC4G63CFR-N0C AKD5PZDTW03PU 24.9K ohm
0001 0x1
0010 0x2
0100 0x4 DDR3L 256Mx16, 64bit, 4Gb,1000MHz
N16V-GM/GL VRAM Configuration Table ROM_SI
0001 0x1
1001 0x9
0100 0x4
1010 0xA DDR3L 256Mx16, 64bit, 4Gb,1000MHz SAMSUNG E-die K4W4G1646E-BC1A PU 15K ohm AKD5PGDT504
2
3
ROM_CS
ROM_SO
ROM_SCLK
BUFRST
R505 [email protected]_4 R523 [email protected]_4
R522 [email protected]_4 R503 [email protected]_4
1
TP58
D12
ROM_CS
B12
ROM_SI
ROM_SI
A12
ROM_SO
C12
ROM_SCLK
D11
D10
PGOOD
R95 EV@10K/F_4
E9
SYS_PEX_RST_MON#
CEC
R120 EV@0_4
3
Q14 *2N7002K
2
+3V_GFX
+3V_MAIN_EN (16)
PWM- VID (41)
DGPU_PSI (41)
GPU_PEX_RST_HOLD# (14)
R93 *10K/F_4
2ND_MBDATA(7,29)
2ND_MBCLK(7,29)
4
+3V_GFX
+3V_GFX
SYS_PEX_RST_MON# (14)
2ND_MBDATA GPUT_DATA_L
2ND_MBCLK
R121 EV@10K/F_4
0926 Del
GPIO I/O PIN USAGE
0
IN
0
5
6
6
8
9
11
12
13
RAMCFG [3:0]
FB_CLAMP_MON
OUT
GC6_FB_EN
OUT
+3V_MAIN_EN
OUT
FB_CLAMP_REQ#
IN
DGPU_EVENT#
OUT
VGA_OVT#
OUT
ALERT
OUT
PWR_VID
IN
PWR_LEVEL
OUT
PSI
DESCRIPTION 1.5V DDR3
256Mx16
DDR3L 256Mx16, 6 4bit, 4Gb,1000MHz
DDR3L 256Mx16, 6 4bit, 4Gb,1000MHz
DDR3L 256Mx16, 6 4bit, 4Gb,1000MHz
FB Clamp monitor (GC6 1.0)
GC6 FB Enable (GC6 2.0)
Enable GC6 +3V_MAIN
Active low FB Clamp toggle req uest (GC6 1.0)
DGPU EVENT from CPU (GC6 2.0)
ACTIVE LO W THERMAL OVER TEMP
ACTIVE LO W THERMAL ALERT
GPU CORE_VDD PWM Control signal
AC Power detect o r power sup ply overdra w input
Phase Shedding
DDR3L 256Mx16, 6 4bit, 4Gb,1000MHz SAMSUNG E-die
RAMCFG [3:0]
DESCRIPTION 1.5V DDR3
256Mx16
DDR3L 256Mx16, 6 4bit, 4Gb,1000MHz
DDR3L 256Mx16, 6 4bit, 4Gb,1000MHz
DDR3L 256Mx16, 6 4bit, 4Gb,1000MHz
3
4
6"9FG5HI6"9.G5()F4JKL@2A)4KMN3
+3V_MAIN
Q13
5
Dual
Dual
R129 *0_4
R128 EV@0_4
R107 GT@0_4
1
Vendor Vendor P/N
HYNIX C-die
HYNIX C-die
Micron E-die
SAMSUNG D-die
SAMSUNG E-die
Vendor Vendor P/N
Micron E-die
HYNIX C-die
SAMSUNG D-die
2
6
EV@2N7002DW
2
+3V_GFX
Q15 *2N7002K
43
1
GC6_FB_EN (4,15)
3
N16S (GC2.0) -> GPIO0 un-stuff Q14 and R129 GPIO6 un-stuff Q15 \ R99 and R125
N16S (GC1.0) -> GPIO0 stuff Q14 and R129, un-stuff R120 \ R128 GPIO6 stuff Q15 and R125, un-stuff R107,R106.
H5TC4G63CFR-N0C
MT41J256M16HA-093G:E
K4W4G1646D-BC1A
K4W4G1646E-BC1A
K4W4G1646E-BC1A
MT41J256M16HA-093G:E
K4W4G1646D-BC1A
5
R496 *[email protected]/F_4
ROM_SI STRAP0 ROM_SO ROM_SCLK
R493 [email protected]/F_4
R101 [email protected]_4 R100 [email protected]_4
GPUT_CLK_L
R125 *0_4
R106 GT@0_4
For GC6 1.0
For GC6 2.0
EC_FB_CLAMP (15,29)
+3V_GFX
R99 *10K/F_4
R495
R494
[email protected]/F_4
[email protected]/F_4
R492
R491
[email protected]/F_4 R519
[email protected]/F_4
+3V_GFX +3V_GFX
For GC6 1.0
FB_CLAMP_REQ# (29) DGPU_EVENT# (4)
For GC6 2.0
6"9FG5HI6"9.G5()F4JKL@2A)4KMN3
ROM_SI N16S-GT [ 940 M ] 2G Hynix 128Mx16 -->34.8K PD 2G Micron 128Mx16 -->45.3K PD 2G Samsumg 128Mx16 -->4.99K PU 4G Hynix 256Mx16 -->30.1K PU Single Rank 4G Hynix 256Mx16 -->24.9K PU Dual Rank 4G Micron 256Mx16 -->10K PD 4G Samsumg 256Mx16 -->15K PD
ROM_SI N16V-GM [ 920M Single RAM] 2G Hynix 128Mx16 -->20K PD 2G Micron 128Mx16 -->30.1K PD 2G Samsumg 128Mx16 -->34.8K PD 4G Micron 256Mx16 -->10K PD 4G Hynix 256Mx16 -->10K PU 4G Samsumg 256Mx16 -->24.9K PD
ROM_SI
PD 30.1K ohm
PD 10K ohm
PD 15K ohm
PD 24.9K ohm
PU 30.1K ohm
ROM_SI
PD 10K ohm
PU 10K ohm
PD 24.9K ohm
5
STN B/S
AKD5PZ DTW03
AKD5PZ STL05
AKD5PGWT5 04
AKD5PGD T504
AKD5PGD T504
STN B/S
AKD5PZ STL05
AKD5PZ DTW03H5TC4G63CFR-N0C
AKD5PGWT5 04
6
R507 GM 920M
45.3k pull up
GT 940M
49.9K pull up
R499 *10K/F_4
[email protected]/F_4
R508 GM@10K/F_4
R528 *15K/F_4
1 2
R507 [email protected]/F_4
STRAP1 STRAP2 STRAP3 STRAP4
R527 *24.9K/F_4
N16S-GT DID=0x1347 [940M]
ROM_SCLK = Stuff 4.99K pull down ROM_SO = Stuff 4.99K pull down STRAP0 = Stuff 49.9K pull up STRAP1 = NC STRAP2 = NC STRAP3 = NC STRAP4 = NC ROM_SI = VRAM Configuration follow below table
N16V-GM DID=0x1299 [920M]
ROM_SCLK = Stuff 4.99K pull up ROM_SO = Stuff 4.99K pull up. STRAP0 = Stuff 45.3k pull up. (EDID Panel) STRAP1 = Stuff 45.3k pull down.(Gen3 support) STRAP2 = Stuff 10k pull up.(DID 0x1299) STRAP3 = Stuff 4.99k pull down.(No display out) STRAP4 = Stuff 45.3k pull down. (Gen3/max speed) ROM_SI = VRAM Configuration follow below table
Note: GC6 2.0 is su pported by N16x GPU in the GB2B ,GB4B-128,and GB3B-256 packages.
Resistor P/N
4.99K---> CS24992FB26 10K ---> CS31002FB26 15K ---> CS31502FB24 20K ---> CS32002FB29
24.9K --->CS32492FB16
30.1K --->CS33012FB18
34.8K---> CS33482FB22
45.3K ---> CS34532FB18 GM
49.9K ---> CS34992FB10 GT
ROM_SO N16S-GT --> 4.99K PD N16V-GM --> 4.99K PU
Configuration
Single Rank 2GB
Dual Rank 4GB
Dual RankSingle Rank
Single Rank
Dual Rank
Single Rank 2GB
Dual Rank 4GB1101 0xD
Configuration
Single Rank or Single Rank stuffing for Dual Rank
6
7
+3V_GFX+3V_MAIN
R506 *10K/F_4
R526 [email protected]/F_4
ROM_SCLK N16S-GT --> 4.99K PD N16V-GM --> 4.99K PU
R500 *10K/F_4
R520 [email protected]/F_4
Logical Strap Bit Mapping
4.99K 10K 15K 20K
24.9K
30.1K
34.8K
45.3K
8
":
PU-VDD PD
1000 0000 1001 0001
00101010 1011 0011 1100
0100 1101
0101 1110 0110 1111
0111
STRAP0 N16S-GT --> 49.9K PU N16V-GM --> 45.3K PU
N16V-GM strap0~3 table
STRAP0 = Stuff 45.3k pull up. (EDID Panel)
STRAP1 = Stuff 45.3k pull down.(Gen3 supp ort)
STRAP2 = Stuff 10k pull up.(DID 0x1299)
STRAP3 = Stuff 4.99k pull down.(No displa y out)
STRAP4 = Stuff 45.3k pull down. (Gen3/ma x speed)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
7
PROJECT :
N16S-GT (GPIO/STRAPS)
N16S-GT (GPIO/STRAPS)
N16S-GT (GPIO/STRAPS)
ZRW
ZRW
ZRW
17 48
17 48
17 48
8
3A
3A
3A
Page 18
VREFC_VMA1
Dr-Bios.com
VREFD_VMA1
FBA_ZQ0
R487EV@243_4
5
U32
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2 VDDQ#E9
F3
DQSL
VDDQ#H2
G3
DQSL
VDDQ#H9
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
96-BALL SDRAM DDR3
EV@VRAM _DDR3_SAMSUNG_256MX16
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#F1
VSS#A9 VSS#B3 VSS#E1 VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9
VSS#T1
VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1
GND B9 D1 D8 E2 E8 F9 G1 G9
+1.5V_GFX
+1.5V_GFX
C601[email protected]/10V_6
C635[email protected]/16V_4 C619[email protected]/16V_4
C52[email protected]/10V_6
C621[email protected]/16V_4 C620[email protected]/16V_4
VMA_DQ11 (15,19) VMA_DQ12 (15,19) VMA_DQ10 (15,19) VMA_DQ15 (15,19) VMA_DQ8 (15,19) VMA_DQ14 (15,19) VMA_DQ9 (15,19) VMA_DQ13 (15,19)
VMA_DQ17 (15,19) VMA_DQ21 (15,19) VMA_DQ18 (15,19) VMA_DQ23 (15,19) VMA_DQ19 (15,19) VMA_DQ22 (15,19) VMA_DQ16 (15,19) VMA_DQ20 (15,19)
GND
GND
HYU 256Mx16, H5TC4G63CFR-N0C QBC PN󶁪---TOP B/S PN : AKD5PZDTW03 MIC 256Mx16, MT41J256M16HA-093G:E QBC PN󶁪---TOP B/S PN : AKD5PZSTL05 SAM 256Mx16, K4W4G1646D-BC1A QBC PN󶁪---TOP B/S PN : AKD5PGWT504
VREFC_VMA1(1 9)
D D
C C
B B
VREFD_VMA1(1 9)
FBA_CMD7(15,1 9) FBA_CMD10(15 ,19) FBA_CMD24(15 ,19) FBA_CMD6(15,1 9) FBA_CMD22(15 ,19) FBA_CMD26(15 ,19) FBA_CMD5(15,1 9) FBA_CMD21(15 ,19) FBA_CMD8(15,1 9) FBA_CMD4(15,1 9) FBA_CMD25(15 ,19) FBA_CMD23(15 ,19) FBA_CMD9(15,1 9) FBA_CMD12(15 ,19) FBA_CMD14(15 ,19)
FBA_CMD29(15 ,19) FBA_CMD13(15 ,19) FBA_CMD27(15)
VMA_CLK0(1 5,19) VMA_CLK0#(15,19) FBA_CMD3(15,1 9)
FBA_CMD0(15,1 9) FBA_CMD2(15) FBA_CMD11(15 ,19) FBA_CMD15(15 ,19) FBA_CMD28(15 ,19)
VMA_WDQS1(15,19)
VMA_RDQS1(15,19)
VMA_DM1(15,19) VMA_DM2(15,19)
VMA_WDQS2(15,19)
VMA_RDQS2(15 ,19)
FBA_CMD20(15 ,19)
GND
4
3
2
1
";
FBA_ZQ4
R464EV@243_4
U29
M8
DQL0
VREFCA
H1
DQL1
VREFDQ
DQL2
N3
DQL3
A0
P7
DQL4
A1
P3
A2
DQL5
N2
A3
DQL6
P8
A4
DQL7
P2
A5
R8
A6
R2
A7
DQU0
T8
A8
DQU1
R3
A9
DQU2
L7
A10/AP
DQU3
R7
A11
DQU4
N7
A12/BC
DQU5
T3
DQU6
A13
T7
DQU7
A14
M7
A15
M2
BA0
VDD#B2
N8
BA1
VDD#D9
M3
VDD#G7
BA2
VDD#K2 VDD#K8 VDD#N1
J7
CK
VDD#N9
K7
CK
VDD#R1
K9
CKE
VDD#R9
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2 VDDQ#E9
VDDQ#F1
F3
DQSL
VDDQ#H2
G3
DQSL
VDDQ#H9
E7
VSS#A9
DML
D3
VSS#B3
DMU
VSS#E1 VSS#G8
C7
DQSU
VSS#J2
B7
DQSU
VSS#J8 VSS#M1 VSS#M9 VSS#P1
T2
RESET
VSS#P9 VSS#T1
L8
ZQ
VSS#T9
VSSQ#B1
VSSQ#B9 VSSQ#D1 VSSQ#D8
VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
96-BALL SDRAM DDR3
EV@VRAM _DDR3_SAMSUNG_256MX16
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1
GND B9 D1 D8 E2 E8 F9 G1 G9
+1.5V_GFX
+1.5V_GFX
C631[email protected]/10V_6
C608[email protected]/16V_4 C81[email protected]/16V_4
C584[email protected]/10V_6
C634[email protected]/16V_4 C583[email protected]/16V_4
VMA_DQ32 (15,19) VMA_DQ39 (15,19) VMA_DQ34 (15,19) VMA_DQ38 (15,19) VMA_DQ33 (15,19) VMA_DQ37 (15,19) VMA_DQ35 (15,19) VMA_DQ36 (15,19)
VMA_DQ57 (15,19) VMA_DQ62 (15,19) VMA_DQ59 (15,19) VMA_DQ63 (15,19) VMA_DQ58 (15,19) VMA_DQ60 (15,19) VMA_DQ56 (15,19) VMA_DQ61 (15,19)
GND
GND
VMA_WDQS5(15,19)
VMA_RDQS5(15 ,19)
VMA_WDQS6(15,19)
VMA_RDQS6(15 ,19)
VREFC_VMA3 VREFD_VMA3
FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14
FBA_CMD29 FBA_CMD13 FBA_CMD27
VMA_CLK1 VMA_CLK1# FBA_CMD19
FBA_CMD16 FBA_CMD18 FBA_CMD11 FBA_CMD15 FBA_CMD28
VMA_DM5(15,19) VMA_DM6(15,19)
FBA_CMD20
GND
U31
M8
VREFC_VMA1
H1
VREFD_VMA1
N3
FBA_CMD7
P7
FBA_CMD10
P3
FBA_CMD24
N2
FBA_CMD6
P8
FBA_CMD22
P2
FBA_CMD26
R8
FBA_CMD5
R2
FBA_CMD21
T8
FBA_CMD8
R3
FBA_CMD4
L7
FBA_CMD25
R7
FBA_CMD23
N7
FBA_CMD9
T3
FBA_CMD12
T7
FBA_CMD14
M7
M2
FBA_CMD29
N8
FBA_CMD13
M3
FBA_CMD27
J7
VMA_CLK0
K7
VMA_CLK0#
K9
FBA_CMD3
K1
FBA_CMD0
L2
FBA_CMD2
J3
FBA_CMD11
K3
FBA_CMD15
L3
FBA_CMD28
FBA_CMD20
R486EV@243_4
FBA_ZQ1
F3 G3
E7 D3
C7 B7
T2
L8
J1 L1 J9 L9
EV@VRAM _DDR3_SAMSUNG_256MX16
VMA_WDQS0(15,19)
VMA_RDQS0(15 ,19)
VMA_DM0(15,19) VMA_DM3(15,19)
VMA_WDQS3(15,19)
VMA_RDQS3(15 ,19)
GND
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15
BA0 BA1 BA2
CK CK CKE
ODT CS RAS CAS WE
DQSL DQSL
DML DMU
DQSU DQSU
RESET
ZQ
NC#J1 NC#L1 NC#J9 NC#L9
96-BALL SDRAM DDR3
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1
VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1
GND B9 D1 D8 E2 E8 F9 G1 G9
VMA_DQ4 (15,19) VMA_DQ1 (15,19) VMA_DQ5 (15,19) VMA_DQ0 (15,19) VMA_DQ6 (15,19) VMA_DQ2 (15,19) VMA_DQ7 (15,19) VMA_DQ3 (15,19)
VMA_DQ24 (15,19) VMA_DQ25 (15,19) VMA_DQ26 (15,19) VMA_DQ30 (15,19) VMA_DQ29 (15,19) VMA_DQ28 (15,19) VMA_DQ27 (15,19) VMA_DQ31 (15,19)
+1.5V_GFX
C630[email protected]/10V_6
C616[email protected]/16V_4 C613[email protected]/16V_4
GND
+1.5V_GFX
C40[email protected]/10V_6 C54[email protected]/10V_6
C62[email protected]/16V_4 C70[email protected]/16V_4
GND
VREFC_VMA3(1 9) VREFD_VMA3(1 9)
VMA_WDQS4(15,19)
VMA_RDQS4(15 ,19)
VMA_WDQS7(15,19)
VMA_RDQS7(15 ,19)
VREFC_VMA3 VREFD_VMA3
FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14
FBA_CMD29 FBA_CMD13 FBA_CMD27
VMA_CLK1(1 5,19) VMA_CLK1#(15,19) FBA_CMD19(15 ,19)
FBA_CMD16(15 ,19) FBA_CMD18(15)
FBA_CMD11 FBA_CMD15 FBA_CMD28
VMA_DM4(15,19) VMA_DM7(15,19)
FBA_CMD20
GND
FBA_ZQ5
R471EV@243_4
U28
M8
DQL0
VREFCA
H1
DQL1
VREFDQ
DQL2
N3
DQL3
A0
P7
DQL4
A1
P3
A2
DQL5
N2
A3
DQL6
P8
A4
DQL7
P2
A5
R8
A6
R2
A7
DQU0
T8
A8
DQU1
R3
A9
DQU2
L7
A10/AP
DQU3
R7
A11
DQU4
N7
A12/BC
DQU5
T3
DQU6
A13
T7
DQU7
A14
M7
A15
M2
BA0
VDD#B2
N8
BA1
VDD#D9
M3
VDD#G7
BA2
VDD#K2 VDD#K8 VDD#N1
J7
CK
VDD#N9
K7
CK
VDD#R1
K9
CKE
VDD#R9
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2 VDDQ#E9 VDDQ#F1
F3
DQSL
VDDQ#H2
G3
DQSL
VDDQ#H9
E7
VSS#A9
DML
D3
VSS#B3
DMU
VSS#E1 VSS#G8
C7
DQSU
VSS#J2
B7
DQSU
VSS#J8 VSS#M1 VSS#M9 VSS#P1
T2
RESET
VSS#P9 VSS#T1
L8
ZQ
VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
96-BALL SDRAM DDR3
EV@VRAM _DDR3_SAMSUNG_256MX16
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1
GND B9 D1 D8 E2 E8 F9 G1 G9
+1.5V_GFX
+1.5V_GFX
VMA_DQ44 (15,19) VMA_DQ43 (15,19) VMA_DQ45 (15,19) VMA_DQ40 (15,19) VMA_DQ47 (15,19) VMA_DQ42 (15,19) VMA_DQ46 (15,19) VMA_DQ41 (15,19)
VMA_DQ52 (15,19) VMA_DQ51 (15,19) VMA_DQ54 (15,19) VMA_DQ50 (15,19) VMA_DQ53 (15,19) VMA_DQ48 (15,19) VMA_DQ55 (15,19) VMA_DQ49 (15,19)
C574[email protected]/10V_6
C594[email protected]/16V_4 C48[email protected]/16V_4
C562[email protected]/16V_4 C15[email protected]/16V_4
GND
GND
162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402)
+1.5V_GFX
C592 EV@1U/6.3V_4 C623 EV@1U/6.3V_4 C611 EV@1U/6.3V_4 C636 EV@1U/6.3V_4
+1.5V_GFX
A A
C622 EV@1U/6.3V_4 C38 EV@1U/6.3V_4 C617 EV@1U/6.3V_4 C571 EV@1U/6.3V_4
+1.5V_GFX +1 .5V_GFX +1.5V_GFX
C582 EV@10U/6.3V_6
C625 EV@10U/6.3V_6
C603 EV@10U/6.3V_6
C558 [email protected]/16V_4 C43 [email protected]/16V_4 C104 [email protected]/16V_4
C101 [email protected]/16V_4 C612 [email protected]/16V_4 C598 [email protected]/16V_4
5
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
R466 [email protected]/F_4
VREFC_VMA1 VREFD_VMA1
R469 [email protected]/F_4
C590 [email protected]/25V_4
R76 [email protected]/F_4
R77 [email protected]/F_4
C115 [email protected]/25V_4
VMA_CLK0
VMA_CLK0#
EV@162_4
4
162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402) CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
+1.5V_GFX +1 .5V_GFX
R33 [email protected]/F_4
VREFC_VMA3 VREFD_VMA3
R34 [email protected]/F_4
C37 [email protected]/25V_4
R472 [email protected]/F_4
R467 [email protected]/F_4
C599 [email protected]/25V_4
VMA_CLK1
VMA_CLK1#
FOR EMI Request
+1.5V_GFX
C46 *120P/50V_4 C17 *120P/50V_4 C67 *120P/50V_4 C586 *120P/50V_4
R68 EV@162_4
3
C564 *120P/50V_4 C606 *120P/50V_4R75 C105 *120P/50V_4 C585 *120P/50V_4
+1.5V_GFX
C570 EV@1U/6.3V_4 C98 EV@1U/6.3V_4 C579 EV@1U/6.3V_4 C573 EV@1U/6.3V_4
2
+1.5V_GFX
C561 EV@1U/6.3V_4 C563 EV@1U/6.3V_4 C572 EV@1U/6.3V_4
+1.5V_GFX
C568 EV@10U/6.3V_6
C47 EV@10U/6.3V_6
C559 EV@10U/6.3V_6C615 EV@1U/6.3V_4
C595 [email protected]/16V_4 C624 [email protected]/16V_4 C588 [email protected]/16V_4
C566 [email protected]/16V_4 C565 [email protected]/16V_4 C567 [email protected]/16V_4
Quanta Computer I nc.
Quanta Computer I nc.
Quanta Computer I nc.
PROJECT :
ZRW
PROJECT :
ZRW
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR3L - RANK0
DDR3L - RANK0
DDR3L - RANK0
Date: Sheet of
Monday, July 20 , 2015
Date: Sheet of
Monday, July 20 , 2015
Date: Sheet of
Monday, July 20 , 2015
1
ZRW
18 48
18 48
18 48
3A
3A
3A
Page 19
VREFC_VMA1
Dr-Bios.com
VREFD_VMA1
FBA_ZQ2
R78DR@243_4
5
U5
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2 VDDQ#E9
VDDQ#F1
F3
DQSL
VDDQ#H2
G3
DQSL
VDDQ#H9
E7
DML
D3
DMU
C7
DQSU
B7
DQSU
T2
RESET
L8
ZQ
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
96-BALL SDRAM DDR3
DR@VRAM _DDR3_SAMSUNG_256MX16
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VSS#A9 VSS#B3 VSS#E1 VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9
VSS#T1
VSS#T9
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1
GND B9 D1 D8 E2 E8 F9 G1 G9
+1.5V_GFX
+1.5V_GFX
VMA_DQ12 (15,18) VMA_DQ11 (15,18) VMA_DQ15 (15,18) VMA_DQ10 (15,18) VMA_DQ13 (15,18) VMA_DQ9 (15,18) VMA_DQ14 (15,18) VMA_DQ8 (15,18)
VMA_DQ23 (15,18) VMA_DQ17 (15,18) VMA_DQ21 (15,18) VMA_DQ18 (15,18) VMA_DQ20 (15,18) VMA_DQ16 (15,18) VMA_DQ22 (15,18) VMA_DQ19 (15,18)
C110[email protected]/10V_6
C557[email protected]/16V_4 C597[email protected]/16V_4
C560[email protected]/10V_6
C618[email protected]/16V_4
GND
GND
HYU 256Mx16, H5TC4G63CFR-N0C QBC PN󶁪---TOP B/S PN : AKD5PZDTW03 MIC 256Mx16, MT41J256M16HA-093G:E QBC PN󶁪---TOP B/S PN : AKD5PZSTL05 SAM 256Mx16, K4W4G1646D-BC1A QBC PN󶁪---TOP B/S PN : AKD5PGWT504
D D
C C
B B
VREFC_VMA1(1 8) VREFD_VMA1(1 8)
FBA_CMD9(15,1 8) FBA_CMD24(15 ,18) FBA_CMD10(15 ,18) FBA_CMD13(15 ,18) FBA_CMD26(15 ,18) FBA_CMD22(15 ,18) FBA_CMD21(15 ,18) FBA_CMD5(15,1 8) FBA_CMD8(15,1 8) FBA_CMD23(15 ,18) FBA_CMD28(15 ,18) FBA_CMD4(15,1 8) FBA_CMD7(15,1 8) FBA_CMD14(15 ,18) FBA_CMD12(15 ,18)
FBA_CMD29(15 ,18) FBA_CMD6(15,1 8) FBA_CMD30(15)
VMA_CLK0(1 5,18) VMA_CLK0#(15,18) FBA_CMD3(15,1 8)
FBA_CMD0(15,1 8) FBA_CMD1(15) FBA_CMD11(15 ,18) FBA_CMD15(15 ,18) FBA_CMD25(15 ,18)
VMA_WDQS1(15,18)
VMA_RDQS1(15 ,18)
VMA_DM1(15,18) VMA_DM2(15,18)
VMA_WDQS2(15,18)
VMA_RDQS2(15 ,18)
FBA_CMD20(15 ,18)
GND
4
U4
M8
VREFC_VMA1
H1
VREFD_VMA1
N3
FBA_CMD9
P7
FBA_CMD24
P3
FBA_CMD10
N2
FBA_CMD13
P8
FBA_CMD26
P2
FBA_CMD22
R8
FBA_CMD21
R2
FBA_CMD5
T8
FBA_CMD8
R3
FBA_CMD23
L7
FBA_CMD28
R7
FBA_CMD4
N7
FBA_CMD7
T3
FBA_CMD14
T7
FBA_CMD12
M7
M2
FBA_CMD29
N8
FBA_CMD6
M3
FBA_CMD30
J7
VMA_CLK0
K7
VMA_CLK0#
K9
FBA_CMD3
K1
FBA_CMD0
L2
FBA_CMD1
J3
FBA_CMD11
K3
FBA_CMD15
L3
FBA_CMD25
FBA_CMD20
FBA_ZQ3
R70DR@243_4
F3 G3
E7 D3
C7 B7
T2
L8
J1
L1
J9
L9
DR@VRAM _DDR3_SAMSUNG_256MX16
VMA_WDQS0(15,18)
VMA_RDQS0(15 ,18)
VMA_DM0(15,18) VMA_DM3(15,18)
VMA_WDQS3(15,18)
VMA_RDQS3(15 ,18)
GND
VREFCA VREFDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15
BA0 BA1 BA2
CK CK CKE
ODT CS RAS CAS WE
DQSL DQSL
DML DMU
DQSU DQSU
RESET
ZQ
NC#J1 NC#L1 NC#J9 NC#L9
96-BALL SDRAM DDR3
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1
VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8
VSSQ#F9 VSSQ#G1 VSSQ#G9
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1
GND B9 D1 D8 E2 E8 F9 G1 G9
+1.5V_GFX
+1.5V_GFX
VMA_DQ1 (15,18) VMA_DQ4 (15,18) VMA_DQ0 (15,18) VMA_DQ5 (15,18) VMA_DQ3 (15,18) VMA_DQ7 (15,18) VMA_DQ2 (15,18) VMA_DQ6 (15,18)
VMA_DQ25 (15,18) VMA_DQ26 (15,18) VMA_DQ30 (15,18) VMA_DQ24 (15,18) VMA_DQ31 (15,18) VMA_DQ27 (15,18) VMA_DQ28 (15,18) VMA_DQ29 (15,18)
C587[email protected]/10V_6
C11[email protected]/16V_4 C56[email protected]/16V_4
C36[email protected]/10V_6
C575[email protected]/16V_4 C100[email protected]/16V_4C57[email protected]/16V_4
GND
GND
3
U3
M8
VREFC_VMA3(1 8) VREFD_VMA3(1 8)
VMA_WDQS4(15,18) VMA_RDQS4(15 ,18)
VMA_WDQS7(15,18) VMA_RDQS7(15 ,18)
VREFC_VMA3 VREFD_VMA3
FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12
FBA_CMD29 FBA_CMD6 FBA_CMD30
VMA_CLK1(1 5,18) VMA_CLK1#(15,18) FBA_CMD19(15 ,18)
FBA_CMD16(15 ,18) FBA_CMD17(15)
FBA_CMD11 FBA_CMD15 FBA_CMD25
VMA_DM4(15,18) VMA_DM7(15,18)
FBA_CMD20
FBA_ZQ6
GND
R69DR@243_4
DQL0
VREFCA
H1
DQL1
VREFDQ
DQL2
N3
DQL3
A0
P7
DQL4
A1
P3
A2
DQL5
N2
A3
DQL6
P8
A4
DQL7
P2
A5
R8
A6
R2
A7
DQU0
T8
A8
DQU1
R3
A9
DQU2
L7
A10/AP
DQU3
R7
A11
DQU4
N7
A12/BC
DQU5
T3
DQU6
A13
T7
DQU7
A14
M7
A15
M2
BA0
VDD#B2
N8
BA1
VDD#D9
M3
VDD#G7
BA2
VDD#K2 VDD#K8 VDD#N1
J7
CK
VDD#N9
K7
CK
VDD#R1
K9
CKE
VDD#R9
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2 VDDQ#E9 VDDQ#F1
F3
DQSL
VDDQ#H2
G3
DQSL
VDDQ#H9
E7
VSS#A9
DML
D3
VSS#B3
DMU
VSS#E1 VSS#G8
C7
DQSU
VSS#J2
B7
DQSU
VSS#J8 VSS#M1 VSS#M9 VSS#P1
T2
RESET
VSS#P9
VSS#T1
L8
ZQ
VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
96-BALL SDRAM DDR3
DR@VRAM _DDR3_SAMSUNG_256MX16
2
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1
GND B9 D1 D8 E2 E8 F9 G1 G9
+1.5V_GFX
+1.5V_GFX
VMA_DQ39 (15,18) VMA_DQ32 (15,18) VMA_DQ38 (15,18) VMA_DQ34 (15,18) VMA_DQ36 (15,18) VMA_DQ35 (15,18) VMA_DQ37 (15,18) VMA_DQ33 (15,18)
VMA_DQ62 (15,18) VMA_DQ57 (15,18) VMA_DQ63 (15,18) VMA_DQ59 (15,18) VMA_DQ61 (15,18) VMA_DQ56 (15,18) VMA_DQ60 (15,18) VMA_DQ58 (15,18)
C75[email protected]/10V_6
C122[email protected]/16V_4 C58[email protected]/16V_4
C94[email protected]/10V_6
C66[email protected]/16V_4 C44[email protected]/16V_4
GND
GND
VREFC_VMA3 VREFD_VMA3
FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12
FBA_CMD29 FBA_CMD6 FBA_CMD30
VMA_CLK1 VMA_CLK1# FBA_CMD19
FBA_CMD16 FBA_CMD17 FBA_CMD11 FBA_CMD15
VMA_WDQS5(15,18) VMA_RDQS5(15 ,18)
VMA_DM5(15,18) VMA_DM6(15,18)
VMA_WDQS6(15,18) VMA_RDQS6(15 ,18)
FBA_CMD25
FBA_CMD20
FBA_ZQ7
GND
R44DR@243_4
1
U2
M8
DQL0
VREFCA
H1
DQL1
VREFDQ
DQL2
N3
DQL3
A0
P7
DQL4
A1
P3
A2
DQL5
N2
A3
DQL6
P8
A4
DQL7
P2
A5
R8
A6
R2
A7
DQU0
T8
A8
DQU1
R3
A9
DQU2
L7
A10/AP
DQU3
R7
A11
DQU4
N7
A12/BC
DQU5
T3
DQU6
A13
T7
DQU7
A14
M7
A15
M2
BA0
VDD#B2
N8
BA1
VDD#D9
M3
VDD#G7
BA2
VDD#K2 VDD#K8 VDD#N1
J7
CK
VDD#N9
K7
CK
VDD#R1
K9
CKE
VDD#R9
K1
VDDQ#A1
ODT
L2
CS
VDDQ#A8
J3
RAS
VDDQ#C1
K3
CAS
VDDQ#C9
L3
WE
VDDQ#D2 VDDQ#E9 VDDQ#F1
F3
DQSL
VDDQ#H2
G3
DQSL
VDDQ#H9
E7
VSS#A9
DML
D3
VSS#B3
DMU
VSS#E1 VSS#G8
C7
DQSU
VSS#J2
B7
DQSU
VSS#J8 VSS#M1 VSS#M9 VSS#P1
T2
RESET
VSS#P9 VSS#T1
L8
ZQ
VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2
J1
NC#J1
VSSQ#E8
L1
NC#L1
VSSQ#F9
J9
NC#J9
VSSQ#G1
L9
VSSQ#G9
NC#L9
96-BALL SDRAM DDR3
DR@VRAM _DDR3_SAMSUNG_256MX16
"E
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1
GND B9 D1 D8 E2 E8 F9 G1 G9
+1.5V_GFX
+1.5V_GFX
VMA_DQ43 (15,18) VMA_DQ44 (15,18) VMA_DQ40 (15,18) VMA_DQ45 (15,18) VMA_DQ41 (15,18) VMA_DQ46 (15,18) VMA_DQ42 (15,18) VMA_DQ47 (15,18)
VMA_DQ51 (15,18) VMA_DQ52 (15,18) VMA_DQ50 (15,18) VMA_DQ54 (15,18) VMA_DQ49 (15,18) VMA_DQ55 (15,18) VMA_DQ48 (15,18) VMA_DQ53 (15,18)
C32[email protected]/10V_6
C576[email protected]/16V_4 C31[email protected]/16V_4
C55[email protected]/10V_6
C637[email protected]/16V_4 C23[email protected]/16V_4
GND
GND
+1.5V_GFX
A A
+1.5V_GFX
C39 DR@1U/6.3V_4 C24 DR@1U/6.3V_4 C106 DR@1U/6.3V_4 C102 DR@1U/6.3V_4
+1.5V_GFX
5
C61 DR@1U/6.3V_4 C99 DR@1U/6.3V_4 C633 DR@1U/6.3V_4 C108 DR@1U/6.3V_4
C50 DR@10U/6.3V_6
C59 DR@10U/6.3V_6
C26 DR@10U/6.3V_6
C51 [email protected]/16V_4 C53 [email protected]/16V_4 C107 [email protected]/16V_4
C103 [email protected]/16V_4 C614 [email protected]/16V_4 C604 [email protected]/16V_4
+1.5V_GFX
C593 DR@1U/6.3V_4 C20 DR@1U/6.3V_4 C569 DR@1U/6.3V_4 C22 DR@1U/6.3V_4
4
3
+1.5V_GFX
2
C600 DR@1U/6.3V_4 C60 DR@1U/6.3V_4 C42 DR@1U/6.3V_4 C14 DR@1U/6.3V_4
+1.5V_GFX
C596 DR@10U/6.3V_6
C21 DR@10U/6.3V_6
C49 DR@10U/6.3V_6
C19 [email protected]/16V_4 C18 [email protected]/16V_4 C28 [email protected]/16V_4
C45 [email protected]/16V_4 C68 [email protected]/16V_4 C25 [email protected]/16V_4
Quanta Computer I nc.
Quanta Computer I nc.
Quanta Computer I nc.
PROJECT :
ZRW
PROJECT :
ZRW
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR3L - RANK1
DDR3L - RANK1
DDR3L - RANK1
Date: Sheet of
Monday, July 20 , 2015
Date: Sheet of
Monday, July 20 , 2015
Date: Sheet of
Monday, July 20 , 2015
1
ZRW
19 48
19 48
19 48
3A
3A
3A
Page 20
5
Dr-Bios.com
4
3
2
1
#!
DP TO VGA
D D
C C
CRT_AUXP(2) CRT_AUXN(2)
IVDDO
L20 80ohm@100MHz
30mils
C715 10u/6.3V_6
B B
+5V
+3V
L4 80ohm@100MHz R637 *short_6
30 mils
C342 10u/6.3V_6
RX_IVDD33
C309
0.1u/16V_4
IT6515 : AL006515001 IT6516 : AL006516001
CRT_HPD(2)
CRT_TXP0(2) CRT_TXN0(2)
CRT_TXP1(2) CRT_TXN1(2)
RX_AVCC
C335 0.1u/16V_4 C331 0.1u/16V_4
C329 0.1u/16V_4 C315 0.1u/16V_4
C341 0.1u/16V_4 C343 0.1u/16V_4
20mils 10mils
RX_AVCC
R200*2.2K_4 R201*2.2K_4
IT6515 stuff
IT6516 un-stuff
CRT_HPD
CRT_TXP0_C CRT_TXN0_C
CRT_TXP1_C CRT_TXN1_C
CRT_AUXP_CCRT_AUXP CRT_AUXN_CCRT_AUXN
+3V
0929 modify
10mils
C7360.1u/16V_4
C727*0.1u/16V _4
10mils
C7220.1u/16V_4
C306 *0.1u/16V_4
DDCCLK_R DDCDAT_R
IVDDO
20mils
TP24
R225 22/J_4 R226 22/J_4
VSYNC (21) HSYNC (21)
DAC_VDDC
C734
4.7u/10V_6
+5V change to CRTVDD5 prevent leakage when system off and monitor on. 12/16
CRTVDD5
DDCCLK (21) DDCDAT (21)
L2180ohm@100MHz
IVDDO
20mils
20mils
RX_IVDD
15mils
IVDDO Pin32 is Regulator Power output 1.8V
IVDDO
10
40
U13
33
HPD
22
RX0P
23
RX0N
25
RX1P
26
RX1N
19
RXAUXP
18
RXAUXN
15
DCAUXP
14
DCAUXN
21
AVCC
27
AVCC
30
OVDD
OVDD
IVDD3329IVDD33
11
37
32
IVDD
IVDD20IVDD
IVDDO
C717
0.1u/16V_4
39
IVDD
MCUVDDH
VGADDCCLK
VGADDCSDA
URDBG
ISPSCL
ISPSDA
VSYNC HSYNC
VDDC
20mils
C738
Rev:D change to shortpad
0.1u/16V_4
IT6515 stuff 0 ohm
IT6516 un-stuff 0 ohm
38
5VMCU
24
URDBG
12 13
17 16
1 2
6
R203 *0_6
VSYNC HSYNC
C729
0.1u/16V_4
IT6515FN
9
IORP
8
IOGP
7
IOBP
34
RSVD
3
28
ASPVCC
36
PCSDA
35
PCSCL
PWD
31
R202 *10K_4
GND
41
RSET
5
VDDA
4
COMP
IT6515FN_QFN-40
all stage need confirm 6515 or 6516
VGA_RST
CRT_RED
CRT_GRE
CRT_BLU
TP15
R206 200/F_4
C725
0.1u/16V_4
DAC_VDDC
CRT_RED (21)
CRT_GRE (21)
CRT_BLU (21)
DAC_VDDC
20mils
A A
+3V(2,4,6,7,8,9,12,13,14,15,16,21,22,23,24,25,27,28,31,32,35,36,40,41,42) +5V(4,21,22,24,25,27,31,40)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
4
3
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
DP to VGA iT6165
DP to VGA iT6165
DP to VGA iT6165
ZRW
ZRW
ZRW
3A
3A
20 48Monday, July 20, 2015
20 48Monday, July 20, 2015
20 48Monday, July 20, 2015
1
3A
Page 21
5
Dr-Bios.com
CRT
1C-1 2014/01/10 Remove U29 and add U40 and U41.
U40
1
OE#
D D
HSYNC(20)
VSYNC(20)
HSYNC CRTHSYNC
VSYNC CRTVSYNC
2
A
3
GND
M74VHC1GT125DF2G
U37
1
OE#
2
A
3
GND
M74VHC1GT125DF2G
VCC
VCC
+5V
C720
5
4
Y
5
4
Y
0.1u/16V_4
+5V
C713
0.1u/16V_4
4
CRT_RED(20)
CRT_GRE(20)
CRT_BLU(20)
R222
R219
75/F_4
75/F_4
C337 R213 75/F_4
5.6p/16V_4
CRTHSYNC CRTHSYNC
CRTVSYNC CRTVSYNC DDCCLK
CRT_R1 CRT_R1 CRT_G1
DDCDAT DDCDAT
+5V
U36
1
1
2
2
3
GND_3/8
4
4
5
5
*RClamp0524P
U38
1
1
2
2
3
GND_3/8
4
4
5
5
*RClamp0524P
3
Q21
3
OUT
IN
GND
AP2331SA-7
L7 BLM18BB470_6
L6 BLM18BB470_6
L5 BLM18BB470_6
C320
C334
5.6p/16V_4
5.6p/16V_4
10
10
9
9
7
7
6
6
10
10
9
9
7
7
6
6
CRTVDD5CRTVDD5
DDCCLK
CRT_G1
CRT_B1CRT_B1
2
CRTVDD5
1 2
C319
5.6p/16V_4
C304 *0.1u/16V_4
CRTVDD5
CRT_R1
CRT_G1
CRT_B1 CRTHSYNC
C333
5.6p/16V_4
C336
5.6p/16V_4
C305 *0.22u/6.3V_4
C300 *220p/50V_4
C301 0.1u/16V_4
C716 10p/50V_4
C718 10p/50V_4
C714 *10p/50V_4
C724 *10p/50V_4
10
6
7 2 8 3 9 4
5
1617
CRTVDD5
CRTVSYNC
CRTHSYNC
DDCCLK
DDCDAT
CN7
111
12
13
14
15
CRT CONN
CRT_11
DDCDAT
CRTVSYNC
DDCCLK
TP75
DDCDAT (20)
DDCCLK (20)
Power trace tracking
DDCDAT DDCCLK
1
#"
CRTVDD5
R6202.2K_4 R6012.2K_4
+3V(2,4,6,7,8,9,12,13,14,15,16,20,22, 23,24,25,26,27,28,29,31,32,33,35,36,40,41,42) +5V(4,20,22,24,25,27,31,40)
+3VPCU(6,9,11,23,24,25,26,27,29,30,31,41,42)
VIN(30,31,32,33,35,36,37,38,40,41,42)
VIN
C7
C9
4.7u/25V_8
C C
+3V VIN
EDP_AUX_C
R447 *100K_4 R450 *100K_4
2013/12/12 change eDP pin define colayout FHD Panel for A2 stage
Prevent ESD/EOS Layout near device
EDP_HPD(2)
B B
Touch Panel-I2C
Touch Panel-USB
EDP_AUX#_C
TP_RST#
C804 180P/50V_4
R448 *100K_4 R449 *100K_4 R444 *TSI@10K_4
R457 33_4
eDP FHD
USBP5+(6) USBP5-(6)
TS_EN(29)
I2C1_SCL_C
PCH_BRIGHT(2)
USBP5+ USBP5-
EDP_AUXP(2) EDP_AUXN(2)
EDP_TXP1(2) EDP_TXN1(2)
EDP_TXP0(2) EDP_TXN0(2)
R6 *TSI@0_4 R5 *TSI@0_4
R4 TSU@0_4 R3 TSU@0_4
Board_ID4(8)
1000p/50V_4
1A-5
Rev:D change to shortpad
S5
+3V
3
Q1 *TSI@2N7002K
TP_INTTS_EN
R7
2
*TSI@10K_4
1
TP_INT
R443 *0_4
1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,
for issue debug.
Touch Panel interrupt
A A
TP_INT_PCH(4)
S5 S0
R8 *TSI@0_4
5
TP_PWR CCD_PWR
C577
0.1u/16V_4
LCDVCC
R28 *short_8
+3V
+5V +3V
EDP_AUX
C4 .1U/16V_4
EDP_AUX#
C2 .1U/16V_4
EDP_TXP1
C10 .1U/16V_4
EDP_TXN1
C8 .1U/16V_4
EDP_TXP0
C13 .1U/16V_4
EDP_TXN0
C12 .1U/16V_4
CCD-USB
Rev:D change to shortpad
R441 33_4
C803 180P/50V_4
Prevent ESD/EOS Layout near device
4
C578
1000p/50V_4
C27
0.1u/10V_4_X7R
Rev:D change to shortpad
MAX 1.5A
C580
PCH_BRIGHT
EDP_HPD_R
R15 *short_8 R14 *short_8
C581
*1u/6.3V_4
LCDVCC_R
R11 *short_6
R16 *short_6 R19 *0_4
USBP6+(6)
USBP6-(6)
R2 *short_4 R1 *short_4
TS_EN TS_EN_R
R442 *short_4
BOARD_ID4_TOUCH_S
Hall Sensor (HSR)
Rev:D change to shortpad
D28 *VPORT_6
C16
1000p/50V_4
*1u/6.3V_4
CCD_PWR
TP_PWR TP_RST#
BL_ON
EDP_AUX_C EDP_AUX#_C
EDP_TXP1_C EDP_TXN1_C
EDP_TXP0_C EDP_TXN0_C
USBP6+_R USBP6-_RI2C1_SDA_C
TP_INT
+3VPCU
R434 *short_6
21
C556
4.7U/10V_6
1st:AL009249000 -- BCD 2nd:AL009132001 -- ANC
V_BLIGHT
R435 *100K_4
CN5
G_5
40 39 38 37 36 35 34 33 32
G_4
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
G_1 9 8 7 6 5 4 3 2 1
G_0
50398-04071-001
2
1
3
MR1 AH9249NTR-G1
LID#
21
D23 *VPORT_6
3
LCD PowerLCD CONNECTOR
+3V
C41
1u/6.3V_4
EDP_VDD_EN(2)
R37 *short_4
Rev:D change to shortpad
Touch screen level shift I2C(reserve)
S5
I2C1_SDA(4)
I2C1_SCL(4)
PCH_BLON(2)
PCH_BLON_EC(29)
Rev:D change to shortpad
EDP_VDD_EN_R
Q2
+3V
6
2
5
*TSI@2N7002DW
R67 *short_4
R66 *short_4
2
R38
100K_4
R10 *TSI@0_4
R13 *TSI@0_4
1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.
6
4
3
PCH_BLON_R
R65
100K_4
2N7002DW
U1
IN
IN
ON/OFF
G5243AT11U
1
43
Q3
I2C1_SDA_C
I2C1_SCL_C
R52
10K_4
5
1
OUT
2
GND
5
GND
+3V
R9
R12
*TSI@10K_4
*TSI@10K_4
+3V
R58
10K_4
BL#
6
2
1
4 3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C29
C33
*2.2u/10V_8
*0.1u/16V_4
S0
TPD->100kHz,TS=400Khz Intel design guide suggestion MCP PIN 10u. Per inch 3u TS=3x5inch 400kHz10~100u =2.4~0.4k. 100Khz 10~100u=9k~1k.
+3VPCU
R53 *100K_4
LID#
LID591#,EC intrnal PU
D1 1N4148WS
BL_ON
2
Q4 DTC144EUA
1 3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CRT/LVDS/CAMERA/LID
CRT/LVDS/CAMERA/LID
CRT/LVDS/CAMERA/LID
1
C35
0.1u/16V_4
LCDVCC
C34
C30
0.01u/50V_4
22u/6.3V_8
LID# (29)
EC_FPBACK# (29)
ZRW
ZRW
ZRW
21 48Monday, July 20, 2015
21 48Monday, July 20, 2015
21 48Monday, July 20, 2015
LCDVCC
3A
3A
3A
Page 22
HDMI
Dr-Bios.com
5
4
3
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1
<HDM>
##
From PCH
HDMI_DDCCLK_SW(2)
HDMI_DDCDATA_SW(2)
R722 *1M_4
1
R718 *0_4
C411 0.1u/16V_4 C408 0.1u/16V_4
C407 0.1u/16V_4 C406 0.1u/16V_4
C405 0.1u/16V_4 C398 0.1u/16V_4
C389 0.1u/16V_4 C387 0.1u/16V_4
R306 *0_4
+3V
+3V+3V
2
Q41 2N7002K
D D
+3V
2/16 FAE confirmed don't stuff
R322 *2.2K_4
R319 *2.2K_4
INT_HDMITX2P(2) INT_HDMITX2N(2)
INT_HDMITX1P(2) INT_HDMITX1N(2)
INT_HDMITX0P(2) INT_HDMITX0N(2)
INT_HDMICLK+(2) INT_HDMICLK-(2)
HDMI_DDCCLK_SW
HDMI_DDCDATA_SW
HDMI-detect
C C
S0 S0
INT_HDMI_HPD(2)
HDMI_DDCCLK_SW HDMI_DDCDATA_SW
HDMI_MB_HPD_R
R294 4.99K_4
3
HDMI_MB_HPD_R
INT_HDMITX2P_C_R INT_HDMITX2N_C_R
INT_HDMITX1P_C_R INT_HDMITX1N_C_R
INT_HDMITX0P_C_R INT_HDMITX0N_C_R
INT_HDMICLK+_C_R INT_HDMICLK-_C_R
HDMI4K2K_PRE HDMI4K2K_ISET
HDMI4K2K_DDCBUF HDMI4K2K_EN
HDMI4K2K_EQ HDMI4K2K_CFG
EMI
INT_HDMITX2P_C
R315 *120/F_4
INT_HDMITX1P_C
INT_HDMITX0P_C
B B
INT_HDMICLK+_C
INT_HDMITX2N_C
R314 *120/F_4
INT_HDMITX1N_C
R312 *120/F_4
INT_HDMITX0N_C
R303 *120/F_4
INT_HDMICLK-_C
U18
1
IN_D2+
2
IN_D2-
4
IN_D1+
5
IN_D1-
6
IN_D0+
7
IN_D0-
9
IN_CLK+
10
IN_CLK-
38
SCL_SRC
39
SDA_SRC
3
HPD_SRC
36
PD#
8
I2C_STL_EN
16
PRE
34
ISET
14
DDCBUF/SDA_CTL
13
DCIN_EN/SCL_CTL
17
EQ/I2C_ADDR0
23
CFG/I2C_ADDR1
18
REXT
OUT_D2+
OUT_D2-
OUT_D1+
OUT_D1-
OUT_D0+
OUT_D0-
OUT_CLK+
OUT_CLK-
SCL_SINK
SDA_SINK
HPD_SINK
VCC33[1] VCC33[2]
VCCTX15[1] VCCTX15[2] VCCRX15[1] VCCRX15[2] VCCTA15[1]
GND1]
GND[2]
GND_PAD[1] GND_PAD[2] GND_PAD[3] GND_PAD[4] GND_PAD[5] GND_PAD[6] GND_PAD[7] GND_PAD[8] GND_PAD[9]
GND_PAD[10]
30 29
27 26
25 24
22 21
32 33
28
11 37
20 31 12 40 19
15 35
41 42 43 44 45 46 47 48 49 50
260mA (30mils)
PS8201ATQFN40GTR2-A0
AL0082 01003 P S8201AT QFN40GT R2-A0 R EV:E Chan ge
+3V
C386
0.1u/16V_4
C413
0.01u/50V_4
HDMI4K2K_PRE HDMI4K2K_ISET HDMI4K2K_EQ HDMI4K2K_CFG HDMI4K2K_DDCBUF HDMI4K2K_EN
INT_HDMITX2P_C INT_HDMITX2N_C
INT_HDMITX1P_C INT_HDMITX1N_C
INT_HDMITX0P_C INT_HDMITX0N_C
INT_HDMICLK+_C INT_HDMICLK-_C
HDMI_DDCCLK_MB HDMI_DDCDATA_MB
HDMI_MB_HPD
+5V
DDS AL002331000
+3V
+1.5V
3
C773
0.1u/16V_4
R293
*4.7K_4
R296
*4.7K_4
Q26
IN
AP2331SA-7
GND
2/16 FAE confirmed stuff
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
R3162.2K _4
R3172.2K _4
+5V
D31RB501V-40
21
D30RB501V-40
21
HDMI connector
CN12
C409
0.01u/50V_4
R298
*4.7K_4
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19
D2+ D2 Shield D2­D1+ D1 Shield D1­D0+ D0 Shield D0­CK+ CK Shield CK­CE Remote NC DDC CLK DDC DATA GND +5V HP DET
HDMI connector
INT_HDMITX2P_C
INT_HDMITX2N_C INT_HDMITX1P_C
INT_HDMITX1N_C INT_HDMITX0P_C
INT_HDMITX0N_C INT_HDMICLK+_C
INT_HDMICLK-_C
HDMI_DDCCLK_MB
1
OUT
2
C384
0.1u/16V_4
R321
*4.7K_4
R320
*4.7K_4
C3B
B2A
C383 *220p/50V_4
C385
0.1u/16V_4
+3V+3V+3V +3V+3V+3V
R292
*4.7K_4
R295
*4.7K_4
D6 *AZ5125-01J
HDMI_MB_HPD
+1.5V
C410
0.1u/16V_4
R311
*4.7K_4
R721 0_4
12
R720 20K_4
R297
4.7K_4
HDMI_DDCDATA_MB
HDMI_5V
HP_DET_CN
C474
0.01u/50V_4
SHELL1
GND
GND
SHELL2
20
23
22
21
Pre
NC(Low) dB
1(High)
0
1.6
dB
M2.5
dB
default
+13%
-13%
12.4 HDMI ID disable
4.3
8.6
Output pre-emphasis settingPre
ISET
Power trace tracking
A A
+3V(2,4,6,7,8,9,12,13,14,15,16,20,21,23,24,25,26,27,28,29,31,32,33,35,36,40,41,42) +5V(4,20,21,24,25,27,31,40)
ISET EQ CFG DDCBUF DCIN_EN
TMDS output swing adjustment Receiver equalization setting Configuration pin enable active DDC buffer DC coupling enable
5
4
CFGEQ
dB
dB
HDMI ID enable
dB
N/A
3
default
active DDC buffer with default threshold
active DDC buffer without internal pull up resistor
Pin
PS8401A
12
VDDRX NC
15
GND
34
ISET
37
VDD33
DCIN_ENDDCBUF
default,AC coupling input
DC coupling input
N/A
PS8201A
NC NC NC
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
HDMI (PS8201 4k*2k)
HDMI (PS8201 4k*2k)
HDMI (PS8201 4k*2k)
ZRW
ZRW
ZRW
22 48Monday, July 20, 2015
22 48Monday, July 20, 2015
22 48Monday, July 20, 2015
1
3A
3A
3A
Page 23
5
Dr-Bios.com
Giga LAN (LAN)
4
3
2
1
LANVCC
XTAL2
C358 12p/50V_4
1
2
Y1
25MHZ +-30PPM
4
D D
VDD10
VDD10
C C
R701 2.49K/F_4
MDI_0+ MDI_0-
MDI_1+ MDI_1­MDI_2+ MDI_2-
VDD10
LANVCC
LANVCC
33
1 2 3 4 5 6 7 8
U15
GND
MDIP0 MDIN0 AVDD10 MDIP1 MDIN1 MDIP2(NC) MDIN2(NC) AVDD10
MDI_3+ MDI_3-
RSET
10 mils
32
RTL8111H-CG
31
30
RSET
AVDD33
AVDD10
AVDD3311MDIP3(NC)9MDIN3(NC)
10
Leakage circuit (MPC)
CLK_PCIE_REQ4# have PU 10k.
B B
Reserve IOAC No Stuff
+3VPCU
A A
*[email protected]/16V_4
S0
C369
CLK_PCIE_LAN_REQ#(6)
PCIE_LAN_WAKE#(8,26)
IOAC_LAN_W AKE#(29)
1
R260 *IOAC@100K/J_4
R713 NAC@0_4
R715 IOAC@0_4
Q24 IOAC@AO3413
3
+3V_LAN
2
3
XTAL1
C359 12p/50V_4
TP26 TP28 TP27
27
28
26
LED0
LED225LED1
CKXTAL229CKXTAL1
24
REGOUT
23
VDDREG
22
DVDD10
21
LANWAKEB
ISOL ATEB
PERSTB
HSON HSOP
HSIP13HSIN14REFCLK_P15REFCLK_N
CLKREQB
16
12
PCIE_REQ_LAN#_R
+3V
+3V
R281 *10K/F_4
2
3
Q25
2N7002K
R276 *0/J_4
EC_PCU LANVCC
R248
IOAC@0_8
PCIE_LAN_WAKE#_R
20
ISOLATEB
19
PERSTB
18
PCIE_RX5-_LAN_C
17
PCIE_RX5+_LAN_C
CLK_PCIE_LANN (6) CLK_PCIE_LANP (6) PCIE_TX5-_LAN (6)
PCIE_TX5+_LAN (6)
+3V
R277 10K/F_4
1
2
3
Q39
IOAC@2N7 002K
R709 NAC@0/J_4
C367
C366
0.1u/16V_4
10u/6.3V_6
1
REGOUT LANVCC VDD10
C372 0.1u/16V_4 C375 0.1u/16V_4
MAIN POWER(3V_S0)
PCIE_REQ_LAN#_R
LANVCC
R702 IOAC@10K /F_4
PCIE_LAN_WAKE#_R
LANVCC
C350 *0.1u/16V_4
R264 NAC@0_4 R263 IOAC@0_4
+3V_S5
R247 NAC@0_8
C377 *0.1u/16V_4
For RTL8111H Place 0.1uF,4.7uF CAP close to each VDD33 pin-- 11, 32
RTL8111H (LDO mode)
REGOUT
+3V
R711 1K_4
PLTRST# (8,14,25,26,29) IOAC_RST# (26 ,29)
PCIE_RX5-_LAN (6)
PCIE_RX5+_LAN (6)
Consider VCC33 may be connected to Main Power or chipset/b ios's GPO, the pull-low resistor R14 can be NC only when Main Power or chipset/bi os's GPO can ensure to dri ve the ISOLATEB pin to a voltage level < 0.8V at the system state S3~S5. If the ISOLATEB pin can not be well-controlled to a voltage lev el < 0.8V at S3~S5, the p ull-low resistor R14 is needed to make sure the LAN chip is well isolated.
R261 *15K_4
Tramsformer
U42
1
TCT1
MDI_0+ MDI_0-
MDI_1+ MDI_1-
MDI_2+ MDI_2-
MDI_3+ MDI_3-
C364
0.01U/50V/X7R_4
4/20 REV:D add TP85 ~TP100 for AZ chip ICT/ATE Capacitor test
2
TD1+
3
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12
TD4-
25
40 mils (Iout=1A)
C354
0.1u/16V_4
C370
0.1u/16V_4
C365
4.7U/6.3V_6
C361
4.7U/6.3V_6
close to each VDD10 pin-- 3, 8, 22, 30
Rev:D change to shortpad
40 mils (Iout=1A) 40 mils (Iout=1A)
MCT1 MX1+
MX1-
MCT2 MX2+
MX2-
MCT3 MX3+
MX3-
MCT4 MX4+
MX4-
GND
TRANSFOR MER
24 23 22
21 20 19
18 17 16
15 14 13
R246 *short_8
C363
0.1u/16V_4
Layout:All termination signal should have 30 mil trace
LAN_MCT0 LAN_MX0+ LAN_MX0-
LAN_MCT1 LAN_MX1+ LAN_MX1-
LAN_MCT2 LAN_MX2+ LAN_MX2-
LAN_MX3+ LAN_MX3-
LAN_MCT3
C760
0.1u/16V_4
R269 75/F_6
R262 75/F_6
R258 75/F_6
C762
0.1u/16V_4
R251 75/F_6
TERM9
C746 1000P/3KV_1808
C355
C757
0.1u/16V_4
0.1u/16V_4
RJ45 Connector
LAN_MX0+ LAN_MX0­LAN_MX1+ LAN_MX2+ LAN_MX2­LAN_MX1­LAN_MX3+ LAN_MX3-
close to each VDD10 pin-- 22 (reserve)
C758 *1U/6.3V_4
CN11
1 2 3 4 5 6 7 8
LAN_RJ45
VDD10
#$
C761 *0.1u/16V_4
9 10
IOAC_LANPW R#(29)
5
R259 IOAC@10K _4
C368
*IOAC@1000p/50V_4
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, J uly 20, 201 5
Date: Sheet of
Monday, J uly 20, 201 5
Date: Sheet of
2
Monday, J uly 20, 201 5
PROJECT :
LAN(RTL8111H)
LAN(RTL8111H)
LAN(RTL8111H)
ZRW
ZRW
ZRW
3A
3A
3A
4823
4823
1
4823
Page 24
5
Dr-Bios.com
Codec(ADO)
D D
+AZA_VDD
+1.5VA
C520
10u/6.3V_4
ADOGND
Place next to pin 40
Analog
Digital
C C
L13
PVDD
PBY1608 08T-600 Y-N(60, 3A)
C524
0.1u/16V_4
ADOGND
C529 10u/6.3V_4
C510
C509
10u/6.3V_4
0.1u/16V_4
Low is power down amplifier output
C500
C501
10u/6.3V_4 R270 *0_4
0.1u/16V_4
TP34
+5V_PVDD
L_SPK+
L_SPK-
R_SPK-
R_SPK+
PD#
37
38
39
40
41
42
43
44
45
46
47
48
49
Rev:D change to shortpad
R367 *short_6
+3V
C485
0.1u/16V_4
Rev:D change to shortpad
Tied at one point only under the codec or near the codec
R394 *0_4 R393 *0_4 R399 *0_4 R400 *0_4 R375 *0_4 R750 *SHORT_4 C537 *1000p/50V_4
B B
C538 *0.1u/16V_4
ADOGND
Cap need near AVDD1 and AVDD2 power source input
DMIC_DAT_L
DMIC_CLK_L
C5282.2u/6.3V_4
C52710u/6.3V_4
35
36
CBN
CPVDD
CBP
AVSS2
LDO2-CAP
AVDD2
PVDD1
SPK-L+
SPK-L-
SPK-R-
SPK-R+
PVDD2
PDB
SPDIF-OUT
DGND
DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP
DMIC_DAT
+AZA_VDD
C484 10u/6.3V_4
R371 *short_4
R370 22_4
C488 10p/50V_4
Codec PWR 5V(ADO)
ANALOG DIGITAL
+5V
C525
A A
*0.1u/16V_4
C515
*10u/6.3V_6
L16 HCB2012KF220T60/6A/22ohm_8
U25
IN
GND
SHDN
*G923-330T1UF
4
OUT
5
SET
R395 *29.4K/F_4
R390 *10K/F_4
ADOGND
3
2
1
R401 *0_4
C730, C787 close U37 pin3 and L65
5
C523
*10u/6.3V_6
C5302.2u/6.3V_4
34
CPVEE
DMIC_CLK
+5VA
ADOGND
31
32
33
HP-OUT-L
HP-OUT-R
ALC255
R350 0_4
DC-DET
C526
*0.1u/16V_4
4
HP-R2
HP-L2
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO
CODEC_VREF
INT_AMIC-VREFO
C535 2.2U/6.3V_4
C534 10u/6.3V_4
R397 100K_4
ADOGND
ADOGND
C532
0.1u/16V_4
+5VA
C536
10u/6.3V_4
Place next to pin 26
30
VREF
MIC2-VREFO
LINE1-VREFO-L
LINE1-VREFO-R
C481 10u/6.3V_4
ACZ_SDIN
U23
AVSS1
AVDD1
LDO1-CAP
SPDIFO/FRONT JD
R359 33_4
C493 *22p/50V_4
24
LINE2-L
23
LINE2-R
22
LINE1-L
21
LINE1-R
20
NC
19
MIC-CAP
18
MIC2-R/SLEEVE
17
MIC2-L/RING2
16
MONO-OUT
15
14
MIC2/LIN2 JD
13
HP/LINE1 JD
12
1.6Vrms
PCBEEP BEEP_1
C476 0.1u/16V_4
LINE1-L
LINE1-R
R388 *short_6
analog digital
C519 10u/6.3V_4
SLEEVE
RING2
Placement near Audio Codec
R383 200K_4
R378 100K_4
C477 100p/50V_4
PCH_AZ_ CODEC _RST# ( 4)
PCH_AZ_ CODEC _SYNC (4 )
PCH_AZ_ CODEC _SDIN 0 (4 )
PCH_AZ_ CODEC _BITC LK (4)
PCH_AZ_ CODEC _SDOUT (4)
ADOGND
Rev:D change to shortpad
+3VPCU
trace width of SLEEVE & RING2 are required at least 40mil and its length should be asshort as possible
R352 22K_4
R354
4.7K_4
DVDD_IO
25
26
27
28
29
Mute(ADO)
+AZA_VDD +1.5V
R372 1K_4
C494 *1u/10V_4
D15 *RB500V-40
D16 RB500V-40
R369 *10K/J_4
3
ADOGND
HP_JD#SENSEA
+3V
Analog
Digital
Change 47K to 22K for PCBEEP
D9 1N4148WS
D10 1N4148WS
C492
0.1u/16V_4
CPU 3.3V
R365 0_4
R366 *0_4
C489
10u/6.3V_4
Rev:E change connect to +3V
Place next to pin 9
2
3
Q29
*PJA138K
Reserve connect to CPU [ acer request 1/14 ]
DMIC_DATA0_L(4)
DMIC_CLK0_L(4)
SPKR (4)
PCBEEP_E C (29)
+3V +1.5V
Rev:E change to 0402
1
PCH_AZ_ CODEC _RST#PD#
AMP_MUTE# (29)
2
DC-DET circuit(ADO)
+15V
D-Mic (MIC)
R771 *0_4
R772 *0_4
DMIC_DAT_L
R254 0_4
DMIC_CLK_L
R266 0_4
DC-DET
R344 *0_4
DUAL_EN:PU
C356 10u/6.3V_4 C353 0.1u/16V_4 C360 10p/50V_4
U17
6
VDD
5
DATA
4
CLK
SPM0437HD4H-B
D3TVS/6pF_4
12
Single DMIC
DUAL MAIN
Single_GND:PD
GND/EN
CS
GND
+3V
DMIC_DAT_L2 DMIC_CS
DMIC_CLK_L2
D2TVS/6pF_4
12
C357*10p/50V_4
C374*10p/50V_4
+5V
R343 *100K_4
2
1
2
3
1 3
R285 *SP@0_4
R284 SP@0_4
R345 *1M_6
Q27 *DTC144EU
+3V
R288 *0_4
CO-LAYOUT
1.Single DMIC NSM0407DT (AL472376000) <- Main source
SPM0437HD4H (AL000437000)
2.Dual DMIC NSM0410DT (W/ Fortemedia algorithm)
Main MIC CS need connect to second MIC DATA
Universal Audio Jack
MIC2-VREFO
HP-L2
HP-R2 HP-R3
LINE1-L
LINE1-VREFO-L
LINE1-VREFO-R
LINE1-R
SLEEVE
R407 2.2K/J_4
R424 2.2K/J_4
C552 4.7U/6.3V_6
R421 4.7K_4
R418 4.7K_4
C549 4.7U/6.3V_6
HEADPHONE/MIC/LINE combo (ADO)
R420& R422 change to 62 ohm -> 3/11
R408 *short_4
R425 *short_4
R422 62/F_4
R420 62/F_4
R423 *10K/J_4
Rev:D change to shortpad
R417
C547
*10K/J_4
100p/50V_4
ADOGND
C554
100p/50V_4
C553
100p/50V_4
Codec PWR 1.5V(ADO)
Rev:D change to shortpad
R338 *short_6
+5V
3
1
PVDD
Q28
C456
*AO3404
*10u/6.3V_4
2
Single PU: only SPM0437HD4H PD: SPM0437HD4H & NSM0407DT Shared Dual PU & PD : NC
R286 *0_4
R287 SP@0_4
+3V
C373 *10u/6.3V_4 C371 *0.1u/16V_4 C376 *10p/50V_4
DMIC_DAT_L1
DMIC_CLK_L1
D4*TVS/6pF_4
D5*TVS/6pF_4
12
12
C378*10p/50V_4
C379*10p/50V_4
SLEEVE_R
RING2_RRING2
HP-L3
HP_JD#
12
12
D21
C550
100p/50V_4
AZ5725-01F
D22
AZ5725-01F
change to BC005725Z00 and stuff
+1.5VA
1
U16
6
GND/EN
VDD
5
DATA
4
CLK
*NSM0410DT
DUAL SECOND
12
D33 *AZ5125-01H.R7G
ADOGND
#7
1
2
CS
3
GND
Combo Jack
CN21
4 3 1
2 5 6 7
2SJ3080-077111F
+3V
ADOGND
ANALOG DIGITAL
Internal Speaker
40mil for each signal
R_SPK+
R419 *short_6
R_SPK-
R414 *short_6
L_SPK-
R406 *short_6
L_SPK+
R404 *short_6
Rev:D change to shortpad
4
4 ohm : 40mil for each signal
1003 change 0603type
C548
*68p/50V_4
C546
*68p/50V_4
C551
*68p/50V_4
R_SPK+_1 R_SPK-_1 L_SPK-_1 L_SPK+_1
C545
*68p/50V_4
1B-2 2013/12/04 Change PN and footprint.
1B-5 2013/12/17 Change CN14 pin define
3
CN18
6 345 2 1
SPK_CONN_4P
+1.5V
1U/6.3V_4
2
C541
L18 HCB1608KF-121T30_3A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
Date: Sheet of
Monday, July 20, 2015
PROJECT :
ALC255/HP/SPK
ALC255/HP/SPK
ALC255/HP/SPK
1
ZRW
ZRW
ZRW
4824
4824
4824
3A
3A
3A
Page 25
5
Dr-Bios.com
4
3
2
1
2.5" SATA HDD (HDD) SATA ODD Connector
CN14
23
GND23
1
GND1
2
RXP RXN
GND2
TXN
GND24
HDD CONN
GND3
RSVD
3.3V
3.3V
3.3V GND GND GND
GND
GND
TXP
5V 5V 5V
12V 12V 12V
D D
SATA_TXP0_C
3
SATA_TXN0_C
4 5
SATA_RXN0_C
6
SATA_RXP0_C
7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
24
DEVSLP0_R
+5V_HDD
R351 *0_4
60mil
0.01u/50V_4
R326 *0_4
C437
C522 0.01u/50V_4 C513 0.01u/50V_4
C507 0.01u/50V_4 C504 0.01u/50V_4
1B-4
C436
0.01u/50V_4
DEVSLP0 (6)
C435 C438
*0.1u/16V_4
ACCEL_ INT2 (27)
C453
*0.1u/16V_4
SATA_TXP0 (6) SATA_TXN0 (6)
SATA_RXN0 (6) SATA_RXP0 (6)
Rev:D change to shortpad
C457
10u/6.3V_6
+
*100u/6.3V_3528
Connect to G-sensor INT2
+5V
R339 *short_8
CN9
GND14
GND1
RXP RXN
GND2
TXN TXP
GND3
GND GND
GND15
6030D-13G20
14
1 2
SATA_TXP1_C
3
SATA_TXN1_C
4 5
SATA_RXN1_C
6
SATA_RXP1_C
7
8
DP +5V +5V
MD
ODD_PRSNT#_ C
9 10 11 12 13
15
SSD_ID (6)
C726
0.01u/50V_4
R209 10K_4
C751 0.01u/50V_4 C749 0.01u/50V_4
C744 0.01u/50V_4 C743 0.01u/50V_4
R216 10K_4
C330 *15p/50V_4
C733
C721
*0.1u/16V_4
0.01u/50V_4
EC_ODD_EJ (29)
+3V
SATA_TXP1 (6) SATA_TXN1 (6)
SATA_RXN1 (6) SATA_RXP1 (6)
R217 33_4
Prevent ESD/EOS Layout near device
+3V
+5VODD
C730
C737
*0.1u/16V_4
10u/6.3V_6
1A-8
C802 180P/50V_4
R657 *short_8
Rev:D change to shortpad
+
C740
*100u/6.3V_3528
#8
ODD_PRSNT# (4)
+5V_ODD
ODD Power (SATA)
C C
Reserve IOAC Power No Stuff
ODD_POWER(29)
PCH_ODD_EN(2)
B B
R704 IOAC@0_4
R703 *IOAC@0_4
12
R692 *IOAC@100K
TPM NPCT650 (TPM)
ODD_EN
+3VPCU
R695 IOAC@1 00K
5
+15V
12
ODD_EN_Q
6
2
1
4 3
SP@ BOM A,B,C P/N:AL009655K01(SLB9655TT1.2- FW4.31) RAMP P/N: AL000650K01 (NPCT650AAAWX)
Rev:D change to shortpad
+3V
AL000650K01 :NPCT650AAAWX AL009655K01 : SNI SLB9655TT1.2
CLKRUN#(7,29) PLTRST#(8,14,23,26,29)
AL009655K01
AL000650K01
PLTRST#
LPC_LAD3(7,26,29) LPC_LAD2(7,26,29) LPC_LAD1(7,26,29) LPC_LAD0(7,26,29)
LPC_LFRAME#(7,26,29 )
IRQ_S ERIRQ(7,29)
PCLK_TPM(7)
R743 TPM_N@0_4 R742 *short_4
TPMM 1.2
TPMM 2.0
SLB9655 Un-STUFF
A A
3/4 EMI request add 33p near TPM IC
C807
CLKRUN#
TPM@33P/50V_4
5
Rev:D change to shortpad
R744 *4.7K_4
R745 *shortTPM@0_6
LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 LPC_LFRAME# IRQ_S ERIRQ PCLK_TPM
TPM_CLKRUN#CLKRUN# TPM_LRESET#
LPCPD
+5V
R686
12
IOAC@1 00K
IOAC@2 N700 2DW Q37
󱎱󴿓󰵓
TPM@10u/6.3V_6C776 [email protected]/16V_4C775 [email protected]/16V_4C774 [email protected]/16V_4C768
U44
17
LAD3
20
LAD2/SPI_IRQ
23
LAD1/MOSI
26
LAD0/MISO
22
LFRAME/SCS
27
SERIRQ
21
LCLK/SCLK
15
CLKRUN/GPIO04
16
LRESET/SPI_RST
28
LPCPD
Q34 IOAC@A O6402 A
6 5 2 1
MOD_EN_5V
3
12
NPCT650
+3V3_TPM
24
10
19
VDD3
VDD2
4
4
ODD_EN_Q
C752 IOAC@0 .1u/ 25V_6
+3V3_TPM_VSB
SLB9655 STUFF
R723 TPM_I@0_6
R725 TPM_N@0_6
5
VSB
VDD1
GPX/GPIO2
GPIO0/XOR_OUT
GPIO3/BADD
GND2
GND14GND318GND4
TPM@NPCT650
11
25
IOAC@D MN60 1K-7
TPM@10u/6.3V_6C767 [email protected]/16V_4C766
PP
GPIO1
TEST
NC1 NC2 NC3 NC4
+5V_ODD
R672 NAC@0_8
R673 IOAC@2 2_8
3
2
Q36
1
+3V
+3V_S5
7
TPM_PP
6
GPX
2
1 9
TPM_BADD
8
3 12 13 14
BADD SELECTION
01EEh - EFh
'1' - pin is left open. '0' - pin is pulled down.
GPXLPCPD
R727 [email protected]_4
SLB9655 STUFF
+5V
SLB9655 STUFF
R724 *4.7K_4 R728 TPM_I@0_4
R729 *10K_4
TPM_LRESET#
R726
TPM_I@0_4
SLB9655 STUFF
7Eh - 7Fh
SPAD3
SPAD1
SPAD2
*spad-zrz-1np
*spad-zrz-1np
1
1
HOLE19 *H-TC315BC354D134P2
1
HOLE4
HOLE11
*O-ZRTA-4
*O-ZRTA-3
1
+3V3_TPM
HOLE7 *h-tc256ic201bc236d161p2
1
+3V3_TPM+3V3_TPM
3
HOLE13
*O-ZRZ-7
1
*spad-zrz-1np
1
HOLE17 *O-ZRTA-5
HOLE1 *H-TC315BC354D217P2
1
HOLE15
*O-ZRZ-8
SPAD4 *spad-zrz-1np
1
HOLE2 *H-TC315BC354D134P2
1
1
HOLE6 *h-tc256ic201bc236d161p2
1
Add Layout house provide footprint
11/20 HOLE22 change
1
to *O-ZRZ-8
SPAD6
SPAD5
*spad-zrz-1np
*spad-zrz-1np
1
1
HOLE18 *H-TC315BC354D134P2
1
HOLE22
HOLE20
H-C236D142P2
EV@MBZRQ001010
1
WLAN NUT For GPU sku
HOLE16 *H-C118D118
1
2
SPAD8
SPAD7
*spad-zrz-1np
*spad-zrz-1np
1
1
HOLE12 *H-TC315BC354D134P2
1
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
HOLE21 EV@MBZRQ001010
1
HOLE14 *H-O138X114D138X114N
1
HOLE23 *H-C256D134P2
1/14 HOLE23 add *H-C256D134P2
1
HDD/ODD/TPM NPCT650
HDD/ODD/TPM NPCT650
HDD/ODD/TPM NPCT650
SPAD10
SPAD9 *spad-zrz-1np
1
HOLE8 *h-o112x120d112x120n
1
Add Layout house provide footprint
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SPAD11
*spad-zrz-1np
*spad-zrz-1np
1
1
HOLE5 *H-ZRW-1
1
HOLE3 *h-tc256ic201bc236d161p2
1
HOLE10 *h-o152x93d152x93n
1
ZRW
ZRW
ZRW
25 48Monday, July 20, 2015
25 48Monday, July 20, 2015
25 48Monday, July 20, 2015
1
HOLE9 *O-ZRTA-2
SPAD12 *spad-zrz-1np
1
1
3A
3A
3A
Page 26
5
Dr-Bios.com
4
3
2
1
NGFF_M.2 WiFi & BT (NGF)
CN10
1
D D
C C
USBP4+(6)
USBP4-(6)
PCIE_TX6+_WLAN(6) PCIE_TX6-_WLAN(6)
PCIE_RX6+_WLAN(6) PCIE_RX6-_WLAN(6)
CLK_PCIE_WLANP(6)
CLK_PCIE_WLANN(6)
CLK_PCI_LPC(7)
LPC_LFRAME#(7,25,29)
USBP4+ USBP4-
PCIE_TX6+_WLAN PCIE_TX6-_WLAN
PCIE_RX6+_WLAN PCIE_RX6-_WLAN
CLK_PCIE_WLANP CLK_PCIE_WLANN
CLK_PCI_LPC LPC_LFRAME#
WLAN_CLKREQ# WLAN_WAKE_R#
R694 * 0_4 R699 * 0_4
CLK_PCI_LPC_C LPC_LFRAME#_C
3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75
For Debud Card use
Low
High
B B
Reserve only for Intel module no need to stuff by default 11/24
Mini card +3V power enable
Mini card +3V power disable
NGFF
GND USB_D+ USB_D­GND SDIO CLK(O) SDIO CMDIO) SDIO DAT0(IO) SDIO DAT1(IO) SDIO DAT2(IO) SDIO DAT3(IO) SDIO Wake(I) SDIO Reset KEY1 KEY2 KEY3 KEY4 GND PETp0 PETn0 GND PERp0 PERn0 GND REFCLKP0 REFCLKN0 GND CLKREQ0# PEWake0# GND PETp1 PETn1 GND PERp1 PERn1 GND Reserved1 Reserved2 GND
WLAN_NGFF CONN(Type 2230)
3.3Vaux
3.3Vaux
PCM_CLK
PCM_SYNC
PCM_IN
PCM_OUT
UART Wake
UART Rx
UART Tx UART CTS UART RTS
Clink RESET
CLink DATA
CLink CLK
COEX3 COEX2 COEX1
SUSCLK(32KHz)
PERST0# W_DISABLE#2 W_DISABLE#1
NFC I2C SM DATA
NFC I2C SM CLK
NFC I2C IRQ
NFC Reset# RESERVED3 RESERVED4 RESERVED5
3.3Vaux
3.3Vaux
IOAC_W LANPWR#(29)
LED#1
LED#2
GND
Key 5 Key 6 Key 7 Key 8
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74
+3VPCU ( 6,9,11,21,23,24,25,27,30,31,41,42) +1.5V (9,22,24,40 ) +3V (2,4,6,7,8,9,12,13,14, 15,16,21,22,23,24,25,27,28,31,32,35,36,40,41,42)
+WL_VDD+WL_VDD
10u/6.3V_6C340
0.1u/16V_4C755
0.1u/16V_4C753
0.1u/16V_4C735
0.1u/16V_4C731
S0
APU Internal PU APU External nu-PU
WLAN_CLKREQ#
IOAC
WLAN_WAKE_R#
S0
WIFI_SUSCLK
WLAN_RST# BT_EN RF_EN
LPC_LAD0_C LPC_LAD1_C LPC_LAD2_C LPC_LAD3_C
+WL_VDD
+3VPCU
*[email protected]/16V_4
IOAC_W LANPWR#
R680 IOAC@0_4
R671 NAC@0_4
BT_EN (29) RF_EN (29)
R688 *short_4 R690 *short_4 R693 *short_4 R696 *short_4
Rev:D change to shortpad
C345
IOAC No Stuff
PLTRST#
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
1
R231
*IOAC@100K/J_4
R230
IOAC@10K _4
IOAC_RST # (23 ,29)
Q22 IOAC@AO3413
3
+3V_WLAN
2
C344
*IOAC@1000p/50V_4
Reserve IOAC No Stuff
Leakage circuit (MPC)
+3V
R242
R245
4.7K/J_4
4.7K/J_4
PLTRST# (8,14,23,25,29)
LPC_LAD0 (7,25,29) LPC_LAD1 (7,25,29) LPC_LAD2 (7,25,29) LPC_LAD3 (7,25,29)
R221
IOAC@0_8
+3V
2N7002DW
4 3
1
R243 *0/J_4 R253 *0/J_4
5
2
6
Q23
WIFI card reset (non-IOAC) WIFI card reset (IOAC) Debug card reset
C347 *10u/6.3V_6
C346 *0.1u/16V_4
+WL_VDD+WL_VDD
C338 **0.1u/16V_4
R241 *10K_4
R244
*0_4
IOAC
PCIE_CLKREQ_WLAN# (6)
EC_PCU
IOAC_W LAN_WAKE # (29)
PCIE_LAN_WAKE# (8,23)
Stuff
R237 NAC@0_8
C339 **0.1u/16V_4
#9
S0
S0
+3V+WL_VDD
U43
R716 **10K_4
SUSCLK(6)
A A
SUSCLK
NC1VCC
2
A
GND3Y
*74AUP1G07GW
+3V_S5
5
*0.1u/16V_4
4
C763
12
+WL_VDD
R714 *10K_4
WIFI_SUSCLK
5
4
Reserver +1.5v for WIFI module
+1.5V+3V_S5
C759
**[email protected]/16V_4
IOAC_W LANPWR#
*IOAC@10K_4
1
R712
**IOAC@100K/J_4
R710
Q38 *IOAC@AO3413
2
No Stuff
3
3
+3V_WLAN
C756
**IOAC@1000p/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Mini-Card/WL/3G/SIM
Mini-Card/WL/3G/SIM
Mini-Card/WL/3G/SIM
PROJECT :
ZRW
ZRW
ZRW
3A
3A
3A
26 48Monday, July 20 , 2015
26 48Monday, July 20 , 2015
26 48Monday, July 20 , 2015
1
Page 27
5
Dr-Bios.com
KEYBOARD (KBC)
CN20
1
MX0
2
MX1
3
MX2
4
MX3
5
MX4
6
MX5
7
MX6
8
MX7
9
D D
KB CONN
C C
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
29 30
*VPORT_6
MY17 MY16 MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MY2 MY1 MY0
D34
2 1
R776 33_4
MX0 (29) MX1 (29) MX2 (29) MX3 (29) MX4 (29) MX5 (29) MX6 (29)
MX7 (29) MY17 (29) MY16 (29) MY15 (29) MY14 (29) MY13 (29) MY12 (29) MY11 (29) MY10 (29) MY9 (29) MY8 (29) MY7 (29) MY6 (29) MY5 (29) MY4 (29) MY3 (29) MY2 (29) MY1 (29) MY0 (29)
C805 180P/50V_4
Prevent ESD/EOS Layout near device
<EMI>
MX4 MX5 MX6 MX7 MY3 MY2 MY1 MY0 MY7 MY6 MY5 MY4 MY11 MY10 MY9 MY8 MX0 MX1 MX2 MX3 MY15 MY14 MY13 MY12
NBSWON# (11,29)
1
2
3
4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
CP5 *220P_8P4R
CP1 *220P_8P4R
CP2 *220P_8P4R
CP3 *220P_8P4R
CP6 *220P_8P4R
CP4 *220P_8P4R
5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7
KB_BL LED (KBC)
+5V+5V
R148
KBL@10K_4
KB_BL_LED(29)
B B
G-sensor(ACS)
to CPU to SATA HDD
A A
ACCEL_INTA
C425 *22P/50V_4
2
Q19
KBL@DTC144EU
1 3
+3V
ACCEL_INTA(4) ACCEL_INT2(25)
Rev:D change to shortpad
CLK_SDATA(7,12,13) CLK_SCLK(7,12,13)
+G_SEN_PW
5
Rev:D change to shortpad
R334 *4.7K_4 R333 *4.7K_4
C187 [email protected]/6.3V_6
1
Q18 KBL@AO3413
2
20mil 20mil
3
+5V_KB +5V_KB_R
C169
[email protected]/10V_6
R318*shortGS@0_6
C428 [email protected]/16V_4
CLK_SDATA CLK_SCLK
+G_SEN_PW
R336 *shortGS@0_4 R329 *shortGS@0_4
+G_SEN_PW
G_MBDATA_R
G_MBCLK_R
R337 *shortGS@0_4
Rev:D change to shortpad
R119 *shortKBL@0_4
C170
[email protected]/50V_4
2013/10/22 change CN25 pin define for spec.1A-7
2013/10/23 change CN25 footprint.1A-8
+G_SEN_PW
C412
GS@10u/6.3V_6
D8GS@RB500V-40
ACCEL_INTA_R ACCEL_INT2_R
D35GS@RB500V-40
G_MBDATA_R G_MBCLK_R
C454 *33P/50V_4
C431 *33P/50V_4
G_MBDATA_R G_MBCLK_R
+3VPCU
MX4 MX6 MX5 MX7
U19
1
Vdd_IO
14
VDD
11
INT1
9
INT2
7
SA0
6
SDA
4
SCL
8
CS
GS@LIS3DHTR
10
4
RP1 *10K_10P8R
1
9
2
8
3
7 4
56
CN6
346 2 1
KBL@KB_backlight
NC NC
RESERVED RESERVED
GND GND GND GND
4
3
2014/01/13 Change TP power rail from +3V_S5
U12
1
4
G991P11U
1C-2
to +3V_SUS.
+3V_S5
R415
10K_4
R411 *short_4 R412 *short_4
R4092.2K_4
R4102.2K_4
3
VIN2VO
5
GND
6
/FON
GND
7
GND
8
VSET
GND
1A-1 2013/10/15 change pin define and add pwm IC U17.
TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay)
Rev:D change to shortpad
TPD->100kHz,TS=400Khz Intel design guide suggestion MCP PIN 10u. Per inch 3u TS=3x5inch 400kHz10~100u =2.4~0.4k. 100Khz 10~100u=9k~1k.
R405 *TDI@0_4
TDI@2N7002 DW
SMB1ALERT#(7)
1
4 3
Q43
R403 *TDI@0_4
+3V
R218
*10K_4
CPUFAN#(29)
S5 S5
I2C0_SDA(4) I2C0_SCL(4)
MX3
MX2 MX0 MX1
CPU FAN (THM)
R402 *short_4
+3V_S5
TPCLK(29)
TPDATA(29)
Rev:D change to shortpad
6
2
I2C_TP_SDA_R I2C_TP_SCL_R
5
+3V
C321
2.2U_6
1 2
FANPWR = 1.6*VSET
R416
10K_4
+5V
2
L19 *short_6
PTP_PWR_EN#(29)
+TPVDD
C787
*0.1u/16V_4 *0 .1u/16V_4
TPD_INT#(4,29)
FANSIG(29)
TH_FAN_POW ERTH_ FAN_POWER
C723
C728
2.2U_6
.01U/50V_4
1 2
Rev:D change to shortpad
1
C781
0.1u/16V_4
R754 *0_4
C788
2014/01/15 reserve TP power rail +3V_S5.1C-4
R752 *short_6
*AO3413
Q42
2
C786 *1000p/50V_4
1C1-1 2014/02/17 Add Q47 for PTP
3
C790
0.22u/25V_6
TPD_EN(29)
1A-5
2013/10/29 Change CN21 power rail to S5 change Q42 direction and net name,
1A-12
reseve PS2 PU to +3V.
+3V
R609
10K_4
30mils
C719
*.01U/50V_4
CN8
1 2 3
FAN_3P
1
power EN and soft up R694\C713. and C712\C686.
+
C783
0.1u/16V_4
50mil
TPCLK_R TPDATA_R
I2C_TP_SDA_R I2C_TP_SCL_R TPD_INT# TPD_EN
2013/10/18 Change CN21 Pin8 for I2C/PS2 TPD idendify.
+TPVDD
TP CN
789 6 5 4 3 2 1
#:
10
CN17
1A-4 2013/10/17 Change U17 to G991P11U and PU U17 pin1.
2013/10/24 Add alert on U17.1 for CPU themal tempture.1A-9
5
R436 *1M_4
POWER LED(UIF)
R426 *1M_4
R427 *1M_4
Power LED
2 3
10 15
5 12 13 16
PWRLED#(29)
SUSLED#(29)
Battery
BATLED0#(29)
BATLED1#(29)
3
R432 71.5/F_4
R433 130/F_4
R428 *1M_4
R429 *1M_4
R430 71.5/F_4
R431 130/F_4
+3VPCU
+3V
+3VPCU
1 2
D26 *5.5V/25V/410P_4
Blue
LED1
2 3
1
LED_AMBER/BLUE
Amber
1 2
D27 *5.5V/25V/410P_4
+3VPCU
1 2
D24 *5.5V/25V/410P_4
Blue
LED2
2 3
1
LED_AMBER/BLUE
Amber
1 2
D25 *5.5 V/25V/410P_4
2013/10/31CN15 Pin2/3 swap.1A-13
<NU3 :"V8)1BQ)*F!:"8#W<"8)))GX)8I";)&3P)-)
'QM3J))"$!)1BQ)*F""$!#W<"8)))GX)8I";)&3P)-)
R438 *short_4
R440 *0_4
R437 *short_4
R439 *0_4
Rev:D change to shortpad
+3VPCU
+3V_S5
Rev:D change to shortpad
+3VPCU
+3V_S5
2
+3VPCU
for ESD
C555
39P/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZRW
ZRW
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
KB/TP/FAN
KB/TP/FAN
KB/TP/FAN
ZRW
27 48Monday, July 20, 2015
27 48Monday, July 20, 2015
1
27 48Monday, July 20, 2015
3A
3A
3A
Page 28
5
Dr-Bios.com
USB Charger to 3.0 (UBC)
+5VPCU
80 mils (Iout=2A)
C483
1U/10V_4
USB_OC0#(6)
USB_BC_ON(29)
D D
GMT:AL003703000(G3703) TI:AL002544001(TPS2544) Silergy: AL055544000 (SLGC55544VTR)
USB_CHARGE_ON(29)
USB_CLT1(29)
+5VPCU
R364 100K_4
R360 10K_4 R356 10K_4
CTL2 CTL3
U22
1
IN
9
STATUS
13
FAULT
4
ILIM_SEL
5
EN
6
CTL1
7
CTL2 CTL38DP_OUT
TPS2544RTER
OUT
ILIM_LO
ILIM_HI
GND_PAD
GND
DM_IN DP_IN
DM_OUT
12
15
ILIM_LO
16
ILIM_HI
17
14
11
USBP0-_C
10
USBP0+_C
2 3
4
(RILIM_LO 1.2A)
(RILIM_HI 2.3A)
iPAD charging current is about 2.1A so set on 2.3A
1.2A current limit of USB 3.0 SDP mode
USBP0- (6) USBP0+ (6)
80 mils (Iout=2A)
R377 20K/F_4
R376 39K/F_4
USBPWR0
+
C487 100u/6.3V_1206
C497 470P/50V_4
3
C496
0.1u/16V_4
2
CTL1 CTL2 CTL3 ILIM_SEL
SDP 1 1 1 0
1
#;
CDP 1 1 1 1
DCP 0 1 1 X
RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:
1. ILIM_SEL is always set high
2. Load Detection - Port Power Management is not used
3. Mouse / Keyboard wake function is not used If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use RILIM_LO < 80.6 kΩ. The following equation programs the typical current limit: (1) RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.
IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}
Rev:D change to shortpad
USB 3.0 Connector (UB3)
C C
USB3_TXN0(6) USB3_TXP0(6)
USB3_RXN0(6) USB3_RXP0(6)
USBP0-_C
USBP0+_C
C518 *1.6P/50V_4
C517 *1.6P/50V_4
C499 0.1u/16V_4 C498 0.1u/16V_4
USB3_TXN0_C USB3_TXP0_C
R385 *short_4 R386 *short_4
R392 *short_4 R387 *short_4
R384 *short_4 R381 *short_4
USBP0-_R USBP0+_R
USB3_RXN0_R USB3_RXP0_R
USB3_TXN0_R USB3_TXP0_R
C511
*1.6P/50V_4
USBPWR0
C505
*1.6P/50V_4
CN16 USB3.0 CONN
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
VBUS D­D+ GND SSRX­SSRX+ GND SSTX­SSTX+
12
USBPWR0
C502
0.1u/16V_4
USBP0-_R
11111010131312
USB3_RXP0_R
USB protection diodes for ESD. as close as possible to USB connector pins.
1
USB3_TXP0_R
2
3
4
5
USB30_ESD_AZ1065-06F.R7G
U24
I/O 1
10
USB3_TXN0_R
I/O 6
VDD
9
GND_2
NC_1
8
NC_2
I/O 2
7
USBP0+_R
I/O 5
I/O 3
6
USB3_RXN0_R
I/O 4
GND_1
11
SP10
GPIO0
USBP1-_R USBP1+_R
USB3_RXN1_R USB3_RXP1_R
USB3_TXN1_R USB3_TXP1_R
*1.6P/50V_4
18
SD_CMDRREF
17
GPIO0
16
SP9
SP9
15
SP8
14
SP7
SP7
13
SD_CDZ
SP6
USBPWR1
CN13 USB3.0 CONN
1
VBUS
1
2
D-
2
3
D+
3
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
12
C458
C460
*1.6P/50V_4
SD_WP/MS_D1 SD_CDZ SD_D2/MS_D5 SD_D1/MS_D7 SD_D0/MS_D6
SD_CLK VCC_XD
SD_CMD SD_D3/MS_D4
TP41 TP42
TP40
11111010131312
reserve for EMI
R413 *short_4
reserve for EMI
USBPWR1
1
2
3
4
5
USB30_ESD_AZ1065-06F.R7G
USB protection diodes for ESD. as close as possible to USB connector pins.
SD_CLK_R
C543
0.1u/16V_4
C542
4.7u/6.3V_6
USB3_TXN1_R
C462
0.1u/16V_4
USBP1-_R
USB3_RXP1_R
U21
I/O 1
10
USB3_TXP1_R
I/O 6
VDD
9
GND_2
NC_1
8
NC_2
I/O 2
7
USBP1+_R
I/O 5
I/O 3
6
USB3_RXN1_R
I/O 4 GND_1
11
CN4
11
WP
10
9 8 7 6 5 4 3 2 1
CD DATA2 DATA1 DATA0 VSS2 CLK VDD VSS1 CMD CD/DATA3
GND
GND12GND
14
13
GND
15
NC NC
SD-CARD
16 17
Rev:D change to shortpad
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
USB3/Charger/CR/USB2 DB
USB3/Charger/CR/USB2 DB
USB3/Charger/CR/USB2 DB
ZRW
ZRW
ZRW
28 48Monday, July 20, 2015
28 48Monday, July 20, 2015
1
28 48Monday, July 20, 2015
3A
3A
3A
C544 1u/10V_4
U26
1
RREF
2
DM
3
DP
4
3V3_IN
5
CARD_3V3
6
SDREG
GND
25
R342 *short_4 R348 *short_4
R355 *short_4 R353 *short_4
R341 *short_4 R340 *short_4
TP37
TP39
TP35
V18XD _CD#
XD_D7
SP14
SD_D2/MS_D5
SD_D3/MS_D4
SP11
24
22
23
V18
SP1119SP1220SP1321SP14
XD_D7
RTS5170
XD_CD#7SP18SP29SP310SP411SP5
12
SD_WP/MS_D1
SP2
SD_D1/MS_D7
SD_D0/MS_D6
SP5
TP38
TP36
TP43
USBP1-(6)
+5V_S5
C424
1u/6.3V_4
USBON#(29)
B B
USB_OC1#(6)
USBON#
USB2.0 DB (UB2)
1u/6.3V_4 C779
USBON#
USB_OC2#(6)
A A
USB_OC2#
U20
5
IN
OUT
GND
4
/EN
/OC
G524B2T11U
Enable: Low Active /2.5A BCD:AL002822000 GMT:AL000524007
+5V_S5
U46
5
4
G524B2T11U
Enable: Low Active /2.5A BCD:AL002822000 GMT:AL000524007
USBP3-(6)
USBP3+(6)
1
IN
OUT
2
GND
3
/EN
/OC
USBPWR2
1
2
3
R755 *0_4 R787 *0_4
Close USB3.0
470P/50V_4
C792 470P/50V_4
USBPWR1
C450
0.1u/16V_4
C791
0.1u/16V_4
USB2.0 DB
CN22
1 2 3 4 5 6 7 8 91011
C452 100U/6.3V_1206
C789 10U/6.3V_6
12
USBPWR2
C782
100U/6.3V_1206
Card Reader (CRD)
+3V
Rev:D change to shortpad
R391 *short_6
C451
USBP1+(6)
C475 *1.6P/50V_4
USB3_RXN1(6) USB3_RXP1(6)
C469 *1.6P/50V_4
C533
0.1u/16V_4
USB3_TXN1_C USB3_TXP1_C
VCC_XD SDREG
C540 1u/10V_4
USB3_TXN1(6) USB3_TXP1(6)
+3V_CR SD_CLK
C531
4.7U/6.3V_6
C461 0.1u/16V_4 C459 0.1u/16V_4
C539
0.1u/16V_4
R398 6.2K/F_4
USBP7-(6)
USBP7+(6)
R396 *0_4
5
4
3
Page 29
5
Dr-Bios.com
EC(KBC)
R747 2 .2_6
1 2
+3VPCU
+3VPCU_EC and +3V_RTC minimum trace width 12mils.
D D
+3VPCU
R368 100K_4
1 2
C491 1u/6.3V_4
CLK_PCI_EC
R373
C C
*22_4
C490 *10p/50V_4
Prevent ESD/EOS Layout near device
EC_ODD_EJ(2 5)
TS_EN(21)
Prevent ESD/EOS Layout near device
B B
+3VPCU
NBSWON#
A A
Rev:D change to shortpad
LPC_LFRAME#(7,25,26)
D12 SDMK0340L-7-F
2 1
IOAC_WLANPW R#(26)
R746 3 3_4
C799 180P/50V _4
R751 3 3_4
C800 180P/50V _4
R753 10K_4
1
C785
0.1u/16V_4
L12 BLM15AG121SN1D(120,500MA)_4
12 mils
C771
C514
0.1u/16V_4
0.1u/16V_4
+3V
+3V_S5
LPC_LAD0(7,25,26 ) LPC_LAD1(7,25,26 ) LPC_LAD2(7,25,26 ) LPC_LAD3(7,25,26 )
ESPI_RST#(7)
PLTRST#(8,1 4,23,25,2 6)
CLK_PCI_EC(7)
Reserve switch for test (MP remove)
5
KBSMI#(2)
EC_SCI#(2 )
IOAC_WLAN_W AKE#(26)
PCH_BLON_EC(21)
IOAC_LAN_WAKE #(23)
ODD_POWER(25)
IOAC_LANPWR#(23)
PCH_SPI_CLK_EC(7)
SPI_CS0#_UR_ME(7)
PCH_SPI_SI_EC(7)
PCH_SPI_SO_EC(7)
SW2 POWER_SW
6
IRQ_SERIRQ(7 ,25)
SIO_RCIN#(7)
KB_BL_LED(27) DNBSWON#(8)
SUSB#(8,11, 31)
EC_PWROK(8)
CPUFAN#(27)
ME_WR#(4)
AMP_MUTE#(24)
ACIN(30)
TEMP_ MBAT(3 0)
PCBEEP_EC(24)
S5_ON(31,4 0)
PTP_PWR_EN#(27)
3 42
R749 * short_4
Pin 80 EC_APWROK reserve TP
MY16(2 7) MY17(2 7)
MY0(2 7) MY1(2 7) MY2(2 7) MY3(2 7) MY4(2 7) MY5(2 7) MY6(2 7) MY7(2 7) MY8(2 7)
MY9(2 7) MY10(2 7) MY11(2 7) MY12(2 7) MY13(2 7) MY14(2 7) MY15(2 7)
C770
0.1u/16V_4
R361 * 2.2_6
R779 2 .2_6
TP77
TP33
1 2 1 2
PROCHOT_EC
TP78
EC_ODD_EJ_R
TS_EN _C
S5_ON
C777
0.1u/16V_4
PLTRST#_EC
+A3VPCU
C495
0.1u/16V_4
ECAGND
+3VPCU_EC
C780
0.1u/16V_4
+3V_EC
C482
0.1u/16V_4 U45
10
9 8
7 22 13
6
17
126
5 15 23 14
WRST#
4 16
113 123
80
119
33 88 81 87
109 108
71 72 73 35 34
122
95 94
105 101 102 103
56 57 32
100 125
36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55
MX0(2 7) MX1(2 7) MX2(2 7) MX3(2 7) MX4(2 7) MX5(2 7) MX6(2 7) MX7(2 7)
Reset SW (FSW)
5
4
11/11 FAE suggestion pin106 +3V_RTC change to +3VPCU_EC
C508
0.1u/16V_4
LAD0/GPM0(3) LAD1/GPM1(3) LAD2/GPM2(3) LAD3/GPM3(3) LPCRST#/GPD2 LPCCLK/GPM4(3) LFRAME#/GPM5(3)
LPCPD#/GPE6
GA20/GPB5(3) SERIRQ/GPM6(3) ECSMI#/GPD4(3) ECSCI#/GPD3 WRST# KBRST#/GPB6(3) PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
CRX0/GPC0 CTX0/TMA0/GPB2(3)
DAC4/DCD0#/GPJ4(3) DSR0#/GPG6 GINT/CTS0#/GPD5 PS2DAT1/RTS0#/GPF3 DAC5/RIG0#/GPJ5(3) PS2CLK1/DTR0#/GPF2 TXD/SO UT0/GP B1 RXD/SIN0/GPB0
ADC5/DCD1#/GPI5(3) ADC6/DSR1#/GPI6(3) ADC7/CTS1#/GPI7(3) RTS1#/GPE5 PWM7/RIG1#/GPA7 DTR1#/SBUSY/GPG1/ID7 CTX1/SOUT1/GPH2/SMDAT3/ID2 CRX1/SIN1/SMCLK3/GPH1 /ID1
FSCK/GPG7 FSCE#/GPG3 FMOSI/GPG4 FMISO/GPG5
KSO16/SMOSI/GPC3(3) KSO17/SMISO/GPC5(3) PWM6/SSCK/GPA6
SSCE0#/GPG2 SSCE1#/GPG0
KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15
C769
0.1u/16V_4
11
114
121
VCC
VSTBY26VSTBY50VSTBY92VSTBY
VSTBY
LPC
CIR
EXTERNAL SERIAL FLASH
SPI ENABLE
KBMX
KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7
65
4
+3VPCU_ECPL L
L22 BLM15AG121SN1D(120,500MA)_4
C772
0.1u/16V_4
FB_CLAMP_REQ#
106
127
74
84
AVCC
VSTBY(PLL)
VSTBY_FSPI
3
82
20
19
97
GPH7
EGAD/GPE1
EGCS#/GPE283EGCLK/GPE3
ID5/GPH598ID6/GPH699ID3/GPH396ID4/GPH4
L80LLAT/GPE7
L80HLAT/BAO/GPE0
GPIO
IT8987E/CX LQFP
UART port
VSS
1
R784*0_4
R7820_4
R783*0_4
R785*0_4
BI(30)
VSS27VSS
49
WAKE UP
RING#/PWRFAIL#/CK 32KOUT/LPCRST#/GPB7
VSS
VCORE
AVSS
VSS
12
75
91
104
ECAGND
L11
EC_GND
BLM15AG121SN1D(120,500MA)_4
Rev:D Add
3
Vgs = 1.5V
2
PJA138K
1
Q40
C778
0.1u/16V_4
(For PLL Power)
BT_EN
93
SM BUS
PECI/SMCLK2/GPF6(3)
SMDAT2/PECIRQT#/GPF7(3)
CLKRUN#/ID0/GPH0
PS/2
PS2CLK0/CEC/TMB0/GPF0
PS2DAT0/TMB1/GPF1
PWM
TACH0A /GPD6 (3)
TACH1A /TMA1/ GPD7(3 )
A/D D/A
DAC2/TACH0B/GPJ2(3) DAC3/TACH1B/GPJ3(3)
CLOCK
AJ089870F02 IT8987E/CX
+3V_RTC
12
R719 100K_4
3
1
BI_GATE
42
SW1 POWER_SW
12
C765
*0.1u/25V_6
+3VPCU_EC
ACPRESENT (8)
SUS0# (8)
BT_EN (26)
PCH_SLP_SUS# (8)
FB_CLAMP_REQ# (17)
EC_RTCRST (6)
USBON# (28)
USB_BC_ON (28)
USB_CHARGE_ON (28)
CLKRUN# (7,25)
SMCLK0/GPB3 SMDAT0/GPB4 SMCLK1/GPC1 SMDAT1/GPC2
PS2CLK2/GPF4 PS2DAT2/GPF5
PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5
TMRI0/ GPC4(3 ) TMRI1/ GPC6(3 )
PWRSW/GPE4
RI1#/GPD0(3)
RI2#/GPD1
ADC0/GPI0(3) ADC1/GPI1(3) ADC2/GPI2(3) ADC3/GPI3(3) ADC4/GPI4(3)
TACH2/ GPJ0(3 )
GPJ1(3)
GPJ7 GPJ6
IT8987/CX
6
5
3
110 111 115 116 117 118
85 86 89 90
24 25 28 29 30 31
47 48
120 124
107 18 21
112
66 67 68 69 70
76 77 78 79
2 128
R717 *10K_4
C764 *0.1u/16V_4
*PJ4N3KDW
3
Prevent ESD/EOS Layout near device
R190 3 3_4
C796 180P/50V_4
MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA EC_PECR_R
R738 4 3_4
R460 3 3_4
C801 180P/50V_4
Prevent ESD/EOS Layout near device
SUSLED#
NBSWON#
HWPG
ICMNT
C516 10u/6.3V_6
+1V_S5_ON
R349 3 3_4
Prevent ESD/EOS Layout near device
C797 180P/50V_4
R756 * 0_4
R757 * 0_4
2
Q56
TPD_E N (2 7)
MBCLK (30) MBDATA (30)
2ND_MBCLK (7,17)
2ND_MBDATA (7,17)
H_PECI (2)
LID# (21)
IOAC_RST# (23,26)
EC_FPBACK# (21)
TPCLK (27 ) TPDATA (27)
PWRLED# (27) BATLED1# (27) SUSLED# (27) BATLED0# (27)
MAINON_EC (8)
USB_CLT1 (28)
FANSIG (27)
PCH_SUSACK# (8)
SUSON_EC (8)
DGPU_OTP# (17)
NBSWON# (11,27)
SUSC# (8,11) HWPG (8)
RSMRST# (8)
ICMNT (30 )
ECAGND
DGPU_OPP# (17) VRON_EC (8) IDCHG (30)
DPWROK_C (8 )
EC_FB_CLAMP (15,17)
PCH_PWROK (8)
PCH_SUSPWRACK_R (8)
Prevent ESD/EOS Layout near device
R774 3 3_4
+1V_S5_ON (32) TPD_IN T# (4,27 )
SM BUS ARRANGEMENT TABLE
SM Bus 1
Battery
SM Bus 2
PCH/VGA
SM Bus 3
SM Bus 4
+3V_RTC
+3VPCU
6
154 3
WRST#
Vgs = 1.5V
Reserve no stuff
C798 180P/50V_4
2
RF_EN (26)
2
S5_ON
NBSWON#
DGPU_OTP# DGPU_OPP#
FB_CLAMP_REQ#
MAINON_EC
SUSON_EC
VRON_EC
PCH_SPI_SI_EC
PCH_SPI_SO_EC
SM BUS PU(KBC)
MBCLK
Battery module
UMA& VGA SKU Need Stuff
HWPG(KBC)
MBDATA
2ND_MBCLK 2ND_MBDATA
PROCHOT_EC
DDR=1.5V, D1 DNP and D2 POP DDR=1.35V, D1 POP and D2 DNP
HWPG_1.5V(40)
HWPG_1.8VS 5(40)
HWPG_VDDR(35)
HWPG_1VS5(32)
SYS_HWPG(31)
HWPG_+VCCOPC(33 )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R380
100K_4
1
+3VPCU
R741 1 0K_4
R730 1 0K_4
+3V_GFX
R740 E V@10K_4 R382 E V@10K_4 R379 E V@10K_4
R389 1 00K_4
R739 1 00K_4
R463 1 00K_4
R735 * 10K_4
R736 * 10K_4
+3VPCU
R731 4.7K_4 R732 4.7K_4
+3V_S5
R733 2.2K_4 R734 2.2K_4
3
Q30
2
2N7002K
1
D18 RB500V -40
D11 *RB500V -40
D20 *RB500V -40
D17 *RB500V -40
D19 *RB500V -40
D14 *RB500V -40
+3VPCU(6,9 ,11,21,23 ,24,25,27 ,30,31,41, 42)
+3V_GFX(14 ,16,17,42 )
+3V_S5(3,4,6,7, 8,9,11,23 ,25,26,27, 31,40,41)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
KBC IT8587
KBC IT8587
KBC IT8587
H_PROCHOT# (2,30,36)
+3V(2,4,6,7, 8,9,12,13 ,14,15,16, 21,22,23,2 4,25,27,2 8,31,32,35,36,40,41 ,42)
1
+3V
ZRW
ZRW
ZRW
#E
R374 10K_4
HWPG
29 48Monday, July 20, 2015
29 48Monday, July 20, 2015
29 48Monday, July 20, 2015
3A
3A
3A
Page 30
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Dr-Bios.com
4
3
2
1
PQ1 AON6414AL
5
PC140 2200p/50V_6
PC117
2200p/50V_6
6.8uH_7X7X3
PR2 *4.7_6
PC4 *680p/50V_6
GPU_THROTTING# (17)
$!
3 2 1
*0.01u/50V_4
4
VIN
PL1
PC1
PR185 *short_6
PC118
10u/25V_8
Rev:D change to shortpad
PR169
0.01/F_0612
1 2
PR176 *short_4
24780_SRP
24780_SRN
PR175 *short_4
REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 3.965A current limit
ILIM=0.793V Rsr = 0.01ohm
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Charger (BQ24780RUYR)
Charger (BQ24780RUYR)
Charger (BQ24780RUYR)
Date: Sheet of
Date: Sheet of
Date: Sheet of
BAT-V
PC121
2200p/50V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
PC120
10U/25V_8
10U/25V_8
ZRW
ZRW
ZRW
BAT-V
PC127
30 48Monda y, Jul y 20, 2015
30 48Monda y, Jul y 20, 2015
30 48Monda y, Jul y 20, 2015
3A
3A
3A
PC6
100P/50V_4
PR14 316K/F_4
PQ22 AON6414AL
5
4
PC133 1n/50V_4
PR5 20_1206
PR167 *s hort_4
PR177 *s hort_4
PR178 *s hort_4
PR170 *s hort_4
PR171 *s hort_4
PR172 *s hort_4
Rev:D change to shortpad
PC3
100P/50V_4
PR15 100K/F_4
3 2 1
PR165
4.02K/F_4
PC116
0.47u/25V_6
0.01u/50V_4
VA VA1
PD8
SV1040
PD3
P4SMAFJ20A
1
2
PMON
PR342
31.6K/F_4
TEMP_MBAT (29)
+3VPCU
MBCLK ( 29)
MBDATA ( 29)
ICMNT(29)
IDCHG(29)
BI (29)
3
PC13
0.1u/50V_6
PR168 866K/F_4
PR3 133K/F_4
MBDATA
MBCLK
ICMNT
PC7
21)O4UYY
+3VPCU
4
*100P/50V_4
PR16 10K_4
PR179 *10K_4
PJ2
1 2 3 4
D D
C C
Rev:E change
B B
A A
Power conn
PC128
0.1u/50V_6
ACIN(29)
UMA-> PR342 CS33832FB08 38.3K 1/16W + -1% (0402) For 78W
Dis -> PR342 CS33162FB14 31. 6K 1/16W +-1% (0402) For 95W
PC126
0.1u/50V_6
PC125
*100p/50V_4
89 7 6 5 4 3
50458-00801-V01
2 1
10
PJ1
PC8
*47p/50V_4
PR10 *0_4
PR8 100_4
PR6 100_4
2 1
PD1
PDZ5.6B
PDZ5.6B
5
PC124
2200p/50V_6
PR1 100K/F_4
PR4 100K/F_4
PR7 100_4
2 1
PD2
2 1
REGN6V
PMON(36)
BAT-V
TEMP_MBAT
PR9 1M_4
PC9
*47p/50V_4
VA2
PC136
47n/50V_6
PR166
4.02K/F_4
24780_CMSRC
24780_ACDRV
24780_VCC
24780_ACDET
24780_BM#
24780_CMPOUT
24780_ILIM
24780_CMPIN
PR11 100K_4
PC123
Rev:D change to shortpad
PC5
PC115
0.1u/50V_6
1u/25V_6
2
10
38
+VCCIO
PROCHOT
ACP
PU5
BQ24780SRUYR
GND
BATPRES
PAD29GND30GND31GND32GND33GND
22
15
PR13 *0_4
PR12 *short_4
TEMP_MBAT
H_PROCHOT#
PR174 *100K_4
3
1
3
CMSRC
4
ACDRV
28
VCC
6
ACDET
5
ACOK
11
SDA
12
SCL
7
IADP
8
IDCH G
9
PMON
16
TB_STAT
14
CMPOUT
21
ILIM
13
CMPIN
GND35GND36GND37GND
Check with HW side
P.36 VCC_CORE have PU to +1V
PR213
0.01/F_0612
1 2
Rev:D change to shortpad
24780_ACP
24780_ACN
PC2
0.1u/50V_6
18
24780_BATDRV
BATDRV
ACN
17
24780_BATSRC
BATSRC
24
24780_REGN
REGN
25
24780_BST
BTST
26
24780_DH
HIDRV
27
24780_LX
PHASE
23
24780_DL
LDODRV
20
PR183 10/F_ 6
SRP
19
PR184 10/F_ 6
SRN
34
H_PROCHOT# ( 2,29,36)
PR209 *short_4
24780_ACN
24780_ACP
PR210 *short_4
REGN6V
PC122
2.2u/10V_6
PR173
Rev:D change to shortpad
*short_6
24780_SRP
24780_SRN
PC119 47n/50V_6
PC131
0.1u/25V_4
0.1u/25V_4
0.1u/25V_4
,1D3J)0BKJA3J)0@J0U@4)J3O3JP3)#6:!!#)Y1J)5,R)4BJ144@2A
24780_CMPOUT
PC141
0.1u/50V_6
Rev:D change to shortpad
52
4
3
52
4
PC130
PC132
3
2
VIN
AON7410
1
AON7410
1
3
1
PR186 10/F_6
PQ20
PQ21
PQ40 *EV@2N7002K
2
Page 31
5
Dr-Bios.com
4
3
2
1
+15V_ALWP
1
1
52
3
52
3
PD6004 1PS302
PD6008 1PS302
SYS_SHDN#
SYS_HWPG(29)
SYS_SHDN#
Rev:D change to shortpad
PQ6056
AON7410
4
4
PQ6055
AON7752
2
3
1
2
3
1
PC6209
0.1u/50V_6
PC6215
0.1u/50V_6
0.1u/50V_6
PC6099
PR6287
1/F_6
PC6211
0.1u/50V_6
PR6278 *short_4
51225_DH1
51225_VBST1
51225_SW1
51225_DL1
51225_FB1
+3VPCU
PR6283
PR6284
*short_4
*100K/F_4
7
20
51225_EN1
16
17
18
15
2
14
PR6285 *short_6
Rev:D change to shortpad
MAIND
VL 3V_LDO
PC6219 10u/6.3 V_6
13
PGOOD
VREG5
EN1
DRVH1
VBST1
TPS51225RUKR
SW1
DRVL1
VFB1
VO1
CS11CS25VCLK
19
51225_CS1
51225_CS2
51225_VCLK
PR6122 100K/ F_4
PR6124 120K/ F_4
MAIND (32 ,40)
51225_VIN
12
VIN
PU6010
26
Rev:D change to shortpad
PC6100 0.1u/25 V_4
3
VREG3
PR6125 *short_6
PC6098 4.7 u/6.3V_6
EN2
DRVH2
VBST2
SW2
DRVL2
VFB2
GND
GND
GND23GND24GND25GND
SYS_SHDN#(2,40)
VIN
D D
+5VPCU
PC6227
220u/6.3V_6X4.2
C C
OCP:12A
L(ripple current) =(9-5)*5/(2.2u*0.3M*9) =3.367A Iocp=12 -(3.367 /2)=10.316A Vth=(10.316A*14.5mOhm)+1mV=150.589mV R(Ilim)=(150.589mV*8)/10uA ~120.47K
B B
12
+
PC6212
33u/25V_6x4.5
+5VPCU 5 Volt +/- 5% TDC : 7.9A PEAK : 10.5A OCP : 12A Width : 320mil
+
PC6226
0.1u/50V_6
PR6281
15.8K/F_4
PR6120 10K/F_4
PC6220
10u/25V_8
2.2uH_7X7X3
+15V
PL6013
PR6288 *4.7_6
PC6097
0.1u/50V_6
PC6218
2200p/50V_4
PC6221
*680p/50V_6
PR6275 22_8
Rev:D change to
PR6130
shortpad
*short_6
PR6280 10K/F_4
6
SYS_SHDN#
10
51225_DH2
9
8
11
4
21
22
PR6286
51225_VBST2
51225_SW2
1/F_6
51225_DL2
51225_FB2
OCP:9A
L(ripple current) =(9-3.3)*3.3/(2.2u*0.355M*9) ~2.676A Iocp=9-( 2.676/ 2)=7.6 61A Vth=(7.661A*14.5mOhm)+1mV=112.098mV R(Ilim)=(112.098mV*8)/10uA =89.68K
B2A S0->S5 & S0->S3 Power off sequence under 200us SUSB# -> VCCIO
Rev:E Reserve only no stuff
$"
VIN
PC6214
2200p/50V_4
52
PQ6054
AON7410
4
3
1
PC6213
0.1u/50V_6
52
4
PQ6053
3
1
2
+5VPCU
3
1
PC6222
*680p/50V_6
PR6290 *10K/F_4
PQ6057 *2N7002K
AON7752
SUSB#(8,11,29)
PR6289 *4.7_6
2
PL6012
2.2uH_7X7X3
3
1
10u/25V_8
+3VPCU
3.3 Volt +/- 5% TDC : 5.2A PEAK : 6.9A OCP : 9A Width : 220mil
PR6279
6.49K/F_4
PR6121 10K/F_4
MAIND
PQ6058 *2N7002K
PC6216
PC6225
0.1u/50V_6
PC6224
220u/6.3V_6X4.2
+3VPCU
+
+15VVIN
3
1
PR334 1M_6
PQ33
2N7002K
VIN
PC282 *2.2n/50V_4
+5V_S5+3V_S5
PR336 1M_6
S5_ON(29,40)
A A
2
PQ35
DTC144EU
1 3
PR337 1M_6
PR338 22_8
3
2
PQ36 2N7002K
1
PR339 22_8
3
2
2
PQ39 2N7002K
1
5
4
PR335 *1M_6
S5D
+5VPCU
52
4
3
1
TDC : 3.38A PEAK : 4.5A Width : 140mil
PQ34
MDV1528Q
+5V_S5
+5VPCU
52
4
MAIND MAIND S5D
+5V
Rev E Add
C809
0.01u/50V_4
3
PQ38
MDV1528Q
3
1
+5V
TDC : 3.6A PEAK : 4.8A Width : 160mil
C810
0.01u/50V_4
+3VPCU
52
4
3
1
TDC : 2.05A PEAK : 2.74A Width : 100mil
2
+3VPCU
3
PQ18
MDV1528Q
+3V +3V_S5
2
PQ37 AO3404
1
TDC : 0.19A PEAK : 0.25A Width : 20mil
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SYSTEM 5V/3V (NB680 & NB679)
SYSTEM 5V/3V (NB680 & NB679)
SYSTEM 5V/3V (NB680 & NB679)
Date: Sheet of
Date: Sheet of
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRW
ZRW
ZRW
31 48Monday, Jul y 20, 2015
31 48Monday, Jul y 20, 2015
31 48Monday, Jul y 20, 2015
1
3A
3A
3A
Page 32
5
Dr-Bios.com
4
3
2
1
$#
D D
+5VPCU
+3V
PC194
PR257 100K/F_4
HWPG_1VS5(29)
+1V_S5_ON(29)
Rev:D change to shortpad
C C
OCP=A L ripple current =(19-1.05)*1.05/(2.2u*290k*19) =1.555A Vtrip=10-(1.555/2)*14mohm =115.12mV Rlimit=115.12mV/10uA*8=92.09Kohm
B B
PR254 *short_4
PR72 *100K/F_4
PR74 93.1K/F_4
PR71 470K/F_4
51211V_EN 51211V_VBST
51211V_TRIP
51211V_TST
1
PGOOD
3
EN
2
TRIP
5
TST
12
GND
7
V5IN
PU12
RT8237CZQW
GND13GND14GND15GND
16
DRVH
VBST
SW
DRVL
GND
4
9
10
8
6
11
FB
1u/10V_4
Rev:D change to shortpad
51211V_DRVH
51211V_SW
51211V_DRVL
51211V_FB
PR258 *short_6
+15VVIN VIN
PC196
0.1u/50V_6
PQ30 AON6978
G1
1
S1/D2
8
G2
VFB=0.7V
2
D1
D1
D1
9
S2
S2
S2
567
+1V_S5+1V_SUS
51211V_SW
PR76 *4.7_6
PC62 *680p/50V_6
PC203 2200p/50V_6
PL11
0.68uH_7X7X3
PC202
10u/25V_8
Rev:F Change 4.7K
PR251
4.7K/F_4
PC213
0.1u/50V_6
PR66 10K/F_4
VIN
+
PC212 330u/2.5V_6X4.2
+1V_S5
+1V_S5
1.0 Volt +/- 5% TDC : 11.32A PEAK : 15.09A OCP : 18A Width : 460mil
+1V_S5
TDC : 2.36A
PR141 1M_6
PR139 22_8
PR143 1M_6
PR142 *1M_6
3
52
PEAK : 3.14A Width : 100mil
3
SUSON(8,35)
2
PQ6
DTC144EU
2
1
PQ7 2N7002K
1 3
PR140 1M_6
3
2
PQ8
2N7002K
1
PC101 *2.2n/50V_4
2
PQ23 AO3404
1
+1V_SUS
PC6230 22u/6.3V_6
TDC : 0.18A PEAK : 0.24A
MAIND(31,40)
MAINDSUSD
Width : 20mil
A A
5
4
3
Rev:F add
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
+1V_S5 (RT8237CZQW)
+1V_S5 (RT8237CZQW)
+1V_S5 (RT8237CZQW)
4
3
1
PQ26
MDV1528Q
PC6231 *22u/6.3V_6
+VCCIO
Rev:F add
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRW
ZRW
ZRW
1
32 48Monday, July 20, 2015
32 48Monday, July 20, 2015
32 48Monday, July 20, 2015
3A
3A
3A
Page 33
5
Dr-Bios.com
D D
4
+3V_S5
PR292 GT3@0_4
3
2
1
+VCCOPC Power only for 2+3e CPU
$$
+VCCOPC TDC : 4.5A PEAK : 6A Width : 200mil
+VCCOPC
+VCCEOPIO
BST
SW
VOUT
PGND
PC230 GT3@1u/10V_4
9
8
12
2
3
C1
4
C0
+VCCOPC_VBST
+VCCOPC_SW
PR294
GT3@0_6
681_AGND (5)
VoC0C1
0VXX
PR291
GT3@0_6
PC231 [email protected]/50V_6
PR344 GT3@10/F_4
PR286 GT3@0_4
PR287 GT3@0_4
PL13
[email protected]_7X7X3
+VCCOPC_SRC (5)
VCCOPC_VID1VCCOPC_VID1_C
VCCOPC_VID0VCCOPC_VID0_C
PC226
[email protected]/16V_4
+3V_S5
R705 GT3@10K_4
R706 *10K_4
PC222
GT3@22uF/6.3V_6
R708 *10K_4
R707 GT3@10K_4
PC225
GT3@22uF/6.3V_6
VCCOPC_VID0 VCCOPC_VID1
R793 GT3@0_ 8
R794 GT3@0_ 8
PC223
GT3@22uF/6.3V_6
JP16 [email protected]/F_3720
VIN
VRON(8,36)
C C
LPM_ZVM_N(9)
HWPG_+VCCO PC(29)
B B
1 2
PR136 GT3@0_4
+3V_S5
R697
GT3@10K_4
PR280 *GT3@0_4
+VCCOPC_VIN
PC99
PR288 GT3@0_4
PC228
GT3@10u/25V_8
PR135
PR293
GT3@10u/25V_8
*100K/F_4
PR289
PR290 GT3@0_4
GT3@100K/F_4
+3V
GT3@100K/F_4
PC100
+VCCOPC_EN
GT3@2200P/50V_4
+VCCOPC_MODE
+VCCOPC_LP#
1
VIN
PC229
[email protected]/25V_4
5
EN
7
MODE
6
LP#
13
PG
VR RailMode
VCCIO0 ohm
10
3V3
PU14
GT3@NB681GD-Z
AGND
11
LP#
0
Floating
PRIMCORE (MSM)
EDRAM/EOPIO100K
VCCEDRAM
1
10.95V
150K Other
A A
+VCCOPC(5)
VIN(21,30,31,32 ,35,36,4 0,41,42 )
+3V(2,4,6,7, 8,9,12,1 3,14,15, 16,21,22 ,23,24,2 5,27,28 ,31,32,35,36,40,41 ,42)
+3V_S5(3,4,6,7,8, 9,11,23, 25,26,27 ,31,40,4 1)
5
4
00
0.8V
10
1.0V011
1111.05V
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
PROJECT :
+VCCOPC (NB681GD-Z)
+VCCOPC (NB681GD-Z)
+VCCOPC (NB681GD-Z)
ZRW
ZRW
ZRW
1
33 48Monda y, Ju ly 20 , 20 15
33 48Monda y, Ju ly 20 , 20 15
33 48Monda y, Ju ly 20 , 20 15
3A
3A
3A
Page 34
5
Dr-Bios.com
4
3
2
1
$7
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
+VCCEOPIO (NB681GD-Z)
+VCCEOPIO (NB681GD-Z)
+VCCEOPIO (NB681GD-Z)
1
ZRW
ZRW
ZRW
2A
2A
2A
34 48Thursday, Jun e 25, 2015
34 48Thursday, Jun e 25, 2015
34 48Thursday, Jun e 25, 2015
Page 35
5
Dr-Bios.com
4
3
2
1
TDC : 0.53A PEAK : 0.7A Width : 40mil
D D
TDC : 0.38A PEAK : 0.5A
+VDDQ
Width : 20mil
PC237
0.22u/10V_4
+3V
PR295
100K/F_4
C C
HWPG_VDDR(29)
Rev:D change to shortpad
MAINON(8,40)
SUSON(8,32)
PR301
*short_4
PR305
*short_4
PR296 200K/F_4
PR299 100K/F_4
51216_S3
51216_S5
51216_MODE
51216_TRIP
VREF=1.8V
B B
51216_S551216_S3
PR303 *0_4
PC238
0.1u/16V_4
20
17
16
19
18
26
51216_REF
PR297 10K/F_4
PGOOD
S3
S5
MODE
TRIP
PAD
PC234 10u/6.3V_6
22
PAD
6
+VDDQ_VTT
5
21
PAD
51216_REFIN
VTTREF
G5316RZ1D
VDDQSNS9REFIN8REF
PC236 10u/6.3V_6
4
VTTGND
PU15
PAD
25
$8
Close to IC
Greater than or equal 40mil
+5VPCU
PC235
12
14
15
13
11
10
10u/6.3V_6
51216_DRVH
51216_VBST
51216_SW
51216_DRVL
PR308 2/F_6
2
3
1
VTT
VTTSNS
PAD
24
VLDOIN
V5IN
DRVH
VBST
SW
DRVL
PGND
GND
PAD
7
23
PR149 *short_6
Rev:D change to shortpad
PC242 1u/10V_4
PC243
0.1u/50V_6
PQ32
AON7410
PQ31
AON7752
RDSon=mohm
51216_VIN
52
PC248
4
3
1
51216_SW
52
4
3
1
2200p/50V_4
PR313 *4.7_6
PC250 *680p/50V_6
10u/25V_8
PL15
1uH_7X7X3
PC245
PC268
0.1u/50V_6
Close to output cap
+
PC275 330u/2.5V_6X4.2
VIN
+1.35V_SUS
1.35 Volt +/- 5% TDC : 5.11A PEAK : 6.81A OCP : 8A Width : 220mil
+1.35VSUS
+1.35VSUS (3,5,12,13)
PR300
no stuff
DDR_VTTT_PG_CTRL(3)
OCP=10A L ripple current
A A
=(19-1.35)*1.35/(2.2u*400k*19) =1.425A Vtrip=10-(1.425/2)*2.2mohm =20.432mV Rlimit=20.432mV/10uA*8=16.35Kohm
PR298 *0_ 4
5
30.1K/F_4
51216_S3
PC239
0.01u/50V_4
DDR=1.35V PR84=10K/F_4 PR86=30.1K/F_4
4
Mode Frequency Discharge mode
200K 400K Tracking Discharge
100K 300K Tracking Discharge
S3 S5
S0
S3 (mainon off)
S4/S5
1
0
1
1
3
ON
ON ON
OFF
VTTREF+1.35VSUS
ON ON
OFF
OFF OFF00
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Docu ment Number Rev
Size Docu ment Number Rev
Size Docu ment Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
DDR 1.35V (G5316RZ1D)
DDR 1.35V (G5316RZ1D)
DDR 1.35V (G5316RZ1D)
ZRW
ZRW
ZRW
3A
3A
3A
35 48Monday, July 20, 2 015
35 48Monday, July 20, 2 015
35 48Monday, July 20, 2 015
1
Page 36
5
Dr-Bios.com
4
3
2
1
ZRW
ZRW
ZRW
$9
36 48Monday, July 20, 2015
36 48Monday, July 20, 2015
36 48Monday, July 20, 2015
3A
3A
3A
GT2 : PR198 CS38062FB14 80.6K
GT3 : PR198 CS39092FB11 90.9K
PR198 80.6K/F_ 4
D D
no stuff
VCCGT_SENSE(5)
VSSGT_SENSE(5)
C C
PR191 *shor t_4
PR181 *shor t_4
Rev:D change to shortpad
no stuff
ISUMP_B(37)
Close to VCCGT Choke
ISUMN_B(37)
B B
0.1U/25V_4
PC22 330P/50V_4
PR225 10K/F_ 4
PC21 33P/50 V_4
PC129
8200P/50V_4
+VCCGT
PR187 *10_4
*0.01U/50V_4
PR180 *10_4
0.01U/50V_4
PR193
2.61K/F_4
1 2
PR22
11K/F_4
1 2
PR241 10K/F_4_3435NTC
PC14
GT2 : PR192 CS 12742FB02 274 ohm
GT3 : PR192 CS 15622FB16 562 ohm
PR195
1.69K/F_4
PC11
PC10
PC134
12
470K_4_4700NTC
PR226 27.4K/F_ 4
PC12 *0.01U/50V_4
PC20
0.15u/10V_4
Close to VCCGT MOS
PR227
GT2 : PR194 CS21912FB13 1.91K
GT3 : PR194 CS22552FB01 2.55K
1K/F_4
PR24
PR194
1.91K/F_4
PC16
330P/25V_4
PC19
PR21
*2200P/50V_4
*1K/F_4
33nF/25V_4
PR192
274/F_4
PC18
0.022U/25V_4
PC17
0.022U/25V_4
2K/F_4
PR23
PC15
1000P/50V_4
REV:F add 1000p
SVID near PU1
H_CPU_SVIDDAT(5)
VR_SVID_ALERT#_VC ORE(5)
H_CPU_SVIDCLK(5)
H_PROCHOT#(2,29,30)
IMVP_PWRGD(2)
VRON(8,33)
Double check if it's total power
PMON(30)
Rev:D change to shortpad
FCCM_B(37)
PWM1_B(37)
PWM2_B(37)
Rail B
Skylake-U U23e 15W/28W (1+2+1+1 Phase)
VCORE
Icc TDC PL2󶁪23A
Icc Max󶁪29A
OCP󶁪35A
A A
Fsw󶁪MHz
VCORE L/L
R_DC_LL󶁪2.1mV/A
R_AC_LL󶁪2.1mV/A
󶁪
VCCGT VCCGTU
Icc TDC PL2󶁪35A
Icc Max󶁪57A
OCP󶁪A
Fsw󶁪MHz
VCCGT L/L
R_DC_LL󶁪2mV/A
R_AC_LL󶁪2mV/A
5
󶁪
VCCSA
Icc TDC PL2󶁪5A
Icc Max󶁪5A
OCP󶁪6A
Fsw󶁪MHz
VCCSA L/L
R_DC_LL󶁪10.3mV/A
R_AC_LL󶁪10.3mV/A
󶁪
Icc TDC PL2󶁪5A
Icc Max󶁪7A
OCP󶁪A
Fsw󶁪750KHz
VCCGTU L/L
R_DC_LL󶁪6mV/A
R_AC_LL󶁪6mV/A
󶁪
4
+1V_VCCST
PR340
PR341
PC6228
1000P/50V_4
+3V +VC CIO
PR197
10K/F_4
PR25 *short_4
ISL95857_PSYS
ISL95857_IM ON_B
ISL95857_N TC_B
ISL95857_C OMP_B
ISL95857_F B_B
ISL95857_R TN_B
ISL95857_ISU MN_B
ISEN1_B (37 )
ISEN2_B (37 )
PR26 *short_4
PR27 *short_4
PR29 *short_4
Rev:D change to shortpad
GT2 : PR202 CS 39092FB11 90.9K
GT3 : PR202 CS 41002FB28 100K
100/F_4
45.3/F_4
PR40 10_4
PR35 49.9/F_ 4
Rev:D change to shortpad
2/3 FAE suggestion change to 0 ohm
PR200
*10K/F_4
PR32 *short_ 4
PR30 *short_ 4
PR28 *short_ 4
Rev:D change to shortpad
PR196
*10K/F_4
+3V
PR202
90.9K/F_4
ISL95857_VR _HOT
ISL95857_VR _READY
ISL95857_VR _EN
1
PSYS
2
IMON_B
3
NTC_B
4
COMP_B
5
FB_B
6
RTN_B
7
ISUMP_B
8
ISUMN_B
9
ISEN1_B
10
ISEN2_B
41
EP
PR235 27.4 K/F_4
PC23 330 P/50V_4
PR224 10K/F_4
ISL95857_SD A
ISL95857_SC LK
40
39
38
VR_HOT#
VR_READY
VR_ENABLE
ISL95859HRT Z-T
FCCM_B
PWM1_B12PWM2_B13IMON_A14NTC_A15COMP_A16FB_A
11
ISL95857_F CCM_B
ISL95857_PWM 1_B
ISL95857_PWM 2_B
PR236 4 70K_4_4700NTC
Close to VCORE MOS
+5V_S5
VIN
Rev:D change to shortpad
PR204 1/F_6
PR212 *sho rt_8
PC35
PR203
PR206
78.7K/F_4
63.4K/F_4
ISL95857_VIN
ISL95857_VCC
ISL95857_PRO G1
ISL95857_PRO G2
37
36
35
34
33
VIN
SDA
VCC
SCLK
PROG132PROG2
ALERT#
PU1
RTN_A18ISUMP_A19ISUMN_A
17
ISL95857_F B_A
ISL95857_RT N_A
ISL95857_CO MP_A
ISL95857_IM ON_A
ISL95857_NT C_A
PR36
2K/F_4
PR199
2.87K/F_4
PC24 33P/50V_4
PC28 680 P/50V_4
PC135 3 300P/50V_4
GT2 : PR201 CS 21372FB19 1.37K
GT3 : PR201 CS 21212FB18 1.21K C Q1A
3
31
20
ISL95857_ISUM N_A
PR201 1.37 K/F_4
PWM_C
FCCM_C
ISUMN_C
ISUMP_C
RTN_C
COMP_C
IMON_C
PWM_A
FCCM_A
30
ISL95857_PW M_C
29
ISL95857_F CCM_C
28
ISL95857_ISU MN_C
27
26
ISL95857_R TN_C
25
ISL95857_F B_C
FB_C
24
ISL95857_C OMP_C
23
ISL95857_IM ON_C
22
ISL95857_PW M_A
21
ISL95857_F CCM_A
PR34
499/F_4
PC26
1000P/50V_4
GT2 : PR203 CS 37872FB15 78.7k
GT3 : PR203 CS 38872FB18 88.7k
PC34
*2200p/50V_4
GT2 : PR198 CS38062FB14 80.6K GT3 : PR198 CS39092FB11 90.9K
GT2 : PR194 CS21912FB13 1.91K
GT2 : PR203 CS 37872FB15 78.7k
GT2 : PR192 CS 12742FB02 274 ohm
GT2 : PR202 CS 39092FB11 90.9K GT3 : P R202 CS41002FB 28 100K
GT2 : PR201 CS 21372FB19 1.37K GT3 : P R201 CS21212FB 18 1.21K
GT2 : PR207 CS 41622FB11 162k GT 3 : PR207 CS41002J B20 100k
PC40
0.1u/25V_4
Rev:D change to shortpad
PR47 *short_ 4
PR46 *short_ 4
Rev:D change to shortpad
PR43 *short_ 4
PR42 *short_ 4
PR211
249/F_4
PC32
0.1u/25V_4
Rail C
Rail A
PWM_A (37)
FCCM_A (37)
PR41
*1K/F_4
PC33
0.1u/25V_4
PC25
*0.01u/50V_4
PC27 *0.01u/50V_4
PC29
0.01u/50V_4
*2200p/50V_4
PR220
499/F_4
PWM_C (38)
FCCM_C (38)
PR207
162K_4
PC36 330 P/50V_4
GT2 : PR207 CS 41622FB11 162k
GT3 : PR207 CS 41002JB20 100k
PC30
PC31
0.022u/25V_4
1 2
0.1u/25V_4
+VCCCORE
PR31 *10_4
no stuff
PR33 *short_4
PR38 *short_4
Rev:D change to shortpad
PR39 *10_4
no stuff
GT3 : PR194 CS22552FB01 2.55K
GT3 : PR203 CS 38872FB18 88.7k
GT3 : PR192 CS 15622FB16 562 ohm
PR48
*1K/F_4
PC39
PC43
0.1u/25V_4
0.01u/50V_4
PR216
2K/F_4
*2K/F_4
PR44
PC37 33P/50V_ 4
8200P/50V_4
PC139
Close to Vcore Choke
12
PR208 11K/F_4
2
PC41
*680P/50V_4
PR243 10K/F_4_3435NTC
12
PR205
2.61K/F_4
VCORE_SENSE (5)
VCORESS_SENSE (5)
PR217 2.05K/F_4
ISUMN_A (3 7)
ISUMP_A (37)
IMVP8 Vcore Controller
Rail A󶁘1 phase󶁙󶁪VCORE Rail B󶁘2 phase󶁙󶁪VCCGT
Rail C󶁘1 phase󶁙󶁪VCCSA
Close to
1 2
PC38
0.047U/10V_4
PR45
PC42
VCCSA Choke
12
PR219 11K/F_4
499/F_4
PC46
*0.01U/50V_4
1500P/50V_4
PC44 *0.01U/50V_4
PC45
0.01U/50V_4
ISUMN_C (38)
PR242 10K/F_4_3435NTC
12
PR218
2.61K/F_4
ISUMP_C (3 8)
+VCCSA
PR51 *10_4
no stuff
PR50 *short_ 4
PR52 *short_ 4
Rev:D change to shortpad
PR49 *10_4
no stuff
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CPU_CORE (ISL95857HRTZ-T)
CPU_CORE (ISL95857HRTZ-T)
CPU_CORE (ISL95857HRTZ-T)
Date: Sheet of
Date: Sheet of
Date: Sheet of
VSA_SENSE (5)
VSASS_SENSE ( 5)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
Page 37
5
Dr-Bios.com
4
3
2
1
VCORE
Rev:D change to shortpad
PR55
1 2
+5V_S5
*short_6
PC149
PR237 *short_4
PR238 *short_4
Rev:D change to shortpad
Rev:D change to shortpad
PR53
1 2
*short_6
4.7U/10V_6
PC146
D D
Rail A
PWM_A(36)
FCCM_A(36)
VCCGT
C C
+5V_S5
Rail B
+5V_S5
FCCM_B
PR228 *short_4
PR229 *short_4
Rev:D change to shortpad
Rev:D change to shortpad
PR54
1 2
*short_6
PR233 *short_4
PR234 *short_4
Rev:D change to shortpad
PC147
PWM1_B(36)
FCCM_B(36)
B B
Rail B
PWM2_B(36)
A A
4.7U/10V_6
4.7U/10V_6
PU8 AOZ5029QI-5
23
PVCC
24
VCC
1
PWM
2
FCCM
PGND
21
PU6 AOZ5029QI-5
23
PVCC
24
VCC
1
PWM
2
FCCM
PGND
21
PU7 AOZ5029QI-5
23
PVCC
24
VCC
1
PWM
2
FCCM
PGND
21
6
VIN
22
VIN
Rev:D change to shortpad
4
GH
3
BOOT
PR231 *short_6
PC144
PR223 *short_6
PR230 *short_6
Rev:D change to shortpad
0.1u/25V_6
1000P/50V_4
5
VSWH
13
VSWH
19
GL
20
GL
PGND
9
6
VIN
22
VIN
4
GH
3
BOOT
Rev:D change to shortpad
5
VSWH
13
VSWH
19
GL
20
GL
PGND
9
6
VIN
22
VIN
4
GH
3
BOOT
5
VSWH
13
VSWH
19
GL
20
GL
PGND
9
PR60
2.2/F_6
PC58
ISUMP_A(36)
ISUMN_A(36)
PC142
0.1u/25V_6
ISUMP_B(36)
ISUMN_B(36)
PC49
PC143
0.1u/25V_6
PC155
10u/25V_8
PHASE_A
PC47
10u/25V_8
PR57
2.2/F_6
PC55
1000P/50V_4
10u/25V_8
PR58
2.2/F_6
PC56
1000P/50V_4
PHASE_B1
ISEN1_B
PC152
PHASE_B2
ISUMP_B
ISEN2_B
ISUMN_B
PC52
10u/25V_8
PR215 3.65K/F_6
PR214 1/F_6
PC148
10u/25V_8
PR20 3.65K/F_6
PR19 100K/F_6
PR17 1/F_6
PC153
10u/25V_8
PR190 3.65K/F_6
PR189 100K/F_6
PR182 1/F_6
PC154
PC150
0.1U/50V_6
0.1U/50V_6
0.1U/50V_6
PC51
PL4
0.15uH_7X7X4
1 2
3
PL2
0.24UH_7X7X4
1 2
3
VIN
PC50
PL3
0.24UH_7X7X4
1 2
3
2200P/50V_6
4
PC48
2200P/50V_6
4
2200P/50V_6
4
VIN
DCR=0.66mOhm
PC161
0.1u/16V_4
12
12
+
+
PC6229
33U/25V_6x4.5
DCR=1mOhm
PC159
0.1u/16V_4
2/3 FAE suggestion
PR18 *100K/F_4
DCR=1mOhm
PC160
0.1u/16V_4
2/3 FAE suggestion
PR188 *100K/F_ 4
+VCCCORE
+
+
PC59
22u/6.3V_8
VIN
PC170
22u/6.3V_8
22u/6.3V_8
PC168
22u/6.3V_8
+VCCGT
PC172
22u/6.3V_8
ISEN2_B (36)
+VCCGT
+
PC167
22u/6.3V_8
ISEN1_B (36)
PC162
330u/2V_7343
330u/2V_7343
+
PC163
330u/2V_7343
PC158
330u/2V_7343
PC164
PC138
33U/25V_6x4.5
PC166
$:
VCORE
Icc TDC PL2󶁪23A
Icc Max󶁪29A
OCP󶁪35A
Fsw󶁪800KHz
VCORE L/L
R_DC_LL󶁪2.1mV/A
R_AC_LL󶁪2.1mV/A
VCCGT
Icc TDC PL2󶁪35A
Icc Max󶁪57A
OCP󶁪A
Fsw󶁪MHz
VCCGT L/L
R_DC_LL󶁪2mV/A
R_AC_LL󶁪2mV/A
󶁪
󶁪
+VCCCORE(5,36)
VIN(21,30,31,32,35,36,40,41,42)
+VCCGT(5,36)
+5V_S5(28,31,36,41)
5
4
3
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
VCORE/VCCGT (ISL95857HRTZ-T)
VCORE/VCCGT (ISL95857HRTZ-T)
VCORE/VCCGT (ISL95857HRTZ-T)
ZRW
ZRW
ZRW
37 48Monday, July 20, 2015
37 48Monday, July 20, 2015
37 48Monday, July 20, 2015
1
3A
3A
3A
Page 38
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Dr-Bios.com
4
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1
VCCSA
$;
D D
Rev:D change to shortpad
PR56
+5V_S5
C C
Rail C
PWM_C(36)
FCCM_C(36)
1 2
*short_6
PC151
4.7U/10V_6
PR239 * short_4
PR240 * short_4
Rev:D change to shortpad
PU9 AOZ5029QI-5
23
PVCC
24
VCC
1
PWM
2
FCCM
PGND
PGND
9
21
VIN VIN
GH
BOOT
VSWH VSWH
VIN
6 22
4 3
PR232 *short_6
Rev:D change to shortpad
5 13
19
GL
20
GL
PC54
10u/25V_8
PC145
0.1u/25V_6
PHASE_C
PR59
2.2/F_6
PC157
10u/25V_8
PC156
0.1U/50V_6
PC53
2200P/50V_6
PL5
0.47uH_7X7x3
1 2
3
4
+VCCSA
DCR=4.2mOhm
PC171
PC169
0.1u/16V_4
22u/6.3V_8
VCCSA
Icc TDC PL2󶁪5A
Icc Max󶁪5A
OCP󶁪6A
PC165
22u/6.3V_8
Fsw󶁪800KHz
PC57
B B
A A
5
4
1000P/50V_4
ISUMP_ C(36)
ISUMN _C(36)
PR222 3 .65K/F_6
PR221 1 /F_6
+VCCSA(5,36)
VIN(21,30,31,32,35,36,40,41,42)
+5V_S5(28,31,36,41)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
VCCSA (ISL95857HRTZ-T)
VCCSA (ISL95857HRTZ-T)
VCCSA (ISL95857HRTZ-T)
VCCSA L/L
R_DC_LL󶁪10.3mV/A
R_AC_LL󶁪10.3mV/A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
󶁪
ZRW
ZRW
ZRW
1
3A
3A
3A
38 48Monday, J uly 20, 2 015
38 48Monday, J uly 20, 2 015
38 48Monday, J uly 20, 2 015
Page 39
5
Dr-Bios.com
4
3
2
1
$E
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
+VCCGTX (ISL95853HRZ-T)
+VCCGTX (ISL95853HRZ-T)
+VCCGTX (ISL95853HRZ-T)
ZRW
ZRW
ZRW
2A
2A
39 48Thursday, June 25, 2015
39 48Thursday, June 25, 2015
1
39 48Thursday, June 25, 2015
2A
Page 40
5
Dr-Bios.com
4
3
2
1
7!
Rev:D change
D D
HWPG_1.8VS5(29 )
S5_ON(29,31)
C C
+3V_S5
Rev:D change to shortpad
PR245 *short_4
PR249 10K_4
to shortpad
PR244 *short_4
PU10
5
PG
1
EN
PC174
APW8824
0.47uF/4V_4
R2
VIN
4
6
VIN
GND
FB
PR248 15K/F_4
4.7U/6.3V_6
LX
PC173
3
2
PR247
30K/F_4
R1
APW8824_1.8V
PL6
2.2uH/1.85A_2.5X2X1.2
PR246 *short_4
Rev:D change to shortpad
Vo=(0.6(R1+R2)/R2)
PC184
10U/6.3V_6
PC183
*10U/6.3V_6
PC175
0.1u/16V_4
Thermal protection
PD4
1 3
DA2J10100L
PR152 1M_6
2
1
3
PR154 *short_6
PQ12 AO3409
Rev:D change to shortpad
SYS_SHDN# (2,31)
Need fine tune for thermal protect point
Note placement position
TEMP=85C
2
B B
S5_ON
PQ13
DTC144EU
VLVL
+1.8V_S5
1.8Volt +/- 5% TDC : 0.08A PEAK : 0.06A Width : 20mil
+1.8V_S5
MAINON
Rev:D change to shortpad
PR333 *short_4
+3V_S5
Rev:D change
HWPG_1.5V(29)
MAINON(8,35)
PR332 *short_4
PR326 10K_4
to shortpad
PC271
0.47uF/4V_4
5
1
PU19
PG
EN
APW8824
R2
Rev:C change to 220 ohm
PR153 Change to 220 ohm for bo bo sound issue.
PR137 22_8
3
2
PQ4 2N7002K
1
2
PR147 *100K/F_6
PQ11 DTC144EU
1 3
VIN
PR151 1M_4
MAINON_ON_G MAIND
PR150
2
1M_4
4
6
3
1
VIN
GND
FB
PR331 15K/F_4
LX
PR153 220_8
PQ10 2N7002K
PC278
4.7U/6.3V_6
3
8002LX1.05V
2
R1
PR330
22.6K/F_4
2
PL16
2.2uH/1.85A_2.5X2X1.2
PR328 *short_4
Rev:D change to shortpad
Vo=(0.6(R1+R2)/R2)
+VCCIO
PR138 22_8
3
PQ5 2N7002K
1
PC259
PC261
PC265
10U/6.3V_6
+15V+5V+3V
PR148 1M_4
3
2
PQ3 2N7002K
1
*10U/6.3V_6
0.1U/16V_4
PC103 2200p/50V_4
Rev:D Stuff
+1.5V
1.5Volt +/- 5% TDC : 0.45A PEAK : 0.6A Width : 20mil
+1.5V
MAIND (31,32)
PR144 200K/F_4
PR262
10K/F_4_3435NTC
3
2
S5_ON
A A
PQ9 2N7002K
1
1.47K/F_4
LM393_PIN2
2.469V
PR145 200K/F_4
3
2
5
6
84
+
-
+
-
PC104
0.1u/50V_6
1
PU4A AS393MTR-E1
7
PU4B AS393MTR-E1
For EC control thermal protection (output 3.3V)
5
PR155 200K_6PR146
PC102
0.1u/50V_6
4
3
2
PQ14 2N7002K
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
+1.8V/+1.5V/Thermal Protect
+1.8V/+1.5V/Thermal Protect
+1.8V/+1.5V/Thermal Protect
ZRW
ZRW
ZRW
3A
3A
40 48Monday, July 20, 2015
40 48Monday, July 20, 2015
1
40 48Monday, July 20, 2015
3A
Page 41
5
Dr-Bios.com
4
3
2
1
+5V_S5
PR99
Rev:D change
*shortEV@0_6
to shortpad
D D
1658R-EN
PR267 EV@100K/F_4
VGPU_EN(4)
3V_MAIN_PWGD(16,42)
DGPU_PSI(17)
PWM-VID(17)
C C
DGPU_PSI
+3V_S5
PR124 *EV@10K_4
PR120 *EV@0_4
+3VPCU
VIN
PR125 *EV@10K_4
1658R-VREF
DGPU_PSI
PWM-VID
Phase Number of Operation
PWM-SVID : Config B Check PWM-SVID by SKU
B B
Standby Function
PC95
*EV@1U/10V_4
PR269 [email protected]/ F_4
PC219 *[email protected] 1U/50V_4
1 2
PR272 *EV@1/F_4 PR111 *EV@0_4
PR343 *shortEV@0_ 4
Rev:D change to shortpad
PR116 *shortEV@0_4
PR123 *shortEV@0_4
1 2
PC93 EV@1 U/10V_4
R1
PR126
EV@20K/F_4
12
PR130 *[email protected]/F_4
3
1
C
[email protected]/F_4
PQ2 *EV@2N7002K
EV@2700P/50V_4
2
12
PR127
EV@20K/F_4
PR131
EV@2K/F_4PC96
PR132
PR134
*shortEV@0_4
PR274 [email protected]/F_4
PR273
1658R-OCS/CB
*EV@499K/F_4
1658R-EN
1658R-PSI
1658R-VID
1658R-VREF
1658R-REFADJ
R2
1658R-REFIN
R3
R4
R5
Rev:D change to shortpad
+VGPU_CORE
PU3
9
3
4
5
8
6
7
PC92
*[email protected]/50V_ 4
12
PC94
*EV@22P/50V_4
1658R-PVCC
18
OCS/CB
EN
PSI
VID
VREF
REFADJ
REFIN
PVCC
EV@UP1658RQKF
FB
11
1658R-FB
PR129
*shortEV@0_4
Rev:D change to shortpad
12
PC79 EV@1U/10V_4
1
1658R-BOOT1
BOOT1
2
BOOT2
COMP
FBRTN
20
19
15
14
16
17
13
12
10
1658R-FBRTN
1658R-UGATE1
1658R-PHASE1
1658R-LGATE1
1658R-BOOT2
1658R-UGATE2
1658R-PHASE2
1658R-LGATE2
1658R-PG
1658R-COMP
PR122
PR128
*shortEV@0_4
PR266 EV@10K_4
1 2
PR110 *shortEV@0_4
Rev:D change to
12
EV@16K/F_6
shortpad
PC89
12
EV@4700P/25V_4
PC214
EV@22P/50V_4
+3V
UGATE1
PHASE1
LGATE1
UGATE2
PHASE2
LGATE2
PGOOD
GND
21
1658R-BOOT1
1658R-UGATE1
1658R-PHASE1
1658R-LGATE1
GPU_PWR_GD (15)
1658R-BOOT2
1658R-UGATE2
1658R-PHASE2
1658R-LGATE2
PR108
[email protected]/F_6
PC82
[email protected]/25V_6
PR107
[email protected]/F_6
PC81
[email protected]/25V_6
4
4
PQ24 EV@AON6752
4
4
PQ27 EV@AON6752
5
213
5
213
5
213
PQ29 EV@AON6414AL
5
213
PC67
PQ25 EV@AON6414AL
PR65 [email protected]/F_6
PC64 EV@1000p/50V_6
VIN
PC208
PR67 [email protected]/F_6
PC66 EV@1000p/50V_6
EV@2200p/50V_4
[email protected]_7X7X3
EV@2200p/50V_4
[email protected]_7X7X3
PC73
PL7
PC72
PL8
PC69
[email protected]/50V_6
PC207
[email protected]/50V_6
DCR=1.1m ohm
PC68
EV@10u/25V_8
DCR=1.1m ohm
PC180
PC177
EV@10u/6.3V_8
[email protected]/16V_4
PC205
EV@10u/25V_8
PC181
PC178
EV@10u/6.3V_8
[email protected]/16V_4
EV@10u/25V_8
+
PC189
EV@330u/2V_7343
EV@10u/25V_8
+
PC60
EV@330u/2V_7343
+
PC185
EV@330u/2.5V_6X4. 2
7"
12
+
PC210
EV@33U/25V_6x4.5
+VGPU_CORE
+VGPU_CORE
VIN
Rev:D change to
shortpad
VGA_VCCSENSE(14)
VGA_VSSSENSE(14)
A A
5
Parallel
PR61 *shortEV@0_4
PR62 *shortEV@0_4
PR64 *EV@100_4
PR63 *EV@100_4
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, July 20, 2015 41 48
Date: Sheet of
Monday, July 20, 2015 41 48
Date: Sheet of
3
2
Monday, July 20, 2015 41 48
N16S-GT(23W)
+VGPU_CORE Countinue current:26A Peak current:51A OCP:A FSW:300KHz L/L=0mV/A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
+VGPU_CORE(UP1642PQAG)
+VGPU_CORE(UP1642PQAG)
+VGPU_CORE(UP1642PQAG)
Z&[
Z&[
Z&[
1
3A
3A
3A
Page 42
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Dr-Bios.com
4
3
2
1
+1.05V_GFX(14,15,16)
7#
+3V_GFX(14,16,17,29)
D D
TP76
+3VPCU
PR304
*EV@100K/F_4
HWPG_1.05VGFX
+3V
PC241
PR302 *EV@0_4
554PG_0.95V
PR312
EV@10_6
PC249
PC246
[email protected]/50V_4
PC252
EV@10U/6.3V_6
EV@1U/6.3V_4
PU16
4
PG
9
PVIN
10
PVIN
8
SVIN
11
GND
EV@RT8068AZQW
*EV@2200P/50V_4
PR306
*[email protected]_6
NC
LX
LX
NC
FB
EN
1
2
3
7
6
5
554LX_0.95V
554NC_0.95V
554FB_0.95V554SVIN_0.95V
554EN_0.95V
PL14
EV@1uH_7X7X3
PC244
*EV@22P/50V_4
PC247
*EV@68P/50V_4
PR307 *shortEV@0_4
PC240
*[email protected]/16V_4
Rev:D change to shortpad
554FB_0.95V_S
R1
R2
3V_MAIN_PWGD
Rev:D change to shortpad
PR311 *shortEV@0_4
PR310
[email protected]/F_4
PR309
EV@10K/F_4
PC233
[email protected]/16V_4
Vo=0.6*(R1+R2)/R2
3V_MAIN_PWGD (16,41)
check ok 10/21
C C
Rev:D change
check ok 10/21
DGPU_PWR_EN(4)
to shortpad
PR160 *shortEV@0_4
PC109
*EV@1u/10V_4
12
PR158 EV@100K_4
2
PQ15
1 3
EV@PDTC143TT
VIN
PR159 EV@1M_4
PR157 EV@1M_4
3
2
1
PR164 EV@22_8
PQ17 EV@2N7002K
+15V+3V_GFX
PR161 EV@1M_4
DGPU_D
3
2
PQ16 EV@2N7002K
1
2
PC113 *[email protected]/50V_4
+3VPCU
3
1
PQ19 EV@AO3404
+3V_GFX
PC232
EV@22U/6.3V_6
+1.05V_GFX TDC : 1.57 A PEAK : 2.09A Width : 80mil
+1.05V_GFX
+3V_GFX TDC : 0.05 A PEAK : 0.06A Width : 20mil
B B
HWPG_1.5VGFX(16)
FBVDDQ_EN(15)
A A
PR255 EV@100K/F_4
PR346 EV@200K/F_4
+1.5V_GFX_VCC
PR252 *shortEV@0_4
FBVDDQ_EN
PR73 *shor tEV@0_4
Rev:D change to shortpad
PR69 *shortEV@0_6
Rev:D change to shortpad
PR75
*EV@499K/F_4
1
VIN
PR260
*shortEV@0_4
Rev:D change to shortpad
13
14
4
3
5
6
EN
PG
LP#
EV@NB671GQ-Z
NC1
NC2
AGND
PU11
VCC
11
PC195 EV@1u/6.3V_4
1.5VGFX_EN 1. 5VGFX_SW
1.5VGFX_PG
PC199
*[email protected]/16V_4
+1.5V_GFX_VCC
PR250 EV@1/F_6
1.5VGFX_BST 1.5VGFX_BST1
10
BST
VOUT
PGND
FB
12
SW1
SW2
SW3
SW4
[email protected]/50V_6
8
9
15
16
7
2
PC191
PC193
[email protected]/16V_4
1.5VGFX_FB
VREF=0.604V
PC200
PR68 *4.7_6
PC65 *680p/50V_6
PC204
[email protected]/50V_6
EV@2200p/50V_6
PL9
[email protected]_7X7X3
PR259 EV@82K/F_4
PR256 [email protected]/F_4
PC209
PC211
EV@10u/25V_8
PC206
EV@10u/25V_8
[email protected]/50V_6
PC186 EV@22u/6.3V_8
PC176 [email protected]/50V_6
PC187 EV@22u/6.3V_8
PC179 EV@22u/6.3V_8
Note: HWPG_1.5VGFX need PU 10 0k to MPS NB671 pin11
5
4
3
2
VIN
+1.5V_GFX
+1.5V_GFX
1.5 Volt +/- 5% TDC : 4.62 A PEAK : 6.16A
PC182 EV@22u/6.3V_8
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
+1.5V_GFX/+1.05V_GFX/+3V_GFX
Monday, July 20, 2 015 42 48
Monday, July 20, 2 015 42 48
Monday, July 20, 2 015 42 48
Width : 200mil
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Z&[
Z&[
Z&[
1
3A
3A
3A
Page 43
1
Dr-Bios.com
2
3
4
5
6
7
8
VGA power up sequence
SKYLAKE PCH
GPP_B17
A A
+3VPCU
DGPU_PWR_EN
+1.05V_S5
3V_MAIN_PWGD
MOSFET
+3V_GFX
MOSFET +1.05V_GFX
3V_MAIN_EN (GPU GPIO5)
MOSFET
3V_MAIN_PWGD
PG
+3V_MAIN
All 3.3V
NVVDD
PXE_VDD +1.05V
FBVDDQ
t>0
t>0
N15x Power on sequance
Notes: -All 3.3V includes all rails powered at 3.3V
-PEX_VDD 1.05V inculdes all rails that are shared
7$
PWM-VID (GPU GPIO11)
B B
VIN
3V_MAIN_PWGD
PWM
VGPU_PWRGD
+VGPU_CORE
VIN
OR Gate
FBVDDQ_EN
PWM
+1.5V_GFX
HWPG_1.5VGFX VGPU_PWRGD
DGPU_PWROK
EC_FB_CLAMP(EC)
GC6_FB_EN (GPU GPIO0 )
C C
GPP_B19
VGA Reset
PLTRST#
PCH
DGPU_HOLD_RST#
PEX_RST timing
D D
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS
1
2
PEGX_RST#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
4
5
6
Date: Sheet of
7
PROJECT :
GPU PWR CRL
GPU PWR CRL
GPU PWR CRL
ZRW
ZRW
ZRW
43 48Monday, July 20, 2015
43 48Monday, July 20, 2015
43 48Monday, July 20, 2015
8
3A
3A
3A
Page 44
5
Dr-Bios.com
Battery Mode
Non Deep Sx
MAINON
+5V
+3V
+VCCIO
MAINON
9
8
21
22
17
21
11
10
12
21
8
18
19
23
24
28
27
29
24
12
2929
HWPG_VDDR
HWPG_1V_S5
HWPG_1.5V
PG
MAINON
SUSON
PG
+5V_S5
+3V_S5
S5_ON
+1.35VSUS
+VDDQ
+VDDQ_VTT
HWPG_VDDR
26
+1.5V
HWPG_1.5V
+5VPCU
3
+3VPCU
D D
3
S5 PWR
VIN
1
DDR VDDQ VR
S3
S5
C C
3
DDR_VTTT_PG_CTRL
+3VPCU
1.5V VR
EN
RUN PWR
B B
A A
+5VPCU
3
+3VPCU
3
9
+1V_S5
MOS1
MOS2
MOS3
G
VIN
1
+1V_S5
VR
EN
PG
+1V_S5
+1V_S5
HWPG_1VS5
4
VIN
3V/5V
VR
EN2
1
VL
+15V
EN1
NBSWON#
3 3
+3VPCU +5VPCU
5V_LDO
2
PWR BTN
7
30
HWPG
VRON
EC_PWROK
31C
32b
SVID
+1VSUS
VIN
1
IMVP VR
0 ohm
EN
PG
+1V_VCCST
+VCC_CORE
+VCCSA
+VCCGT
IMVP_PWRGD
VRON
33
33
33
34
32a
2
4
EC
MAINON
1721
SUSON
9
3
S5_ON
+1V_S5_ON
8
6
DPWROK
13
RSMRST#
14
ACPRESENT
DNBSWON#
15
SUSC#
SUSB#
PCH_SUSACK#
PCH_SUSPWARN#
PCH_SLP_SUS#
31b
PCH_PWROK
35
38
31C
31C
12
31b
36
16 20
IMVP_PWRGD
EC_PWROK
EC_PWROK
HWPG_1VS5
PCH_PWROK
SYS_PWROK
HWPG+1ms
2
Delay DSW power well 10ms
VCCST_PWRGD
31a
31C
EC_PWROK
PCH_CLK
PLTRST#
VCCST_PWRGD_EN
36
SYS_PWROK
10K ohm
1
CHARGER
DPWROK
RSMRST#
ACPRESENT
PWRBTN#
SLP_S4#
SLP_S3#
SUSACK
SUSWRAN
SLP_SUS#
VCCST_PWRGD
PCH_PWROK
PLTRST#
SYS_PWROK
38
PLTRST#
PROCPWRGD
SVID
SVID
37
BAT-VVIN
Battery
+3VPCU or +3V_S5
RESET#
DDR_PG_CTRL
22
3
DSW PWR
VCCPRIM PWR
VCCMPHY PWR
PCH
VCCSRAM PWR
VCCPGPPA PWR VCCPGPPB PWR VCCPGPPC PWR VCCPGPPD PWR VCCPGPPE PWR VCCPGPPG PWR VCCPGPPF PWR
CORE PWR
CPU
VDDQ PWR
VCCST PWR
SM_PG_CNTL1
VCCST_PWRGD
IMVP_PWRGD
VCCST_PWRGD_EN
34
HSIO PWR
CORE PWR
VR_READY
1
SPI PWR
PLL PWR
HDA PWR
VR_ENVRON
32a
77
+1V_S5
+1V_S5
+1.8V_S5
V1_MPHY
V1_MPHY
+1V_S5
+1V_S5
+1.5V
+3V_S5
+1.8V_S5
+VCCIN
+1.35VSUS
+1V_VCCST
37
CPU
5
4
3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Power Sequence
Power Sequence
Power Sequence
ZRW
ZRW
ZRW
44 48Monday, July 20, 2015
44 48Monday, July 20, 2015
44 48Monday, July 20, 2015
1
3A
3A
3A
Page 45
5
7$
Dr-Bios.com
4
3
2
1
78
Skylake U Non-Deep Sx Platform Power on sequence
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
4
3
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
Power on Sequence
Power on Sequence
Power on Sequence
ZRW
ZRW
ZRW
45 48Monday, July 20, 2015
45 48Monday, July 20, 2015
1
45 48Monday, July 20, 2015
3A
3A
3A
Page 46
3V_LDO
Dr-Bios.com
5
SYS_HWPG
PWRGD5V_LDO
TPS51225
Vin
S5_Vout
S3_Vout
EN1
EN1
5V
3V
defult
󱬯󳴣󴞱
reserve
󴖤󳴣󴞱
D D
PWR
VIN
C C
HWPG_1VS5
PWRGD
VIN
EC
B B
Vin
+1V_S5_ON
+1.0V_S5
RT8237CZQW
EN
Vout
+1V_S5
EC
HWPG_VDDR
EC
MAINON
A A
EC
DDR_VTTT_PG_CTRL
S5 EN
S3 EN
PWRGDSUSON
+1.35VSUS
G5316RZ1D
Vin
S5_Vout
S3_Vout
PCH
VIN
5
+5VPCU
+3VPCU
PCH
4
PCH
MAIND
SUSON
MPHY_EXT_PWR
+1.35VSUS
+VDDQ_VTT
+VDDQ
4
S5D
MAIND
S5D
MAIND
3V_MAIN_PWGD
dGPU_PWR_EN
MDV1528Q
AO3404
0 ohm
TPS22965DSGR
MDV1528Q
MDV1528Q
AO3404
MDV1528Q
RT8068AZQW
AO3404
+3V_S5
+VCCIO
+1V_SUS
V1_MPHY
Vin
S5_ON
3
+5V_S5
+5V
+3V_S5
+3V
+1.05V_GFX
+3V_GFX
HWPG_1.8VS5
PWRGD
+1.8V_S5
APW8824
EN
3
Vout
+1.8V_S5
VIN
VIN
VIN
VRON
SVID
VRON
SVID
VRON
SVID
VIN
VIN
+3V_S5
3V_MAIN_PWGD
FBVDDQ_EN
+VCC_CORE
Vin
ISL95 857HR TZ-T
+VCCSA
Vin
ISL95 857HR TZ-T
+VCCGT
Vin
ISL95 857HR TZ-T
2
Vin
Vin
IMVP_ PWRGD
PWRGD
IMVP_ PWRGD
PWRGD
IMVP_ PWRGD
PWRGD
Vin
MAINON
2
PWRGD
VGPU Core
up1658
EN
PWRGD
+1.5V_GFX
NB671GQ-Z
EN
PWRGD
+1.5V
APW8824
EN
VGPU_PWRGD
Vout
HWPG_1.5VGFX
Vout
VIN
VIN
VIN
HWPG_1.5V
Vout
1
+VGPU_CORE
+1.5V_GFX
Vin
PWM_A FCCM_A
Vin
PWM_C FCCM_C
Vin
PWM1_B FCCM_B
AOZ5029QI
EN
AOZ5029QI
EN
AOZ5029QI
EN
Vout
Vout
Vout
+VCCCORE
+VCCSA
+VCCGT
+1.5V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
SKL PCH PWR CONTROL
SKL PCH PWR CONTROL
SKL PCH PWR CONTROL
1
ZRW
ZRW
ZRW
46 48Monday, July 20, 2015
46 48Monday, July 20, 2015
46 48Monday, July 20, 2015
79
3A
3A
3A
Page 47
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Dr-Bios.com
2
3
4
5
6
7
8
+3V_S5
+3V
7:
SDRAM
2.2K2.2K
R7
A A
SMB_PCH_CLK
R8
SMB_PCH_DAT
+3V
2N7002DW Level shift
CLK_SCLK
CLK_SDATA
2.2K2.2K
G-Sensor
XDP
Skylake U
+3V_S5
B B
R9
VGA_MBCLK
W2
VGA_MBDATA
+3V_S5
*2.2K*2.2K
W3
SMB_ME1_CLK
V3
SMB_ME1_DAT
+3V_S5
2.2K2.2K
+3V_S5
*2N7002DW Level shift
+3V_GFX
C C
2ND_MBCLK
115
2ND_MBDATA
116
00
2.2K2.2K
2.2K2.2K
+3V_MAIN
2N7002DW Level shift
GFX_SCL
GFX_SDA
VGA
EC
IT8987CX
D D
110
MBCLK
111 MBDATA
1
2
3
+3VPCU
4.7K4.7K
CHARGER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
5
6
Date: Sheet of
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SMBUS Block Diagram
SMBUS Block Diagram
SMBUS Block Diagram
ZRW
ZRW
ZRW
47 48Monday, July 20, 2015
47 48Monday, July 20, 2015
47 48Monday, July 20, 2015
8
3A
3A
3A
Page 48
5
Dr-Bios.com
4
3
2
1
Model
ZRW REV:A
D D
ZRW REV:B
Date
1. FIRST RELEASE D
1/20
1. PU3#3 enable pin from VGPU_EN change to 3V_MAIN_PWGD control , add PR343 0ohm. (page 41)
2/4
2. U35#U11 #U12 connect to +1.8V_S5 for support Cannonlake-U PCH. (page 10)
3. U46#3 from net USB_OC1# c hange connect to USB_OC2# PCH. (page 28)
4. Add R776 33 0hm and C805 180 pf in NBSWON#. (page 27)
5. Change LAN WAKE# pin from CPU LAN_WAK E# to WAKE #(ball BB15) to support CPPM(PCIE LTR&OBFF&L1 off) (page 08)
6. add PR344 between PU14#12 & JP13. for GT3 CPU (page 33)
7. add PR345 between PU13#12 & JP12 for GT3 CPU (page 34)
1. net ACCEL_INTA f rom U35#AD1 change to U35#AB1 [ UART0_RX ]
2/12
net TP_INT_PCH from U35#AD2 change to U35#AB3 [ UART0_CTS# ] (page 04)
2. CN3 all pin from UART1 change connect to UART2 (page 04)
3. R587 from 0 ohm change to 1k pull down for USB2_ID (page 06)
4. add C806 for EMI request R748 0 ohm no stuff from EC s ite move at CP U site (page 07)
5. R293 stuff 4.7k , R294 from 4.99k change to 5.49k (page22)
6. XDP_TCK0,XDP_TCK1,XDP_TMS,XDP_TDI don't need pull up or pull down NO Stuff R515 , R558 , R514, R537. (page 02)
CHANGE LIST
2/12 1. p. 40 PR153 from 22 ohm change to 220 ohm for S3/S4/S5 bo bo sound issue.
3/4 1. p.15 & p.16 L1 & L2 footprint from 0603 change to 0402
2. p.6 Delete UART1 4 pcs TP
3. p.25 EMI request add C807 33p for CLKRUN#
4. p.31 +3vpcu & +5vpcu from MPS NB679 change to TPS51225
5. p.24 R420 & R422 vendor suggest from 56 ohm change t o 62 ohm [ CS06202JB15 ]
ZRW REV:C1
C C
ZRW REV:C2
ZRW REV:C3
B B
1. p.2 Stuff 10k ohm_4 of R780 & R781. [ KBSMI# & EC_SCI# ] Pull up to +3V.
4/30 2. P .29 U45 EC pin 70 connect to p.30 PU5#8 IDCHG net
3. P.29 U45 EC pin 95 c onnect to net IOAC_LANPWR#
4. P.06 Add PQ6059 & PQ6060 for EC_RTCRST control reset RTC SRTC_RST# & RTC_RST#
1. p.09 removed MPHY_EXT_PWR control power function. [ Removed U11, R195, R197,C208,C253 ]
5/7
2. p.07 R576 & R572 from v alue 4.7k change to 2.2k
1. p.36 & p37 change new PU6,PU7,PU8,PU9 footprint AOZ5029QI-5 & partnumber AL005029001
5/8
2. p.28 Delete L8,L9,L10,L14,L15,17 EMI Choke footprint
5/25 1. p. 09 R762 [LPM_ZVM_N] & R763 [ MSM# ] No Stuff for GT3
2. p.09 add R789 0 ohm for VCCHDA p.24 R365 stuff 0 ohm connect to +3V , R363 0 ohm no stuff connect to +1.5v
3. p.34 delete +VCCEOPI O circuit
4. p.05 delete R141 , R133 , R547 for SVID data,Alert#,clk
5. p.39 delete VCCGTX circuit
6. p.37 delete PR77 & P R88 for VCCGT connect to VCCGTX
1. p.03 Delete R656 & R189. DDR0_ALERT# & DDR1_ALERT# connect to GND
5/28
2. p.09 Delete R763 0 ohm for net MSM#.
1. p.05 Add C814 1000p/50v _4 connect +1V_VCCST and near R138 SVID.
6/18
2. p.36 Add PC6228 1000p/ 50v_4 connect +1V_VCCST and near RR341 SVID.
3. p.02 Add R795 , R796 , R797 0ohm for DCI USB 3.0 test fixture
4. p.11 delete XDP funct ion connector U27 , U30 , CN1
5. p.09 Remove short Jumper for all +1V_S5.
1. R163 , R159 ,R581, R146 ,R149 , R157 , R173 , R151 , R170 , R136
2. R545 , R144 , R150 , R147 , R551 , R557, R584 [ VCCCLK1~6 ]
3. R168 [ +1_S5 -> V1_MPHY ]
6. p.36 remove PR37 Short pad for SVID_ALERT#
7. p.07 Delete Q33 , R579 ,R583 for SMBus(EC)
1. p.02 Delete TP82 and Net [ SKTOCC# ]
6/23
2. p.05 reserve 5 pcs 1000 pF capacitor in + 1V_VCCST [ C815,C816,C817,C818,C819 ] , no stuff by default
3. p.09 Reserve test point TP95 for CPU AK13 ball
4. p.32 add PC6230 22u/6. 3v_6 in connect to P Q23.1 [+1V_SUS]
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZRW
PROJECT :
ZRW
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Change list
Change list
Change list
5
ZRW
48 48Monday, July 20, 2015
48 48Monday, July 20, 2015
48 48Monday, July 20, 2015
DOC NO.
3A
3A
3A
PROJECT MODEL :
PART NUMBER: DRAWING BY: REVISON:
4
ZWA
APPRO VED BY:
3
DATE:
2
1
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