Acer ASPIRE E5-432 G Schematic

A
1 1
B
C
D
E
Compal Confidential
2 2
A4WAZ/A4WAR Schematics Document
AMD 12~25W APU With Excavator/Puma+ Core and 25W DGPU with Meso/Exo
3 3
LA-C351PR01 REV:1A
2015-02-26
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGI NEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGI NEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGI NEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.
A
B
2015/02 /25 2017/02 /25
2015/02 /25 2017/02 /25
2015/02 /25 2017/02 /25
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Nu mber Re v
Size Document Nu mber Re v
Size Document Nu mber Re v
Custom
Custom
Custom
Dat e: Sheet o f
Dat e: Sheet o f
D
Dat e: Sheet o f
Compal Electronics, Inc.
COVER PAGE
COVER PAGE
COVER PAGE
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
1 5 1Thursday, Febru ary 26, 2015
1 5 1Thursday, Febru ary 26, 2015
1 5 1Thursday, Febru ary 26, 2015
E
1A
1A
1A
A
www.schematic-x.blogspot.com
Compal Confidential
Model Name : Sanji_CZ / Sanji_CZL
B
C
D
E
1 1
DGPU EXO With DDR3*4 Reserve MESO With DDR3*4
GFX*4
AMD
Memory BUS(DDR3) Dual Channel
1.5V DDRIII 1600MHz
( Carrizo-L Only Single Channel ) ( Channel B only )
204pin DDRIII-SO-DIMM X2
BANK 0, 1, 2
CARRIZO
Display Port
Port 2
VGA Translator
(Port 2 is not support
2 2
on Carrizo-L)
DP Switch
eDP Conn.
CRT Conn.
Port 0Port 1
PCI E
GPP1GPP2
AMD FP4 APU Excavator Core BGA 968-balls
Co-lay AMD CARRIZO-L
NGFF
HDMI Conn.
3 3
(WLAN/BT)
Port 4
USB 2. 0
Transformer RJ45
LAN+Card Reader RTL8411B
Card Reader Conn.
BIOS (8M)
Share ROM
AMD FP4 APU
Puma+ Core
BGA 968-balls
LPCSPI
ENE KBC9022
USB 2. 0
Sub/B
2.0 Conn.
USB 3. 0
MB
3.0 Conn.
HD Audio(AZ)
SATA III
Discrete TPM
Port 0
Port 2
USB-I2C Bridge
MB
3.0 Conn.
Port 0
HDD Conn.
Port 1
Port 3
Port 1
Touch
Screen
ODD Conn.
Port 2 Port 4
WLAN/BT Combo
Audio ALC283/255-CG
Port 5
Camera
Port 7
Port 6
Sub-borad
AUDIO_USB/B
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
A
B
Touch PadInt.KBD
Compal Secret Data
Compal Secret Data
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
C
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Digital MIC
D
Int. MIC UAJ
Title
Title
Title
BLOCK DIAGRAMS
BLOCK DIAGRAMS
Size
Size
Size
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
BLOCK DIAGRAMS
Document Num ber R ev
Document Num ber R ev
Document Num ber R ev
B
B
B
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
Int. Speaker Conn.
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
on Sub/B
E
2 51Thursday, February 26, 201 5
2 51Thursday, February 26, 201 5
2 51Thursday, February 26, 201 5
1A
1A
1A
5
4
3
2
1
RAM DDRIII SODIMMX2
+1.5V
+0.75VS
D D
AC ADAPTOR 19V 65W
VIN
PU301
CHARGER BQ 24725AR GRR
+19VB
PU701
RT8880CGQW
+AP U_ CORE
+APU_CORE _N B
BATT+
PU601
BATTERY
CRT / HDMI
C C
B B
+5VS_DISP
HDD x1 ODD x1
+5VS_HDD @ 1.1A
+5VS_ODD @ 2A
Audio
ALC283-CG
+5VDDA_CODEC +5VS_PVDD +3VDD_CODEC +IOVDD_CODEC
FAN
+VCC_FAN
+5VS
+5VS +5VALW
+5VS +3VS +1.5VS
+5VS
EC
+EC_VCC
+3VLP +3VALW
SYX198DQNC
PU501 RT8207PGQW
PU401
SYX198BQNC
PU402
SYX198CQNC
PU801
RT8880CGQW
+1.5V
+0.75VS
PU602
SY8003DFC_
+3VALW
U5/U6 AO430 4L
+APU_CORE_GFX
+1. 8V ALW
U2 TPS22966DPUR
+0. 77 5VALW
VDD_MEM 8A
VTT_MEM 2A
U4 AO430 4L
U3 TPS22966DPUR
U7/U8 AO430 4L
+APU_CORE_FCH
+3VS
+5VS
+0.95VS+0. 95 VALW
+1.5VS
+1.8VS
AMD APU FP4 Carrizo (15W)
+0.775~+1.4V
+0.775~1.2V
+0.95 VALW
+0.95VS
+1.5V
+1.5VS
+1.8VS
+1.8VALW
+3VALW
+0.775~1.2V
+0.775~1.2V
VDDCR_CPU @ 40A
VDDCR_NB @ 12A
VDDP_S5 @ 0.8A
VDDP @ 7A
VDDP_GFX @ 1.5A
VDDIO_MEM @ 3A
VDDIO_AUDIO @ 0,2A
VDD_18 @ 1.5A
VDD_18_S5 @ 0.5A
VDD_33_S5@ 0.2A
VDD_33 @ 0.2A+3VS
VDDCR_FCH_S5 @ 0.2A
VDDCR_GFX @ 30A
VDDBT_RTC_G @ 4.5uA+1.5V_RTC
USB2.0 x1 USB3.0 x2
+USB3_VCCB
LAN/CR Combo
RTL8411-CG
A A
+3V_LAN @ 1A
+5VALW
+3VALW
NGFF (WL+BT)
+3VS_WLAN @ 2A
+3VS
5
LCD panel
14"
+INVPW R_B+
+LCDVDD @ 1.4A
HD Camera
+3VS_CMOS
Touch Screen
+5VS_TS
+19VB +3VS
+3VS
+5VS
PU101
SYX196DQNC
PU1201 ISL6288
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
4
+1. 5V SDGPU
+VG A_ CORE
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
3
U1895 TPS22966DPUR
+1. 8V SDGPU+0.95VSDG PU
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
VGA
U74 AP2821
+3V SD GPU
+RT CB ATT
+RT C_ APU
Title
Title
Title
Size
Size
Size
Document Num ber R ev
Document Num ber R ev
Document Num ber R ev
B
B
B
Date : Sheet o f
Date : Sheet o f
2
Date : Sheet o f
PU101 AP2138N-1.5TRG1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
POWER MAP
POWER MAP
POWER MAP
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
3 51Thursday, February 26, 201 5
3 51Thursday, February 26, 201 5
3 51Thursday, February 26, 201 5
1
RTC Bettary
1A
1A
1A
A
Voltage Rails
VIN
+19VB
+APU_CORE
+APU_CORE_ GFX
1 1
+APU_CORE _FCH
+0.95 VALW
+0.95VS
+1.8VALW
+1.8VS
+1.5V
+1.5VS
+0.75VS
+3VALW
+3VS
+5VALW
+5VS
+RTC_APU
+3VSDGPU
+1.8VSDGPU
2 2
+1.5VSDGPU
+0.95VSDGPU
+VGA_CORE
DescriptionPower Plane
Adapter power supply (19V)
AC or batt ery power rail for power circuit.
Core voltage for APU
Voltage for On-die VGA of APU
Voltage for GFX
0.95V always on power rail
0.95V switched power rail
1.8V always on power rail
1.8V switched power rail
1.5V power rail for APU and DDR
1.5V switched power rail
0.75V switched power rail for DDR terminator
0.775V always on power rail+0.77 5VALW
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
RTC power
VGA power
VGA power
VGA power
VGA power
VGA power
ON
ON
ON+APU_CORE_NB
ON
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
ON
ON
ON
ON
ON
SMBus List
EC SMBus Port1 (+3VALW)
Device
Smart Battery
3 3
APU SMBus Port0 (+3VS)
Device
DDR DIMM1
DDR DIMM2
Mini Card (DNI)
ZZZ
PCB
Part Number = DAZ1CC00100 PCB A4WAZ LA-C 351P LS-C341P
4 4
Address
0001 011X b
Address
1010 000Xb
1010 001Xb
A
EC SMBus Port2 (+3VS)
HEX
16H
Device
SB-TSI (APU)
VGA Temp.
Address
1001 100X b
APU SMBus Port1(+3VALW)
HEX
Device
A0H
A2H
Address
B
S5S3S0
ONONON
ON ON
OFF
OFF
OFFOFF
OFFOFF
ONONONFusion Controller H ub Power Supply
ONON
ON
OFF
OFF
ON ON
OFFOFF
OFF
ON
OFF
OFF
OFF OFF
ON
ON
ONON
OFFOFF
ONON
OFFOFF
ONONON
OFF OFF
OFF
OFF
OFF OFF
OFF OFF
OFF OFF
HEX
98H
41H
HEX
B
C
Board ID / SKU ID Table for AD channel
BOM Structure Table
BTO ItemBOM Structure @ @EM C@ EMC @ CZE MC@ CZL EMC @ 255 @ 283 @ 901 2@ 902 2@ CZ@ CZL @ EXO @ MES O@ CZU MA@ CZL UMA @ VGA @ UMA @ TPU SB@ ECI 2C@ TPM @ BL@ 45@ CON N@ JP@ RS@ TP@
Unpop
EMI/ESD Unpop
EMI/ESD pop
Carrizo EMI/ESD pop
Carrizo-L EMI/ESD pop
ALC255 Pop
ALC283 Pop
KBC9012 Pop
KBC9022 Pop
Carrizo Pop
Carrizo-L Pop
Exo Pop
Meso Pop
CZ UMA Pop
CZL UMA Pop
DIS Pop
UMA Pop
USB to I2C Bridge Pop
EC I2C Bridge Pop
TPM Pop
Keyboard Backlight Pop
HDMI Royalty
ME Connector
Jump
R-Shor t
Test Point
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELEC TRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELEC TRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELEC TRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
D
POWER SEQUENCE
G-A
G-B
G-C
G-D
G-E
+RT C
EC_ ON
+5V ALW
3V_ EN
+3V ALW
0.95 _1.8 VA LW_ PW RE N
+1.8 VALW /+ 0.9 5V AL W
0.95 V_S PO K
+0.7 75V AL W
SYS ON
+1. 5V
SUS P#
+5VS /+3V S/ +1 .8V S
+1.5 VS/ 0.7 5V S
0.95 VS_ PWR _E N#
+0. 95V S
VR_ ON
+APU _C OR E
+APU _CO RE _NB
+APU _G FX
dGPU POWER SEQUENCE
PE_G PI O1
VGA _ON
+3VS DG PU
+1.8 VSDG PU/ 0. 95V SD GP U
VGA_ ON _B
+VGA _C OR E
VGA_ PW RG D
+1.5 VSD GP U
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
E
BOARD ID Table
Board ID
0 1 2 3 4 5 6 7
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
B
B
B
Date : Sheet of
Date : Sheet of
Date : Sheet of
PCB Revision CZ EVT CZL EVT CZ DVT CZL DVT CZ PVT CZL PVT CZ Pre-MP CZL Pre-MP
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
NOTES LIST
NOTES LIST
NOTES LIST
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
4 51Thursday, February 26, 2015
4 51Thursday, February 26, 2015
4 51Thursday, February 26, 2015
E
1A
1A
1A
5
4
UAPU1B @
PCIE
3
2
1
U10
PCIE_ARX_DTX_P0<29> PCIE_ARX_DTX_N0<29>
PCIE_ARX_DTX_P1<31>
D D
1 2
R542 196_0402_1%CZ@
1 2
R404 1.69K_0402_1%CZL@
C C
B B
PCIE_ARX_DTX_N1<31>
PEG_GTX_C_ARX_P0 PEG_GTX_C_ARX_N0
PEG_GTX_C_ARX_P1 PEG_GTX_C_ARX_N1
PEG_GTX_C_ARX_P2 PEG_GTX_C_ARX_N2
PEG_GTX_C_ARX_P3 PEG_GTX_C_ARX_N3
PEG_GTX_C_ARX_P[0..3]<14> PEG_GTX_C_ARX_N[0..3]<14>
U9
P7 P6
U7
P10
P9
N6 N5
N9 N8
L10
K6 K5
K9 K8
T6 T5
T9 T8
L7 L6
L9
J7 J6
P_GPP_RXP[0]
P_GPP_RXN[0]
P_GPP_RXP[1]
P_GPP_RXN[1]
P_GPP_RXP[2]
P_GPP_RXN[2]
P_GPP_RXP[3]
P_GPP_RXN[3]
P_ZVDDP
P_GFX_RXP[0]
P_GFX_RXN[0]
P_GFX_RXP[1]
P_GFX_RXN[1]
P_GFX_RXP[2]
P_GFX_RXN[2]
P_GFX_RXP[3]
P_GFX_RXN[3]
P_GFX_RXP[4]
P_GFX_RXN[4]
P_GFX_RXP[5]
P_GFX_RXN[5]
P_GFX_RXP[6]
P_GFX_RXN[6]
P_GFX_RXP[7]
P_GFX_RXN[7]
LAN/CR
WLAN
FP4 REV 0.93
FP4_BGA968
P_GPP_TXP[0]
P_GPP_TXN[0]
P_GPP_TXP[1]
P_GPP_TXN[1]
P_GPP_TXP[2]
P_GPP_TXN[2]
P_GPP_TXP[3]
P_GPP_TXN[3]
P_ZVSS/P_RX_ZVDDP
P_GFX_TXP[0]
P_GFX_TXN[0]
P_GFX_TXP[1]
P_GFX_TXN[1]
P_GFX_TXP[2]
P_GFX_TXN[2]
P_GFX_TXP[3]
P_GFX_TXN[3]
P_GFX_TXP[4]
P_GFX_TXN[4]
P_GFX_TXP[5]
P_GFX_TXN[5]
P_GFX_TXP[6]
P_GFX_TXN[6]
P_GFX_TXP[7]
P_GFX_TXN[7]
Carrizo:
PCIE_ATX_DRX_P0
R1
PCIE_ATX_DRX_N0
R2
PCIE_ATX_DRX_P1
R4
PCIE_ATX_DRX_N1
R3
N1 N2
N4 N3
P_ZVSSP_ZVDDP
U6
M2 M1
L1 L2
L4 L3
J1 J2
J4 J3
H2 H1
G1 G2
G4 G3
1 2
C19 .1U_0402_16V7K
1 2
C20 .1U_0402_16V7K
1 2
C17 .1U_0402_16V7K
1 2
C18 .1U_0402_16V7K
1 2
R73 1K_0402_1%CZL@
1 2
R541 196_0402_1%CZ@
PEG_ATX_GRX_P0 PEG_ATX_GRX_N0
PEG_ATX_GRX_P1 PEG_ATX_GRX_N1
PEG_ATX_GRX_P2 PEG_ATX_GRX_N2
PEG_ATX_GRX_P3 PEG_ATX_GRX_N3
PEG_ATX_GRX_P[0..3] <14>
PEG_ATX_GRX_N[0..3] <14>
UAPU1
PCIE_ATX_C_DRX_P0 <29> PCIE_ATX_C_DRX_N0 <29>
PCIE_ATX_C_DRX_P1 <31> PCIE_ATX_C_DRX_N1 <31>
UAPU1
+0.95VS+0.95VS
CZA10@
APU
Part Number = SA00008T400 S IC A10-8700P AM870PAAY43KA 1.8G BGA 968P APU
UAPU1
CZFX@
APU
Part Number = SA00008T300 S IC FX-8800P FM880PAAY43KA 2.1G BGA 968P APU
UAPU1
CZLA8@
APU
Part Number = SA00008PS00 S IC A8 SERIES AM7410JBY44JB 2.2G BGA968
UAPU1
CZLA6@
APU
Part Number = SA00008KX10 S IC CARRIZO-L AM7310JBY44JB 2G BGA 968P
UAPU1
PCIe GPP: Four x1 Gen3 PCIe Discrete Graphics Port: PCI Gen3 x8
CZLE2@
APU
Part Number = SA00008KW10 S IC CARRIZO-L EM7110JBY44JB 1.8G 968P
UAPU1
Carrizo-L: PCIe GPP: Four x1 Gen2
CZLA4@
APU
Part Number = SA00008J500 S IC CARRIZO-L AM7210JBY44JB 1.8G BGA968
PCIe Discrete Graphics Port: PCI Gen2 x4
CZLE1@
APU
Part Number = SA00008KY10
A A
Security Classification
Security Classification
Security Classification
2015/02/25 2017/02/25
2015/02/25 2017/02/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
2015/02/25 2017/02/25
4
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
FP4 PCIE
FP4 PCIE
Size
Size
Size
Custom
Custom
Custom
Dat e: Shee t o f
Dat e: Shee t o f
3
Dat e: Shee t o f
FP4 PCIE
Document Number Rev
Document Number Rev
Document Number Rev
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
2
S IC CARRIZO-L EM7010JCY23JB 1.5G BGA968
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
5 51Thursday, February 26, 2015
5 51Thursday, February 26, 2015
5 51Thursday, February 26, 2015
1
1A
1A
1A
5
DDRA_SMA[15..0]<12>
D D
DDRA_SBS0#<12> DDRA_SBS1#<12> DDRA_SBS2#<12> DDRA_SDM[7..0]<12>
DDRA_SDQS0<12> DDRA_SDQS0#<12> DDRA_SDQS1<12> DDRA_SDQS1#<12> DDRA_SDQS2<12> DDRA_SDQS2#<12> DDRA_SDQS3<12>
C C
B B
DDRA_SDQS3#<12> DDRA_SDQS4<12> DDRA_SDQS4#<12> DDRA_SDQS5<12> DDRA_SDQS5#<12> DDRA_SDQS6<12> DDRA_SDQS6#<12> DDRA_SDQS7<12> DDRA_SDQS7#<12>
DDRA_CLK0<12> DDRA_CLK0#<12> DDRA_CLK1<12> DDRA_CLK1#<12>
DDRA_RST#<12>
DDRA_EVENT#<12>
DDRA_CKE0<12> DDRA_CKE1<12>
DDRA_ODT0<12> DDRA_ODT1<12>
DDRA_SCS0#<12> DDRA_SCS1#<12>
DDRA_SRAS#<12> DDRA_SCAS#<12> DDRA_SWE#<12>
+MEM_VREF
TP@
DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRA_SMA14 DDRA_SMA15
DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7
T4947
UAPU1A @
AE28
MA_ADD[0]
Y27
MA_ADD[1]
Y29
MA_ADD[2]
Y26
MA_ADD[3]
W28
MA_ADD[4]
W29
MA_ADD[5]
W26
MA_ADD[6]
U29
MA_ADD[7]
W25
MA_ADD[8]
U26
MA_ADD[9]
AG29
MA_ADD[10]
U27
MA_ADD[11]
T28
MA_ADD[12]
AK26
MA_ADD[13]
T26
MA_ADD[14]/MA_BG[1]
T25
MA_ADD[15]/MA_ACT_L
AG26
MA_BANK[0]
AG27
MA_BANK[1]
T29
MA_BANK[2]/MA_BG[0]
E19
MA_DM[0]
D21
MA_DM[1]
K21
MA_DM[2]
F29
MA_DM[3]
AP28
MA_DM[4]
AV26
MA_DM[5]
AR22
MA_DM[6]
BC22
MA_DM[7]
K29
MA_DM[8]
H19
MA_DQS_H[0]
G19
MA_DQS_L[0]
B22
MA_DQS_H[1]
A22
MA_DQS_L[1]
F23
MA_DQS_H[2]
E23
MA_DQS_L[2]
G27
MA_DQS_H[3]
F27
MA_DQS_L[3]
AP25
MA_DQS_H[4]
AP26
MA_DQS_L[4]
AW2 7
MA_DQS_H[5]
AV27
MA_DQS_L[5]
AV22
MA_DQS_H[6]
AU22
MA_DQS_L[6]
BA21
MA_DQS_H[7]
AY21
MA_DQS_L[7]
L27
MA_DQS_H[8]
L26
MA_DQS_L[8]
AE25
MA_CLK_H[0]
AE26
MA_CLK_L[0]
AD26
MA_CLK_H[1]
AD27
MA_CLK_L[1]
AB28
MA_CLK_H[2]
AB29
MA_CLK_L[2]
AB25
MA_CLK_H[3]
AB26
MA_CLK_L[3]
N29
MA_RESET_L
AE29
MA_EVENT_L
P27
MA_CKE0
P29
MA_CKE1
AK27
MA0_ODT[0]
AL26
MA0_ODT[1]
AH25
MA1_ODT[0]
AL25
MA1_ODT[1]
AH26
MA0_CS_L[0]
AL29
MA0_CS_L[1]
AH29
MA1_CS_L[0]
AL28
MA1_CS_L[1]
AG24
MA_RAS_L/MA_RAS_L_ADD[16]
AK29
MA_CAS_L/MA_CAS_L_ADD[15]
AH28
MA_WE_L/MA_WE_L_ADD[14]
B19
MA_VREFDQ
T32
M_VREF
MEMORY A
FP4 REV 0.93
FP4_BGA968
Carrizo: DDR3 - Dual Channel
É„
Up to 2133
É„
Up to 2 DIMMs/Channel
É„
uDIMM and SO-DIMM/DRAM down
A A
É„
1.35V and 1.5V
Carrizo-L(CHANNEL B ONLY): DDR3 - Single Channel
É„
Up to 1866
É„
Up to 2 DIMMs/Channel
É„
uDIMM and SO-DIMM/DRAM down
É„
1.35V and 1.5V
5
4
MA_DATA[0]
MA_DATA[1]
MA_DATA[2]
MA_DATA[3]
MA_DATA[4]
MA_DATA[5]
MA_DATA[6]
MA_DATA[7]
MA_DATA[8]
MA_DATA[9]
MA_DATA[10]
MA_DATA[11]
MA_DATA[12]
MA_DATA[13]
MA_DATA[14]
MA_DATA[15]
MA_DATA[16]
MA_DATA[17]
MA_DATA[18]
MA_DATA[19]
MA_DATA[20]
MA_DATA[21]
MA_DATA[22]
MA_DATA[23]
MA_DATA[24]
MA_DATA[25]
MA_DATA[26]
MA_DATA[27]
MA_DATA[28]
MA_DATA[29]
MA_DATA[30]
MA_DATA[31]
MA_DATA[32]
MA_DATA[33]
MA_DATA[34]
MA_DATA[35]
MA_DATA[36]
MA_DATA[37]
MA_DATA[38]
MA_DATA[39]
MA_DATA[40]
MA_DATA[41]
MA_DATA[42]
MA_DATA[43]
MA_DATA[44]
MA_DATA[45]
MA_DATA[46]
MA_DATA[47]
MA_DATA[48]
MA_DATA[49]
MA_DATA[50]
MA_DATA[51]
MA_DATA[52]
MA_DATA[53]
MA_DATA[54]
MA_DATA[55]
MA_DATA[56]
MA_DATA[57]
MA_DATA[58]
MA_DATA[59]
MA_DATA[60]
MA_DATA[61]
MA_DATA[62]
MA_DATA[63]
MA_CHECK[0]
MA_CHECK[1]
MA_CHECK[2]
MA_CHECK[3]
MA_CHECK[4]
MA_CHECK[5]
MA_CHECK[6]
MA_CHECK[7]
MA_ZVDDIO_MEM_S
4
H17 J17 F20 H20 E17 F17 K18 E20
A21 C21 C23 D23 B20 B21 B23 A23
G22 H22 E25 G25 J20 E22 H23 J23
F26 E27 J26 J27 H25 E26 G28 G29
AN26 AP29 AR26 AP24 AN29 AN27 AR29 AR27
AU26 AV29 AU25 AW2 5 AU29 AU28 AW2 6 AT25
AV23 AW2 3 AV20 AW2 0 AR23 AT23 AR20 AT20
BB23 BB22 BB20 AY19 BA23 BC23 BC21 BB21
K26 K28 N26 N28 J29 K25 L29 N25
AD29
DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7
DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15
DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23
DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31
DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39
DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47
DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55
DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63
MEM_MA_ZVDDIO
DDRA_SDQ[63..0] <12> DDRB_SMA[15..0]<13>
1 2
CZ@ R74
39.2_0402_1%
+1.5V +1.5V
3
DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 DDRB_SMA14 DDRB_SMA15
DDRB_SBS0#<13> DDRB_SBS1#<13> DDRB_SBS2#<13> DDRB_SDM[7..0]<13>
DDRB_SDQS0<13> DDRB_SDQS0#<13> DDRB_SDQS1<13> DDRB_SDQS1#<13> DDRB_SDQS2<13> DDRB_SDQS2#<13> DDRB_SDQS3<13> DDRB_SDQS3#<13> DDRB_SDQS4<13> DDRB_SDQS4#<13> DDRB_SDQS5<13> DDRB_SDQS5#<13> DDRB_SDQS6<13> DDRB_SDQS6#<13> DDRB_SDQS7<13> DDRB_SDQS7#<13>
DDRB_CLK0<13> DDRB_CLK0#<13> DDRB_CLK1<13> DDRB_CLK1#<13>
DDRB_RST#<13>
DDRB_EVENT#<13>
DDRB_CKE0<13> DDRB_CKE1<13>
DDRB_ODT0<13> DDRB_ODT1<13>
DDRB_SCS0#<13> DDRB_SCS1#<13>
DDRB_SRAS#<13> DDRB_SCAS#<13> DDRB_SWE#<13>
+1.5V
1 8 2 7 3 6 4 5
RP2
TP@
DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7
T4946
DDRA_EVENT# DDRB_EVENT#
AG31 AC30 AC31 AB32 AA32 AA33 AA31
AA30
W32
AG32
W33
AL31
W30
AH32 AG33
W31
AR30
AW3 0
BC30 BC26
AR32
AR33 AW3 2 AW3 3
BA29
AY29
BA25
AY25
AE33
AE32
AE30
AE31
AD32
AD33
AC33
AC32
AG30
AL30
AM32
AJ32
AM33
AJ33 AL32 AJ30 AL33
AH33
AK32
AJ31
Y33
Y32
V32
D25 D29 E33 J33
N33
B26 A26 B30 A30 F32 E32 K32 J32
P32 N32
T33
U32 U33
A19
1K_0804_8P4R_1%
2
UAPU1I @
MB_ADD[0]
MB_ADD[1]
MB_ADD[2]
MB_ADD[3]
MB_ADD[4]
MB_ADD[5]
MB_ADD[6]
MB_ADD[7]
MB_ADD[8]
MB_ADD[9]
MB_ADD[10]
MB_ADD[11]
MB_ADD[12]
MB_ADD[13]
MB_ADD[14]/MB_BG[1]
MB_ADD[15]/MB_ACT_L
MB_BANK[0]
MB_BANK[1]
MB_BANK[2]/MB_BG[0]
MB_DM[0]
MB_DM[1]
MB_DM[2]
MB_DM[3]
MB_DM[4]
MB_DM[5]
MB_DM[6]
MB_DM[7]
MB_DM[8]
MB_DQS_H[0]
MB_DQS_L[0]
MB_DQS_H[1]
MB_DQS_L[1]
MB_DQS_H[2]
MB_DQS_L[2]
MB_DQS_H[3]
MB_DQS_L[3]
MB_DQS_H[4]
MB_DQS_L[4]
MB_DQS_H[5]
MB_DQS_L[5]
MB_DQS_H[6]
MB_DQS_L[6]
MB_DQS_H[7]
MB_DQS_L[7]
MB_DQS_H[8]
MB_DQS_L[8]
MB_CLK_H[0]
MB_CLK_L[0]
MB_CLK_H[1]
MB_CLK_L[1]
MB_CLK_H[2]
MB_CLK_L[2]
MB_CLK_H[3]
MB_CLK_L[3]
MB_RESET_L
MB_EVENT_L
MB_CKE0
MB_CKE1
MB0_ODT[0]
MB0_ODT[1]
MB1_ODT[0]
MB1_ODT[1]
MB0_CS_L[0]
MB0_CS_L[1]
MB1_CS_L[0]
MB1_CS_L[1]
MB_RAS_L/MB_RAS_L_ADD[16]
MB_CAS_L/MB_CAS_L_ADD[15]
MB_WE_L/MB_WE_L_ADD[14]
MB_VREFDQ
+MEM_VREF
1
C163 .1U_0402_16V7K
2
MEMORY VREF
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
MEMORY B
FP4 REV 0.93
FP4_BGA968
CLOSE TO APU
1
C144 1000P_0402_50V7K
2
1
MB_DATA[0]
MB_DATA[1]
MB_DATA[2]
MB_DATA[3]
MB_DATA[4]
MB_DATA[5]
MB_DATA[6]
MB_DATA[7]
MB_DATA[8]
MB_DATA[9]
MB_DATA[10]
MB_DATA[11]
MB_DATA[12]
MB_DATA[13]
MB_DATA[14]
MB_DATA[15]
MB_DATA[16]
MB_DATA[17]
MB_DATA[18]
MB_DATA[19]
MB_DATA[20]
MB_DATA[21]
MB_DATA[22]
MB_DATA[23]
MB_DATA[24]
MB_DATA[25]
MB_DATA[26]
MB_DATA[27]
MB_DATA[28]
MB_DATA[29]
MB_DATA[30]
MB_DATA[31]
MB_DATA[32]
MB_DATA[33]
MB_DATA[34]
MB_DATA[35]
MB_DATA[36]
MB_DATA[37]
MB_DATA[38]
MB_DATA[39]
MB_DATA[40]
MB_DATA[41]
MB_DATA[42]
MB_DATA[43]
MB_DATA[44]
MB_DATA[45]
MB_DATA[46]
MB_DATA[47]
MB_DATA[48]
MB_DATA[49]
MB_DATA[50]
MB_DATA[51]
MB_DATA[52]
MB_DATA[53]
MB_DATA[54]
MB_DATA[55]
MB_DATA[56]
MB_DATA[57]
MB_DATA[58]
MB_DATA[59]
MB_DATA[60]
MB_DATA[61]
MB_DATA[62]
MB_DATA[63]
MB_CHECK[0]
MB_CHECK[1]
MB_CHECK[2]
MB_CHECK[3]
MB_CHECK[4]
MB_CHECK[5]
MB_CHECK[6]
MB_CHECK[7]
MB_ZVDDIO_MEM_S
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
DDRB_SDQ1
C25
DDRB_SDQ2
C27
DDRB_SDQ3
D27
DDRB_SDQ4
B24
DDRB_SDQ5
B25
DDRB_SDQ6
B27
DDRB_SDQ7
A27
DDRB_SDQ8
A29
DDRB_SDQ9
C29
DDRB_SDQ10
B32
DDRB_SDQ11
D32
DDRB_SDQ12
B28
DDRB_SDQ13
B29
DDRB_SDQ14
A31
DDRB_SDQ15
C31
DDRB_SDQ16
E30
DDRB_SDQ17
E31
DDRB_SDQ18
G33
DDRB_SDQ19
G32
DDRB_SDQ20
C33
DDRB_SDQ21
D33
DDRB_SDQ22
G30
DDRB_SDQ23
G31
DDRB_SDQ24
J30
DDRB_SDQ25
J31
DDRB_SDQ26
L33
DDRB_SDQ27
L32
DDRB_SDQ28
H32
DDRB_SDQ29
H33
DDRB_SDQ30
L30
DDRB_SDQ31
L31
DDRB_SDQ32
AN31
DDRB_SDQ33
AP32
DDRB_SDQ34
AT32
DDRB_SDQ35
AU32
DDRB_SDQ36
AN33
DDRB_SDQ37
AN32
DDRB_SDQ38
AR31
DDRB_SDQ39
AT33
DDRB_SDQ40
AU30
DDRB_SDQ41
AV32
DDRB_SDQ42
BA33
DDRB_SDQ43
AY32
DDRB_SDQ44
AU33
DDRB_SDQ45
AU31
DDRB_SDQ46
AW3 1
DDRB_SDQ47
AY33
DDRB_SDQ48
BC31
DDRB_SDQ49
BB30
DDRB_SDQ50
BB28
DDRB_SDQ51
AY27
DDRB_SDQ52
BB32
DDRB_SDQ53
BA31
DDRB_SDQ54
BC29
DDRB_SDQ55
BB29
DDRB_SDQ56
BB27
DDRB_SDQ57
BB26
DDRB_SDQ58
BB24
DDRB_SDQ59
AY23
DDRB_SDQ60
BA27
DDRB_SDQ61
BC27
DDRB_SDQ62
BC25
DDRB_SDQ63
BB25
N30 N31 R33 R32 M32 M33 R30 R31
MEM_MB_ZVDDIO
AF32
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
FP4 MEMORY INTERFACE
FP4 MEMORY INTERFACE
FP4 MEMORY INTERFACE
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
DDRB_SDQ0
A25
DDRB_SDQ[63..0] <13>
1 2
R75
39.2_0402_1%
1
6 51Thursday, February 26, 2015
6 51Thursday, February 26, 2015
6 51Thursday, February 26, 2015
1A
1A
1A
A
DP2 is not supported on Carrizo-L DP2: DP to VGA Translator DP1: DP Switch DP0: eDP
For SIC, SID, ALERT_L, PROCHOT_L Carrizo: Each are pulled up to VDD_18
1 1
Carrizo-L: Each are pulled up to VDD_33
Place resistor(0ohm) for SVT on VRM side
2 2
+1.8VS
RP14
@
APU_SVT_R
18
APU_SVC
27
APU_SVD
36 45
1K_0804_8P4R_ 5%
RP17
@
GFX_SVT_R
18
GFX_SVC
27
GFX_SVD
36 45
1K_0804_8P4R_ 5%
+1.8VS
RP25
APU_PROCHOT #
18
APU_SID
27
APU_ALERT#
36
APU_SIC
3 3
+3VS
APU_PROCHOT # APU_RST# APU_PWROK
4 4
45
1K_0804_8P4R_ 5% CZ@
RP26
CZL@
18 27 36 45
1K_0804_8P4R_ 5%
1 2
CZL@ R134 1K_0402_5%
1 2
CZL@ R158 1K_0402_5%
1
EMC@ C2647
6.8P_0402_50V8C
2
EC_SMB_CK2 EC_SMB_DA2
APU_ALERT#
APU_PROCHOT #
A
APU_SVT_R<44> APU_SVC<44> APU_SVD<44>
GFX_SVT_R<45> GFX_SVC<45> GFX_SVD<45>
+1.8VS +1.8VS
APU_PWROK<44,45>
APU_PROCHOT #<15,21,44,45>
CZ@
RP26
Part Number = SD309220180
2.2K_0804_8P4R_ 5% EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK2<15,21,27>
EC_SMB_DA2<15,21,27>
1
EMC@ C2648
6.8P_0402_50V8C
2
1
2
1 2
R2612 0_0402_5%
1 2
R2613 0_0402_5%
1 2
R2614 0_0402_5%CZ@
1 2
R2615 0_0402_5%CZ@
1 2
R80 300_0402_5%
1 2
R82 300_0402_5%
+1.8VS
3 4
2
DMN63D8LDW _SOT363-6
G
6 1
S
D
Q79B DMN63D8LDW _SOT363-6
Close to APU
@EMC@ C2649 .1U_0402_16V7K
5
SGD
Q79A
CZ@
CZ@
1 2
CZL@ R679 0_0402_5%
1 2
CZL@ R680 0_0402_5%
APU_DP2_P0<27> APU_DP2_N0<27>
APU_DP2_P1<27> APU_DP2_N1<27>
APU_DP1_P0<23> APU_DP1_N0<23>
APU_DP1_P1<23> APU_DP1_N1<23>
APU_DP1_P2<23> APU_DP1_N2<23>
APU_DP1_P3<23> APU_DP1_N3<23>
EDP_TXP0<26> EDP_TXN0<26>
EDP_TXP1<26> EDP_TXN1<26>
EDP_TXP2<26> EDP_TXN2<26>
EDP_TXP3<26> EDP_TXN3<26>
APU_SIC
APU_SID
APU_SIC
APU_SID
B
APU_SVT_R APU_SVC_R APU_SVD_R
GFX_SVT_R GFX_SVC_R GFX_SVD_R
APU_SIC APU_SID
APU_RST# APU_PWROK
APU_ALERT#
APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#
B
C
C15 D17 D19
B15 B16 A18
B18 C17
D15 C19
A15 B17
H15 H14 D13 G15
J14 C13 A11
B6 A6
D7 C7
A7 B7
D9 C9
A2 A3
B4 A4
D5 C5
A5 B5
E2 E1
E3 E4
D1 D2
C1 B1
UAPU1C @
DP2_TXP[0]
DP2_TXN[0]
DP2_TXP[1]
DP2_TXN[1]
DP2_TXP[2]
DP2_TXN[2]
DP2_TXP[3]
DP2_TXN[3]
DP1_TXP[0]
DP1_TXN[0]
DP1_TXP[1]
DP1_TXN[1]
DP1_TXP[2]
DP1_TXN[2]
DP1_TXP[3]
DP1_TXN[3]
DP0_TXP[0]
DP0_TXN[0]
DP0_TXP[1]
DP0_TXN[1]
DP0_TXP[2]
DP0_TXN[2]
DP0_TXP[3]
DP0_TXN[3]
SVT0
SVC0
SVD0
SVT1
SVC1
SVD1
SIC
SID
RESET_L
PWROK
PROCHOT_L
ALERT_L
TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L
DISPLAY/SVI 2/JTAG/T EST
FP4 REV 0.93
FP4_BGA968
DP_ZVSS
DP_AUX_ZVSS
DP_BLON
DP_DIGON
DP_VARY_BL
DP2_AUXP
DP2_AUXN
DP2_HPD
DP1_AUXP
DP1_AUXN
DP1_HPD
DP0_AUXP
DP0_AUXN
DP0_HPD
RSVD_1
TEMPIN0
TEMPIN1
TEMPIN2
TEMPINRETURN
TEST410
TEST411
TEST10
TEST14
TEST15
TEST16
TEST17
TEST11
TEST18
TEST19
TEST28_H
TEST28_L
TEST31
DP_STEREOSYNC/TES T36
TEST37
VDDCR_GFX_SENSE
VDDCR_NB_SENSE
VDDCR_CPU_SENSE
VDDP_SENSE
VSS_SENSE
A9 B9 G5 G6 F11
H9 G9 E9
F7 E7 F5
F8 E8 G8
K24 E15 E14 E12 F14 AK24 AL24 P24
TEST4
N24
TEST5
AN24
TEST6
AB8
TEST9
Y9 B10 D11 A10 C11 B11 A14 B14
A13 B13 P26 E11 A17
H11 J12 G12 AY18
H12
APU_TRST#
DP_ZVSS DP_AUX_ZVSS ENBKL_R ENVDD_R INVTPWM_R
CORETYPE TEMPIN0 TEMPIN1 TEMPIN2 TEMPINRETURN
APU_TEST410 APU_TEST411 APU_TEST4 APU_TEST5 APU_TEST6 APU_TEST9 APU_TEST10 APU_TEST14 APU_TEST15 APU_TEST16 APU_TEST17 APU_TEST11 APU_TEST18 APU_TEST19
APU_TEST28_H APU_TEST28_L APU_TEST31 APU_TEST36 APU_TEST36 APU_TEST37
APU_COREGFX_SEN _H <45> APU_CORENB_SEN _H <44> APU_CORE_SEN_H <44>
APU_VSS_SEN_L <44,45>
1 2
R671 33_0402_5%
RP29 1 8 2 7 3 6 4 5
10K_0804_8P4R _5%
1 2
R400 2K_0402_1%
1 2
R401 150_0402_1%
DP2_AUXP <27> DP2_AUXN <27>
DP2_HPD <23>
DP1_AUXP <23> DP1_AUXN <23> DP1_HPD <23>
EDP_AUXP <26> EDP_AUXN <26>
EDP_HPD <26>
TP@
T28
TP@
T29
TP@
T30
TP@
T31
TP@
T32
TP@
T33
TP@
T34
TP@
T35 T36 T38 T39
T40
T43 T42 T41
TP@ TP@ TP@
TP@
TP@ TP@ TP@
CORETYPE
APU_TEST11 APU_TEST17 APU_TEST16 APU_TEST14
APU_TEST37
+1.8VS
APU_TRST#_ R
HDT_P11
HDT_P13
HDT_P15
11
13
15
17
19
ENVDD_R
ENBKL_R
HDT+
JHDT1
1
1
3
3
5
5
7
7
9
9
11
13
15
17
19
1 2
SAMTE_ASP-136446-0 7-B
Security Classification
Security Classification
Security Classification
2015/02/25 2017/02/25
2015/02/25 2017/02/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2015/02/25 2017/02/25
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
+1.8VALW
5
1
P
NC
2
A
G
3
+1.8VALW
5
1
P
NC
2
A
G
3
@ R654 100K_0402_5%
RP30
@
1K_0804_8P4R_ 5%
1 2
@ R117 1K_0402_5%
1 2
@ R118 1K_0402_5%
@
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
D
U64
4
Y
CZ@ NL17SZ07DFT 2G_SC70-5 SA00004BV00
ENVDD <26>
U2610
4
Y
CZ@ NL17SZ07DFT 2G_SC70-5 SA00004BV00
ENBKL <21>
+3VALW
18 27 36 45
For DP_STEREOSYNC/TEST36 (HDMI Enable) Carrizo: Pulled up to VDD_18 Carrizo-L: Pulled up to VDD_33
+1.8VS
APU_TCK_R
APU_TMS_R
APU_TDI_R
APU_TDO_R
APU_PWROK_R
APU_RST#_R
APU_DBRDY_R
APU_DBREQ#_R
APU_TEST19
APU_TEST18
1 2
R706 0_0402_5%
1 2
R694 0_0402_5%
1 2
R705 0_0402_5%
1 2
R704 0_0402_5%
1 2
R682 0_0402_5%
1 2
R707 0_0402_5%
1 2
R708 0_0402_5%
1 2
R672 33_0402_5%
Title
Title
Title
Size
Size
Size
B
B
B
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
E
For DP_VARY_BL, DP_BLON, DP_DIGON Carrizo: VDD_18 level at the APU Carrizo-L: VDD_33 level at the APU
INVTPWM_R
ENVDD_R
INVTPWM_R
ENBKL_R
1 2
ENVDD
1 2
INVTPWM
1 2
ENBKL
@
@
@
@
@
@
@
Document Num ber R ev
Document Num ber R ev
Document Num ber R ev
APU_TCK
APU_TMS
APU_TDI
APU_TDO
APU_PWROK
APU_RST#
APU_DBRDY
APU_DBREQ#
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
FP4 DISP/MISC/HDT
FP4 DISP/MISC/HDT
FP4 DISP/MISC/HDT
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
1
2
R683 0_0402_5%CZL@
R703 0_0402_5%CZL@
R3904 0_0402_5%CZL@
R1160
CZ@
4.7K_0402_5%
R1161
CZ@
4.7K_0402_5%
R3905
CZ@
4.7K_0402_5%
1 2
CZ@ R155 1K_0402_5%
1 2
CZL@ R120 1K_0402_5%
1 2
@ R154 1K_0402_5%
+1.8VALW
5
U2611
P
NC
4
Y
A
G
CZ@
NL17SZ07DFT 2G_SC70-5
3
SA00004BV00
1 2
1 2
1 2
+3VS
ENVDD_R
INVTPWM_R
ENBKL_R
+1.8VS
+3VS
APU_TDI APU_TMS APU_TCK APU_DBREQ#
APU_TRST# APU_TEST19 APU_TEST18
APU_TRST#
E
INVTPWM <26>
1 2
R3847 100K_0402_5%
1 2
@ R3835 100K_0402_5%
1 2
R3906 100K_0402_5%
RP28 1 8 2 7 3 6 4 5
1K_0804_8P4R_ 5%
RP27 1 8 2 7 3 6 4 5
1K_0804_8P4R_ 5% 1 2
C141
0.01U_0402_16 V7K
7 51Thursday, February 26, 201 5
7 51Thursday, February 26, 201 5
7 51Thursday, February 26, 201 5
ENVDD
INVTPWM
ENBKL
+1.8VS
+1.8VS
1A
1A
1A
A
1 2
C615 150P _0402_50V8 J
1 2
LPC_RS T#<21 ,34>
APU_PC IE_RST#<14,29,3 1>
1 1
+3VALW
1 2
1 2
1 2
VGA_CLKREQ# Reserved only
2 2
HDA_RS T#_AUDIO<35>
HDA_SYNC _AUDIO<35> HDA_BITC LK_AUDIO<35> HDA_SD OUT_AUDIO<35>
+3VALW
+3VS
3 3
+3VALW
APU_TE ST0
@
R2616
2.2K_04 02_5% APU_TE ST1
@ R2618 1K_040 2_5%
APU_TE ST2
@ R2617
2.2K_04 02_5%
1 2
R930 10K_04 02_5%
1 2
R905 100K_0 402_5%
1 2
R3817 100K_0 402_5%
1 2
R3900 10K_04 02_5%CZL@
1 2
R3927 10K_04 02_5%@
1 2
R676 2.2K_04 02_5%
1 2
R677 2.2K_04 02_5%
1 2
R937 10K_04 02_5%@
1 2
R941 10K_04 02_5%@
1 2
R3863 10K_04 02_5%@
1 2
R3864 10K_04 02_5%@
1 2
R3901 10K_04 02_5%CZ@
1 2
R685 2.2K_04 02_5%CZL@
1 2
R686 2.2K_04 02_5%CZL@
1 2
R942 10K_04 02_5%@
1 2
R3929 10K_04 02_5%CZ@
1 2
R3928 10K_04 02_5%CZ@
1 2
R709 10K_04 02_5%CZ@
1 2
R691 10K_04 02_5%CZ@
1 2
R689 10K_04 02_5%CZ@
1 2
R688 10K_04 02_5%CZ@
1 2
R2607 10K_04 02_5%CZ@
1 2
R3850 10K_04 02_5%CZ@
R602 33_040 2_5%
1 2
R907 33_040 2_5%
1 2
C912 150P _0402_50V8 J
PBTN_O UT#<21> SYS_PW RGD_EC<21>
APU_PC IE_WAKE#<29>
SLP_S3 #<21> SLP_S5 #<21>
S5_MUX _CTRL<22>
1 2
R40 15K _0402_5%
1 2
R41 15K _0402_5%
1 2
R42 15K _0402_5%
KBRST#<21> GATEA2 0<21> EC_SCI#<21> EC_SMI#<21>
LAN_CL KREQ#<29> WLA N_CLKREQ#<31> VGA_PW RGD<47 ,48>
USB_OC 0#<3 3> USB_OC 1#<3 3>
HDA_SD IN0<35>
EMC@ RP13
1 8 2 7 3 6 4 5
HDA_RS T# HDA_SYNC HDA_BITC LK HDA_SD OUT
33_080 4_8P4R_5%
RTC_CL K<31>
APU_PC IE_WAKE# USB_OC 0# USB_OC 1# EC_SMI# EC_SCI#
APU_SC LK0 APU_SD ATA0
GATEA2 0 KBRST#
LAN_CL KREQ# WLA N_CLKREQ# EC_SMI#
APU_SC LK1 APU_SD ATA1 PBTN_O UT#
HDA_SD IN2 HDA_SD IN1 APU_I2C0 _SCL APU_I2C0 _SDA APU_I2C1 _SCL APU_I2C1 _SDA CLK_RE Q3# CLK_RE QG#
LPC_RS T_A# APU_PC IE_RST#_R
EC_RSM RST#
PBTN_O UT# SYS_PW RGD_EC SYS_RST# APU_PC IE_WAKE#
SLP_S3 # SLP_S5 #
AGPIO10 S5_MUX _CTRL APU_SC LK0
APU_TE ST0 APU_TE ST1 APU_TE ST2
KBRST# GATEA2 0
EC_SCI# EC_SMI#
AGPIO12 LAN_CL KREQ#
WLA N_CLKREQ# VGA_PW RGD CLK_RE Q3# CLK_RE QG# USB_OC 0# USB_OC 1#
HDA_BITC LK HDA_SD IN0 HDA_SD IN1 HDA_SD IN2 HDA_RS T# HDA_SYNC HDA_SD OUT
APU_I2C0 _SCL APU_I2C0 _SDA APU_I2C1 _SCL APU_I2C1 _SDA
RTC_CL K
32K_X1
32K_X2
RSMRST#
1.8V /EC program open drain SYS_PWR GD: CZ->3.3V /EC program open drain CZL->1.8V /EC program open drain
APU_I2C1 _SDA APU_I2C1 _SCL I2C_0_SC L I2C_0_SD A
32.768KMHz CRYSTAL
32K_X1
12
1
C682 22P_04 02_50V8J
2
A
Y3
32K_X2
I2C_0_SC L<26>
I2C_0_SD A<26>
I2C_0_SC L
6 1
4 4
32.768K HZ_12.5PF_C M31532768D ZFT
R914 20M_04 02_5%
1
C686 18P_04 02_50V8J
2
SJ1000 01K00
12
B
UAPU1D @
BB12
LPC_RST_L
AN7
PCIE_RST_L/EGPIO26
AE4
RSMRST_L
AE1
PWR_BTN_L/AGPIO0
BC9
PWR_GOOD
AF2
SYS_RESET_L/AGPIO1
AG2
WAKE_L/AGPIO2
AK7
SLP_S3_L
AH5
SLP_S5_L
AE8
S0A3_GPIO/AGPIO10
AH8
S5_MUX_CTRL/EGPIO42
AH6
TEST0
AK8
TEST1/TMS
AE3
TEST2
AY15
ESPI_RESET_L/KBRST_L/AGPIO129
BC19
GA20IN/AGPIO126
AD7
LPC_PME_L/AGPIO22
BB13
LPC_SMI_L/AGPIO86
AG3
AC_PRES/USB_OC4_L/IR_RX0/AGPIO23
AD5
IR_TX0/USB_OC5_L/AGPIO13
AL8
IR_TX1/USB_OC6_L/AGPIO14
AN8
IR_RX1/AGPIO15
AE2
IR_LED_L/LLB_L/AGPIO12
BC15
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
BB17
CLK_REQ1_L/AGPIO115
BC17
CLK_REQ2_L/AGPIO116
BB18
CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
BB16
CLK_REQG_L/OSCIN/EGPIO132
AH9
USB_OC0_L/TRST_L/AGPIO16
AG1
USB_OC1_L/TDI/AGPIO17
AH2
USB_OC2_L/TCK/AGPIO18
AL9
USB_OC3_L/TDO/AGPIO24
AU6
AZ_BITCLK/I2S_BCLK_MIC
AR8
AZ_SDIN0/I2S_DATA_MIC[ 0]
AP6
AZ_SDIN1/I2S_LR_PLAYBACK
AR5
AZ_SDIN2/I2S_DATA_MIC[ 1]
AU9
AZ_RST_L/I2S_LR_MIC
AT9
AZ_SYNC/I2S_BCLK_PLAYBACK
AR7
AZ_SDOUT/I2S_DATA_PLAYBACK
BB10
I2C0_SCL/EGPIO145
BB9
I2C0_SDA/EGPIO146
BB7
I2C1_SCL/EGPIO147
BC7
I2C1_SDA/EGPIO148
AG7
RTCCLK
AT1
X32K_X1
AT2
X32K_X2
+1.8VS +3V S
RP32
1 8 2 7 3 6 4 5
2.2K_08 04_8P4R_5% @
EC_RSM RST#<21>
+1.8VS
5
APU_I2C1 _SCL
3 4
SGD
Q2520A
2
DMN63D 8LDW_SO T363-6
G
D
Q2520B DMN63D 8LDW_SO T363-6
@
APU_I2C1 _SDAI2C_0_ SDA
S
@
B
C
ACPI/SD/AZ/GPIO/RTC/I2 C/UART/ MISC
FP4 REV 0.93
FP4_BG A968
SD0_WP/EGPIO101
SD0_PWR_CTRL/AGPIO102
SD0_CLK/EGPIO95
SD0_CMD/EGPIO96
SD0_DATA0/EGPIO97
SD0_DATA1/EGPIO98
SD0_DATA2/EGPIO99
SD0_DATA3/EGPIO100
SD0_LED/EGPIO93
SCL0/I2C2_SCL/EGPIO113
SDA0/I2C2_SDA/EGPIO114
SCL1/I2C3_SCL/AGPIO19
SDA1/I2C3_SDA/AGPIO20
AGPIO7/LDT_PWROK
VDDGFX_PD/AGPIO39
AGPIO66/SHUTDOWN_L
AGPIO68/SGPIO_CLK
AGPIO69/SGPIO_LOAD
AGPIO71/SGPIO_DATAOUT
AGPIO72/SGPIO_DATAIN
BLINK/USB_OC7_L/AGPIO11
GENINT1_L/AGPIO89
GENINT2_L/AGPIO90
FANOUT0/AGPIO85
UART0_CTS_L/EGPIO135
UART0_RXD/EGPIO136
UART0_RTS_L/EGPIO137
UART0_TXD/EGPIO138
UART0_INTR/AGPIO139
UART1_CTS_L/BT_I2S_BCLK/EGPIO140
UART1_RXD/BT_I2S_SDI/EGPI O141
UART1_RTS_L/EGPIO142
UART1_TXD/BT_I2S_SDO/EGPIO143
UART1_INTR/BT_I2S_LRC LK/AGPIO144
SD0_CD/AGPIO25
AGPIO3
AGPIO4
AGPIO5
AGPIO6/LDT_RST
AGPIO8
AGPIO9
AGPIO40
AGPIO64
AGPIO65
SPKR/AGPIO91
FANIN0/AGPIO84
BB2 BB5 BC2 BB4 AY5
BC3 BA3 BC5 BA5
PE_GPIO1
BB6
BA15
APU_SD ATA0
AY17
APU_SC LK1
AG5
APU_SD ATA1
AG4
AL5
AGPIO3
AL6
AGPIO4
AJ1
AGPIO5
AJ3 AH1 AJ4
AGPIO8
AK5
VDDGFX _PD
AD8
VDDGFX _PWRGD
AG8 AW15
AGPIO64
AU15
AGPIO65
AT15
AGPIO66
AU12 AT14
AGPIO69 PE_GPIO0
AR14 BC13
APU_SP KR
BA17
AN5
AGPIO11
BB14
HVB TP_I2C_INT #_APU
BA19
BC18 BB19
AY9 AW8 AV5 AV8
I2C_TS_INT #_APU
AW9
AV11 AU7 AT11 AR11 AP9
T4937 T4938
1 2
R3879 0_0402 _5%@
PE_GPIO1 <2 2>
APU_SC LK0 <12 ,13> APU_SD ATA0 <12,1 3>
TP@ TP@
VDDGFX _PD <4 5> VDDGFX _PWRGD <45>
AND Ga te, a s bef ore
PE_GPIO0 <1 4>
TP@
T4948
APU_SP KR <35 >
TP_I2C_INT #_APU < 25>
TP@
T3806
TP@
T3807
LPC_F RAM E#LPC _CLK0_E C LP C_CLK1
BOOT FAIL TIMER
H
ENABLED
BOOT FAIL TIMER DISABLED
L
LPC_FR AME#<9,21> LPC_CL K0_EC<9,21> LPC_CL K1< 9,34>
C
(DEFAULT)
Compal Secret Data
Compal Secret Data
Compal Secret Data
+1.8VAL W +3VS
+1.8VS
12
12
12
CZL@
CZ@
R347
4.7K_0402_5%
R348
R346
22K_04 02_1%
SYS_PW RGD_EC
2
C999
1U_040 2_6.3V6K
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGI NEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGI NEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGI NEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.
4.7K_0402_5%
2
C1000
0.22U_0 402_10V6K
1
2015/02 /25 2017/02 /25
2015/02 /25 2017/02 /25
2015/02 /25 2017/02 /25
CLKGEN ENABLE (DEFAULT)
CLKGEN DISABLED
+3VS
12
AGPIO3 RTC_CL K
SYS_RST# AGPIO11
12
Deciphered Date
Deciphered Date
Deciphered Date
SPI ROM (DEFAULT)
LPC ROM
R902 10K_04 02_5%
@ R903 2K_040 2_5%
12
12
D
R3894 10K_04 02_5%
1 2
R3893 10K_04 02_5%
1 2
I2C_TS_INT #
I2C_TS_INT #_APU
I2C_TS_INT #_APU
CZ on ly
MEM_VOL T_S EL/ AGPIO3 <INT PU>
CZL C Z
1.8V SPI ROM
3.3V SPI ROM (Default)
+3VALW
D
12
R925 10K_04 02_5%
12
@ R927 2K_040 2_5%
@ R904 10K_04 02_5%
R926 2K_040 2_5%
R3895 10K_04 02_5%
1 2
12
R934 10K_04 02_5%
E
@
AGPIO65
CZL@
+3VALW+3VALW +3 VS
R3892
@
AGPIO10AGPIO12 AGPIO64
@
10K_04 02_5%
1 2
R2624 10K_04 02_5%
@
1 2
+3VS
1 2
R3920
@
4.7K_04 02_5% +1.8VS
1 2
R3919
@
4.7K_04 02_5%
I2C_TS_INT #
12
D2011
@
RB751V -40_SOD323-2
+TP_VC C
5
APU_SC LK1
APU_SD ATA1
ENHANCED RESET (DEFAULT)
TRADITION RESET
12
12
Title
Title
Title
Size Document Nu mber Re v
Size Document Nu mber Re v
Size Document Nu mber Re v
Custom
Custom
Custom
Dat e: Sheet o f
Dat e: Sheet o f
Dat e: Sheet o f
R2622 0 _0402_5%C Z@ R2623 0 _0402_5%C Z@
AGPIO5 AGPIO8 AGPIO66 AGPIO4
CZ@ R928 10K_04 02_5%
CZL@ R929 2K_040 2_5%
6 1
RTC_ CLK <INT PU>
COIN BATT ON BOARD (DEFAULT)
COIN BATT NOT ON BOARD
@
3 4
SGD
Q2509A
2
DMN63D 8LDW_SO T363-6
G
@
S
D
Q2509B DMN63D 8LDW_SO T363-6
1 2 1 2
BLINK/ AGP IO1 1 <INT PU>
LDT_RST#/PG OUTPUT TO APU (DEFAULT)
OUTPUT TO PADS
12
R949 10K_04 02_5%
12
@ R2619 2K_040 2_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
FP4 GPIO/AZ/MISC/STRAPS
FP4 GPIO/AZ/MISC/STRAPS
FP4 GPIO/AZ/MISC/STRAPS
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
12
12
AGPIO69
I2C_TS_INT # <26 >
12
R93110K_04 02_5%
12
R93310K_04 02_5% CZ@
12
R93510K_04 02_5% CZL@
12
R93210K_04 02_5% CZL@
R951 10K_04 02_5%
@ R2620 2K_040 2_5%
E
UMA: HIGH DIS: LOW
APU_SC LK1_R <25>
APU_SD ATA1_R <25>
12
R954 10K_04 02_5%
12
@ R2621 2K_040 2_5%
8 5 1Thursday, Febru ary 26, 2015
8 5 1Thursday, Febru ary 26, 2015
8 5 1Thursday, Febru ary 26, 2015
+3VS
R693 10K_04 02_5%
1 2
R692 10K_04 02_5%
1 2
+3VALW
12
R3896 10K_04 02_5%
12
R936 10K_04 02_5%
SYS_R ST# <INT PU>
NORMAL RESET MODE (DEFAULT)
SHORT RST MODE
@
@
UMA@
VGA@
1A
1A
1A
A
SATA_ATX_DRX_ P0<32>
HDD
1 1
12
DEVSLP0
CZ@
R3852 10K_0402_5%
12
EGPIO70
CZ@
R3853 10K_0402_5%
12
12
AGPIO130
LPCPD#
R3882 10K_0402_5%
R3883 10K_0402_5%
ODD
+0.95VS
SATA_ATX_DRX_ N0<32>
SATA_ARX_DTX_ N0<32> SATA_ARX_DTX_ P0<32>
SATA_ATX_DRX_ P1<32> SATA_ATX_DRX_ N1<32>
SATA_ARX_DTX_ N1<32> SATA_ARX_DTX_ P1<32>
R90 1K_0402_1% R96 1K_0402_1%
12 12
DEVSLP0<32>
+3VS
12
CLKRUN#
@
R3872 10K_0402_5%
+3VALW
12
LPCPD#
@
+1.8VS
R3873 10K_0402_5%
APU_SPI_HOLD#
12
CZ@ R634 10K_0402_5% CZ@ R635 10K_0402_5% CZ@ R636 10K_0402_5%
12
12
APU_SPI_WP#
APU_SPI_CS1#
2 2
VGA
LAN
WLA N
+3VALW
R3854 10K_0402_5% CZL@ R3855 10K_0402_5% CZL@ R3856 10K_0402_5%
CZ@ R637 10K_0402_5% CZ@
3 3
R638 10K_0402_5%
EC_SPI_CLK<21>
EC_SPI_CS1#<21>
EC_SPI_MISO<21> EC_SPI_MOSI<21>
APU_SPI_WP#
12
APU_SPI_CS1#
12
APU_SPI_CS2#
12
APU_SPI_TPMCS#
12
1 2
R1691 0_0402_5%@
1 2
R1693 0_0402_5%@
1 2
R1692 0_0402_5%@
1 2
R1694 0_0402_5%@
APU_SPI_HOLD#
12
CZL@
+1.8VS +3VALW
VCC
HOLD#(IO3)
CLK
DI(IO0)
@EMC@
R1673 0_0603_5%CZL@ R1672 0_0603_5%CZ@
8 7 6 5
1 2 C636 10P_0402_50V8J
8MB SPI ROM
4 4
APU_SPI_CS1# APU_SPI_MISO APU_SPI_WP#
U56
CZ@
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
W25Q64FW SSIQ_SO IC_8P
APU_SPI_CLK
1 2 R617 10_0402_1%
A
CLK_PEG_VGA< 14> CLK_PEG_VGA#<14>
CLK_PCIE_LAN<29> CLK_PCIE_LAN#<29>
CLK_PCIE_WLAN<31 > CLK_PCIE_WLAN#<31>
CZLEMC@
R107
SPI ROM
Part Number = SD028220A80 S RES 1/16W 22 +-5% 0 402
12
R107 0_0402_5%CZEMC@ R108 0_0402_5%EMC@
R106 0_0402_5%
1 2
RS@
APU_SPI_WP# APU_SPI_HOLD# APU_SPI_TPMCS#
U56
SPI ROM
Part Number = SA000039A30 S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
LPC_CLK0_EC<8,21> LPC_CLK1<8,34>
LPC_AD0<21> LPC_AD1<21> LPC_AD2<21> LPC_AD3<21>
LPC_FRAME#<8,21>
SERIRQ<21> CLKRUN#<34> LPCPD#<34>
APU_SPI_CLK APU_SPI_CLK_R APU_SPI_CS1#
APU_SPI_MISO APU_SPI_MOSI
1 2 1 2
C635
@
.1U_0402_16V7K
APU_SPI_HOLD# APU_SPI_CLK APU_SPI_MOSI
@EMC@
48M_X1
48M_X2
1 2 1 2
APU_SPI_CS2#
CZL@
B
SATA_ZVSSSATA_ZVSS SATA_ZVDDSATA_ ZVDD
DEVSLP0 EGPIO70 AGPIO130
B
C
UAPU1E @
AU3
SATA_TX0P
AU4
SATA_TX0N
AV1
SATA_RX0N
AV2
SATA_RX0P
AY2
SATA_TX1P
AY1
SATA_TX1N
AW4
SATA_RX1N
AW3
SATA_RX1P
AW1
SATA_ZVSS
AW2
SATA_ZVDDP
AT17
DEVSLP[0]/EGPIO67
AT12
DEVSLP[1]/EGPIO70
BB15
SATA_ACT_L/AGPIO130
AU2
SATA_X1
AU1
SATA_X2
U4
GFX_CLKP
U3
GFX_CLKN
U1
GPP_CLK0P
U2
GPP_CLK0N
W4
GPP_CLK1P
W3
GPP_CLK1N
W1
GPP_CLK2P
W2
GPP_CLK2N
Y2
GPP_CLK3P
Y1
GPP_CLK3N
BC10
X25M_48M_OSC
T2
X48M_X1
T1
X48M_X2
AW14
LPCCLK0/EGPIO74
AY13
LPCCLK1/EGPIO75
BB11
LAD0
BA11
LAD1
AY11
LAD2
BA13
LAD3
AV14
LFRAME_L
BA1
ESPI_ALERT_L/LDRQ0_L
BC14
SERIRQ/AGPIO87
BC11
LPC_CLKRUN_L/AGPIO88
AE9
LPC_PD_L/AGPIO21
BC6
SPI_CLK/ESPI_CLK/EGPIO117
BB8
SPI_CS1_L/EGPIO118
AW7
SPI_CS2_L/ESPI_CS_L/EGPIO119
BA9
SPI_DI/ESPI_DATA/EGPIO120
AY7
SPI_DO/EGPIO121
AW11
SPI_WP_L/EGPIO122
BA7
SPI_HOLD_L/EGPIO133
AW12
SPI_TPM_CS_L/AGPIO76
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CLK/SATA/USB/SPI/ LPC
FP4 REV 0.93
FP4_BGA968
USBCLK/25M_48M_OSC
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
C
AP8
AP5
USB_ZVSS
AR2
USB_HSD0P
AR1
USB_HSD0N
AR3
USB_HSD1P
AR4
USB_HSD1N
AN2
USB_HSD2P
AN1
USB_HSD2N
AN3
USB_HSD3P
AN4
USB_HSD3N
AM1
USB_HSD4P
AM2
USB_HSD4N
AL2
USB_HSD5P
AL1
USB_HSD5N
AL3
USB_HSD6P
AL4
USB_HSD6N
AK2
USB_HSD7P
AJ2
USB_HSD7N
AD2
USB_SS_ZVSS
AD1
USB_SS_ZVDDP
AA3
USB_SS_0TXP
AA4
USB_SS_0TXN
W9
USB_SS_0RXP
W8
USB_SS_0RXN
AA2
USB_SS_1TXP
AA1
USB_SS_1TXN
W5
USB_SS_1RXP
W6
USB_SS_1RXN
AC1
USB_SS_2TXP
AC2
USB_SS_2TXN
Y6
USB_SS_2RXP
Y7
USB_SS_2RXN
AC4
USB_SS_3TXP
AC3
USB_SS_3TXN
AB5
USB_SS_3RXP
AB6
USB_SS_3RXN
Compal Secret Data
Compal Secret Data
Compal Secret Data
USB_ZVSS
USBSS_ZVSS USBSS_ZVDD
Deciphered Date
Deciphered Date
Deciphered Date
1 2
R641 11.8K_0402_1%
USB20_P0 <33> USB20_N0 < 33>
USB20_P1 <25> USB20_N1 < 25>
USB20_P2 <26> USB20_N2 < 26>
USB20_P4 <31> USB20_N4 < 31>
USB20_P5 <26> USB20_N5 < 26>
USB20_P6 <33> USB20_N6 < 33>
USB20_P7 <33> USB20_N7 < 33>
1 2
R644 1K_0402_1%
1 2
R645 1K_0402_1%
USB3_ATX_DRX_ P2<33> USB3_ATX_DRX_ N2 <33>
USB3_ARX_DTX_ P2<33 > USB3_ARX_DTX_ N2 <33>
USB3_ATX_DRX_ P3<33> USB3_ATX_DRX_ N3 <33>
USB3_ARX_DTX_ P3<33 > USB3_ARX_DTX_ N3 <33>
D
USB/B port 0
USB to I2C bridge
Touch Screen
WLAN/BT combo
Cam er a
MB USB3.0 port2 (2.0)
MB USB3.0 port3 (2.0)
+0.95VALW
Title
Title
Title
Size
Size
Size
B
B
B
Date : Sheet o f
Date : Sheet o f
D
Date : Sheet o f
E
48MHz CRYSTAL
48M_X2
1 2
R938
1M_0402_5%
2
2
3
3
12
C794
5.6P_0402_50V8D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
FP4 SATA/CLK/USB/SPI
FP4 SATA/CLK/USB/SPI
Document Num ber R ev
Document Num ber R ev
Document Num ber R ev
FP4 SATA/CLK/USB/SPI
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
1
4
48M_X1
1
Y1
48MHZ_8PF_X3S0480 00D81H-W
Part Number = SJ10000AF00
4
12
C795
5.6P_0402_50V8D
9 51Thursday, February 26, 201 5
9 51Thursday, February 26, 201 5
9 51Thursday, February 26, 201 5
E
1A
1A
1A
A
B
C
D
E
C1008 22U_0603_6.3V6M
C1057 22U_0603_6.3V6M
C1058 22U_0603_6.3V6M
C1059 22U_0603_6.3V6M
1
2
1 1
C1060 22U_0603_6.3V6M
1
1
1
1
2
2
2
2
C1064 22U_0603_6.3V6M
C1065 22U_0603_6.3V6M
C1061 22U_0603_6.3V6M
C1062 22U_0603_6.3V6M
1
1
2
2
C1066 22U_0603_6.3V6M
C1063 22U_0603_6.3V6M
1
1
1
1
@
@
@
2
2
2
2
C1087 0.22U_0402_10V6K
C1088 0.22U_0402_10V6K
C1089 0.22U_0402_10V6K
C1090 0.22U_0402_10V6K
C1091 0.22U_0402_10V6K
1
1
2
2
C1092 0.22U_0402_10V6K
1
1
1
1
2
2
2
2
+1.5V
C1093 180P_0402_50V8J
1
+1.5V
3A
2
Under APU
C1114 0.22U_0402_10V6K
C1111 0.22U_0402_10V6K
C1112 0.22U_0402_10V6K
1
1
2
2
C1115 180P_0402_50V8J
C1113 0.22U_0402_10V6K
1
1
2
2
+1.5V
C1116 180P_0402_50V8J
1
1
2
2
DIMM S/GND
1 2
C1124 10U_0603_6.3V6M
2 2
1
2
CZ@
C1108 10U_0603_6.3V6M
1
2
3 3
C1118 10U_0603_6.3V6M
+3VALW
C1126 0.22U_0402_10V6K
1
2
CZ@
CZ@
C1109 10U_0603_6.3V6M
1
2
C1119 0.22U_0402_10V6K
1
2
+APU_CORE_F CH
C1110 0.22U_0402_10V6K
1
2
+0.95VALW
1
2
For VDDP_S5
RS@
R119 0_0402_5%
+3VS_APU+3VS
C1137 10U_0603_6.3V6M
1
2
C1085 10U_0603_6.3V6M
1
2
C950 10U_0603_6.3V6M
C949 10U_0603_6.3V6M
C1080 10U_0603_6.3V6M
1
1
2
2
+1.8VALW +1.8VS
C1086 0.22U_0402_10V6K
1
2
C1083 10U_0603_6.3V6M
1
1
2
2
C2690 0.22U_0402_10V6K
C1099 0.22U_0402_10V6K
C2691 0.22U_0402_10V6K
1
1
2
2
C1101 10U_0603_6.3V6M
C1102 0.22U_0402_10V6K
1
1
2
2
C2692 0.22U_0402_10V6K
C2693 0.22U_0402_10V6K
1
1
1
2
2
2
C1005 1U_0402_6.3V6K
C1006 1U_0402_6.3V6K
1
1
2
2
C245 180P_0402_50V8J
C2694 0.22U_0402_10V6K
1
1
2
2
+1.5VS
C1007 1U_0402_6.3V6K
1
2
+0.95VS
For VDDP
+1.5VS
+0.95VS_GFX
+3VS_APU
+1.8VS
+1.8VALW
+3VALW
+0.95VALW
+APU_CORE_F CH
+0.95VS
+APU_CORE_N B
+RTC_APU_R
0.2 A
1.5 A
0.2 A
1.5 A
0.5 A
0.2 A
0.8 A
0.2 A
7A
17A
+RTC_APU_R
W24 W27
AB24 AB27 AB30 AB33 AD25 AD28 AD30 AE24 AE27
AF30
AF33 AG25 AG28 AH24 AH27 AH30 AK25 AK28 AK30 AK33
AL27 AM30
AR19
AP19 AP21
AP16 AP18
AP10
AR9
AP15 AR15
AN12 AP12
AP13 AR12
AW19
AU17 AU19 AV17 AV19
AW17
AL12
AL13
AL15
AL18
AL21 AN13 AN16 AN19 AN22
AR17
P25 P28 T24 T27 U25 U28 V30 V33
Y25 Y28 Y30
AE6 AE5
UAPU1F @
VDDIO_MEM_S3_1
VDDIO_MEM_S3_2
VDDIO_MEM_S3_3
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDIO_MEM_S3_6
VDDIO_MEM_S3_7
VDDIO_MEM_S3_8
VDDIO_MEM_S3_9
VDDIO_MEM_S3_10
VDDIO_MEM_S3_11
VDDIO_MEM_S3_12
VDDIO_MEM_S3_13
VDDIO_MEM_S3_14
VDDIO_MEM_S3_15
VDDIO_MEM_S3_16
VDDIO_MEM_S3_17
VDDIO_MEM_S3_18
VDDIO_MEM_S3_19
VDDIO_MEM_S3_20
VDDIO_MEM_S3_21
VDDIO_MEM_S3_22
VDDIO_MEM_S3_23
VDDIO_MEM_S3_24
VDDIO_MEM_S3_25
VDDIO_MEM_S3_26
VDDIO_MEM_S3_27
VDDIO_MEM_S3_28
VDDIO_MEM_S3_29
VDDIO_MEM_S3_30
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDIO_MEM_S3_33
VDDIO_MEM_S3_34
VDDIO_MEM_S3_35
VDDIO_AUDIO
VDDP_GFX_2
VDDP_GFX_1
VDD_33_1
VDD_33_2
VDD_18_1
VDD_18_2
VDD_18_S5_1
VDD_18_S5_2
VDD_33_S5_1
VDD_33_S5_2
VDDP_S5_1
VDDP_S5_2
VDDCR_FCH_S5_1
VDDCR_FCH_S5_2
VDDP_6
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDCR_NB_1
VDDCR_NB_2
VDDCR_NB_3
VDDCR_NB_4
VDDCR_NB_5
VDDCR_NB_6
VDDCR_NB_7
VDDCR_NB_8
VDDCR_NB_9
VDDBT_RTC_G
POWER
FP4 REV 0.93
FP4_BGA968
VDDCR_CPU_1
VDDCR_CPU_2
VDDCR_CPU_3
VDDCR_CPU_4
VDDCR_CPU_5
VDDCR_CPU_6
VDDCR_CPU_7
VDDCR_CPU_8
VDDCR_CPU_9
VDDCR_CPU_10
VDDCR_CPU_11
VDDCR_CPU_12
VDDCR_CPU_13
VDDCR_CPU_14
VDDCR_CPU_15
VDDCR_CPU_16
VDDCR_CPU_17
VDDCR_CPU_18
VDDCR_CPU_19
VDDCR_CPU_20
VDDCR_CPU_21
VDDCR_CPU_22
VDDCR_CPU_23
VDDCR_CPU_24
VDDCR_CPU_25
VDDCR_CPU_26
VDDCR_CPU_42
VDDCR_CPU_31
VDDCR_CPU_43
VDDCR_CPU_32
VDDCR_CPU_44
VDDCR_CPU_33
VDDCR_CPU_45
VDDCR_CPU_34
VDDCR_CPU_46
VDDCR_CPU_35
VDDCR_CPU_47
VDDCR_CPU_36
VDDCR_CPU_28
VDDCR_CPU_29
VDDCR_CPU_40
VDDCR_CPU_30
VDDCR_CPU_37
VDDCR_CPU_49
VDDCR_CPU_38
VDDCR_CPU_39
VDDCR_CPU_48
VDDCR_CPU_41
VDDCR_CPU_27
VDDCR_GFX_14
VDDCR_GFX_15
VDDCR_GFX_16
VDDCR_GFX_17
VDDCR_GFX_18
VDDCR_GFX_19
VDDCR_GFX_20
VDDCR_GFX_21
VDDCR_GFX_22
VDDCR_GFX_23
VDDCR_GFX_24
VDDCR_GFX_25
VDDCR_GFX_26
VDDCR_GFX_27
VDDCR_GFX_28
VDDCR_GFX_29
VDDCR_GFX_1
VDDCR_GFX_2
VDDCR_GFX_3
VDDCR_GFX_4
VDDCR_GFX_5
VDDCR_GFX_6
VDDCR_GFX_7
VDDCR_GFX_8
VDDCR_GFX_9
VDDCR_GFX_10
VDDCR_GFX_11
VDDCR_GFX_12
VDDCR_GFX_30
VDDCR_GFX_31
VDDCR_GFX_32
VDDCR_GFX_33
VDDCR_GFX_34
VDDCR_GFX_35
VDDCR_GFX_36
VDDCR_GFX_37
VDDCR_GFX_13
U8 W7 W12 W15 W18 W21 Y8 Y10 Y13 Y16 Y19 Y22 AB7 AB9 AB12 AB15 AB18 AB21 AD6 AD10 AD13 AD16 AD19 AD22 AE7 AE12 AK9 AG10 AK10 AG13 AK13 AG16 AK16 AG19 AK19 AG22 AK22 AH7 AE18 AE21 AH21 AG6 AH12 AN6 AH15 AH18 AL7 AK6 AE15
L8 L13 L16 L19 L22 N7 N12 N15 N18 N21 P8 P13 P16 P19 P22 T7 F12 F15 G11 G14 J8 J9 J11 K7 K12 K13 K15 K16 T12 T15 T18 T21 U13 U16 U19 U22 K19
35A
35A
+APU_CORE
+APU_GFX
1 2
VGA@ R3880 0_0603_5%
4 4
R3880
0_0603_5% CZUMA@ SD013000080
VGA@
VGA@
C1147 10U_0603_6.3V6M
1
2
For VDDP_GFX
A
+0.95VS_GFX+0.95VS
C1148 0.22U_0402_10V6K
1
R3881 0_0402_5%
2
CZLUMA@
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.
RTC OF APU
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
C
+RTC_APU_R
C166
0.22U_0402_10V6K
Compal Secret Data
Compal Secret Data
Compal Secret Data
W=2 0mi ls
1
C923
1U_0402_6.3V6K
2
Deciphered Date
Deciphered Date
Deciphered Date
R93 1K _0402_5%
1
2
1 2
12
CLRP1 SHORT PADS
D
@
+RTC_APU
Need OPEN
for Clear CMOS
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Dat e: Sheet of
Dat e: Sheet of
Dat e: Sheet of
Compal Electronics, Inc.
FP4 PWR
FP4 PWR
FP4 PWR
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
E
1A
1A
10 51Thursday, February 26, 2015
10 51Thursday, February 26, 2015
10 51Thursday, February 26, 2015
1A
A
B
C
D
E
AE10 AE13 AE16 AE19 AE22
AF1 AF4
AG9 AG12 AG15 AG18 AG21
AH4
AH10 AH13 AH16 AH19 AH22
AK1
AK4
AK12 AK15 AK18
AL16 AL19 AL22
AM4
AN9
AN10 AN15 AN18 AN21 AN25 AN28
AP1
AP2
AP4
AP7
AP22 AP27 AP30 AP33
AR6
AR25 AR28
AT4 AT19 AT22 AT30
AU5
AU8 AU11 AU14 AU20 AU23 AU27
AV4
AV7
AV9
AV12 AV15 AV25
UAPU1H @
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
GND
FP4 REV 0.93
FP4_BGA968
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_215
VSS_214
AV30 AV33 AW22 AY4 AY6 AY8 AY10 AY12 AY14 AY16 AY20 AY22 AY24 AY26 AY28 AY30 BB1 BB33 BC4 BC8 BC12 BC16 BC20 BC24 BC28 BC32
L24 AL10 AK21
TP@ TP@ TP@
T143 T144 T145
UAPU1G @
A8
RS@
ORIENT_APU#
1 2
R157 0_0402_5%
1 1
2 2
3 3
A12 A16 A20 A24 A28 A32
B12 B33
D10 D12 D14 D16 D18 D20 D22 D24 D26 D28 D30
F19 F22 F25 F30 F33
G17 G20 G23 G26
H30
J15 J19 J22 J25 J28
K10 K22 K27 K30 K33
L12 L15 L18 L21 L25
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
B2
VSS_8
B8
VSS_9
VSS_10
VSS_11
C3
VSS_12
D4
VSS_13
D6
VSS_14
D8
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
F1
VSS_27
F2
VSS_28
F4
VSS_29
F9
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
G7
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
H4
VSS_41
VSS_42
J5
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
K1
VSS_49
K2
VSS_50
K4
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
L5
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
GND
FP4 REV 0.93
FP4_BGA968
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
L28 M4 M30 N10 N13 N16 N19 N22 N27 P1 P2 P4 P5 P12 P15 P18 P21 P30 P33 T4 T10 T13 T16 T19 T22 T30 U5 U12 U15 U18 U21 U24 V1 V2 V4 W10 W13 W16 W19 W22 Y4 Y5 Y12 Y15 Y18 Y21 Y24 AB1 AB2 AB4 AB10 AB13 AB16 AB19 AB22 AD4 AD9 AD12 AD15 AD18 AD21 AD24
U30 U31
AN30
UAPU1J @
RSVD_2
RSVD_3
RSVD_4
FP4 REV 0.93
FP4_BGA968
4 4
Security Classification
Security Classification
Security Classification
2015/02/25 2017/02/25
2015/02/25 2017/02/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET IN FORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
2015/02/25 2017/02/25
B
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
Custom
Custom
Custom
Dat e: Sheet o f
Dat e: Sheet o f
C
Dat e: Sheet o f
D
Compal Electronics, Inc.
FP4 GND
FP4 GND
FP4 GND
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
11 51Thursday, February 26, 2015
11 51Thursday, February 26, 2015
11 51Thursday, February 26, 2015
E
1A
1A
1A
A
+1.5V +1.5V+VREF_DQ
2
1
C176
1
2
.1U_0402_16V7K
1 1
2 2
3 3
4 4
1000P_0402_50 V7K
DDRA_SDQS1#<6> DDRA_SDQS1<6>
DDRA_SDQS2#<6> DDRA_SDQS2<6>
DDRA_CKE0<6>
DDRA_SBS2#<6>
DDRA_CLK0<6> DDRA_CLK0#<6>
DDRA_SBS0#<6>
DDRA_SWE#<6>
DDRA_SCAS#<6>
DDRA_SCS1#<6>
DDRA_SDQS4#<6> DDRA_SDQS4<6>
DDRA_SDQS6#<6> DDRA_SDQS6<6>
DDRA_SDQ0 DDRA_SDQ1
C142
DDRA_SDM0
DDRA_SDQ2 DDRA_SDQ3
DDRA_SDQ8 DDRA_SDQ9
DDRA_SDQS1# DDRA_SDQS1
DDRA_SDQ10 DDRA_SDQ11
DDRA_SDQ16 DDRA_SDQ17
DDRA_SDQS2# DDRA_SDQS2
DDRA_SDQ18 DDRA_SDQ19
DDRA_SDQ24 DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26 DDRA_SDQ27
DDRA_CKE0
DDRA_SBS2#
DDRA_SMA12 DDRA_SMA9
DDRA_SMA8 DDRA_SMA5
DDRA_SMA3 DDRA_SMA1
DDRA_CLK0 DDRA_CLK0#
DDRA_SMA10 DDRA_SBS0#
DDRA_SWE# DDRA_SCAS# DDRA_ODT0
DDRA_SMA13 DDRA_SCS1#
DDRA_SDQ32 DDRA_SDQ33
DDRA_SDQS4# DDRA_SDQS4
DDRA_SDQ34 DDRA_SDQ35
DDRA_SDQ40 DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42 DDRA_SDQ43
DDRA_SDQ48 DDRA_SDQ49
DDRA_SDQS6# DDRA_SDQS6
DDRA_SDQ50 DDRA_SDQ51
DDRA_SDQ56 DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58 DDRA_SDQ59
<Address: 00>
+3VS
1
C136 .1U_0402_16V7K
2
15mil
JDIMM1
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
BELLW_8000 1-1021 SP07000P700 CONN@
B
VSS DQ4 DQ5 VSS
DQS0#
DQS0
VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
ODT0
VDD ODT1
VDD
VREF_CA
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
SCL VTT
GND2
BOSS2
C
DDRA_SDQ[0..63]
2
DDRA_SDQ4
4
DDRA_SDQ5
6 8
DDRA_SDQS0#
10
DDRA_SDQS0
12 14
DDRA_SDQ6
16
DDRA_SDQ7
18 20
DDRA_SDQ12
22
DDRA_SDQ13
24 26
DDRA_SDM1
28
MEM_MA_RST#
30 32
DDRA_SDQ14
34
DDRA_SDQ15
36 38
DDRA_SDQ20
40
DDRA_SDQ21
42 44
DDRA_SDM2
46 48
DDRA_SDQ22
50
DDRA_SDQ23
52 54
DDRA_SDQ28
56
DDRA_SDQ29
58 60
DDRA_SDQS3#
62
DDRA_SDQS3
64 66
DDRA_SDQ30
68
DDRA_SDQ31
70 72
74 76 78
A15
80
A14
82 84
A11
86
A7
88 90
A6
92
A4
94 96
A2
98
A0
100 102 104 106 108 110 112 114
S0#
116 118 120 122
NC
124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206 208
DDRA_CKE1
DDRA_SMA15 DDRA_SMA14
DDRA_SMA11 DDRA_SMA7
DDRA_SMA6 DDRA_SMA4
DDRA_SMA2 DDRA_SMA0
DDRA_CLK1 DDRA_CLK1#
DDRA_SBS1# DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT1
15mil
DDRA_SDQ36 DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38 DDRA_SDQ39
DDRA_SDQ44 DDRA_SDQ45
DDRA_SDQS5# DDRA_SDQS5
DDRA_SDQ46 DDRA_SDQ47
DDRA_SDQ52 DDRA_SDQ53
DDRA_SDM6
DDRA_SDQ54 DDRA_SDQ55
DDRA_SDQ60 DDRA_SDQ61
DDRA_SDQS7# DDRA_SDQS7
DDRA_SDQ62 DDRA_SDQ63
DDRA_EVENT#
+0.75VS
DDRA_SDQS0# <6> DDRA_SDQS0 <6>
DDRA_RST# <6 >
DDRA_SDQS3# <6> DDRA_SDQS3 <6>
DDRA_CKE1 <6>
DDRA_CLK1 <6> DDRA_CLK1# <6>
DDRA_SBS1# <6> DDRA_SRAS# <6>
DDRA_SCS0# <6> DDRA_ODT0 <6>
DDRA_ODT1 <6>
1
C134
2
.1U_0402_16V7K
1000P_0402_50 V7K
DDRA_SDQS5# <6> DDRA_SDQS5 <6>
DDRA_SDQS7# <6> DDRA_SDQS7 <6>
DDRA_EVENT# <6>
APU_SDATA0 <8,13> APU_SCLK0 <8,13>
2
1
+VREF_CA
C167
DDRA_SDM[0..7]
DDRA_SMA[0..15]
+1.5V/+0.75VS OF DIMM1
+1.5V +0.75VS
C114 .1U_0402_16V7K
C116 .1U_0402_16V7K
C115 .1U_0402_16V7K
1
1
1
2
2
2
@
@
VREFCA for DIMM1,2
C117 .1U_0402_16V7K
C118 .1U_0402_16V7K
1
2
1 2
R2608 1K_0402_1%
1 2
R2609 1K_0402_1%
DDRA_RST#
DDRA_SDQ[0..63] <6>
DDRA_SDM[0..7] <6>
DDRA_SMA[0..15] <6>
C119 .1U_0402_16V7K
C120 .1U_0402_16V7K
C121 .1U_0402_16V7K
1
1
1
2
2
2
@
@
@
+1.5V+VREF_ CA +1.5V+VREF_DQ
C1274 100P_0402_50V8 J
C122 .1U_0402_16V7K
1
1
2
2
1 2
D
C126 .1U_0402_16V7K
C123 .1U_0402_16V7K
C127 4.7U_0603_10V6 K
1
1
1
2
2
2
@
1 2
R2610 1K_0402_1%
1 2
R2611 1K_0402_1%
@EMC@
E
DIMM_A H:4mm RVS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET O F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Dat e: Sheet o f
Dat e: Sheet o f
D
Dat e: Sheet o f
Compal Electronics, Inc.
DDR3 SODIMM-I Socket
DDR3 SODIMM-I Socket
DDR3 SODIMM-I Socket
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
12 51Thursday, February 26, 2015
12 51Thursday, February 26, 2015
12 51Thursday, February 26, 2015
E
1A
1A
1A
A
15mil
DDRB_SDQ0
C140
DDRB_SDQ1
DDRB_SDM0
DDRB_SDQ2 DDRB_SDQ3
DDRB_SDQ8 DDRB_SDQ9
DDRB_SDQS1# DDRB_SDQS1
DDRB_SDQ10 DDRB_SDQ11
DDRB_SDQ16 DDRB_SDQ17
DDRB_SDQS2# DDRB_SDQS2
DDRB_SDQ18 DDRB_SDQ19
DDRB_SDQ24 DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26 DDRB_SDQ27
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12 DDRB_SMA9
DDRB_SMA8 DDRB_SMA5
DDRB_SMA3 DDRB_SMA1
DDRB_CLK0 DDRB_CLK0#
DDRB_SMA10 DDRB_SBS0#
DDRB_SWE#
DDRB_SMA13 DDRB_SCS1#
DDRB_SDQ32 DDRB_SDQ33
DDRB_SDQS4# DDRB_SDQS4
DDRB_SDQ34 DDRB_SDQ35
DDRB_SDQ40 DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42 DDRB_SDQ43
DDRB_SDQ48 DDRB_SDQ49
DDRB_SDQS6# DDRB_SDQS6
DDRB_SDQ50 DDRB_SDQ51
DDRB_SDQ56 DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58 DDRB_SDQ59
1 2
R690 10K_0402_5%
1
<Address: 01>
2
1
2
C143
C177
2
1
.1U_0402_16V7K
DDRB_SDQS1#<6> DDRB_SDQS1<6>
DDRB_SDQS2#<6> DDRB_SDQS2<6>
DDRB_CKE0<6>
DDRB_SBS2#< 6>
DDRB_CLK0<6> DDRB_CLK0#<6>
DDRB_SBS0#< 6>
DDRB_SWE#<6>
DDRB_SCAS#<6>
DDRB_SCS1#<6>
DDRB_SDQS4#<6> DDRB_SDQS4<6>
DDRB_SDQS6#<6> DDRB_SDQS6<6>
1000P_0402_50 V7K
+3VS
.1U_0402_16V7K
1 1
2 2
3 3
4 4
3 5 7
9 11 13 15 17 19 21 23 25 27
31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
63 65 67 69 71
73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203
205
B
JDIMM2
VREF_DQ1VSS1 VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS23 DQ26 DQ27 VSS25
CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1
G1
LCN_DAN06-K4406 -0100 CONN@
VSS3
DQS#0
DQS0
VSS6
VSS8 DQ12 DQ13
VSS10
VSS12
DQ14 DQ15
VSS14
DQ20 DQ21
VSS16
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
VSS24
DQ30 DQ31
VSS26
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
VTT2
DM1
DM2
DM4
DM6
DQ4 DQ5
DQ6 DQ7
CK1
NC2
SDA SCL
C
+1.5V+1.5V+VREF_DQ
2
DDRB_SDQ4
4
DDRB_SDQ5
6 8
DDRB_SDQS0#
10
DDRB_SDQS0
12 14
DDRB_SDQ6
16
DDRB_SDQ7
18 20
DDRB_SDQ12
22
DDRB_SDQ13
24 26
DDRB_SDM1
28
DDRB_RST#
30 32
DDRB_SDQ14
34
DDRB_SDQ15
36 38
DDRB_SDQ20
40
DDRB_SDQ21
42 44
DDRB_SDM2
46 48
DDRB_SDQ22
50
DDRB_SDQ23
52 54
DDRB_SDQ28
56
DDRB_SDQ29
58 60
DDRB_SDQS3#
62
DDRB_SDQS3
64 66
DDRB_SDQ30
68
DDRB_SDQ31
70 72
74 76 78
A15
80
A14
82 84
A11
86
A7
88 90
A6
92
A4
94 96
A2
98
A0
100 102 104 106 108
BA1
110 112 114
S0#
116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
G2
DDRB_CKE1
DDRB_SMA15 DDRB_SMA14
DDRB_SMA11 DDRB_SMA7
DDRB_SMA6 DDRB_SMA4
DDRB_SMA2 DDRB_SMA0
DDRB_CLK1 DDRB_CLK1#
DDRB_SBS1# DDRB_SRAS#
DDRB_SCS0# DDRB_ODT0DDRB_SCAS#
DDRB_ODT1
15mil
DDRB_SDQ36 DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38 DDRB_SDQ39
DDRB_SDQ44 DDRB_SDQ45
DDRB_SDQS5# DDRB_SDQS5
DDRB_SDQ46 DDRB_SDQ47
DDRB_SDQ52 DDRB_SDQ53
DDRB_SDM6
DDRB_SDQ54 DDRB_SDQ55
DDRB_SDQ60 DDRB_SDQ61
DDRB_SDQS7# DDRB_SDQS7
DDRB_SDQ62 DDRB_SDQ63
DDRB_EVENT#DDRB_SA0
+0.75VS
DDRB_SDQS0# <6> DDRB_SDQS0 <6>
DDRB_RST# <6>
DDRB_SDQS3# <6> DDRB_SDQS3 <6>
DDRB_CKE1 <6>
DDRB_CLK1 <6> DDRB_CLK1# <6>
DDRB_SBS1# < 6> DDRB_SRAS# <6>
DDRB_SCS0# <6> DDRB_ODT0 < 6>
DDRB_ODT1 < 6>
1
C139
2
1000P_0402_50 V7K
DDRB_SDQS5# <6> DDRB_SDQS5 <6>
DDRB_SDQS7# <6> DDRB_SDQS7 <6>
DDRB_EVENT# <6>
APU_SDATA0 <8,12> APU_SCLK0 <8,12>
2
C174
1
.1U_0402_16V7K
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SMA[0..15]
DDRB_SMA[0..15] <6>
+1.5V/+0.75VS OF DIMM2
+VREF_CA
C133 .1U_0402_16 V7K
1
2
@
DDRB_RST#
C155 .1U_0402_16 V7K
C132 .1U_0402_16 V7K
C162 .1U_0402_16 V7K
1
1
1
2
2
2
C168 .1U_0402_16 V7K
C165 .1U_0402_16 V7K
C169 .1U_0402_16 V7K
1
1
1
2
2
2
@
@
1 2
C1275 100P_0402_50V8 J
C170 .1U_0402_16 V7K
1
2
@EMC@
D
DDRB_SDQ[0..63] <6>
DDRB_SDM[0..7] <6>
C172 .1U_0402_16 V7K
C171 .1U_0402_16 V7K
1
1
2
2
@
E
+1.5V+1.5V +0.75VS
C175 .1U_0402_16 V7K
C158 4.7U_0603_1 0V6K
1
+
1
2
C644 330U_2.5V_ESR17M _6.3X4.5
2
1
2
DIMM_B H:4mm STD
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET O F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTODY O F THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Dat e: Sheet o f
Dat e: Sheet o f
D
Dat e: Sheet o f
Compal Electronics, Inc.
DDR3 SODIMM-II Socket
DDR3 SODIMM-II Socket
DDR3 SODIMM-II Socket
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
13 51Thursday, February 26, 2015
13 51Thursday, February 26, 2015
13 51Thursday, February 26, 2015
E
1A
1A
1A
A
PEG_ATX_GRX_P[0..3]<5>
PEG_ATX_GRX_N[0 ..3]<5>
PEG_ATX_GRX_P0 PEG_ATX_C_GRX_ P0 PEG_ATX_GRX_N0
1 1
PEG_ATX_GRX_P1 PEG_ATX_GRX_N1
PEG_ATX_GRX_P2 PEG_ATX_GRX_N2
PEG_ATX_GRX_P3 PEG_ATX_GRX_N3
1 2
CV47 .1U_0402_16V7 KVGA@
1 2
CV48 .1U_0402_16V7 KVGA@
1 2
CV49 .1U_0402_16V7 KVGA@
1 2
CV50 .1U_0402_16V7 KVGA@
1 2
CV60 .1U_0402_16V7 KVGA@
1 2
CV61 .1U_0402_16V7 KVGA@
1 2
CV64 .1U_0402_16V7 KVGA@
1 2
CV63 .1U_0402_16V7 KVGA@
PEG_ATX_GRX_P[0..3]
PEG_ATX_GRX_N[0 ..3]
PEG_ATX_C_GRX_ N0
PEG_ATX_C_GRX_ P1 PEG_ATX_C_GRX_ N1
PEG_ATX_C_GRX_ P2 PEG_ATX_C_GRX_ N2
PEG_ATX_C_GRX_ P3 PEG_ATX_C_GRX_ N3
UV1
2 2
EXO@
VGA
Part Number = SA000089Y00 S IC 216-0867020 EXO XT S3 FC BGA 631P 0FA
UV1
MESO@
VGA
Part Number = SA00008B110 S IC 216-0864018 MESO XT S3 FC BGA 631P 0FA
3 3
CLK_PEG_VGA<9 > CLK_PEG_VGA#<9>
1 2
RV2 1K_0402_1%VGA@
PLT_RST_VGA#
4 4
B
@ UV1A
AF30
PCIE_RX0P
AE31
PCIE_RX0N
AE29
PCIE_RX1P
AD28
PCIE_RX1N
AD30
PCIE_RX2P
AC31
PCIE_RX2N
AC29
PCIE_RX3P
AB28
PCIE_RX3N
AB30
PCIE_RX4P
AA31
PCIE_RX4N
AA29
PCIE_RX5P
Y28
PCIE_RX5N
Y30
PCIE_RX6P
W31
PCIE_RX6N
W29
PCIE_RX7P
V28
PCIE_RX7N
V30
NC#V30
U31
NC#U31
U29
NC#U29
T28
NC#T28
T30
NC#T30
R31
NC#R31
R29
NC#R29
P28
NC#P28
P30
NC#P30
N31
NC#N31
N29
NC#N29
M28
NC#M28
M30
NC#M30
L31
NC#L31
L29
NC#L29
K30
NC#K30
CLOCK
AK30
PCIE_REFCLKP
AK32
PCIE_REFCLKN
N10
TEST_PG
AL27
PERSTB
2160856030-A0 _FCBGA631
216-0842024-A11-MAR_FCBGA631
PCI EXPRESS INTERFACE
CALIBRATI ON
PCIE_CALR_TX
PCIE_CALR_RX
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
NC#W24 NC#W23
NC#V27 NC#U26
NC#U24 NC#U23
NC#T26 NC#T27
NC#T24 NC#T23
NC#P27 NC#P26
NC#P24 NC#P23
NC#M27
NC#N26
AH30 AG31
AG29 AF28
AF27 AF26
AD27 AD26
AC25 AB25
Y23 Y24
AB27 AB26
Y27 Y26
W24 W23
V27 U26
U24 U23
T26 T27
T24 T23
P27 P26
P24 P23
M27 N26
Y22
AA22
C
PEG_GTX_C_ARX_P[0..3]
PEG_GTX_C_ARX_N[0..3]
PEG_GTX_ARX_P0 PEG_GTX_ARX_N0
PEG_GTX_ARX_P1 PEG_GTX_ARX_N1
PEG_GTX_ARX_P2 PEG_GTX_ARX_N2
PEG_GTX_ARX_P3 PEG_GTX_ARX_N3
1 2
RV1 1.69K_0402_1%VGA@
1 2
RV3 1K_0402_1%VGA@
D
PEG_GTX_C_ARX_ P[0..3] <5>
PEG_GTX_C_ARX_ N[0..3] < 5>
1 2
CV65 .1U_0402_16V7 KVGA@
1 2
CV66 .1U_0402_16V7 KVGA@
1 2
CV67 .1U_0402_16V7 KVGA@
1 2
CV68 .1U_0402_16V7 KVGA@
1 2
CV70 .1U_0402_16V7 KVGA@
1 2
CV69 .1U_0402_16V7 KVGA@
1 2
CV71 .1U_0402_16V7 KVGA@
1 2
CV72 .1U_0402_16V7 KVGA@
APU_PCIE_RST#<8,29,31>
+0.95VSDGPU
PEG_GTX_C_ARX_ P0 PEG_GTX_C_ARX_ N0
PEG_GTX_C_ARX_ P1 PEG_GTX_C_ARX_ N1
PEG_GTX_C_ARX_ P2 PEG_GTX_C_ARX_ N2
PEG_GTX_C_ARX_ P3 PEG_GTX_C_ARX_ N3
PE_GPIO0<8>
APU_PCIE_RST#
PE_GPIO0
2.2K_0402_5%
No Use GPU Display Port outpud
@
RV1579
VGA@
UV1F
2160856030-A0_FCBGA631
1 2
U?
NC_TXOUT_L3P NC_TXOUT_L3N
TMDP
NC_TXOUT_U3P
NC_TXOUT_U3N
?
+3VS
UV100 MC74VHC1G08DF T2G_SC70-5
5
2
P
B
Y
1
A
G
3
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
TX0M_DPA2N
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
4
VARY_BL
VGA@
12
AB11 AB12
DIGON
AL15 AK14
AH16 AJ15
AL17 AK16
AH18 AJ17
AL19 AK18
AH20 AJ19
AL21 AK20
AH22 AJ21
AL23 AK22
AK24 AJ23
PLT_RST_VGA#
RV4 100K_0402_5% VGA@
E
+VGA_CORE
Security Classification
Security Classification
Security Classification
2015/02/25 2017/02/25
2015/02/25 2017/02/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2015/02/25 2017/02/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
C
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Dat e: Sheet o f
Dat e: Sheet o f
D
Dat e: Sheet o f
Compal Electronics, Inc.
Meso_PCIE
Meso_PCIE
Meso_PCIE
Document Numbe r R e v
Document Numbe r R e v
Document Numbe r R e v
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
14 51Thursday, February 26, 201 5
14 51Thursday, February 26, 201 5
14 51Thursday, February 26, 201 5
E
1A
1A
1A
A
+3VSDGPU
12
12
D+
D-
VCCB
GND
1 2 1 2
+3VSDGPU
1 2
2
3
8
7
8 7
B1
6
B2
4
RV409 10K_0402_5% VGA@
THM_ALERT#
VGA_DPLUS
VGA_DMINUS
VGA_SMB_CK3
VGA_SMB_DA3
+1.8VSDGPU
+3VSDGPU
VGA_AC_BATT
RV6
45.3K_0402_1%
VGA@
1000P_0402_5 0V7K
CV9
EXO@
2
CV170 .1U_0402_16V7K
1
RV77 RV78
GPU_SVD GPU_SVC
1 8 2 7 3 6 4 5
RPV34 10K_0 804_8P4R_5%
@
RV150
1 2
10K_0402_5% @
@
1 2
33_0402_5% 1 2 1 2
33_0402_5%EXO@
JTAG_TDI JTAG_TMS JTAG_TCK JTAG_TRSTB
VGA_SMB_DA3
VGA_SMB_CK3
EXO@
GPU_SVD GPU_SVC
+1.8VSDGPU
PEG_CLKREQ#_R
5
EC_SMB_DA2<7,21,27>
GPU_VID3 GPU_VID1
+3VSDGPU
EC_SMB_CK2<7,21,27>
CV10
.1U_0402_16V7K
RV75 RV76
RV79
+3VSDGPU
GPU_ACIN<21>
APU_PROCHOT#<7,21 ,44,45>
+3VSDGPU
@
33_0402_5%EXO@ 1 2 1 2
33_0402_5%EXO@
10K_0402_5%
10K_0402_5%
EXO@
RV154 5.1K_0402_1%@
RV17 1K_0402_1%VGA@
12
1
2
10K_0402_5%
EXO@
12
DIR
1 2
1 2
3
CV18
8.2P_0402_50V8D VGA@
1 1
2 2
3 3
4 4
DMN66D0LDW-7_SOT363- 6
DMN66D0LDW-7_SOT363- 6
+3VSDGPU
@ RV58
4.7K_0402_5%
1 2
THM_ALERT#
+3VSDGPU
RV71
RV72 10K_0402_5%
@
EXO@
1 2
1 2
GPU_VID3_GPIO_15 GPU_VID1_GPIO_20
RV73
RV74 10K_0402_5%
1 2
1 2
@
EXO@
CV169 10U_0603_6.3V6M
12
CV167
.1U_0402_16V7K
12
EXO@
RV20
VGA@
1M_0402_5%
YV1
VGA@
27MHZ_10PF_7V270 00050
3
GND
GND
2
4
VGA@
1 2
R3932 0_0402_5%
@
1 2
R3933 0_0402_5%
APU_PROCHOT#
A
3 4
QV1A
VGA@
DIR
XTALINXTALOUT
1
+3VSDGPU
1
1
2
SGD
2
G
6 1
S
D
QV1B
VGA@
+3VSDGPU
@
1
VDD1
6
ALERT#
4
THERM#
5
GND
ADM1032ARMZ_MSOP8
2
.1U_0402_16V7K
1
UV2607
1
VCCA
2
A1
3
A2
5
DIR
S IC SN74AVC2T45DCTR_SM8
GPU_VID3
RV1632 0_0402_5%@
GPU_VID1
RV1633 0_0402_5%@
TESTEN
12
CV17
8.2P_0402_50V8D VGA@
1 2
VGA@
RB751V-40_SOD323- 2
+1.8VALW
5
U2612
P
NC
4
Y
A
G
@
NL17SZ07DFT2G_SC70- 5
3
SA00004BV00
VGA@
RV146
VGA@
1 2
4.7K_0402_5%
UV51
SCLK
SDATA
CV166
EXO@
EXO@
3.3V TO 1.8V LEVEL SHIF For Exo to support SVI2 reaulator DNI for Mes o
DV7
VGA_AC_BATT
RV5
45.3K_0402_1%
RV152
10K_0402_5%
B
GPU_SVD <48> GPU_SVC <48>
@
12
1 2
B
GPIO19_CTF
VGA@
RV151 10K_0402_5%
+1.8VSDGPU
.1U_0402_16V7K
TP@
T222
TP@
T221
VGA_SMB_DA3 VGA_SMB_CK3
LV2
1 2
BLM15BD121SN1D_0402
CV19 10U_0603_6.3V6 MVGA@
CV20 1U_0402_6.3V6KVGA@
CV21 .1U_0402_16V7KVGA@
RV21 10K_0402_5%EXO @
2
CV698
1
MESO@
+1.8VSDGPU
RV82 4.7K_0402_5%@
FB_VDDCI
1
RV81 4.7K_0402_5%@
PLL_ANALOG_IN
1
RV1630 0_0402_5%RS@
1 2
RV1631 0_0402_5%RS@
1 2
GPU_VID3
THM_ALERT#
GPIO19_CTF GPU_VID1
TP@
RV29 10K_0402_5%@ RV59 10K_0402_5%@
VGA@
13mA
12
12
12
1 2
Enable MLPS
+3VSDGPU
RV91 10K_0402_5% MESO@
1 2
RV90 1 2 MESO@ 1K_0402_5%
GPU_PROCHOT#PCC_GPIO_6
Peak Current Control (PCC) CKT Reversed
T86TP@
TP@
T4930
T218
1 2 1 2
TP@
T201
TP@
T202
TP@
T203
TP@
T204
TP@
T205
TP@
T206
TP@
T207
TP@
T208
TP@
T209
TP@
T210
TP@
T211
TP@
T212
TP@
T213
TP@
T214
TP@
T215
TP@
T216
TP@
T217
12
12
TP@
T223
TP@
T224
+VGA_CORE
VGA_SMB_DA3_R VGA_SMB_CK3_R VGA_AC_BATT PCC_GPIO_6
+VGA_CORE
PEG_CLKREQ#_R
JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO
1
TESTEN
+VGA_CORE
1
1
XTALIN XTALOUT
VGA_DPLUS VGA_DMINUS
GPIO28 +TSVDD
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
BP_0
BP_1
1 1
PX_EN
GPU_PROCHOT# <48>
@ UV1B
N9
DBG_DATA16
L9
DBG_DATA15
AE9
DBG_DATA14
Y11
DBG_DATA13
AE8
DBG_DATA12
AD9
DBG_DATA11
AC10
DBG_DATA10
AD7
DBG_DATA9
AC8
DBG_DATA8
AC7
DBG_DATA7
AB9
DBG_DATA6
AB8
DBG_DATA5
AB7
DBG_DATA4
AB4
DBG_DATA3
AB2
DBG_DATA2
Y8
DBG_DATA1
Y7
DBG_DATA0
W6
NC#W6
V6
NC#V6
AC6
NC#AC5
AC5
NC#AC6
AA5
NC#AA5
AA6
NC#AA6
U1
NC#U1
W1
NC#W1
U3
NC#U3
Y6
NC#Y6
AA1
NC#AA1
R1
SCL
R3
SDA
GENERAL PURPOSE I/O
U6
GPIO_0
U10
GPIO_1
T10
GPIO_2
U8
SMBDATA
U7
SMBCLK
T9
GPIO_5_AC_BATT
T8
GPIO_6
T7
GPIO_7_BLON
P10
GPIO_8_ROMSO
P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK
N6
GPIO_11
N5
GPIO_12
N3
GPIO_13
Y9
GPIO_14_HPD2
N1
GPIO_15_PWRCNTL_0
M4
GPIO_16
R6
GPIO_17_THERMAL_INT
W10
GPIO_18
M2
GPIO_19_CTF
P8
GPIO_20_PWRCNTL_1
P7
GPIO_21
N8
GPIO_22_ROMCSB
AK10
GPIO_29
AM10
GPIO_30
N7
CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
K4
JTAG_TDO
K7
TESTEN
AF24
NC#AF24
AB13
GENERICA
W8
GENERICB
W9
GENERICC
W7
GENERICD
AD10
GENERICE
AJ9
NC#AJ9
AL9
NC#AL9
AC14
HPD1
AB16
PX_EN
AC16
DBG_VREFG
AM28
XTALIN
AK28
XTALOUT
AC22
XO_IN
AB22
XO_IN2
SEYMOUR/FutureASIC
T4
DPLUS
T2
DMINUS
R5
GPIO28_FDO
AD17
TSVDD
AC17
TSVSS
2160856030-A0_FCBGA631
I2C
PLL/CLOCK
THERMAL
C
DVO
C
U?
DPA
DPB
DPC
AVSSN#AK26
AVSSN#AG25
DAC1
FutureASIC/SEYMOUR /PARK
GENLK_VSYNC
SWAPLOCKA SWAPLOCKB
DDC/AUX
DDCVGADATA
?
NC#AF2 NC#AF4
NC#AG3 NC#AG5
NC#AH3 NC#AH1
NC#AK3 NC#AK1
NC#AK5 NC#AM3
NC#AK6 NC#AM5
NC#AJ7
NC#AH6
NC#AK8
NC#AL7
NC#V4 NC#U5
NC#W3
NC#V2
NC#Y4
NC#W5
NC#AA3
NC#Y2
NC#J8
AVSSN#AJ25
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI VSS1DI
CEC_1
RSVD#AK12 RSVD#AL11 RSVD#AJ11
GENLK_CLK
DDC1CLK
DDC1DATA
AUX1P AUX1N
DDC2CLK
DDC2DATA
AUX2P AUX2N
NC#AD20 NC#AC20
NC#AE16
NC#AD16
DDCVGACLK
D
Resistor Divider Lookup Lable
AF2 AF4
AG3 AG5
AH3 AH1
AK3 AK1
AK5 AM3
AK6 AM5
AJ7 AH6
AK8 AL7
V4 U5
W3 V2
Y4 W5
PLL_ANALOG_OUT
AA3 Y2
J8
AM26
R
AK26
AL25
G
AJ25
AH24
B
AG25
AH26 AJ27
WAKEB
AD22
AG24 AE22
AE23 AD23
AM12
AK12 AL11 AJ11
AL13 AJ13
AG13 AH12
PS_0
AC19
PS_0
PS_1
AD19
PS_1
PS_2
AE17
PS_2
PS_3
AE20
PS_3
AE19
TS_A
AE6 AE5
AD2
+VGA_CORE
AD4
AC11 AC13
AD13 AD11
FB_GND
AD20
FB_VDDC
AC20
AE16 AD16
AC1 AC3
GPU_VDD_SEN GPU_VDD_RUN_FB_L
R_pu (ohm) R_pd (ohm)
NC
8.45k
4.53k
6.98k
4.53k
3.24k
3.4k
4.75k
0402 1% resistors are e quired
Capacitor Divider Lookup Lable
680nF
82nF
NC
12
RV83
@
16.2K_0402_1%
+3VSDGPU
12
RV162
4.7K_0402_5% @
12
RV163
4.7K_0402_5% @
RV155 0_0402_5%M ESO@
1 2
RV156 0_0402_5%M ESO@
1 2
RV157 0_0402_5%M ESO@
1 2
GPU_SVD GPU_SVT GPU_SVC
MESO SVI2
RV84 10K_0402_5% MESO@
1 2 GPU_SVT GPU_SVD GPU_SVC
RV89 10K_0402_5% @
1 2
RV158
1 2
RV159
1 2
RV161
1 2
RV160
1 2
Security Classific ation
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Bitd [3:1]
4.75k
000
2k
001
010
2k
011
4.99k
100
4.99k
101
5.62k
110
10k
NC
111
Bitd [5:4]Cap (nF)
00
01
1010nF
11
GPU_SVT <48>
+1.8VSDGPU
RV87 10K_0402_5% @
1 2
1 2
RV88 10K_0402_5% MESO@
1 2
1 2
0_0402_5%MESO@ 0_0402_5%MESO@
+VGA_CORE
0_0402_5%EXO@ 0_0402_5%EXO@
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
D
PS_0[3:1]=001
PS_0[5:4]=11
PS_1[3:1]=000
PS_1[5:4]=11
PS_2[3:1]=000
PS_2[5:4]=11
PS_3[3:1]=000
PS_3[5:4]=11
Memory ID
RV1583 10K_0402_5% @
RV1584 10K_0402_5% @
GPU_VDD_RUN_FB_L <48> GPU_VDD_SEN <48>
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+1.8VSDGPU
12
VGA@ RV8
PS_0
PS_1
PS_2
@ CV11
PS_3
8.45K_0402_1%
12
1
VGA@
CV29
RV9 2K_0402_1%
2
@
0.68U_0402_10V
+1.8VSDGPU
12
@ RV11
8.45K_0402_1%
12
1
VGA@ RV12
CV28
4.75K_0402_1%
2
@
0.68U_0402_10V
+1.8VSDGPU
12
@ RV28
8.45K_0402_1%
12
1
VGA@ RV13
4.75K_0402_1%
2
0.68U_0402_10V
+1.8VSDGPU
12
@ RV15
8.45K_0402_1%
12
1
@
@
RV1581
CV15
2K_0402_1%
2
0.68U_0402_10V
P/N
000
SA00006E8B 0
SA000076P20
001
010
SA00008DN10
011
SA00006E840
Strap Name :
PS_0[1] ROM_CON FIG[0]
PS_0[2] ROM_CON FIG[1]
PS_0[3] ROM_CON FIG[2]
PS_0[4] N/A
PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
Strap Name :
PS_1[1] STRAP _BIF_GEN3_EN_A
PS_1[2] TRAP_BIF_CLK_PM_EN
PS_1[3] N/A
PS_1[4] STRAP_TX_CFG_DRV_FU LL_SWING
PS_1[5] STRAP _TX_DEEMPH_EN
Strap Name :
PS_2[1] N/A
PS_2[2] N/A
PS_2[3] STRAP_BIOS_ROM_EN
PS_2[4] STRAP_BIF_VGA_DIS
PS_2[5] N/A
Strap Name :
PS_3[1] BOARD_CONFIG[ 0] (Memory ID)
PS_3[2] BOARD_CONFIG[ 1] (Memory ID)
PS_3[3] BOARD_CONFIG[ 2] (Memory ID)
PS_3[4] AUD_PORT_CONN_PINSTRAP[1]
PS_3[5] AUD_PORT_CONN_PINSTRAP[2]
Vendor
HYNIX
SAMSUNG
HYNIX
HYNIX
100
101
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
SizeC onf i g ur at i on
H5TC4G63CFR-11C
K4W4G1646D-BC1A
*4 2GB
*4 2GB
H5TC4G63CFR-N0 C *4 2GB
*4 2GBH5TC4G63AFR-11C
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Meso_MISC
Meso_MISC
Meso_MISC
Document Nu mber Re v
Document Nu mber Re v
Document Nu mber Re v
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
E
15 51Thursday, February 26 , 2015
15 51Thursday, February 26 , 2015
15 51Thursday, February 26 , 2015
1A
1A
1A
A
B
C
@ UV1E
U?
D
E
AG15 AG16
AF16 AG17 AG18 AG19
AF14
AG20 AG21
AF22 AG22 AD14
AG14 AH14 AM14 AM16 AM18
AF23 AG23 AM20 AM22 AM24
AF19
AF20 AE14
AF17
No Use GPU Display Port outpud370mA (HDMI)
@ UV1G
DP POW ER
DP_VDDR#AG15 DP_VDDR#AG16 DP_VDDR#AF16 DP_VDDR#AG17 DP_VDDR#AG18 DP_VDDR#AG19 DP_VDDR#AF14
DP_VDDC#AG20 DP_VDDC#AG21 DP_VDDC#AF22 DP_VDDC#AG22 DP_VDDC#AD14
DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR
DPAB_CALR
2160856030-A0_FCBGA631
U?
NC/DP POW ER
AE11
NC#AE11
AF11
NC#AF11
AE13
NC#AE13
AF13
NC#AF13
AG8
NC#AG8
AG10
NC#AG10
AF6
NC#AF6
AF7
NC#AF7
AF8
NC#AF8
AF9
NC#AF9
AE1
NC#AE1
AE3
NC#AE3
AG1
NC#AG1
AG6
NC#AG6
AH5
NC#AH5
AF10
NC#AF10
AG9
NC#AG9
AH8
NC#AH8
AM6
NC#AM6
AM8
NC#AM8
AG7
NC#AG7
AG11
NC#AG11
AE10
NC#AE10
?
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2015/02/25 2017/02/25
2015/02/25 2017/02/25
2015/02/25 2017/02/25
+1.8VSDGPU
1 2
1 1
+0.95VSDGPU
2 2
3 3
4 4
RV27 0_0603_5%
1 2
RV30 0_0603_5%
A
188mA (Display Port)
1
CV261U_0402_6 .3V6 K
2
VGA@
1
CV331U_0402 _6.3V6K
2
VGA@
+DP_VDDR
RS@
RS@
1
CV2710U_0603_6.3V6M
2
VGA@
280mA
+DP_VDDC
1
CV34.1U_0402 _16V7K
2
VGA@
AA27 AB24
AB32 AC24 AC26 AC27 AD25 AD32
AE27
AF32 AG27 AH32
AA11
Compal Secret Data
Compal Secret Data
Compal Secret Data
C
K28 K32
M32 N25 N27 P25 P32 R27
U25 U27
V32 W25 W26 W27
Y25
Y32
N13
N16
N18
N21
R12
R15
R17
R20
U15
U17
U20
V13
V16
V18
Y10
Y15
Y17
Y20
R11
M12
N11
V11
L27
T25 T32
T13 T16 T18 T21
T11
M6
P6 P9
T6
U9
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
2160856030-A0_FCBGA631
Deciphered Date
Deciphered Date
Deciphered Date
GND
A3
GND
A30
GND
AA13
GND
AA16
GND
AB10
GND
AB15
GND
AB6
GND
AC9
GND
AD6
GND
AD8
GND
AE7
GND
AG12
GND
AH10
GND
AH28
GND
B10
GND
B12
GND
B14
GND
B16
GND
B18
GND
B20
GND
B22
GND
B24
GND
B26
GND
B6
GND
B8
GND
C1
GND
C32
GND
E28
GND
F10
GND
F12
GND
F14
GND
F16
GND
F18
GND
F2
GND
F20
GND
F22
GND
F24
GND
F26
GND
F6
GND
F8
GND
G10
GND
G27
GND
G31
GND
G8
GND
H14
GND
H17
GND
H2
GND
H20
GND
H6
GND
J27
GND
J31
GND
K11
GND
K2
GND
K22
GND
K6
GND
VSS_MECH VSS_MECH VSS_MECH
?
A32 AM1 AM32
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Dat e: Sheet o f
Dat e: Sheet o f
D
Dat e: Sheet o f
Compal Electronics, Inc.
Meso_PWR/GND
Meso_PWR/GND
Meso_PWR/GND
Document Numbe r R e v
Document Numbe r R e v
Document Numbe r R e v
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
A4WAZ/A4WAR LA-C351P
16 51Thursday, February 26, 201 5
16 51Thursday, February 26, 201 5
16 51Thursday, February 26, 201 5
E
1A
1A
1A
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