Acer ASPIRE E5-432 Schematic

A

Model Name : A4WAL
File Name : LA-C371P

B

C

D

E

1

1

Compal Confidential

2

A4WAL M/B Schematics Document

Intel Braswell-M/D + N16X

2015-03-04

3

REV:1.0

2

3

4

PCB@

PCB 1BW LA-C371P REV0 MB 1

DAX

Part Number

DA6001BJ000 PCB 1BW LA-C371P REV0 MB 1

Description

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

C

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

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1.0

1.0

1.0

A

B

C

D

E

CRT Conn.

P.27

eDP Conn.

Nvidia N16V-GL
with DDR3 x8

1

P.24

port 1

DP to VGA
Realtek RTD2168

port 2

P.26

port 0

page 15~23

PCIe 2.0 x 2
5GT/s

port 0/1

Memory BUS

Dual Channel

1.35V DDR3L 1600

204pin DDR3L-SO-DIMM X1

P.13

204pin DDR3L-SO-DIMM X1

P.14

1

P.25

P.25

HDMI Conn.

PCIE 2.0 x1

port 3

RJ45 Conn.

2

Card Reader

2 in 1(SD)

P.29

LAN(GbE) / Card Reader

RTL8411B

P.28

SATA 3.0 x2

P.32

3

SATA ODD Conn.

RTC CKT.

P.08

port 1

SATA HDD Conn.

P.32

port 0

DDI x3

Braswell-M/D

I2C BUS

EC
ENE KB9022

P.35

SOC

FCBGA 1170 Pin

LPC BUS

P.34

P.35

page 05~12

SPI ROM

1.8V (8MB)

USB2.0 x4

USB3.0 x2

PCIE 2.0 x1

HD Audio

SPI

P.07

port 0

USB 3.0
Conn

port 0

port 1

port 2 port 3 port 4

HD Camera
Conn.

P.24

P.33

USB 3.0
Conn

P.33

USB Charger
SLG55594

port 1

HDA Codec

ALC283/255

Speaker UAJ

P.36 P.36 P.33

P.36

Int. MIC

Touch Panel
Conn.

on Sub/B

P.24

USB HUB
GL850G

Port1 Port2

NGFF
WLAN/BT

P.30

P.31

USB 2.0
Conn

2

P.33

3

DC/DC Interface CKT.

P.38

Sub Board

Power Circuit DC/DC

P.39~P.52

4

LED/Power On/Off

P.35

LS_XXXXP USB/Audio

P.33

Touch Pad
PS2/I2C

Fan Control

P.37

A

B

Int.KBD

www.schematic-x.blogspot.com

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

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4

1.0

1.0

1.0

A

B

C

D

E

Voltage Rails

+19V_VIN

BATT+ 12V Battery power supply

+19VB

+RTCVCC RTC Battery Power

+1.05VALW

1 1

+1.15VALW

+1.24VALW

+1.8VALW +1.8v Always power rail

+3VALW +3.3v Always power rail

+5VALW

+3V_PTP +3.3V power rail for PTP OFFON ON

+SOC_VCC Core voltage for SOC

+SOC_VGG GFX voltage for SOC

+0.675VS +0.675V power rail for DDR3L Terminator

+1.8VS

+3VS

+5VS

+3VSDGPU

+VGA_CORE

+1.5VSDGPU

2 2

+1.05VSDGPU

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Note : ON** dGPU optimus on

19V Adapter power supply

AC or battery power rail for power circuit. (19V/12V)

+1.05v Always power rail

+1.15v Always power rail

+1.24v Always power rail

+5.0v Always power rail

+1.35V power rail for DDR3L+1.35V

+1.8v system power rail

+3.3v system power rail

+5.0v system power rail

+3.3V dGPU power rail

Core voltage for dGPU

+1.5V dGPU power rail

+1.05V dGPU power rail

S0 S3 S4/S5Power Plane Description

ON

ON ON

ON ONON

ON ONON

ON ONON

ONONONONON

ON ON

ON

ON

ON OFF OFF

ON OFF OFF

ON OFF OFF

ON OFF OFF

ON**

ON**

ON**

ON**

ON

ON ONON

ON ONON

ON ONON

ON ONON

OFF

OFF OFF

OFF OFF

OFF OFF

OFF OFF

OFFOFF

OFFOFF

Board ID / SKU ID Table for AD channel

43 level BOM table

Description43 Level BOM Structure

4319X5BOL03

4319X5BOL06

4319X5BOL07

4319X5BOL08

SMT MB AC371 A4WAL UMA HDMI4319X5BOL01

SMT MB AC371 A4WAL DIS N16V-GM HDMI4319X5BOL02

SMT MB AC371 A4WAL DIS N16S-GT HDMI

SMT MB AC371 A4WAL DIS N16V-GM 4G HDMI4319X5BOL04

SMT MB AC371 A4WAL DIS N16S-GT 4G HDMI4319X5BOL05

SMT MB AC371 A4WAL UMA QHAW HDMI

SMT MB AC371 A4WAL DIS GM2G QHAX HDMI

SMT MB AC371 A4WAL DIS GM4G QHAX HDMI

BOARD ID Table_LA-C371P

Board ID

01

1DMIC@/255@/EMC@/HDD@/HUB@/NBYOC@/KB@/PCB@/LPC3V@/TSI@/UMA@/QHAX@

1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/QHAW@

1DMIC@/255@/EMC@/GC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/SGT@/LPC3V@/TSI@/VGA@/QHAW@

1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/DR@/QHAW@

1DMIC@/255@/EMC@/GC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/SGT@/LPC3V@/TSI@/VGA@/DR@/QHAW@

1DMIC@/255@/EMC@/HDD@/HUB@/NBYOC@/KB@/PCB@/LPC3V@/TSI@/UMA@/QHAW@

1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/QHAX@

1DMIC@/255@/EMC@/NGC6@/HDD@/HUB@/NBYOC@/KB@/PCB@/VGM@/LPC3V@/TSI@/VGA@/DR@/QHAX@

PCB Revision

EVT_LA-C371PR01
DVT_LA-C371PR0202
PVT_LA-C371PR1003

EC SMBUS Routing Table

EC
EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2
EC_SMB_DA2

3 3

SOC SMBUS Routing Table

Power

+3VALW

+3VS

SOC

Power

BAT CHGR

VXVXX

DIMM1 DIMM2 NGFF

SMB Address

SOC_SMBCLK
SOC_SMBDATA

+1.8VALW
to +3VS

V V

I2C Map

Power

I2C Address
I2C Port2

4 4

I2C Port5

+1.8VALW to +TS_PWR

+1.8VALW to +3V_PTP

SOC DGPU

X

V V

XDP EC DGPU

X

V V V

Touch PAD

Touch Panel

0xXX 0xXX

X

V

RTD2168

V

BOM Option Table

Item BOM Structure

Unpop @

Touch Screen I2C TSI@
KB BL KB@
TPM
NTPM

N16S-GT SKU SGT@

CONN@Connector
EMC@EMC requirement
@EMC@EMC requirement depop

TPM@
NTPM@
DBG@Power Button
VGA@dGPU

BOM Option Table

Item BOM Structure

X76 VRAM
with BYOC BYOC@
without BYOC NBYOC@
EA Serial HDD HDD@

non USB HUB
USB HUB

CPU QHAW QHAW@

X76@

BA@BA Serial HDD
NHUB@
HUB@
DR@Dual Rank
GSEN@G-sensor
QHAX@CPU QHAX

N16V-GM SKU VGM@
CODEC(ALC255)
CODEC(ALC283)

255@
283@
NGC6@Non GPU CG6 Function

GPU CG6 Function GC6@

V

X

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

E

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3 55Wednesday, March 04, 2015

3 55Wednesday, March 04, 2015

1.0

1.0

1.0

A

VR_ON

NCP81201MNTXG
(PU901)

NCP81201MNTXG

B

7000mA

11000mA

+SOC_VCC

+SOC_VGG

C

D

E

(PU902)

1 1

ADAPTER

CHARGER

BATTERY

2 2

+19VB

EC_EN_1.05VALW

SYSON

3V_EN

SY8288RAC
(PU601)

RT8207MZQW
(PU501)

SY8286BRAC
(PU401)

5400mA

5900mA

+1.05VALWP

+1.35VP

SUSP#

PJ501

EM5209VF
(U60)

+0.675VSP

+1.35V

1060mAVGA_PWROK

+1.05VSDGPU

+3VALWP

SUSP#

SY8003DFC
(PU701)

+1.24VALW_PWRGD

SY8032ABC

(PU702)

+1.05VALW_PWRGD PJ802

G971ADJF11U
(PU801)

700mA

597mA

550mA

+1.15VALWP

+1.8VALWP

+1.24VALWP

PJ701

+1.15VALW

EM5209VF
(U59)

+1.24_1.35VALW

110mA

+1.8VS

0 ohm

+1.24_1.35VALW_ICLK

0 ohm

+1.24_1.35VALW_USBVDDQ

SUSP#

EM5209VF
(U11)

LAN_PWR_EN

SY6288C20AAC
(U67)

3 3

EC_ON

SY8286CRAC
(PU402)

+5VALWP

SUSP# 4868mA

EM5209VF
(U11)

3135mA

1400mA

+3VS

+3V_LAN

+5VS

JP8

ENVDD

DGPU_PWR_EN

3VSDGPU_MAIN_EN

J1

0 ohm

+3VS_WLAN

G5243AT11U
(U8)

G5243T11U
(U12)

G5243T11U
(U14)

+VDDA

+5VS_HDD

+LCDVDD

+3VSDGPU_AON

+3VSDGPU_MAIN

ODD_EN

USB_PWR_EN

+3VSDGPU_AON

RT8812AGQW
(PU1201)

4 4

1.5VS_DGPU_PWR_EN

SY8288RAC
(PU1101)

A

B

26000mA

10000mA

+VGA_CORE

+1.5VSDGPU

USB_CHARGE_2A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

SY6288C20AAC
(U25)

SY6288C20AAC
(U25)

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

+USB3_VCCA

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+USB3_VCCB

D

G5243AT11U
(U13)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

+5VS_ODD

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Power Rail

Power Rail

Power Rail

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

E

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4 55Wednesday, March 04, 2015

4 55Wednesday, March 04, 2015

1.0

1.0

1.0

5

4

3

2

1

DDR_A_D[0..63] <13>

DDR_A_DQS[0..7] <13>

DDR_A_MA[0..15]<13>

D D

C C

+DDRA_SOC_VREFCA
+DDRA_SOC_VREFDQ

DDR_A_DM[0..7]<13>

B B

DDR_A_MA15
DDR_A_MA14
DDR_A_MA13
DDR_A_MA12
DDR_A_MA11
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA7
DDR_A_MA6
DDR_A_MA5
DDR_A_MA4
DDR_A_MA3
DDR_A_MA2
DDR_A_MA1
DDR_A_MA0

DDR_A_BS2<13>
DDR_A_BS1<13>
DDR_A_BS0<13>

DDR_A_CAS#<13>
DDR_A_RAS#<13>
DDR_A_WE#<13>

DDR_A_CS1#<13>
DDR_A_CS0#<13>

DDR_A_CLK1<13>
DDR_A_CLK1#<13>

DDR_A_CKE1<13>

DDR_A_CLK0<13>
DDR_A_CLK0#<13>

DDR_A_CKE0<13>

DDR_A_ODT0<13>
DDR_A_ODT1<13>

DDR_A_RST#<13>

DDR_PWROK<43> DDR_CORE_PWROK<9>

DDRA_RCOMP DDRB_RCOMP

DDR_A_DM7
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0

USOC1A

BD49

DDR3_M0_MA_15

BD47

DDR3_M0_MA_14

BF44

DDR3_M0_MA_13

BF48

DDR3_M0_MA_12

BB49

DDR3_M0_MA_11

BJ45

DDR3_M0_MA_10

BE52

DDR3_M0_MA_9

BD44

DDR3_M0_MA_8

BE46

DDR3_M0_MA_7

BB46

DDR3_M0_MA_6

BH48

DDR3_M0_MA_5

BD42

DDR3_M0_MA_4

BH47

DDR3_M0_MA_3

BJ48

DDR3_M0_MA_2

BC42

DDR3_M0_MA_1

BB47

DDR3_M0_MA_0

BF52

DDR3_M0_BS_2

AY40

DDR3_M0_BS_1

BH46

DDR3_M0_BS_0

BG45

DDR3_M0_CASB

BA40

DDR3_M0_RASB

BH44

DDR3_M0_WEB

AU38

DDR3_M0_CSB_1

AY38

DDR3_M0_CSB_0

BD38

DDR3_M0_CK_1

BF38

DDR3_M0_CKB_1

AY42

DDR3_M0_CKE_1

BD40

DDR3_M0_CK_0

BF40

DDR3_M0_CKB_0

BB44

DDR3_M0_CKE_0

AT30

RSVD1

AU30

RSVD2

AV36

DDR3_M0_ODT_0

BA38

DDR3_M0_ODT_1

AT28

DDR3_M0_OCAVREF

AU28

DDR3_M0_ODQVREF

BA42

DDR3_M0_DRAMRSTB

AV28

DDR3_DRAM_PW ROK

BA28

DDR3_M0_RCOMPPD

BH30

DDR3_M0_DM_7

BD32

DDR3_M0_DM_6

AY36

DDR3_M0_DM_5

BG41

DDR3_M0_DM_4

BA53

DDR3_M0_DM_3

AP44

DDR3_M0_DM_2

AT48

DDR3_M0_DM_1

AP52

DDR3_M0_DM_0

BH32

DDR3_M0_DQS_7

BG31

DDR3_M0_DQSB_7

BC30

DDR3_M0_DQS_6

BC32

DDR3_M0_DQSB_6

AT32

DDR3_M0_DQS_5

AT34

DDR3_M0_DQSB_5

BH40

DDR3_M0_DQS_4

BG39

DDR3_M0_DQSB_4

AY52

DDR3_M0_DQS_3

BA51

DDR3_M0_DQSB_3

AT42

DDR3_M0_DQS_2

AT41

DDR3_M0_DQSB_2

AV47

DDR3_M0_DQS_1

AV48

DDR3_M0_DQSB_1

AM52

DDR3_M0_DQS_0

AM51

DDR3_M0_DQSB_0

BSW-MCP-EDS_FCB GA1170

CHV_MCP_EDS

DDR0

1 OF 13

DDR3_M0_DQ_63
DDR3_M0_DQ_62
DDR3_M0_DQ_61
DDR3_M0_DQ_60
DDR3_M0_DQ_59
DDR3_M0_DQ_58
DDR3_M0_DQ_57
DDR3_M0_DQ_56

DDR3_M0_DQ_55
DDR3_M0_DQ_54
DDR3_M0_DQ_53
DDR3_M0_DQ_52
DDR3_M0_DQ_51
DDR3_M0_DQ_50
DDR3_M0_DQ_49
DDR3_M0_DQ_48

DDR3_M0_DQ_47
DDR3_M0_DQ_46
DDR3_M0_DQ_45
DDR3_M0_DQ_44
DDR3_M0_DQ_43
DDR3_M0_DQ_42
DDR3_M0_DQ_41
DDR3_M0_DQ_40

DDR3_M0_DQ_39
DDR3_M0_DQ_38
DDR3_M0_DQ_37
DDR3_M0_DQ_36
DDR3_M0_DQ_35
DDR3_M0_DQ_34
DDR3_M0_DQ_33
DDR3_M0_DQ_32

DDR3_M0_DQ_31
DDR3_M0_DQ_30
DDR3_M0_DQ_29
DDR3_M0_DQ_28
DDR3_M0_DQ_27
DDR3_M0_DQ_26
DDR3_M0_DQ_25
DDR3_M0_DQ_24

DDR3_M0_DQ_23
DDR3_M0_DQ_22
DDR3_M0_DQ_21
DDR3_M0_DQ_20
DDR3_M0_DQ_19
DDR3_M0_DQ_18
DDR3_M0_DQ_17
DDR3_M0_DQ_16

DDR3_M0_DQ_15
DDR3_M0_DQ_14
DDR3_M0_DQ_13
DDR3_M0_DQ_12
DDR3_M0_DQ_11
DDR3_M0_DQ_10

DDR3_M0_DQ_9
DDR3_M0_DQ_8

DDR3_M0_DQ_7
DDR3_M0_DQ_6
DDR3_M0_DQ_5
DDR3_M0_DQ_4
DDR3_M0_DQ_3
DDR3_M0_DQ_2
DDR3_M0_DQ_1
DDR3_M0_DQ_0

BG33
BH28
BJ29
BG28
BG32
BH34
BG29
BJ33

BD28
BF30
BA34
BD34
BD30
BA32
BC34
BF34

AV32
AV34
BD36
BF36
AU32
AU34
BA36
BC36

BH38
BH36
BJ41
BH42
BJ37
BG37
BG43
BG42

BB51
AW53
BC52
AW51
AV51
BC53
AV52
BD52

AV42
AP41
AV41
AT44
AP40
AT38
AP42
AT40

AV45
AY50
AT50
AP47
AV50
AY48
AT47
AP48

AP51
AR53
AK52
AL53
AR51
AT52
AL51
AK51

close to SOC pi n

1 2
1 2

USOC1

QHAX@

A A

S IC FH8066501715905 QHAX B1 1.36G FCBGA15 1380

SA00008GO00

R963182_0402_1%
R964182_0402_1%

DDRA_RCOMP
DDRB_RCOMP

EMC@

1 2

DDR_CORE_PWROK

C1159 .1U_0402_16V7K

ESD request 0211

DDR_A_DQS#[0..7] <13>

DDR_A_D63
DDR_A_D62
DDR_A_D61
DDR_A_D60
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56

DDR_A_D55
DDR_A_D54
DDR_A_D53
DDR_A_D52
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48

DDR_A_D47
DDR_A_D46
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40

DDR_A_D39
DDR_A_D38
DDR_A_D37
DDR_A_D36
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32

DDR_A_D31
DDR_A_D30
DDR_A_D29
DDR_A_D28
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24

DDR_A_D23
DDR_A_D22
DDR_A_D21
DDR_A_D20
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16

DDR_A_D15
DDR_A_D14
DDR_A_D13
DDR_A_D12
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D8

DDR_A_D7
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D2
DDR_A_D1
DDR_A_D0

DDR_B_MA[0..15]<14>

DDR_B_DM[0..7]<14>

+DDRB_SOC_VREFCA
+DDRB_SOC_VREFDQ

DDR_B_MA15
DDR_B_MA14
DDR_B_MA13
DDR_B_MA12
DDR_B_MA11
DDR_B_MA10
DDR_B_MA9
DDR_B_MA8
DDR_B_MA7
DDR_B_MA6
DDR_B_MA5
DDR_B_MA4
DDR_B_MA3
DDR_B_MA2
DDR_B_MA1
DDR_B_MA0

DDR_B_BS2<14>
DDR_B_BS1<14>
DDR_B_BS0<14>

DDR_B_CAS#<14>
DDR_B_RAS#<14>

DDR_B_WE#<14>

DDR_B_CS1#<14>
DDR_B_CS0#<14>

DDR_B_CLK1<14>
DDR_B_CLK1#<14>
DDR_B_CKE1<14>

DDR_B_CLK0<14>
DDR_B_CLK0#<14>
DDR_B_CKE0<14>

DDR_B_ODT0<14>

DDR_B_ODT1<14>

DDR_B_RST#<14>

DDR_B_DM7
DDR_B_DM6
DDR_B_DM5
DDR_B_DM4
DDR_B_DM3
DDR_B_DM2
DDR_B_DM1
DDR_B_DM0

DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0

Close To SOC Pi n Close To SOC Pi n

+1.35V_SOC

+1.35V_SOC

1 2

@

R980

4.7K_0402_1%

1 2

@

R974

4.7K_0402_1%

1 2

@

R965

4.7K_0402_1%

1 2

@

R966

4.7K_0402_1%

V0.2 modify V0.2 modify

+DDRA_SOC_VREFCA

1

@

C1136
.1U_0402_16V7K

2

+DDRA_SOC_VREFDQ

1

@

C1132
.1U_0402_16V7K

2

USOC1B

BD5

DDR3_M1_MA_15

BD7

DDR3_M1_MA_14

BF10

DDR3_M1_MA_13

BF6

DDR3_M1_MA_12

BB5

DDR3_M1_MA_11

BJ9

DDR3_M1_MA_10

BE2

DDR3_M1_MA_9

BD10

DDR3_M1_MA_8

BE8

DDR3_M1_MA_7

BB8

DDR3_M1_MA_6

BH6

DDR3_M1_MA_5

BD12

DDR3_M1_MA_4

BH7

DDR3_M1_MA_3

BJ6

DDR3_M1_MA_2

BC12

DDR3_M1_MA_1

BB7

DDR3_M1_MA_0

BF2

DDR3_M1_BS_2

AY14

DDR3_M1_BS_1

BH8

DDR3_M1_BS_0

BG9

DDR3_M1_CASB

BA14

DDR3_M1_RASB

BH10

DDR3_M1_WEB

AU16

DDR3_M1_CSB_1

AY16

DDR3_M1_CSB_0

BD16

DDR3_M1_CK_1

BF16

DDR3_M1_CKB_1

AY12

DDR3_M1_CKE_1

BD14

DDR3_M1_CK_0

BF14

DDR3_M1_CKB_0

BB10

DDR3_M1_CKE_0

AT24

RSVD1

AU24

RSVD2

AV18

DDR3_M1_ODT_0

BA16

DDR3_M1_ODT_1

AT26

DDR3_M1_OCAVREF

AU26

DDR3_M1_ODQVREF

BA12

DDR3_M1_DRAMRSTB

AV26

DDR3_VCCA_PW ROK

BA26

DDR3_M1_RCOMPPD

BH24

DDR3_M1_DM_7

BD22

DDR3_M1_DM_6

AY18

DDR3_M1_DM_5

BG13

DDR3_M1_DM_4

BA1

DDR3_M1_DM_3

AP10

DDR3_M1_DM_2

AT6

DDR3_M1_DM_1

AP2

DDR3_M1_DM_0

BH22

DDR3_M1_DQS_7

BG23

DDR3_M1_DQSB_7

BC24

DDR3_M1_DQS_6

BC22

DDR3_M1_DQSB_6

AT22

DDR3_M1_DQS_5

AT20

DDR3_M1_DQSB_5

BH14

DDR3_M1_DQS_4

BG15

DDR3_M1_DQSB_4

AY2

DDR3_M1_DQS_3

BA3

DDR3_M1_DQSB_3

AT12

DDR3_M1_DQS_2

AT13

DDR3_M1_DQSB_2

AV7

DDR3_M1_DQS_1

AV6

DDR3_M1_DQSB_1

AM2

DDR3_M1_DQS_0

AM3

DDR3_M1_DQSB_0

BSW-MCP-EDS_FCB GA1170

+1.35V_SOC

+1.35V_SOC

@

1 2

R1064

4.7K_0402_1%

@

1 2

R979

4.7K_0402_1%

@

1 2

R971

4.7K_0402_1%

@

1 2

R967

4.7K_0402_1%

CHV_MCP_EDS

DDR1

2 OF 13

DDR3_M1_DQ_63
DDR3_M1_DQ_62
DDR3_M1_DQ_61
DDR3_M1_DQ_60
DDR3_M1_DQ_59
DDR3_M1_DQ_58
DDR3_M1_DQ_57
DDR3_M1_DQ_56

DDR3_M1_DQ_55
DDR3_M1_DQ_54
DDR3_M1_DQ_53
DDR3_M1_DQ_52
DDR3_M1_DQ_51
DDR3_M1_DQ_50
DDR3_M1_DQ_49
DDR3_M1_DQ_48

DDR3_M1_DQ_47
DDR3_M1_DQ_46
DDR3_M1_DQ_45
DDR3_M1_DQ_44
DDR3_M1_DQ_43
DDR3_M1_DQ_42
DDR3_M1_DQ_41
DDR3_M1_DQ_40

DDR3_M1_DQ_39
DDR3_M1_DQ_38
DDR3_M1_DQ_37
DDR3_M1_DQ_36
DDR3_M1_DQ_35
DDR3_M1_DQ_34
DDR3_M1_DQ_33
DDR3_M1_DQ_32

DDR3_M1_DQ_31
DDR3_M1_DQ_30
DDR3_M1_DQ_29
DDR3_M1_DQ_28
DDR3_M1_DQ_27
DDR3_M1_DQ_26
DDR3_M1_DQ_25
DDR3_M1_DQ_24

DDR3_M1_DQ_23
DDR3_M1_DQ_22
DDR3_M1_DQ_21
DDR3_M1_DQ_20
DDR3_M1_DQ_19
DDR3_M1_DQ_18
DDR3_M1_DQ_17
DDR3_M1_DQ_16

DDR3_M1_DQ_15
DDR3_M1_DQ_14
DDR3_M1_DQ_13
DDR3_M1_DQ_12
DDR3_M1_DQ_11
DDR3_M1_DQ_10

DDR3_M1_DQ_9
DDR3_M1_DQ_8

DDR3_M1_DQ_7
DDR3_M1_DQ_6
DDR3_M1_DQ_5
DDR3_M1_DQ_4
DDR3_M1_DQ_3
DDR3_M1_DQ_2
DDR3_M1_DQ_1
DDR3_M1_DQ_0

BG21

DDR_B_D63

BH26

DDR_B_D62

BJ25

DDR_B_D61

BG26

DDR_B_D60

BG22

DDR_B_D59

BH20

DDR_B_D58

BG25

DDR_B_D57

BJ21

DDR_B_D56

BD26

DDR_B_D55

BF24

DDR_B_D54

BA20

DDR_B_D53

BD20

DDR_B_D52

BD24

DDR_B_D51

BA22

DDR_B_D50

BC20

DDR_B_D49

BF20

DDR_B_D48

AV22

DDR_B_D47

AV20

DDR_B_D46

BD18

DDR_B_D45

BF18

DDR_B_D44

AU22

DDR_B_D43

AU20

DDR_B_D42

BA18

DDR_B_D41

BC18

DDR_B_D40

BH16

DDR_B_D39

BH18

DDR_B_D38

BJ13

DDR_B_D37

BH12

DDR_B_D36

BJ17

DDR_B_D35

BG17

DDR_B_D34

BG11

DDR_B_D33

BG12

DDR_B_D32

BB3

DDR_B_D31

AW1

DDR_B_D30

BC2

DDR_B_D29

AW3

DDR_B_D28

AV3

DDR_B_D27

BC1

DDR_B_D26

AV2

DDR_B_D25

BD2

DDR_B_D24

AV12

DDR_B_D23

AP13

DDR_B_D22

AV13

DDR_B_D21

AT10

DDR_B_D20

AP14

DDR_B_D19

AT16

DDR_B_D18

AP12

DDR_B_D17

AT14

DDR_B_D16

AV9

DDR_B_D15

AY4

DDR_B_D14

AT4

DDR_B_D13

AP7

DDR_B_D12

AV4

DDR_B_D11

AY6

DDR_B_D10

AT7

DDR_B_D9

AP6

DDR_B_D8

AP3

DDR_B_D7

AR1

DDR_B_D6

AK2

DDR_B_D5

AL1

DDR_B_D4

AR3

DDR_B_D3

AT2

DDR_B_D2

AL3

DDR_B_D1

AK3

DDR_B_D0

+DDRB_SOC_VREFCA

1

@

C1138
.1U_0402_16V7K

2

+DDRB_SOC_VREFDQ

1

@

C1137
.1U_0402_16V7K

2

DDR_B_D[0..63] <14>

DDR_B_DQS[0..7] <14>

DDR_B_DQS#[0..7] <14>

USOC1

QHAW@

S IC FH8066501715905 QHAW B1 1.36G FCBGA15 1380

SA00008GO10

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VLV-M SOC Memory DDR3L

VLV-M SOC Memory DDR3L

VLV-M SOC Memory DDR3L

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

1

5 55Wednesday, March 04, 2015

5 55Wednesday, March 04, 2015

5 55Wednesday, March 04, 2015

1.0

1.0

1.0

5

4

3

2

1

1

2

1 2
1 2

2

+1.8VALW

5

U61

1

P

NC

Y

2

A

G

NL17SZ07DFT2G_SC70-5

3

SA00004BV00

@

R1142 0_0402_5%@

+1.8VALW

5

U64

P

NC

4

Y

A

G

NL17SZ07DFT2G_SC70-5

3

SA00004BV00

V0.2 modify

12

R992
1K_0402_5%

DR@

V0.2 modify

R1008
20K_0402_5%

@

1 2

4

ENBKL

12

INVT_PWM_SOC

L2N7002LT1G_SOT23-3

GP_CAMERASB08
GP_CAMERASB09

ENBKL <34>

1 2

R11594.7K_0402_5%

1 2

R11614.7K_0402_5%

RP41

100K_0804_8P4R_5%

DDI2_HPD <26>

+1.8VALW

12

UMA@

R1046
10K_0402_5%

12

VGA@

R1045
10K_0402_5%

@

10K_0402_5%

SOC_DDI2_HPD#

INVT_PWM_SOC <24>

+1.8VALW

12

R637

13

D

Q79

G

S

DGPU_PRSNT#

UMA

DIS

2

H

L

DGPU_PRSNT#

ENBKL

INVT_PWM_SOC

DDI1_ENBKL
ENVDD
DDI1_PWM

*

N16S-GT GPIO

VGA_SELECT1

N16S-GT

N16V-GMHL

VGA_SELECT1

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

VLV-M SOC Display

VLV-M SOC Display

VLV-M SOC Display

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

+1.8VALW+1.8VALW

12

R1036
1K_0402_5%

SGT@

12

R1037
10K_0402_5%

VGM@

6 55Wednesday, March 04, 2015

6 55Wednesday, March 04, 2015

1

6 55Wednesday, March 04, 2015

+3VS

18
27
36
45

1.0

1.0

1.0

eDP

1.8V

1.8V

1.35V

1.8V

1.8V

1.8V

1.8V

1.8V

1.35V

1.8V

1.8V

1.8V

1.8V

DDI0

DDI1

DDI2

CHV_MCP_EDS

3 OF 13

1.8V

1.8V

1.24V

1.8V

SDMMC1

SDMMC2

1.8V/3.3V

1.8V/3.3V

SDMMC3

1.8V

1.8V

1.8V/3.3V

DDI1_ENBKL

M44

RSVD15

K44

RSVD12

K48

RSVD14

K47

RSVD13

MCSI_1_CLKP
MCSI_1_CLKN

MCSI_1_DP_0

MCSI_1_DN_0

MCSI_1_DP_1

MCSI_1_DN_1

MCSI_1_DP_2

MCSI_1_DN_2

MCSI and Camera interface

MCSI_1_DP_3

MCSI_1_DN_3

MCSI_2_CLKP
MCSI_2_CLKN

MCSI_2_DP_0

MCSI_2_DN_0

MCSI_2_DP_1

MCSI_2_DN_1

MCSI_COMP

GP_CAMERASB00
GP_CAMERASB01
GP_CAMERASB02
GP_CAMERASB03
GP_CAMERASB04
GP_CAMERASB05
GP_CAMERASB06
GP_CAMERASB07
GP_CAMERASB08

GP_CAMERASB09
GP_CAMERASB10
GP_CAMERASB11

SDMMC1_CLK

SDMMC1_CMD

SDMMC1_D0
SDMMC1_D1
SDMMC1_D2

SDMMC1_D3_CD_B

MMC1_D4_SD_W E

MMC1_RCLK

SDMMC1_RCOMP

SDMMC2_CLK

SDMMC2_CMD

SDMMC2_D0
SDMMC2_D1
SDMMC2_D2

SDMMC2_D3_CD_B

SDMMC3_CLK

SDMMC3_CMD

SDMMC3_CD_B

SDMMC3_D0
SDMMC3_D1
SDMMC3_D2
SDMMC3_D3

SDMMC3_1P8_EN

SDMMC3_PWR _EN_B

SDMMC3_RCOMP

T44
T45

Y47
Y48
V45
V47
V50
V48
T41
T42

P50
P48

P47
P45
M48
M47

T50

RSVD17

T48

RSVD16

P44

AB41
AB45
AB44
AC53
AB51
AB52
AA51
AB40
Y44

Y42
Y41
V40

M7
P6

M6
M4
P9
P7
T6
T7

MMC1_D5

T10

MMC1_D6

T12

MMC1_D7

T13
P13

K10
K9

M12
M10
K7
K6

F2
D2
K3

J1
J3
H3
G2

K2
L3
P12

Checklist R0.95 Page 194
RCOMP=80ohm_1% (not exist in ISPD)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

1 2

R1003 150_0402_1%

DGPU_PRSNT#
DGPU_PWR_EN1

DGPU_HOLD_RST#_SOC1.8V

VGA_SELECT1
VGA_SELECT2
VGA_SELECT3
GP_CAMERASB08

GP_CAMERASB09

TP_INT#

1 2

R970 100_0402_1%

MMC1_RCOMP If unused, terminate 100 ? ±1% resistor near to SoC.
Braswell PDG_0p95 P.200

EC_KBRST# <34>

DGPU_PWR_EN1 <38>
DGPU_HOLD_RST#_SOC1.8V <31>

TP_INT# <31>

G_INT_R <31>

EC_LID_OUT# <34>

VRAM RANK GPIO

VGA_SELECT2

Dual Rank

12

R969

80.6_0402_1%

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Single RankHL

Compal Secret Data

Compal Secret Data

Compal Secret Data

DDI1_PWM

+1.8VALW

VGA_SELECT2

Deciphered Date

Deciphered Date

Deciphered Date

DP to VGA

R641 10K_0402_5%@
R642 10K_0402_5%@

USOC1C

D D

HDMI_TX2+<25>
HDMI_TX2-<25>

HDMI_TX1+<25>
HDMI_TX1-<25>

HDMI_TX0+<25>

HDMI

C C

EDP_TXP0<24>
EDP_TXN0<24>

EDP_TXP1<24>
EDP_TXN1<24>

HDMI_TX0-<25>

HDMI_CLK+<25>
HDMI_CLK-<25>

HDMI_HPD#<25>

HDMI_DDCCLK<25>
HDMI_DDCDATA<25>

1 2

R968

402_0402_1%

DDI0_RCOMPP
DDI0_RCOMPN

eDP Panel

EDP_AUXP<24>

EDP_AUXN<24>

EDP_HPD#<31>

ENVDD<24>

SOC_DDI2_TXP0<26>
SOC_DDI2_TXN0<26>

SOC_DDI2_TXP1<26>
SOC_DDI2_TXN1<26>

1 2

R986

402_0402_1%

DDI1_ENBKL
DDI1_PWM
ENVDD
DDI1_RCOMPP
DDI1_RCOMPN

DP to CRT
Translater

B B

SOC_DDI2_AUXP<26>

SOC_DDI2_AUXN<26>

VGA GPIO reserve

VGA_SELECT3

H

L

VGA_SELECT3

A A

5

+1.8VALW

12

R1033
1K_0402_5%

@

R1035
20K_0402_5%

@

1 2

V0.2 modify

SOC_DDI2_HPD#

D50

DDI0_TXP_0

C51

DDI0_TXN_0

H49

DDI0_TXP_1

H50

DDI0_TXN_1

F53

DDI0_TXP_2

F52

DDI0_TXN_2

G53

DDI0_TXP_3

G52

DDI0_TXN_3

H47

DDI0_AUXP

H46

DDI0_AUXN

W51

HV_DDI0_HPD

Y51

HV_DDI0_DDC_SCL

Y52

HV_DDI0_DDC_SDA

V52

PANEL0_BKLTEN

V51

PANEL0_BKLTCTL

W53

PANEL0_VDDEN

F38

DDI0_PLLOBS_P

G38

DDI0_PLLOBS

J51

DDI1_TXP_0

H51

DDI1_TXN_0

K51

DDI1_TXP_1

K52

DDI1_TXN_1

L53

DDI1_TXP_2

L51

DDI1_TXN_2

M52

DDI1_TXP_3

M51

DDI1_TXN_3

M42

DDI1_AUXP

K42

DDI1_AUXN

R51

HV_DDI1_HPD

P51

PANEL1_BKLTEN

P52

PANEL1_BKLTCTL

R53

PANEL1_VDDEN

F47

DDI1_PLLOBS_P

F49

DDI1_PLLOBS

F40

DDI2_TXP_0

G40

DDI2_TXN_0

J40

DDI2_TXP_1

K40

DDI2_TXN_1

F42

DDI2_TXP_2

G42

DDI2_TXN_2

D44

DDI2_TXP_3

F44

DDI2_TXN_3

D48

DDI2_AUXP

C49

DDI2_AUXN

U51

HV_DDI2_HPD

T51

HV_DDI2_DDC_SCL

T52

HV_DDI2_DDC_SDA

B53

RSVD6

A52

RSVD3

E52

RSVD9

D52

RSVD8

B50

RSVD5

B49

RSVD4

E53

RSVD10

C53

RSVD7

A51

RSVD2

A49

RSVD1

G44

RSVD11

BSW-MCP-EDS_FCB GA1170

4

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

1.35V

NC's

5

4

3

2

1

Follow DVR1044_ACER_HSIO Mapping Design Guide_V1p0

D D

PCIe

1.05V

1.8V

1.05V

SPI

CHV_MCP_EDS

1.8V

4 OF 13

SATA_TXP0
SATA_TXN0
SATA_RXP0
SATA_RXN0

3.3V

SATA_TXP1
SATA_TXN1
SATA_RXP1
SATA_RXN1

SATA_LEDN

SATA_GP0

SATA

SATA_GP1

1.8V

SATA_GP2
SATA_GP3

SATA_OBSP
SATA_OBSN

FST_SPI_CLK

FST_SPI_CS0_B
FST_SPI_CS1_B
FST_SPI_CS2_B

FST_SPI_D0

FAST SPI

FST_SPI_D1
FST_SPI_D2

1.8V

FST_SPI_D3

MF_HDA_RSTB

MF_HDA_SDI1

MF_HDA_CLK

1.8V/

MF_HDA_SDI0

MF_HDA_SYNC

1.5V

MF_HDA_SDO

MF_HDA_DOCKENB

MF_HDA_DOCKRSTB

AUDIO

1.8V

GP_SSP_2_CLK

GP_SSP_2_FS

1.8V

GP_SSP_2_TXD

GP_SSP_2_RXD

SPKR

C31
B30
N28
M28
C29
A29
J28
K28

AH3
AH2
AG3
AG1

DEVSLP0_SOC

AF3

DEVSLP1_SOC

N30

SATA_RCOMPP

M30

SATA_RCOMPN

W3

SOC_SPI_CLK

V4

SOC_SPI_CS0#

V6

SOC_SPI_CS1#

V7

V2

SOC_SPI_MOSI

V3

SOC_SPI_MISO

U1

SOC_SPI_WP#

U3

SOC_SPI_HOLD#

AF13

HDA_RST#

AD6
AD9

HDA_BIT_CLK

AD7

HDA_SDIN0

AF12

HDA_SYNC

AF14

HDA_SDOUT

AB9
AB7

H4

SOC_SPKR

AK9
AK10
AK12
AK13

SATA_PTX_DRX_P0 <32>
SATA_PTX_DRX_N0 <32>
SATA_PRX_DTX_P0 <32>
SATA_PRX_DTX_N0 <32>
SATA_PTX_DRX_P1 <32>
SATA_PTX_DRX_N1 <32>
SATA_PRX_DTX_P1 <32>
SATA_PRX_DTX_N1 <32>

1 2

R639 10K_0402_5%@

@

T188

@

T192

12

R972

402_0402_1%

T193@

@

T189

HDA_SDIN0 <36>

@

T191

SOC_SPKR <36>

HDD

ODD

Checklist P.24 requset

+1.8VS

TS_INT_R# <31>

VGA_CLKREQ#
PCIE_CLKREQ_1#
WLAN_CLKREQ#
LAN_CLKREQ#

HDA_SYNC
HDA_SDOUT
HDA_BIT_CLK
HDA_RST#

RP40

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RP55

1 8
2 7
3 6
4 5

75_0804_8P4R_1%

+1.8VALW

HDA_SYNC_AUDIO <36>
HDA_SDOUT_AUDIO <36>
HDA_BITCLK_AUDIO <36>
HDA_RST_AUDIO# <36>

USOC1D

1 2

PEG_HTX_C_GRX_P0<15>
PEG_HTX_C_GRX_N0<15>

dGPU

WLAN

PCIE LAN

C C

PEG_GTX_C_HRX_P0<15>
PEG_GTX_C_HRX_N0<15>

PEG_HTX_C_GRX_P1<15>
PEG_HTX_C_GRX_N1<15>
PEG_GTX_C_HRX_P1<15>
PEG_GTX_C_HRX_N1<15>

PCIE_PTX_C_DRX_P2<30>
PCIE_PTX_C_DRX_N2<30>

PCIE_PRX_DTX_P2<30>
PCIE_PRX_DTX_N2<30>

PCIE_PTX_C_DRX_P3<28>
PCIE_PTX_C_DRX_N3<28>

PCIE_PRX_DTX_P3<28>
PCIE_PRX_DTX_N3<28>

dGPU

WLAN

1 2

CLK_DIFF_P_4

@

R991 402_0402_ 1%

B B

+BIOS_SPI

1 2

R999 3.3K_0402_5%

1 2

R1001 20K_0402_5%

1 2

R1000 20K_0402_5%

CLK_DIFF_N_4

Checklist suggest PU 100K
Follow VC(V0.1)

SPI_CS0#

SPI_WP#

SPI_HOLD#

LAN

CC17 .1U_0402_16V7KVGA@

1 2

CC21 .1U_0402_16V7KVGA@

1 2

CC18 .1U_0402_16V7KVGA@

1 2

CC19 .1U_0402_16V7KVGA@

1 2

C1135 .1U_0402_16V7K

1 2

C1000 .1U_0402_16V7K

1 2

C1133 .1U_0402_16V7K

1 2

C1134 .1U_0402_16V7K

VGA_CLKREQ#<31>

WLAN_CLKREQ#<30>

LAN_CLKREQ#<28>

CLK_PEG_VGA<15>

CLK_PEG_VGA#<15>

CLK_PCIE_WLAN<30>
CLK_PCIE_WLAN#<30>
CLK_PCIE_LAN<28>
CLK_PCIE_LAN#<28>

1 2

R998 0_040 2_5%@

C1013 .1U_0402_16V7K

12

R975

402_0402_1%

+1.8VALW+BIOS_SPI

PEG_HTX_GRX_P0

PEG_HTX_GRX_N0
PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_N0

PEG_HTX_GRX_P1

PEG_HTX_GRX_N1
PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_N1

PCIE_PTX_DRX_P2
PCIE_PTX_DRX_N2
PCIE_PRX_DTX_P2
PCIE_PRX_DTX_N2

PCIE_PTX_DRX_P3
PCIE_PTX_DRX_N3
PCIE_PRX_DTX_P3
PCIE_PRX_DTX_N3

VGA_CLKREQ#

PCIE_CLKREQ_1#

WLAN_CLKREQ#

LAN_CLKREQ#

CLK_DIFF_P_4
CLK_DIFF_N_4

12

PCIE_RCOMPP
PCIE_RCOMPN

C24

PCIE_TXP0

B24

PCIE_TXN0

G20

PCIE_RXP0

J20

PCIE_RXN0

A25

PCIE_TXP1

C25

PCIE_TXN1

D20

PCIE_RXP1

F20

PCIE_RXN1

B26

PCIE_TXP2

C26

PCIE_TXN2

D22

PCIE_RXP2

F22

PCIE_RXN2

A27

PCIE_TXP3

C27

PCIE_TXN3

G24

PCIE_RXP3

J24

PCIE_RXN3

AM10

PCIE_CLKREQ0B

AM12

PCIE_CLKREQ1B

AK14

PCIE_CLKREQ2B

AM14

PCIE_CLKREQ3B

A21

CLK_DIFF_P_0

C21

CLK_DIFF_N_0

C19

CLK_DIFF_P_1

B20

CLK_DIFF_N_1

C18

CLK_DIFF_P_2

B18

CLK_DIFF_N_2

C17

CLK_DIFF_P_3

A17

CLK_DIFF_N_3

C16

CLK_DIFF_P_4

B16

CLK_DIFF_N_4

D26

PCIE_OBSP

F26

PCIE_OBSN

V14

SPI1_CLK

Y13

SPI1_CS0_B

Y12

SPI1_CS1_B

V13

SPI1_MISO

V12

SPI1_MOSI

BSW-MCP-EDS_FCB GA1170

From CPU

SOC_SPI_WP# SPI_WP#

SOC_SPI_HOLD# SPI_HOLD#
SOC_SPI_MOSI
SOC_SPI_MISO

A A

SOC_SPI_CLK

1 2

R2581 33_0402_5%

1 2

R2580 10_0402_5%

4 5
3 6
2 7
1 8

SPI_CS0#SOC_SPI_CS0#

EMC@

EMC@

RP37

SPI_MOSI
SPI_MISO
SPI_CLK

10_0804_8P4R_5%

EMC@

SPI ROM ( 8MByte ) 1.8V

SPI_CS0#
SPI_MISO
SPI_WP#

U56

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND

W25Q64DWSSIG_SO8

U56 change to SA00006ZV10 for Quad-I/O

VCC

HOLD#(IO3)

DI(IO0)

CLK

8
7
6
5

+BIOS_SPI

SPI_HOLD#
SPI_CLK
SPI_MOSI

Reserve for EMI(Near SPI ROM)

SPI_CLK

5

1 2

@EMC@

R1002

33_0402_5%

4

@EMC@

10P_0402_50V8J

12

C1014

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Compal Electronics, Inc.

VLV-M SOC SATA/PCI-E/HDA

VLV-M SOC SATA/PCI-E/HDA

VLV-M SOC SATA/PCI-E/HDA

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

1

7 55Wednesday, March 04, 2015

7 55Wednesday, March 04, 2015

7 55Wednesday, March 04, 2015

1.0

1.0

1.0

5

1 2

XTAL_19.2M_IN XTAL_19.2M_OUT

R1004 200K_0402_5%

15P_0402_50V8J

D D

Y7

1

1

12

C1005

2

GND

19.2MHZ_10PF_7M19200019

Change P/N to SJ10000N700

19.2MHz_12pF

1 2

R984 2.49K_0402_1%

1 2

R985 49.9_0402_1%

49.9_1% for RCO MP

2.49K_1% for IC OMP

+1.8VALW

R1175

4.7K_0402_5%

1 2
1 2

R1176

4.7K_0402_5%

3

GND

DDI0_ENABLE
DDI1_ENABLE

3

12

4

ICLK_ICOMP
ICLK_RCOMP

V0.2 modify

C1023

15P_0402_50V8J

V1.0 modify

EC_SCI#<34>

V0.2 modify

C C

+1.8VALW

1 2

R1016 20K_0402_5%@

1 2

R1022 20K_0402_5%@

SOC_GPIO_SUS4:
BIOS Boot Selection
0 = LPC
1 = SPI (internal PU)

+1.8VALW

1 2

R977 100K_0402_5%

1 2

R981 4.7K_0402_1%

R1040 10K_0402_5%@

SOC_GPIO_SUS6:
Halt Boot Strap:
1= Normal Operation

B B

1 2

V1.0 modify

V0.2 modify

BIOS/EFI Top Swap

SOC_GPIO_SUS2

SOC_GPIO_SUS2: Top Swap( A16 Override )
0 = Change Boot Loader address
1 = Normal Operation
Reference checklist 0.92 P.37

A A

+1.8VALW

12

R1006
10K_0402_5%

12

@

R1011
10K_0402_5%

5

SOC_GPIO_DFX5
SOC_GPIO_DFX6

SOC_GPIO_SUS4

SOC_GPIO_SUS6

SOC_GPIO_SUS9

SOC_GPIO_SUS5:
Security Flash Descriptors
0 = Override
1 = Normal Operation (Internal PU)

R978

10K_0402_5%

SOC_GPIO_SUS5

+RTCBATT

1

W=20mils

4

XTAL_19.2M_IN
XTAL_19.2M_OUT

ICLK_ICOMP
ICLK_RCOMP

SOC_GPIO_DFX5
SOC_GPIO_DFX6

DDI0_ENABLE
DDI1_ENABLE
SOC_GPIO_SUS2

@

SOC_GPIO_SUS4
SOC_GPIO_SUS5

SOC_GPIO_SUS9
SOC_GPIO_SUS8

GPIO_RCOMP

12

R995
100_0402_1%

1 2

R1048

4.7K_0402_5%

R959
0_0402_5%

1 2

EC_SCI# SOC_GPIO_SUS6

EC_SMI#<34>

SOC_GPIO_SUS8:
ICLK, USB 2.0,
DDI SFR supply
select :
0 = Supply is 1.25V
1 = Supply is 1.35V

SOC_GPIO_SUS8

V0.2 modify

+1.8VALW

12

EC programing :
"High"for Flash BIOS

@

R1051
0_0402_5%

2

4

V1.0 modify

W=20mils

+RTCVCC

1

C151
.1U_0402_16V7K

2

TXE_DBG <34>

1 2

13

D

G

Q62

S

L2N7002LT1G_SOT23-3

+CHGRTC

D22

2

W=10mil

3

BAS40-04_SOT23-3

USOC1E

P24

OSCIN

M22

OSCOUT

J26

RSVD13

N26

RSVD17

P20

ICLKICOMP

N20

ICLKRCOMP

P26

RSVD18

K26

RSVD14

M26

RSVD16

AH45

RSVD1

A9

MF_PLT_CLK0

C9

MF_PLT_CLK1

B8

MF_PLT_CLK2

B7

MF_PLT_CLK3

B5

MF_PLT_CLK4

B4

MF_PLT_CLK5

AM40

GPIO_DFX0

AM41

GPIO_DFX1

AM44

GPIO_DFX2

AM45

GPIO_DFX3

AM47

GPIO_DFX4

AK48

GPIO_DFX5

AM48

GPIO_DFX6

AK41

GPIO_DFX7

AK42

GPIO_DFX8

AD51

GPIO_SUS0

AD52

GPIO_SUS1

AH50

GPIO_SUS2

AH48

GPIO_SUS3

AH51

GPIO_SUS4

AH52

GPIO_SUS5

AG51

GPIO_SUS6

AG53

GPIO_SUS7

AF52

SEC_GPIO_SUS9

AF51

SEC_GPIO_SUS8

AE51

SEC_GPIO_SUS10

AC51

SEC_GPIO_SUS11

AH40

GPIO0_RCOMP

Y3

GPIO_ALERT

BSW-MCP-EDS_FCB GA1170

3

CHV_MCP_EDS

1.05V

iCLK

1.8V

PLTFM CLK's

1.8V

GPIO_DFX

1.8V

GPIO_SUS

5 OF 13

+1.8VALW

+TS_PWR

For Touch Pad

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

RESERVED

I2C

1.8V

I2C_NFC_SCL

I2C_NFC_SDA

MF_SMB_CLK

SMBUS

MF_SMB_DATA

1.8V

MF_SMB_ALERTB

For Touch Screen

+3VALW

Spec & CRB is reserve. VC pop (v0.1)

V0.2 modify

Spec & CRB is reserve. VC pop (v0.1)

+1.8VALW

+3V_PTP

R11562.2K_0402_5%

+3VALW

+3VALW

+3VS

Issued Date

Issued Date

Issued Date

3

R11572.2K_0402_5%

V0.2 modify

V0.2 modify

C11

RSVD3

B10

RSVD2

F12

RSVD9

F10

RSVD8

D12

RSVD5

E8

RSVD7

C7

RSVD4

D6

RSVD6

J12

RSVD11

F7

RSVD10

J14

RSVD12

L13

RSVD15

AK6

I2C0_SCL

AH7

I2C0_SDA

AF6

I2C1_SCL

AH6

I2C1_SDA

AF9
AF7

AE4
AD2

AC1
AD3

AB2
AC3

AA1
AB3

AA3
Y2

AM6
AM7
AM9

SOC_I2C2_DATA

12

I2C2_SCL_PNL

R11472.2K_0402_5%

12

I2C2_SDA_PNL

R11502.2K_0402_5%

12

R11531K_0402_5% @

12

R11521K_0402_5% @

12

R25642.2K_0402_5%

12

R25632.2K_0402_5%

12

R25622.2K_0402_5%

12

R25612.2K_0402_5%

12

R25702.2K_0402_5%

12

R25692.2K_0402_5%

SOC_I2C2_CLK
SOC_I2C2_DATA

SOC_I2C5_CLK
SOC_I2C5_DATA

I2C_NFC_SCLEC_SMI#
I2C_NFC_SDA

PCU_SMB_CLK
PCU_SMB_DATA
PCU_SMB_ALERT#

SOC_I2C2_CLK

SOC_I2C2_CLK_L
SOC_I2C2_DATA_L

SOC_I2C5_DATA

SOC_I2C5_CLK

For BOM

SOC_I2C5_CLK_L
SOC_I2C5_DATA_L

PCU_SMB_CLK_L
PCU_SMB_DATA_L

DDR_SMB_CK
DDR_SMB_DA

Compal Secret Data

Compal Secret Data

Compal Secret Data

T213@
T214@

R1155 1K_0402_5%@
R1180 1K_0402_5%@
R1181 1K_0402_5%@

Deciphered Date

Deciphered Date

Deciphered Date

I2C2_SCL
I2C2_SDA

I2C3_SCL
I2C3_SDA

I2C4_SCL
I2C4_SDA

I2C5_SCL
I2C5_SDA

I2C6_SCL
I2C6_SDA

12

R11431K_0402_5% @

12

R11441K_0402_5% @

TSI@

TSI@

12

R25662.2K_0402_5% TSI@

12

R25652.2K_0402_5% TSI@

12

I2C5_SCL_TP

12

I2C5_SDA_TP

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2

12
12
12

V0.2 modify

Q2512A

TSI@

PJT138KA 2N SOT363-6

SB000016K00

SOC_I2C2_DATA

SOC_I2C5_CLK I2C5_SCL_TP

PJT138KA 2N SOT363-6

SB000016K00

SOC_I2C5_DATA

PCU_SMB_CLK

PJT138KA 2N SOT363-6

SB000016K00

PCU_SMB_DATA

TSI@

PJT138KA 2N SOT363-6

SB000016K00

5

SGD

Q2509A

Q2509B

PJT138KA 2N SOT363-6

SB000016K00

5

SGD

Q2502A

Q2502B

PJT138KA 2N SOT363-6

SB000016K00

2

+1.8VALW

+1.8VALW

5

34

34

2

G

S

34

2

G

S

2

G

61

S

D

SOC_I2C5_CLK_L

61

SOC_I2C5_DATA_L

D

PCU_SMB_CLK_L

61

PCU_SMB_DATA_L

D

SOC_I2C2_CLK_LSOC_I2C2_CLK

SOC_I2C2_DATA_L

SB000013K00

6 1

DMN63D8LDW-7_SOT363-6

SB000013K00

6 1

DMN63D8LDW-7_SOT363-6

SB000013K00

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

SGD

Q2512B

+1.8VALW

+1.8VALW +3VS

1

+TS_PWR

5

3 4

I2C2_SCL_PNL

SGD

Q2511A

TSI@

2

DMN63D8LDW-7_SOT363-6

G

SB000013K00

6 1

D

TSI@

DMN63D8LDW-7_SOT363-6

+3V_PTP

2

DMN63D8LDW-7_SOT363-6

G

SB000013K00

S

D

Q2508B

2

DMN63D8LDW-7_SOT363-6

G

SB000013K00

S

D

Q2507B

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

I2C2_SDA_PNL

S

Q2511B

5

3 4

SGD

Q2508A

I2C5_SDA_TP

5

3 4

SGD

Q2507A

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VLV-M SOC CLK/PMU/SPI

VLV-M SOC CLK/PMU/SPI

VLV-M SOC CLK/PMU/SPI

I2C2_SCL_PNL <24>

I2C2_SDA_PNL <24>

I2C5_SCL_TP <35>

I2C5_SDA_TP <35>

DDR_SMB_CK <13,14>

DDR_SMB_DA <13,14>

DDR<13,14>

V0.2 modify

1

1.0

1.0

8 55Wednesday, March 04, 2015

8 55Wednesday, March 04, 2015

8 55Wednesday, March 04, 2015

1.0

5

PCH_USB3_TX0_P<33>

GC6@

R1009
10K_0402_5%

GC6_FB_EN_R

PCH_USB3_TX0_N<33>
PCH_USB3_RX0_P<33>
PCH_USB3_RX0_N<33>

PCH_USB3_TX1_P<33>

PCH_USB3_TX1_N<33>
PCH_USB3_RX1_P<33>
PCH_USB3_RX1_N<33>

USB3 Port 0

USB3 Port 1

D D

TO DGPU

GPU_EVENT#<15>

GC6_FB_EN<15>

C C

+1.8VALW

RP52

4 5
3 6
2 7
1 8

51_0804_8P4R_5%

1 2

R989 51_0402_5%

1 2

R1026 51_0402_5%

GC6_FB_EN

NL17SZ07DFT2G_SC70-5

Refer PDG 0.92 Page 268

SOC_H_TDI
SOC_H_TDO
SOC_H_TMS
SOC_H_PREQ_BUF#

SOC_H_TCK
SOC_H_TRST#

GPU_EVENT#

SA00004BV00

GC6@

U2515

1

2

+3V_SOC

+1.8VALW

12

@

R1151
10K_0402_5%

5

P

NC

A

G

3

V1.0 modify

+1.8VALW

12

4

Y

V0.2 modify

LPC_CLK_EC<34>
LPC_CLK_TPM<35>
LPC_CLKRUN#<35>
LPC_FRAME#<34,35>

LPC_AD0<34,35>
LPC_AD1<34,35>
LPC_AD2<34,35>
LPC_AD3<34,35>

LPC-25MHz

ILB_RTC_X1

B B

ILB_RTC_X2

1 2

R994
10M_0402_5%

32.768KHZ_12.5PF_Q13FC135000040

1 2

Y8

12

C1009

15P_0402_50V8J

12

V0.2 modify

C1010

15P_0402_50V8J

H_PROCHOT#<15,34>

Y8 change P/N to SJ10000LV00 for ESR<50k ohm

+RTCVCC

R996

20K_0402_1%

C1012
1U_0402_6.3V6K

CLR_CMOS#RTC_TEST#

12

JCMOS1

0_0603_5%

12

12

12

Clear CMOS

@

Close to RAM do or

PMC_CORE_PWROK<34>

CLR_CMOS# <34>

PMC_ACIN

RTC_TEST#

RTC_RST#

C1011

1U_0402_6.3V6K

A A

RTC_RST#

12

@

V1.0 modify

J9

0_0603_5%

R997 20K_0402_1%

2

1

1

2

1 2

@

R10880_0402_5%

@

R10890_0402_5%

5

4

12

USB3_RCOMPP

R987

402_0402_1%

T208@

1 2
1 2

1 2

USB3_RCOMPN

SOC_H_TCK
SOC_H_TDI
SOC_H_TDO
SOC_H_TMS
SOC_H_TRST#

SOC_H_PRDY#
SOC_H_PREQ_BUF#

LPC_CLK_0

R10140_0402_5% @

LPC_CLK_1

R10170_0402_5% @

LPC_RCOMP

R1013100_0402_1%

SOC_SERIRQ

V1.0 modify

R1023
20K_0402_1%

+1.8VALW

1 2

Internal PD 2K

@EMC@

C1002

10P_0402_50V8J

ESD request 0926

PMC_CORE_PWROK

R983 2.2K_0402_5%

12

RB751V-40_SOD323-2

12

D40

V0.2 modify

4

USOC1F

B32

USB3_TXP0

C32

USB3_TXN0

F28

USB3_RXP0

D28

USB3_RXN0

A33

USB3_TXP1

C33

USB3_TXN1

F30

USB3_RXP1

D30

USB3_RXN1

C34

USB3_TXP2

B34

USB3_TXN2

G32

USB3_RXP2

J32

USB3_RXN2

C35

USB3_TXP3

A35

USB3_TXN3

G34

USB3_RXP3

J34

USB3_RXN3

D34

USB3_OBSP

F34

USB3_OBSN

C37

RSVD4

A37

RSVD1

F36

RSVD7

D36

RSVD6

M34

RSVD11

M32

RSVD10

C38

RSVD5

B38

RSVD2

G36

RSVD8

J36

RSVD9

N34

RSVD12

P34

RSVD13

BSW-MCP-EDS_FCB GA1170

USOC1G

AF42

TCK

AD47

TDI

AF40

TDO

AD48

TMS

AB48

TRST_B

AD45

CX_PRDY_B

AF41

CX_PREQ_B

M13

RSVD5

P2

MF_LPC_CLKOUT0

R3

MF_LPC_CLKOUT1

T3

LPC_CLKRUNB

P3

LPC_FRAMEB

M3

MF_LPC_AD0

M2

MF_LPC_AD1

N3

MF_LPC_AD2

N1

MF_LPC_AD3

T4

LPC_HVT_RCOMP

T2

ILB_SERIRQ

H5

PWM0

H7

PWM1

P28

RSVD6

P30

RSVD7

AF50

RSVD4

AF48

RSVD3

AF44

RSVD1

AF45

RSVD2

AD50

PROCHOT_B

2

BSW-MCP-EDS_FCB GA1170

1

+3VALW

5

1

NC

2

A

3

CHV_MCP_EDS

1.05V

USB3.0

1.24V

RESERVED

6 OF 13

CHV_MCP_EDS

1.8V

JTAG/ITP

LPC

3.3V/

1.8V

PWM

Reserved

1.8V

7 OF 13

+1.35V_SOC

12

R993
10K_0402_5%

U55

P

4

Y

G

NL17SZ07DFT2G_SC70-5

SA00004BV00

+1.8VALW

ACIN <34,41>

3

B48

USB_OTG_ID

USB_DP0

USB_DN0

USB_DP1

USB_DN1

USB_DP2

USB_DN2

USB_DP3

USB_DN3

1.8V

USB_DP4

USB_DN4

USB2.0

USB_OC1_B
USB_OC0_B

USB_VBUSSNS

USB_RCOMP

USB_HSIC_0_STROBE

USB_HSIC_0_DATA

HSICUART

USB_HSIC_1_STROBE

USB_HSIC_1_DATA
USB_HSIC_RCOMP

UART1_TXD

UART1_RXD
UART1_CTS_B
UART1_RTS_B

1.8V

UART2_TXD

UART2_RXD
UART2_CTS_B
UART2_RTS_B

BRTCX1_PAD
BRTCX2_PAD

BVCCRTC_EXTPAD

SRTCRST_B

RTC

COREPWROK

3.3V

SUSPWRDNAC K

SUS_STAT_B

PMU_SUSCLK
PMU_SLP_S4_B
PMU_SLP_S3_B

PMU

PMU_RESETBUTTON_B

PMU_PLTRST_B

1.8V

PMU_BATLOW_B

PMU_AC_PRESENT

PMU_SLP_S0IX_B

PMU_SLP_LAN_B

PMU_WAKE_B

PMU_PWRBTN_B

PMU_WAKE_LAN_ B

1.8V

SVID

SVID0_DATA

SVID0_ALERT_B

CORE_VCC0_SENSE
CORE_VSS0_SENSE
CORE_VCC1_SENSE

Voltage sense

CORE_VSS1_SENSE

DDI_VGG_SENSE
UNCORE_VSS_SENSE2
UNCORE_VSS_SENSE1

1.35V3.3V

DDR_CORE_PWROK <5>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

USB_OTG_ID

C42
B42

C43
B44

C41
A41

C45
A45

B40
C40

P16

USB_OC1#

P14

USB_OC0#

B46

USB2_OBSP

RSVD3

B47

USB_VBUSSNS

A48

USB2_RCOMP

M36
N36

K38

Change 45.3_1% for Intel request

M38
N38

HSIC_RCOMP

AD10

DBG_UART_TXD

AD12

DBG_UART_RXD

AD13

DBG_UART_CTS#

AD14

DBG_UART_RTS#

Y6

GPU_EVENT#

Y7
V9

GC6_FB_EN_R

V10

DGPU_PWR_EN2

M18

ILB_RTC_X1

K18

ILB_RTC_X2

F16

ILB_RTC_EXTPAD

D18

RTC_RST#

G16

PMC_CORE_PWROK

F18

RSMRST_B

RTEST_B

RSVD_VSS

SVID0_CLK

3

EC_RSMRST#

J16

RTC_TEST#

G18

AE3
D14

PMC_SUS_STAT#

C15

PMC_SUSCLK

C12

EC_SLP_S4#

B14

PMC_SLP_S3#

AF2

PMC_RSTBTN#

F14

PMC_PLTRST#

C14

PMC_BATLOW#

C13

PMC_ACIN

A13

PMC_SLP_S0#

B12
N16

PMC_PCIE_WAKE#

M16

PBTN_OUT#

P18

AD42
AD41
AD40

AG32

VCC0_SENSE

AJ32

VSS0_SENSE

AD29

VCC1_SENSE

AF27

VSS1_SENSE

AD24

VGG_SENSEP

AD22

VGG_SENSEN

AC27

VNN_SENSE

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

113_0402_1%

R1012 45.3_0402_1%

VR_SVID_CLK <47,48>

VR_SVID_ALERT# <47,48>

@

T190

USB20_P0 <33>
USB20_N0 <33>

USB20_P1 <33>
USB20_N1 <33>

USB20_P2 <24>
USB20_N2 <24>

USB20_P3 <24>
USB20_N3 <24>

USB20_P4 <31>
USB20_N4 <31>

R988

1 2

VR_SVID_DATA <47,48>

R1073 0_0402_5%@
R1074 0_0402_5%@
R1075 0_0402_5%@
R1076 0_0402_5%@

USB3.0 Port

USB3.0 Port

Camera

Touch screen

USB2.0 Hub

USB_OC1# <33>
USB_OC0# <33>

12

T209@
T211@ C1006 22P_0402_50V8J

C1008 .1U_0402_16V7K

1 2
1 2
1 2
1 2

1 2

R1032
0_0402_5%

DGPU_PWR_EN2 <38>

1 2

EC_RSMRST# <34>

R1052 10K_0402_5%

PMC_SUSPWRD NACK <34>

T212@

V1.0 modify

VCC_SENSE
VSS_SENSE

VGG_SENSEP
VGG_SENSEN

VNN_SENSE

1 2

R1077 100_0402_1%

1 2

R1078 100_0402_1%

1 2

R1019 100_0402_1%

1 2

R1020 100_0402_1%

1 2

R1031 100_0402_1%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

USB2_OBSP

V1.0 modify

12

T207@

T195@

2

+5VALW

R2057

40.2K_0402_1%

@

1 2

12

R2047

@

10K_0402_1%

1 2

EC_SLP_S4# <34>

PBTN_OUT# <34>

VCC_SENSE <47>

VSS_SENSE <47>
VGG_SENSEP <48>
VGG_SENSEN <48>
VNN_SENSE <44>

+SOC_VCC

+SOC_VGG

+1.05VALW

V0.2 modify

2

1K_0402_5%

PMC_PLTRST#

Sch. chelist PU 1k

@

R1015

49.9_0402_1%

V0.2 modify

SOC_SERIRQ EC_SERIRQ

PMC_SLP_S3#

.1U_0402_16V7K

For UART
debug

DBG_UART_TXD

DBG_UART_RXD

1

+1.8VALW

12

R2024

@

1.8V 3.3V

1

2

PMC_PCIE_WAKE#
PMC_BATLOW#
USB_OC0#
USB_OC1#

PMC_RSTBTN#

PMC_CORE_PWROK

DDR_CORE_PWROK

PMC_PLTRST#

EC_RSMRST#

LPC1P8V@

R1021 0_0402_5%

R1025 0_0402_5%@

1 2

R1042 0_0402_5%@

+1.8VALW

C1016

@

1 2

SOC_SERIRQ EC_SERIRQ

R1034

10K_0402_5%

@

PMC_SLP_S3#

1 2

Q83

@

MESS138W-G_SOT323-3

For BOM

+1.8VALW

2

VREF1

3

SCL1

SDA14SDA2

G3401A91G ADFN3X2 8P

SA00006YA00

R2583 0_0402_5%@
R2584 0_0402_5%@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3VS

5

U53

P

NC

4

Y

A

G

NL17SZ07DFT2G_SC70-5

3

SA00004BV00

RP39

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

1 2

R2025 1K_0402_5%

1 2

R485 100K_0402_5%

C1007 0.047U_0402_25V7K

C1158 .1U_0402_16V7K

1 2

R990 100K_0402_5%

C1155 22P_0402_50V8J

12

12

U71 LPC3V@

1

VCCA

VCCB

2

GND

3

A4

G2129TL1U_SC70-6

+1.8VALW

G

2

1

3

D

S

DBG_UART_TXD
DBG_UART_RXD

UART_TXD_NGFF
UART_RXD_NGFF

+3V_UART_LS

@

8

U2509

EN

VREF2

SCL2

GND

1

1 2
1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VLV-M SOC USB/LPC/SMBus

VLV-M SOC USB/LPC/SMBus

VLV-M SOC USB/LPC/SMBus

PLT_RST# Buffer

12

R982

4.7K_0402_5%

PLT_RST_BUF# <15,28,30,34,35>

+1.8VALW

@EMC@

1 2

EMC@

1 2

@EMC@

1 2

@EMC@

1 2

EC_SLP_S3#

+3VALW_EC

.1U_0402_16V7K

+1.8VALW
6
5

EO

4

B4

+3V_SOC

R1038

10K_0402_5%

@

1 2

EC_SLP_S3# <34>

V1.0 modify

1 2

R1189 1K_0402_5%

1 2

R1188 1K_0402_5%

200K_0402_5%

1

12
12

+3VS_WLAN

12

@

R2576

UART_TXD_NGFF <30>

UART_RXD_NGFF <30>

9 55Wednesday, March 04, 2015

9 55Wednesday, March 04, 2015

9 55Wednesday, March 04, 2015

R1183 2.2K_0402_5%@
R1160 2.2K_0402_5%@

7

6

5

EC_SERIRQ <34,35>

EC_SLP_S3#_1P8 <34>

V1.0 modify

C1017

@

1 2

+1.8VALW

+3VS_WLAN

1.0

1.0

1.0

5

D D

4

3

2

1

+SOC_VCC

6400mA

C C

+1.15VALW

CORE_V1P15_S0ix ­Back side : 1uF *4
Package edge : 1uF *2

B B

DDI_V1P15_S0ix ­Back side : 1uF *1
Package edge : 1uF *2

700mA

1 2

C1028 1U_0402_6.3V6K

1 2

C1029 1U_0402_6.3V6K

1 2

C1030 1U_0402_6.3V6K

1 2

C1031 1U_0402_6.3V6K

1 2

C1032 1U_0402_6.3V6K

1 2

C1033 1U_0402_6.3V6K

1 2

C1034 1U_0402_6.3V6K

1 2

C1035 1U_0402_6.3V6K

+SOC_VGG

11A

USOC1H

AF36

CORE_VCC1_S0IX3

AG33

CORE_VCC1_S0IX7

AG35

CORE_VCC1_S0IX8

AG36

CORE_VCC1_S0IX9

AG38

CORE_VCC1_S0IX10

AJ33

CORE_VCC1_S0IX14

AJ36

CORE_VCC1_S0IX15

AJ38

CORE_VCC1_S0IX16

AF30

CORE_VCC1_S0IX2

AG27

CORE_VCC1_S0IX4

AG29

CORE_VCC1_S0IX5

AG30

CORE_VCC1_S0IX6

AJ27

CORE_VCC1_S0IX11

AJ29

CORE_VCC1_S0IX12

AJ30

CORE_VCC1_S0IX13

AF29

CORE_VCC1_S0IX1

AD16

DDI_VGG_S0IX1

AD18

DDI_VGG_S0IX2

AD19

DDI_VGG_S0IX3

AF16

DDI_VGG_S0IX4

AF18

DDI_VGG_S0IX5

AF19

DDI_VGG_S0IX6

AF21

DDI_VGG_S0IX7

AF22

DDI_VGG_S0IX8

AJ19

DDI_VGG_S0IX15

AG16

DDI_VGG_S0IX9

AG18

DDI_VGG_S0IX10

AG19

DDI_VGG_S0IX11

AG21

DDI_VGG_S0IX12

AG22

DDI_VGG_S0IX13

AG24

DDI_VGG_S0IX14

AJ21

DDI_VGG_S0IX16

AJ22

DDI_VGG_S0IX17

AJ24

DDI_VGG_S0IX18

AK24

DDI_VGG_S0IX19

AK30

CORE_V1P15_S0IX1

AK35

CORE_V1P15_S0IX2

AK36

CORE_V1P15_S0IX3

AM29

CORE_V1P15_S0IX4

AK33

FUSE_V1P15_S0IX2

AJ35

FUSE_V1P15_S0IX1

AM19

DDI_V1P15_S0IX2

AK21

DDI_V1P15_S0IX1

BSW-MCP-EDS_FCB GA1170

CHV_MCP_EDS

UNCORE_V1P15_S0IX6
UNCORE_V1P15_S0IX1
UNCORE_V1P15_S0IX2
UNCORE_V1P15_S0IX3
UNCORE_V1P15_S0IX4
UNCORE_V1P15_S0IX5
UNCORE_V1P15_S0IX7
UNCORE_V1P15_S0IX8
UNCORE_V1P15_S0IX9

UNCORE_V1P15_S0IX10

USBSSIC_V1P05A_G3

8 OF 13

UNCORE_VNN_S41
UNCORE_VNN_S42
UNCORE_VNN_S43
UNCORE_VNN_S44
UNCORE_VNN_S45
UNCORE_VNN_S46
UNCORE_VNN_S47
UNCORE_VNN_S48

UNCORE_VNN_S49
UNCORE_VNN_S410
UNCORE_VNN_S411
UNCORE_VNN_S412
UNCORE_VNN_S413
UNCORE_VNN_S414

RSVD1

ICLK_GND_OFF2

iCLKDDRPCIeSATAUSBFUSE

ICLK_GND_OFF1

DDR_V1P05A_G31
DDR_V1P05A_G34
DDR_V1P05A_G32
DDR_V1P05A_G35
DDR_V1P05A_G36
DDR_V1P05A_G33

PCIE_V1P05A_G31
PCIE_V1P05A_G32

SATA_V1P05A_G32

SATA_V1P05A_G31

USB3_V1P05A_G32

USB3_V1P05A_G31

FUSE3_V1P05A_G5

FUSE_V1P05A_G3

AA18
AA19
AA21
AA22
AA24
AA25
AC18
AC19
AC21
AC22
AC24
AC25
AD25
AD27

AA30
V33
AA32
AA33
AA35
AA36
AC32
Y30
Y32
Y33
Y35

V19

+1.05VALW_ICLK_GND_OFF

V18

AM21
AM33
AM22
AN22
AN32
AM32

V22
V24

U24
U22

V27
U27
V29

N18
U19

3.5A (can merge with V1P05A)

1900mA

1 2

C1042 1U_0402_6.3V6K

1 2

C1043 1U_0402_6.3V6K

1 2

C1044 1U_0402_6.3V6K

1 2

C1050 1U_0402_6.3V6K

1 2

C1049 1U_0402_6.3V6K

1 2

R1178 0_0805_5%@

1 2

C1059 1U_0402_6.3V6K

1 2

C1109 1U_0402_6.3V6K@

1 2

C1080 22U_0603_6.3V6M

1 2

C1054 22U_0603_6.3V6M

1 2

C1053 1U_0402_6.3V6K

1 2

C1055 1U_0402_6.3V6K

1 2

C1056 1U_0402_6.3V6K

1 2

C1057 1U_0402_6.3V6K

1 2

C1089 1U_0402_6.3V6K

1 2

C1090 1U_0402_6.3V6K

1 2

C1103 1U_0402_6.3V6K

1 2

C1104 1U_0402_6.3V6K

1 2

C1105 1U_0402_6.3V6K

+1.05VALW

V0.2 modify

+1.05VALW

Confirmd with Intel , these pin use +1.05V power

UNCORE_V1P15_S0 ix ­Back side : 1uF *3
Package edge : 1uF *2

+1.05VALW

ICLK_GND_OFF - Back side : 1uF *1

+1.05VALW

1900mA

DDR_V1P05A_G3 - Back side : 1u F *1
Package edge : 22uF *2

PCIE_V1P05A_G3 - Back side : 1 uF *1

SATA_V1P05A_G3 - Back side : 1uF *1

USB3_V1P05A_G3 - Back side : 1uF *1

USBSSIC_V1P05A_ G3 - Back side : 1uF *1
Package ed ge : 1uF *1

FUSE_V1P05A_G5 - Package edge : 1uF *1

FUSE_V1P05A_G3 - Back side : 1uF *2

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VLV-M SOC Power

VLV-M SOC Power

VLV-M SOC Power

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

1

10 55W ednesday, March 04, 2015

10 55W ednesday, March 04, 2015

10 55W ednesday, March 04, 2015

1.0

1.0

1.0

5

(pin_AN27)DDR_V DDQ_G_S4 ­Back side : 1uF *1

+1.35V_SOC

1 2

R1158 0_0805_5%@

1U_0402_6.3V6K

+1.35V_SOC

D D

C C

1 2

R1177 0_0805_5%@

1U_0402_6.3V6K

@EMC@

HCB2012KF-121T50_2P

@EMC@

HCB2012KF-121T50_2P

@EMC@

HCB2012KF-121T50_2P

JP3

JUMP_43X118

JP4

JUMP_43X118

JP3,JP4 short

DDR_VDDQ_G_S4 -
Package edge : 22uF *4

GPIO_V1P8A_G3 -
pin_Y18 - Back side*1
other pin - Pac kage edge*2

JP@

JP@

1

C1107

@

2

1

C1108

@

2

+1.35V_SOC+1.35V

L61

12

L62

12

L63

12

1900mA

V0.2 modify

LPC1P8V@

1 2

+1.8VALW

+3V_SOC

B B

R1207 0_0603_5%

1 2

R1208 0_0603_5%LPC3V@

pin_G1 - Back s ide : 1uF *1

Package edge : 22uF *1

+1.35V_DDRSFR_VDDQ

+1.35V_DDR_VDDQ

148mA

1 2

C1075 22U_0603_6.3V6M

1 2

C1051 1U_0402_6.3V6K

1 2

C1079 22U_0603_6.3V6M

1 2

C1052 1U_0402_6.3V6K

(pin_AM25)DDRSF R_VDDQ_G_S4 ­Back side : 1uF *1
Package edge : 22uF *1

1 2

C1069 22U_0603_6.3V6M

1 2

C1071 22U_0603_6.3V6M

1 2

C1072 22U_0603_6.3V6M

1 2

C1074 22U_0603_6.3V6M

@

+1.8VALW

550mA

+VDD_LPC

1 2

C1091 1U_0402_6.3V6K

1 2

C1092 1U_0402_6.3V6K

1 2

C1093 1U_0402_6.3V6K

1 2

C1094 1U_0402_6.3V6K

1 2

C1095 1U_0402_6.3V6K

C1097

1U_0402_6.3V6K

1

2

+VDD_SD3

+VDD_LPC

+VDD_AUDIO

+1.8VS

+1.8VALW

UNCORE_V1P8A_G3 - Back side : 1uF *1SDIO_V3P3A_V1P8 A_G3 -

V0.2 modify

R1210 0_0603_5%@

R1211

1 2

1 2

4

USOC1I

AN27

DDRSFR_VDDQ_G_S4

AM25

DDR_VDDQ_G_S42

BE1

DDR_VDDQ_G_S416

BE53

DDR_VDDQ_G_S419

BJ2

DDR_VDDQ_G_S426

BJ3

DDR_VDDQ_G_S427

BJ49

DDR_VDDQ_G_S428

BJ5

DDR_VDDQ_G_S429

BH50

DDR_VDDQ_G_S425

BH5

DDR_VDDQ_G_S424

BH49

DDR_VDDQ_G_S423

BH4

DDR_VDDQ_G_S422

BE3

DDR_VDDQ_G_S417

BG51

DDR_VDDQ_G_S421

BG3

DDR_VDDQ_G_S420

BJ51

DDR_VDDQ_G_S430

BJ52

DDR_VDDQ_G_S431

AY10

DDR_VDDQ_G_S414

AY44

DDR_VDDQ_G_S415

AV44

DDR_VDDQ_G_S413

AV10

DDR_VDDQ_G_S410

BE51

DDR_VDDQ_G_S418

AV38

DDR_VDDQ_G_S412

AV16

DDR_VDDQ_G_S411

AU36

DDR_VDDQ_G_S49

AU18

DDR_VDDQ_G_S48

AN36

DDR_VDDQ_G_S47

AN35

DDR_VDDQ_G_S46

AN19

DDR_VDDQ_G_S45

AN18

DDR_VDDQ_G_S44

AM36

DDR_VDDQ_G_S43

AM18

DDR_VDDQ_G_S41

E1

SDIO_V3P3A_V1P8A_G31

E2

SDIO_V3P3A_V1P8A_G32

G1

SDIO_V3P3A_V1P8A_G33

AH4

UNCORE_V1P8A_G32

AF4

UNCORE_V1P8A_G31

Y18

GPIO_V1P8A_G35

AD33

GPIO_V1P8A_G31

AK18

GPIO_V1P8A_G33

AF33

GPIO_V1P8A_G32

AK19

GPIO_V1P8A_G34

BSW-MCP-EDS_FCB GA1170

0_0603_5%@

+VDD_AUDIO

1U_0402_6.3V6K

1

2

CHV_MCP_EDS

DDI_VDDQ_G31
DDI_VDDQ_G32

MIPI_V1P2A_G32
MIPI_V1P2A_G31

ICLK_VSFR_G32
ICLK_VSFR_G31

CORE_VSFR_G35

DDR

9 OF 13

C1096

CORE_VSFR_G36

PCIE_V1P05A_G31

CORE_VSFR_G34
CORE_VSFR_G32
CORE_VSFR_G33
CORE_VSFR_G31

USBHSIC_V1P2A_G3

USB_VDDQ_G32
USB_VDDQ_G33

USBRTCFUSE

USB_VDDQ_G31

USBSSIC_V1P2A_G3

USB_V1P8A_G3

USB_V3P3A_G32
USB_V3P3A_G31

RTC_V3P3RTC_G52
RTC_V3P3RTC_G51

RTC_V3P3A_G51
RTC_V3P3A_G52

FUSE_V1P8A_G3

FUSE1_V1P05A_G4
FUSE0_V1P05A_G3

RSVD_VSS

+1.8VALW

SDIO_V3P3A_V1P8 A_G3 ­pin_E1,E2 - Bac k side : 1uF *2

3

550mA

V36

V1.0 modify

Y36

RSVD1
RSVD2

T40
P40

Y27
Y25

P38
V30
AC30

AF35
AD35
AD38
AC36

M41
U35
V35
H44
P41

AA29

C23
B22

C5
B6
D4
E3

U16

H10
G10
A3
K20
M20

+1.24V_SOC

+1.24VALW_ICLK

V1.0 modify

+1.24V_SOC

+1.24VALW_USBVDDQ

+1.05VALW

C1106

1U_0402_6.3V6K

1

2

1

2

+1.8VALW

C1102

1U_0402_6.3V6K

Confirm with VC Team already(V0.1)

R1218

1 2

0_0603_5%@

+VDD_SD3

C1098

1U_0402_6.3V6K

C1099

1U_0402_6.3V6K

@

1

1

2

2

+1.24VALW

1 2

C1058 1U_0402_6.3V6K

@

1 2

C1085 1U_0402_6.3V6K

@

1 2

C1086 1U_0402_6.3V6K

1 2

C1047 1U_0402_6.3V6K

1 2

C1048 1U_0402_6.3V6K

1 2

C1046 1U_0402_6.3V6K

@

1 2

C1087 1U_0402_6.3V6K

1 2

C1061 1U_0402_6.3V6K

1 2

C1062 1U_0402_6.3V6K

@

1 2

C1088 1U_0402_6.3V6K

+3V_SOC

C1101

1U_0402_6.3V6K

1

2

@

1

2

2

DDI_VDDQ_G3 - B ack side : 1uF *1

MIPI_V1P24A_G3 - Back side : 1 uF *1
Package edge : 1uF *1

CORE_VSFR_G3 - Back side : 1uF *2

CORE_VSFR_G3 - Back side : 1uF *1

USBHSIC_V1P24A_ G3 - Back side : 1uF *1

USB_VDDQ_G3 - p in_U35,V35 - Ba ck side : 1uF *2

USBSSIC_1P24A_G 3 - Package ed ge : 1uF *1

+1.8VALW

C1082

1U_0402_6.3V6K

C1083

1U_0402_6.3V6K

1

1

+3V_SOC

C1084

1U_0402_6.3V6K

1

+RTCVCC

C1100

1U_0402_6.3V6K

V1.0 modify

2

+1.24V_SOC

2

+1.24VALW

1 2

1 2

2

@

R1212
0_0603_5%

R1213
0_0603_5%

1

+1.24VALW_ICLK +1.24VALW

C1060

1U_0402_6.3V6K

R1179
0_0805_5%

1 2

@

V1.0 modify

1

1

2

C1110

@

1U_0402_6.3V6K

2

ICLK_VSFR_G3 - Back side : 1uF *1

+1.24VALW_USBVDDQ +1.24VALW

1 2

R1209 0_0805_5%@

1

C1081

1U_0402_6.3V6K

USB_V1P8A_G3 - Back side : 1uF *1
Package edge : 1uF *1

2

V1.0 modify

1

C1111

@

1U_0402_6.3V6K

2

USB_VDDQ_G3 -
pin_H44 - Back side : 1uF *1

USB_V3P3A_G3 - Package edge : 1uF *1

RTC_V3P3RTC_G5 - Package edge side : 1uF *1

RTC_V3P3A_G5 - Package edge si de : 1uF *1

FUSE_V1P8A_G3 - Back side : 1u F *1

FUSE_V1P05A_G4 - Package edge : 1uF *1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VLV-M SOC Power

VLV-M SOC Power

VLV-M SOC Power

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

1

11 55W ednesday, March 04, 2015

11 55W ednesday, March 04, 2015

11 55W ednesday, March 04, 2015

1.0

1.0

1.0

5

D D

4

3

ball_B52 :
if connect to GND , layout side need use 3mil-core and will cost up ,
so left NC pin_B52 (Intel CRB also left NC)

2

1

C C

B B

CHV_MCP_EDS

USOC1J

Power-VSS

AN3

VSS98

AN29

VSS97

AN25

VSS96

AN24

VSS95

AN16

VSS94

AN14

VSS93

AN12

VSS92

AN11

VSS91

AN1

VSS90

AM50

VSS89

AM42

VSS88

AM4

VSS87

AM38

VSS86

AM35

VSS85

AH44

VSS60

AM30

VSS84

AM27

VSS83

U25

VSS100

P10

VSS99

AM16

VSS81

AD4

VSS31

AK7

VSS80

AK50

VSS79

AK47

VSS78

AK45

VSS77

AK44

VSS76

AK40

VSS75

AK4

VSS74

AK38

VSS73

AK32

VSS72

AK27

VSS71

AK25

VSS70

AM24

VSS82

AK16

VSS69

AJ53

VSS68

AJ51

VSS67

AJ3

VSS66

AJ25

VSS65

AJ16

VSS64

AJ1

VSS63

AH9

VSS62

AH47

VSS61

AH42

VSS59

AH41

VSS58

AH14

VSS57

AH13

VSS56

AH12

VSS55

AH10

VSS54

AG25

VSS53

AF47

VSS52

10 OF 13

BSW-MCP-EDS_FCB GA1170

VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS30
VSS23
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1

AF38
AF32
AF25
AF10
AE9
AE8
AE6
AE53
AE50
AE48
AE46
AE45
AE43
AE42
AE40
AE14
AE12
AE11
AE1
AD44
AD36
AC29
AD32
AD30
AD21
AC38
AC35
AC33
AC16
AB6
AB50
AB47
AB42
AB4
AB14
AB13
AB12
AB10
AA53
AA38
AA27
AA16
A47
A43
A39
A31
A23
A19
A15
A11

CHV_MCP_EDS

USOC1K

AN21
BG30
BG27
BG24
BG20
BG19
BG18
BG16
BG14
BF42
BF32
BF28
BF27
BF26
BF22
BF12
BE35
BE19

BD53

BD35
BD27
BD19

BC44
BC40
BC38
BC28
BC26
BC16
BC14
BC10
BB35
BB27
BB19
BA35
BA30
BA27
BA24
BA19

AY51
AY47
AY34
AY32
AY30

AN30
AY45

Power-VSS

VSS5
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85

C20

VSS103
VSS84

BG7

VSS102
VSS83
VSS82
VSS81

BD1

VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64

B36

VSS63

B28

VSS62

AY7

VSS60
VSS59
VSS58
VSS56
VSS55
VSS54

AY3

VSS53
VSS6
VSS57

11 OF 13

BSW-MCP-EDS_FCB GA1170

VSS61
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45

VSS4
VSS3

VSS2
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38

VSS1
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9

VSS8

VSS7

AY9
AY28
AY26
AY24
AY22
AY20
AW35
AW27
AW19
AM13
AK29
AK22
AV40
AV35
AV30
AV27
AV24
AV19
AV14
AJ18
AU53
AU51
AU3
AU1
AT9
AT51
AT45
AT36
AT35
AT3
AT27
AT19
AT18
AP9
AP50
AP45
AP4
AN9
AN8
AN6
AN53
AN51
AN5
AN49
AN48
AN46
AN45
AN43
AN42
AN40
AN38

CHV_MCP_EDS

USOC1L

AN33

AF24

AW13

Power-VSS

VSS2

P32

VSS99

P27

VSS98

P22

VSS97

P19

VSS96
VSS1

N53

VSS95

N51

VSS94

N32

VSS93

N24

VSS92

N22

VSS91

M9

VSS90

K45

VSS77

M40

VSS87

M35

VSS86

M27

VSS85
VSS3

M19

VSS84

M14

VSS83

L35

VSS82

L27

VSS81

L19

VSS80

L1

VSS79

K50

VSS78

T47

VSS100

K4

VSS76

K36

VSS75

K34

VSS74

K32

VSS73

K30

VSS72

K24

VSS71

K22

VSS70

K16

VSS69

K14

VSS68

K12

VSS67

J53

VSS66

M45

VSS88

J38

VSS64

J35

VSS63

J30

VSS62

J27

VSS61

J22

VSS60

J19

VSS59

J18

VSS58

H8

VSS57

E46

VSS40

H35

VSS56

H27

VSS55

H19

VSS54

M50

VSS89

V25

VSS101

12 OF 13

BSW-MCP-EDS_FCB GA1170

VSS102

VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS65
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23

VSS4
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9

VSS8

VSS7

VSS6

VSS5

Y24
G30
G28
G26
G22
G14
G12
F5
F35
F32
F27
F24
F19
E51
E35
E19
D42
D40
D38
D32
D27
D24
D16
D10
J42
C47
C39
C36
C30
C3
C28
C22
AW41
BJ7
BJ47
BJ43
BJ39
BJ35
BJ31
BJ27
BJ23
BJ19
BJ15
BJ11
BG5
BG49
BG40
BG38
BG36
BG35
BG34

CHV_MCP_EDS

USOC1M

Power-VSS

F1

VSS18

C1

VSS17

BH53

VSS16

BH52

VSS15

BH2

VSS14

BH1

VSS13

BG53

VSS12

BG1

VSS10

B52

VSS5

B2

VSS4

A6

VSS2

A5

VSS1

M24

VSSA

A7

VSS3

BF50

VSS9

BF4

VSS8

BB50

VSS7

BB4

VSS6

BG47

VSS11

Y9

VSS70

Y50

VSS69

Y45

VSS68

Y40

VSS67

Y4

VSS66

Y38

VSS65

Y29

VSS64

Y22

VSS63

Y21

VSS62

Y19

VSS61

Y16

VSS60

Y14

VSS59

Y10

VSS58

P4

VSS22

L41

VSS19

P36

VSS21

13 OF 13

BSW-MCP-EDS_FCB GA1170

VSS57
VSS56
VSS55
VSS54
VSS53

VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37

VSS35
VSS34
VSS33
VSS32

VSS31
VSS30
VSS36
VSS29
VSS28
VSS27
VSS26
VSS23
VSS25
VSS24

VSS20

W1
V44
V42
V41
V38

V32
V21
V16
U9
U8
U6
U53
U5
U49
U48
U46
U45
U43
U42
U40
U38

U33
U32
U30
U29

U21
U18
U36
U14
U12
U11
T9
P42
T14
R1

P35

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/03/19 2015/03/18

2014/03/19 2015/03/18

2014/03/19 2015/03/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VLV-M SOC GND

VLV-M SOC GND

VLV-M SOC GND

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

1

12 55W ednesday, March 04, 2015

12 55W ednesday, March 04, 2015

12 55W ednesday, March 04, 2015

1.0

1.0

1.0

A

+DDR_A_VREF_DQ

1 1

All VREF traces should
have 10 mil trace width

DDR_A_CKE0<5>

DDR_A_BS2<5>

2 2

DDR_A_CLK0<5>
DDR_A_CLK0#<5>

DDR_A_BS0<5>

DDR_A_WE#<5>
DDR_A_CAS#<5>

DDR_A_CS1#<5>

3 3

Swap D4->D5,D5->D6,D6->D4

+3VS

+0.675VS

4 4

.1U_0402_16V7K

C125

1

2

B

+1.35V +1.35V

CONN@

JDIMM1

1

VREF_DQ

3

VSS

DDR_A_D0
DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D6

DDR_A_D12

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D23 DDR_A_D21
DDR_A_D18

DDR_A_D28
DDR_A_D30

DDR_A_DM3

DDR_A_D26
DDR_A_D24

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D56
DDR_A_D59

DDR_A_DM7

DDR_A_D62 DDR_A_D61
DDR_A_D60

@

R211

0_0402_5%

1 2

1 2

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

@

R212

0_0402_5%

BOSS1

LCN_DAN06-K4406-0100

Part Number = SP07000N300
LCN_DAN06-K4406-0100_204P

DQ4
DQ5

DQS0#

DQS0

DQ6
DQ7

DQ12
DQ13

DM1

RESET#

DQ14
DQ15

DQ20
DQ21

DM2

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

CKE1

VDD

VDD

VDD

VDD

VDD

CK1#

VDD

RAS#

VDD

ODT0

VDD

ODT1

VDD

VREF_CA

DQ36
DQ37

DM4

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

DM6

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

EVENT#

SDA

GND2

BOSS2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

CK1

BA1

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

SCL
VTT

2
4

DDR_A_D7

6

DDR_A_D3

8
10

DDR_A_DQS#0

12

DDR_A_DQS0

14
16
18

DDR_A_D4DDR_A_D5

20
22

DDR_A_D9DDR_A_D13

24

DDR_A_D8

26
28

DDR_A_DM1

30
32
34

DDR_A_D14DDR_A_D10

36

DDR_A_D15DDR_A_D11

38
40
42

DDR_A_D19

44
46

DDR_A_DM2

48
50

DDR_A_D20

52
54
56

DDR_A_D27

58

DDR_A_D25

60
62

DDR_A_DQS#3

64

DDR_A_DQS3

66
68

DDR_A_D29

70

DDR_A_D31

72

74
76
78

A15
A14

A11

A7

A6
A4

A2
A0

S0#

NC

DDR_A_MA15

80

DDR_A_MA14

82
84

DDR_A_MA11

86

DDR_A_MA7

88
90

DDR_A_MA6

92

DDR_A_MA4

94
96

DDR_A_MA2

98

DDR_A_MA0

100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130

DDR_A_D52

132

DDR_A_D53

134
136

DDR_A_DM6

138
140

DDR_A_D54

142

DDR_A_D55

144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4

DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D63
DDR_A_D58

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D57

+0.675VS

Channel A

C

DDR_A_RST# <5>

DDR_A_RST#DDR_A_D22 DDR_A_D16

DDR_A_CKE1 <5>

DDR_A_CLK1 <5 >
DDR_A_CLK1# < 5>

DDR_A_BS1 <5>
DDR_A_RAS# <5>

DDR_A_CS0# <5 >
DDR_A_ODT0 <5>

DDR_A_ODT1 <5>

+DDR_A_VREF_CA

DDR_SMB_DA <8,14>
DDR_SMB_CK <8,14>

DDR_A_DQS#[0..7] <5>

DDR_A_DQS[0..7] <5>

DDR_A_D[0..63] <5>

DDR_A_MA[0..15] <5>

DDR_A_DM[0..7] <5>

EMC@

1 2

C1077 .1U_0402_16V7K

ESD request 0211

For EMI request 2/5

V1.0 modify

+1.35V

C120 .1U_0402_16 V7KEMC@
C127 .1U_0402_16 V7KEMC@
C121 .1U_0402_16 V7KEMC@
C126 .1U_0402_16 V7KEMC@
C118 .1U_0402_16 V7KEMC@
C119 .1U_0402_16 V7KEMC@
C148 .1U_0402_16 V7KEMC@
C149 .1U_0402_16 V7KEMC@
C150 .1U_0402_16 V7KEMC@

V0.2 modify

D

Signal voltage level = 0.675 V
PLACE TWO 4.7K RESISTORS CLOSE TO
DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
Decoupling caps are needed; one 0.1 µF placed close to VREF pins of each DDR3 SODIMM.

+1.35V +DDR_A_VREF_DQ

1 2

R1027

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

4.7K_0402_1%

1 2

R1028

4.7K_0402_1%

+1.35V +DDR_A_VREF_CA

1 2

R1029

4.7K_0402_1%

1 2

R1030

4.7K_0402_1%

Layout Note:
Place near JDIMM1

+1.35V

1 2

C111 10U_06 03_6.3V6M

1 2

C112 10U_06 03_6.3V6M

1 2

C113 10U_06 03_6.3V6M

1 2

C114 10U_06 03_6.3V6M

1 2

C110 .1U_0402_16 V7K

1 2

C109 .1U_0402_16 V7K

1 2

C108 .1U_0402_16 V7K

1 2

C107 .1U_0402_16 V7K

1 2

C115 .1U_0402_16 V7K

1 2

C116 .1U_0402_16 V7K

1 2

C117 .1U_0402_16 V7K

+0.675VS

1 2

C123 10U_06 03_6.3V6M

1 2

C124 1U_040 2_6.3V6K

1 2

C122 1U_040 2_6.3V6K

Layout Note:
Place near JDIMM1.203,204

1

C1076
.1U_0402_16V7K

2

1

C1078
.1U_0402_16V7K

2

+1.35V

Follow KV_50

1

@

+

C185

330U_2.5V_M

2

SF000002Z00
330U 2.5V H4.2
17mohm OSCON

E

Security Classification

Security Classification

<Address: SA1:SA0=00 (A0H)>

DIMM_1 STD H:4mm

A

B

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2014/08/21 2015/08/21

2014/08/21 2015/08/21

2014/08/21 2015/08/21

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Compal Electronics, Inc.

DDR3L DIMMA

DDR3L DIMMA

DDR3L DIMMA

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

E

13 55W ednesday, March 04, 2015

13 55W ednesday, March 04, 2015

13 55W ednesday, March 04, 2015

1.0

1.0

1.0

A

+DDR_B_VREF_DQ

1 1

All VREF traces should
have 10 mil trace width

DDR_B_CKE0<5>

2 2

3 3

DDR_B_BS2<5>

DDR_B_CLK0<5>
DDR_B_CLK0#<5>

DDR_B_BS0<5>

DDR_B_WE#<5>
DDR_B_CAS#<5>

DDR_B_CS1#<5>

Swap D4->D5,D5->D6,D6->D4

+3VS

R229

10K_0402_5%

1 2

+3VS

+0.675VS

4 4

.1U_0402_16V7K

A

1

C147

2

SA0/SA1 Follow INTEL demo board

B

+1.35V +1.35V

CONN@

JDIMM2

1

VREF_DQ

3

VSS

DDR_B_D0
DDR_B_D1

DDR_B_DM0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D22
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D23

DDR_B_D28
DDR_B_D30

DDR_B_DM3

DDR_B_D24
DDR_B_D26

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

DDR_B_MA10

DDR_B_MA13

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D56
DDR_B_D59

DDR_B_DM7

DDR_B_D61
DDR_B_D57

R231
0_0402_5%

@

1 2

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

LCN_DAN06-K4406-0100

Part Number = SP07000N300
LCN_DAN06-K4406-0100_204P

<Address: SA0:SA1=10 (A2H)>

DIMM_2 STD H:4mm

B

DQ4
DQ5

DQS0#

DQS0

DQ6
DQ7

DQ12
DQ13

DM1

RESET#

DQ14
DQ15

DQ20
DQ21

DM2

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

CKE1

VDD

VDD

VDD

VDD

VDD

CK1#

VDD

RAS#

VDD

ODT0

VDD

ODT1

VDD

VREF_CA

DQ36
DQ37

DM4

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

DM6

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

EVENT#

SDA

GND2

BOSS2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

CK1

BA1

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

SCL
VTT

C

2
4

DDR_B_D4

6

DDR_B_D5

8
10

DDR_B_DQS#0

12

DDR_B_DQS0

14
16

DDR_B_D6

18

DDR_B_D7

20
22

DDR_B_D12

24

DDR_B_D13

26
28

DDR_B_DM1

30
32
34

DDR_B_D14

36

DDR_B_D15

38
40

DDR_B_D19

42

DDR_B_D16

44
46

DDR_B_DM2

48
50

DDR_B_D20

52

DDR_B_D21

54
56

DDR_B_D25

58

DDR_B_D27

60
62

DDR_B_DQS#3

64

DDR_B_DQS3

66
68

DDR_B_D31

70

DDR_B_D29

72

74
76
78

A15
A14

A11

A7

A6
A4

A2
A0

S0#

NC

DDR_B_MA15

80

DDR_B_MA14

82
84

DDR_B_MA11

86

DDR_B_MA7

88
90

DDR_B_MA6

92

DDR_B_MA4

94
96

DDR_B_MA2

98

DDR_B_MA0

100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130

DDR_B_D52

132

DDR_B_D53

134
136

DDR_B_DM6

138
140

DDR_B_D54

142

DDR_B_D55

144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4

DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D63
DDR_B_D58

DDR_B_DQS#7

DDR_B_DQS7

DDR_B_D62
DDR_B_D60

+0.675VS

DDR_B_RST# <5>

DDR_B_RST#

FOR EMI/ESD Require 0926

DDR_B_CKE1 <5>

DDR_B_CLK1 <5 >
DDR_B_CLK1# < 5>

DDR_B_BS1 <5>
DDR_B_RAS# <5>

DDR_B_CS0# <5 >
DDR_B_ODT0 <5>

DDR_B_ODT1 <5>

+DDR_B_VREF_CA

DDR_SMB_DA <8,13>
DDR_SMB_CK <8,13>

V0.2 modify

DDR_B_DQS#[0..7] <5>

DDR_B_DQS[0..7] <5>

DDR_B_D[0..63] <5>

DDR_B_MA[0..15] <5>

DDR_B_DM[0..7] <5>

EMC@

1 2

C84 .1U_0402_16V7K

1 2

R1069

4.7K_0402_1%

1 2

R1067

4.7K_0402_1%

+1.35V +DDR_B_VREF_CA

1 2

R1070

4.7K_0402_1%

1 2

R1068

4.7K_0402_1%

+1.35V

C133 10U_06 03_6.3V6M
C134 10U_06 03_6.3V6M
C135 10U_06 03_6.3V6M
C136 10U_06 03_6.3V6M

C129 .1U_0402_16 V7K
C130 .1U_0402_16 V7K
C131 .1U_0402_16 V7K
C132 .1U_0402_16 V7K
C137 .1U_0402_16 V7K
C138 .1U_0402_16 V7K
C139 .1U_0402_16 V7K

+0.675VS

Layout Note:
Place near JDIMM2.203,204

D

+DDR_B_VREF_DQ+1.35V

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

Layout Note:
Place near JDIMM2

1 2

C143 10U_0603_6.3V6M

1 2

C145 1U_0402_6.3V6K

1 2

C146 1U_0402_6.3V6K

1

C128
.1U_0402_16V7K

2

1

C142
.1U_0402_16V7K

2

E

Channel B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2014/08/21 2015/08/21

2014/08/21 2015/08/21

2014/08/21 2015/08/21

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DDR3L DIMMB

DDR3L DIMMB

DDR3L DIMMB

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

E

14 55W ednesday, March 04, 2015

14 55W ednesday, March 04, 2015

14 55W ednesday, March 04, 2015

1.0

1.0

1.0

A

UGPU1A

PEG_HTX_C_GRX_P0<7>
PEG_HTX_C_GRX_N0< 7>
PEG_HTX_C_GRX_P1<7>
PEG_HTX_C_GRX_N1< 7>

1 1

CV11 .1U_0402_16V7KVGA@

PEG_GTX_C_HRX_P0<7>
PEG_GTX_C_HRX_N0<7>
PEG_GTX_C_HRX_P1<7>
PEG_GTX_C_HRX_N1<7>

2 2

+3VSDGPU_AON

PEG_CLKREQ#<31>

3 3

1 2

R2009 10K_0402_5%

CV12 .1U_0402_16V7KVGA@
CV13 .1U_0402_16V7KVGA@
CV14 .1U_0402_16V7KVGA@

VGA@

PEG_CLKREQ#

1 2
1 2
1 2
1 2

R2010 200_0402_1%

R2011 2.49K_0402_1%

GC6 2.0 function

VGA_PWROK<31,38,51>

PLT_RST_BUF#<9,28,30,34,35>

4 4

DGPU_HOLD_RST#<31>

SYS_PEX_RST_MON#

GPU_PEX_RST_HOLD#

PLT_RST_BUF#

DGPU_HOLD_RST#

MC74VHC1G08DFT2G_SC70-5

A

D2002

2

3

BAT54A-7-F_SOT23-3

@

CLK_PEG_VGA<7>

CLK_PEG_VGA#<7>

@

VGA@

GC6_FB_EN

2

1

1

PEG_GTX_HRX_P0

PEG_GTX_HRX_N0

PEG_GTX_HRX_P1
PEG_GTX_HRX_N1

PEX_TSTCLK_OUT+

12

PEX_TSTCLK_OUT-

PLTRST_VGA#

12

PEX_TREMP

2

3

+3VSDGPU_AON

5

P

B

A

G

3

D2001

BAV70W_SOT323-3

R2016
0_0402_5%

1 2

NGC6@

U2001

VGA@

Y

+3VSDGPU_AON

AG6
AG7

AF7
AE7
AE9

AG9

AG10

AF10
AE10
AE12

AF12
AG12
AG13

AF13
AE13
AE15

AF15
AG15
AG16

AF16
AE16
AE18

AF18
AG18
AG19

AF19
AE19
AE21

AF21
AG21
AG22

AC9

AB9
AB10
AC10
AD11
AC11
AC12
AB12
AB13
AC13
AD14
AC14
AC15

AB15

AB16

AC16
AD17
AC17
AC18
AB18
AB19
AC19
AD20
AC20
AC21
AB21
AD23
AE23

AF24
AE24
AG24
AG25

AE8
AD8
AC6

AF22
AE22

AC7

AF25

1

GC6@

4

SYS_PEX_RST_MON#

check

12

R2055
10K_0402_5%

@

PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2

AF9

PEX_RX2_N
PEX_RX3
PEX_RX3_N
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

PEX_RST_N
PEX_TERMP

GM108-ES-S-A1_FCBGA595

@

1.5VS_DGPU_PWR_EN

R2019
0_0402_5%

NGC6@

1 2

PLTRST_VGA#

12

GC6@

R2014
200K_0402_5%

V0.2 modify

12

B

Part 1 of 6

PCI EXPRESS

SYS_PEX_RST_MON# <17>

R2017
10K_0402_5%

VGA@

SYS_PEX_RST_MON#

GPU_PEX_RST_HOLD#

B

C6

GPIO0

B2

GPIO1

D6

GPIO2

C7

GPIO3

F9

GPIO4

A3

GPIO5

A4

GPIO6

B6

GPIO7

A6

OVERT

F8

GPIO9

C5

GPIO10

E7

GPIO11

D7

GPIO12

B4

GPIO13

B3

GPIO14

C3

GPIO15

D5

GPIO16

D4

GPIO17

C2

GPIO18

F7

GPIO19

E6

GPIO20

C4

GPIO21

TSEN_VREF

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL
I2CC_SDA

I2CS_SCL

I2CS_SDA

PLLVDD

SP_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

AB6

AG3

NC

AF4

NC

AF3

NC

AE3

NC

AE4

NC

W5

NC

AE2
AF2

NC

B7
A7

C9
C8

A9
B9

D9
D8

L6
M6

N6

NC

C11
B10

A10
C10

2

B

1

A

PEX_WAKE_NC

DACsI2C GPIO

CLK

XTAL_OUTBUFF

1.5VS_DGPU_PWR_EN <38,5 0>

MC74VHC1G08DFT2G_SC70-5

Reserved from NV suggest

GC6_FB_EN

3VSDGPU_MAIN_EN
GPU_EVENT#_1

GPIO8_OVERT
GPIO9_ALERT

DGPU_VID
ACIN_BUF
PSI

GPU_PEX_RST_HOLD#

I2CS_SCL
I2CS_SDA

+PLLVDD

+GPU_PLLVDD

XTALIN
XTALOUT

XTAL_SSIN
XTAL_OUTBUFF

+3VSDGPU_AON

U2002

5

GC6@

P

4

Y

G

3

R2003 1.8K_0402_1%VGA@

1 2

R2004 1.8K_0402_1%VGA@

1 2

R2005 1.8K_0402_1%VGA@

1 2
1 2

R2006 1.8K_0402_1%VGA@

R2007 1.8K_0402_1%VGA@

1 2
1 2

R2008 1.8K_0402_1%VGA@

Place Under L6

1 2

1 2

Place Under M6

1 2

R2012 10K_0402_5%VGA@
R2013 10K_0402_5%VGA@

1 2

PLTRST_VGA#

12

R2018
10K_0402_5%

GC6@

C

GC6_FB_EN <9>

3VSDGPU_MAIN_EN <38,51>

DGPU_VID <51>

PSI <51>

ACIN_BUF

4

ACIN_BUF

GPU_EVENT#<9>

D2000

+1.8VALW

@

5

U2513

P

NC

Y

A

G

NL17SZ07DFT2G_SC70-5

3

SA00004BV00

NL17SZ07DFT2G_SC70-5

12

RB751V-40_SOD323-2

VGA@

1

2

+1.8VALW

GC6@

5

U2514

1

P

NC

2

A

G

3

SA00004BV00

DGPU_AC_DETECT <34>

H_PROCHOT# <9,34>

4

GPU_EVENT#_1

Y

V1.0 modify

V0.2 modify

C2000

.1U_0402_16V7K

VGA@

C2001

.1U_0402_16V7K

VGA@

38mA

+PLLVDD

PLL_VDD

0.1Ux1, 22Ux1
30ohm(ESR0.05)x1

17mA

+GPU_PLLVDD

SP_PLLVDD+VID_PLLVDD

0.1Ux2, 10Ux1,47Ux1
300ohm(ESR0.2)x1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SM010019400 3000ma 33ohm@100mhz DCR 0.05

1

C2003

VGA@

22U_0603_6.3V6M

2

Near GPU

SM01000AG00 2A 300ohm@100mhz DCR 0.1

1

C2006
10U_0603_6.3V6M

2

VGA@

PLTRST_VGA#

+3VSDGPU_AON

PLTRST_VGA#

+3VSDGPU_AON

VGA@

1 2

L2000 CHILISIN PBY16080 8T-330Y-N

VGA@

1 2

L2001 HCB1608KF-3 01T20_2P

12

C2007

VGA@

47U_0805_6.3V6M

Near GPU

Compal Secret Data

Compal Secret Data

2014/08/28 2016/08/28

2014/08/28 2016/08/28

2014/08/28 2016/08/28

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

SYS_PEX_RST_MON#

I2CS_SDA

I2CS_SCL

PSI

GPIO8_OVERT

GPIO9_ALERT

1 2

R11640_0 402_5% @

1 2

@

R1165 0_0402_5%

I2CS_SCL

1 2

R11740_0 402_5% @

@

1 2

R1168 0_0402_5%

I2CS_SDA

+1.05VSDGPU

D

GPIO8_OVERT
GPIO9_ALERT

ACIN_BUF

GPU_EVENT#_1
3VSDGPU_MAIN_EN
GPU_PEX_RST_HOLD#
GC6_FB_EN

R2056 10K_0402_5%@

R2000 1.8K_0402_1%VGA@

R2001 1.8K_0402_1%VGA@

R2052 10K_0402_5%VGA@

PLTRST_VGA#

2

VGA@

DMN66D0LDW-7_ SOT363-6
Q2000A

PLTRST_VGA#

5

VGA@

DMN66D0LDW-7_ SOT363-6
Q2000B

V1.0 modify

2

VGA@

DMN66D0LDW-7_ SOT363-6
Q2001A

V1.0 modify

5

VGA@

DMN66D0LDW-7_ SOT363-6
Q2001B

10K_0804_8P4R_5%

10K_0804_8P4R_5%

1 2

1 2

61

34

61

34

GPIOII/O USAGE

+3VSDGPU_AON

RP2000

VGA@

RP2001

GC6@

12

18
27
36
45

18
27
36
45

+3VSDGPU_AON

+3VSDGPU_AON

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

12

GPIO11

GPIO12

GPIO13

GPIO14

GPU_OVERT <34>

V1.0 modify

GPIO15

GPIO16

GPIO17

GPU_ALERT <34>

GPIO18

GPIO19

GPIO20

GPIO21

GPIO22

EC_SMB_CK2 <26,30,34,37>

GPIO23

GPIO24

EC_SMB_DA2 <26,30,34,37>

27MHZ_10PF_7V2700 0023

3

XTALOUT XTALIN

VGA@

C2004

Crystals must have a max ESR of 80 ohm

3

GND

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

X2000

VGA@

4

10P_0402_50V8J

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

E

O

GC6_FB_ENGPIO0

O

MEM_VDD_CTL

O

LCD_BL_PWM

O

LCD_VCC

O

LCD_BL_EN

O

3V3_MAIN_EN

GPU_EVENT#

3D Vision

O

SYS_PEX_RST_MON#

I

ALERT

I/O

MEM_VREF_CTL

O

O

PWM_VID

I

PWR_LEVEL

PSI

O

I HPD_A

I

HPD_C

FRAME_LOCK#

I

I

HPD_D

I

HPD_E

I

HPD_F or HPD_B

Reserved

GPU_PEX_RST_HOLD#

O

1

1

GND

1

C2005

VGA@

2

10P_0402_50V8J

E

2

N16X PEG 1/9

N16X PEG 1/9

N16X PEG 1/9

1.0

1.0

15 55Wednesday, March 04, 2015

15 55Wednesday, March 04, 2015

15 55Wednesday, March 04, 2015

1.0

A

B

C

D

E

VRAM Interface

+1.5VSDGPU

RP33

A5MUB exchange

T97 @

AA24

AA23

AD27

AB25
AD26
AC25

AA27

AA26

W26

W27
W25

E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24

Y22

Y25
R26
T25
N27
R27
V26
V27

F16
P22

D23

H22

F3

F22

J22

UGPU1B

FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FB_PLLAVDD_1
FB_PLLAVDD_2

FB_VREF_PROBE

FB_DLLAVDD

FB_CLAMP

FBA_CMD34
FBA_CMD35

Part 2 of 6

MEMORY

FBA_DQS_RN0
FBA_DQS_RN1

INTERFACE A

FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_CLK0_N

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_CLK0

FBA_CLK1

C27
C26
E24
F24
D27
D26
F25
F26
F23
G22
G23
G24
F27
G25
G27
G26
M24
M23
K24
K23
M27
M26
M25
K26
K22
J23
J25
J24
K27
K25
J27
J26

D19
D14
C17
C22
P24
W24
AA25
U25

F19
C14
A16
A22
P25
W22
AB27
T27

E19
C15
B16
B22
R25
W23
AB26
T26

D24
D25

N22
M22

D18
C18
D17
D16
T24
U24
V24
V25

CMDA0
CMDA1
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16
CMDA17
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30
CMDA31

DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7

DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7

DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7

CLKA0 <20,21>
CLKA0# <20,21 >

CLKA1 <22,23>
CLKA1# <22,23 >

CMDA[31..0] <20,21,22,23>

PVT modify 01/13
DQSA, DQSA# reverse

DQMA[3..0] <20,2 1>

DQMA[7..4] <22,2 3>

DQSA#[3..0] < 20,21>

DQSA#[7..4] <22,23>

DQSA[3..0] <20,21>

DQSA[7..4] <22,23>

A5MUB exchange

A5MUB exchange

A5MUB exchange

A5MUB exchange

A5MUB exchange

A5MUB exchange

A5MUB exchange

A5MUB exchange

A5MUB exchange

1 1

UGPU1

N16S-GT

SGT@

SA000087F00

UGPU1

N16V-GM

VGM@

SA000088R00

2 2

MDA[15..0]<20,21>

MDA[31..16]<20,21>

MDA[47..32]<22,23>

MDA[63..48]<22,23>

NV 15x DG-06803-V03
NV 16x DG-07158-V04

SM010019400 3000ma 33ohm@100mhz DCR 0.05

+1.05VSDGPU

3 3

VGA@

CHILISIN PBY160808T-330Y-N

12

change to 1.35VSDGPU

L2002

C2008

VGA@

MDA[15..0]

MDA[31..16]

MDA[47..32]

MDA[63..48]

15+55mA

1

2

22U_0603_6.3V6M

1

2

Place Under F16 P22 H22Place Near GPU

VGA@

C2011

.1U_0402_16V7K

+1.5VSDGPU

1

2

VGA@

C2010

.1U_0402_16V7K

+FB_PLLAVDD

VGA@

1

2

C2009

.1U_0402_16V7K

1 2
1 2

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

VGA@

1 2

R202060.4_0402_1% @
R202260.4_0402_1% @

R202810K_0402_5 %

FBA_CMD34
FBA_CMD35

FB_CLAMP

CMDA23

CMDA21

CMDA24

CMDA26

CMDA10

CMDA22

CMDA4

CMDA12

CMDA8

CMDA14

CMDA9

CMDA29

CMDA5

CMDA13

CMDA6

CMDA7

CMDA27

CMDA30

CMDA28

CMDA25

CMDA15

CMDA11

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP42

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP43

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP44

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP45

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP46

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP47

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP48

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP49

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP50

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

RP51

1 8
2 7
3 6
4 5

VGA@

100_0804_8P4R_5%

+1.5VSDGPU+1.5VSDGPU

2

C2084
.1U_0402_16V7K

1

@

2

C2086
.1U_0402_16V7K

1

@

2

C2088
.1U_0402_16V7K

1

@

+1.5VSDGPU +1.5VSDGPU

2

C2090
.1U_0402_16V7K

1

@

2

C2091
.1U_0402_16V7K

1

@

2

1

+1.5VSDGPU+1.5VSDGPU

2

1

+1.5VSDGPU+1.5VSDGPU

2

1

2

1

+1.5VSDGPU+1.5VSDGPU

2

1

+1.5VSDGPU

2

1

C2083
.1U_0402_16V7K

@

C2085
.1U_0402_16V7K

@

C2087
.1U_0402_16V7K

@

C2089
.1U_0402_16V7K

@

C2092
.1U_0402_16V7K

@

C2093
.1U_0402_16V7K

@

GM108-ES-S-A1_FCBGA595

@

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2014/08/28 2016/08/28

2014/08/28 2016/08/28

2014/08/28 2016/08/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

N16X VRAM 2/9

N16X VRAM 2/9

N16X VRAM 2/9

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

E

16 55Wednesday, March 04, 2015

16 55Wednesday, March 04, 2015

16 55Wednesday, March 04, 2015

1.0

1.0

1.0

A

B

C

D

E

UGPU1C

AC3

NC

AC4

NC

Y4

NC

Y3

NC

AA3

NC

AA2

NC

AB1

NC

AA1

NC

AA4

NC

1 1

2 2

3 3

VGA Power Sequence

AA5

NC

AB5

NC

AB4

NC

AB3

NC

AB2

NC

AD3

NC

AD2

NC

AE1

NC

AD1

NC

AD4

NC

AD5

NC

T2

NC

T3

NC

T1

NC

R1

NC

R2

NC

R3

NC

N2

NC

N3

NC

V3

NC

V4

NC

U3

NC

U4

NC

T4

NC

T5

NC

R4

NC

R5

NC

N1

NC

M1

NC

M2

NC

M3

NC

K2

NC

K3

NC

K1

NC

J1

NC

M4

NC

M5

NC

L3

NC

L4

NC

K4

NC

K5

NC

J4

NC

J5

NC

N4

NC

N5

NC

P3

NC

P4

NC

J2

NC

J3

NC

H3

NC

H4

NC

GM108-ES-S-A1_FCBGA595

@

Part 3 of 6

NC

GENERAL

MULTI_STRAP_REF0_GND

LVDS/TMDS

TEST

JTAG_TRST_N

SERIAL

FBA_CMD32

BUFRST_N

GPIO8

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

THERMDP

THERMDN

VDD_SENSE

GND_SENSE

TESTMODE

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

F11

NC

AD10

NC

AD7

NC

B19
V5

NC

V6

NC

G1

NC

G2

NC

G3

NC

G4

NC

G5

NC

G6

NC

G7

NC

V1

NC

V2

NC

W1

NC

W2

NC

W3

NC

W4

NC

D11

D10

NC

E9

E10

NC

F10

NC

D1
D2
E4
E3
D3
C1

NC

F6
F4

NC

F5

NC

F12

E12

F2

F1

AD9
AE5
AE6
AF6
AD6
AG4

D12
B12
A12
C12

1 2

R2050 10K_0402_5%@

SYS_PEX_RST_MON#

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

MULTI_STRAP_REF0_GND

VCCSENSE_VGA

VSSSENSE_VGA

TESTMODE

JTAG_TCK_VGA
JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_RST

ROM_SI
ROM_SO
ROM_SCLK

SYS_PEX_RST_MON# <15>

VGA@

1 2

R2051 40.2K_0402_1%

VCCSENSE_VGA <51>

VSSSENSE_VGA <51>

1 2

R2054 10K_0402_5%VGA@

1 2

R2053 10K_0402_5%VGA@

T24PAD @
T1PAD @
T186PAD @
T3PAD @

For GC62.0 use
N14x for CEC ,NC
N15x for GPIO8

N16S-GT

N16V-GM

VRAM

RANK

Voltage

+1.5V Dual

+1.5V Single

VRAM

RANK

Voltage

Dual

+1.35V

+1.5V Single

12

R2029

SGT@

R2038

4.99K_0402_1%

12

@

45.3K_0402_1%

49.9K_0402_1%

STRAP0
STRAP1 ROM_SI
STRAP2
STRAP3
STRAP4

4.99K_0402_1%

N16VGM Option Component

--->STRAP0

2 1R2 029 45.3K_0402_ 1%VGM@ SD034453280

For N16S-GT Binary strap table

X76

X76615BOL13

X76615BOL12

X76615BOL05

X76615BOL03

X76615BOL11

X76615BOL04

For N16V-GM Binary strap table

X76

Freq strap4

1GHz 256Mx16x8

4G

1GHz 256Mx16x4

2G

Freq strap4

X76615BOL09

X76615BOL08

X76615BOL10

900MHz

256Mx16x8
4G

X76615BOL01

X76615BOL07

X76615BOL02

1GHz

256Mx16x4
2G

MULTI LEVEL STRAPS

12

R2030

R2039

VGM@

R2031

@

VGM@

10K_0402_1%

12

R2040

@

15K_0402_1%

0xC (SA00008DN10) Hynix H5TC4G63CFR-N0C

0x1 (SA000077K20) Micron MT41J256M16HA-093G:E

0x2 (SA000076P20) Samsung K4W4G1646D-BC1A

0x5 (SA00008DN10) Hynix H5TC4G63CFR-N0C

0x1 (SA000077K20) Micron MT41J256M16HA-093G:E

0x2 (SA000076P20) Samsung K4W4G1646D-BC1A

0xA (SA00008DN10) Hynix H5TC4G63CFR-N0C

0xD (SA000077K20) Micron MT41J256M16HA-093G:E

0xC (SA000076P20) Samsung K4W4G1646D-BC1A

0x9 (SA00008DN10) Hynix H5TC4G63CFR-N0C

0x1 (SA000077K20) Micron MT41J256M16HA-093G:E

0x4 (SA000076P20) Samsung K4W4G1646D-BC1A

12

4.99K_0402_1%

12

4.99K_0402_1%

strap3strap2strap1strap0

R2032

R2041

VGM@

12

@

12

45.3K_0402_1%

strap4

12

R2033

@

R2042

VGM@

30K_0402_1%

12

4.99K_0402_1%

10K_0402_1%

Decive ID : 0x1347

PU 49.9K NCNC

Decive ID : 0x1299

PU 45.3K PD 45.3K PU 10K PD 4.99K

R2035

X76@

R2044

X76@

strap1 ROM_SOROM_SIstrap0

strap1 ROM_SOROM_SIstrap0

+3VSDGPU_MAIN+3VSDGPU_AON

12

4.99K_0402_1%

12

4.99K_0402_1%

R2036

VGM@

R2045

SGT@

12

4.99K_0402_1%

12

4.99K_0402_1%

strap3strap2 ROM_SCLKMemory SizeGPU Memory Config

strap3strap2 ROM_SCLKMemory SizeGPU Memory Config

R2037

VGM@

R2046

SGT@

PD 45.3K

12

12

ROM_SO
ROM_SCLK

PU 24.9K

PD 10K

PD 15K

PD 30.1K

PD 10K

PD 15K

PU 15K

PU 30.1K

PU 24.9K

PU 10K

PD 10K

PD 24.9K

PD 4.99KNC NC PD 4.99K

PU 4.99K PU 4.99K

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2014/08/28 2016/08/28

2014/08/28 2016/08/28

2014/08/28 2016/08/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

N16X LVDS 3/9

N16X LVDS 3/9

N16X LVDS 3/9

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

A4WAL_Braswell-M/D_LA-C371P

E

17 55Wednesday, March 04, 2015

17 55Wednesday, March 04, 2015

17 55Wednesday, March 04, 2015

1.0

1.0

1.0