Acer Aspire 9920, Aspire 9920G Schematics

Cheela 2.0

Pre-MV

2007.06.15

DATE

CHANGE NO.

REV

DRAWER
DESIGN
CHECK
RESPONSIBLE

SIZE =
FILE NAME :

XXXXXXXXXXXX

P/N

http://laptop-motherboard-schematic.blogspot.com/

EE

3

XXXX-XXXXXX-XX

POWER

DATEDATE

INVENTEC

TITLE

CHEELA 2.0

SIZE

A3

DOC. NUMBER

1310A2128301 A01

CS

SHEET

REVCODEVER :

OF

591

TABLE OF CONTENTS

PAGE

MAINBOARD

1.COVER PAGE

2.INDEX

3.BLOCK DIAGRAM

4.POWER SEQUENCE BLOCK
5-12.SYSTEM POWER

13.CLOCK GENERATOR
14-17.CPU Merom

18.FAN & THERMAL CONTROLLER
19-25.N/B Calistoga

26.DDR2 DIMM0

27.DDR2 DIMM1

28.DDR DAMPING

29.MXM CONN

30.CRT CONN

31.SVIDEO & HDMI & DVI CONN

32.LCD CONN
33-37.S/B ICH8

38.ROBSON TECH

39.CARDBUS CONTROLLER

40.PCMCIA & EXPRESS CARD

PAGE

41.6 IN 1 CARD SLOT

42.1394 CONTROLLER

43.LAN CONTROLLER

44.RJ45 & TRANSFORMER

45.MINI CARD CONN

46.RAID CONTROLLER

47.ODD & HDD CONN

48.USB CONN

49.BLUE TOOTH CONN

50.KBC

51.SUPER I/O(FIR)

52.CODEC

53.AUDIO AMP

54.TV CONN & DC IN

55.SCREW

56.TO OTHER BOARD CONN

57.HOTKEY BOARD

58.MEDIA BOARD

59.TOUCH PAD BUTTON BOARD

PAGE

I/O BOARD

1.USB CONN

2.MDC CONN

3.PRT & COM PORT CONN
AUDIO BOARD

1.IR/CIR

2.AUDIO JACKS

3.BT&WIRELESS SW

http://laptop-motherboard-schematic.blogspot.com/

CHANGE by

RDEE3A

30-Apr-2007

INVENTEC

TITLE

CHEELA 2.0

SIZE

A3

CODE

CS

SHEET

DOC. NUMBER

259

REV

A011310A2128301

OF

HDMI

LCM

CPU

Merom

(uFCPGA)

PSB, 667/800MHz

CLK GEN

ICS9LPRS365

THERMAL SENSOR

& FAN

ADM1032

PWR Board

Batt Charger

MAIN BATT

8 Cell

DVI

CRT

S-Video

I/O BOARD

PRINTER

PORT

COM

PORT

MXM CARD

NV8P

HDD

HDD

CD-ROM

SMSC

LPC47N217

BIOS

KB / LED

TOUCH PAD

2 PICK BUTTON/

4 WAY

PCIE

SATA

SATA

Ultra ATA-100

LPC 3.3V 33MHZ

SUPER I/O & KBC

CIR

North Bridge

Crestline

1299 PCBGA

DMIx4

South Bridge

ICH8-M

676 BGA

LPC 3.3V 33MHZ

ITE

IT8512

M P.57

HD Codec

REAL_ALC883D/888S/268

Audio Board

LINE IN

Jack

Azalia

MIC IN

Jack

DDR2 533/667

DDR2 533/667

PCI_Express Bus

USB 2.0

USB2.0 PORT

PCI Bus

HP Jack
\SPDIF\

LINE OUT

DDR2_SODIMM0

DDR2_SODIMM1

http://laptop-motherboard-schematic.blogspot.com/

x4

DSC

BLUETOOTH

VER 2.0

Express Card

CardBus

Controller

TI PCI7412

MAX_9713

Sub

Woofer

6 IN 1 SLOT

MS,MS-P,SD.SD-IO,XD,MMC

MDC

MDC 1.5

RJ11 CNTR

CHANGE by

1394 CONN X 1

PCMCIA

TYPE II

Azalia

MAX_9714

Two

Speakers

RDEE3A

Mini Card

TV TUNER

M P.60

M P.60

ANT AV IN

30-Apr-2007

LOM

Controller

BROADCOM

BCM5787

RJ45

CONN

Mini Card

INTEL PRO

WIRELESS 3945ABG

ANT ANT

INVENTEC

TITLE

CHEELA 2.0

DOC. NUMBER

CODE

SIZE

A3

1310A2128301 A01

CS

SHEET

REV

OF

593

+ADAPTOR

CHG_EN

ACPPRES

I2C

BATT_IN

NMOS

BQ24721

CHGEN#

CHARGE

CHGDRV

ACDRV

BATDRV

PMOS

PMOS

+VBAT

SYSTEM LOAD

MCH_GOOD

+V5AUXON

+V5A

ADP3208

+VCC_CORE

SHDN#
PSI#

DPRSTP#
DPRSLPVR

TPS51020

ENBL1

ENBL2

CLKEN#

PWRGD

+V3A

+V5A

+V5AL

IMVP_CKEN#

VR_PWRGD_CK410

SLP_S3#_3R

SLP_S3#_3R

PMOS

ON
PMOS

ON

PMOS

+V3S

+V5S

http://laptop-motherboard-schematic.blogspot.com/

TPS51117

FDC638P

+VCC_CORE

+V3S

+V5S

+V5AL

+V1.8S

PACK

SLP_S3#_3R

SLP_S4#_3R

SLP_S3#_3R

SLP_S4#_3R

+V5A

M_VREF

SLP_S3#_3R

PWR_GOOD_3

EN1

EN2

GMT_G2998

S3

S5

VIN

VTTREF

TPS51124

EN1

EN2

+V1.8

VLDOIN

VTT

+V1.5S

+VCCP

CHANGE by

+V0.9S

RICHTEK_RT9018

+V1.5S_PG

+V1.5S_PG

+VCCP

RDEE3A 30-Apr-2007

+V1.25S

ON

RICHTEK_RT9018

ON

+V1.2S

INVENTEC

TITLE

CHEELA 2.0

CODE

SIZE

A3

+V1.8

+V1.25S

DOC. NUMBER

1310A2128301 A01

CS

SHEET OF

+V1.2S

REV

594

+V19S +VACPWR

L2

NFM60R30T222

1

2

3

C3

4

1
2

0.1uF_25v

4

3

12

NFM60R30T222

D9

1

3

2

PDS1040S

D10

1

3

2

PDS1040S

1

C94

68uF_25v

2

L1

C2

0.1uF_25v

C392

1
2

0.1uF_25v

1
2

R244

12

0.01_1%_1W

C394

12

0.1uF_25v

1
2

Kevin Sense

R419

12

6-,50-

C390

1
2

OPEN

CHG_EN#

10_5%

CHARGE_GND

1

R426

47K_5%

2

1

R422

100K_5%

2

+V3A

2

1uF_10v

50-

C435

1

2.2uF_25v

C436

CHARGE_GND

1

2

1

10K_5%

R391

1

R425

100K_5%

2

1

R420

100K_5%

2

2

BATT_CLK

BATT_DATA

5-,50-

5-,50-

1

R388

432K_1%

2

1

R390

30.9K_1%

2

ACPRES

CHARGE_GND

5-,7-,11-,12-,33-,34-,35-,36-,40-,44-,45-,50-,52-,53-,54-,55-,56-

R424

12

10_5%

R423

12

10_5%

C1

0.1uF_25v

CHARGE_GNDCHARGE_GND

C393

1
2

0.1uF_25v

U29

12

VCC

3

ACN

4

ACP

6

BYPASS#

5

ACDET

11

VREF5

10

AGND

15

TS

1

CHGEN#

14

SCL

13

SDA

25

ALARM#

17

IOUT

TI_BQ24721_QFN_32P

JACK1
1
2
3

2

ACDRV#

23

SYS

24

BATDRV#

32

PVCC

30

HIDRV

29

PH

31

BTST

28

REGN

27

LODRV

26

PGND

22

SYNP

21

SYNN

20

SRP

19

SRN

18

BAT

7

EAO

8

EAI

9

FBO

16

ISYNSET

33

TML

R421

12

0_5%

BATT_IN

BATT_DATA

BATT_CLK

G1

G2

SINGA_2DC_G028I200_3P

10uF_25v_K_X5R

R428

10_5%

12

CHENMKO_BAT54_3P

CHARGE_GND

1

3

1

R427

100K_5%

2

D28

C438

0.1uF_25v

12

+V3A

5-,7-,11-,12-,33-,34-,35-,36-,40-,44-,45-,50-,52-,53-,54-,55-,56-

1

R722

100K_5%

5-,50­5-,50-

2

50-

1

AZ23C6V2

D33

3

3

2

1

2

D32

AZ23C6V2

+VPACK

http://laptop-motherboard-schematic.blogspot.com/

1

C333

1

2

2

C437

R5032

12

0_5%

12

1uF_25v

1

R387

200K_5%

2

1
2

C439

1

2

1
2

R386

18K_5%

C389

100pF_50v

R5033

12

0_5%

1
2

Q40

D1

1
2

G1

8

3

G2

FDS6900AS

C391

56pF_50v

S1_D2

S2

1

2

1
2

5
6
7

4

R389

10K_5%

C388

1500pF_50v

0.1uF_25v

L44

12

PLFC1045R_10uH

1

R5034

22_5%

2

10uF_25v_K_X5R

C5005

1
2

680pF_50v

10uF_25v_K_X5R

C395

1
2

1
2

CHARGE_GND

5-

C468

1000pF_50v

1

R723

2

1K_5%

C670

1
2

R429

12

0.01_1%_1W

Kevin Sense

C463

12

0.1uF_25v

C462

0.1uF_25v

CHARGE_GND

NEAR IC

RDEE3A

1

C467

2

1
2

0.01uF_50v

0.01uF_50v

C334

10uF_25v_K_X5R

C461

1

1

2

2

0.1uF_25v

CHARGE_GND

30-Apr-2007

CN27

1

1

2

2

3

3

4

4

5

5

G1

6

G

6

G2

7

7

G

SYN_200275MR007G102ZL_7P

C466

C464

1

1

2

2

4.7uF_25v

Q29

1

8

D

S

2

7

3

6

4

5

G

AM4825P_AP

+VPACK

5-

Q58

8

D

7
6

1

5

2

AM4825P_AP

C465

10uF_25v_K_X5R

C460

0.1uF_25v

INVENTEC

TITLE

CHEELA 2.0

DC &BATTERY CHANGER

CODE DOC. NUMBERSIZE

A3

CS

+VBAT

6-,7-,8-,9-,10-,29-,32-,52-,53-,55-

PAD9

1

S

2
3
4

G

1310A2128301 A01

SHEET

POWERPAD_2_0610

OF

595

REV

+V3S

10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

+V5S

8-,10-,12-,18-,29-,30-,31-,32-,34-,36-,39-,40-,45-,47-,50-,53-,55-,56-

U3

1

POK9TML

GND

2

VEN

ADJ

36

VIN

VO

4

NC

VPP

GMT_G966_25ADJF1Uf_SOP_8P

1
2

C27

0.1uF_10v

C28

10uF_6.3v

1
2

+V3A

10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

1

R5062

R5069

100K_5%

2

12

3

BUTTON_TV

+V5LA

6-,7-,12-,50-

1

R5068

100K_5%

2

56-

12

0_5%_OPEN

BAT54C

8
7

5

D5010

ARCADE_EC

PWR_SWIN#

+V2.5S

29-

1A

PAD1

POWERPAD_2_0610

1

R35

OPEN

2

1

R34

0_5%

2

56- 6-,7-

1
2

C26

10uF_6.3v

+V5LA

6-,7-,12-,50-

1

R384

100K_5%

2

34-,50-

12

D26

3

BAT54C

5-,50-

ACPRES

BATT_PWRKEEP

50-

R5019

4.7K_5%

THER_SD#

ALL POWER TURN OFF WHEN BATTERY MODE

1

2

PWR_SWIN#_3

Q57

SSM3K7002F

Q56

SSM3K7002F

+V5LA

3

D

1

G

S

2

2

S

G

1

D

3

18-

16.2K_1%

180K_1%

6-,7-,12-,50-

1

R385

100K_5%

2

+VBAT

R315

R283

Q55

G

G

SSM3K17FU

1

R313

1M_5%

2

1

2

1

2

D

D

S

S

U24
LTH

3

RESET#

VCC

4
5

GND

2

HTH

1

GMT_G680LT1_SOT23_5P

PM_THRMTRIP#

+V5AUXON

+V5LA

6-,7-,12-,50-5-,7-,8-,9-,10-,29-,32-,52-,53-,55-

12

0.1uF_10v

C363

VR_PWRGD_CK505

14-,19-,33-

R312

12

330_5%

2SC2411K

10-

R316

12

47K_5%

CHENMKO_BAT54_3P 1

10-

1

R314

2M_5%

2

Q44

3

C

2

B

E

1

6-,7-

C362

1
2

0.47uF_6.3v

+V5AUXON_1

+V5AUXON

3

D27

D

D

G

G

S

S

SSM3K17FU

Q43

http://laptop-motherboard-schematic.blogspot.com/

CHANGE by

RDEE3A

15-Jun-2007

INVENTEC

TITLE

CHEELA 2.0

+V2.5S / RESET

CODE

SIZE

A3

DOC. NUMBER

1310A2128301 A01

CS

SHEET

REV

OF

596

http://laptop-motherboard-schematic.blogspot.com/

6-

9-,10-,11-,12-,34-,50-

+VBAT

R118

100K_5%

0_5%

R117

12
12

0_5%

R161

C212

OPEN

5-,6-,7-,8-,9-,10-,29-,32-,52-,53-,55-

2

1

1
2

C163

OPEN

R114

0_5%

1
2

0.01uF_16v

12

TPS51020

0.01uF_16v

12

1M_5%

12

10K_1%

R120

10K_1%

12

C165

1

2

C162 0.1uF_16v

12

C215

12

R166

R165

R162

12

1

R82

29.4K_1%

2

C164

12

0.033uF_16v

2

2

1

1.8K_5%

C214

3900pF_50v

51.1K_1%

1
2

SLP_S3#_3R

+V5AUXON

R119

2

2.7K_5%

R164

1

R163

220_5%

2

C213

6800pF_25v

1

C124

4700pF_50v

2

1

R116

330_5%

2

1

1

1

R115

0_5%

2

U10

1

INV1
COMP1
SSTRT1
SKIP#
VO1_VDDQ
DDR#
GND
REF_X
ENBL1
ENBL2
VO2
PGOOD
SSTRT2
COMP2
INV2

VBST1

OUT1_U

OUT1_D

OUTGND1

TRIP1

TRIP2

VREG5

REG5_IN

OUTGND2

OUT2_D

OUT2_U

VBST2

LL1

VIN

LL2

2
3
4
5
6
7
8

9
10
11
12
13
14
15

TI_TPS51020DBT_TSSOP_30P

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16

1
2

C166

4.7uF_25v

R124

15.8K_1%

R121

12

4.7_5%

1
2

1

1

2

2

12

R5037

12

0_5%

R167

12

4.7_5%

0.1uF_25v

C125

2.2uF_25v

R123

12.1K_1%

C216

12

R122

12

4.7_5%

12

0_5%R5038

C167

12

0.1uF_25v

R5035

0_5%

10uF_25v_K_X5R

R5036

12

0_5%

8765

D

G

41S23

8

765

D

G

S

123

4

1
2

+V5LA

6-,12-,50-

C168

1
2

4.7uF_6.3v

Q27

FDS8884

10uF_25v_K_X5R

Q28

FDS6690AS

C123

C252

1
2

1

8

765

D

2

Q19

G

FDS8884

S

123

4

8765

D

Q17

G

FDS6690AS

41S23

+VBAT

5-,6-,7-,8-,9-,10-,29-,32-,52-,53-,55-

C253

1
2

10uF_25v_K_X5R

12

CYNTEC_PCMC063_4R7

1

R216

22_5%

2

1

C254

2

680pF_50v

C364

68uF_25v

L34

1

R71

22_5%

2

C102

1
2

680pF_50v

330uF_6.3v

1

2

L22

12

PLC1055P_4.7uH_5.8A

C296

1

C295

2

1uF_10v

1

C101

2

330uF_6.3v

5-,11-,12-,33-,34-,35-,36-,40-,44-,45-,50-,52-,53-,54-,55-,56-

1

POWERPAD_2_0610

1

C95

2

1uF_10v

PAD7

2

1

POWERPAD_2_0610

+V3A

PAD4

2

MAX 8A

+V5A

8-,9-,11-,12-,36-,48-,53-,55-,56-

MAX 6A

CHANGE by

INVENTEC

TITLE

CHEELA 2.0

SYSTEM POWER(+V3A/+V5A)

SIZE

CODE

A3

CS

30-Apr-2007RDEE3A

759

REVDOC. NUMBER

A011310A2128301

OFSHEET

http://laptop-motherboard-schematic.blogspot.com/

SLP_S4#_3R

11-,34-,40-,50-

+V1.5S_PG

R50

0_5%

12

9-,11-

7-,9-,11-,12-,36-,48-,53-,55-,56-

12

C57

OPEN12

+V1.5S

9-,16-,24-,33-,34-,36-,38-,40-,45-,55-

D24 CHENMKO_BAT54_3P

13

R300

20K_1%

1

C348

0.22uF_10v

2

1

C349

10uF_6.3v

2

+V5A

1

R60

10_5%

2

C76

1
2

1uF_6.3v

+V5S

6-,10-,12-,18-,29-,30-,31-,32-,34-,36-,39-,40-,45-,47-,50-,53-,55-,56-

U18

1

PGOOD

EN

36

VIN

4

VDD

RICHTEK_RT9018A25PSP_SOP8_8P

1

C319

0.1uF_10v

2

1
2
3
4
5
6

C56

OPEN

7

1

TI_TPS51117_QFN_14P

2

U5

EN_PSV
TON
VOUT
V5FILT
VFB
PGOOD
GND

TML-PAD

GND

ADJ

VOUT

R59

2

200K_5%

9
8
72

5

NC

1

14

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

8

PGND

15

TML

C58

1

1uF_6.3v

2

1

R266

56.2K_1%

2

1

R265

100K_1%

2

R49

2.2_5%

12

12

R51

10K_5%

+V1.25S

19-,24-,36-

POWERPAD_2_0610

C318

1
2

10uF_6.3v

C55

0.1uF_25v

R5039

1

12

0_5%

R5040

12

0_5%

PAD6

+VBAT

5-,6-,7-,9-,10-,29-,32-,52-,53-,55-

PAD2

POWERPAD_2_0610

765

8

D

Q7

G

FDS8876

S

4

2

123

8765

D

G

41S23

Q8

FDS6676AS

1

R48

22_5%

2

C52

1

680pF_50v

2

1
2

C38

C37

1
2

10uF_25v_K_X5R

10uF_25v_K_X5R

L21

12

PLFC1055P_3R3A_3.3UH

R61

14.3K_1%

R52

10K_1%

1

1

OPEN

C77

2

2

1

330uF_2v_15mR_Panasonic

2

+V1.8

11-,19-,23-,24-,26-,27-

PAD3

POWERPAD_2_0610

1

C53

2

1

10uF_6.3v

2

C54

CHANGE by

INVENTEC

TITLE

CHEELA 2.0

SYSTEM POWER (+V1.8 / +V1.25S)

CODESIZE REV

CS

SHEET

DOC. NUMBER

859

30-Apr-2007RDEE3A

A3

A011310A2128301

OF

7-,9-,10-,11-,12-,34-,50-

SLP_S3#_3R

PWR_GOOD_3

+VCCP

13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

MAX 10A

PAD8

POWERPAD_2_0610

http://laptop-motherboard-schematic.blogspot.com/

+VBAT

5-,6-,7-,8-,10-,29-,32-,52-,53-,55-

C340

12.4K_1%

1

R287

12

Q45

R5043

OPEN

Q41

OPEN

8

D

S

123

8

D

S

123

76

765

C339

G

G

4

15pF_50V

5

4

R318

OPEN

12

R286

1

11-,29-,50-

2

0_5% 0_5%

C365

4.7uF_25v

L45

12

PLFC1055P_3R3A_3.3UH

1

C299

1

C337

2

2

220uF_2.5v

0.1uF_10v

1
2

C366

10uF_25v_K_X5R

1
2

FDS8884

1

2

FDS6690AS

C5007

1
2

1

2

R288

7-,8-,9-,11-,12-,36-,48-,53-,55-,56-

MCH_GOOD

C368

30.1K_1%

12

0.1uF_25v

2

+V5A

1

2

10-

R285

100K_5%

R317

12

4.7_5%

2

R289

OPEN

1

R290

OPEN

12

5

6

VO2

7

9

10

11

12

VFB2

U25

PGOOD2

TI_TPS51124RGER_QFN_24P

EN2

VBST2

DRVH2

LL2

DRVL2

TRIP2

PGND2

14

13

12

11.8K_1%

11.8K_1%

R319

4

TONSEL

V5FILT

15

R322

3

2

GND

VFB1

TRIP1

V5IN

17

16

12

1

VO1

PGOOD1

VBST1

DRVH1

DRVL1

PGND1

18

VCCP_1.5V_GNDVCCP_1.5V_GND

25

GND

24

238

EN1

22

21

20

LL1

19

R291

1

30.1K_1%

+V5A

7-,8-,9-,11-,12-,36-,48-,53-,55-,56-

1

R293

100K_5%

2

R5041

2

1

0_5%

1

C369

1uF_6.3v

2

2

C372

R323

12

4.7_5%

0.1uF_25v

R321

1

2

10_5%

15pF_50V

12

30.9K_1%

12

8-,11-

+V5A

1
2

12

R292

C371

1
2

OPEN

+V1.5S_PG

C370

4.7uF_6.3v

7-,9-,10-,11-,12-,34-,50-

R324

1

2

FDS6900AS

1
2
8

3

Q46

G1

G2

D1

SLP_S3#_3R

5

S1_D2

6
7

4

S2

C373

1

10uF_25v_K_X5R

2

L38

12

PLC1055P_4.7uH_5.8A

1

R5044

OPEN

2

C5006

1
2

OPEN

C374

220uF_2.5v

+V1.5S

8-,16-,24-,33-,34-,36-,38-,40-,45-,55-

PAD10

POWERPAD_2_0610

MAX 5A

C375

1

1

2

2

0.1uF_10v

R320

12

0_5%

VCCP_1.5V_GND

CHANGE by

RDEE3A

30-Apr-2007

INVENTEC

TITLE

CHEELA 2.0

SYSTEM POWER(+V1.5S / +VCCP)

SIZE DOC. NUMBER

CODE

A3

1310A2128301 A01

CS

SHEET OF

599

REV

H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

PSI#

H_DPRSTP#

PM_DPRSLPVR

MCH_GOOD

VR_PWRGD_CK505

IMVP_CKEN#

C604

1
2

18pF_50v

C172

1
2

1000pF_50v

VCOREGND

R587

1

33.2K_1%

C173

330pF_50v

16­16­16­16­16­16­16­15­15-,19-,33­19-,34-

9-

R86

R83

OPEN

6-,10-

2

220pF_25v

R89
R88

R87

12

499_1%

12

1

2

R85

OPEN

C171

0.012uF_16v

VCOREGND

C169

12

1
2

R136

100_1%

R96

100_1%

12
12

0_5%

+V3S

1

R84

10K_5%

2

1

R126

1.65K_1%

2

CSREF

12

16-

12

16-

TP9060

TP9059

TP9058

TP9057

TP9056

TP9055

TP9054

0_5%
0_5%

C126

4700pF_25v

12

12

12

12

R125

OPEN

+V5S

1

R588

470K_1%

2

10-

VCCSENSE
VSSSENSE

Kevin Sense

1
2
3
4

12

5
6
7
8

9
10
11
12

C170

680pF_50v

118K_1%

1000pF_50v

EN
PWRGD
PGDELAY
CLKEN
FBRTN
FB
COMP
SS
ST
VARFREQ
VRTT
TTSEN

C175

48

47

45

44

42

41

46

PSI

DPRSTP

CLIM

PMONFS

15

0_5%

C219

16

VID0

LLINE

VID1

CSCOMP

17

12

R128

VID243VID3

CSFEF

18

1
2

19

40

VID4

RAMP20CSSUM

21

R130

80.6K_1%

49

TML

DPRSLP

U11

ADI_ADP3208_LFCSP_48P

PMON

13

14

1

R127

2

VCOREGND

1
2

VCOREGND

1000pF_50v

1

R93

10_5%

2

C128

1
2

2.2uF_6.3v

1

R90

100K_5%

2

VCOREGND

37

39

SP

VCC

VID5

VID6

36

BST1

35

DRVH1

34

SW1

33

PVCC1

32

DRVL1

31

PGND1

30

PGND2

29

DRVL2

28

PVCC2

27

SW2

26

DRVH2

25

BST2

RPM22RT

VRPM

GND

23 38

24

1

1

R131

237K_1%

2

2

R133

12

C220

VCOREGND

12

12

12

C174

680pF_50v

R129

1

274K_1%

105K_1%

68K_1%R169

0_5%

12

1000pF_50v

R171 105K_1%
R170

1
2

7-,9-,11-,12-,34-,50-

SLP_S3#_3R

+V5AUXON_1

VR_PWRGD_CK505

+V5S

6-,8-,10-,12-,18-,29-,30-,31-,32-,34-,36-,39-,40-,45-,47-,50-,53-,55-,56-

+VBAT

5-,6-,7-,8-,9-,10-,29-,32-,52-,53-,55-

10uF_25v_K_X5R

C257

1
2

3

12

D16

BAT54A

R92

12

2.2_5%

C606

2.2uF_6.3v

2

1
2

VCOREGND

1000pF_50v

C176

0.1uF_25v

1
2

C178

12

12

R132

2.2_5%

1

C605

2

2.2uF_6.3v

R172

12

1K_1%

C177

12

0.1uF_25v

+VBAT

5-,6-,7-,8-,9-,10-,29-,32-,52-,53-,55-

10uF_25v_K_X5R

C335

1
2

http://laptop-motherboard-schematic.blogspot.com/

1

R168

76.8K_1%

2

1

R173

220K_5%

2

NTC Thermistor, place near L706

6-,10-

C256

1
2

0.01uF_50v

C297

1
2

0.01uF_50v

12

D23

6-

C255

1
2

R5045

12

0_5%

Q23

FDS6676AS

R5046

12

0_5%

C336

1
2

R5047

12

0_5%

Q32

FDS6676AS

R5048

12

0_5%

3

BAT54A

R294

12

470K_5%

C341

0.22uF_16v

G

4

G

41S23

1

FAIR_NC7WZ17_SC70_6P

2

89

4G321

765

8

D

G

1S23

4

89

4G321

8765

D

G

4S123

FDS6676AS

CHANGE by

+V3S

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

D22

CHENMKO_BAT54_3P

5

U20-A

1

6

2

13

R295

12

470K_5%

34-

SB_3S_VRMPWRGD

1

C342

2

0.22uF_16v

5

U20-B

3

2

C343

0.1uF_16v

4

FAIR_NC7WZ17_SC70_6P

567

Q26

SI7686DP_T1_E3

L30

12

8765

D

S

123

1
2

Q22

FDS6676AS

567

Q30

1

R95

22_5%

2

C132

680pF_50v

MPC1040LR36

CSREF

1

R134

10_1%

2

10-

2

10_1%

1

R174

SI7686DP_T1_E3

L32

12

1

R614

8765

22_5%

D

2

C652

1
2

680pF_50v

MPC1040LR36

Q31

INVENTEC

TITLE

30-Apr-2007RDEE3A

A3

12

19-,34-,50-

PM_PWROK

+VCC_CORE

16-

CHEELA 2.0

CPU POWER(VCC_CORE)

DOC. NUMBER REV

CODESIZE

CS

SHEET

OF

10 59

A011310A2128301

SLP_S4#_3R

8-,34-,40-,50-

SLP_S3#_3R

7-,9-,10-,11-,12-,34-,50-

SLP_S3_3R

+V1.8

8-,11-,19-,23-,24-,26-,27-

C89

1
2

10uF_6.3v

C74

1
2

0.1uF_10v

11-,12-

1

R65

OPEN

2

8-,11-,19-,23-,24-,26-,27-

C73

1
2

0.1uF_16v

1

R64

0_5%

2

U6

1

GND

2

EN

3

VTTS

4

TML-PAD

GMT_G2998F11U_SOP_8P

19-,26-,27-

C82

1

0.1uF_10v

2

NOTE: DDR2 REGULATOR

29-,55-

Q12

4

S

3

G

AO6409

1

R58

270K_5%

2

SSM3K17FU

VTT_IN

VDDQVREF

D

VTT

VCC

M_VREF

1
2
5
6

G

Q13

G

7-,8-,9-,12-,36-,48-,53-,55-,56-

8

7

6

5
9

+V1.8S+V1.8

C72

220uF_2.5v

1

R57

470_5%

2

D

D

S

S

+V5A

1
2

1

2

C88

1uF_6.3v

MAX 4.1A

1
2

C90

10uF_6.3v

1
2

+V0.9S

POWERPAD_2_0610

PAD5

1
2

C71

0.1uF_16v

MAX : 1A

28-

C91

10uF_6.3v

+V1.5S_PG

SLP_S3#_3R

8-,9-

BAT54A

7-,9-,10-,11-,12-,34-,50-

2

D21 3

1

+V3S

6-,10-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

+V3A

5-,7-,11-,12-,33-,34-,35-,36-,40-,44-,45-,50-,52-,53-,54-,55-,56-

1
2

5

U19-A

6

1

FAIR_NC7WZ17_SC70_6P

2

+V3A

5-,7-,11-,12-,33-,34-,35-,36-,40-,44-,45-,50-,52-,53-,54-,55-,56-

5

U19-B

4

3

FAIR_NC7WZ17_SC70_6P

2

C367

0.1uF_10v

1
2

1

R284

100K_5%

2

C338

0.1uF_16v

9-,29-,50-

PWR_GOOD_3

SLP_S3_3R

11-,12-

http://laptop-motherboard-schematic.blogspot.com/

CHANGE by

RDEE3A 30-Apr-2007

INVENTEC

TITLE

CHEELA 2.0

+V0.9S / +V1.8S / POWER GOOD

CODE

SIZE DOC. NUMBER REV

A3

1310A2128301 A01

CS

SHEET OF

5911

+V5A

7-,8-,9-,11-,36-,48-,53-,55-,56-

SLP_S3#_3R

SLP_S3_3R

7-,9-,10-,11-,34-,50-

11-

Q37

G

G

SSM3K17FU

+V5LA

6-,7-,50-

1

R281

10K_5%

2

D

D

S

S

D20

13

CHENMKO_BAT54_3P

R280

12

220K_5%

D12

1

3

CHENMKO_BAT54_3P

R70

12

220K_5%

+V3A

Q38

1

4

D

S

2
5
63

G

AO6409

Q39

4

1

D

S

2
5
63

G

AO6409

C331

1
2

1000pF_50v

Q36

G

G

SSM3K17FU

5-,7-,11-,33-,34-,35-,36-,40-,44-,45-,50-,52-,53-,54-,55-,56-

Q15

4

1

S

D

2
5
63

G

AO6409

Q14

4

1

S

C100

G

AO6409

OPEN

12

D

2
5
63

Q16

G

G

SSM3K17FU

1

2

D

D

S

S

1

2

D

D

S

S

R69

200_5%

R279

200_5%

+V3S

1

2

C99

10uF_10v

+V5S

6-,8-,10-,18-,29-,30-,31-,32-,34-,36-,39-,40-,45-,47-,50-,53-,55-,56-

MAX 8A

1

C332

2

22uF_10v

MAX 6A

http://laptop-motherboard-schematic.blogspot.com/

CHANGE by

RDEE3A 30-Apr-2007

INVENTEC

TITLE

CHEELA 2.0

POWER(+V3S / +V5S)

CODE

DOC. NUMBERSIZE

A3

1310A2128301 A01

CS

SHEET

REV

OF

5912

+VCCP

CPU_BSEL1

CPU_BSEL2
CLK_R3S_ICH14
CLK_R3S_SIO14

Reserve for EMI

+V3S

CLKREQ_R_MCH#

FSA

FSB

1

0

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

L39

BLM11A121S

1

15-,19­15-,19­34­56-

C5026

1

OPEN

2

R328

12

10K_5%

19-

FSB CLOCK

FSC

FREQUENCY

01
01

Layout note: All decoupling 0.1uF disperse closed to pin

2

C347

1

10uF_10v

2

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

R250

10K_5%

12

R297 2.2K_5%

12

R299 12.1_1%

12

R296 10K_5%

12

475_1%

HOST CLOCK
FREQUENCY

667
800

*CLKREQ# pin controls SRC Table.

Byte5: bit6 =0(PWD)

SRC0

CR#_A

Byte5: bit7=0, disable CR#_A; 1,enable CR#_A

Byte5: bit2 =0(PWD)

SRC0 SRC2

CR#_C

Byte5: bit3=0, disable CR#_C; 1,enable CR#_C

Byte5: bit6 =1

SRC2

Byte5: bit2 =1

C673

C680

1

1

0.1uF_16v

0.1uF_16v

2

2

CPU_BSEL0

+VCCP

1

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

2

12.1_1%R298

2

R330

1

CLK_R3S_KBPCI

CLK_PWRGD

166

CLK_R3S_CARD48

CLK_R3S_ICH48

CLK_REF14

CLKREQ_R_SATA#

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

+V3S

R331

10K_5%

12

10K_5%_OPEN

50-

34-

ICH_3S_SMCLK

ICH_3S_SMDATA

C653

33pF_50v

Please place close to CLKGEN within 500mils

1
2

26-,27-,34­26-,27-,34-

1
2

C677

C674

1

0.1uF_16v

0.1uF_16v

2

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

R343

12

15-,19-

2.2K_5%

12

39-

12

34-

R339 12.1_1%

+V3S

12

34-

R329

12

R251 0_5%

X4

14.31818MHZ

12

1
2

C654

33pF_50v

30PPM

1

0.1uF_16v

2

R326

10K_5%

R325

12

0_5%_OPEN

1

12

200

http://laptop-motherboard-schematic.blogspot.com/

Byte5: bit4 =0(PWD)

CR#_B

CR#_D

SRC1

Byte5: bit5=0, disable CR#_B; 1,enable CR#_B

Byte5: bit0 =0(PWD)

SRC1

Byte5: bit1=0, disable CR#_D; 1,enable CR#_D

C678

+VCCP

2

R341

OPEN

1

2

R337

OPEN

1

12.1_1%R344

2

33_5%R332

Byte5: bit4 =1

SRC4

Byte5: bit0 =1

SRC4

1
2

475_1%

C676

0.1uF_16v

CLK_ICH48

CLK_ICH48

12

R327

CLK_3S_KBCPCI

CR#_E

CR#_F

CR#_G

CR#_H

+V3S

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

Layout note: All decoupling 0.1uF disperse closed to pin

L46

BLM11A121S

1

2

C344

1
2

10uF_10v

U21

26

VDDSRC_IO

45

VDDSRC_IO

36

VDDSRC_IO

12

VDD96_IO

39

VDDSRC_IO

61

VDDREF

20

VDDPLL3_IO

49

VDDCPU_IO

9

VDD48

2

VDDPCI

55

VDDCPU

16

VDD

10

SUB_48MHZ_FSLA

57

FSLB_TEST_MODE

62

REF0_FSLC_TEST_SEL

1

PCI0_CR#_A

3

PCI1_CR#_B

4

PCI2_TME

5

PCI3

56

CK_PWRGD_PD#

64

SCLK

63

SDTAT

60

X1

59

X2

8

GNDPCI

11

GND48

15

GND

19

GND

23

GNDSRC

29

27MHz_NonSS_SRCT1_SE1

GNDSRC

42
58
52

GNDSRC
GNDREF
GNDCPU

27MHz_SS_SRCC1_SE2

ICS_ICS9LPRS365_TSSOP_64P

PCI_STOP#

CPU_STOP#

CPUT1_F
CPUC1_F

CPUT0
CPUC0

CPUT2_ITP_SRCT8
CPUC2_ITP_SRCC8

SRCT11_CR#_H

SRCC11_CR#_G

SRCT10

SRCC10

SRCT9
SRCC9

SRCT7_CR#_F

SRCC7_CR#_E

SRCT6
SRCC6

PCI4_27_Select
PCI_F5_ITP_EN

SRCT4
SRCC4

SRCT3_CR#_C
SRCC3_CR#_D

SRCT2_SATAT
SRCC2_SATAC

SRCC0_DOTT_96
SRCT0_DOTC_96

NC

Byte6: bit7=0, disable CR#_E; 1,enable CR#_E

SRC6

Byte6: bit6=0, disable CR#_F; 1,enable CR#_F

SRC8

Byte6: bit5=0, disable CR#_G; 1,enable CR#_G

SRC9

Byte6: bit4=0, disable CR#_H; 1,enable CR#_H

SRC10

C346

1
2

0.1uF_16v

48

38
37

CLK_R_MCHBCLK

51

CLK_R_MCHBCLK#

50

CLK_R_CPUBCLK

54

CLK_R_CPUBCLK#

53

CLK_R_PCIE_DL

47

CLK_R_PCIE_DL#

46

ICH_NEWCARD_R_CLKEN#

33

CLKREQ_MINI1#_R

32

CLK_R_PCIE_CARD

34

CLK_R_PCIE_CARD#

35

CLK_R_PCIE_MINI1

30

CLK_R_PCIE_MINI1#

31

CLK_R_PCIE_MINI2

44

CLK_R_PCIE_MINI2#

43

CLK_R_PCIE_ICH

41
40

CLK_R_PCIE_ICH#

CLK_CBPCI

6
7

CLK_3S_ICHPCI

CLK_R_PEG_MCH

27

CLK_R_PEG_MCH#

28

CLK_R_PCIE_LAN

24

CLK_R_PCIE_LAN#

25

CLK_R_SATA1

21

CLK_R_SATA1#

22

SSCLK1_DREF

17

SSCLK1_DREF#

18

CLK_R_PEG_REF

13

CLK_R_PEG_REF#

14

1
2

C345

0.1uF_16v

C672

1

1

2

2

0.1uF_16v

0.1uF_16v

12.1_1% R334

12

12.1_1% R336

12

R338

12

CHANGE by

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

C675

C671

1
2

0.1uF_16v

12

12.1_1%

12.1_1%R340

+V3S

C679

1
2

0.1uF_16v

475_1%
475_1%

0_5%_OPEN R348

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

12

10K_5%

12

0_5%_OPEN

R342

12

10K_5%

1

R261

10K_5%

2

12
12

12
12

R333

R335

R264
R632

R3470_5%_OPEN

+V3S

1

R262

10K_5%

2

R263

10K_5%

56­39­45­35-

+V3S

1

1

R633

10K_5%

2

2

CLK_R3S_SIOPCI
CLK_R3S_CBPCI
CLK_R3S_MINICARDPCI
CLK_R3S_ICHPCI

27_Selet =0

LCD_SST 100MHZ

27_Selet =1

27MHZ non-spread clock

INVENTEC

TITLE

CHEELA 2.0

CLOCK_GENERATOR

CODE

SIZE

RDEE3A 15-Jun-2007

A3

34-

PCISTOP#_3

34-

CPUSTOP#_3

21-

CLK_R_MCHBCLK

21-

CLK_R_MCHBCLK#

14-

CLK_R_CPUBCLK

14-

CLK_R_CPUBCLK#

38-

CLK_R_PCIE_DL

38-

CLK_R_PCIE_DL#

40-

CLKREQ_R_NEWCARD#

45-

CLK_REQ_MINI1#

40-

CLK_R_PCIE_CARD

40-

CLK_R_PCIE_CARD#

45-

CLK_R_PCIE_MINI1

45-

CLK_R_PCIE_MINI1#

45-

CLK_R_PCIE_MINI2

45-

CLK_R_PCIE_MINI2#

34-

CLK_R_PCIE_ICH

34-

CLK_R_PCIE_ICH#

19-

CLK_R_PEG_MCH

19-

CLK_R_PEG_MCH#

43-

CLK_R_PCIE_LAN

43-

CLK_R_PCIE_LAN#

33-

CLK_R_SATA1

33-

CLK_R_SATA1#
27M_NONSS

27M_SS

29-

CLK_R_PEG_REF

29-

CLK_R_PEG_REF#

DOC. NUMBER

1310A2128301 A01

CS

SHEET

REV

OF

5913

H_A#(35:3)

H_ADSTB#1

H_STPCLK#

H_A20M#
H_FERR#

H_IGNNE#

H_INTR

H_NMI

H_SMI#

21-

H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)

H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)

21-

33­33­33-

33­33­33­33-

H_REQ#(4:0)

21-

H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)

H_ADSTB#0

21-

CN18-1

J4

478

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD01

N5

RSVD02

T2

RSVD03

V3

RSVD04

B2

RSVD05

C3

RSVD06

D2

RSVD07

D22

RSVD08

D3

RSVD09

F6

RSVD010

FOX_PZ4782K_274M_41_478P

GMCH CPU

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

ADDR GROUP 0

INIT#

CONTROL

LOCK#

RESET#

RS0#
RS1#
RS2#

TRDY#

HIT#

HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TCK

TDI

ADDR GROUP 1

TDO
TMS

XDP/ITP SIGNALS

TRST#

DBR#

THERMAL

PROCHOT#

THERMDA
THERMDC

THERMTRIP#

ICH

H CLK

BCLK0
BCLK1

RESERVED

6-,19-,33-

21­21­21-

21­21­21-

21-

33-

21-

21-

21-

21­21-

14­14­14-

14-

34-

18­18-

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1
F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

R176

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

2

56_5%

D21
A24
B25

C7

1

+VCCP

10mils/10mils

http://laptop-motherboard-schematic.blogspot.com/

13­13-

+VCCP

ICH8

A22
A21

+VCCP

H_ADS#
H_BNR#
H_BPRI#

H_DEFER#
H_DRDY#
H_DBSY#

H_BREQ#0

H_INIT#

H_LOCK#

H_CPURST#

H_TRDY#
H_HIT#

H_HITM#

H_BPM5_PREQ#
H_TCK
TDI_FLEX

H_TMS

XDP_DBRESET#

H_THERMDA
H_THERMDC

PM_THRMTRIP#

CLK_R_CPUBCLK
CLK_R_CPUBCLK#

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

R522

12

54.9_1%

R521

12

150_5%

R520

12

39_5%

R518

12

27_5%

H_RS#(0)
H_RS#(1)
H_RS#(2)

21-

14-

14-

14-

14-

+VCCP

CLOSED TO CPU

H_RS#(0:2)

H_BPM5_PREQ#

TDI_FLEX

H_TMS

H_TCK

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

1

R175

56_5%

2

H_TRST#

1

R519

619_1%

2

PM_THRMTRIP# should be T at CPU

CHANGE by

RDEE3A

30-Apr-2007

INVENTEC

TITLE

CHEELA 2.0

Merom-1

DOC. NUMBERSIZE

CODE

A3

CS

SHEET

14

REV

A011310A2128301

OF

59

H_D#(63:0)

H_DSTBN#0
H_DSTBP#0

H_DINV#0

H_D#(63:0)

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

1

R217

1K_1%

2

1

2

R218

2K_1%

GTLREF

Layout note: Zo=55 ohm,

0.5" max for GTLREF.

15-,21-

21­21­21-

15-,21-

H_DSTBN#1
H_DSTBP#1

H_DINV#1

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

CN18-2

H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)

H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)

21­21­21-

13-,19­13-,19­13-,19-

E22

478

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

DATA GRP 0

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

DATA GRP 1

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

MISC

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

FOX_PZ4782K_274M_41_478P

http://laptop-motherboard-schematic.blogspot.com/

1

2

R246

OPEN

1

R245

OPEN

2

C258

1

OPEN

2

Place C5134 close to the TEST4 pin.
Make sure TEST4 routing is reference

to GND and away from other noisy signals.

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#

DATA GRP 2DATA GRP 3

D41#
D42#
D43#
D44#
D45#
D46#

D47#
DSTBN2#
DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63#
DSTBN3#
DSTBP3#

DINV3#

COMP0
COMP1
COMP2
COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

1

2

R98

OPEN

1

2

R99

OPEN

H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)

H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)

12

R220 27.4_1%

12

R219 54.9_1%

12

27.4_1%R523

12

R524 54.9_1%

10-,19-,33-

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

21­21­21-

CLOSED TO CPU

33-

H_DPSLP#

21-

H_DPWR#

33-

H_PWRGD

21-

H_CPUSLP#

10-

PSI#

H_DSTBN#3
H_DSTBP#3
H_DINV#3

H_DPRSTP#

15-,21-

15-,21-

21­21­21-

H_D#(63:0)

H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#(63:0)

INVENTEC

TITLE

CHEELA 2.0

Merom-2

SIZE CODE

A3

CHANGE by OF

30-Apr-2007RDEE3A

CS

SHEET

15

REVDOC. NUMBER

A011310A2128301

59

PLACE THESE INSIDE SOCKET

CAVITY ON L8 (NORTH SIDE

SECONDARY)

PLACE THESE INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDE
SECONDARY)

PLACE THESE INSIDE SOCKET
CAVITY ON L1 (NORTH SIDE

PRIMARY)

PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE
SECONDARY)

SOUTH SIDE SECONDARY

NORTH SIDE SECONDARY

1
2

1
2

1
2

1
2

1
2

1
2

1

2

1

2

C611

10uF_6.3v

C610

10uF_6.3v

C188

10uF_6.3v

C232

10uF_6.3v

C222

C179

C615

2

10uF_6.3v

C636

1
2

10uF_6.3v

C607

1
2

10uF_6.3v

C190

1
2

10uF_6.3v

C641

C224

1
2

10uF_6.3v

10uF_6.3v

C613

C182

1
2

10uF_6.3v

10uF_6.3v

1

330uF_2v_6mR

330uF_2v_6mR

C233

2 330uF_2v_6mR

330uF_2v_6mR

1

C192

330uF_2v_6mR

2

1
2

1
2

1
2

1
2

1
2

1
2

C231

10uF_6.3v

C223

10uF_6.3v

1

2

1

2

C181

10uF_6.3v

C640

10uF_6.3v

C616

10uF_6.3v

C614

10uF_6.3v

C637

1
2

10uF_6.3v

C609

1
2

10uF_6.3v

C221

C180

330uF_2v_6mR

11
2

1
2

1
2

1
2

1
2

1
2

C191

10uF_6.3v

C230

10uF_6.3v

C225

10uF_6.3v

C184

10uF_6.3v

C183

10uF_6.3v

C639

10uF_6.3v

1
2

1
2

1
2

1
2

1
2

1
2

C608

10uF_6.3v

C189

10uF_6.3v

C638

10uF_6.3v

C635

10uF_6.3v

C612

10uF_6.3v

C634

10uF_6.3v

+VCC_CORE

10-,16-

CN18-3

A7

478

VCC001

A9

VCC002

A10

VCC003

A12

VCC004

A13

VCC005

A15

VCC006

A17

VCC007

A18

VCC008

A20

VCC009

B7

VCC010

B9

VCC011

B10

VCC012

B12

VCC013

B14

VCC014

B15

VCC015

B17

VCC016

B18

VCC017

B20

VCC018

C9

VCC019

C10

VCC020

C12

VCC021

C13

VCC022

C15

VCC023

C17

VCC024

C18

VCC025

D9

VCC026

D10

VCC027

D12

VCC028

D14

VCC029

D15

VCC030

D17

VCC031

D18

VCC032

E7

VCC033

E9

VCC034

E10

VCC035

E12

VCC036

E13

VCC037

E15

VCC038

E17

VCC039

E18

VCC040

E20

VCC041

F7

VCC042

F9

VCC043

F10

VCC044

F12

VCC045

F14

VCC046

F15

VCC047

F17

VCC048

F18

VCC049

F20

VCC050

AA7

VCC051

AA9

VCC052

AA10

VCC053

AA12

VCC054

AA13

VCC055

AA15

VCC056

AA17

VCC057

AA18

VCC058

AA20

VCC059

AB9

VCC060

AC10

VCC061

AB10

VCC062

AB12

VCC063

AB14

VCC064

AB15

VCC065

AB17

VCC066

AB18

VCC067

FOX_PZ4782K_274M_41_478P

VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099

VCC0100

VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16

VCCA01
VCCA02

VCCSENSE

VSSSENSE

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

+VCC_CORE

10-,16-

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,33-,36-,55-

1

C228

2

220uF_2v_15mR_Panasonic

1
2

C187

0.1uF_16v

C186

1
2

0.1uF_16v

http://laptop-motherboard-schematic.blogspot.com/

10-

H_VID0

10-

H_VID1

10-

H_VID2

10-

H_VID3

10-

H_VID4

10-

H_VID5

10-

H_VID6

LAYOUT NOTE:

ROUTE VCCSENSE AND VSSSENSE TRACE AT

24.7 OHM WITH 50 MIL SPACEING
PLACE PU AND PD WITHIN I INCH OF CPU

+VCC_CORE

10-,16-

1

R135

100_1%

2

1

R97

100_1%

2

10-

10-

VCCSENSE

VSSSENSE

LAYOUT NOTE:

PLACE C2461 NEAR PIN B26

PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)

C185

1
2

C229

1
2

0.1uF_16v

0.1uF_16v

8-,9-,24-,33-,34-,36-,38-,40-,45-,55-

C301

0.01uF_16v

1
2

+V1.5S

1
2

C227

0.1uF_16v

C226

1
2

0.1uF_16v

1

C300

10uF_6.3v

2

INVENTEC

TITLE

CHEELA 2.0

Merom-3

CODE

CS

SHEET

DOC. NUMBER

16 59

SIZE

CHANGE by OF

30-Apr-2007RDEE3A

A3

REV

A011310A2128301

http://laptop-motherboard-schematic.blogspot.com/

CN18-4

A4

478

VSS001

A8

VSS002

A11

VSS003

A14

VSS004

A16

VSS005

A19

VSS006

A23

VSS007

AF2

VSS008

B6

VSS009

B8

VSS010

B11

VSS011

B13

VSS012

B16

VSS013

B19

VSS014

B21

VSS015

B24

VSS016

C5

VSS017

C8

VSS018

C11

VSS019

C14

VSS020

C16

VSS021

C19

VSS022

C2

VSS023

C22

VSS024

C25

VSS025

D1

VSS026

D4

VSS027

D8

VSS028

D11

VSS029

D13

VSS030

D16

VSS031

D19

VSS032

D23

VSS033

D26

VSS034

E3

VSS035

E6

VSS036

E8

VSS037

E11

VSS038

E14

VSS039

E16

VSS040

E19

VSS041

E21

VSS042

E24

VSS043

F5

VSS044

F8

VSS045

F11

VSS046

F13

VSS047

F16

VSS048

F19

VSS049

F2

VSS050

F22

VSS051

F25

VSS052

G4

VSS053

G1

VSS054

G23

VSS055

G26

VSS056

H3

VSS057

H6

VSS058

H21

VSS059

H24

VSS060

J2

VSS061

J5

VSS062

J22

VSS063

J25

VSS064

K1

VSS065

K4

VSS066

K23

VSS067

K26

VSS068

L3

VSS069

L6

VSS070

L21

VSS071

L24

VSS072

M2

VSS073

M5

VSS074

M22

VSS075

M25

VSS076

N1

VSS077

N4

VSS078

N23

VSS079

N26

VSS080

P3

VSS081

FOX_PZ4782K_274M_41_478P

VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

CHANGE by

RDEE3A 30-Apr-2007

INVENTEC

TITLE

CHEELA 2.0

Merom-4

SIZE

A3

DOC. NUMBER

1310A2128301 A01

CS

SHEET

REVCODE

OF

5917

1
2

FAN1_PWM_3

http://laptop-motherboard-schematic.blogspot.com/

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

THRM_SHUTDWN#

18-,29-

1

R249

10K_5%

2

+V3S

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

2N7002

1

S

G

2

D

3

Q34

Q33

3

D

2

G

S

1

2N7002

C127

10uF_6.3v

50-

C129

1
2

1uF_6.3v

R91

1K_5%

R73

12

10K_5%

2N7002

+V3S

12

R248

220K_5%

12

C302

0.01uF_16v

+V5S

6-,8-,10-,12-,29-,30-,31-,32-,34-,36-,39-,40-,45-,47-,50-,53-,55-,56-

Q20

2

3

D

S

G

AO3413

1

C130

12

6-

1

R94

1K_5%

2

THER_SD#

1

0.01uF_16v_OPEN

2

Q18

3

D

2

G

S

1

THRM_SHUTDWN#

D15

3

CHENMKO_BAT54_3P

1

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

H_THERMDA
H_THERMDC

18-,29-

14­14-

1
2

C259

12

2200pF_50v

C131

OPEN

FAN CN

CN14

1

3

2
3

MLX_53398_0371_3P

+V3S

C260

1
2

0.01uF_16v

U16

1
2
3
4

A&D_ADM1032ARM_MICRO_SO_8P

6-,10-,11-,12-,13-,18-,19-,24-,26-,27-,29-,30-,32-,33-,34-,35-,36-,38-,39-,40-,41-,42-,43-,45-,47-,49-,50-,52-,55-,56-

+V3S

VCC

G1

GND
REFENCE

VDD
D+
D­THERM#

G

G2

G

SCLK

SDATA

ALERT#

GND

1

R74

10K_5%

2

50-

C104

1
2

0.01uF_50v

8
7
6

R221

5

FAN_TACH1

12

0_5%

34-,35-

50­50-

EC_3S_SMCLK0
EC_3S_SMDATA0

THERM#

Thermal Sensor For CPU

CHANGE by

RDEE3A

30-Apr-2007

INVENTEC

TITLE

CHEELA 2.0

THERMAL&FAN CONTROLLER

CODE

DOC. NUMBERSIZE

A3

1310A2128301 A01

CS

SHEET

OF

REV

5918