Acer Aspire 9500 Schematics

Page 1
A
1 1
B
C
D
E
Compal Confidential
2 2
HQD70/HDQ71 Schematics Document
Intel Dothan Processor with 915PM/915GM + DDRII + ICH6M
(With ATi M26-P)
3 3
2005-07-29
REV: 2.0
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
E
B
150,
of
Page 2
A
B
C
D
E
Compal Confidential
Model Name : HDQ70 File Name : LA-2781
1 1
DVI-D Conn.
page 16
Fan Control
(G993)
LCD Conn.
page 15
page 39
CRT & TV-out
page 14
Pentium-M(Dothan)
uPGA-478 Package
H_A#(3..31)
533MHz
PSB
page 4,5
H_D#(0..63)
Thermal Se nsor
G781
page 4
Memory BUS(DDRII)
DVI Transmitter
CH7307C
page 16
PCI-Express
Intel 915PM/GM
uFCBGA-1257
page 6,7,8,9,10
Dual Channel
1.8V DDRII 400/533
VGA/B Conn.
LCD Conn.
2 2
IDSEL:AD16 (PIRQE#, GNT#2, REQ#2)
IEEE 1394
TSB43AB22A
page 25
page 15
IDSEL:AD19 (PIRQH/A#, GNT#4, REQ#4)
Mini PCI socket
(TV-Tuner) (WLAN)
page 29
1394 Conn.
3 3
page 25
with 128/256MB VRAM
3.3V 33 MHz
IDSEL:AD18 (PIRQG/H#, GNT#3, REQ#3)
Mini PCI socket
page 28
IDSEL:AD17 (PIRQF#, GNT#3, REQ#3)
LAN (GbE)
RTL8110SBL/ RTL8100CL
RJ45
page 27
page 26
PCI BUS
IDSEL:AD20 (PIRQA#, GNT#2, REQ#2)
CardBus
ENE CB714
Slot 0
page 23
Intel ICH6-M
page 22
4 in 1 socket
page 23
ATI M26-P
DMI
BGA-609
page 17,18,19,20
PCI Express
3.3V 48MHz
3.3V 24.576MHz/48Mhz
3.3V ATA-100 S-ATA
IDE
S-ATA HDD Conn.
page 21
New Card Socket
USB port 3
CDROM Conn.
HDD Conn.
LPC BUS
Clock Generator
ICS 954226AG
page 13
200pin DDRII-SO-DIMM X2
BANK 0, 1, 2, 3
page 24
AC-LINK/Azalia
USB conn x5
USB port 0, 1, 2, 4, 6
page 11,12
page 31
MDC 1.5 Conn
page 21
page 21
page 33
Audio AMP
page 37
Bluetooth Conn
USB port5
USB port 1
HDA Codec
ALC260D
page 36
Subwoofer
page 36
page 38
RTC CKT.
page 35
Power On/Off CKT.
page 39
4 4
DC/DC Interface CKT.
page 40
Button/B Conn.
page 34
TP/B Co nn.
page 34
LCM Conn.
page 34
Touch Pad
EC I/O Buffer
Power Circuit DC/DC
page 41,42,43,44, 45,46,47,48
A
B
ENE KB910Q
page 34
page 33
page 32
Int.KBD
page 33
Parallel Port
page 30
BIOS
page 33
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
Super I/O
SMsC LPC47N217
Deciphered Date
page 30
FIR
D
page 30
Title
Size Document Number Rev
B
Date: Sheet
Phone Jack x3
page 37
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
B
250,
E
of
Page 3
A
Voltage Rails
Power Plane Description
1 1
2 2
VIN B+ +CPU_CORE +0.9VS 0 .9V s wi t ched power rail for DDR terminator +1.05VS +1.5VALW 1.5V always on power rail +1.5VS +1.8V +1.8VS 1.8V switched power rail +2.5VS +3VALW +3VS +5VALW +5VS +VSB VSB always on power rail ON ON* +RTC V C C RTC power
Adapter power supply (19V) AC or batte ry power rail for power circuit. Core voltage for CPU
1.05V switched power rail
1.5V switched power rail
1.8V power rail for DDR
2.5V switched power rail
3.3V always on power rail
3.3V switched power rail 5V always on power rail 5V switched power rail
B
S1 S3 S5
N/A N/A N/A
ON OFF ON OFF ON OFF OF F ON ON OFF OF F ON ON ON ON ON ON
ON ON
N/AN/AN/A OFF OFF
ON*ON
ON
OFF OFF
OFF
OFF
OFF
ON ON*
OFF
OFF
ON
ON*
OFF
OFFON
ONON
C
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S1# SLP_S3#
HIGH HIGH HIGH HIGH
LOW
LOW
LOW LOW LOW LOW
D
LOW
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7 NC
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
AD_BID
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
E
SLP_S4# SLP_S5# +VA LW +V +VS Clock
0 V
HIGH
LOWLOWLOW
ON
HIGHHIGHHIGH
HIGH
HIGH
Vtyp
ON
ON
ON
ON
AD_BID
0 V 0 V
0.503 V
0.819 V
ON
ON
ON
OFF
OFF
V
AD_BID
0.538 V
0.875 V
ON ON
ON
OFF
OFF
OFF
max
1.185 V 1.264 V
2.200 V
3.300 V
2.341 V
3.300 V
LOW
OFF
OFF
OFF
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
External PCI Devices
Device IDSEL # REQ # / GNT # Interrupts
CardBus(SD)
1394
LAN Mini-PCI(WLAN) Mini-PCI(TV-Tuer)
3 3
AD20 AD16 0 AD17 AD18 AD19 4
EC SM Bus1 address
Device
Smart Battery EEPROM(24C16/02) GMT G781-1
Address Address
1010 000X b 1001 101X b
2
3 1
PIRQA/PIRQB PIRQE PIRQF PIRQG/PORQH PIRQH/PORQA
EC SM Bus2 address
Device
GMT G781
1001 100X b0001 011X b
BOARD ID Table
Board ID
0 1 2
*
3 4 5 6 7
SKU ID Table
SKU ID
0 1 2 3
PCB Revision
0.1
0.2
0.3
1.0
SKU
PM GM
BTO Option Table
BTO Item BOM Structure
VGA LAN
TV-TUNER TV_TUNER@
PM@ GM@
8110S@ 8100C@
4 5 6
ICH6M SM Bus address
Device
4 4
Clock Generator ( ICS 954226)
DDR DIMM0 DDR DIMM2
A
Address
1101 001Xb
1001 000Xb 1001 010Xb
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
7
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
B
350,
E
of
Page 4
5
H_A#[3..31]6
D D
H_REQ#[0..4]6
C C
H_RS#[0..2]6
B B
A A
H_A#[3..31]
H_REQ#[0..4]
H_RS#[0..2]
H_ADSTB#06 H_ADSTB#16
CLK_CPU_BCLK13
CLK_CPU_BCLK#13
H_ADS#6 H_BNR#6
H_BPRI#6
H_BR0#6
H_DEFER#6
H_DRDY#6
H_HIT#6 H_HITM#6
H_LOCK#6
H_CPURST#6
H_TRDY#6
H_DBSY#6 H_DPSLP#18 H_DPRSTP#18 H_DPWR#6
H_PWRGOOD18
H_CPUSLP#6,18
H_THERMTRIP#6,18
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_IERR# H_CPURST#
H_RS#0 H_RS#1 H_RS#2
ITP_DBRRESET#
PRO_CHOT# H_PWRGOOD
H_CPUSLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST#
THERMDA THERMDC
THERMDA & THERMDC Trace / Space = 10 / 10 mil
5
4
JP33A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
ADDR GROUP
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
U3
ADSTB0#
AE5
ADSTB1#
A16
ITP_CLK0
A15
ITP_CLK1
B15
BCLK0
B14
BCLK1
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4
HITM#
A4
IERR#
J2
LOCK#
B11
RESET#
H1
RS0#
K1
RS1#
L2
RS2#
M3
TRDY#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
A7
DBR#
M2
DBSY#
B7
DPSLP#
G1
DPRSTP#
C19
DPWR#
A10
PRDY#
B10
PREQ#
B17
PROCHOT#
E4
PWRGOOD
A6
SLP#
A13
TCK
C12
TDI
A12
TDO
C5
TEST1
F23
TEST2
C11
TMS
B13
TRST#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
TYCO_1612365-1_Dothan
4
Dothan
DATA GROUP
HOST CLK
CONTROL GROUP
MISC
THERMAL DIODE
LEGACY CPU
3
H_D#0
A19
D0# D1# D2# D3# D4# D5# D6# D7# D8#
D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M# FERR#
IGNNE#
INIT#
LINT0 LINT1
STPCLK#
SMI#
A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
D25 J26 T24 AD20
C23 K24 W25 AE24 C22 L24 W24 AE25
C2 D3 A3 B5 D1 D4
C6 B4
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DINV#0 6 H_DINV#1 6 H_DINV#2 6 H_DINV#3 6
H_DSTBN#0 6 H_DSTBN#1 6 H_DSTBN#2 6 H_DSTBN#3 6 H_DSTBP#0 6 H_DSTBP#1 6 H_DSTBP#2 6 H_DSTBP#3 6
H_A20M# 18 H_FERR# 18 H_IGNNE# 18 H_INIT# 18 H_INTR 18 H_NMI 18
H_STPCLK# 18 H_SMI# 18
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
H_D#[0..63]
2200P_0402_50V7K
EC_SMB_CK232 EC_SMB_DA232
Deciphered Date
H_D#[0..63] 6
C480
1
2
2
THERMDA THERMDC
ITP_TDI ITP_TDO H_CPURST# ITP_TMS PRO_CHOT# H_PWRGOOD H_IERR#
ITP_DBRRESET#
ITP_TRST#
ITP_TCK TEST1 TEST2
2
+3VS
1
C473
0.1U_0402_16V4Z
2
U38
2 3 8 7
G781_SOP8
R430 150_0402_5% R427 54.9_0402_1%@ R429 54.9_0402_1%@ R428 40.2_0402_1% R433 56_0402_5% R435 200_0402_5% R434 56_0402_5%
R437 150_0402_5%
R431 680_0402_5% R432 27.4_0402_1% R436 1K_0402_5%@ R454 1K_0402_5%@
VDD1
D+
ALERT#
D-
THERM#
SCLK SDATA
GND
12 12 12 12 12 12 12
12
12 12 12 12
Title
Size Document Number Rev
B
Date: Sheet
星期日
1
12
R416
10K_0402_5%@
1 6 4 5
+1.05VS
+3VS
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
01, 2006
一月
1
B
450,
of
Page 5
5
JP33B
1
2
+1.05VS
VCCSENSE VSSSENSE
GTL_REF0
COMP0 COMP1 COMP2 COMP3
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
B2
RSVD
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
TYCO_1612365-1_Dothan
COMP0 COMP1 COMP2 COMP3
Dothan
R186 54.9_0402_1%@
1 2
R194 54.9_0402_1%@
1 2
+VCCA
D D
1.8V FOR DOTHAN-A
1 2
+1.8VS
R479 0_1206_5%@
1.5V FOR DOTHAN-B
1 2
+1.5VS
R488 0_1206_5%
C C
R183 1K_0402_1%
B B
A A
1 2
R182 2K_0402_1%
20mils
1
C534
0.01U_0402_16V7K
+1.05VS
R504 27.4_0402_1% R509 54.9_0402_1% R180 27.4_0402_1% R178 54.9_0402_1%
C545
2
10U_0805_10V4Z
+CPU_CORE
PSI#48
CPU_VID048 CPU_VID148
12
CPU_VID248 CPU_VID348 CPU_VID448 CPU_VID548
CPU_BSEL013 CPU_BSEL113
1 2 1 2 1 2 1 2
TRACE CLOSELY CPU < 0.5'
COMP0, COMP2 layout : Width 18mils and Space 25mils COMP1, COMP3 layout : Space 25mils
5
4
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1
+1.05VS
1
+
2
150U_D2_6.3VM
POWER, GROUNG, RESERVED SIGNALS AND NC
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0.1U_0402_16V4Z
1
C524
2
Issued Date
3
+CPU_CORE
330U_D_2VM
1
+
C54
2
330U_D_2VM@
+CPU_CORE
10U_0805_10V4Z
1
C110
2
10U_0805_10V4Z
+CPU_CORE
10U_0805_10V4Z
1
C130
C142
2
10U_0805_10V4Z
+CPU_CORE
10U_0805_10V4Z
1
C560
C561
2
10U_0805_10V4Z
+CPU_CORE
10U_0805_10V4Z
1
C618
C617
2
10U_0805_10V4Z
+CPU_CORE
10U_0805_10V4Z
1
C145
C154
2
10U_0805_10V4Z
Vcc-core Decoupling
SPCAP,Polymer MLCC 0805 X5R
0.1U_0402_16V4Z
1
C158
C26
2
0.1U_0402_16V4Z
3
2
1
2
1
C116
2
10U_0805_10V4Z
1
2
10U_0805_10V4Z
1
2
10U_0805_10V4Z
1
2
10U_0805_10V4Z
1
2
10U_0805_10V4Z
+
C53
C125
C123
C569
C607
C131
330U_D_2VM
1
2
1
2
1
2
1
2
1
2
1
+
C647
2
10U_0805_10V4Z
1
C134
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C114
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C581
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C596
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C118
2
10U_0805_10V4Z
2 x 330uF (7+9mOhm/2)
10U_0805_10V4Z
1
1
C144
C109
C586
C585
C76
2
1
2
1
2
1
2
1
2
C152
10U_0805_10V4Z
C107
10U_0805_10V4Z
C600
10U_0805_10V4Z
C577
10U_0805_10V4Z
C90
C151
2
10U_0805_10V4Z
1
C108
2
10U_0805_10V4Z
1
C608
2
10U_0805_10V4Z
1
C567
2
10U_0805_10V4Z
1
C85
2
10U_0805_10V4Z
1
2
1
2
1
2
1
2
1
2
C,uF ESR, mohm ESL,nH
2X330uF 7m ohm/2 3.5nH/2 35X10uF 5m ohm/35 0.6nH/35
1
C28
2
0.1U_0402_16V4Z
Deciphered Date
0.1U_0402_16V4Z
1
C22
2
0.1U_0402_16V4Z
1
1
C29
2
0.1U_0402_16V4Z
2005/07/29 2006/07/29
C23
2
1
2
1
C24
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C25
2
2
1
C27
2
0.1U_0402_16V4Z
+CPU_CORE
C153
1
JP33C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22 AA5 AA7
AA9 AA11 AA13 AA15 AA17 AA19 AA21
AB6
AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22
AC9 AC11 AC13 AC15 AC17 AC19
AD8 AD10 AD12 AD14 AD16 AD18
AE9 AE11 AE13 AE15 AE17 AE19
AF8
AF10 AF12 AF14 AF16 AF18
M4
M5 M21 M24
N3
N6 N22 N23 N26
P2
P5 P21 P24
R1 R4
R6 R22 R25
T3
T5 T21 T23
TYCO_1612365-1_Dothan
Title
Size Document Number Rev
B
Date: Sheet
星期日
Dothan
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
POWER, GROUND
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
01, 2006
一月
T26
VSS
U2
VSS
U6
VSS
U22
VSS
U24
VSS
V1
VSS
V4
VSS
V5
VSS
V21
VSS
V25
VSS
W3
VSS
W6
VSS
W22
VSS
W23
VSS
W26
VSS
Y2
VSS
Y5
VSS
Y21
VSS
Y24
VSS
AA1
VSS
AA4
VSS
AA6
VSS
AA8
VSS
AA10
VSS
AA12
VSS
AA14
VSS
AA16
VSS
AA18
VSS
AA20
VSS
AA22
VSS
AA25
VSS
AB3
VSS
AB5
VSS
AB7
VSS
AB9
VSS
AB11
VSS
AB13
VSS
AB15
VSS
AB17
VSS
AB19
VSS
AB21
VSS
AB23
VSS
AB26
VSS
AC2
VSS
AC5
VSS
AC8
VSS
AC10
VSS
AC12
VSS
AC14
VSS
AC16
VSS
AC18
VSS
AC21
VSS
AC24
VSS
AD1
VSS
AD4
VSS
AD7
VSS
AD9
VSS
AD11
VSS
AD13
VSS
AD15
VSS
AD17
VSS
AD19
VSS
AD22
VSS
AD25
VSS
AE3
VSS
AE6
VSS
AE8
VSS
AE10
VSS
AE12
VSS
AE14
VSS
AE16
VSS
AE18
VSS
AE20
VSS
AE23
VSS
AE26
VSS
AF2
VSS
AF5
VSS
AF9
VSS
AF11
VSS
AF13
VSS
AF15
VSS
AF17
VSS
AF19
VSS
AF21
VSS
AF24
VSS
550,
1
of
B
Page 6
5
H_RS#[0..2]
H_A#[3..31]4 H_REQ#[0..4]4
D D
C C
CLK_MCH_BCLK#13 CLK_MCH_BCLK13
B B
H_A#[3..31]
H_ADSTB#04 H_ADSTB#14
H_DSTBN#04 H_DSTBN#14 H_DSTBN#24 H_DSTBN#34 H_DSTBP#04 H_DSTBP#14 H_DSTBP#24 H_DSTBP#34 H_DINV#04 H_DINV#14 H_DINV#24 H_DINV#34
H_CPURST#4
H_ADS#4 H_TRDY#4
H_DPWR#4
H_DRDY#4 H_DEFER#4
H_HITM#4 H_HIT#4 H_LOCK#4 H_BR0#4 H_BNR#4 H_BPRI#4 H_DBSY#4
Un-pop for Dothan-A
R82 0_0402_5%
12
R36 100_0603_1%
12
R35 200_0603_1%
1 2
5
H_CPUSLP#4,18
A A
(5mil:15mil) (12mil:10mil)
H_VREF H_XSWING H_YSWING
1
C75
0.1U_0402_16V4Z
2
H_RS#[0..2] 4
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
CPU_SLP# H_RS#0 H_RS#1 H_RS#2
0.1U_0402_16V4Z
U40A
G9
HA3#
Alviso
C9
HA4#
E9
HA5#
B7
HA6#
A10
HA7#
F9
HA8#
D8
HA9#
B10
HA10#
E10
HA11#
G10
HA12#
D9
HA13#
E11
HA14#
F10
HA15#
G11
HA16#
G13
HA17#
C10
HA18#
C11
HA19#
D11
HA20#
C12
HA21#
B13
HA22#
A12
HA23#
F12
HA24#
G12
HA25#
E12
HA26#
C13
HA27#
B11
HA28#
D13
HA29#
A13
HA30#
F13
HA31#
A11
HPCREQ#
A7
HREQ#0
D7
HREQ#1
B8
HREQ#2
C7
HREQ#3
A8
HREQ#4
B9
HADSTB#0
E13
HADSTB#1
AB1
HCLKN
AB2
HCLKP
G4
HDSTBN#0
K1
HDSTBN#1
R3
HDSTBN#2
V3
HDSTBN#3
G5
HDSTBP#0
K2
HDSTBP#1
R2
HDSTBP#2
W4
HDSTBP#3
H8
HDINV#0
K3
HDINV#1
T7
HDINV#2
U5
HDINV#3
H10
HCPURST#
F8
HADS#
B5
HTRDY#
G6
HDPWR#
F7
HDRDY#
E6
HDEFER#
F6
HEDRDY#
D6
HHITM#
D4
HHIT#
B3
HLOCK#
E7
HBREQ0#
A5
HBNR#
D5
HBPRI#
C6
HDBSY#
G8
HCPUSLP#
A4
HRS0#
C5
HRS1#
B4
HRS2#
ALVISO_BGA1257PM@
CPU_SLP#
+1.05VS +1.05VS+1.05VS
12
R68 221_0603_1%
1
C59
2
12
R52 100_0603_1%
HOST
HXRCOMP HXSCOMP HYRCOMP HYSCOMP
HXSWING HYSWING
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
HVREF
4
E4 E1 F4 H7 E2 F1 E3 D3 K7 F2 J7 J8 H6 F3 K8 H5 H1 H2 K5 K6 J4 G3 H3 J1 L5 K4 J5 P7 L7 J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6 W6 U3 V5 W8 W7 U2 U1 Y5 Y2 V4 Y7 W1 W3 Y3 Y6 W2
J11 C1 C2 T1 L1 D1 P1
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_VREF H_XRCOMP
R43 24.9_0402_1%
H_XSCOMP
R45 54.9_0402_1%
H_YRCOMP
R116 24.9_0402_1%
H_YSCOMP
R104 54.9_0402_1%
H_XSWING H_YSWING
H_D#[0..63]H_REQ#[0..4]
Alviso Check List : NC
12
1 2
12
1 2
H_D#[0..63] 4
R163 40.2_0402_1%@ R164 40.2_0402_1%@
R172 80.6_0402_1%
+1.8V
R174 80.6_0402_1%
+1.05VS
1 2 1 2
1 2 1 2
H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil
12
R107 221_0603_1%
(12mil:10mil)
1
C91
0.1U_0402_16V4Z
2
12
R111 100_0603_1%
4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DMI_ITX_MRX_N019 DMI_ITX_MRX_N119 DMI_ITX_MRX_N219 DMI_ITX_MRX_N319
DMI_ITX_MRX_P019 DMI_ITX_MRX_P119 DMI_ITX_MRX_P219 DMI_ITX_MRX_P319
DMI_MTX_IRX_N019 DMI_MTX_IRX_N119 DMI_MTX_IRX_N219 DMI_MTX_IRX_N319
DMI_MTX_IRX_P019 DMI_MTX_IRX_P119 DMI_MTX_IRX_P219 DMI_MTX_IRX_P319
(10mil:20mil)
3
U40B
DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3
DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3
DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3
DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3
DDRA_CLK011 DDRA_CLK111
DDRB_CLK012 DDRB_CLK112
DDRA_CLK0#11 DDRA_CLK1#11
DDRB_CLK0#12 DDRB_CLK1#12
DDRA_CKE011 DDRA_CKE111 DDRB_CKE012 DDRB_CKE112
DDRA_SCS#011 DDRA_SCS#111 DDRB_SCS#012 DDRB_SCS#112
DDRA_ODT011 DDRA_ODT111 DDRB_ODT012 DDRB_ODT112
10mils 10mils
R159
1K_0402_1%
R151
1K_0402_1%
10mils 10mils
10mils 10mils
+1.8V
M_OCDCOMP0 M_OCDCOMP1
M_RCOMPN M_RCOMPP SMVREF
M_XSLEW M_YSLEW
12
0.1U_0402_16V4Z
12
C124
2005/07/29 2006/07/29
3
AA31
DMIRXN0
AB35
DMIRXN1
AC31
DMIRXN2
AD35
DMIRXN3
Y31
DMIRXP0
AA35
DMIRXP1
AB31
DMIRXP2
AC35
DMIRXP3
AA33
DMITXN0
AB37
DMITXN1
AC33
DMITXN2
AD37
DMITXN3
Y33
DMITXP0
AA37
DMITXP1
AB33
DMITXP2
AC37
DMITXP3
AM33
SM_CK0
AL1
SM_CK1
AE11
SM_CK2
AJ34
SM_CK3
AF6
SM_CK4
AC10
SM_CK5
AN33
SM_CK0#
AK1
SM_CK1#
AE10
SM_CK2#
AJ33
SM_CK3#
AF5
SM_CK4#
AD10
SM_CK5#
AP21
SM_CKE0
AM21
SM_CKE1
AH21
SM_CKE2
AK21
SM_CKE3
AN16
SM_CS0#
AM14
SM_CS1#
AH15
SM_CS2#
AG16
SM_CS3#
AF22
SM_OCDCOMP0
AF16
SM_OCDCOMP1
AP14
SM_ODT0
AL15
SM_ODT1
AM11
SM_ODT2
AN10
SM_ODT3
AK10
SMRCOMPN
AK11
SMRCOMPP
AF37
SMVREF0
AD1
SMVREF1
AE27
SMXSLEWIN
AE28
SMXSLEWOUT
AF9
SMYSLEWIN
AF10
SMYSLEWOUT
SMVREF
15mils
1
1
2
C127
0.1U_0402_16V4Z
2
Deciphered Date
ALVISO_BGA1257PM@
2
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12
DMIDDR MUXING
CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
RSVD21 RSVD22
CFG/RSVD
RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
BM_BUSY#
EXT_TS0# EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
PM
DREF_CLKN DREF_CLKP
DREF_SSCLKP
CLK
DREF_SSCLKN
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9
NC10
NC
NC11
2
G16 H13 G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25
J23 J21 H22 F5 AD30 AE29
A24 A23 D37 C37
AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37
1
CLK_DREF_SSC CLK_DREF_SSC#
CFG0 MCH_CLKSEL1 MCH_CLKSEL0
CFG5 CFG6 CFG7
CFG9
CFG12 CFG13
CFG16 CFG18
CFG19
R56 0_0402_5%PM@
1 2
R46 0_0402_5%PM@
1 2
MCH_CLKSEL1 13 MCH_CLKSEL0 13
CFG0
R85 10K_0402_5%
CFG5
R86 1K_0402_5%@
CFG6
R66 1K_0402_5%
CFG7
R51 1K_0402_5%@
CFG9
R67 1K_0402_5%@
CFG12
R50 1K_0402_5%@
CFG13
R90 1K_0402_5%@
CFG16
R94 1K_0402_5%@
1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2
CFG[17:3]: internal pull-up
CFG18
R84 1K_0402_5%@
CFG19
1 2
R83 1K_0402_5%@
1 2
CFG[19:18]: internal pull-down
EXT_TS#0 EXT_TS#1 H_THERMTRIP#
CLK_DREF_96M# CLK_DREF_96M CLK_DREF_SSC CLK_DREF_SSC#
CFG[2:0] CFG5 CFG6 CFG7
CFG9
CFG[13:12]
CFG16 (FSB Dynamic ODT)
CFG18 (VCC Select)
CFG19 (VTT Select)
PM_BMBUSY# 19
H_THERMTRIP# 4,18 VGATE 13,19,48
PLT_RST# 17,19,21,30,32
CLK_DREF_96M# 13 CLK_DREF_96M 13 CLK_DREF_SSC 13 CLK_DREF_SSC# 13
EXT_TS#0
R97 10K_0402_5%
EXT_TS#1
Title
Size Document Number Rev
B
Date: Sheet
星期日
01, 2006
1 2
R96 10K_0402_5%
1 2
Refer to sheet 6 for FSB frequency select Low = DMI x 2
High = DMI x 4 Low = DDR-II
High = DDR-I Low = DT/Transportable CPU
High = Mobile CPU Low = Reverse Lane
High = Normal Operation 00 = Reserved
01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation (Default)
Low = Disabled High = Enabled
Low = 1.05V (Default) High = 1.5V
Low = 1.05V (Default) High = 1.2V
* *
*
*
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
一月
1
+1.5VS
*
*
650,
+1.05VS
+2.5VS
+2.5VS
*
*
B
of
Page 7
5
4
3
2
1
DDRA_SDQ[0..63]11
DDRA_SDM[0..7]11
D D
C C
B B
DDRA_SMA[0..13]11
DDRA_SBS0#11 DDRA_SBS1#11 DDRA_SBS2#11 DDRB_SBS2#12
DDRA_SDQS011 DDRA_SDQS111 DDRA_SDQS211 DDRA_SDQS311 DDRA_SDQS411 DDRA_SDQS511 DDRA_SDQS611 DDRA_SDQS711
DDRA_SDQS0#11 DDRA_SDQS1#11 DDRA_SDQS2#11 DDRA_SDQS3#11 DDRA_SDQS4#11 DDRA_SDQS5#11 DDRA_SDQS6#11 DDRA_SDQS7#11
DDRA_SCAS#11 DDRA_SRAS#11
DDRA_SWE#11
AF28,AF29 should be routed to a via AF14,AF15 should be routed to a via
DDRA_SDQ[0..63] DDRA_SDM[0..7]
DDRA_SMA[0..13]
DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7
DDRA_SDQS0 DDRA_SDQS1 DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7
DDRA_SDQS0# DDRA_SDQS1# DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7#
DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13
AK15 AK16
AL21 AJ37
AP35
AL29
AP24
AP9 AP4
AJ2
AD3
AK36 AP33 AN29 AP23
AM8 AM4
AJ1
AE5
AK35 AP34 AN30 AN23
AN8 AM5 AH1
AE4
AL17 AP17 AP18 AM17 AN18 AM18
AL19 AP20 AM19
AL20 AM16 AN20 AM20 AM15
AN15 AP16
AF29
AF28 AP15
SA_BS0# SA_BS1# SA_BS2#
SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7
SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13
SA_CAS# SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE#
ALVISO_BGA1257PM@
DDRB_SDQ[0..63]12 DDRB_SDM[0..7]12
DDRB_SMA[0..13]12
U40C
SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8
SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43
DDR MEMORY SYSTEM A
SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
AG35 AH35 AL35 AL37 AH36 AJ35 AK37 AL34 AM36 AN35 AP32 AM31 AM34 AM35 AL32 AM32 AN31 AP31 AN28 AP28 AL30 AM30 AM28 AL28 AP27 AM27 AM23 AM22 AL23 AM24 AN22 AP22 AM9 AL9 AL6 AP7 AP11 AP10 AL7 AM7 AN5 AN6 AN3 AP3 AP6 AM6 AL4 AM3 AK2 AK3 AG2 AG1 AL3 AM2 AH3 AG3 AF3 AE3 AD6 AC4 AF2 AF1 AD4 AD5
DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63
DDRB_SBS0#12 DDRB_SBS1#12
DDRB_SDQS012 DDRB_SDQS112 DDRB_SDQS212 DDRB_SDQS312 DDRB_SDQS412 DDRB_SDQS512 DDRB_SDQS612 DDRB_SDQS712
DDRB_SDQS0#12 DDRB_SDQS1#12 DDRB_SDQS2#12 DDRB_SDQS3#12 DDRB_SDQS4#12 DDRB_SDQS5#12 DDRB_SDQS6#12 DDRB_SDQS7#12
DDRB_SCAS#12 DDRB_SRAS#12
DDRB_SWE#12
DDRB_SDQ[0..63] DDRB_SDM[0..7]
DDRB_SMA[0..13]
DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7
DDRB_SDQS0 DDRB_SDQS1 DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7
DDRB_SDQS0# DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7#
DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13
AJ15 AG17 AG21
AF32 AK34 AK27 AK24
AJ10
AK5 AE7 AB7
AF34 AK32
AJ28 AK23 AM10
AH6 AF8 AB4
AF35 AK33 AK28
AJ23
AL10
AH7 AF7 AB5
AH17 AK17 AH18
AJ18 AK18
AJ19 AK19 AH19
AJ20 AH20
AJ16 AG18 AG20 AG15
AH14 AK14
AF15
AF14 AH16
SB_BS0# SB_BS1# SB_BS2#
SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7
SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13
SB_CAS# SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE#
ALVISO_BGA1257PM@
U40D
SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8
SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42
DDR SYSTEM MEMORY B
SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
AE31 AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31 AJ31 AK30 AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23 AJ22 AK22 AH24 AH23 AG22 AJ21 AG10 AG9 AG8 AH8 AH11 AH10 AJ9 AK9 AJ7 AK6 AJ4 AH5 AK8 AJ8 AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5
DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
1
B
750,
Page 8
5
+3VS +2.5VS
12
R28
2.2K_0402_5%GM@
ENBKL15,32
D D
C C
+2.5VS
R54 4.7K_0402_5%
1 2
R55 4.7K_0402_5%
1 2
R42 2.2K_0402_5%
1 2
R48 2.2K_0402_5%
1 2
R69 100K_0402_5%
1 2
R47 1.5K_0402_1%
1 2
R41 150_0402_5%
1 2
R49 150_0402_5%
1 2
R40 150_0402_5%
1 2
B B
+2.5VS
R27
2.2K_0402_5%GM@
LDDC_CLK
R24
A A
2.2K_0402_5%GM@
LDDC_DATA
G
2
1 2
13
D
S
Q4
+2.5VS
G
2
1 2
13
D
S
Q2
5
2
G
1 3
D
Q3
GMCH_TV_COMPS14 GMCH_TV_LUMA14 GMCH_TV_CRMA14
GMCH_CRT_CLK14 GMCH_CRT_DATA14 GMCH_CRT_B14
GMCH_CRT_G14 GMCH_CRT_R14
GMCH_CRT_VSYNC14 GMCH_CRT_HSYNC14
GMCH_CRT_CLK GMCH_CRT_DATA LCTLB_DATA LCTLA_CLK
LBKLT_EN LIBG GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA
GMCH_LCD_CLK
BSS138_SOT23GM@
GMCH_LCD_DATA
BSS138_SOT23GM@
S
BSS138_SOT23GM@
+3VS
+3VS
LBKLT_EN
R26
1 2
R25
1 2
GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA
R95 4.99K_0402_1%
GMCH_CRT_CLK GMCH_CRT_DATA
R70 150_0402_5% R38 150_0402_5% R39 150_0402_5%
4.7K_0402_5%GM@
GMCH_LCD_CLK 15
4.7K_0402_5%GM@
GMCH_LCD_DATA 15
4
U40G
REFSET
H24
H25 AB29 AC29
A15
C16
A17
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
E25
C23
C22
C33
C31
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
J18
J20
F25
F23 F22 F26
F28 F27
SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP
TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC
DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET
LBKLT_CTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL
LACLKN LACLKP LBCLKN LBCLKP
LADATAN0 LADATAN1 LADATAN2
LADATAP0 LADATAP1 LADATAP2
LBDATAN0 LBDATAN1 LBDATAN2
LBDATAP0 LBDATAP1 LBDATAP2
ALVISO_BGA1257PM@
SDVO_SDAT16 SDVO_SCLK16
CLK_MCH_3GPLL#13 CLK_MCH_3GPLL13
12
10mils
TV_REFSET
12 12 12
1 2
R101 255_0402_1%
10mils
LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA
GMCH_ENVDD15
GMCH_TXCLK-15 GMCH_TXCLK+15 GMCH_TZCLK-15 GMCH_TZCLK+15
GMCH_TXOUT0-15 GMCH_TXOUT1-15 GMCH_TXOUT2-15
GMCH_TXOUT0+15 GMCH_TXOUT1+15 GMCH_TXOUT2+15
GMCH_TZOUT0-15 GMCH_TZOUT1-15 GMCH_TZOUT2-15
GMCH_TZOUT0+15 GMCH_TZOUT1+15 GMCH_TZOUT2+15
GMCH_ENVDD LIBG
GMCH_TXCLK­GMCH_TXCLK+ GMCH_TZCLK­GMCH_TZCLK+
GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-
GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+
GMCH_TZOUT0­GMCH_TZOUT1­GMCH_TZOUT2-
GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PEG_COMP
EXP_COMPI
EXP_ICOMPO
EXP_RXN0/SDVO_TVCLKIN#
MISCTVVGALVDS
EXP_RXN1/SDVO_INT#
EXP_RXN2/SDVO_FLDSTALL#
EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15
EXP_RXP0/SDVO_TVCLKIN
EXP_RXP1/SDVO_INT
EXP_RXP2/SDVO_FLDSTALL
EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15
EXP_TXN0/SDVOB_RED#
EXP_TXN1/SDVOB_GREEN#
EXP_TXN2/SDVOB_BLUE#
EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#
EXP_TXN5/SDVOC_GREEN#
EXP_TXN6/SDVOC_BLUE#
EXP_TXN7/SDVOC_CLKN
PCI - EXPRESS GRAPHICS
EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15
EXP_TXP0/SDVOB_RED
EXP_TXP1/SDVOB_GREEN
EXP_TXP2/SDVOB_BLUE EXP_TXP3/SDVOB_CLKP
EXP_TXP4/SDVOC_RED
EXP_TXP5/SDVOC_GREEN
EXP_TXP6/SDVOC_BLUE EXP_TXP7/SDVOC_CLKP
EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15
2005/07/29 2006/07/29
3
D36 D34
E30 F34 G30 H34
EXP_RXN3
J30
EXP_RXN4
K34
EXP_RXN5
L30
EXP_RXN6
M34
EXP_RXN7
N30
EXP_RXN8
P34
EXP_RXN9
R30 T34 U30 V34 W30 Y34
D30 E34 F30 G34
EXP_RXP3
H30
EXP_RXP4
J34
EXP_RXP5
K30
EXP_RXP6
L34
EXP_RXP7
M30
EXP_RXP8
N34
EXP_RXP9
P30 R34 T30 U34 V30 W34
E32 F36 G32 H36 J32 K36 L32 M36 N32
EXP_TXN8
P36
EXP_TXN9
R32 T36 U32 V36 W32 Y36
D32 E36 F32 G36 H32 J36 K32 L36 M32
EXP_TXP8
N36
EXP_TXP9
P32 R36 T32 U36 V32 W36
Deciphered Date
10mils
PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_P15
PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15
PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P1
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3
2
PCIE_MTX_C_GRX_N[0..15]15
PCIE_MTX_C_GRX_P[0..15]15 PCIE_GTX_C_MRX_N[0..15]15 PCIE_GTX_C_MRX_P[0..15]15
1 2
R53 24.9_0402_1%
C437 0.1U_0402_16V4ZPM@
1 2
C462 0.1U_0402_16V4ZPM@
1 2
C492 0.1U_0402_16V4ZPM@
1 2
C512 0.1U_0402_16V4ZPM@
1 2
C525 0.1U_0402_16V4ZPM@
1 2
C548 0.1U_0402_16V4ZPM@
1 2
C570 0.1U_0402_16V4ZPM@
1 2
C583 0.1U_0402_16V4ZPM@
1 2
C428 0.1U_0402_16V4ZPM@
1 2
C455 0.1U_0402_16V4ZPM@
1 2
C484 0.1U_0402_16V4ZPM@
1 2
C503 0.1U_0402_16V4ZPM@
1 2
C519 0.1U_0402_16V4ZPM@
1 2
C544 0.1U_0402_16V4ZPM@
1 2
C562 0.1U_0402_16V4ZPM@
1 2
C580 0.1U_0402_16V4ZPM@
1 2
C434 0.1U_0402_16V4Z@
1 2
1 4 2 3
RP11 0_0404_4P2R_5%@
1 4 2 3
RP12 0_0404_4P2R_5%@
1 4 2 3
RP13 0_0404_4P2R_5%@
1 4 2 3
RP14 0_0404_4P2R_5%@
2
1
PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
+1.5VS
C427 0.1U_0402_16V4ZPM@
1 2
C453 0.1U_0402_16V4ZPM@
1 2
C482 0.1U_0402_16V4ZPM@
1 2
C496 0.1U_0402_16V4ZPM@
1 2
C518 0.1U_0402_16V4ZPM@
1 2
C543 0.1U_0402_16V4ZPM@
1 2
C559 0.1U_0402_16V4ZPM@
1 2
C579 0.1U_0402_16V4ZPM@
1 2
C425 0.1U_0402_16V4ZPM@
1 2
C447 0.1U_0402_16V4ZPM@
1 2
C471 0.1U_0402_16V4ZPM@
1 2
C490 0.1U_0402_16V4ZPM@
1 2
C513 0.1U_0402_16V4ZPM@
1 2
C535 0.1U_0402_16V4ZPM@
1 2
C551 0.1U_0402_16V4ZPM@
1 2
C573 0.1U_0402_16V4ZPM@
1 2
C448 0.1U_0402_16V4Z@
1 2
Title
Size Document Number Rev
B
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15
SDVO_INT# 16 SDVO_INT 16
SDVOB_R# 16 SDVOB_R 16
SDVOB_G# 16 SDVOB_G 16
SDVOB_B# 16 SDVOB_B 16
SDVOB_CLK# 16 SDVOB_CLK 16
850,
1
B
Page 9
5
4
3
2
1
C161
0.1U_0402_16V4Z
+1.8V
+1.8V
C632
330U_D_2VM@
+2.5VS
VCCA_LVDS (Ball A35)
+2.5VS_CRT
10U_1206_16V4Z
VCC_SYNC(Ball H20)
C166
0.1U_0402_16V4Z
12
0.1U_0402_16V4Z
1
C616
10U_0805_10V4Z
2
(0.1uF x1)
1 2
R71 0_0603_5%
C64
0.1U_0402_16V4Z
Deciphered Date
C146
0.1U_0402_16V4Z
12
0.1U_0402_16V4Z
2200mA
0.1U_0402_16V4Z
1
2
1
2
1
2
C164
0.1U_0402_16V4Z
C143
1
2
+
C122
C48
0.1U_0402_16V4Z
C710
12
12
C606
+2.5VS
1
2
12
12
C170
(10uF x2, 0.1uF x6)
C150
0.1U_0402_16V4Z
1
C49
2
0.01U_0402_16V7K
1
C72
2
0.1U_0402_16V4Z
4.7U_0805_10V4Z
+3VS
2
U40E
+1.05VS
D D
C C
+1.5VS
+1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL +1.5VS_MPLL
+1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL +1.5VS_MPLL
20mils
+1.5VS_DPLLA
1
C42
2
10U_1206_16V4Z
+1.5VS_HPLL
1
C568
2
10U_1206_16V4Z
+2.5VS
1
+
C706
2
150U_D2_6.3VM@
0.1U_0402_16V4Z@
60mA
1
C35
10U_1206_16V4Z
2
(470uF x1, 0.1uF x1)
60mA
1
C578
10U_1206_16V4Z
2
(470uF x1, 0.1uF x1) (470uF x1, 0.1uF x1)
B B
A A
T29
VCC0
R29
VCC1
N29
VCC2
M29
VCC3
K29
VCC4
J29
VCC5
V28
VCC6
U28
VCC7
T28
R28
P28 N28 M28
L28
K28
J28 H28 G28
V27 U27
T27 R27
P27 N27 M27
L27
K27
J27 H27
K26 H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19 U19
K19
W18
V18
T18
K18
K17
AC1 AC2
B23 C35 AA1 AA2
1
C707
2
0.1U_0402_16V4Z@
L7 CHB1608U301_0603
1 2
Change to 0 ohm
1
C47
2
0.1U_0402_16V4Z
L27 CHB1608U301_0603
1 2
Change to 0 ohm Change to 0 ohm
1
C115
2
0.1U_0402_16V4Z
5
POWER
VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48
VCCD_HMPLL1 VCCD_HMPLL2 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL
ALVISO_BGA1257PM@
1
C708
2
0.1U_0402_16V4Z@
1
C709
2
+1.5VS_DPLLB
+1.5VS
+1.5VS_MPLL
+1.5VS
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCA_TVBG VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCA_LVDS
VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2
VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3
VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2
VCCA_3GBG VSSA_3GBG
VCC_SYNC
VCCA_CRTDAC0 VCCA_CRTDAC1
VSSA_CRTDAC
1
2
1
C45
10U_1206_16V4Z
2
10U_1206_16V4Z
1
C590
10U_1206_16V4Z
2
10U_1206_16V4Z
F17 E17 D18 C18 F18 E18
H18 G18
D19 H17
B26 B25 A25
A35 B22
VCCHV0
B21
VCCHV1
A21
VCCHV2
B28 A28 A27
AF20 AP19 AF19 AF18
AE37
VCC3G0
W37
VCC3G1
U37
VCC3G2
R37
VCC3G3
N37
VCC3G4
L37
VCC3G5
J37
VCC3G6
Y29 Y28 Y27
F37
0.15mA
G37 H20 F19
E19 G19
L37 CHB1608U301_0603
1 2
C69
4.7U_0805_10V4Z
L9 CHB1608U301_0603
1 2
Change to 0 ohm
1
C56
2
0.1U_0402_16V4Z
L30 CHB1608U301_0603
1 2
1
C112
2
0.1U_0402_16V4Z
60mA
1
C44
2
(470uF x1, 0.1uF x1)
60mA
1
C602
2
120mA
24mA
60mA
10mA 2mA
60mA
1000mA
70mA
+2.5VS_CRT
+3VS_DAC
+1.5VS
+2.5VS
+1.5VS_DDRDLL
+1.5VS
+1.5VS_3GPLL
+2.5VS_3GBG
+2.5VS_CRT
+1.5VS
+1.5VS
4
+1.05VS
C37
1
0.47U_0603_16V4Z
2
1
C38
2
0.47U_0603_16V4Z
C106
0.22U_0603_10V7K
0.22U_0603_10V7K
1
C633
10U_1206_16V4Z
2
10U_1206_16V4Z
(100uF x1, 0.1uF x1) (220uF x1, 10uF x2)
+1.5VS_3GPLL
1
C622
2
10U_0805_10V4Z
(10uF x1, 0.1uF x1)
1
2
1
C70
2
1
C629
2
1
C113
0.1U_0402_16V4Z
2
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
K13
J13
K12
W11
V11 U11 T11 R11 P11 N11
M11
L11 K11
W10
V10
U10
T10
R10
P10 N10 M10
K10
J10
Y9
W9
U9 R9 P9 N9
M9
L9 J9 N8
M8
N7
M7
N6
M6
A6 N5
M5
N4
M4
N3
M3
N2
M2
B2 V1
N1 M1 G1
1
2
R517
0.5_0603_1%
1 2
Issued Date
U40F
VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7
POWER
VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 VTT45 VTT46 VTT47 VTT48 VTT49 VTT50 VTT51
ALVISO_BGA1257PM@
R532 0_0603_5%
1 2
C167
0.1U_0402_16V4Z
+3GPLL
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64
+1.5VS+1.5VS_DDRDLL
+1.5VS
220U_D2_4VM_R12
L29 CHB1608U301_0603
1 2
+1.5VS
Change to 0 ohm
2005/07/29 2006/07/29
3
V1.8_DDR_CAP2
AH37
V1.8_DDR_CAP5
AP29 AD28 AD27 AC27 AP26 AN26 AM26 AL26 AK26 AJ26 AH26 AG26 AF26 AE26 AP25 AN25 AM25 AL25 AK25 AJ25 AH25 AG25 AF25 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AE17 AE16 AE15 AE14 AP13 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AP12 AN12 AM12 AL12 AK12 AJ12 AH12 AG12 AF12 AE12 AD11 AC11 AB11 AB10 AB9
V1.8_DDR_CAP6
AP8
V1.8_DDR_CAP4
AM1
V1.8_DDR_CAP3
AE1
VCC3G
1
+
C591
2
10U_0805_10V4Z
+2.5VS_3GBG
1
2
V1.8_DDR_CAP1
AM37
+1.05VS
C77 10U_0805_10V4Z
0.1U_0402_16V4Z
1
2
C117
1
2
VCCHV(Ball A21,B21,B22)
1
2
(0.1uF x1, 0.01uF x1)
VCCA_CRTD AC(Ball F19 ,E19)
1
2
(10uF x1, 0.1uF x1)
C43
+1.5VS
1
C51
2
0.1U_0402_16V4Z
2.2U_0805_16V4Z
L8
CHB1608U301_0603
1 2
1
C31
+
2
150U_D2_6.3VM
+1.05VS
4000mA
10U_0805_10V4Z
C119
1
C98
2
0.1U_0402_16V4Z
1
2
C126
1
2
0.1U_0402_16V4Z
(10uF x1, 0.1uF x1)
C40
4.7U_0805_10V4Z
C65
0.1U_0402_16V4Z
VCCD_TVDAC (Ball D19)
0.1U_0402_16V4Z
1
C57
2
(10uF x1, 0.1uF x1)
950mA
1
C73
2
2.2U_0805_16V4Z
Title
Size Document Number Rev
B
Date: Sheet
+3VS_DAC
1
2
10U_1206_16V4Z
星期日
(10uF x3, 0.1uF x3)
1
C92
2
10U_0805_10V4Z
1
C121
2
0.1U_0402_16V4Z
1
C52
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C79
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C139
2
1
C41
2
4.7U_0805_10V4Z
(4.7uF x1, 0.1uF x1)
1
C101
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C141
1
2
VCCTX_LVDS(Ball A27,A28,B28)
(0.1uF x1, 0.022uF x1)
1
C61
2
0.022U_0402_16V7K
(0.1uF x1, 0.022uF x1)
0.1U_0402_16V4Z
1
2
1
C55
2
0.022U_0402_16V7K
1
C74
2
VCCDQ_TVDAC (Ball H17)VCCD_LVDS(Ball A25,B25,B26)
(0.1uF x1, 0.022uF x1)
C83
0.022U_0402_16V7K
(0.47uF x2, 0.22uF x2)
1
C84
2
1
C100
2
2.2U_0805_16V4Z
VCCA_TVDAC VCCA_TVBG
0.022U_0402_16V7K
1
C703
C60
2
0.1U_0402_16V4Z
120mA
1
C71
2
1
C39
2
2.2U_0805_16V4Z
(0.1uF x1, 0.022uF x1)(0.1uF x1, 0.022uF x1)
(Ball H18)
0.022U_0402_16V7K
1
C50
2
0.1U_0402_16V4Z
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
01, 2006
一月
401353
950,
1
1
C93
2
1
2
C46
0.1U_0402_16V4Z
1
2
1
C63
2
of
B
Page 10
5
4
3
2
1
U40H
+1.05VS
D D
C C
B B
+1.05VS
A A
L12
VTT_NCTF17
M12
VTT_NCTF16
N12
VTT_NCTF15
P12
VTT_NCTF14
R12
VTT_NCTF13
T12
VTT_NCTF12
U12
VTT_NCTF11
V12
VTT_NCTF10
W12
VTT_NCTF9
L13
VTT_NCTF8
M13
VTT_NCTF7
N13
VTT_NCTF6
P13
VTT_NCTF5
R13
VTT_NCTF4
T13
VTT_NCTF3
U13
VTT_NCTF2
V13
VTT_NCTF1
W13
VTT_NCTF0
Y12
VSS_NCTF68
AA12
VSS_NCTF67
Y13
VSS_NCTF66
AA13
VSS_NCTF65
L14
VSS_NCTF64
M14
VSS_NCTF63
N14
VSS_NCTF62
P14
VSS_NCTF61
R14
VSS_NCTF60
T14
VSS_NCTF59
U14
VSS_NCTF58
V14
VSS_NCTF57
W14
VSS_NCTF56
Y14
VSS_NCTF55
AA14
VSS_NCTF54
AB14
VSS_NCTF53
L15
VSS_NCTF52
M15
VSS_NCTF51
N15
VSS_NCTF50
P15
VSS_NCTF49
R15
VSS_NCTF48
T15
VSS_NCTF47
U15
VSS_NCTF46
V15
VSS_NCTF45
W15
VSS_NCTF44
Y15
VSS_NCTF43
AA15
VSS_NCTF42
AB15
VSS_NCTF41
L16
VSS_NCTF40
M16
VSS_NCTF39
N16
VSS_NCTF38
P16
VSS_NCTF37
R16
VSS_NCTF36
T16
VSS_NCTF35
U16
VSS_NCTF34
V16
VSS_NCTF33
W16
VSS_NCTF32
Y16
VSS_NCTF31
AA16
VSS_NCTF30
AB16
VSS_NCTF29
R17
VSS_NCTF28
Y17
VSS_NCTF27
AA17
VSS_NCTF26
AB17
VSS_NCTF25
AA18
VSS_NCTF24
AB18
VSS_NCTF23
AA19
VSS_NCTF22
AB19
VSS_NCTF21
AA20
VSS_NCTF20
AB20
VSS_NCTF19
R21
VSS_NCTF18
Y21
VSS_NCTF17
AA21
VSS_NCTF16
AB21
VSS_NCTF15
Y22
VSS_NCTF14
AA22
VSS_NCTF13
AB22
VSS_NCTF12
Y23
VSS_NCTF11
AA23
VSS_NCTF10
AB23
VSS_NCTF9
Y24
VSS_NCTF8
AA24
VSS_NCTF7
AB24
VSS_NCTF6
Y25
VSS_NCTF5
AA25
VSS_NCTF4
AB25
VSS_NCTF3
Y26
VSS_NCTF2
AA26
VSS_NCTF1
AB26
VSS_NCTF0
V25
VCC_NCTF10
W25
VCC_NCTF9
L26
VCC_NCTF8
M26
VCC_NCTF7
N26
VCC_NCTF6
P26
VCC_NCTF5
R26
VCC_NCTF4
T26
VCC_NCTF3
U26
VCC_NCTF2
V26
VCC_NCTF1
W26
VCC_NCTF0
ALVISO_BGA1257
PM@
5
VCCSM_NCTF31 VCCSM_NCTF30 VCCSM_NCTF29 VCCSM_NCTF28 VCCSM_NCTF27 VCCSM_NCTF26 VCCSM_NCTF25 VCCSM_NCTF24 VCCSM_NCTF23 VCCSM_NCTF22 VCCSM_NCTF21 VCCSM_NCTF20 VCCSM_NCTF19 VCCSM_NCTF18 VCCSM_NCTF17 VCCSM_NCTF16 VCCSM_NCTF15 VCCSM_NCTF14 VCCSM_NCTF13 VCCSM_NCTF12 VCCSM_NCTF11 VCCSM_NCTF10
VCCSM_NCTF9 VCCSM_NCTF8 VCCSM_NCTF7 VCCSM_NCTF6 VCCSM_NCTF5 VCCSM_NCTF4 VCCSM_NCTF3 VCCSM_NCTF2 VCCSM_NCTF1 VCCSM_NCTF0
VCC_NCTF78 VCC_NCTF77 VCC_NCTF76 VCC_NCTF75 VCC_NCTF74 VCC_NCTF73 VCC_NCTF72 VCC_NCTF71 VCC_NCTF70
NCTF
VCC_NCTF69 VCC_NCTF68 VCC_NCTF67 VCC_NCTF66 VCC_NCTF65 VCC_NCTF64 VCC_NCTF63 VCC_NCTF62 VCC_NCTF61 VCC_NCTF60 VCC_NCTF59 VCC_NCTF58 VCC_NCTF57 VCC_NCTF56 VCC_NCTF55 VCC_NCTF54 VCC_NCTF53 VCC_NCTF52 VCC_NCTF51 VCC_NCTF50 VCC_NCTF49 VCC_NCTF48 VCC_NCTF47 VCC_NCTF46 VCC_NCTF45 VCC_NCTF44 VCC_NCTF43 VCC_NCTF42 VCC_NCTF41 VCC_NCTF40 VCC_NCTF39 VCC_NCTF38 VCC_NCTF37 VCC_NCTF36 VCC_NCTF35 VCC_NCTF34 VCC_NCTF33 VCC_NCTF32 VCC_NCTF31 VCC_NCTF30 VCC_NCTF29 VCC_NCTF28 VCC_NCTF27 VCC_NCTF26 VCC_NCTF25 VCC_NCTF24 VCC_NCTF23 VCC_NCTF22 VCC_NCTF21 VCC_NCTF20 VCC_NCTF19 VCC_NCTF18 VCC_NCTF17 VCC_NCTF16 VCC_NCTF15 VCC_NCTF14 VCC_NCTF13 VCC_NCTF12 VCC_NCTF11
AB12 AC12 AD12 AB13 AC13 AD13 AC14 AD14 AC15 AD15 AC16 AD16 AC17 AD17 AC18 AD18 AC19 AD19 AC20 AD20 AC21 AD21 AC22 AD22 AC23 AD23 AC24 AD24 AC25 AD25 AC26 AD26
L17 M17 N17 P17 T17 U17 V17 W17 L18 M18 N18 P18 R18 Y18 L19 M19 N19 P19 R19 Y19 L20 M20 N20 P20 R20 Y20 L21 M21 N21 P21 T21 U21 V21 W21 L22 M22 N22 P22 R22 T22 U22 V22 W22 L23 M23 N23 P23 R23 T23 U23 V23 W23 L24 M24 N24 P24 R24 T24 U24 V24 W24 L25 M25 N25 P25 R25 T25 U25
+1.8V
+1.05VS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
U40I
Y1 D2
G2
J2 L2 P2 T2
V2 AD2 AE2 AH2
AL2
AN2
A3
C3 AA3 AB3 AC3
AJ3
C4
H4
L4
P4
U4
Y4 AF4 AN4
E5
W5
AL5
AP5
B6
J6
L6
P6
T6 AA6 AC6 AE6
AJ6
G7
V7 AA7 AG7 AK7 AN7
C8
E8
L8
P8
Y8
AL8
A9
H9
K9
T9
V9 AA9 AC9 AE9 AH9 AN9 D10
L10 Y10
AA10
F11
H11
Y11
ALVISO_BGA1257
PM@
VSS271 VSS270 VSS269 VSS268 VSS260 VSS259 VSS258 VSS257 VSS256 VSS255 VSS254 VSS253 VSS252 VSS251 VSS250 VSS249 VSS248 VSS247 VSS246 VSS245 VSS244 VSS243 VSS242 VSS241 VSS240 VSS239 VSS238 VSS237 VSS236 VSS235 VSS234 VSS233 VSS232 VSS231 VSS230 VSS229 VSS228 VSS227 VSS226 VSS225 VSS224 VSS223 VSS222 VSS221 VSS220 VSS219 VSS218 VSS217 VSS216 VSS215 VSS214 VSS213 VSS212 VSS211 VSS210 VSS209 VSS208 VSS207 VSS206 VSS205 VSS204 VSS203 VSS202 VSS201 VSS200 VSS199 VSS198 VSS197 VSS196
VSS
2005/07/29 2006/07/29
3
VSSALVDS
B36 AA11
VSS195
AF11
VSS194
AG11
VSS193
AJ11
VSS192
AL11
VSS191
AN11
VSS190
B12
VSS189
D12
VSS188
J12
VSS187
A14
VSS186
B14
VSS185
F14
VSS184
J14
VSS183
K14
VSS182
AG14
VSS181
AJ14
VSS180
AL14
VSS179
AN14
VSS178
C15
VSS177
K15
VSS176
A16
VSS175
D16
VSS174
H16
VSS173
K16
VSS172
AL16
VSS171
C17
VSS170
G17
VSS169
AF17
VSS168
AJ17
VSS167
AN17
VSS166
A18
VSS165
B18
VSS164
U18
VSS163
AL18
VSS162
C19
VSS161
H19
VSS160
J19
VSS159
T19
VSS158
W19
VSS157
AG19
VSS156
AN19
VSS155
A20
VSS154
D20
VSS153
E20
VSS152
F20
VSS151
G20
VSS150
V20
VSS149
AK20
VSS148
C21
VSS147
F21
VSS146
AF21
VSS145
AN21
VSS144
A22
VSS143
D22
VSS142
E22
VSS141
J22
VSS140
AH22
VSS139
AL22
VSS138
H23
VSS137
AF23
VSS136
B24
VSS135
D24
VSS134
F24
VSS133
J24
VSS132
AG24
VSS131
AJ24
VSS130
Deciphered Date
2
U40J
AL24
AN24
A26 E26 G26
J26 B27 E27 G27
W27 AA27 AB27
AF27
AG27
AJ27 AL27
AN27
E28
W28 AA28 AB28 AC28
A29 D29 E29
F29 G29 H29
L29 P29 U29 V29
W29 AA29 AD29 AG29
AJ29
AM29
C30
Y30 AA30 AB30 AC30 AE30 AP30
D31
E31
F31 G31 H31
J31 K31
L31 M31 N31 P31 R31
T31 U31 V31
W31 AD31 AG31
AL31
A32 C32
Y32 AA32 AB32
ALVISO_BGA1257
PM@
VSS267 VSS266 VSS265 VSS264 VSS263 VSS262 VSS261 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68
VSS
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS61 VSS60 VSS59 VSS58 VSS57 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 VSS26 VSS25 VSS24 VSS23 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 VSS0
1
AC32 AD32 AJ32 AN32 D33 E33 F33 G33 H33 J33 K33 L33 M33 N33 P33 R33 T33 U33 V33 W33 AD33 AF33 AL33 C34 AA34 AB34 AC34 AD34 AH34 AN34 B35 D35 E35 F35 G35 H35 J35 K35 L35 M35 N35 P35 R35 T35 U35 V35 W35 Y35 AE35 C36 AA36 AB36 AC36 AD36 AE36 AF36 AJ36 AL36 AN36 E37 H37 K37 M37 P37 T37 V37 Y37 AG37
10 50,
B
of
Page 11
5
+DIMM_VREF
DDRA_SDQ0 DDRA_SDQ1
DDRA_SDQS0#7 DDRA_SDQS07
D D
DDRA_SDQS1#7 DDRA_SDQS17
DDRA_SDQS2#7 DDRA_SDQS27
C C
DDRA_CKE06
DDRA_SBS2#7
DDRA_SBS0#7 DDRA_SWE#7
DDRA_SCAS#7 DDRA_SCS#16
DDRA_ODT16
DDRA_SDQS4#7 DDRA_SDQS47
B B
DDRA_SDQS6#7 DDRA_SDQS67
A A
D_CK_SDATA12,13 D_CK_SCLK12,13
DDRA_SDQS0# DDRA_SDQS0
DDRA_SDQ2 DDRA_SDQ3
DDRA_SDQ8 DDRA_SDQ9
DDRA_SDQS1# DDRA_SDQS1
DDRA_SDQ10 DDRA_SDQ11
DDRA_SDQ16 DDRA_SDQ17
DDRA_SDQS2# DDRA_SDQS2
DDRA_SDQ18 DDRA_SDQ19
DDRA_SDQ24 DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26 DDRA_SDQ27
DDRA_SBS2# DDRA_SMA12
DDRA_SMA9 DDRA_SMA8
DDRA_SMA5 DDRA_SMA3 DDRA_SMA1
DDRA_SMA10 DDRA_SBS0# DDRA_SWE#
DDRA_SCAS# DDRA_SCS#1
DDRA_ODT1 DDRA_SDQ32
DDRA_SDQ33 DDRA_SDQS4#
DDRA_SDQS4 DDRA_SDQ34
DDRA_SDQ35 DDRA_SDQ40
DDRA_SDQ41 DDRA_SDM5 DDRA_SDQ42
DDRA_SDQ43 DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6# DDRA_SDQS6
DDRA_SDQ50 DDRA_SDQ51
DDRA_SDQ56 DDRA_SDQ57
DDRA_SDM7 DDRA_SDQ58
DDRA_SDQ59 D_CK_SDATA
D_CK_SCLK
+3VS
+1.8V +1.8V
JP45
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
P-TWO_A5652C-A0G16
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0 CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD
BA1 RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1 CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SAO
SA1
A11
S0#
NC
A7 A6
A4 A2 A0
NC
DIMM0 STD H:5.2mm (BOT)
5
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
4
DDRA_SDQ4 DDRA_SDQ5
DDRA_SDM0 DDRA_SDQ6
DDRA_SDQ7 DDRA_SDQ12
DDRA_SDQ13 DDRA_SDM1
DDRA_SDQ14 DDRA_SDQ15
DDRA_SDQ20 DDRA_SDQ21
DDRA_SDM2 DDRA_SDQ22
DDRA_SDQ23 DDRA_SDQ28
DDRA_SDQ29 DDRA_SDQS3#
DDRA_SDQS3 DDRA_SDQ30
DDRA_SDQ31 DDRA_CKE1DDRA_CKE0
DDRA_SMA11 DDRA_SMA7 DDRA_SMA6
DDRA_SMA4 DDRA_SMA2 DDRA_SMA0
DDRA_SBS1# DDRA_SRAS# DDRA_SCS#0
DDRA_ODT0 DDRA_SMA13
DDRA_SDQ36 DDRA_SDQ37
DDRA_SDM4 DDRA_SDQ38
DDRA_SDQ39 DDRA_SDQ44
DDRA_SDQ45 DDRA_SDQS5#
DDRA_SDQS5 DDRA_SDQ46
DDRA_SDQ47 DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6 DDRA_SDQ54
DDRA_SDQ55 DDRA_SDQ60
DDRA_SDQ61 DDRA_SDQS7#
DDRA_SDQS7 DDRA_SDQ62
DDRA_SDQ63
1 2
R246 10K_0402_5%
1 2
R247 10K_0402_5%
4
3
+1.8V
+DIMM_VREF
DDRA_CLK0 6 DDRA_CLK0# 6
DDRA_SMA[0..13]7 DDRA_SDQ[0..63]7
DDRA_SDM[0..7]7
DDRA_SDQS3# 7 DDRA_SDQS3 7
DDRA_CKE1 6
DDRA_SBS1# 7 DDRA_SRAS# 7 DDRA_SCS#0 6
DDRA_ODT0 6
DDRA_SDQS5# 7 DDRA_SDQS5 7
DDRA_CLK1 6 DDRA_CLK1# 6
DDRA_SDQS7# 7 DDRA_SDQS7 7
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
DDRA_SBS2# DDRA_CKE0
DDRA_SMA9 DDRA_SMA12
DDRA_SMA5 DDRA_SMA8
DDRA_SMA1 DDRA_SMA3
DDRA_SBS0# DDRA_SMA10
DDRA_SCS#0 DDRA_SWE#
DDRA_ODT1 DDRA_SRAS#
DDRA_CKE1 DDRA_SMA11
DDRA_SMA7 DDRA_SMA6
DDRA_SMA4 DDRA_SMA2
DDRA_SMA0 DDRA_SBS1#
DDRA_SCS#1 DDRA_SCAS#
DDRA_ODT0 DDRA_SMA13
20mils
C272
2.2U_0805_16V4Z
DDRA_SMA[0..13] DDRA_SDQ[0..63] DDRA_SDM[0..7]
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1
2
1
C278
0.1U_0402_16V4Z
2
RP26 56_0404_4P2R_5%
RP27 56_0404_4P2R_5%
RP28 56_0404_4P2R_5%
RP29 56_0404_4P2R_5%
RP30 56_0404_4P2R_5%
RP31 56_0404_4P2R_5%
RP32 56_0404_4P2R_5%
RP54 56_0404_4P2R_5%
RP50 56_0404_4P2R_5%
RP52 56_0404_4P2R_5%
RP53 56_0404_4P2R_5%
RP33 56_0404_4P2R_5%
RP51 56_0404_4P2R_5%
Deciphered Date
+0.9VS
2
12
R534 1K_0402_1%
12
R533 1K_0402_1%
2
1
+1.8V +1.8V +1.8V
1
C698
1000P_0402_50V7K@
2
+1.05VS +1.5VS +3VS
1
C699
2
1000P_0402_50V7K@
1
C700
1000P_0402_50V7K@
2
For EMI
+1.8V
1
C277
2.2U_0805_16V4Z
2
+1.8V
1
C270
0.1U_0402_16V4Z
2
+0.9VS
1
C286
2
0.1U_0402_16V4Z
+0.9VS
1
C292
0.1U_0402_16V4Z
2
+0.9VS
1
C669
0.1U_0402_16V4Z
2
Title
Size Document Number Rev
B
Date: Sheet of
1
C299
2
2.2U_0805_16V4Z
1
C298
2
0.1U_0402_16V4Z
1
C288
0.1U_0402_16V4Z
2
1
C293
2
0.1U_0402_16V4Z
1
C670
2
0.1U_0402_16V4Z
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
1
C297
2.2U_0805_16V4Z
2
1
C274
0.1U_0402_16V4Z
2
1
C289
2
0.1U_0402_16V4Z
1
C291
0.1U_0402_16V4Z
2
1
C667
0.1U_0402_16V4Z
2
1
C269
2
2.2U_0805_16V4Z
1
C303
2
0.1U_0402_16V4Z
1
C287
0.1U_0402_16V4Z
2
1
C668
2
0.1U_0402_16V4Z
Compal Electronics, Inc.
1
1
C273
2.2U_0805_16V4Z
2
1
C290
2
0.1U_0402_16V4Z
1
C671
0.1U_0402_16V4Z
2
11 50,
B
Page 12
A
JP41
+DIMM_VREF
DDRB_SDQ0 DDRB_SDQ1
DDRB_SDQS0#7 DDRB_SDQS07
1 1
DDRB_SDQS1#7 DDRB_SDQS17
DDRB_SDQS2#7 DDRB_SDQS27
2 2
DDRB_CKE06
DDRB_SBS2#7
DDRB_SBS0#7 DDRB_SWE#7
DDRB_SCAS#7 DDRB_SCS#16
DDRB_ODT16
DDRB_SDQS4#7 DDRB_SDQS47
3 3
DDRB_SDQS6#7 DDRB_SDQS67
4 4
D_CK_SDATA11,13 D_CK_SCLK11,13
DDRB_SDQS0# DDRB_SDQS0
DDRB_SDQ2 DDRB_SDQ3
DDRB_SDQ8 DDRB_SDQ9
DDRB_SDQS1# DDRB_SDQS1
DDRB_SDQ10 DDRB_SDQ11
DDRB_SDQ16 DDRB_SDQ17
DDRB_SDQS2# DDRB_SDQS2
DDRB_SDQ18 DDRB_SDQ19
DDRB_SDQ24 DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26 DDRB_SDQ27
DDRB_CKE0
DDRB_SBS2# DDRB_SMA12
DDRB_SMA9 DDRB_SMA8
DDRB_SMA5 DDRB_SMA3 DDRB_SMA1
DDRB_SMA10 DDRB_SBS0# DDRB_SWE#
DDRB_SCAS# DDRB_SCS#1
DDRB_ODT1 DDRB_SDQ32
DDRB_SDQ33 DDRB_SDQS4#
DDRB_SDQS4 DDRB_SDQ34
DDRB_SDQ35 DDRB_SDQ40
DDRB_SDQ41 DDRB_SDM5 DDRB_SDQ42
DDRB_SDQ43 DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQS6# DDRB_SDQS6
DDRB_SDQ50 DDRB_SDQ51
DDRB_SDQ56 DDRB_SDQ57
DDRB_SDM7 DDRB_SDQ58
DDRB_SDQ59 D_CK_SDATA
D_CK_SCLK
+3VS
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
P-TWO_A5692C-A0G16
VSS DQ4 DQ5
VSS DM0
VSS DQ6 DQ7
VSS
DQ12 DQ13
VSS DM1
VSS
CK0
CK0#
VSS
DQ14 DQ15
VSS
VSS
DQ20 DQ21
VSS DM2
VSS
DQ22 DQ23
VSS
DQ28 DQ29
VSS
DQS3#
DQS3
VSS
DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD
BA1
RAS#
VDD
ODT0
NC/A13
VDD
VSS
DQ36 DQ37
VSS DM4
VSS
DQ38 DQ39
VSS
DQ44 DQ45
VSS
DQS5#
DQS5
VSS
DQ46 DQ47
VSS
DQ52 DQ53
VSS
CK1
CK1#
VSS DM6
VSS
DQ54 DQ55
VSS
DQ60 DQ61
VSS
DQS7#
DQS7
VSS
DQ62 DQ63
VSS SAO
SA1
A11
S0#
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106 108 110 112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DIMM1 STD H:9.2mm (BOT)
A
B
+1.8V+1.8V
DDRB_SDQ4 DDRB_SDQ5
DDRB_SDM0 DDRB_SDQ6
DDRB_SDQ7 DDRB_SDQ12
DDRB_SDQ13 DDRB_SDM1
DDRB_SDQ14 DDRB_SDQ15
DDRB_SDQ20 DDRB_SDQ21
DDRB_SDM2 DDRB_SDQ22
DDRB_SDQ23 DDRB_SDQ28
DDRB_SDQ29 DDRB_SDQS3#
DDRB_SDQS3 DDRB_SDQ30
DDRB_SDQ31 DDRB_CKE1
DDRB_SMA11 DDRB_SMA7 DDRB_SMA6
DDRB_SMA4 DDRB_SMA2 DDRB_SMA0
DDRB_SBS1# DDRB_SRAS# DDRB_SCS#0
DDRB_ODT0 DDRB_SMA13
DDRB_SDQ36 DDRB_SDQ37
DDRB_SDM4 DDRB_SDQ38
DDRB_SDQ39 DDRB_SDQ44
DDRB_SDQ45 DDRB_SDQS5#
DDRB_SDQS5 DDRB_SDQ46
DDRB_SDQ47 DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6 DDRB_SDQ54
DDRB_SDQ55 DDRB_SDQ60
DDRB_SDQ61 DDRB_SDQS7#
DDRB_SDQS7 DDRB_SDQ62
DDRB_SDQ63
1 2
R229 10K_0402_5%
1 2
R230 10K_0402_5%
B
C
+DIMM_VREF
1
C650
2.2U_0805_16V4Z
2
DDRB_CLK0 6 DDRB_CLK0# 6
DDRB_SMA[0..13]7 DDRB_SDQ[0..63]7
DDRB_SDM[0..7]7
DDRB_SDQS3# 7 DDRB_SDQS3 7
DDRB_CKE1 6
DDRB_SBS1# 7 DDRB_SRAS# 7 DDRB_SCS#0 6
DDRB_ODT0 6
DDRB_SDQS5# 7 DDRB_SDQS5 7
DDRB_CLK1 6 DDRB_CLK1# 6
DDRB_SDQS7# 7 DDRB_SDQS7 7
+3VS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
1
C651
2
0.1U_0402_16V4Z
DDRB_SBS2# DDRB_CKE0
DDRB_SMA9 DDRB_SMA12
DDRB_SMA5 DDRB_SMA8
DDRB_SMA1 DDRB_SMA3
DDRB_SBS0# DDRB_SMA10
DDRB_SCAS# DDRB_SWE#
DDRB_ODT1 DDRB_SCS#1
DDRB_CKE1 DDRB_SMA11
DDRB_SMA7 DDRB_SMA6
DDRB_SMA4 DDRB_SMA2
DDRB_SMA0 DDRB_SBS1#
DDRB_SRAS# DDRB_SCS#0
DDRB_ODT0 DDRB_SMA13
DDRB_SMA[0..13] DDRB_SDQ[0..63] DDRB_SDM[0..7]
1 4 2 3
RP48 56_0404_4P2R_5%
1 4 2 3
RP47 56_0404_4P2R_5%
RP46 56_0404_4P2R_5%
RP45 56_0404_4P2R_5%
RP49 56_0404_4P2R_5%
RP44 56_0404_4P2R_5%
RP43 56_0404_4P2R_5%
RP18 56_0404_4P2R_5%
RP19 56_0404_4P2R_5%
RP20 56_0404_4P2R_5%
RP23 56_0404_4P2R_5%
RP21 56_0404_4P2R_5%
RP22 56_0404_4P2R_5%
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
Deciphered Date
+0.9VS
D
+1.8V
1
+
C307 150U_D2_6.3VM@
2
+1.8V
1
C261
2
3300P_0402_50V7K
D
1
+
C637
330U_D2E_2.5VM
C267 3300P_0402_50V7K
C233
0.1U_0402_16V4Z
2
1
C275
2
33P_0402_50V8J
+1.8V
1
C252
2.2U_0805_16V4Z
2
+1.8V
1
C232
2
0.1U_0402_16V4Z
+0.9VS
1
C641
2
0.1U_0402_16V4Z
+0.9VS
1
C239
0.1U_0402_16V4Z
2
+0.9VS
1
C638
0.1U_0402_16V4Z
2
1
2
1
C217
2
0.1U_0402_16V4Z
1
C202
0.1U_0402_16V4Z
2
For EMI
1
2
C253
2.2U_0805_16V4Z
C231
0.1U_0402_16V4Z
C240
0.1U_0402_16V4Z
C241
0.1U_0402_16V4Z
C639
0.1U_0402_16V4Z
Title
Size Document Number Rev
B
Date: Sheet
C268
33P_0402_50V8J
1
2.2U_0805_16V4Z
2
1
2
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1
2
1
0.1U_0402_16V4Z
2
1
2
C235
C258
C242
C640
0.1U_0402_16V4Z
C643
C301
0.1U_0402_16V4Z@
1
2
2.2U_0805_16V4Z
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
2
0.1U_0402_16V4Z
1
2
1
2
C236
C260
C243
C644
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
E
1
C250
2
0.1U_0402_16V4Z
1
C300
0.1U_0402_16V4Z@
2
1
C251
2.2U_0805_16V4Z
2
1
2
1
C244
2
0.1U_0402_16V4Z
1
C642
0.1U_0402_16V4Z
2
E
C256 3300P_0402_50V7K
C302
33P_0402_50V8J
1
2
1
2
1
2
1
2
1
2
B
12 50,
of
Page 13
A
FSC FSB FSA CPU
CLKSEL0 CLKSEL1 CLKSEL2
0
1 1
0
*
0
0 1 1
+3VS
R72
4.7K_0402_5%
1 2 1 2
R100 0_0402_5%@
A
CLKSEL2
CLK_PCI2
CLK_PCI1
CLK_PCI0
1 3
+1.05VS
1 2
R154 10K_0402_5%
1 2
R102 10K_0402_5%
1 2
R152 10K_0402_5%
1 2
R149 10K_0402_5%
2 2
3 3
CK_SCLK19,24
CLKSEL0
4 4
+3VS
D
CLK_ICH_48M19 CLK_SD_48M22
CLK_14M_CODEC36
2
G
S
Q7 2N7002_SOT23
R91
1K_0402_5%@ R92
0_0402_5%
1 2
1 2
R99 0_0402_5%
11 1 1 00
R109
4.7K_0402_5%
1 2
D_CK_SCLK
33P_0402_50V8J
CLK_PCI_LPC32 CLK_PCI_MINI229 CLK_PCI_SIO30 CLK_PCI_MINI128
CLK_PCI_LAN26 CLK_PCI_PCM22 CLK_PCI_139425
CLK_PCI_ICH17
12
B
SRC
MHz
100 133 166 200
PCI
MHz
MHz
100 33.3 100
33.3
100
33.3
100
33.3
Table : ICS 95 4226AG
C68
1 2
33P_0402_50V8J
1 2
D_CK_SCLK11,12
D_CK_SDATA11,12
+3VS
CK_SDATA19,24
MCH_CLKSEL0 6
CPU_BSEL0 5
CLKSEL1
C67
Y1
14.318MHZ_16PF_DSX840GA
12
CLK_ICH_48M
CLK_14M_CODEC CLKSEL0
R161
4.7K_0402_5%
1 2 1 2
R158 0_0402_5%@
B
C
+CLK_VDD48 +CLK_VDDREF
1
C550
2
2.2U_0805_16V4Z
+CLK_VDD2
1 2
1 2
R141 12_0402_5%
1 2
R155 12_0402_5%
1 2
R89 33_0402_5%@
CLK_PCI_LPC CLK_PCI_MINI2 CLK_PCI_SIO CLK_PCI_MINI1 CLK_PCI4
CLK_PCI_1394 CLK_PCI1
CLK_PCI_ICH D_CK_SCLK
D_CK_SDATA
+3VS
2
1 3
D
+1.05VS
1 2
12
1 2
R139 12_0402_5%
1 2
R153 12_0402_5%
1 2
R124 12_0402_5%
1 2
R136 12_0402_5%
1 2
R119 33_0402_5%
1 2
R105 33_0402_5%
1 2
R122 33_0402_5%
1 2
R127 33_0402_5%
R98
4.7K_0402_5%
G
1 2
D_CK_SDATA
S
Q6 2N7002_SOT23
R157
1K_0402_5%@ R162
0_0402_5%
1 2
12
R166 0_0402_5%
1
C553
2
10P_0402_50V8J
+CLK_VDD1
+CLK_VDD1
1 2
+3VS
MCH_CLKSEL1 6
C
+CLK_VDDREF
+CLK_VDD48
XTALIN XTALOUT
CLKSEL2CLK_SD_48M
CLKSEL1
CLK_PCI5
CLK_PCI3CLK_PCI_LAN CLK_PCI2CLK_PCI_PCM
CLK_PCI0
CLKIREF
CPU_BSEL1 5
R450 1_0402_5%
R459 2.2_0402_5%
R451 475_0402_1%
D
L24 KC FBM-L11-201209-221LMAT_0805
1 2
1
C507 10P_0402_50V8J
2
U5
21
VDDPCIEX_0
28
VDDPCIEX_1
34
VDDPCIEX_2
1
VDDPCI_0
7
VDDPCI_1
42
VDDCPU
48
VDDREF
15mil
11
VDD48
15mil
50
X1
49
X2
12
FS_A/USB_48MHz
53
REF1/FSLC/TEST_SEL
16
FSLB/TEST_MODE
5
PCICLK5
4
PCICLK4
3
PCICLK3
56
PCICLK2/REQ_SEL
9
SELPCIEX_LCDCLK#/PCICLK_F1
8
ITP_EN/PCICLK_F0
46
SCLK
47
SDATA
39
IREF
15mil
13
GND_0
29
GND_1
2
GND_2
45
GND_3
51
GND_4
6
GND_5
ICS954226AGT_TSSOP56
+3VS
Change to 0 ohm
VDDA
GNDA
PCI/SRC_STOP#
CPU_STOP#
CPUCLKT1 CPUCLKC1
CPUCLKT0 CPUCLKC0
CPUCLKT2_ITP/PCIEXT6
CPUCLKC2_ITP/PCIEXC6
PEREQ1#/PCIEXT5 PEREQ2#/PCIEXC5
PCIEXT4
PCIEXC4
SATACLKT SATACLKC
PCIEXT3
PCIEXC3
PCIEXT2
PCIEXC2
PCIEXT1
PCIEXC1
LCDCLK_SS/PCIEX0T
LCDCLK_SS/PCIEX0C
DOTT_96MHz DOTC_96MHz
VTT_PWRGD#/PD
REF0
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2005/07/29 2006/07/29
E
1
C516
2.2U_0805_16V4Z
2
1
37 38
55 54
41 40
44 43
36 35
33 32
31 30
26 27
24 25
22 23
19 20
17 18
14 15
10 52
2
PM_STP_PCI# PM_STP_CPU#
CLK_CPU1 CLK_CPU1#
CLK_CPU0 CLK_CPU0#
CLK_SRC6 CLK_SRC6#
CLK_SRC5 CLK_SRC5#
CLK_SRC4 CLK_SRC4#
CLK_SRC3 CLK_SRC3#
CLK_SRC1 CLK_SRC1#
CLK_SRC0 CLK_SRC0#
CLK_DOT CLK_DOT#
CLK_REF CLK_14M_SIO
1
C505 1000P_0402_50V7K
2
+CLK_VCCA
40mil
C517
2.2U_0805_16V4Z
R74 33_0402_5%
1 2
R75 33_0402_5%
1 2
R80 33_0402_5%
1 2
R81 33_0402_5%
1 2
R76 33_0402_5%
1 2
R77 33_0402_5%
1 2
R443 0_0402_5%
R78 33_0402_5%
1 2
R79 33_0402_5%
1 2
R117 33_0402_5%
1 2
R113 33_0402_5%
1 2
R137 33_0402_5%
1 2
R126 33_0402_5%
1 2
R134 33_0402_5%
1 2
R135 33_0402_5%
1 2
R128 33_0402_5%
1 2
R129 33_0402_5%
1 2
R132 33_0402_5%
1 2
R133 33_0402_5%
1 2
1 2
R88 12_0402_5%
1 2
R87 12_0402_5%
Deciphered Date
E
12
1 2
R455
2.2_0402_5%
1
C509
2
10P_0402_50V8J
PM_STP_PCI# 19
PM_STP_CPU# 19,48
CLK_ICH_14M
F
G
+CLK_VDD1
40mil
1
C555 10P_0402_50V8J
2
+CLK_VDD1
CLK_MCH_BCLK CLK_MCH_BCLK#
CLK_CPU_BCLK CLK_CPU_BCLK#
CLK_PCIE_VGA CLK_PCIE_VGA# CLK_PCIE_VGA#
CLK_PCIE_CARD1 CLK_PCIE_CARD1#
CLK_PCIE_SATA CLK_PCIE_SATA#
CLK_MCH_3GPLL CLK_MCH_3GPLL#
CLK_PCIE_ICH CLK_PCIE_ICH#
CLK_DREF_SSC CLK_DREF_SSC#
CLK_DREF_96M CLK_DREF_96M#
1 2
+3VS
R140 10K_0402_5%
VTT_POWERGD#
CLK_14M_SIO 30
CLK_ICH_14M 19
F
1
C554 1000P_0402_50V7K
2
L23
KC FBM-L11-201209-221LMAT_0805
1 2
+3VS
Change to 0 ohm
CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6
CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4
CLK_PCIE_VGA 15 CLK_PCIE_VGA# 15
PCIEC_CLKREQ1# 24
CLK_PCIE_CARD1 24 CLK_PCIE_CARD1# 24
CLK_PCIE_SATA 18 CLK_PCIE_SATA# 18
CLK_MCH_3GPLL 8 CLK_MCH_3GPLL# 8
CLK_PCIE_ICH 19 CLK_PCIE_ICH# 19
CLK_DREF_SSC 6 CLK_DREF_SSC# 6
CLK_DREF_96M 6 CLK_DREF_96M# 6
Title
Size Document Number Rev
Date: Sheet
B
1
C506 10P_0402_50V8J
2
1
C522
2
2.2U_0805_16V4Z
2
1 3
D
G
CLK_MCH_BCLK CLK_MCH_BCLK# CLK_CPU_BCLK CLK_CPU_BCLK# CLK_PCIE_VGA
CLK_PCIE_CARD1 CLK_PCIE_CARD1# CLK_PCIE_SATA CLK_PCIE_SATA# CLK_MCH_3GPLL CLK_MCH_3GPLL#
CLK_PCIE_ICH CLK_PCIE_ICH# CLK_DREF_SSC CLK_DREF_SSC# CLK_DREF_96M CLK_DREF_96M#
S
Q11 2N7002_SOT23
1
2
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
G
H
Clock Generator
40mil
C552 10P_0402_50V8J
VGATE 6,19,48
+CLK_VDD2
1
C547
2
0.047U_0402_16V4Z
1 2
R59 49.9_0402_1%
1 2
R60 49.9_0402_1%
1 2
R64 49.9_0402_1%
1 2
R65 49.9_0402_1%
1 2
R57 49.9_0402_1%
1 2
R58 49.9_0402_1%
1 2
R61 49.9_0402_1%
1 2
R62 49.9_0402_1%
1 2
R118 49.9_0402_1%
1 2
R112 49.9_0402_1%
1 2
R138 49.9_0402_1%
1 2
R125 49.9_0402_1%
1 2
R150 49.9_0402_1%
1 2
R144 49.9_0402_1%
1 2
R142 49.9_0402_1%
1 2
R143 49.9_0402_1%
1 2
R147 49.9_0402_1%
1 2
R148 49.9_0402_1%
13 50,
of
H
B
Page 14
A
B
C
D
E
CRT Connector
1 1
R335 0_0402_5%PM@
VGA_CRT_R15 GMCH_CRT_R8
VGA_CRT_G15 GMCH_CRT_G8
VGA_CRT_B15 GMCH_CRT_B8
2 2
1 2 1 2
R334 0_0402_5%GM@ R339 0_0402_5%PM@
1 2 1 2
R338 0_0402_5%GM@ R337 0_0402_5%PM@
1 2 1 2
R336 0_0402_5%GM@
VGA_CRT_HSYNC15 GMCH_CRT_HSYNC8
150_0402_5%
1 2
R342 0_0402_5%PM@
1 2
R343 39_0402_5%GM@
VGA_CRT_VSYNC15 GMCH_CRT_VSYNC8
12
R331
C377 0.1U_0402_16V4Z
12
R333
150_0402_5%
1 2
CRT_HSYNC CRT_HSYNC_B
1 2
R13 0_0402_5%PM@
1 2
R8 39_0402_5%GM@
CRT_R CRT_R_L
CRT_G
CRT_B
12
R332
150_0402_5%
1
C372
3.3P_0402_50V8CPM@
2
3.3P_0402_50V8CPM@
+CRT_VCC
1
5
P
4
OE#
A2Y
G
U32
SN74AHCT1G125GW_SOT353-5
3
1 2
C11 0.1U_0402_16V4Z
CRT_VSYNC CRT_VSYNC_B
1
C370
2
+CRT_VCC
3.3P_0402_50V8CPM@
R19 10K_0402_5%
1
5
P
4
OE#
A2Y
G
U1 SN74AHCT1G125GW_SOT353-5
3
+CRT_PULLUP
1 2
L19
FCM2012C-800_0805
1 2
L21
FCM2012C-800_0805
1 2
L20
FCM2012C-800_0805
1
C371
2
10P for GM
12
CRT_G_L
CRT_B_L
3.3P_0402_50V8CPM@
D2
DAN217_SC59@
1
C3
2
TV-OUT Conn.
D17
C382
DAN217_SC59@
2
1
2
82P_0402_50V8JPM@
3 3
+CRT_PULLUP
VGA_TV_LUMA15 GMCH_TV_LUMA8 VGA_TV_CRMA15 GMCH_TV_CRMA8 VGA_TV_COMPS15 GMCH_TV_COMPS8
4 4
1 2
R14 0_0402_5%PM@
1 2
R20 0_0402_5%GM@
1 2
R17 0_0402_5%PM@
1 2
R21 0_0402_5%GM@
1 2
R18 0_0402_5%PM@
1 2
R22 0_0402_5%GM@
12
R12
150_0402_5%
150_0402_5%
12
12
R11
150_0402_5%
TV_LUMA
TV_CRMA
TV_COMPS
R10
C12 82P_0402_50V8JPM@
1 2
L4 FCM1608C-121T_0603
1 2
L3 FCM1608C-121T_0603
1 2
L2 FCM1608C-121T_0603
1
1
C13
2
82P_0402_50V8JPM@
1
C14
82P_0402_50V8JPM@
2
2
D19
1
DAN217_SC59@
1
3
C383 82P_0402_50V8JPM@
2
1
2
D18
DAN217_SC59@
1
2
1
2
82P_0402_50V8JPM@
3
TV_CRMA_L TV_COMPS_L
TV_LUMA_L
3
C384
D3
DAN217_SC59@
1
2
3
C2
3.3P_0402_50V8CPM@
1 2
L18 FCM1608C-121T_0603
1 2
L1 FCM1608C-121T_0603
1
2
3
1
2
10P_0402_50V8J
4.7K_0402_5%
DSUB_12
DSUB_15
JP19
3 6 7 5 2 4 1 8 9
SUYIN_030107FR007SX08FU
5.6P for GM
1
2
3.3P_0402_50V8CPM@
C369
+CRT_VCC
R1
1
2
3
C8
CRT_HSYNC_L
CRT_VSYNC_L
1
2
12
4.7K_0402_5%
D4
DAN217_SC59@
12
R2
+5VS
RB411D_SOT23
1
C5 10P_0402_50V8J
2
+CRT_PULLUP
2
G
1 3
D
Q19 BSS138_SOT23
Q1
BSS138_SOT23
D20
2 1
DDC_MD2
1
C6
2
100P_0402_50V8J
68P_0402_50V8J
S
2
G
1 3
D
S
W=40mils
F1
POLYSWITCH_1A
C4
R340 0_0603_5%PM@
R341 0_0603_5%GM@
R15 0_0402_5%GM@
1 2
1 2
R3
C368
0.1U_0402_16V4Z
1
2
1 2
1 2
12
12
0_0402_5%GM@
1
2
1
C7 68P_0402_50V8J
2
R16 0_0402_5%PM@
R9 0_0402_5%PM@
+CRT_VCC+R_CRT_VCC
W=40mils
JP17
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
SUYIN_070549FR015S208CR
DSUB_12
DSUB_15
+3VS
+2.5VS
GMCH_CRT_DATA 8
VGA_DDC_DATA 15
VGA_DDC_CLK 15
GMCH_CRT_CLK 8
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
B
14 50,
E
of
Page 15
5
4
3
2
1
LCD POWER CIRCUIT
2
+3VS
G
4.7U_0805_10V4ZGM@
W=60mils
S
Q26
D
1 3
1
C399
2
D28 RB751V_SOD323
21
SI2301BDS_SOT23GM@
1
4.7U_0805_10V4ZGM@
2
+LCDVDD
1
2
C406
AOS 3413
W=60mils
C400
0.1U_0402_16V4Z
GM@
+3VS
12
R491
4.7K_0402_5%
VGA_TV_LUMA14 VGA_TV_CRMA14 VGA_TV_COMPS14
VGA_CRT_R14 VGA_CRT_G14 VGA_CRT_B14
VGA_CRT_VSYNC14 VGA_CRT_HSYNC14
DVI_DETECT16 VGA_DVI_SCLK16 VGA_DVI_SDATA16
+LCDVDD
D D
300_0603_5%GM@
2N7002_SOT23GM@
GMCH_ENVDD8
C C
R371
Q24
12
13
D
S
R374
10K_0402_5%GM@
+3VALW
12
R373 100K_0402_5%
GM@
2
G
2
G
12
R375 1K_0402_5%GM@
13
D
Q23
BSS138_SOT23GM@
S
BKOFF#32
12
1
C417
0.047U_0402_16V4ZGM@
2
BKOFF# DISPOFF#
LCD Conn.
INVPWR_B+
+3VS +LCDVDD
5
GMCH_LCD_CLK GMCH_LCD_DATA
GMCH_TZOUT0-
GMCH_TZOUT1+ GMCH_TZOUT1-
GMCH_TZOUT2+ GMCH_TZOUT2-
GMCH_TZCLK­GMCH_TZCLK+
12
12
GMCH_LCD_CLK8
B B
A A
GMCH_LCD_DATA8
GMCH_TZOUT0-8 GMCH_TZOUT0+8
GMCH_TZOUT1+8 GMCH_TZOUT1-8
GMCH_TZOUT2+8 GMCH_TZOUT2-8
GMCH_TZCLK-8 GMCH_TZCLK+8
L6
KC FBM-L11-201209-221LMAT_0805
GM@
L5
KC FBM-L11-201209-221LMAT_0805
GM@
1
C34
68P_0402_50V8JGM@
2
JP4
1
21
2
22
3
23
4
24
5
25
6
26
7
27
8
28
9
29
10
30
11
31
12
32
13
33
14
34
15
35
16
36
17
37
18
38
19
39
20
40
ACES_88107-4000GGM@
+3VSINVPWR_B+
B+
1
C32
0.1U_0402_16V4ZGM@
2
DAC_BRIG INVT_PWM DISPOFF#
GMCH_TXOUT0­GMCH_TXOUT0+GMCH_TZOUT0+
GMCH_TXOUT1­GMCH_TXOUT1+
GMCH_TXOUT2+ GMCH_TXOUT2-
GMCH_TXCLK­GMCH_TXCLK+
+LCDVDD
1
C411
2
10U_0805_10V4ZGM@
4
DAC_BRIG 32 INVT_PWM 32
GMCH_TXOUT0- 8 GMCH_TXOUT0+ 8
GMCH_TXOUT1- 8 GMCH_TXOUT1+ 8
GMCH_TXOUT2+ 8 GMCH_TXOUT2- 8
GMCH_TXCLK- 8 GMCH_TXCLK+ 8
1
C412
0.1U_0402_16V4ZGM@
2
CLK_PCIE_VGA13 CLK_PCIE_VGA#13
VGA_DDC_CLK14 VGA_DDC_DATA14
EC_SMB_CK132,33,44
+1.5VS
EC_SMB_DA132,33,44
+2.5VS
1
C592
0.1U_0402_16V4ZPM@
2
1
C601
2
0.1U_0402_16V4ZPM@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
PCIE_GTX_C_MRX_N[0..15]8 PCIE_GTX_C_MRX_P[0..15]8
PCIE_MTX_C_GRX_N[0..15]8 PCIE_MTX_C_GRX_P[0..15]8
VGA_TV_LUMA VGA_TV_CRMA VGA_TV_COMPS
VGA_CRT_R VGA_CRT_G VGA_CRT_B
VGA_CRT_VSYNC VGA_CRT_HSYNC
PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15
VGA_DDC_CLK VGA_DDC_DATA
+1.8VS
C611
1
2
0.1U_0402_16V4ZPM@
Deciphered Date
VGA BOARD Conn.
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15] PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]
JP29
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
139
141
141
143
143
145
145
147
147
149
149
151
151
153
153
155
155
157
157
159
159
ACES_88394-1G71PM@
2
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
70
70
72
72
74
74
76
76
78
78
80
80
82
82
84
84
86
86
88
88
90
90
92
92
94
94
96
96
98
98
100
100
102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
126
126
128
128
130
130
132
132
134
134
136
136
138
138
140
140
142
142
144
144
146
146
148
148
150
150
152
152
154
154
156
156
158
158
160
160
Title
Size Document Number Rev
B
Date: Sheet
B+
PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15
DAC_BRIG DISPOFF# INVT_PWM
SUSP# ENBKL
+1.8VS
1
C605
0.1U_0402_16V4ZPM@
2
0.1U_0402_16V4ZPM@
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
VGA_DVI_TXC+ 16 VGA_DVI_TXC- 16 VGA_DVI_TXD0+ 16 VGA_DVI_TXD0- 16 VGA_DVI_TXD1+ 16 VGA_DVI_TXD1- 16 VGA_DVI_TXD2+ 16 VGA_DVI_TXD2- 16
PLTRST_VGA# 16,19
SUSP# 24,32,33,40
ENBKL 8,32
+3VS
1
C595
2
1
0.1U_0402_16V4ZPM@
2
1
C587
15 50,
+5VALW
B
of
Page 16
5
+2.5VS +3VS
1
C395 10U_0805_10V4Z@
2
D D
+2.5VS
C C
1
C16
2
0.1U_0402_16V4Z@
12
R361
10K_0402_5%@
AS
12
R364
10K_0402_5%@
1
C17
0.1U_0402_16V4Z@
2
C396
1
C394
10U_0805_10V4Z@
2
1.2K_0402_5%@
4
+3VS
U34
SDVOB_INT+ SDVOB_INT-
SDVOB_R+ SDVOB_R-
SDVOB_G+ SDVOB_G-
SDVOB_B+ SDVOB_B-
SDVOB_CLK+ SDVOB_CLK-
AS RESET# VSWING
ATPG SCEN
+2.5VS
DGND7DGND30AGND31AGND39AGND45TGND18TGND24AGND_PLL
28
DVDD12DVDD
1
1
2
0.1U_0402_16V4Z@
SDVO_INT8 SDVO_INT#8
SDVOB_R8 SDVOB_R#8
SDVOB_G8 SDVOB_G#8
SDVOB_B8 SDVOB_B#8
SDVOB_CLK8 SDVOB_CLK#8
PLTRST_VGA#15,19
R344
1
C378
0.1U_0402_16V4Z@
2
32 33
37 38
40 41
43 44
46 47
AS
3 2
25 27
12
12
R349
10K_0402_5%@
26
12
R347
10K_0402_5%@
3
21
48
DVI_TXC-
TVDD15TVDD
AVDD36AVDD42AVDD
AVDD_PLL
6
TLC#
TLC
TDC0#
TDC0
TDC1#
TDC1
TDC2#
TDC2
HPDET
SC_DDC SD_DDC
SC_PROM SD_PROM
SPD SPC
NC
NC
35
34
13
DVI_TXC+
14
DVI_TXD0-
16
DVI_TXD0+
17
DVI_TXD1-
19
DVI_TXD1+
20
DVI_TXD2-
22
DVI_TXD2+
23
DVI_DETECT
29
VGA_DVI_SCLK
11
VGA_DVI_SDATA
10 9
8
SDVO_SDAT
5 4
SDVO_SCLK
SDVO_SDAT 8 SDVO_SCLK 8
Keep 30mil spacing to other signals
CH7307_LQFP48@
2
SDVO_SDAT SDVO_SCLK
1 2
R350 5.6K_0402_5%@
1 2
R360 5.6K_0402_5%@
1
+2.5VS
DVI-D Connector
VGA_DVI_TXD0-15 VGA_DVI_TXD0+15
VGA_DVI_TXD1-15
1 2
R368 0_0402_5%@
1 2
R366 0_0402_5%PM@
+DVI_VCC
B B
R346
6.8K_0402_5%
PM@
VGA_DVI_SCLK15
VGA_DVI_SDATA15
A A
VGA_DVI_SCLK
VGA_DVI_SDATA
R348
6.8K_0402_5%
PM@
1 2
R367
4.7K_0402_5%
Q21 2N7002_SOT23
13
D
PM@
G
2
S
PM@
Q20 2N7002_SOT23
13
D
PM@
G
2
1 2
S
+5VS +3VS
12
12
R365
4.7K_0402_5%
PM@
DVI_SCLK
DVI_SDATA
VGA_DVI_TXD1+15 VGA_DVI_TXD2-15
VGA_DVI_TXD2+15
VGA_DVI_TXC+15
VGA_DVI_TXC-15
1 4 2 3
RP6 0_0404_4P2R_5%PM@
1 4 2 3
RP7 0_0404_4P2R_5%PM@
1 4 2 3
RP4 0_0404_4P2R_5%PM@
2 3 1 4
RP5 0_0404_4P2R_5%PM@
place close to CH7307C
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
DVI_TXD0­DVI_TXD0+
DVI_TXD1­DVI_TXD1+
DVI_TXD2­DVI_TXD2+
DVI_TXC+ DVI_TXC-
Deciphered Date
JP16
17 18
9
10
1 2
12 13
4 5
20 21
23 24
8
SUYIN_070939FR024S531PLPM@
DVI_DETECT15
TMDS_DATA0­TMDS_DATA0+
TMDS_DATA1­TMDS_DATA1+
TMDS_DATA2­TMDS_DATA2+
TMDS_DATA3­TMDS_DATA3+
TMDS_DATA4­TMDS_DATA4+
TMDS_DATA5­TMDS_DATA5+
TMDS_Clock+ TMDS_Clock-
Analog VSYNC
SKS10-04AT_TSMA@
DDC_CLOCK
DDC_DATA
Hot Plug Detect
TMDS_DATA2/4 shield TMDS_DATA1/3 shield TMDS_DATA0/5 shield
TMDS_Clock shield
GND
DVI_DETECT
D21
2 1
2
+5V
14
6
7
16
3 11 19 22
15
12
+DVI_VCC
W=40mils
DVI_SCLK
DVI_SDATA
R329
1 2
R330
100K_0603_5%PM@
Title
Size Document Number Rev
B
Date: Sheet of
D16
RB411D_SOT23PM@
21
1
C375
0.1U_0402_16V4ZPM@
2
20K_0603_5%PM@
+5VS
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
B
16 50,
1
Page 17
5
4
3
2
1
RP39
+3VS
D D
+3VS
+3VS
+3VS
C C
+3VS
+3VS
B B
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%
RP10
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%
RP40
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%
RP8
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%
RP9
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%
RP41
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%
PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_SERR#
PCI_PLOCK# PCI_IRDY# PCI_DEVSEL# PCI_PERR#
PCI_REQ#2 PCI_REQ#0 PCI_PIRQD# PCI_PIRQB#
PCI_PIRQF# PCI_REQ#4 PCI_PIRQG# PCI_REQ#1
PCI_PIRQE# PCI_REQ#5 PCI_REQ#3 PCI_REQ#6
PCI_PIRQA# PCI_PIRQH# PCI_PIRQC#
PCI_AD[0..31]22 , 2 5,26,28,29
PCI_FRAME#22,25,26,28,29
PCI_PIRQA#22,29 PCI_PIRQB#22
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_FRAME#
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
U4B
E2
AD[0]
E5
AD[1]
C2
AD[2]
F5
AD[3]
F3
AD[4]
E9
AD[5]
F2
AD[6]
D6
AD[7]
E6
AD[8]
D3
AD[9]
A2
AD[10]
D2
AD[11]
D5
AD[12]
H3
AD[13]
B4
AD[14]
J5
AD[15]
K2
AD[16]
K5
AD[17]
D4
AD[18]
L6
AD[19]
G3
AD[20]
H4
AD[21]
H2
AD[22]
H5
AD[23]
B3
AD[24]
M6
AD[25]
B2
AD[26]
K6
AD[27]
K3
AD[28]
A5
AD[29]
L1
AD[30]
K4
AD[31]
J3
FRAME#
Interrupt I/F
N2
PIRQ[A]#
L2
PIRQ[B]#
M1
PIRQ[C]#
L3
PIRQ[D]#
AC5
SATA[1]RXN/RSVD[1]
AD5
SATA[1]RXP/RSVD[2]
AF4
SATA[1]TXN/RSVD[3]
AG4
SATA[1]TXP/RSVD[4]
AC9
SATA[3]RXN/RSVD[5]
AD9
SATA[3]RXP/RSVD[6]
AF8
SATA[3]TXN/RSVD[7]
AG8
SATA[3]TXP/RSVD[8]
U3
TP[3]/RSVD[9]
ICH6_BGA609
PCI
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
DEVSEL#
PLTRST#
PIRQ[E]#/GPI[2] PIRQ[F]#/GPI[3] PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]
RESERVED
REQ[0]# GNT[0]# REQ[1]# GNT[1]# REQ[2]# GNT[2]# REQ[3]# GNT[3]#
C/BE[0]# C/BE[1]# C/BE[2]# C/BE[3]#
IRDY#
PAR
PCIRST#
PERR#
PLOCK#
SERR# STOP# TRDY#
PCICLK
PME#
L5 C1 B5 B6 M5 F1 B8 C8 F7 E7 E8 F6 B7 D8
J6 H6 G4 G2
A3 E1 R2 C3 E3 C5 G5 J1 J2
R5 G6 P6
D9 C7 C6 M3
PCI_REQ#0 PCI_GNT#0 PCI_REQ#1 PCI_GNT#1 PCI_REQ#2 PCI_GNT#2 PCI_REQ#3 PCI_GNT#3 PCI_REQ#4 PCI_GNT#4 PCI_REQ#5 PCI_GNT#5 PCI_REQ#6
PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3
PCI_IRDY# PCI_PAR PCI_RST# PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY#
PLT_RST# CLK_PCI_ICH
PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#
PCI_REQ#0 25 PCI_GNT#0 25 PCI_REQ#1 28 PCI_GNT#1 28 PCI_REQ#2 22 PCI_GNT#2 22 PCI_REQ#3 26 PCI_GNT#3 26 PCI_REQ#4 29 PCI_GNT#4 29
PCI_CBE#0 22 , 25,26,28,29 PCI_CBE#1 22 , 25,26,28,29 PCI_CBE#2 22 , 25,26,28,29 PCI_CBE#3 22 , 25,26,28,29
PCI_IRDY# 22,25,26,28,29 PCI_PAR 22,25,26,28,29 PCI_RST# 22,24,25,26,28,29 PCI_DEVSEL# 22, 25 ,26,28,29 PCI_PERR # 22,25,26,28,29
PCI_SERR # 22,25,26,28,29 PCI_STOP# 22,25,26,28,29 PCI_T R D Y # 22,25,26,28,29
PLT_RST# 6,19,21,30,32 CLK_PCI_ICH 13
PCI_PIRQE# 25 PCI_PIRQF# 26 PCI_PIRQG# 28 PCI_PI R QH# 28,29
Internal Pull-up. Sample hi g h de stina tion is LPC.
PCI_GNT#5
12
R421
0_0402_5%@
CLK_PCI_ICH
R438
10_0402_5%@
1 2 1
C474
10P_0402_50V8J@
2
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
1
B
17 50,
of
Page 18
5
+RTCVCC
12
R482
ICH_BITCLK_AUDIO36
ICH_SDOUT_AUDIO36
+3VS
ICH_SYNC_AUDIO36
ICH_RST_AUDIO#36
+3VS
1M_0402_5%
INTRUDER#
12
R486 10K_0402_5%
SATA_LED#
R399 39_0402_5%
R395 39_0402_5%
R397 39_0402_5%
R394 39_0402_5%
R499 4.7K_0402_5%
1 2
R484 8.2K_0402_5%
1 2
SATA_ITX_DRX_N0 SATA_ITX_DRX_P0 SATA_ITX_C_DRX_P0
D D
C C
B B
A A
32.768KHZ_12.5P_1TJS125DJ2A073
close to RAM door
915PM Check List Rev1.701: 180K, 0.1uF
ICH_BITCLK_MDC34
ICH_AC_BITCLK
ICH_AC_SYNC_R
ICH_AC_RST_R#
ICH_AC_SDOUT_R
C598 0.01U_0402_16V7K@ C599 0.01U_0402_16V7K@
1 2
1 2
1 2
1 2
+RTCVCC
1 2
ICH_SYNC_MDC34 ICH_RST_MDC#34
ICH_SDOUT_MDC34
IDE_DIORDY
IDE_IRQ
12 12
1 2
R477 20K_0402_5%
C705
22P_0402_50V8J@
SATA_DTX_C_IRX_N021 SATA_DTX_C_IRX_P021
SATA_ITX_C_DRX_N0
4
C96
10P_0402_50V8J
12
3
OUT
NC
2
NC
C102
10P_0402_50V8J
12
R503 24.9_0402_1%
12
J1 JOPEN
C111
1U_0603_10V4Z
1 2
C435
10P_0402_50V8J@
1 2 1 2
R400 39_0402_5% R412 39_0402_5%
1 2
R396 39_0402_5%
ICH_AC_SDIN036 ICH_AC_SDIN134
R414 39_0402_5%
SATA_LED#32
CLK_PCIE_SATA#13
CLK_PCIE_SATA13
1 2
IDE_DIORDY21
IDE_IRQ21 IDE_DDACK#21 IDE_DIOW#21 IDE_DIOR#21
ICH_RTCX1
X1
4 1
IN
ICH_RTCX2
ICH_RTCRST#
12
12
SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0 SATA_ITX_DRX_P0
SATA_DTX_C_IRX_N2 SATA_DTX_C_IRX_P2
SATA_ITX_C_DRX_N0 21 SATA_ITX_C_DRX_P0 21
12
R114
10M_0402_5%
INTRUDER# INTVRMEN
R413 10_0402_5%@
12
ICH_AC_BITCLK ICH_AC_SYNC_R ICH_AC_RST_R#
ICH_AC_SDOUT_R
SATA_LED#
CLK_PCIE_SATA# CLK_PCIE_SATA
SATARBIAS
10mils
IDE_DIORDY IDE_IRQ IDE_DDACK# IDE_DIOW# IDE_DIOR#
AA2 AA3
AA5
D12
B12
D11
F13 F12 B11 E12
E11
C13 C12
C11
E13
C10
A10 F11
F10 B10
AC19
AE3 AD3 AG2 AF2
AD7 AC7 AF6 AG6
AC2 AC1
AG11
AF11
AF16 AB16 AB15 AC14 AE16
Y1 Y2
B9
C9
U4A
RTCX1 RTCX2
RTCRST# INTRUDER#
INTVRMEN
EE_CS EE_SHCLK EE_DOUT EE_DIN
LAN_CLK LAN_RSTSYNC LANRXD[0]
LANRXD[1] LANRXD[2]
LANTXD[0] LANTXD[1] LANTXD[2]
ACZ_BIT_CLK ACZ_SYNC
ACZ_RST# ACZ_SDIN[0]
ACZ_SDIN[1] ACZ_SDIN[2]
ACZ_SDO
SATALED#
SATA[0]RXN SATA[0]RXP SATA[0]TXN SATA[0]TXP
SATA[2]RXN SATA[2]RXP SATA[2]TXN SATA[2]TXP
SATA_CLKN SATA_CLKP
SATARBIAS# SATARBIAS
IORDY IDEIRQ DDACK# DIOW# DIOR#
ICH6_BGA609
3
RTC
LAD[0]/FWH[0] LAD[1]/FWH[1] LAD[2]/FWH[2] LAD[3]/FWH[3]
LPC
LDRQ[0]#
LDRQ[1]#/GPI[41]
LFRAME#/FWH[4]
A20GATE
A20M#
LAN
CPUSLP#
CPU
DPRSLP#/TP[4]
DPSLP#/TP[2]
FERR#
CPUPWRGD/GPO[49]
IGNNE#
INIT3_3V#
RCIN#
STPCLK#
THRMTRIP#
DCS1# DCS3#
SATAAC-97/AZALIA
PIDE
DD[10] DD[11] DD[12] DD[13] DD[14] DD[15]
DDREQ
2
LPC_LAD0
P2
LPC_LAD1
N3
LPC_LAD2
N5
LPC_LAD3
N4 N6
LPC_DRQ#1
P4
LPC_FRAME#
P3
EC_GA20
AF22
H_A20M#
AF23
R494 0_0402_5%@
AE27 AE24
AD27 AF24 AG25 AG26
AE22 AF27
INIT#
AG24
INTR
AD23 AF25
NMI
AG27
SMI#
AE26 AE23
AC16
DA[0]
AB17
DA[1]
AC17
DA[2]
AD16 AE17
AD14
DD[0]
AF15
DD[1]
AF14
DD[2]
AD12
DD[3]
AE14
DD[4]
AC11
DD[5]
AD11
DD[6]
AB11
DD[7]
AE13
DD[8]
AF13
DD[9]
AB12 AB13 AC13 AE15 AG15 AD13
AB14
SATA_RXn/p need tie to ground when SATA port no used
1 2
R495 0_0402_5%
1 2
1 2
R500 56_0402_5%
H_PWRGOOD H_IGNNE# H_INIT#
H_INTR
KB_RST# H_NMI
H_SMI# H_STPCLK# THRMTRIP#
IDE_DA0 IDE_DA1 IDE_DA2
IDE_DCS1# IDE_DCS3#
IDE_DD0 IDE_DD1 IDE_DD2 IDE_DD3 IDE_DD4 IDE_DD5 IDE_DD6 IDE_DD7 IDE_DD8 IDE_DD9 IDE_DD10 IDE_DD11 IDE_DD12 IDE_DD13 IDE_DD14 IDE_DD15
IDE_DDREQ
1 2
R497 1K_0402_5%
1 2
R490 1K_0402_5%
1 2
R489 1K_0402_5%
1 2
R487
1 2
R481 1K_0402_5%
1 2
R485 1K_0402_5%
LPC_AD0 30,32 LPC_AD1 30,32 LPC_AD2 30,32 LPC_AD3 30,32
LPC_DRQ#1 30
LPC_FRAME# 30,32
EC_GA20 32 H_A20M# 4
H_DPSLP# 4
H_PWRGOOD 4
H_IGNNE# 4 H_INIT# 4
H_INTR 4
EC_KBRST# 32 H_NMI 4
H_SMI# 4 H_STPCLK# 4
SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_N2 SATA_DTX_C_IRX_P2
1K_0402_5%
CLK_PCIE_SATA CLK_PCIE_SATA#
R502 10K_0402_5%
1 2
H_CPUSLP# H_DPRSTP#
H_FERR#FE RR#
R511
10K_0402_5%
1 2
IDE_DA[0..2] 21
IDE_DCS1# 21 IDE_DCS3# 21
IDE_DD[0..15] 21
IDE_DDREQ 21
+3VS
+3VS
H_CPUSLP# 4,6 H_DPRSTP# 4
H_FERR# 4
330_0402_5%@
+1.05VS
+1.05VS
1 2
1 2
R508 75_0402_1%
1
+1.05VS
H_FERR# H_DPRSTP#
R515
2
B
1 2
R505 56_0402_5%
1 2
R498 56_0402_5%
MAINPWON 41,42,44
1
C
Q13
2SC2411K_SC59@
E
3
12
R510 56_0402_5%
H_THERMTRIP#
THRMTRIP#
H_THERMTRIP# 4,6
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
B
18 50,
1
of
Page 19
5
+3VALW
1 2
R465 10K_0402_5%
1 2
R452 10K_0402_5%
1 2
R473 2.2K_0402_5%
1 2
R462 2.2K_0402_5%
1 2
R483 10K_0402_5%
D D
C C
B B
A A
1 2
R447 10K_0402_5%@
1 2
R456 10K_0402_5%
1 2
R461 8.2K_0402_5%
1 2
R453 1K_0402_5%
1 2
R458 10K_0402_5%
+3VS
1 2
R493 10K_0402_5%
1 2
R501 8.2K_0402_5%
1 2
R513 10K_0402_5%
1 2
R514 10K_0402_5%
1 2
R476 10K_0402_5%
1 2
R480 10K_0402_5%
1 2
R472 10K_0402_5%
RP42
4 5 3 6 2 7 1 8
100_1206_8P4R_5%
1 2
R492 100K_0402_5%
1 2
R471 10K_0402_5%@
1 2
R460 10K_0402_5%@
ICH_SMLINK0 ICH_SMLINK1 CK_SCLK CK_SDATA LINKALERT# EC_LID_OUT# EC_SWI# PM_BATLOW# ICH_PCIE_WAKE# SYSRST#
ICH_GPI7 PM_CLKRUN# ICH_VGATE MCH_SYNC# SERIRQ
SYS_PWROK EC_RSMRST#
GPI26 GPI29 GPI30 GPI31
PM_DPRSLPVR
IDE_HRESET#
SUS_CLK
CLK_ICH_48M
12
R408
10_0402_5%@
1
C423
10P_0402_50V8J@
2
CLK_ICH_14M
12
R423
10_0402_5%@
1
C476
10P_0402_50V8J@
2
5
PM_SLP_S5#32
4
4
EC_LID_OUT#32 EC_SCI#32
PM_STP_PCI#13
IDE_HRESET#21
EC_FLASH#33 PM_CLKRUN#25,26,28,29,30
ICH_PCIE_WAKE#24
CLK_ICH_14M13 CLK_ICH_48M13
SYS_PWROK35
PM_DPRSLPVR48
+3VALW
1 2
5
U8
P
B
Y
A
G
TC7SH08FU_SSOP5
3
4
EC_SWI#32
CK_SCLK13,24 CK_SDATA13,24
SB_SPKR36
PM_BMBUSY#6
EC_SMI#32 ACIN32,43
PM_STP_CPU#13,48
PLTRST_VGA#15,16
EXP_CPPE#24
SERIRQ22,30,32
EC_THERM#32
PM_SLP_S3#32
PBTN_OUT#32
PLT_RST#6,17,21,30,32
EC_RSMRST#32
SLP_S4#
1
SLP_S5#
2
VGATE6,13,48
C128
0.1U_0402_16V4Z
3
EC_SWI# GPI26
GPI29 GPI30 GPI31
CK_SCLK CK_SDATA LINKALERT# ICH_SMLINK0 ICH_SMLINK1 MCH_SYNC# SB_SPKR
SYSRST# PM_BMBUSY# ICH_GPI7
EC_SMI#
12
R466 0_0402_5%
EC_LID_OUT# EC_SCI#
PM_STP_PCI#
PLTRST_VGA# IDE_HRESET#
EC_FLASH# PM_CLKRUN#
ICH_PCIE_WAKE# SERIRQ EC_THERM#
ICH_VGATE
12
R512 0_0402_5%
CLK_ICH_14M CLK_ICH_48M SUS_CLK SLP_S3#
SLP_S4# SLP_S5#
SYS_PWROK PM_DPRSLPVR PM_BATLOW# PBTN_OUT# PLT_RST# EC_RSMRST#
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
U4C
T2
RI#
AF17
SATA[0]GP/GPI[26]
AE18
SATA[1]GP/GPI[29]
AF18
SATA[2]GP/GPI[30]
AG18
SATA[3]GP/GPI[31]
Y4
SMBCLK
W5
SMBDATA
Y5
LINKALERT#
W4
SMLINK[0]
U6
SMLINK[1]
AG21
MCH_SYNC#
F8
SPKR
W3
SUS_STAT#/LPCPD#
U2
SYS_RESET#
AD19
BM_BUSY#/GPI[6]
AE19
GPI[7]
R1
GPI[8]
W6
SMBALERT#/GPI[11]
M2
GPI[12]
R6
GPI[13]
AC21
STP_PCI#/GPO[18]
AB21
GPO[19]
AD22
STP_CPU#/GPO[20]
AD20
GPO[21]
AD21
GPO[23]
V3
GPIO[24]
P5
GPIO[25]
R3
GPIO[27]
T3
GPIO[28]
AF19
CLKRUN#/GPIO[32]
AF20
GPIO[33]
AC18
GPIO[34]
U5
WAKE#
AB20
SERIRQ
AC20
THRM#
AF21
VRMPWRGD
E10
CLK14
A27
CLK48
V6
SUSCLK
T4
SLP_S3#
T5
SLP_S4#
T6
SLP_S5#
AA1
PWROK
AE20
DPRSLPVR/TP[1]
V2
BATLOW#/TP[0]
U1
PWRBTN#
V5
LAN_RST#
Y3
RSMRST#
ICH6_BGA609
H25
PERn[1]
H24
PERp[1]
G27
PETn[1]
G26
PETp[1]
PERn[2] PERp[2]
PETn[2] PETp[2]
PERn[3] PERp[3]
PETn[3] PETp[3]
GPIO
PERn[4] PERp[4]
PETn[4]
PCI-EXPRESSDIRECT MEDIA INTERFACE
PETp[4]
DMI[0]RXN DMI[0]RXP DMI[0]TXN DMI[0]TXP
DMI[1]RXN DMI[1]RXP DMI[1]TXN DMI[1]TXP
DMI[2]RXN DMI[2]RXP DMI[2]TXN DMI[2]TXP
DMI[3]RXN DMI[3]RXP DMI[3]TXN DMI[3]TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP DMI_IRCOMP OC[4]#/GPI[9]
OC[5]#/GPI[10] OC[6]#/GPI[14] OC[7]#/GPI[15]
OC[0]# OC[1]# OC[2]# OC[3]#
USBP[0]N USBP[0]P USBP[1]N
CLOCK
USBP[1]P USBP[2]N USBP[2]P USBP[3]N USBP[3]P
USB
USBP[4]N USBP[4]P USBP[5]N USBP[5]P USBP[6]N USBP[6]P USBP[7]N
POWER MGT
USBP[7]P
USBRBIAS#
USBRBIAS
2005/07/29 2006/07/29
3
PCIE_PTX_C_IRX_N2
K25
PCIE_PTX_C_IRX_P2
K24
PCIE_ITX_PRX_N2
J27
PCIE_ITX_PRX_P2
J26 M25
M24 L27 L26
P24 P23 N27 N26
DMI_MTX_IRX_N0
T25
DMI_MTX_IRX_P0
T24
DMI_ITX_MRX_N0
R27
DMI_ITX_MRX_P0
R26
DMI_MTX_IRX_N1
V25
DMI_MTX_IRX_P1
V24
DMI_ITX_MRX_N1
U27
DMI_ITX_MRX_P1
U26
DMI_MTX_IRX_N2
Y25
DMI_MTX_IRX_P2
Y24
DMI_ITX_MRX_N2
W27
DMI_ITX_MRX_P2PM_STP_CPU#
W26
DMI_MTX_IRX_N3
AB24
DMI_MTX_IRX_P3
AB23
DMI_ITX_MRX_N3
AA27
DMI_ITX_MRX_P3
AA26
CLK_PCIE_ICH#
AD25
CLK_PCIE_ICH
AC25
F24
10mils
DMI_IRCOMP
F23
USB_OC#4
C23
USB_OC#5
D23
USB_OC#6
C25
USB_OC#7
C24
USB_OC#0
C27
USB_OC#1
B27
USB_OC#2
B26
USB_OC#3
C26
USB20_N0
C21
USB20_P0
D21 A20 B20
USB20_N2
D19
USB20_P2
C19
USB20_N3
A18
USB20_P3
B18
USB20_N4
E17
USB20_P4
D17
USB20_N5
B16
USB20_P5
A16
USB20_N6
C15
USB20_P6
D15
USB20_N7
A14
USB20_P7
B14 A22
B22
Deciphered Date
USBRBIAS
10mils
2
C485 0.1U_0402_16V4Z
1 2
C493 0.1U_0402_16V4Z
1 2
DMI_MTX_IRX_N0 6
DMI_MTX_IRX_P0 6 DMI_ITX_MRX_N0 6 DMI_ITX_MRX_P0 6
DMI_MTX_IRX_N1 6
DMI_MTX_IRX_P1 6 DMI_ITX_MRX_N1 6 DMI_ITX_MRX_P1 6
DMI_MTX_IRX_N2 6
DMI_MTX_IRX_P2 6 DMI_ITX_MRX_N2 6 DMI_ITX_MRX_P2 6
DMI_MTX_IRX_N3 6
DMI_MTX_IRX_P3 6 DMI_ITX_MRX_N3 6 DMI_ITX_MRX_P3 6
CLK_PCIE_ICH# 13
CLK_PCIE_ICH 13
R420 24.9_0402_1%
1 2
USB_OC#4 31
USB_OC#6 31
USB_OC#0 31
USB_OC#2 31
USB_OC#3 31
USB20_N0 31
USB20_P0 31
USB20_N2 31
USB20_P2 31
USB20_N3 31
USB20_P3 31
USB20_N4 31
USB20_P4 31
USB20_N5 34
USB20_P5 34
USB20_N6 31
USB20_P6 31
USB20_N7 24
USB20_P7 24
1 2
R411 22.6_0402_1%
2
1
PCIE_PTX_C_IRX_N2 24
PCIE_ITX_C_PRX_N2 PCIE_ITX_C_PRX_P2
USB_OC#5 USB_OC#7 USB_OC#1
+1.5VS
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
PCIE_PTX_C_IRX_P2 24
PCIE_ITX_C_PRX_N2 24 PCIE_ITX_C_PRX_P2 24
RP38
4 5 3 6 2 7 1 8
10K_1206_8P4R_5%
19 50,
1
+3VALW
of
B
Page 20
5
Near PIN F27,
+1.5VS
D D
+5VS
R475
100_0402_5%
Intel CRB : 100Ohm
C C
1U_0603_10V4Z
+3VS
21
D27
C546
2
1
RB751V_SOD323
0.1U_0402_16V4Z
(1uF x1, 0.1uF x1)
1 2
1
C36
2
220U_D2_4VM_R12
ICH_V5REF_RUN
2
C558
1
P27, AB27
2
+
C564
0.1U_0402_16V4Z
1
(220uF x1, 0.1uF x3)
15mils
2
C424
0.1U_0402_16V4Z
1
+1.5VS
Near PIN AG5
+1.5VS
+3VALW
+5VALW
B B
R446
10_0402_5%
+1.5VS
A A
Change to 0 ohm
21
D25
1 2
CHB1608U301_0603
1 2
RB751V_SOD323
ICH_V5REF_SUS
2
C481 1U_0603_10V4Z
1
(1uF x1, 0.1uF x1)
L12
(10uF x1, 0.01uF x1)
15mils
2
C458
0.1U_0402_16V4Z
1
R123
ICH6_VCCDMIPLL ICH6_VCCPLL
15mils 15mils
5
0.5_0603_1%
1 2
C565
0.1U_0402_16V4Z
Near PIN AG9
+3VS
0.1U_0402_16V4Z
1
2
2
1
C572
0.01U_0402_16V7K
Near PIN AC27
C451
2
1
+3VALW
Near PIN A17
4
2
C475
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2
C501
0.1U_0402_16V4Z
1
2
C500
0.1U_0402_16V4Z
1
Near PIN E26, E27
2
C429
1
0.1U_0402_16V4Z
4
2
C465
1
ICH6_VCCPLL
+1.5VS
+3VS
+3VS
+3VALW
2
C459
1
0.1U_0402_16V4Z
3
F9 U17 U16 U14 U12 U11 T17 T11 P17 P11 M17 M11 L17 L16 L14 L12 L11 AA21 AA20 AA19
AA10 AG19 AG16 AG13 AD17 AC15 AA17 AA15 AA14 AA12
P1 M7 L7 L4 J7 H7 H1 E4 B1 A6
U7 R7
G19 G20
F20 E24 E23 E22 E21 E20 D27 D26 D25 D24
G8 AB18
P7 AA18
A8 F21 A25
A24 AB3 G11
G10 AG23
AD26 AB22
G16 G15 F16 F15 E16 D16 C16
+1.5VS
C488
0.1U_0402_16V4Z
2
C575
1
0.1U_0402_16V4Z
C520
0.1U_0402_16V4Z
+1.5VS
ICH_V5REF_RUN
ICH_V5REF_SUS
2
C571
0.1U_0402_16V4Z
1
+RTCVCC
20mils
2
1
C576
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
C556
1
1
2
C508
1
0.1U_0402_16V4Z
2
C467
1
0.1U_0402_16V4Z
+1.5VS +3VALW
+RTCVCC
+1.5VS
+1.05VS
Near PIN AG23
Deciphered Date
C574
0.1U_0402_16V4Z
+3VS
Near PIN AG13, AG16
2
1
2
1
+2.5VS
C566
0.1U_0402_16V4Z
Near PIN AB18
U4E
AA22
VCC1_5[1]
AA23
VCC1_5[2]
AA24
VCC1_5[3]
AA25
VCC1_5[4]
AB25
VCC1_5[5]
AB26
VCC1_5[6]
AB27
VCC1_5[7]
F25
VCC1_5[8]
F26
VCC1_5[9]
F27
VCC1_5[10]
G22
VCC1_5[11]
G23
VCC1_5[12]
G24
VCC1_5[13]
G25
VCC1_5[14]
H21
VCC1_5[15]
H22
VCC1_5[16]
J21
VCC1_5[17]
J22
VCC1_5[18]
K21
VCC1_5[19]
K22
VCC1_5[20]
L21
VCC1_5[21]
L22
VCC1_5[22]
M21
VCC1_5[23]
M22
VCC1_5[24]
N21
VCC1_5[25]
N22
VCC1_5[26]
N23
VCC1_5[27]
N24
VCC1_5[28]
N25
VCC1_5[29]
P21
VCC1_5[30]
P25
VCC1_5[31]
P26
VCC1_5[32]
P27
VCC1_5[33]
R21
VCC1_5[34]
R22
VCC1_5[35]
T21
VCC1_5[36]
T22
VCC1_5[37]
U21
VCC1_5[38]
U22
VCC1_5[39]
V21
VCC1_5[40]
V22
VCC1_5[41]
W21
VCC1_5[42]
W22
VCC1_5[43]
Y21
VCC1_5[44]
Y22
VCC1_5[45]
AA6
VCC1_5[46]
AB4
VCC1_5[47]
AB5
VCC1_5[48]
AB6
VCC1_5[49]
AC4
VCC1_5[50]
AD4
VCC1_5[51]
AE4
VCC1_5[52]
AE5
VCC1_5[53]
AF5
VCC1_5[54]
AG5
VCC1_5[55]
AA7
VCC1_5[56]
AA8
VCC1_5[57]
AA9
VCC1_5[58]
AB8
VCC1_5[59]
AC8
VCC1_5[60]
AD8
VCC1_5[61]
AE8
VCC1_5[62]
AE9
VCC1_5[63]
AF9
VCC1_5[64]
AG9
VCC1_5[65]
AC27
VCCDMIPLL
E26
VCC3_3[1]
AE1
VCCSATAPLL
AG10
VCC3_3[22]
A13
VCCLAN3_3/VCCSUS3_3[1]
F14
VCCLAN3_3/VCCSUS3_3[2]
G13
VCCLAN3_3/VCCSUS3_3[3]
G14
VCCLAN3_3/VCCSUS3_3[4]
A11
VCCSUS3_3[1]
U4
VCCSUS3_3[2]
V1
VCCSUS3_3[3]
V7
VCCSUS3_3[4]
W2
VCCSUS3_3[5]
Y7
VCCSUS3_3[6]
A17
VCCSUS3_3[7]
B17
VCCSUS3_3[8]
C17
VCCSUS3_3[9]
F18
VCCSUS3_3[10]
G17
VCCSUS3_3[11]
G18
VCCSUS3_3[12]
ICH6_BGA609
PCIE
SATA
PCI/IDE RBP
VCCLAN1_5/VCCSUS1_5[2] VCCLAN1_5/VCCSUS1_5[1]
VCC1_5[98] VCC1_5[97] VCC1_5[96] VCC1_5[95] VCC1_5[94] VCC1_5[93] VCC1_5[92] VCC1_5[91] VCC1_5[90] VCC1_5[89] VCC1_5[88] VCC1_5[87] VCC1_5[86]
COREIDE
VCC1_5[85] VCC1_5[84] VCC1_5[83] VCC1_5[82] VCC1_5[81] VCC1_5[80] VCC1_5[79]
VCC3_3[21] VCC3_3[20] VCC3_3[19] VCC3_3[18] VCC3_3[17] VCC3_3[16] VCC3_3[15] VCC3_3[14] VCC3_3[13] VCC3_3[12]
VCC3_3[11] VCC3_3[10]
VCC3_3[9] VCC3_3[8] VCC3_3[7] VCC3_3[6] VCC3_3[5] VCC3_3[4]
PCIUSB
VCC3_3[3] VCC3_3[2]
VCCSUS1_5[3] VCCSUS1_5[2]
VCCSUS1_5[1]
VCC1_5[78] VCC1_5[77] VCC1_5[76] VCC1_5[75] VCC1_5[74] VCC1_5[73] VCC1_5[72] VCC1_5[71] VCC1_5[70] VCC1_5[69]
USB CORE
VCC1_5[68] VCC1_5[67]
VCC2_5[4] VCC2_5[2]
V5REF[2] V5REF[1]
V5REF_SUS
VCCUSBPLL
VCCSUS3_3[20]
VCCRTC
V_CPU_IO[3] V_CPU_IO[2] V_CPU_IO[1]
VCCSUS3_3[19] VCCSUS3_3[18] VCCSUS3_3[17] VCCSUS3_3[16] VCCSUS3_3[15] VCCSUS3_3[14] VCCSUS3_3[13]
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
2
1
+3VS
C457
0.1U_0402_16V4Z
Near PIN A2-A6, D1-H1
+1.5VALW
2
C528
0.1U_0402_16V4Z
1
2
1
2
+1.5VS
C533
0.1U_0402_16V4Z
1 2
C521
0.1U_0402_16V4Z
1 2
C582
0.1U_0402_16V4Z
1 2
C584
0.1U_0402_16V4Z
1 2
C499
0.1U_0402_16V4Z
1 2
C542
0.1U_0402_16V4Z
1 2
C515
0.1U_0402_16V4Z
1 2
C530
0.1U_0402_16V4Z
1 2
C549
0.1U_0402_16V4Z
1 2
C489
0.1U_0402_16V4Z
1 2
C436
0.01U_0402_16V7K
1 2
Near PIN A25
C514
0.01U_0402_16V7K
1 2
Near PIN AA19
+3VALW
C456
0.1U_0402_16V4Z
1 2
C464
0.1U_0402_16V4Z
1 2
C468
0.1U_0402_16V4Z
1 2
C450
0.1U_0402_16V4Z
1 2
Near PIN A24
+3VS
C449
0.1U_0402_16V4Z
1 2
C502
0.1U_0402_16V4Z
1 2
Near PIN AG10
Title
Size Document Number Rev
B
2
Date: Sheet
星期日
401353
01, 2006
一月
U4D
E27
Y6 Y27 Y26 Y23
W7 W25 W24 W23
W1
V4 V27 V26 V23 U25 U24 U23 U15 U13
T7 T27 T26 T23 T16 T15 T14 T13 T12
T1
R4 R25 R24 R23 R17 R16 R15 R14 R13 R12 R11 P22 P16 P15 P14 P13 P12
N7 N17 N16 N15 N14 N13 N12 N11
N1
M4 M27 M26 M23 M16 M15 M14 M13 M12
L25 L24 L23 L15 L13
K7 K27 K26 K23
K1
J4 J25 J24 J23
H27 H26 H23
G9
G7 G21 G12
G1
ICH6_BGA609
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
VSS[172] VSS[171] VSS[170] VSS[169] VSS[168] VSS[167] VSS[166] VSS[165] VSS[164] VSS[163] VSS[162] VSS[161] VSS[160] VSS[159] VSS[158] VSS[157] VSS[156] VSS[155] VSS[154] VSS[153] VSS[152] VSS[151] VSS[150] VSS[149] VSS[148] VSS[147] VSS[146] VSS[145] VSS[144] VSS[143] VSS[142] VSS[141] VSS[140] VSS[139] VSS[138] VSS[137] VSS[136] VSS[135] VSS[134] VSS[133] VSS[132] VSS[131] VSS[130] VSS[129] VSS[128] VSS[127] VSS[126] VSS[125] VSS[124] VSS[123] VSS[122] VSS[121] VSS[120] VSS[119] VSS[118] VSS[117] VSS[116] VSS[115] VSS[114] VSS[113] VSS[112] VSS[111] VSS[110] VSS[109] VSS[108] VSS[107] VSS[106] VSS[105] VSS[104] VSS[103] VSS[102] VSS[101] VSS[100] VSS[99] VSS[98] VSS[97] VSS[96] VSS[95] VSS[94] VSS[93] VSS[92] VSS[91] VSS[90] VSS[89] VSS[88] VSS[87]
1
F4
VSS[86]
F22
VSS[85]
F19
VSS[84]
F17
VSS[83]
E25
VSS[82]
E19
VSS[81]
E18
VSS[80]
E15
VSS[79]
E14
VSS[78]
D7
VSS[77]
D22
VSS[76]
D20
VSS[75]
D18
VSS[74]
D14
VSS[73]
D13
VSS[72]
D10
VSS[71]
D1
VSS[70]
C4
VSS[69]
C22
VSS[68]
C20
VSS[67]
C18
VSS[66]
C14
VSS[65]
B25
VSS[64]
B24
VSS[63]
B23
VSS[62]
B21
VSS[61]
B19
VSS[60]
B15
VSS[59]
B13
VSS[58]
AG7
VSS[57]
AG3
VSS[56]
AG22
VSS[55]
AG20
VSS[54]
AG17
VSS[53]
AG14
VSS[52]
AG12
VSS[51]
AG1
VSS[50]
AF7
VSS[49]
AF3
VSS[48]
AF26
VSS[47]
AF12
VSS[46]
AF10
VSS[45]
AF1
VSS[44]
AE7
VSS[43]
AE6
VSS[42]
AE25
VSS[41] VSS[40] VSS[39] VSS[38] VSS[37] VSS[36] VSS[35] VSS[34] VSS[33] VSS[32] VSS[31] VSS[30] VSS[29] VSS[28] VSS[27] VSS[26] VSS[25] VSS[24] VSS[23] VSS[22] VSS[21] VSS[20] VSS[19] VSS[18] VSS[17] VSS[16] VSS[15] VSS[14] VSS[13] VSS[12] VSS[11] VSS[10]
VSS[9] VSS[8] VSS[7] VSS[6] VSS[5] VSS[4] VSS[3] VSS[2] VSS[1]
20 50,
AE21 AE2 AE12 AE11 AE10 AD6 AD24 AD2 AD18 AD15 AD10 AD1 AC6 AC3 AC26 AC24 AC23 AC22 AC12 AC10 AB9 AB7 AB2 AB19 AB10 AB1 AA4 AA16 AA13 AA11 A9 A7 A4 A26 A23 A21 A19 A15 A12 A1
B
of
GROUND
1
Page 21
A
1 1
+5VS
0.1U_0402_16V4Z
1
C357
2
1000P_0402_50V7K
B
Placea caps. near ODD CONN.
10U_1206_16V4Z
C356
1
2
1
C344
2
1U_0603_10V4Z
1
C355
2
C
1
C347
2
10U_1206_16V4Z
D
IDE_DD[0..15]18
IDE_DA[0..2]18
IDE_DD[0..15] IDE_DA[0..2]
E
IDE_HRESET#19
PLT_RST#6,17,19,30,32
F
IDE_HRESET# PLT_RST#
+3VS
1
B
2
A
C692
0.1U_0402_16V4Z
1 2
5
U49
P
4
Y
G
TC7SH08FU_SSOP5
3
IDE_RST#
G
H
2 2
ODD Conn.
JP48
INT_CD_L36 CD_AGND36
IDE_DIOW#18
IDE_DIORDY18
IDE_IRQ18
IDE_DCS1#18
IDE_LED#32
+5VS +5VS
+5VS
3 3
IDE_CSEL Grounding for Master (When use SATA HDD) Open or High for Slaver (Normal)
4 4
1 2
R566 475_0402_1%@
1 2
R567 475_0402_1%@
CDROM_L CD_AGND IDE_RST# IDE_DD7 IDE_DD6 IDE_DD5 IDE_DD4
IDE_DD2 IDE_DD1 IDE_DD0
IDE_DIOW# IDE_DIORDY IDE_IRQ IDE_DA1 IDE_DA0 IDE_DCS1# IDE_LED#
IDE_CSEL
***
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
SUYIN_800031MR050S122ZL
+5VS
R569 100K_0402_5%
CDROM_R IDE_DD8
IDE_DD9 IDE_DD10 IDE_DD11 IDE_DD12 IDE_DD13IDE_DD3 IDE_DD14 IDE_DD15 IDE_DDREQ IDE_DIOR#
IDE_DDACK# IDE_PDIAG#
IDE_DA2 IDE_DCS3#
IDE_LED#
12
INT_CD_R 36
1 2
IDE_DDREQ 18 IDE_DIOR# 18
IDE_DDACK# 18
R568
100K_0402_5%
IDE_DCS3# 18
+5VS
+5VS
IDE_RST# IDE_DD7 IDE_DD6 IDE_DD5 IDE_DD4 IDE_DD3 IDE_DD2 IDE_DD1 IDE_DD0
IDE_DDREQ IDE_DIOW# IDE_DIOR# IDE_DIORDY IDE_DDACK# IDE_IRQ IDE_DA1 IDE_DA0 IDE_DCS1# IDE_LED#
SATA_DTX_C_IRX_N018 SATA_DTX_C_IRX_P018
+5VS
0.1U_0402_16V4Z
1
C690
C689
2
1000P_0402_50V7K
OCTEK_HDD-22SC1G_REVERS
1
2
JP52
44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10
8 6 4 2
1
C684
2
1U_0603_10V4Z
434344 414142 393940 373738 353536 333334 313132 292930 272728 252526 232324 212122 191920 171718 151516 131314 111112
9910 778 556 334 112
PATA/SATA HDD Conn.
SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0
10U_1206_16V4Z
1
C687
2
IDE_DD8 IDE_DD9 IDE_DD10 IDE_DD11 IDE_DD12 IDE_DD13 IDE_DD14 IDE_DD15
PCSEL
1 2
R565 475_0402_1%
IDE_PDIAG# IDE_DA2 IDE_DCS3#
+5VS
12
C694 0.01U_0402_16V7K@
12
C693 0.01U_0402_16V7K@
1
C686
2
10U_1206_16V4Z
SATA_ITX_C_DRX_P018 SATA_ITX_C_DRX_N018
SATA_DTX_IRX_N0 SATA_DTX_IRX_P0
SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0
SATA_DTX_IRX_N0 SATA_DTX_IRX_P0
+3VS
+5VS
1 2
R564 0_0402_5%@
+3VS +5VS
1
C691
2
0.1U_0402_16V4Z@
C688
0.1U_0402_16V4Z@
1
2
JP50
1
GND
2
HTX+
3
HTX-
4
GND
5
HRX-
6
HRX+
7
GND
8
VCC3.3
9
VCC3.3
10
VCC3.3
11
GND
12
GND
13
GND
14
VCC5
15
VCC5
16
VCC5
17
GND
18
RESERVED
19
GND
20
VCC12
21
VCC12
22
VCC12
OCTEK_SAT-22SD1G@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2005/07/29 2006/07/29
Deciphered Date
E
Title
Size Document Number Rev
B
F
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
G
B
21 50,
of
H
Page 22
A
+3VS
40mil
0.1U_0402_16V4Z
1
1
C321
0.1U_0402_16V4Z
1 1
+3VS
2 2
+VCC_SD
12
R550
+3VS
3 3
1 2
R276 43K_0402_5%
0_0805_5%@
1 2
R552 0_0805_5%@
1 2
R555 43K_0402_5%@
1 2
R556 43K_0402_5%@
1 2
R563 43K_0402_5%@
1 2
R553 43K_0402_5%@
1 2
R554 43K_0402_5%@
1 2
R260 43K_0402_5%@
1 2
R264 43K_0402_5%@
SM_CD#
SD_PULLHIGH
SDCM_XDALE SDDA0_XDD7 SDDA1_XDD0 SDDA2_XDCL SDDA3_XDD4
SD_CD# SD_WP#
C330
2
2
0.1U_0402_16V4Z
1
C334
2
0.1U_0402_16V4Z
1
C336
2
0.1U_0402_16V4Z
PCI_AD[0..31]17,25,26,28,29
PCI_CBE#[0..3]17,25,26,28,29
+3VS
MS_PWREN#23
internal pull-up
MFUNC5[3:0] = (0 1 0 1)
internal pull-dow n
1 2
R275 43K_0402_5%@
1 2
R286 43K_0402_5%@
1 2
R269 43K_0402_5%@
1 2
R263 43K_0402_5%@
1 2
R290 43K_0402_5%@
4 4
MSD0_XDD2 MSD1_XDD6 MSD2_XDD5 MSD3_XDD3 MSBS_XDD1
MFUNC5[4] = 1
0.1U_0402_16V4Z
1
C319
2
12
R306
1
C350
2
R253 10K_0402_5%
B
1
C352
2
CLK_PCI_PCM
10_0402_5%@
15P_0402_50V8J@
1 2
SDCK_XDWE#23
1
C351
2
0.1U_0402_16V4Z
PCI_AD[0..31] PCI_CBE#[0..3]
12
1
2
R282
1 2
0_0402_5%@
VPPD023 VPPD123 VCCD0#23 VCCD1#23
CLK_SD_48M
R558
10_0402_5%@
C680
15P_0402_50V8J@
PCI_RST#17,24,25,26,28,29
PCI_FRAME#17,25,26,28,29
PCI_IRDY#17,25,26,28,29
PCI_TRDY#17,25,26,28,29
PCI_DEVSEL#17,25,26,28,29
PCI_STOP#17,25,26,28,29 PCI_PERR#17,25,26,28,29 PCI_SERR#17,25,26,28,29
PCI_PAR17,25,26,28,29
PCI_REQ#217
PCI_GNT#217
CLK_PCI_PCM13
PCM_PME#25,26,28,32
PCI_AD20
PCI_PIRQA#17,29 PCI_PIRQB#17
SERIRQ19,30,32 5IN1_LED#32 SDOC#23
SD_CD#23 SD_WP#23
SD_PWREN#23
CLK_SD_48M13
R309 33_0402_5%
1 2
SDCM_XDALE23
SDDA0_XDD723 SDDA1_XDD023 SDDA2_XDCL23 SDDA3_XDD423
1 2
R308 100_0402_5%
+VCC_SD
VPPD0 VPPD1 VCCD0# VCCD1#
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_CBE#3 PCI_CBE#2 PCI_CBE#1 PCI_CBE#0
PCI_RST#
PCI_REQ#2
CLK_PCI_PCM
SD_PULLHIGH
SM_CD#
5IN1_LED#
SDOC#
PCI_RST#
SD_CD# SD_WP# SD_PWREN#
CLK_SD_48M
SDCM_XDALE SDDA0_XDD7 SDDA1_XDD0 SDDA2_XDCL SDDA3_XDD4
U25
C2
AD31
C1
AD30
D4
AD29
D2
AD28
D1
AD27
E4
AD26
E3
AD25
E2
AD24
F2
AD23
F1
AD22
G2
AD21
G3
AD20
H3
AD19
H4
AD18
J1
AD17
J2
AD16
N2
AD15
M3
AD14
N3
AD13
K4
AD12
M4
AD11
K5
AD10
L5
AD9
M5
AD8
K6
AD7
M6
AD6
N6
AD5
M7
AD4
N7
AD3
L7
AD2
K7
AD1
N8
AD0
E1
CBE3#
J3
CBE2#
N1
CBE1#
N5
CBE0#
G4
PCIRST#
J4
FRAME#
K1
IRDY#
K3
TRDY#
L1
DEVSEL#
L2
STOP#
L3
PERR#
M1
SERR#
M2
PAR
A1
PCIREQ#
B1
PCIGNT#
H1
PCICLK
L8
RIOUT#_PME#
L11
SUSPEND#
F4
IDSEL
K8
MFUNC0
N9
MFUNC1
K9
MFUNC2
N10
MFUNC3
L10
MFUNC4
N11
MFUNC5
M11
MFUNC6
J9
MFUNC7
M10
GRST#
E7
VCC_SD
E8
SDCD#
F8
SDWP/SMWPD#
G7
SDPWREN33#
H5
SDCLKI
F6
SDCLK/SMWE#
E5
SDCMD/SMALE
E6
SDDAT0/SMDATA7
F7
SDDAT1/SMDATA0
F5
SDDAT2/SMCLE
G6
SDDAT3/SMDATA4
G5
GND_SD
C
+S1_VCC
N13
M13
N12
M12
VPPD0
VPPD1
VCCD0#
VCCD1#
PCI Interface
SD/MMC/MS/SM
G13
A7
VCCA1
VCCA2
GND1D3GND2H2GND3L4GND4M8GND5
+3VS
N4
L6
C8
L9
H11
D12
B4
VCC4
VCC5
VCC9
VCC6
VCC7
VCC8
VCC10
CARDBUS
CREQ#/INPACK#
CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#
CINT#/READY_IREQ#
CAUDIO/BVD2_SPKR#
MSPWREN#/SMPWREN#
MSBS/SMDATA1
MSDATA0/SMDATA2 MSDATA1/SMDATA6 MSDATA2/SMDATA5 MSDATA3/SMDATA3
GND6
GND7
GND8
CB714_LFBGA169
B6
F12
K11
C10
G1
K2
F3
VCC2
VCC3
VCC1
CAD31/D10
CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6
CAD19/A25
CAD18/A7 CAD17/A24 CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11 CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4 CAD0/D3
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20 CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CGNT#/WE#
CCLK/A16
CBLOCK#/A19
SPKROUT
CCD2#/CD2# CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2 CRSV2/A18 CRSV1/D14
MSINS#
MSCLK/SMRE#
SMBSY#
SMCD# SMWP#
SMCE#
B2 C3 B3 A3 C4 A6 D7 C7 A8 D8 A9 C9 A10 B10 D10 E12 F10 E13 F13 F11 G10 G11 G12 H12 H10 J11 J12 K13 J10 K10 K12 L13
B7 A11 E11 H13
B9 B11 A12 A13 B13 C12 C13 A5 D13 B8 C11 B12
C5 D5
D11 D6 M9
B5 A4
L12 D9 C6 A2 E10 J13
H7 J8 H8 E9 G9 H9 G8 F9
H6 J7 J6 J5
D
S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3
S1_REG# S1_A12 S1_A8 S1_CE1#
S1_RST S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A14 S1_WAIT# S1_A13 S1_INPACK# S1_WE#
S1_BVD1 S1_WP
S1_A19 S1_RDY# PCM_SPK#
S1_BVD2 S1_CD2#
S1_CD1# S1_VS2 S1_VS1 S1_D2 S1_A18 S1_D14
XD_PWREN# MSBS_XDD1
R257 33_0402_5%
MSD0_XDD2 MSD1_XDD6 MSD2_XDD5 MSD3_XDD3
XD_CD# XD_WP#
1 2
1 2
R277 33_0402_5%
1 2
R310
2.2K_0402_5%
S1_IOWR# 23 S1_IORD# 23 S1_OE# 23
S1_CE2# 23
S1_REG# 23
S1_CE1# 23 S1_RST 23
S1_WAIT# 23 S1_INPACK# 23
S1_WE# 23
S1_BVD1 23 S1_WP 23
S1_RDY# 23
PCM_SPK# 36
S1_BVD2 23 S1_CD2# 23
S1_CD1# 23 S1_VS2 23 S1_VS1 23
S1_A16
XD_BSY# 23 XD_CD# 23 XD_WP# 23 XD_CE# 23
S1_A[0..25] S1_D[0..15]
C341
4.7U_0805_10V4Z
0.1U_0402_16V4Z
MS_INS# 23 XD_PWREN# 23 MSBS_XDD1 23 MSCLK_XDRE# 23 MSD0_XDD2 23 MSD1_XDD6 23 MSD2_XDD5 23 MSD3_XDD3 23
E
S1_A[0..25] 23 S1_D[0..15] 23
+3VS
1
1
C320
C337 10P_0402_50V8J
C340
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C331
2
1 2
R287 10K_0402_5%@
2
1
2
+S1_VCC
1
2
PCM_SPK#
S1_CD2# S1_CD1#
C312
+3VS
2
10P_0402_50V8J
1
**CB714 use B0 version
Security Classification
Issued Date
THIS SHEET OF ENG INEE RIN G DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2005/07/29 2006/07/29
Compal Secret Data
Deciphered Date
Title
Size Document Number R ev
Custom
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日 一
01, 2006
E
22 50,
B
of
Page 23
A
B
C
D
E
PCMCIA Power Control
+S1_VCC
+S1_VCC
VCC VCC VCC
40mil
13 12 11
1
C659
4.7U_0805_10V4Z
2
40mil
10
VPP
VCCD0#
1
VCCD0 VCCD1 VPPD0 VPPD1
OC
SHDN
CP-2211_SSOP16
VCCD1#
2
VPPD0
15
VPPD1
14
8
**ENE CP-2211 use D3 version
+S1_VPP
1
C662
0.1U_0402_16V4Z
2
VCCD0# 22
VCCD1# 22 VPPD0 22 VPPD1 22
S1_OE# S1_A23 S1_WP S1_RST S1_CE1# S1_CE2#
1 1
+5VS
U46
9
12V
W=40mil
1
C664 10U_0805_10V4Z
2
1
C657 10U_0805_10V4Z
2
2 2
1
C663
2
0.1U_0402_16V4Z
W=40mil
1
C660
2
0.1U_0402_16V4Z
+3VS
5 6
3 4
12
R543 10K_0402_5%
5V 5V
3.3V
3.3V
VCCD0# VCCD1#
GND
7
16
1 2
R538 10K_0402_5%
1 2
R542 10K_0402_5%
1
C324
10U_0805_10V4Z
2
+S1_VPP
1
C323
2
10U_0805_10V4Z
1 2
R298 43K_0402_5% R256 43K_0402_5% R234 43K_0402_5%
1 2
R249 43K_0402_5%
1 2
R303 43K_0402_5%
1 2
R300 43K_0402_5%
C327
C325
12 12
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
+S1_VCC +S1_VCC +S1_VCC +S1_VCC +S1_VCC +S1_VCC
XD Power Control
+3VS
+VCC_XD+3VS
R545
3 3
SD_PWREN#
10K_0402_5%
XD_PWREN#
1 2
R572 0_0402_5%
1 2
U48
1
GND
2
IN
3
IN
4
EN#
G528_SO8
XD_PWREN#
OUT OUT OUT FLG
8 7 6 5
2
G
SD/MS Power Control
+3VS
+3VS
R548
4 4
10K_0402_5%@
SD_PWREN#22 MS_PWREN#22
1 2
A
U47
1
GND
2
IN
3
IN
4
EN#
G528_SO8@
OUT OUT OUT FLG
40mil
8 7 6 5
+VCC_SD
+3VS
40mil
1 2
SDOC#
12
R537 300_0603_5%
13
D
Q36 2N7002_SOT23
S
+VCC_XD
1 2
R573 0_0805_5%
SDOC#SD_PWREN#
B
R544
xD PU and PD. Close to Socket
+3VS
10K_0402_5%
SDOC# 22XD_PWREN#22
R557 43K_0402_5%@
+VCC_XD
1 2
R560 10K_0402_5%
1 2
R562 10K_0402_5%
1 2
R561 2.2K_0402_5% R559 10K_0402_5%
Reserve for SD,MS CLK. Close to Socket
SDCK_XDWE#
MSCLK_XDRE#
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
XD_CD#
12
MSCLK_XDRE#
SDCK_XDWE#
XD_CE# XD_BSY#
12
1 2
C679 10P_0402_50V8J
1 2
C673 10P_0402_50V8J
2005/07/29 2006/07/29
C
SDDA3_XDD422
SDDA0_XDD722
SDCK_XDWE#22
MSCLK_XDRE#22
S1_A[0..25]22
S1_D[0..15]22
S1_CE1#22
S1_OE#22
S1_WE#22
S1_RDY#22
+S1_VCC +S1_VPP
S1_WP22
+VCC_XD +VCC_SD
1
C697
10U_0805_10V4Z
SDDA1_XDD022 MSBS_XDD122 MSD0_XDD222 MSD3_XDD322
MSD2_XDD522 MSD1_XDD622
XD_WP#22
SDCM_XDALE22
XD_CD#22
XD_BSY#22
XD_CE#22
SDDA2_XDCL22
C695
0.1U_0402_16V4Z
2
Deciphered Date
S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_CE1# S1_A10 S1_OE# S1_A11 S1_A9 S1_A8 S1_A13 S1_A14 S1_WE# S1_RDY#
S1_A16 S1_A15 S1_A12 S1_A7 S1_A6 S1_A5 S1_A4 S1_A3 S1_A2 S1_A1 S1_A0 S1_D0 S1_D1 S1_D2 S1_WP
1
2
SDDA1_XDD0 MSBS_XDD1 MSD0_XDD2 MSD3_XDD3 SDDA3_XDD4 MSD2_XDD5 MSD1_XDD6 SDDA0_XDD7
SDCK_XDWE# XD_WP# SDCM_XDALE XD_CD# XD_BSY# MSCLK_XDRE# XD_CE# SDDA2_XDCL
S1_A[0..25] S1_D[0..15]
PCMCIA Socket
JP51
1
GND
2
D3
3
D4
4
D5
5
D6
6
D7
7
CE1#
8
A10
9
OE#
10
A11
11
A9
12
A8
13
A13
14
A14
15
WE#
16
IREQ#
17
VCC
18
VPP1
19
A16
20
A15
21
A12
22
A7
23
A6
24
A5
25
A4
26
A3
27
A2
28
A1
29
A0
30
D0
31
D1
32
D2
33
IOIS16#
34
GND
SLINK_AC4-3000-500-3_RB
4 IN 1 Socket
JP46
34
XD-VCC
26
XD-D0
27
XD-D1
28
XD-D2
29
XD-D3
30
XD-D4
31
XD-D5
32
XD-D6
33
XD-D7
24
XD-WE
25
XD-WP
23
XD-ALE
18
XD-CD
19
XD-R/B
20
XD-RE
21
XD-CE
22
XD-CLE
TAITW_R007-520-L3
D
4 IN 1 CONN
SD / MMC / MS(PRO) / XD
35
GND
36
CD1#
37
D11
38
D12
39
D13
40
D14
41
D15
42
CE2#
43
VS1#
44
IORD#
45
IOWR#
46
A17
47
A18
48
A19
49
A20
50
A21
51
VCC
52
VPP2
53
A22
54
A23
55
A24
56
A25
57
VS2#
58
RESET
59
WAIT#
60
INPACK#
61
REG#
62
SPKR#
63
STSCHG#
64
D8
65
D9
66
D10
67
CD2#
68
GND
SD-VCC
MS-VCC
SD-CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3
SD-CMD SD-CD-SW SD-WP-SW
MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3
MS-INS
MS-BS
4IN1-GND 4IN1-GND
Title
Size Document Number Rev
B
Date: Sheet
星期日
01, 2006
C666
10U_0805_10V4Z
14 3
15 16 17 11 12 13 2 35
4 8 9 7 5 6 10
1 36
S1_CD1#
S1_D11 S1_D12 S1_D13 S1_D14 S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17 S1_A18 S1_A19 S1_A20 S1_A21
S1_A22 S1_A23 S1_A24 S1_A25 S1_VS2 S1_RST
S1_WAIT#
S1_INPACK#
S1_REG# S1_BVD2 S1_BVD1
S1_D8 S1_D9
S1_D10
S1_CD2#
1
2
0.1U_0402_16V4Z
SDCK_XDWE# SDDA0_XDD7 SDDA1_XDD0 SDDA2_XDCL SDDA3_XDD4 SDCM_XDALE SD_CD# SD_WP#
MSCLK_XDRE# MSD0_XDD2 MSD1_XDD6 MSD2_XDD5 MSD3_XDD3 MS_INS# MSBS_XDD1
C677
1
2
+VCC_SD+VCC_XD
S1_CD1# 22
S1_CE2# 22 S1_VS1 22 S1_IORD# 22 S1_IOWR# 22
+S1_VCC +S1_VPP
S1_VS2 22 S1_RST 22 S1_WAIT# 22 S1_INPACK# 22 S1_REG# 22 S1_BVD2 22 S1_BVD1 22
S1_CD2# 22
1
C672
0.1U_0402_16V4Z
2
SD_CD# 22
SD_WP# 22
MS_INS# 22
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
一月
23 50,
E
of
B
Page 24
A
B
C
D
E
New Card Power Switch
New Card Socket (Left)
U36
+3VS
1 1
+3VALW
+1.5VS
+3VALW
2 2
10U_0805_10V4Z
R33 100K_0402_5% R32 100K_0402_5%
1 2
SUSP#15,32,33,40 SYSON32,40,46
PCI_RST#17 ,2 2 ,25,26,28,29
+3VS +1.5VS+3VALW
1
C418
2
12
C432
10U_0805_10V4Z
CP_USB1# CP_PE1# SUSP#
SYSON
PCI_RST#
1
2
5
3.3Vin1
6
3.3Vin2
21
3.3Vaux_in
18
1.5Vin1
19
1.5Vin2
14
CPUSB#
15
CPPE#
4
STBY#
3
SHDN#
2
SYSRST#
GND
11
1
C431
10U_0805_10V4Z
2
3.3Vout1
3.3Vout2
Aux_out
1.5Vout1
1.5Vout2
RCLKEN
PERST#
NC11NC210NC312NC413NC5
24
OC#
60mils
7 8
20
16 17
23 22
9
TPS2231PWPR_PWP24
40mil 40mil
RCLKEN1 PERST1#
+3VS_CARD1
+3VALW_CARD1
+1.5VS_CARD1
+3VALW_CARD1 +3VS_CARD1 +1. 5 V S _ CARD1
C478
10U_0805_10V4Z
10K_0402_5%
RCLKEN1
1
2
+3VS
R30
2
G
0.1U_0402_16V4Z
12
13
D
Q5 2N7002_SOT23
S
1
C472
2
10K_0402_5%
CLKREQ1#
10U_0805_10V4Z
+3VS +3VS
R31
1
C495
2
12
2
I0
1
I1
1 2
R29 0_0402_5%@
Imax = 1.35A Imax = 0.75AImax = 0.275A
1
C486
2
0.1U_0402_16V4Z
1
C30
0.1U_0402_16V4Z
2
5
3
U2
P
4
O
G
TC7SH32FU_SSOP5
1
C460
10U_0805_10V4Z
2
PCIEC_CLKREQ1# 13
1
C438
2
0.1U_0402_16V4Z
EXP_CPPE#19
JP28
1
GND
USB20_N719
USB20_P719
0_0402_5% R404
CK_SCLK13,19
CK_SDATA13,19
R409
+1.5VS_CARD1
ICH_PCIE_WAKE#19
+3VALW_CARD1
+3VS_CARD1
1 2
CLK_PCIE_CARD1#13 CLK_PCIE_CARD113
PCIE_PTX_C_IRX_N219 PCIE_PTX_C_IRX_P219
PCIE_ITX_C_PRX_N219 PCIE_ITX_C_PRX_P219
1 2 1 2
R448 0_0402_5%
CP_USB1#
NEWCARD_SCL K NEWCARD_SDATA
0_0402_5%
PERST1#
CLKREQ1# CP_PE1#EXP_CPPE#
2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
27 28
TYCO_1759056-1
USB_D­USB_D+ CPUSB# RSV RSV SMB_CLK SMB_DATA +1.5V +1.5V WAKE# +3.3VAUX PERST# +3.3V +3.3V CLKREQ# CPPE# REFCLK­REFCLK+ GND PERn0 PERp0 GND PETn0 PETp0 GND
GND GND
3 3
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
E
B
24 50,
of
Page 25
A
+3VS
1
C284
0.1U_0402_16V4Z
2
+3VS
1 1
1
C309 1000P_0402_50V7K
2
2 2
IDSEL:PCI_AD16
3 3
4 4
PCI_AD[0..31]17 , 2 2,26,28,29
PCI_AD16
1
C305
0.1U_0402_16V4Z
2
1
C308 1000P_0402_50V7K
2
1 2
R250 100_0402_5%
RP24
220_1206_8P4R_5%
A
1394_GPIO3
45
1394_GPIO2
36
1394_SCL
27
1394_SDA
18
1
2
1
2
PCI_AD[0..31]
1394_IDSEL
PCI_CBE#317,22,26,28,29 PCI_CBE#217,22,26,28,29 PCI_CBE#117,22,26,28,29 PCI_CBE#017,22,26,28,29
CLK_PCI_139413
PCI_GNT#017
PCI_REQ#017
PCI_FRAME#17,22,26,28,29
PCI_IRDY#17,22,26,28,29
PCI_TRDY#17,22,26,28,29
PCI_DEVSEL#17,22,26,28,29
PCI_STOP#17,22,26,28,29
PCI_PERR#17,22,26,28,29
PCI_PIRQE#17
1394_PME#22,26,28,32
PCI_SERR#17,22,26,28,29
PCI_PAR17,22,26,28,29
PM_CLKRUN#19,26,28,29,30
PCI_RST#17 ,2 2 ,24,26,28,29
C306
0.1U_0402_16V4Z
C304 1000P_0402_50V7K
CLK_PCI_1394
1
C281
0.1U_0402_16V4Z
2
1
C285 1000P_0402_50V7K
2
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8
PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
CLK_PCI_1394
PCI_GNT#0 PCI_REQ#0 1394_IDSEL
PCI_FRAME#
PCI_IRDY# PCI_TRDY#
PCI_DEVSEL#
PCI_STOP# PCI_PERR# PCI_PIRQE# 1394_PME# PCI_SERR# PCI_PAR
1394_GPIO3
1394_GPIO2
12
R243
10_0402_5%@
1
C279
10P_0402_50V8J@
2
84 82 81 80 79 77 76 74 71 70 69 67 66 65 63 61 46 45 43 42 41 40 38 37 32 31 29 28 26 25 24 22 34 47 60 73 16 18 19 36 49 50 52 53 54 56 13 21 57 58 12 85
14 89
90
B
U21
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE3 PCI_C/BE2 PCI_C/BE1 PCI_C/BE0 PCI_CLK PCI_GNT PCI_REQ PCI_IDSEL PCI_FRAME PCI_IRDY PCI_TRDY PCI_DEVSEL PCI_STOP PCI_PERR PCI_INTA/CINT PCI_PME/CSTSCHG PCI_SERR PCI_PAR PCI_CLKRUN PCI_RST
G_RST GPIO3
GPIO2
PLLGND18REG_EN9AGND
B
+3VS
78
VDDP20VDDP35VDDP48VDDP62VDDP
TSB43AB21 /(TSB43AB22)
PCI BUS INTERFACE
AGND
AGND
AGND
AGND
AGND
AGND
DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND
109
110
111
117
126
127
128
1
0.1U_0402_16V4Z
2
C
+3VS
1 2
R233 4.7K_0402_5%
1 2
R239 10K_0402_5%
1 2
R228 4.7K_0402_5%
1 2
R240 4.7K_0402_5%
12
R241 4.7K_0402_5%
87
86
11
96
15
DVDD
CYCLEIN
CYCLEOUT/CARDBUS
BIAS CURRENT
OSCILLATOR
FILTER
EEPROM 2 WIRE BUS
POWER CLASS
PHY PORT 1
103
1
C259
0.1U_0402_16V4Z
2
C296
CNA
TEST1710TEST16
NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)
DVDD DVDD DVDD DVDD DVDD DVDD DVDD
PLLVDD
AVDD AVDD AVDD AVDD AVDD
CPS
FILTER0 FILTER1
SDA SCL PC0
PC1 PC2
TPBIAS0
TPA0+
TPA0-
TPB0 +
TPB0 -
TEST9 TEST8
TEST3 TEST2 TEST1 TEST0
TSB43AB21A_PQFP128
R0
R1 X0
X1
27 39 51 59 72 88 100 7 1 2 107 108 120
R535 1K_0402_5%
106
125 124 123 122 121
118
R536
119 6
5
C248
3 4 92 91 99
98 97
116 115 114 113 112
94 95
101 102 104 105
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
+3VS
20mils
+1394_PLLVDD
+3VS
1 2
6.34K_0402_1%
C263 22P_0402_50V8J
X2
1 2
C255 22P_0402_50V8J
1 2
0.1U_0402_16V4Z
10mils
1 2
24.576MHz_16P_3XG-24576-43E1
1 2
TPBIAS0 TPA0+ TPA0­TPB0+ TPB0-
1 2
1394_SDA 1394_SCL
2005/07/29 2006/07/29
0.01U_0402_16V7K
1
1
C264
2
2
15mils
Deciphered Date
C658
1 2
4.7U_0805_10V4Z
15mils
12
R222
12
R225
1
C237
2
D
R254
0_0805_5%
56.2_0402_1%
56.2_0402_1%
220P_0402_50V7K
D
E
+3VS
12
R223
56.2_0402_1%
12
R226
12
R219
1
C238
0.33U_0603_16V4Z
2
JP35
4
4
3 2 1
FOX_UV31413-4R1-TR
56.2_0402_1%
5.11K_0402_1%
Title
Size Document Number Rev
B
Date: Sheet
星期日
401353
01, 2006
一月
6
3
6
5
5
2 1
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
E
B
25 50,
of
Page 26
5
4
3
2
1
PCI_AD[0..31]17 , 2 2,25,28,29
D D
C C
B B
CLK_PCI_LAN
A A
5
PCI_CBE#017,22,25,28,29 PCI_CBE#117,22,25,28,29 PCI_CBE#217,22,25,28,29 PCI_CBE#317,22,25,28,29
PCI_AD17 LAN_IDSEL
PCI_FRAME#17,22,25,28,29
PCI_DEVSEL#17,22,25,28,29
PCI_PIRQF#17
CLK_PCI_LAN13
PM_CLKRUN#19,25,28,29,30
12
R34
1
C33
2
PCI_AD[0..31]
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
1 2
R63 100_0402_5%
PCI_PAR17,22,25,28,29
PCI_IRDY#17,22,25,28,29
PCI_TRDY#17,22,25,28,29
PCI_STOP#17,22,25,28,29
PCI_PERR#17,22,25,28,29 PCI_SERR#17,22,25,28,29
PCI_REQ#317 PCI_GNT#317
LAN_PME#2 2, 25,28,32
PCI_RST#17 ,2 2 ,24,25,28,29
10_0402_5%@
18P_0402_50V8J@
CLK_PCI_LAN PM_CLKRUN#
RTL8110SBL change to Ver.D
104 103 102
98 97 96 95 93 90 89 87 86 85 83 82 79 59 58 57 55 53 50 49 47 43 42 40 39 37 36 34 33
92 77 60 44
46 76
61 63 67 68 69
70 75
30 29
25 31 27 28
65
4
17
128
21 38 51 66 81
91 101 119
35
52
80 100
U3
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
IDSEL PAR
FRAME# IRDY# TRDY# DEVSEL# STOP#
PERR# SERR#
REQ# GNT#
INTA# PME# RST# CLK
CLKRUN#
GND/VSS GND/VSS GND/VSS
GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST
GND GND GND GND
RTL8110SBL_LQFP1288110S@
EEDO
AUX/EEDI
EESK EECS
LED0 LED1 LED2
NC/LED3
TXD+/MDI0+
TXD-/MDI0-
RXIN+/MDI1+
RXIN-/MDI1-
NC/MDI2+
NC/MDI2-
NC/MDI3+
NC/MDI3-
X1 X2
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
NC/M66EN
NC/AVDDH
PCI I/F
AVDDH
NC/HSDAC+
NC/HG
NC/LG2
NC/VSS NC/VSS
NC/GND NC/GND NC/GND NC/GND NC/GND
LAN I/F
NC/GND
CTRL25 CTRL12
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
AVDDL AVDDL AVDDL AVDDL
VDD12 VDD12 VDD12 VDD12 VDD12
NC/VDD12 NC/VDD12 NC/VDD12 NC/VDD12 NC/VDD12
Power
4
NC
R103 3.6K_0402_5%
LAN_EEDO
108
LAN_EEDI
109
LAN_EECLK
111
LAN_EECS
106
ACTIVITY#
117
LINK_100#
115 114
LINK_1000#
113
LAN_MDI0+
1
LAN_MDI0-
2
LAN_MDI1+
5
LAN_MDI1-
6
LAN_MDI2+
14
LAN_MDI2-
15
LAN_MDI3+
18
LAN_MDI3-
19 121
122 105
23 127 72 74
88 10
120 11
123 124
9 13
22 48 62 73 112 118
8 125 26
41 56 71 84 94 107
3 7 20 16
126 32 54 78 99
24 45 64 110 116
12
20mils
LAN_X1 LAN_X2
R415 1K_0402_5%
1 2
R410 15K_0402_5%
1 2 1 2
1 2
+LAN_AVDDH
12
R425
CTRL25 CTRL12
1
C510
0.1U_0402_16V4Z
2
+LAN_AVDDL25
20mils
1
C540
0.1U_0402_16V4Z
2
2
C494
0.1U_0402_16V4Z8110S@
1
V_12P
1
C446
R422
0.1U_0402_16V4Z
2
R426
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
4 3 2 1
1 2
R445 0_0402_5% R449 0_0402_5%@
LAN_MIDI0+ 27 LAN_MIDI0- 27 LAN_MIDI1+ 27 LAN_MIDI1- 27
LAN_MIDI2+ 27 LAN_MIDI2- 27 LAN_MIDI3+ 27 LAN_MIDI3- 27
R439 R424
20mils
0_0402_5%8110S@
1 2
R418
0_0402_5%8110S@
1 2
0_0402_5%8100C@
1 2
0_0402_5%8110S@
U9
DO
GND
DI
NC
SK
NC
CS
VCC
AT93C46-10SI-2.7_SO8
12
+3VS
5.6K_0603_1%8100C@
2.49K_0603_1%8110S@
1
C445
2
1
2
1
2
1
2
2
0.1U_0402_16V4Z8110S@
1
1
2
0.1U_0402_16V4Z8110S@
Y2
1 2
25MHZ_20P
C66 27P_0402_50V8J
C469
0.1U_0402_16V4Z
+2.5V_LAN
C541
0.1U_0402_16V4Z
C439
+2.5V_LAN
+LAN_AVDDH
2005/07/29 2006/07/29
3
+3VALW
5 6 7 8
R441
1 2
C479
0.1U_0402_16V4Z8110S@
LAN_X2LAN_X1
1
2
1
C441
0.1U_0402_16V4Z
2
1
2
2
C58
1
0.1U_0402_16V4Z8110S@
1
C133 0.1U_0402_16V4Z
2
LAN_ACTIVITY# 27
LAN_LINK# 27
0_0805_5%8110S@
1
C62
27P_0402_50V8J
2
C539
0.1U_0402_16V4Z
1
2
C461
0.1U_0402_16V4Z
0.1U_0402_16V4Z8110S@
+3VALW
RSET 5.6K for 8100CL
2.49K for 8110S(B)
+3VALW
1
C538
0.1U_0402_16V4Z
2
C444
0.1U_0402_16V4Z
1
C430
0.1U_0402_16V4Z
2
2
C87
1
1
2
+LAN_DVDD
40mils
2
1
C511
0.1U_0402_16V4Z8110S@
Deciphered Date
C120 1U_0603_10V4Z
CTRL25
+3VALW
1
C86
0.1U_0402_16V4Z
2
C442
0.1U_0402_16V4Z
R73
1 2
R93
1 2
+1.2V_LAN
8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)
PIN RSET 5.6K 2.49K
8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)BOM structure
8100C@
Stuff No_Stuff
8110S@ StuffNo_Stuff
@
+3VALW
12
31
E
2
B
C
4.7U_0805_10V4Z
1
C440
0.1U_0402_16V4Z
2
0_0805_5%8110S@ 0_0805_5%8100C@
2
No_Stuff No_Stuff
+2.5V_LAN
Q10 2SB1197K_SOT23
40mils
1
C129
2
+LAN_AVDDL
40mils
R44
R37
Title
Size Document Number Rev
B
Date: Sheet
1 2
1 2
+1.2V_LAN
+2.5V_LAN
星期日
8110S@
2SB1197K_SOT23
CTRL12
+3VALW
31
E
Q8
2
B
C
4.7U_0805_10V4Z8110S@
0_0805_5%8100C@ 0_0805_5%8110S@
C103
+1.2V_LAN
1
2
0.1U_0402_16V4Z8110S@
+3VALW
+2.5V_LAN
1
2
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
01, 2006
一月
1
40mils
C105
26 50,
B
of
Page 27
5
4
3
2
1
LAN RTL8110SBL/RTL8100CL
D D
unpop when use RTL8100CL(10/100)
1
C401
0.1U_0402_16V4Z8110S@
2
12
12
R378
C C
B B
R377
49.9_0402_1%8110S@
LAN_MIDI3-26 LAN_MIDI3+26
LAN_MIDI2-26 LAN_MIDI2+26
LAN_MIDI1-26 LAN_MIDI1+26
LAN_MIDI0-26 LAN_MIDI0+26
49.9_0402_1%
49.9_0402_1%8110S@
12
12
R382
R383
49.9_0402_1%
C409
1
0.1U_0402_16V4Z
2
49.9_0402_1%
1
C402
2
12
R379
49.9_0402_1%8110S@
12
R385
C408
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z8110S@
12
R380
49.9_0402_1%8110S@
LAN_MDI3­LAN_MDI3+
LAN_MDI2­LAN_MDI2+
LAN_MDI1­LAN_MDI1+
LAN_MDI0­LAN_MDI0+
12
R384
49.9_0402_1%
1
C414
2
0.01U_0402_16V7K8110S@
24HST1041A-3(SP050002110) for RTL8110SBL(GbE)
+2.5V_LAN
24ST0023-3(SP050005000) for RTL8100CL(10/100)
24ST0023-3: Half port(TD[3:4], MX[3:4])
12
R372
0_0603_5%8110S@
1 2
R376 0_0402_5%8110S@
0.01U_0402_16V7K8110S@
1
1
C416
C415
2
2
0.01U_0402_16V7K
RJ45_MDI3+ RJ45_MDI3-
RJ45_MDI2+ RJ45_MDI2-
1
C413
0.01U_0402_16V7K
2
8110S@
R353 0_0402_5%8100C@ R354 0_0402_5%8100C@
R351 0_0402_5%8100C@ R352 0_0402_5%8100C@
reseved for RTL8100CL(10/100)
T1
1
TCT1
2
TD1+
3
TD1-
4
TCT2
5
TD2+ TD2-6MX2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12
TD4-
24HST1041A-3
8110S@
1 2 1 2
1 2 1 2
MCT1
MX1+
MX1-
MCT2
MX2+
MCT3
MX3+
MX3-
MCT4
MX4+
MX4-
24 23 22
21 20 19
18 17 16
15 14 13
R356
75_0402_1%
12
R358
75_0402_1%
12
R357 75_0402_1%
12
12
RJ45_MDI3­RJ45_MDI3+
RJ45_MDI2­RJ45_MDI2+
RJ45_MDI1­RJ45_MDI1+
RJ45_MDI0­RJ45_MDI0+
R359 75_0402_1%
RJ45_GND
R7 300_0603_5%
+3VALW
LAN_ACTIVITY#26
LAN_LINK#26
+3VALW
LAN_ACTIVITY#
LAN_LINK#
R6 300_0603_5%
RJ45_GND LANGND
12
RJ45_MDI3­RJ45_MDI3+ RJ45_MDI1­RJ45_MDI2­RJ45_MDI2+ RJ45_MDI1+ RJ45_MDI0­RJ45_MDI0+
12
C1 1000P_1206_2KV7K
JP21
12
Amber LED+
11
Amber LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
TYCO_1566735-1
1 2
SHLD4 SHLD3
SHLD2 SHLD1
1
C9
2
0.1U_0402_16V4Z
16 15
14 13
1
C10
4.7U_0805_10V4Z
2
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
B
27 50,
1
Page 28
A
B
C
D
E
1
C147
2
0.1U_0402_16V4Z
+3V_MINI
1
C163
2
21
101 103 105 107 109 111 113 115 117 119 121 123
C159
PCI_AD[0..31]
+3VS
1
4.7U_0805_10V4Z
2
JP36
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100 101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
TYCO_1566674-3
PCI_AD[0..31] 17,22,25,26,29
RINGTIP
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24 MINI_IDSEL1
PCI_AD22 PCI_AD20
PCI_AD18 PCI_AD16
PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_AD15
PCI_AD13 PCI_AD11
PCI_AD9 PCI_CBE#0
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
W=40mils
W=40mils W=40mils
PCI_GNT#1
1 2
+3VALW
+5VS
+3V_MINI
PCI_RST# 17,22,24,25,26,29 +3VS PCI_GNT#1 17
MINI_PME# 22,25,26,32
WLAN_BT_CLK 34
PCI_AD18
R177
100_0402_5%
PCI_PAR 17,2 2,25,26,29
PCI_FRAME# 17, 2 2,25,26,29 PCI_T R D Y # 17,22,25,26,29 PCI_STOP# 17,22,25,26,29
PCI_DEVSEL# 17, 22 ,25,26,29PCI_PERR#17,22,25,26,29
PCI_CBE#0 17, 2 2,25,26,29
+3V_MINI
1 2
R176 0_0805_5%
PCI_PIRQG# 17
W=40mils
1000P_0402_50V7K
1
C156
0.1U_0402_16V4Z
2
+5VS
0.1U_0402_16V4Z
1
C179
1 1
2 2
3 3
2
1000P_0402_50V7K
1
C162
2
CLK_PCI_MINI1
12
R195 10_0402_5%@
1
C172 10P_0402_50V8J@
2
1
C165
10U_0805_10V4Z
2
C160
1000P_0402_50V7K
PCI_PIRQH#17,29
1
2
CLK_PCI_MINI113
WLAN_BT_DATA34
WL_OFF#32
PCI_REQ#117
PCI_CBE#317,22,25,26,29
PCI_CBE#217,22,25,26,29 PCI_IRDY#17,22,25,26,29
PM_CLKRUN#19,25,26,29,30
PCI_SERR#17,22,25,26,29
PCI_CBE#117,22,25,26,29
1000P_0402_50V7K
1
C609
2
0.1U_0402_16V4Z
W=40mils
+3VS
+5VS
+5VS
C175
WL_OFF#
RB751V_SOD323
CLK_PCI_MINI1 PCI_REQ#1 PCI_AD31
PCI_AD29 PCI_AD27
PCI_AD25
PCI_AD23 PCI_AD21
PCI_AD19 PCI_AD17
PCI_CBE#2 PCI_IRDY#
PCI_SERR# PCI_PERR#
PCI_CBE#1 PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3
W=40mils
PCI_AD1
W=30mils W=20mils
1
2
0.1U_0402_16V4Z
1
C610
2
D9
(Change to SP070003200)
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
(change to H=4.0mm)
2005/07/29 2006/07/29
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
E
B
28 50,
of
Page 29
10
9
8
7
6
5
4
3
2
1
C189
10U_0805_10V4Z
+5VS
1000P_0402_50V7K
1
2
1
C245
2
C196
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1
C198
2
H H
C190
1000P_0402_50V7K
0.1U_0402_16V4Z
1
2
1
C191
2
C187
+3VS
4.7U_0805_10V4Z
1
2
1000P_0402_50V7K
G G
+3VS+3VS
TIP
JP40
112
KEY KEY
W=40mils
F F
PCI_PIRQA#17,22
PCI_REQ#417
E E
CLK_PCI_MINI2
12
R220
10_0402_5%@
1
C234
10P_0402_50V8J@
D D
2
PCI_CBE#317,22,25,26,28
PCI_CBE#217,22,25,26,28 PCI_IRDY#17,22,25,26,28
PM_CLKRUN#19,25,26,28,30
PCI_SERR#17,22,25,26,28
PCI_PERR#17,22,25,26,28
PCI_CBE#117,22,25,26,28
C C
S_YIN S_CIN CLK_PCI_MINI2 PCI_REQ#4 PCI_AD31
PCI_AD29 PCI_AD27
PCI_AD25
PCI_AD23 PCI_AD21
PCI_AD19 PCI_AD17
PCI_CBE#2 PCI_IRDY#
PCI_SERR# PCI_PERR#
PCI_CBE#1 PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 CVBS_IN PCI_AD3
W=40mils
+5VS
PCI_AD1
AUDIO_INL
B B
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
102
103
103
104
105
105
106
107
107
108
109
109
110
111
111
112
113
113
114
115
115
116
117
117
118
119
119
120
121
121
122
123
123
124
P-TWO_A53921-A0G16-P
TV-TUNER@
RING
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
(EDL71 pin define)
PCI_AD[0..31]
W=40mils
W=40mils
W=40mils
PCI_GNT#4
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24 MINI_IDSEL2 PCI_AD19
PCI_AD22 PCI_AD20
PCI_AD18 PCI_AD16
PCI_FRAME# PCI_TRDY# PCI_STOP#
PCI_DEVSEL# PCI_AD15
PCI_AD13 PCI_AD11
PCI_AD9 PCI_CBE#0
PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0
AUDIO_INR
W=20mils
1 2
R216 0_0603_5%@
1 2
PCI_FRAME# 17, 2 2,25,26,28 PCI_T R D Y # 17,22,25,26,28 PCI_STOP# 17,22,25,26,28
PCI_DEVSEL# 17, 22 ,25,26,28
PCI_CBE#0 17, 2 2,25,26,28
TV_THERM# 32
(No CIS)
+3V_MINI
0.1U_0402_16V4Z
1
2
PCI_PAR 17,2 2,25,26,28
+3V_MINI
1
C197
PCI_AD[0..31] 17,22,25,26,28
C195
2
+5VS
PCI_PIRQH# 17,28
+3V_MINI
PCI_RST# 17,22,24,25,26,28CLK_PCI_MINI213 PCI_GNT#4 17
R218
100_0402_5%
S_YIN AUDIO_INR CVBS_IN AUDIO_INL
S_CIN
For EMI
connected directly without Via
ANTENNA
TV_THERM#: Normal High(+3VS), Active Low
TV-Tuner
L32 FCM1608C-121T_0603
1 2
L33 FCM1608C-121T_0603
1 2
L34 FCM1608C-121T_0603
1 2
L35 FCM1608C-121T_0603
1 2
L36 FCM1608C-121T_0603
1 2
RF In
3
3
1
1
JP22 ACES_20262-0001
TV-TUNER@
2
2
(EAQ11)
ANTENNA
RFGND
AV In
JP20
3 6 7 5 2 4 1 8 9
SUYIN_030107FR007SX08FU
TV-TUNER@
Acer TV-Tuner Design Guide Rev1.1
1. N/A
2. N/A
3. S-Video - Y
4. S-Video - C
5. Audio - Left
6. Audio - Right
7. CVBS
JP14
5 4 3
6 2 1
SUYIN_010164FR006G118ZL
TV-TUNER@
12
R345 0_1206_5%
(For TV-Tuner change to H=9.2mm)
A A
10
9
8
7
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
6
Deciphered Date
5
Title
Size Document Number Rev
B
4
Date: Sheet
3
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
2
B
of
29 50,
1
Page 30
SUPER I/O SMsC LPC47N217
+3VS
1 2
R363 10K_0402_5%
1 2
R370 10K_0402_5%
R328 1K_0402_5% R322 10K_0402_5%
1 2 1 2
R321 10K_0402_5%
1 2
R326 10K_0402_5%
CLK_PCI_SIO
CLK_14M_SIO
+3VS
1 2 2
1
R369 10_0402_5%@
C398
15P_0402_50V8J@
+3VS
+3VS
Place on the BOT side(near MINIPCI conn.)
+5VS
RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1
JP26
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
E&T_96212-1011S@
For SW debug use when no seial port
RP37
1 8 2 7 3 6 4 5
4.7K_1206_8P4R_5%
LPC_AD018,32 LPC_AD118,32 LPC_AD218,32 LPC_AD318,32
LPC_FRAME#18,32
LPC_DRQ#118
PLT_RST#6,17,19,21,32
PM_CLKRUN#19,25,26,28,29
CLK_PCI_SIO13
SERIRQ19,22,32
CLK_14M_SIO13
12
R355 33_0402_5%@
1 2 2
C393 22P_0402_50V8J@
1
DCD#1 RI#1 CTS#1 DSR#1
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME# LPC_DRQ#1
SIO_PD# PM_CLKRUN#
CLK_PCI_SIO SIO_PME# CLK_14M_SIO
SIO_GPIO11 SIO_SMI# SIO_IRQ
SIO_GPIO23
+3VS
4.7U_0805_10V4Z
U33
10
LAD0
12
LAD1
13
LAD2
14
LAD3
15
LFRAME#
16
LDRQ#
17
PCI_RESET#
18
LPCPD#
19
CLKRUN#
20
PCI_CLK
21
SER_IRQ
6
IO_PME#
9
CLK14
23
GPIO40
24
GPIO41
25
GPIO42
27
GPIO43
28
GPIO44
29
GPIO45
30
GPIO46
31
GPIO47
32
GPIO10
33
GPIO11/SYSOPT
34
GPIO12/IO_SMI#
35
GPIO13/IRQIN1
36
GPIO14/IRQIN2
40
GPIO23
8
VSS
22
VSS
43
VSS
52
VSS
LPC47N217_STQFP64
Base I/O Address
0 = 02Eh
*
1 = 04Eh
FIR Module
1 2
R546 47_1206_5%
10U_0805_10V4Z
CLOCK
+IR_3VS
1
2
C387
LPC I/F
GPIO
POWER
C276
+3VS
1
2
SERIAL I/F
FIR
IRMODE/IRRX3
SLCTIN#
PARALLEL I/F
ERROR#
STROBE#
W=40mil
1
C271
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
62
RXD1
63
TXD1
64
DSR1#
1
RTS1#
2
CTS1#
3
DTR1#
4
RI1#
5
DCD1#
37
IRRX2
38
IRTX2
39 41
INIT#
42 44
PD0
46
PD1
47
PD2
48
PD3
49
PD4
50
PD5
51
PD6
53
PD7
55
SLCT
56
PE
57
BUSY
58
ACK#
59 60
ALF#
61
7
VTR
11
VCC
26
VCC
45
VCC
54
VCC
1
2
+3VS
4.7U_0805_10V4Z
+IR_3VS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C391
0.1U_0402_16V4Z
RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1
IRRX IRTXOUT IRMODE
LPTINIT# LPTSLCTIN# LPD0 LPD1 LPD2 LPD3 LPD4 LPD5 LPD6 LPD7 LPTSLCT LPTPE LPTBUSY LPTACK# LPTERR# LPTAFD# LPTSTB#
1
C665
2
1
2
2 4 6 8
1
C389
+3VS
C376
0.1U_0402_16V4Z
2
1 2
R362 1K_0402_5%
1 2
R327 10K_0402_5%
1 2
R547 0_1206_5%
1 2
R549 0_1206_5%
+IR_ANODE
W=60mil
IR1
IRED_C RXD VCC GND
TFDU6102-TR3_8P
2005/07/29 2006/07/29
IRED_A
TXD
SD/MODE
MODE
1 3
T = 12mil T = 12mil
5 7
Deciphered Date
IRTXOUT IRMODEIRRX
LPTSTB#
LPTAFD#
LPTINIT#
LPTSLCTIN#
RP36
LPD3 FD3 LPD2 LPD1 LPD0
LPD7 LPD6 LPD5 LPD4
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
+5V_PRN
FD2 FD1
FD0
33_1206_8P4R_5% RP2
FD7
FD6
FD5
FD4
33_1206_8P4R_5%
RP1
1 8 2 7 3 6 4 5
2.7K_1206_8P4R_5% RP34
1 8 2 7 3 6 4 5
2.7K_1206_8P4R_5% RP35
1 8 2 7 3 6 4 5
2.7K_1206_8P4R_5% RP3
1 8 2 7 3 6 4 5
2.7K_1206_8P4R_5%
Title
Size Document Number Rev
B
Date: Sheet
Parallel Port
D15
2 1
+5VS
RB420D_SOT23
2.2K_0402_5%
W=20mil
1 2
R324 33_0402_5%
1 2
R323 33_0402_5%
1 2
R4 33_0402_5%
1 2
R5 33_0402_5%
FD0 FD1
FD2 FD3
FD7 FD6 FD5 FD4
SLCTIN# LPT_INIT# LPTERR# AFD/3M#
LPTACK# LPTBUSY LPTPE LPTSLCT
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
+5V_PRN_R
AFD/3M# FD0 LPTERR# FD1
LPT_INIT#
FD2 SLCTIN# FD3
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE
LPTSLCT
AFD/3M# LPTERR# LPT_INIT# SLCTIN#
LPTACK# LPTBUSY LPTPE LPTSLCT
Compal Electronics, Inc.
+5V_PRN
W=20mil
1
12
R325
FD0 FD1 FD2 FD3
FD4 FD5 FD6 FD7
2
JP15
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
SUYIN_070536FR025S204AR
CP4
2
3
4 5
220P_1206_8P4C_50V8K
CP2
2
3
4 5
220P_1206_8P4C_50V8K
CP3
2
3
4 5
220P_1206_8P4C_50V8K
CP1
2
3
4 5
220P_1206_8P4C_50V8K
30 50,
C381
0.1U_0402_16V4Z
81 7 6
81 7 6
81 7 6
81 7 6
of
B
Page 31
5
+5VALW +5VALW
1
C407
D D
SYSON#40
4.7U_0805_10V4Z
2
SYSON# SYSON#
U35
1
GND
2
IN
3
IN
4
EN#
G528_SO8
OUT OUT OUT FLG
USB CONN. 1 & 2
+USB_VCCA
8 7 6 5
4
1 2 1 2
C419
0.1U_0402_16V4Z
+3VALW
12
1
2
R402
100K_0402_5%@
1
C421
0.1U_0402_16V4Z
2
USB_OC#3 19 USB_OC#4 19
+3VALW +3VALW
12
R392 100K_0402_5%
R391 10K_0402_5% R401 10K_0402_5%
3
1
C433
4.7U_0805_10V4Z
2
U37
1 2 3 4
G528_SO8
GND IN IN EN#
2
+USB_VCCB
8
OUT
7
OUT
6
OUT
5
FLG
USB CONN. 3 & 5
12
R406 100K_0402_5%
R403 10K_0402_5%
1 2
R398 10K_0402_5%
1 2
0.1U_0402_16V4Z
C422
1
2
1
1
C420
0.1U_0402_16V4Z
2
USB_OC#0 19 USB_OC#2 19
(Place on the right side)(Place on the left-back side)
+USB_VCCA
+USB_VCCA
1
+
1
2
1
2
2
D6
GND
I/O
PRTR5V0U2X_SOT143@
D1
GND
I/O
PRTR5V0U2X_SOT143@
C380
0.1U_0402_16V4Z
USB20_N419 USB20_P419
VCC
USB20_N319 USB20_P319
VCC
C388
150U_D2_6.3VM
C C
B B
A A
W=80mils
1
2
4
USB20_P4USB20_N4
3
I/O
+USB_VCCA
1
C374
1000P_0402_50V7K
2
4
USB20_P3USB20_N3
3
I/O
1
C379
1000P_0402_50V7K
2
USB20_N4 USB20_P4
+USB_VCCA
W=80mils
1
C373
1000P_0402_50V7K
2
USB20_N3 USB20_P3
+USB_VCCA
+5VALW
1
C625
4.7U_0805_10V4Z
2
JP24
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
SUYIN_020173MR004G533ZR
(Place on the back side)
JP18
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
SUYIN_020173MR004G533ZR
U43
1
GND
2
IN
3
IN
4
EN#
G528_SO8
SYSON#
OUT OUT OUT
FLG
8 7 6 5
+USB_VCCC
USB CONN. 5
(Place on the left-front side)
+3VALW
12
R530 100K_0402_5%
R529 10K_0402_5%
1 2
1
C628
0.1U_0402_16V4Z
2
150U_D2_6.3VM
USB_OC#6 19
+USB_VCCB
1
+
C18
2
+USB_VCCC
1
+
C652
150U_D2_6.3VM
2
+USB_VCCB
1
C404
0.1U_0402_16V4Z
2
USB20_N019 USB20_P019
+USB_VCCC
1
C648
2
0.1U_0402_16V4Z
USB20_N619 USB20_P619
D30
1
VCC
GND
2
I/O
PRTR5V0U2X_SOT143@
W=80mils
1
2
USB20_N0 USB20_P0
D22
1
GND
2
I/O
PRTR5V0U2X_SOT143@
W=60mils
1
1000P_0402_50V7K
2
4
USB20_N6USB20_P6
3
I/O
C405 1000P_0402_50V7K
SUYIN_020173MR004G533ZR
4
VCC
3
I/O
C649
USB20_N6 USB20_P6
SUYIN_020173MR004G533ZR
+USB_VCCC
JP25
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
+USB_VCCB +USB_VCCB
USB20_N0USB20_P0 USB20_N2USB20_P2
JP39
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
+USB_VCCB
1
+
C89
150U_D2_6.3VM
2
+USB_VCCB
1
C536
2
0.1U_0402_16V4Z
USB20_N219 USB20_P219
1
C537
0.1U_0402_16V4Z
2
USB20_N2 USB20_P2
D26
1
VCC
GND
2
I/O
I/O
PRTR5V0U2X_SOT143@
JP30
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
SUYIN_020173MR004G533ZR
4
3
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
1
B
31 50,
of
Page 32
5
KBA[0..18]
ADB[0..7]
L14
1 2
FBM-L11-160808-800LMT_0603
D D
C C
+5VS
+3VALW
+3VALW
B B
+3VS
+5VALW
+5VS
A A
+3VALW
MINI_PME#22,25,26,28
LAN_PME#22 ,25,26,28 1394_PME#22,25,26,28 PCM_PME#22,25,26,28
RCIRRX34
RP16
1 8 2 7 3 6 4 5
4.7K_1206_8P4R_5%
RP25
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
RP15
1 8 2 7 3 6 4 5
100K_1206_8P4R_5%
1 2
R270 10K_0402_5%
RP17
1 8 2 7 3 6 4 5
4.7K_1206_8P4R_5%
22P_0402_50V8J@
10K_0402_5%
KB_CLK KB_DATA PS_CLK PS_DATA
FRD# SELIO# FSEL#
IE_BTN# EMPWR_BTN# E-MAIL_BTN# USER_BTN#
5IN1_LED#
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
12
R2084.7K_0402_5%
12
R2124.7K_0402_5%
12
R2171K_0402_5%
12
R2211K_0402_5%
12
R2241K_0402_5%
5
KBA[0..18] 33 ADB[0..7] 33
ECAGND
20mil
C188
12
CLK_PCI_LPC13
+3VALW
1 2
R169
D8
21
RB751V_SOD323
TP_CLK
TP_DATA
KBA1 KBA4 KBA5
R205 33_0402_5%@
R227 10K_0402_5%
EC_PME#
+3VALW
1 2
EC_RCIRRX
+3VALW
R190 120K_0402_5%@ R214 100K_0402_5% R215 1K_0402_5%
0.1U_0402_16V4Z
12
C184 0.1U_0402_16V4Z
12
12
R202 47K_0402_5%
1 2 1 2 1 2
4
C604
0.1U_0402_16V4Z
LPC_AD018,30 LPC_AD118,30 LPC_AD218,30 LPC_AD318,30
FRD#33
FWR#33
FSEL#33
TP_CLK34
EC_SCI#19
ENBKL8,15
BKOFF#15
FSTCHG43
LID_SW#35
BT_ON#34
SYSON24,40,46
SUSP#15,24,33,40 VR_ON48
0.1U_0402_16V4Z
1
C230
2
12
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
E-MAIL_BTN#
FSTCHG
1
C171
2
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
FRD# FWR# FSEL# SELIO# ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18
KB_CLK KB_DATA PS_CLK PS_DATA TP_CLK TP_DATA
EMPWR_BTN# EC_SCI#
IE_BTN# ENBKL BKOFF#
EC_SMI# IDE_LED# USER_BTN#
LID_SW# BT_ON# SYSON SUSP# VR_ON
PBTN_OUT#
CAPS_LED# NUM_LED# SATA_LED#
2
C254
1000P_0402_50V7K
1
U15
15
LAD0
14
LAD1
13
LAD2
10
LAD3
9
LFRAME#
165
LRST#/GPIO2C
18
LCLK
7
SERIRQ
25
CLKRUN#/GPIO0C
24
LPCPD#/GPIO0B
150
RD#
151
WR#
173
MEMCS#
152
IOCS#
138
D0
139
D1
140
D2
141
D3
144
D4
145
D5
146
D6
147
D7
124
A0
125
A1/XIOP_TP
126
A2
127
A3
128
A4/DMRP_TP
131
A5/EMWB_TP
132
A6
133
A7
143
A8
142
A9
135
A10
134
A11
130
A12
129
A13
121
A14
120
A15
113
A16
112
A17
104
A18
103
A19
108
A20/GPIO23
105
E51CS#/GPIO20/ISPEN
110
PSCLK1
111
PSDAT1
114
PSCLK2
115
PSDAT2
116
PSCLK3
117
PSDAT3
163
SCL1
164
SDA1
169
SCL2
170
SDA2
8
GPIO04
20
GPIO07
21
GPIO08
22
GPIO09
27
GPIO0D
28
GPIO0E
48
GPIO10
62
GPIO13
63
GPIO14
69
GPIO15
70
GPIO16
75
GPIO17
109
GPIO24
118
GPIO25
119
GPIO26
148
GPIO27
149
GPIO28
155
GPIO29
156
GPIO2A
162
GPIO2B
168
GPIO2D
55
FnLock#/GPIO12
54
CapLock#/GPIO011
23
NumLock#/GPIO0A
41
ScrollLock#/GPIO0F
19
ECRST#
5
GA20/GPIO02
6
KBRST#/GPIO03
31
ECSCI#
Security Classification
FBM-L11-160808-800LMT_0603
2
C246 1000P_0402_50V7K
1
LPC Interface
PS2 Interface
0.1U_0402_16V4Z
1
1
C193
2
2
LPC_FRAME#18,30
PLT_RST#6,17,19,21,30 SERIRQ19,22,30
ARCADE_GRN#34
+3VALW
R191 100K_0402_5%
TP_DATA34
EC_SMB_CK115,33,44 EC_SMB_DA115,33,44 EC_SMB_CK24 EC_SMB_DA24
EMPWR_BTN#34
E-MAIL_BTN#34
IE_BTN#34
EC_SMI#19
IDE_LED#21
USER_BTN#34 EC_SWI#19
ARCADE#34
MUTE_WOOFER#38
5IN1_LED#22 PBTN_OUT#19 EC_THERM# 19
ARCADE_AMB#34
CAPS_LED#34 NUM_LED#34 EAPD 36
SATA_LED#18
EC_GA2018
EC_KBRST#18
ENBKL DPLL_TP TEST_TP
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS , INC . AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
+3VALW
*
*
SMBus
GPIO
*
*
*
*
MISC
3
L13
1 2
VCC16VCC34VCC45VCC
+EC_VCCA
20mil
123
X-BUS Interface
3
1
2
ECAGND
95
96
136
157
166
161
VCC
VCC
VCC
VCCA
AGND
VCCBAT
Pulse Width
Wake Up Pin
ENE-KB910-B4
Analog To Digital
Digital To Analog
Expanded I/O
FAN
TEST_TP/GPIO05/FAN3PWM
Timer Pin
GND17GND35GND46GND
GND
GND
122
137
167
2005/07/29 2006/07/29
20mil
C168
0.1U_0402_16V4Z
159
GPOK0/KSO0 GPOK1/KSO1
BATGND
GPOK2/KSO2 GPOK3/KSO3 GPOK4/KSO4 GPOK5/KSO5 GPOK6/KSO6 GPOK7/KSO7 GPOK8/KSO8
GPOK9/KSO9 GPOK10/KSO10 GPOK11/KSO11 GPOK12/KSO12 GPOK13/KSO13 GPOK14/KSO14 GPOK15/KSO15 GPOK16/KSO16 GPOK17/KSO17
GPIK0/KSI0 GPIK1/KSI1 GPIK2/KSI2 GPIK3/KSI3 GPIK4/KSI4
Internal Keyboard
GPIK5/KSI5 GPIK6/KSI6 GPIK7/KSI7
GPOW0/PWM0 GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3 GPOW4/PWM4 GPOW5/PWM5 GPOW6/PWM6
FAN1PWM/GPOW7/PWM7
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
E51RXD/GPIO21/ISPCLK E51TXD/GPIO22/ISPDAT
GPWU0 GPWU1 GPWU2 GPWU3 GPWU4 GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7
GPIAD0/AD0 GPIAD1/AD1 GPIAD2/AD2 GPIAD3/AD3 GPIAD4/AD4 GPIAD5/AD5 GPIAD6/AD6 GPIAD7/AD7
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
GPIO18/XIO8CS#
*
GPIO19/XIO9CS#
*
GPIO1A/XIOACS#
*
*
GPIO1B/XIOBCS# GPIO1C/XIOCCS#
*
GPIO1D/XIODCS#
*
GPIO1E/XIOECS#
*
GPIO1F/XIOFCS#
*
TOUT2/GPIO2F E51IT0/GPIO00
E51IT1/GPIO01
XCLKO
KB910Q B4_LQFP176
Compal Secret Data
Deciphered Date
C247
0.1U_0402_16V4Z
49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68 153 154
71 72 73 74 77 78 79 80
32 33 36 37 38 39 40 43
2 26 29 30 44 76 172 176
81 82 83 84 87 88 89 90
99 100 101 102 1 42 47 174
85 86 91 92 93 94 97 98
171 12 11
175 3
4 106 107
158
XCLKI
160
PWR_LED PWR_SUSP_LED# BATT_GRN_LED# BATT_AMB_LED# WL_LED# BT_LED# E-MAIL_LED# MEDIA_LED#
+3VALW
1
1
2
2
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
INVT_PWM BEEP#
ACOFF EC_ON
EC_LID_OUT# EC_MUTE
ON/OFF
PM_SLP_S3# PM_SLP_S5# EC_RCIRRX EC_PME# 5WAY_BTN
BATT_TEMP SKU_ID BATT_OVP
6C/8C# TV_THERM# AD_BID0
DAC_BRIG IREF
EN_DFAN1
FAN_SPEED1 DPLL_TP TEST_TP
EC_THERM#
E51_RXD E51_TXD
CRY2 CRY1
2
KSI[0..7]
C257 1U_0603_10V4Z
1 2
R196 0_0402_5%
2
KSO[0..15]
Analog Board ID definition, Please see page 3.
KSO16 34 KSO17 34
INVT_PWM 15 BEEP# 36
ACOFF 41,43 EC_ON 35
EC_LID_OUT# 19 EC_MUTE 37,38
ON/OFF 35
PM_SLP_S3# 19 PM_SLP_S5# 19
5WAY_BTN 34
BATT_OVP 43 6C/8C# 44
TV_THERM# 29
DAC_BRIG 15
IREF 43
EN_DFAN1 39
WL_OFF# 28
EN_DFAN3 39
PWR_LED 34 PWR_SUSP_LED# 34 BATT_GRN_LED# 34 BATT_AMB_LED# 34 WL_LED# 34 BT_LED# 34 E-MAIL_LED# 34 MEDIA_LED# 34
FAN_SPEED1 39
FAN_SPEED3 39
EC_RSMRST# 19
1
For EC Tools
+3VALW
JP32
KSI[0.. 7 ] 33,34 KSO[0..15] 33
+3VALW +3VALW
R171 100K_0402_5%
Ra
1 2
AD_BID0
1
R170
C157
33K_0402_5%
Rb
2
0.1U_0402_16V4Z
1 2
ACIN 19,43
5WAY_BTN
ECAGND
12
C140 0.01U_0402_16V7K
TV_THERM#
C249
10P_0402_50V8J
32.768KHZ_12.5P_1TJS125DJ2A073
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期
, 01, 2006
日一月
1
1
E51_RXD
2
2
E51_TXD
3
3
4
4
ACES_85205-0400@
SKU ID definition, Please see page 3.
R167
Rc
Rd
R187
BATT_TEMP 44
R575
1
2
100K_0402_5%GM@
1 2
SKU_ID
1
R168 0_0402_5%
2
PM@
0.1U_0402_16V4Z
1 2
100K_0402_5%
100K_0402_5%
R231 20M_0603_5%@
4
1
IN
OUT
NC3NC
2
+3VS
CRY2CRY1
10P_0402_50V8J
of
32 50
R168 change to 8.2K (GM@)
1 2
X3
1
C136
R232 0_0402_5%
1 2
1
C262
2
B
Page 33
FWE#
EC_SMB_CK115,32,44 EC_SMB_DA115,32,44
C155
1 2
0.1U_0402_16V4Z
4
TC7SH32FU_SSOP5
KBA[0..18]32 ADB[0..7]32
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1 KBA0 ADB0 ADB1 ADB2
+5VALW
+3VALW
U12
O
+3VALW
12
R179 100K_0402_5%
5
2
P
I0
1
I1
G
3
512KB Flash ROM
KBA[0..18] ADB[0..7]
VCC WP SCL SDA
GND
C200 0.1U_0402_16V4Z
32
VDD
31
WE#
30
A17
29
A14
28
A13
27
A8
26
A9
25
A11
24
OE#
23
A10
22
CE#
21
DQ7
20
DQ6
19
DQ5
18
DQ4
17
DQ3
1
A0
2
A1
3
A2
4
U44
1
A18
2
A16
3
A15
4
A12
5
A7
6
A6
7
A5
8
A4
9
A3
10
A2
11
A1
12
A0
13
DQ0
14
DQ1
15
DQ2
16
VSS
SST39VF040-70-4C-NH_PLCC32
C223 0.1U_0402_16V4Z
1 2
U19
8 7 6 5
AT24C16N10SC-2.7_SO8
2
G
1 3
D
Q14 2N7002_SOT23
+3VALW
12
+5VALW
12
R213 100K_0402_5%
12
R210 100K_0402_5%
S
FWE# KBA17 KBA14 KBA13 KBA8 KBA9 KBA11 FRD# KBA10 FSEL# ADB7 ADB6 ADB5 ADB4 ADB3
SUSP# 15,24,32,40
EC_FLASH# 19
FWR# 32
FRD# 32 FSEL# 32
(Right)
KSO15 KSO14 KSO13 KSO12
KSI0 KSO11 KSO10 KSI1
KSI2 KSO9 KSI3 KSO8
INT_KBD Conn.
(Left)
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSI0 KSI1 KSO14 KSI2 KSI3 KSI4 KSO15 KSI5 KSI6 KSI7
C211 100P_0402_50V8J C214 100P_0402_50V8J C222 100P_0402_50V8J C220 100P_0402_50V8J
C229 100P_0402_50V8J C215 100P_0402_50V8J C218 100P_0402_50V8J C227 100P_0402_50V8J
C207 100P_0402_50V8J C228 100P_0402_50V8J C206 100P_0402_50V8J C210 100P_0402_50V8J
JP9
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
ACES_85202-2405
ECQ60 for 17"
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
KSI[0..7] KSO[0..15]
KSO7 KSO6 KSO5 KSO4
KSO3 KSI4 KSO2 KSO1
KSO0 KSI5 KSI6 KSI7
KSI[0. . 7 ] 32,34 KSO[0..15] 32
1 2
C208 100P_0402_50V8J
1 2
C209 100P_0402_50V8J
1 2
C216 100P_0402_50V8J
1 2
C224 100P_0402_50V8J
1 2
C225 100P_0402_50V8J
1 2
C212 100P_0402_50V8J
1 2
C219 100P_0402_50V8J
1 2
C221 100P_0402_50V8J
1 2
C226 100P_0402_50V8J
1 2
C213 100P_0402_50V8J
1 2
C205 100P_0402_50V8J
1 2
C204 100P_0402_50V8J
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
Deciphered Date
Title
Size Document Number Rev
B
Date: Sheet
星期日
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
01, 2006
一月
of
33 50,
B
Page 34
MDC Conn.
JP44
1
GND1
3
IAC_SDATA_OUT
5
GND2
7
IAC_SYNC
9
IAC_SDATA_IN
11
IAC_RESET#
JP12
1 2 3 4 5 6
ACES_85201-0605
IAC_BITCLK
131314141515161617171818191920
C15
0.1U_0402_16V4Z
ICH_SYNC_MDC18
ICH_AC_SDIN118
ICH_SDOUT_MDC18
R539 33_0402_5%
ICH_RST_MDC#18
ICH_SYNC_MDC
1 2
ICH_SDOUT_MDC
ICH_RST_MDC#
To Media/B Conn.
+5VALW +5VS
BATT_AMB_LED#32 BATT_GRN_LED#32
PWR_SUSP_LED#32
BT_LED#32 WL_LED#32
KSO1732 KSI332,33 KSI432,33 5WAY_BTN32
RCIRRX32
KSI032,33 KSI132,33 KSI232,33 KSI532,33
KSO1632
ARCADE_GRN#32 ARCADE_AMB#32
BATT_AMB_LED# BATT_GRN_LED# PWR_LED# PWR_SUSP_LED# BT_LED# WL_LED# KSO17 KSI3 KSI4
RCIRRX KSI0 KSI1 KSI2 KSI5 KSO16 ARCADE_BTN#
JP13
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
ACES_85201-2405
To TP/B Conn.
+5VS
TP_DATA32 TP_CLK32
TP_DATA TP_CLK
2
C711
100P_0402_50V8J
1
For EMI
2
C712
1
100P_0402_50V8J
+5VS
C676
0.1U_0402_16V4Z
2
RES0
4
RES1
3.3V GND3 GND4
20
+3V_MDC
6 8 10 12
ACES_88012-1200
ICH_BITCLK_MDC
Connector for MDC Rev1.5
CAPS_LED#32
NUM_LED#32 MEDIA_LED#32 E-MAIL_LED#32 ON/OFFBTN#35
+5VS
1 2
R252
0_0603_5%
ICH_BITCLK_MDC 18
To LED/B Conn.
+5VS
PWR_LED#
JP1
112 334 556 778 9910 111112 131314 151516
ACES_88018-1610
+3VALW
2 4 6 8 10 12 14 16
20mil
EMPWR_BTN# 32 IE_BTN# 32 E-MAIL_BTN# 32 USER_BTN# 32 +5VALW
+3V_MDC
1
2
C280 1U_0603_10V4Z
ARCADE_BTN#
PWR_LED32
D14
1
DAN202U_SC70
1 2
R251 100K_0402_5%
2
51ON#
3
13
D
2
G
S
PWR_LED#
Q38 2N7002_SOT23
+3VALW
ARCADE# 32 51ON# 35,41
+5VALW
C322
0.1U_0402_16V4Z
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5
KSO16 KSO17
VOL_UP RIGHT PLAY STOP
NEXT
LEFT VOL_DOWN ENTER BT_EN# WL_EN#
REV
+3VALW
C392 1U_0603_10V4Z
S
G
BT_ON#32
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
2
Q22 SI2301BDS_SOT23
D
1 3
1
C397
4.7U_0805_10V4Z
2
Deciphered Date
W=40mils
C403
0.1U_0402_16V4Z
Bluetooth Conn.
1
2
+BT_VCC
+BT_VCC
JP2
1
1
2
2
USB20_P519 USB20_N519
WLAN_BT_DATA28
WLAN_BT_CLK28
Title
Size Document Number Rev
B
Date: Sheet
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
3
3
4
4
5
5
6
6
7
7
8
8
ACES_87213-0800
Compal Electronics, Inc.
34 50,
B
of
Page 35
A
B
C
D
E
RTC Battery
ON/OFF switch
1 1
ON/OFFBTN#34
TOP Side
12
J3 JOPEN
12
J2 JOPEN
Button Side
ON/OFFBTN#
D23
1
DAN202U_SC70
+3VALW
R381 100K_0402_5%
1 2
2 3
51ON#
ON/OFF 32
51ON# 34,41
For 17"
(Left)
Lid Switch
SW1
3
4
MPU-101-81_4P
BATT1
-+
+3VALW
45@
12
R23 100K_0402_5%
1
2
2
3
D7
1
PSOT24C_SOT23@
LID_SW# 32
RTCBATT
+RTCVCC
1
2
+RTCBATT
+RTCBATT
12
3
C655
0.1U_0402_16V4Z
1
D31 BAS40-04_SOT23
2
CHGRTC
EC_ON
Q27
+3VALW
D
S
R393
4.7K_0402_5%
1 2
1 2
R386 33K_0402_5%
13
2
G
2
Q25
DTC124EK_SC59
2
C410
13
1000P_0402_50V7K
1
2 2
EC_ON32
2N7002_SOT23@
12
D24 RLZ20A_LL34
For Remove Control Issue
3 3
+3VS
+3VALW+3VALW
U16B SN74LVC14APWLE_TSSOP14
14
P
3
O
I
G
+3VALW POWER
7
4
R206 100K_0402_5%
R209
180K_0402_5%
C203
1U_0805_25V4Z
12
2
1
U16A SN74LVC14APWLE_TSSOP14
14
P
1
O2I
G
+3VALW POWER
7
Power ON Circuit
+3VS
12
R199
10K_0402_5%
SYS_PWROK 19
For South Bridge For +VCCP/+1.05VS
2
C185
0.1U_0402_16V4Z
1
+3VALW +3VALW
14
U16C
P
5
SN74LVC14APWLE_TSSOP14
6
O
I
G
7
SN74LVC14APWLE_TSSOP14
14
U16D
P
9
8
O
I
G
7
VS_ON 45
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
E
B
35 50,
of
Page 36
A
BEEP#32
1 1
PCM_SPK#22
SN74LVC14APWLE_TSSOP14
SB_SPKR19
2 2
3 3
4 4
11
U16E
13
1U_0603_10V4Z
+3VALW
1 2
14
P
O
I
G
7
+3VALW
14
P
O
I
G
U16F SN74LVC14APWLE_TSSOP14
7
INT_CD_L21
INT_CD_R21 CD_AGND21
R516 0_0603_5%
R407 0_0603_5%
R525 0_0603_5%
C201
10
1U_0603_10V4Z
1U_0603_10V4Z
12
1 2
1 2
1 2
GND GNDA
B
R207
1 2
560_0402_5%
R201
1 2
560_0402_5%
R203
1 2
560_0402_5%
10K_0402_5%
12 12 12 12
12
R469
6.8K_0402_5%
12
C194
1 2
0.1U_0402_16V4Z
C182
1 2
C192
1 2
R464 20K_0402_5% R463 6.8K_0402_5% R467 6.8K_0402_5% R468 20K_0402_5%
R470 20K_0402_5%
12
R478 0_0402_5%
+VDDA
C
2
B
E
12
R198
2 1
L22
+VDDA
FBM-L11-160808-800LMT_0603
LINE_L37 LINE_R37
MIC1_L37 MIC1_R37
C
12
R192 10K_0402_5%
1 2
C178 1U_0603_10V4Z
12
1
3
1 2
R197 10K_0402_5%
C186
1 2
1U_0603_10V4Z
Q15 2SC2411K_SC59
D12
RB751V_SOD323
CD_L_R CD_R_R CD_R_RC CD_AGND_R
1 2
C426
10U_1206_16V4Z
LINE_L LINE_R
MIC1_L
R417
0_0402_5%@
1 2
R200
2.4K_0402_5%
1
2
C531 1U_0603_10V4Z C532 1U_0603_10V4Z C526 1U_0603_10V4Z C529 1U_0603_10V4Z C527 1U_0603_10V4Z C80 1U_0603_10V4Z C78 1U_0603_10V4Z
ICH_RST_AUDIO#18 ICH_SYNC_AUDIO18
ICH_SDOUT_AUDIO18
MONO_IN
0.1U_0402_16V4Z
1
C504
2
0.1U_0402_16V4Z
1 2 1 2 1 2 1 2 1 2 1 2 1 2
EAPD32 SPDIF37
LINE_C_L LINE_C_R CD_L_RC
CD_AGND_RC MIC1_C_L MIC1_C_RMIC1_R
MONO_IN
D
+5VS
L15
KC FBM-L11-201209-221LMAT_0805
L16
KC FBM-L11-201209-221LMAT_0805
E
1 2
1 2
HD Audio Codec
+AVDD_AC97
40mil
1
C443
2
DGND AGND
38
U39
AVDD125AVDD2
14
LINE2_L
15
LINE2_R
16
MIC2_L
17
MIC2_R
23
LINE1_L
24
LINE1_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1_L
22
MIC1_R
13
SENSE A
12
PC_BEEP
11
RESET#
10
SYNC
5
SDATA_OUT
45
NC
46
NC
47
SPDIFI/EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
ALC260D_LQFP48
Change to PB-Free P/N
20mil
DVDD11DVDD2
LINE_OUT_L
LINE_OUT_R
MONO_O
HP_OUT_L
HP_OUT_R
BIT_CLK
SDATA_IN
GPIO2
GPIO3
LINE1_VREFO
MIC2_VREFO
MIC1_VREFO_L
VREF
MIC1_VREFO_R
LINE2_VREFO
DCVOL
SENSE B
GPIO0 GPIO1
LFILT AVSS1 AVSS2
0.1U_0402_16V4Z
1
C470
2
9
AMP_LEFT
35
AMP_RIGHT
36
AMP_MONO
37 39 41
6
R444 33_0402_5%
8
R440 0_0402_5%@
2
NBA_PLUG
3 29 30 28
10mil
27 32
10mil
31 33 34 43 44
40 26 42
+5VAMP
1
C656
10U_1206_16V4Z
2
1
2
0.1U_0402_16V4Z
1 2
C487 27P_0402_50V8J
1 2 1 2
1
C498
2
MIC1_VREFO_L
AC97_VREF
MIC1_VREFO_R
12
R419 20K_0402_1%
F
1
C266
2
0.1U_0402_16V4Z
C452 10U_1206_16V4Z
C491
1000P_0402_50V7K
@
60mil
+3VS
1
2
AMP_MONO 38
ICH_BITCLK_AUDIO 18
ICH_AC_SDIN0 18
CLK_14M_CODEC 13
NBA_PLUG 37,38
10mil
1
C497 10U_0805_10V4Z
2
G
28.7K for Module Design (VDDA = 4.702)
U22
4
VIN
2
SENSE or ADJ
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
1
C454 1000P_0402_50V7K
@
2
VOUT
GND
5 6 1 3
0.1U_0402_16V4Z
AMP_LEFT 37,38 AMP_RIGHT 37,38
Normal Low : M O N O _ O U T Enable
Active High: MONO_OUT Disable
C265
(output = 250 mA)
40mil
R242 30K_0402_1%
1
2
1 2 12
R244 10K_0402_1%
H
+VDDA
4.85V
1
C661 10U_1206_16V4Z
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2005/07/29 2006/07/29
Deciphered Date
E
Title
Size Document Number Rev
B
F
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
G
B
36 50,
of
H
Page 37
A
+5VAMP
12
R120 10K_0402_5%
1 1
AMP_LEFT36,38
AMP_RIGHT36,38
2 2
3 3
HPF Fc = 338Hz
NBA_PLUG
VOL_AMP
12
(0.76V -> 10dB )
R110
1.5K_0402_1%
1 2
C603 0.47U_0603_16V4Z
1 2
C88 0.47U_0603_16V4Z
R106 1K_0402_5%@
+5VAMP
12
R156
10K_0402_5%
13
D
SPDIF_PLUG#
2
G
Q9 2N7002_SOT23
S
NBA_PLUG36,38
SPKL+ SPKR+ AMP_LEFT_CR
AMP_RIGHT_CR
12
12
R160
1K_0402_5%@
1 2
C137 1U_0603_10V4Z
1 2
C94 1U_0603_10V4Z
1 2
C138 1U_0603_10V4Z
1 2
C95 1U_0603_10V4Z
+5VSPDIF
0.1U_0402_16V4Z
NBA_PLUG
VOL_AMP SPKR-
1
C594
2
0.1U_0402_16V4Z
SPKL+
1 2
C132 150U_D2_6.3VM
SPKR+
1 2
C104 150U_D2_6.3VM
+5VAMP
S
D
1 3
20mil
Int MIC Conn.
JP5
4 3 2 1
ACES_85204-0400
4 4
15mil 15mil
3
2
1
B
+5VAMP
C593
AMP_LEFT_C AMP_RIGHT_C
HP_L HP_R
1
C97
0.01U_0402_16V7K
2
+
HPOUT_L_1
+
G
SPDIF_PLUG#
2
Q28 SI2301BDS_SOT23
INT_MIC_R
INT_MIC_L
D32 PSOT24C_SOT23
W=40mil
1
1
C563
4.7U_0805_10V4Z
2
2
U7
7
PVDD
18
PVDD
19
VDD
2
HP/LINE#
3
VOLUME
4
LOUT+
21
ROUT+
5
LLINEIN
23
RLINEIN
6
LHPIN
20
RHPIN
17
CLK
APA2121PI-TR_TSSOP24
1 2
R457 47_0603_5%
1 2
R474 47_0603_5%
LINE_R36 LINE_L36
MIC1_R36 MIC1_L36
SHUTDOWN#
SE/BTL#
PC-BEEP
BYPASS
LOUT-
ROUT-
LBYPASS
RBYPASS
GND GND GND GND
C
+5VAMP
12
R507 100K_0402_5%
SHUTDOWN#
22 15 14 11 9 16 10 8
1 12 13 24
HPOUT_L_2 HPOUT_R_2HPOUT_R_1
LINE_R LINE_L
R108 100K_0402_5%
NBA_PLUG
BYPASS
2
20mil
C588
1U_0603_10V4Z
1 2
L11 FBM-11-160808-700T_0603
1 2
L10 FBM-11-160808-700T_0603
1 2 1 2
1
FBM-11-160808-700T_0603 FBM-11-160808-700T_0603
220P_0402_50V7K
+5VAMP
C99 0.1U_0402_16V4Z
1U_0603_10V4Z
C701
10mil
R506
4.7K_0402_5%
MIC1_R
1 2
MIC1_L MIC1_L_1
1 2
220P_0402_50V7K
L31
FBM-11-160808-700T_0603
L28
FBM-11-160808-700T_0603
C597
13
D
S
12
1 2
SPKL-
2
C589
1
C523
330P_0402_50V7K
HPOUT_L_4 HPOUT_R_4
L26 L25
1
220P_0402_50V7K
2
MIC1_VREFO_L
10mil
12
1
220P_0402_50V7K
2
Q29 2N7002_SOT23
2
G
2
C135 1U_0603_10V4Z
1
C557
330P_0402_50V7K
R405 10K_0402_5%
SPDIF36
+5VSPDIF
LINE_R_R LINE_L_R
1
C702
2
MIC1_VREFO_R
12
R520
4.7K_0402_5%
MIC1_R_1
1
C620
2
EC_MUTE 32,38
+5VAMP
SPDIF_PLUG#
12
SPDIF
BYPASS 38
D
SPKL+
R238 FBM-11-160808-700T_0603
SPKL­SPKR+ SPKR-
20mil
1 2
R237 FBM-11-160808-700T_0603
1 2
R236 FBM-11-160808-700T_0603
1 2
R235 FBM-11-160808-700T_0603
1 2
Speaker Conn.
S/PDIF / Headphone Out JACK
JP6
1 2 6 3
5 4
7 8
10
9
ACES_20234-0101
LINE-IN JACK
JP7
5 4 3
6 2 1
SUYIN_010164FR006G118ZL
MIC-IN JACK
JP8
5 4 3
6 2 1
SUYIN_010164FR006G118ZL
SPK_L+ SPK_L­SPK_R+ SPK_R-
E
JP43
1 2 3 4
ACES_85204-0400
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
E
B
37 50,
of
Page 38
A
BYPASS37
1 2
C169
1 1
AMP_LEFT36,37
AMP_RIGHT36,37
AMP_MONO36
1 2
C483 1U_0603_10V4Z@
1 2
C466 1U_0603_10V4Z@
1 2
C704 1U_0603_10V4Z
R184
12
100K_0402_5%@
R188
12
100K_0402_5%@
R574
12
100K_0402_5%
1 2
B
BYPASS
0.1U_0402_16V4Z C173
1U_0603_10V4Z
Gain = 3.1dB
R181
43K_0402_5%
3 2
+5VAMP
+
-
12
8
P
G
4
C613 1U_0603_10V4Z
1 2
U11A TLV2462CDR_SO8
O
R523
1
1K_0402_5%
C
C623 0.68U_0603_10V6K
1 2
12
R524 1K_0402_5%
0.47U_0603_16V4Z
12
C624
2
1
BYPASS
Fc(LPF)= 220Hz
5 6
10mil
+5VAMP
8
P
+
-
G
4
7
O
U11B TLV2462CDR_SO8
D
C614
MIX_OUT
12
0.22U_0603_10V7K
10mil
E
2 2
Fc(HPF)= 36.2Hz
Gain = 15.9dB
R175
12
MUTE_WOOFER#32
EC_MUTE32,37
3 3
4 4
1 2
R173 10K_0402_5%
2
G
13
D
S
MUTEWOOFER#
NBA_PLUG36,37
Q12 2N7002_SOT23
C615
0.47U_0603_16V4Z@
20K_0402_5%
2
G
1
2
13
D
Q30 2N7002_SOT23
S
0.1U_0402_16V4Z
R518 10K_0402_5%@
WOOFER_INMIX_OUT
C149
WOOFER_IN
12
MUTEWOOFER#
C619
0.22U_0603_10V7K@
+5VAMP
2
1
1
2
U10
1
IN
2
SD#
3
VDD BYPASS4VO+
TPA0211DGN_MSOP8
2
C148
1
0.47U_0603_16V4Z
U42
3
IN+
4
IN-
1
SHUTDOWN
2
BYPASS
VO-
GND
SE/BTL#
+5VAMP
6
7
VDD
VO+
VO-
GND
C627
Sub Woofer Conn.
30mil
5
8
12
R185 100K_0402_5%
12
WOOFER+
WOOFER-
WOOFER-
WOOFER+
8 7 6 5
0.1U_0402_16V4Z@
TPA6211A1DGNR_PMSOP8@
L38 FBM-11-160808-700T_0603
1 2
L39 FBM-11-160808-700T_0603
1 2
JP42
1 2
ACES_85204-0200
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
C
Deciphered Date
Title
Size Document Number Rev
B
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
E
B
38 50,
of
Page 39
Add 2ND FAN Circuit for TV-Tuner
H2
H_S354D126
1
H5
H_S354D126
1
H10
H_C315D161
1
H17
H_C276D161
1
EN_DFAN132
R540
10K_0402_5% @
+VCC_FAN1 EN_DFAN1
H21
H_S354D126
1
H31
H_S354D126
1
H12
H_C315D161
1
H29
H_C276D161
1
EN_DFAN1
12
+5VS
H26
H_S354D126
H16
H_S354D126
H18
H_C315D173
1 2 3 4
1
1
1
H_S354BC276D126
+VSB
8
3
+IN
2
-IN
4
1 2
R541 8.2K_0402_5% @
U20
VEN VIN VO VSET
G993P1U_SOP8L
H33
H_S354D126
1
H4
H_S354D126
1
H19
H_C315D173
1
H13
1
1 2
C654
0.1U_0402_16V4Z @
P
EN_FAN1
1
OUT
G
U45A
LM358ADR_SO8 @
+3VS
8
GND
7
GND
6
GND
5
GND
Change to PB-Free P/N
H27
H_S354D126
1
H32
H_S354D126
1
FAN Conn
1 2
R526
100_0402_5% @
R204 10K_0402_5%
1 2
FAN_SPEED132
H3
1
H9
1
H23
1
H24
H_O189X165D189X165N
1
H_S354D173
H_S354D126
H_S354D126
H_S354D126
H_C315B165D165
H_C165D165N
2
C626
0.1U_0402_16V4Z @
1
H6
H_S354D126
1
H35
H_S354D126
1
H22
H_C315B165D165
1
H11
1
+5VS
1
C
2
B
E
3
12
D29
1N4148_SOT23
H28
1
H30
1
H15
H_C315B165D165
H34
H_O266X70D236X40
Q35 FMMT619_SOT23 @
+VCC_FAN1
H8
H_S354D126
1
H7
H_S354D126
1
1
1
12
40mil
C183
1000P_0402_50V7K
H20
H_S354D126
1
H25
H_S354D126
1
H14
H_C315B165D165
1
D10 1SS355_SOD323
2
1
1000P_0402_50V7K
1
@
2
2
1
C181
1
2
FD1
1
CF4
1
CF6
1
M1
H_O157X16D157X16N
1
C635 10U_1206_16V4Z
JP37
3 2 1
ACES_85205-0300
C634 10U_1206_16V4Z
FD2
1
CF1
1
CF7
1
H_O157X16D157X16N
FD3
CF14
CF11
+5VS
+VCC_FAN3
1 2
FAN_SPEED332
CF9
1
EN_DFAN3
1N4148_SOT23
@
@
CF8
1
D34
CF10
1
EN_DFAN332
R576 10K_0402_5%
+3VS
FD5
FD4
1
1
CF12
1
1
CF2
1
1
M2
1
FD6
1
1
CF5
CF13
1
1
+5VS
CF3
U50
1
VEN
2
VIN
3
VO
4
VSET
G993P1U_SOP8L
@
12
D33 1SS355_SOD323
@
+VCC_FAN3
12
1
GND GND GND GND
40mil
C714 1000P_0402_50V7K
@
8 7 6 5
2
1
1000P_0402_50V7K
@
U45B
5 6
LM358ADR_SO8 @
+VSB
+IN
-IN
+5VS
1
C713 10U_1206_16V4Z
2
@
JP53
3 2 1
ACES_85205-0300
@
1
2
C715
1
OUT
C716 10U_1206_16V4Z
2
@
7
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
Deciphered Date
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
of
39 50,
B
Page 40
A
1 1
1
C365 10U_0805_10V4Z
2
+VSB
2 2
R570 100K_0402_5%
+5VALW TO +5VS +1.5VALW TO +1.5VS
C359
10U_0805_10V4Z
SUSP
Q40
2N7002_SOT23
+5VALW
1
2
12
2
G
U28
8
D
7
D
6
D
5
D
SI4800BDY_SO8
AOS 4422
5VS_GATE
13
D
S
1
S
2
S
3
S
4
G
+5VS
1
C354
2
10U_0805_10V4Z
1
C696
0.1U_0402_16V4Z
2
C360 1U_0603_10V4Z
B
1
2
R571 470_0603_5%
1 2 13
D
SUSP
2
G
Q39
S
2N7002_SOT23
+VSB
1
C310 10U_0805_10V4Z
2
180K_0402_5%
SUSP
2N7002_SOT23
C317
10U_0805_10V4Z
+1.5VALW
1
2
12
R551
2
Q37
C
U24
8
D
7
D
6
D
5
D
SI4800BDY_SO8
AOS 4422
1.5VS_GATE
13
D
G
S
D
SYSON#31
+1.5VS
1
S
2
S
3
S
4
G
1
10U_0805_10V4Z
2
1
C674
0.1U_0402_16V4Z
2
C311
1U_0603_10V4Z
1
C318
2
1 2 13
D
S
R248 470_0603_5%
@
2
G
Q17
2N7002_SOT23@
SUSP
SYSON24,32,46
SUSP47
SUSP#15,24,32,33
SYSON
R521
100K_0402_5%
SUSP
R522 100K_0402_5%
12
SYSON#
12
2
G
+5VALW
+5VALW
2
G
E
R528 100K_0402_5%
1 2
13
D
Q33 2N7002_SOT23
S
R527 100K_0402_5%
1 2
13
D
Q32 2N7002_SOT23
S
+3VALW TO +3VS
+3VALW
U23
8 7
3 3
4 4
1
C294
2
10U_0805_10V4Z
C295
10U_0805_10V4Z
A
6 5
1
AOS 4422 AOS 4422
2
1
S
D
2
S
D
3
S
D
4
G
D
SI4800BDY_SO8
5VS_GATE
+3VS
1
C283
1U_0603_10V4Z
2
10U_0805_10V4Z
C282
1
2
1 2 13
D
S
R245 470_0603_5%
2
G
Q16 2N7002_SOT23
SUSP
+VSB
C636 10U_0805_10V4ZPM@
1
2
R531 180K_0402_5%PM@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+1.8V to +1.8VS
+1.8V
1
C631
2
10U_0805_10V4ZPM@
12
SUSP
2
G
Q34
2N7002_SOT23PM@
+1.8VS
U41
8 7 6 5
13
D
S
C
1
S
D
2
S
D
3
S
D
4
G
D
SI4800BDY_SO8PM@
1.8VS_GATE
C630
0.1U_0402_16V4ZPM@
2005/07/29 2006/07/29
1
C612
2
10U_0805_10V4ZPM@
1
2
1
C621
2
1U_0603_10V4ZPM@
Deciphered Date
1 2 13
D
S
R519 470_0603_5%
@
2
G
Q31
2N7002_SOT23@
SUSP
Title
Size Document Number Rev
B
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781 401353
星期日
01, 2006
一月
E
B
40 50,
Page 41
A
B
C
D
PJP1
1
1 1
2 2
2
G G
3
SINGA_2DC-G756I200
BATT+
51ON#34,35
RB751V_SOD323
CHGRTCP
100K_0402_5%
PR11
22K_0402_5%
1 2
RTCVREF
3.3V
3 3
CHGRTC
PR16
1 2
560_0603_5%
PAD-OPEN 3x3m
(2.5A,100mils ,Via NO.=5) (6A,240mils ,Via NO.= 12)
+5VALWP
1 2
(5A,200mils ,Via NO.= 10)
4 4
+3VALWP
(4.5A,180mils ,Via NO.= 9)
+1.05VSP
PR17
1 2
560_0603_5%
PJ1
PJ3
PAD-OPEN 3x3m
PJ5
1 2
PAD-OPEN 3x3m
PJ7
1 2
PAD-OPEN 3x3m
21
+1.5VALW+1.5VALWP
+5VALW
+3VALW
ADPIN VIN
12
PC1
560P_0402_50V7K
PD4
12
12
3
4.7U_0805_6.3V6K
+1.8VP
+0.9VSP
12
PC5
0.22U_1206_25V7K
PU1
G920AT24U_SOT89
OUT
GND
1
PR10
PC8
12
(0.3A,40mils ,Via NO.= 2)
+2.5VSP +2.5VS
(0.3A,40mils ,Via NO.= 2)
+1.05VS
+VSBP +VSB
(2A,80mils ,Via NO.= 4)
A
PL1
FBM-L18-453215-900LMA90T_1812
1 2
12
PC2
12P_0402_50V8J
PR9
33_1206_5%
PQ4
TP0610K_SOT23
13
2
12
PR15 200_0805_5%
2
IN
PJ2
1 2
PAD-OPEN 3x3m
PJ4
1 2
PAD-OPEN 3x3m
PJ6
1 2
PAD-OPEN 3x3m
PJ8
1 2
PAD-OPEN 3x3m
12
PC7 1U_0805_25V4Z
12
PC4
VIN
+1.8V
+0.9VS
12
PC3
12P_0402_50V8J
PD3 1N4148_SOD80
1 2 12
12
PC6
0.1U_0603_25V7K
12
PR1 10_1206_5%
12
560P_0402_50V7K
VS
PD1
RLZ24B_LL34
MAINPWON18,42,44
ACIN
Precharge detector
Min. typ. Max. H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V
BATT ONLY
Precharge detector
Min. typ. Max. H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
PR2
1K_1206_5%
1 2
PR3
VIN
PD2
12
1N4148_SOD80
VL
12
PR14
100K_0402_1%
PD5
2
1
ACON43
3
RB715F_SOT323
12
RTCVREF
2005/07/29 2006/07/29
1K_1206_5%
1 2
1K_1206_5%
1 2
1K_1206_5%
1 2
ACOFF32,43
LM393M_SO8
PC10
0.1U_0603_25V7K
Deciphered Date
PR4
PR7
1
O
C
PQ2
PR12
2.2M_0402_5%
VS
8
P
+
-
G
4
PR20
34K_0402_1%
DTC115EUA_SC70
PU2A
12
12
PR5
PR6
470K_0402_5%
470K_0402_5%
13
2
DTC115EUA_SC70
12
3 2
12
PC11
1000P_0402_50V7K
12
12
PR22
66.5K_0402_1%
@
PQ3
2
12
PR18 191K_0402_1%
PRG++
RHU002N06_SOT323
PQ5
13
D
2
G
S
PQ1
TP0610K_SOT23
13
2
12
PR8 470K_0402_5%
13
B+
12
PR13 499K_0402_1%
12
12
PR19
499K_0402_1%
PR21 47K_0402_5%
13
2
Title
Size Document Number Rev
B
Date: Sheet
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
PC9
0.01U_0402_25V7Z
12
PQ6 DTC115EUA_SC70
PACIN 43
+5VALWP
Compal Electronics, Inc.
D
41 50,
of
B
Page 42
A
B+
PL2
1 2
1 1
FBM-L11-322513-151LMAT_1210
2 2
3 3
B+++
12
PC14
2200P_0402_50V7K
+5VALWP
PC15
PC23
12
1
+
2
150U_D_6.3VM
PQ7
8
G2 D1/S2/K D1/S2/K D1/S2/K
AO4912_SO8
S1/A
D2 D2
G1
7 6
4.7U_1206_25V6K
PL3
5
5HG
1 2
10UH_D104C-919AS-100M_4.5A_20%
PR34
@
1 2
10.2K_0402_1%
PR36
0_0402_5%
1 2
VS
PZD1
1 2
RLZ5.1B_LL34
1 2 3 4
1 2
47K_0402_5%
PC12
0.1U_0603_25V7K
1 2
PR27
0_0603_5%
1 2
PR37
PR40
1 2
100K_0402_5%
DL5
DH5
LX5
12
<BOM Structu re>
+3.3V Ipeak = 6.66A ~ 10A
PC24
0.047U_0603_16V7K
B
PR23 0_0603_5%
1 2
PR43
1 2
47K_0402_5%
BST5A
1 2
1 2
0_0402_5%
12
PC28
0.047U_0603_16V7K
PC21
PR35 0_0402_5%
2VREF_1999
PR38
12
3
1
PR25
4.7_1206_5%
VL
PC19
12
4.7U_0805_10V4Z
14
BST5
16
DH5
15
LX5
19
DL5
21
OUT5
9
FB5
1
N.C.
MAX8734AEEI+_QSOP28
6
SHDN#
4
ON5
3
ON3
12
SKIP#
8
REF
PC26
0.22U_0603_10V7K
2
PD6 CHP202U_SC70
B+++
12
12
1U_1206_25V7K
18
20
V+
LD05
PU3
GND
23
PC27
12
PR26
1 2
4.7_1206_5%
@
PC22
12
0.1U_0603_50V4Z
13
17
TON
PGOOD
LDO3
10
25
12
4.7U_0805_10V4Z
1 2
VL
PR24
ILIM3
VCC
ILIM5 BST3
DH3 DL3
LX3
OUT3
FB3
PRO#
PR41 0_0402_5%
47_0402_5%
12
PC20
1U_0805_16V7K
5
11 28
26 24 27 22
7 2
BST3BBST5B
12
PC16
0.1U_0603_25V7K
2VREF_1999
PR29
1 2
200K_0402_1%
PR32
1 2
499K_0402_1%
SPOK44
C
PR30
1 2
200K_0402_1%
PR33
1 2
499K_0402_1%
1 2
PC13
0.1U_0603_25V7K
1 2
PR28 0_0603_5%
BST3A
DH3
B+++
12
PC17
0_0603_5%
12
PC18
2200P_0402_50V7K
4.7U_1206_25V6K
PR31
1 2
D
PQ8
AO4912_SO8
D1/S2/K D1/S2/K D1/S2/K
8
G2
7 6 5
PL4
DL3
1
D2
2
D2
3
G1
4
S1/A
3HG
LX3
1 2
10UH_D104C-919AS-100M_4.5A_20%
PR42
0_0402_5%
PR39
1 2
3.57K_0402_1%@
1 2
1
+
PC25 150U_D_6.3VM
2
+5V Ipeak = 6.66A ~ 10A
+3VALWP
MAINPWON 18,41,44
12
PC29 1U_0603_16V6M
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2005/07/29 2006/07/29
Deciphered Date
C
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
D
42 50,
of
B
Page 43
A
B
C
D
E
ACOFF 32,41
PC45
4.7U_1206_25V6K
E
Charger
BATT+
12
43 50, 01, 2006
BATT+
B
of
P2
12
PR45 200K_0402_1%
PC38
0.01U_0402_25V7Z
FSTCHG32
PZD2
RLZ4.3B_LL34
12
VIN
12
12
PQ10 AO4407_SO8
1 2 3 6
4
PR50
12
PR52
20K_0402_1%
PR58
205K_0402_1%
1 2
PR67 10K_0402_5%
12
PR72
10K_0402_5%
10K_0402_1%
1 2
PR53
PC40
MB39A126
8 7
5
PC35
4700P_0402_25V7K
1 2
12
120K_0603_1%
PR56
1K_0402_1%
1 2
12
PC46
0.01U_0402_25V7Z
12
59K_0603_1%
12
0.22U_0603_16V7K
MB39A126
PR61
+3VALWP
12
PR162 47K_0402_5%
2
13
2
PQ34 DTC115EUA_SC70
Vin Detector
L->H 18.49 17.92 17.35 H->L 17.17 16.64 16.11
PR70
10K_0402_5%
1 2
B
PC41 2200P_0402_25V7K
1 2
ACIN 19,32
PQ9
AO4407_SO8
PQ17
2
G
4
PR54
1 2 36
12
PC34
12
150K_0402_5%
13
D
RHU002N06_SOT323
S
0.1U_0603_25V7K
IREF32
8
RHU002N06_SOT323
7 5
PQ12
47K
2
47K
13
PQ15 DTC115EUA_SC70
1 3
VIN
1 1
12
PR46 47K_0402_5%
DTA144EUA_SC70
2
13
D
PQ16
2
2 2
G
S
IREF=1.31*Icharge
ACOFF#
PACIN
ACON
3 3
PD8
1 2
1N4148_SOD80 PR63
22K_0402_5%
1 2
IREF=0.73~3.3V
VIN
12
PR65
0_0402_5%
12
PR68
4 4
118K_0402_0.1%
MB39A127_ACIN PACIN
12
12
10K_0402_0.1%
PC131
1000P_0402_50V7K
A
PR73
PC50
0.01U_0402_25V7Z@
1 2
1 2
10K_0402_1%@
PR71
Iadp=0~4.74A(90W)
PR44
0.015_2512_1%
12
PR51
100K_0402_1%
12
VREF_MB3887
MB39A127_ACIN PACIN
PR59
10K_0603_1%
VREF_MB3887
CS
13
PQ33 DTC115EUA_SC70
B+
FBM-L18-453215-900LMA90T_1812
1 2
PU4
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
ACOK
6
VREF
7
ACIN
8
-INE1
9
+INE1
10
12
OUTC1
11
SEL
12
-INC1
MB39A126PFV-ER_SSOP24
24
+INC2
23
GND
22
CS
21
VCC
20
OUT
19
VH
18
XACOK
17
RT
16
-INE3
15
FB123
14
CTL
13
+INC1
PU5B
LM358A_SO8
7
0
BATT_OVP32
Security Classification
Issued Date
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PL5
0.1U_0603_25V7K
47K_0402_1%
MB39A126
+
-
C
Fosc=14100/Rt=14100/47=300KHz
12
VIN
PC30
4.7U_1206_25V6K
12
PR161 47K_0402_5%
12
PR62 47K_0402_5%
12
PC31
4.7U_1206_25V6K
578
PC48 47P_0402_25V8K
1 2
PC39
1 2
PR57
1 2
PR60
33K_0402_1%
1 2
PC47 10P_0402_50V8J
P2
PR48
0_0603_5%
CS
1 2
12
PC36
0.22U_0603_16V7K
1 2
PC37
0.1U_0603_25V7K
1 2
PC42 1500P_0603_50V7K
1 2
LI-4S :17.8V----BATT-OVP=1.9758V BATT-OVP=0.111*BATT+
5 6
PU5A
LM358A_SO8
1
2005/07/29 2006/07/29
VS
12
PC49
8
3
P
+
0
2
-
G
4
Compal Secret Data
Deciphered Date
0.01U_0402_25V7Z
CHG_B+
12
PC32
0.1U_0603_25V7K
36
241
PQ13 AO4407_SO8
LXCHRG
15U_SPC-1204P-150_4A_20%
1 2
12
PD7
EC31QS04
BATT+
12
PR64 845K_0603_1%
12
PR66
300K_0603_0.1%
12
PR69
143K_0402_1%
D
PC33
2200P_0402_25V7K
PL6
12
12
PC51
0.01U_0402_25V7Z
PQ11 AO4407_SO8
1 2 3 6
PR49
10K_0402_1%
PR55
0.02_2512_1%
1 2
4
1 2
13
8 7
5
PR47
47K_0402_1%
1 2
ACOFF#
PQ14 DTC115EUA_SC70
ACOFF
2
12
PC43
4.7U_1206_25V6K
VIN
12
PC44
4.7U_1206_25V6K
CC=3.046A
(120K/(205K+ 1 2 0 K))*3.3V=1.2184V
1.2184/(20*0.02)=3.046A
CP Point=4.216A
5V*(59K/(20k+59k))=1.265V
1.265V/(20*0.015)=4.216A
Charge voltage 4S CC-CV MODE : 16.8V VCHG is H
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日 一月
Page 44
A
PR74
@
100K_0402_5%
12
1K_0402_5%
12
1 2
PR75
@
1K_0402_5%
12
PR76 1K_0402_5%
@
1 2
PR82
12
TP0610K_SOT23
PC57
0.22U_1206_25V7K
100_0402_5%
1 2
PR87
100_0402_5%
1 2
PQ18
2
BATT++BATT+
PL7
FBM-L18-453215-900LMA90T_1812
1 1
BATT+
1 2
12
PC52
0.01U_0402_25V7Z
1000P_0402_50V7K
PC53
PJP2 battery connector
SMART Battery:
1.GND
2.SMC
3.SMD
4.TS
5.B/I
2 2
3 3
6.ID
7.BATT+
SPOK42
VL
PR90 100K_0402_5%
PR91
1 2
0_0402_5%
1 2
@
0.1U_0402_16V7K
B+
PC59
SUYIN_200275MR007G161ZL
13
D
2
G
12
S
BATT++
12
7 6 5 4 3 2 1
PJP2
PR88
100K_0402_5%
PR89
22K_0402_5%
1 2
PQ19 RHU002N06_SOT323
+3VALWP
6C/8C# 32
PR79
1K_0402_5%
1 2
PR83
6.49K_0402_1%
1 2
PR85
13
B
12
BATT_TEMP
+VSBP
PC58
0.1U_0603_25V7K
BATT_TEMP 32
+3VALWP
EC_SMB_DA 1 15,32,33
EC_SMB_C K 1 15,32,33
C
PC55
1000P_0402_50V7K
PH1 under CPU botten side :
CPU thermal protection at 80 degree C Recovery at 44(45) degree C
PR78
17.8K_0402_1%
12
VL
PR81 154K_0603_1%
TM_REF1
12
PC56
1U_0805_25V4Z
12
PC54
0.1U_0603_50V4Z
12
12
1 2
12
PH1 100K_0603_1%_TH11-4H104FT
5
+
6
-
PR84
150K_0402_1%
PR86 150K_0402_1%
VS
PR80
1 2
442K_0603_1%
8
PU2B
P
O
G
LM393M_SO8
4
12
7
VL
D
VL
PR77 150K_0402_1%
1 2
MAINPWON 18 ,41,42
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2005/07/29 2006/07/29
Deciphered Date
C
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
D
44 50,
of
B
Page 45
5
D D
C C
B B
4
PL8
B+
1 2
FBM-L11-322513-151LMAT_1210
4.99K_0402_1%
12
PC64
3300P_0402_50V7K
+5VS
3
PR93
1 2
12
PC65
4.7U_0805_6.3V6K
PC60
0.1U_0603_25V7K
PC62
0.01U_0402_25V7Z
1 2
PU6
10
OCSET
2
SS
1
FB
3
VCC
4
GND
MAX8578EUB
12
IN
DH
LX DL
BST
PD9
1SS355_SOD323
12
PC61
4.7U_1206_25V6K
PC63
1 2
9 8
VCCP_PHASE
7 5 6
BSTVCCP
12
0.1U_0603_25V7K
PR94
0_0402_5%
VCCP_HG1 VCCP_HG2
VCCP_LG1
12
1 2
4.7_0402_5% PR95
1 2
PC66
680P_0603_50V8J
1U_0805_25V4Z@
PC130
866_0402_1%
2
PR92
1 2
0_0402_5%
8 7 6 5
12
PR170
12
4.7_1206_5%
PR99
VS_ON35
PQ20
G2
D2 D2
D1/S2/K
G1
D1/S2/K D1/S2/K
S1/A
AO4912_SO8
VCCP_LG2
12
PR96
4.99K_0402_1% PR98
750_0402_5%
1 2
1 2
PC68
12
0.033U_0603_25V7K
1 2 3 4
PL9 2UH_SPC-07040-2R0_6A_30%
12
12
PR97
30_0402_5%
PC69
0.1U_0603_25V7K
1 2
1
+1.05VSP
1
+
PC67
2
330U_D2E_2.5VM
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
1
B
45 50,
of
Page 46
5
4
3
2
1
+1.8VP O.C.P. =8.1A ~ 10.36A
+1.5VP Current limit = 8.2A ~10.64A
B++++
D D
PC70
4.7U_1206_25V6K
4.7U_0805_6.3V6K
PQ21
AO4912_SO8
D1/S2/K D1/S2/K D1/S2/K
8
G2
7 6 5
1
D2
2
D2
3
G1
4
S1/A
C C
B B
+1.5VALWP
1
+
PC80
2
330U_D2E_2.5VM
12
12
PR113
10K_0402_1%
12
PR104
6.81K_0402_1%
PL11
1.8U_SCD10040-1R8M_8.5A_20%
1 2
12
PR105
PC82
0_0402_5%
0.01U_0402_25V7Z
12
PR115
0_0402_5%@
+5VALWP
PC71
12
PC73
PD10
DAP202U_SOT323
PC78
0.1U_0402_16V7K
2.05K_0402_1%
1 2
PR110
0_0402_5%
PC87
0.1U_0402_16V7K@
0.1U_0603_25V7K
2
BST_1.5V-2
12
1 2
PR102 0_0603_5%
PR106
1 2
VSE_1.5V
12
1
0.1U_0603_25V7K
3
PC76
0.01U_0402_25V7Z
DH_1.5V
ISE_1.5V DL_1.5V DL_1.8V
12
BST_1.5V-1
12
PR117
71.5K_0402_1%
PC74
12
6
5 4
7 2
3
9
10
8
15 11
51_1206_5%
12
12
PR100
12
SOFT1
BOOT1
UGATE1 PHASE1
ISL6227CA-T_SSOP28
ISEN1 LGATE1
PGND1
VOUT1 VSEN1 EN1 PG1
OCSET1
12
14
1
VIN
GND
PU7
+5VALW
1 2
28
VCC
DDR
13
PR101
2.2_0603_5%
SOFT2
BOOT2
UGATE2 PHASE2
ISEN2
LGATE2
PGND2
VOUT2
VSEN2
EN2
PG2/REF
OCSET2
PC75
12
2.2U_0805_10V6K
BST_1.8V-2
PC77
12
17
0.01U_0402_25V7Z
BST_1.8V-1
1 2
23
0_0603_5%
DH_1.8V
24
LX_1.8VLX_1.5V
25
ISE_1.8V
22 27
26
VOUT_1.8VVOUT_1.5V
20
VSE_1.8V
19 21 16
18
12
PR103
PR107
2.43K_0402_1%
1 2
PR116
71.5K_0402_1%
PC79
0.1U_0402_16V7K
12
1 2
PR111 0_0402_5%
12
PC86
0.1U_0402_16V7K@
PQ22
AO4912_SO8
8
G2
7 6 5
D2 D2
D1/S2/K
G1
D1/S2/K D1/S2/K
S1/A
1.8U_SCD10040-1R8M_8.5A_20%
SYSON 24,32,40
1 2 3 4
PL12
1 2
PR108
0_0402_5%
0_0402_5%@
12
PC72
4.7U_1206_25V6K
PR114
PL10 FBM-L11-322513-151LMAT_1210
1 2
12
12
PC85
0.01U_0402_25V7Z
12
B+
12
PR109
10.2K_0402_1%
12
PR112 10K_0402_1%
+1.8VP
1
+
PC84
2
330U_D2E_2.5VM
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
B
46 50,
1
of
Page 47
+3VALW
5
4
3
2
1
D D
1 2
PC88
4.7U_1206_25V6K
1
2
+2.5VSP
12
PC95
4.7U_1206_25V6K
C C
B B
PR121
1 2
1 2
10_0603_1%
PC97
0.1U_0603_25V7K
3
4
PU9
CM8562IS_PSOP8
VIN
VFB
VTT
VTT
AGND
REFEN
9
PGND
AGND
VCCA
8
7
6
5
12
PR123
RHU002N06_SOT323
PC96
200K_0402_1%
+5VALW
PC91
0.047U_0402_16V7K
13
D
PQ24
S
1 2
1U_0603_16V6K
PR122
64.9K_0402_1%
2
G
RTCVREF
12
SUSP 40
SUSP
0_0402_5%
1 2
0.1U_0402_16V7K@
10U_1206_6.3V7K
PR119
PC94
PC89
12
+1.8VP
12
1K_0402_1%
13
D
2
G
S
PQ23 RHU002N06_SOT323
PR118
PR120
1K_0402_1%
PU8
APL5331KAC-TR_SO8
VIN1VCNTL
2
12
12
12
PC92
0.1U_0402_16V7K
GND
3
VREF
4
VOUT
12
12
PC93
22U_1206_6.3V6M
6 5
NC
7
NC
8
NC
9
TP
+0.9VSP
PC126
@
22U_1206_6.3V6M
+3VALW
12
PC90 1U_0603_6.3V6M
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
1
B
47 50,
of
Page 48
5
+3VS
D D
PR127 0_0402_5% PR128 0_0402_5% PR130 0_0402_5% PR131 0_0402_5% PR133 0_0402_5% PR134 0_0402_5% PR136
0_0402_5%
VR_ON32
C C
FB
100K_0402_1%
PM_STP_CPU#13,19
PQ27
RHU002N06_SOT323
PM_DPRSLPVR19
B B
A A
PR141
0_0402_5%
1 2
PR146
78.7K_0603_1%
1 2
1 2
PR148
2
G
PSI#5
CPU_VID05 CPU_VID15 CPU_VID25 CPU_VID35 CPU_VID45 CPU_VID55
VGATE6,13,19
1 2
13
D
S
PR152
0_0402_5%
1 2
PR142
@
100K_0402_5%
1 2
PR144
200K_0402_1%
PR150
10.7K_0402_1%
PR126 100K_0402_5%@
1 2
12
PC112
1 2
100P_0402_50V8J
5VS1
1 2
1
C
2
B
E
3
12
1 2
12 12 12 12 12 12
PR143 30.1K_0402_1%
PC108 270P_0402_50V7K
PC110 0.22U_0603_16V7K
2
G
20K_0402_1%
PR156 100K_0402_1%
PQ32
HMBT2222A_SOT23
1 2
1 2
13
D
S
PR153
1 2
PQ31
2
G
PQ28
12
RHU002N06_SOT323
1 2 13
D
S
4
12
PR125 10_0402_5%
PC103 1U_0603_16V6K
VCC
10 24 23 22 21 20 19 25
4
VCC
5 6 1
12
2 8 9 7
3 18 11
1 2
PC113
27P_0402_50V8J
PR155 10K_0402_1%
RHU002N06_SOT323
PR124
5VS1
0_1206_5%
2.2U_0603_6.3V6K
PU10
VCC D0 D1 D2 D3 D4 D5 VROK S0 S1 SHDN# TIME CCV TON REF ILIM OFS SUS SKIP GND
MAX1532AETL_TQFN40
PC102
BSTM
PGND
OAIN+
OAIN-
GNDS
12
VDD
DHM
LXM DLM
CMP CMN
CCI
BSTS
DHS
LXS DLS CSP CSN
+5VS
V+
FB
1 2
30 36 26 28 27 29 31 37 38 17 16
FB
15 14
PC109 470P_0402_50V8J
35 33 34 32
CSP
40
CSN
39 13
12
PC104
0.01U_0402_25V7Z
1 2
PR129 0_0402_5%
CMP
CMN OAIN+ OAIN-
1 2
3
CPUB+
578
BSTMA
12
PC105
0.22U_0603_16V7K
LXM
PD12
BSTMA
2
3
CHP202U_SC70
PR151
0_0402_5%
1 2
12
PC116
0.22U_0603_16V7K
PC118 1000P_0402_50V7K @
12 12
PC119 1000P_0402_50V7K@
OAIN+ OAIN+
PQ25
AO4408_SO8
DHM
PQ26
AO4410_SO8
DLM
PR145 909_0402_1%
1 2
5VS1
1
PQ29
AO4408_SO8
DHS
LXS
AO4410_SO8
PR158
909_0402_1%
1 2
578
PQ30
3 6
241
3 6
241
578
3 6
241
578
3 6
241
2
PC98
4.7U_1206_25V6K
12
4.7_1206_5%
PR159
@
12
PC124
680P_0402_50V7K
@
12
PC114
PC115
4.7U_1206_25V6K
12
4.7_1206_5%
PR160
@
12
PC125
680P_0402_50V7K
@
12
12
12
PC99
PC120
0.1U_0603_25V7K
4.7U_1206_25V6K
PL14
0.56UH_ETQP4LR56WFC_21A_20%
12
PR135
PR137
@
909_0402_1%
1 2
100K_0402_1%
PC106
1 2
0.47U_0603_16V7K
1 2
PR147 3K_0603_1%
1 2
PC111
0.022U_0402_16V7K
12
4.7U_1206_25V6K
PR157
CPUB+
12
PC123
PC122
0.1U_0603_25V7K 2200P_0402_25V7K
PL15
0.56UH_ETQP4LR56WFC_21A_20%
12
909_0402_1%
0.47U_0603_16V7K
PL13
FBM-L11-322513-201LMAT_1210
12
PC121
2200P_0402_25V7K
12
1 2
PR149 0_0402_5%
12
PR154
@
100K_0402_1%
1 2
PC117
12
PR138
1 2
PR132
0.001_2512_5%
12
499_0402_1%
12
12
B+
1
+
PC101
220U_25V_M
2
12
PR139 499_0402_1%
1
+CPU_CORE
1 2
1 2
PR140 3K_0603_1%
CPU VCC SENSE
PC107
1000P_0402_50V7K
@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Custom
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期
, 01, 2006
日一月
1
of
48 50
B
Page 49
A
B
C
D
E
Version change list (P.I.R. List) Page 3 of 1
Reason for change Rev. PG # Modify List B.Ver# Pha seFixed IssueItem
For HDQ70, change RTC change current.
1
1 1
2
For HDQ70, change MAX1999 to MAX8734A.
3
For HDQ70, fix Vin detector accuracy. For HDQ70, fix Vin detector accuracy.
4
For HDQ70, fix Vin detector accuracy.
5
For HDQ70, fix Vin detector accuracy.
For HDQ70, fix the battery temp curve.
6
7
For HDQ70, change 1.05VSP OCP point. For HDQ70, change 1.05VSP OCP point. 45
8
2 2
For HDQ70, fix the output voltage. For HDQ70, fix the output voltage within spec. 45
9
For HDQ70, fix the FB voltage. For HDQ70, fix the FB voltage within spec.
10
For HDQ70, add snuber on LX. Add snuber on LX to improve high side noise. 4545Add PR170 SD011470BT9(S RES 1/10W 4.7 +-5% 1206).
Because the charge cuurent needs to meet battery spec. Because MAX1999 has triggered UVP when AC Adapter plug in or plug out.
For HDQ70, fix Vin detector accuracy.
For HDQ70, fix Vin detector accuracy.
Because we need to improve the curve of temp detector of battery more smoothly.
0.1 41 Change PR16 and PR17 from SD028300000 to SD028560000. 0.1 DVT
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
Change PU3 from SA019990000( S IC MAX1999EEI QSOP28 PWM)
42
to SA00000G100(MAX8734AEEI+ QSOP 28P) Change PR65 from SD034150200(S RES 1/16W 15K 0402 1%) to
43
SD034000000( S RES 1/16W 0 0402 1%). Change PR68 from SD034100300( S RES 1/16W 100K 0402 1%)
43
to SD000008A00(S RES 1/16W 118K 0402 0.1%). Change PR73 from SD034100200(S RES 1/16W 10K 0402 1%) to
43
SD0000008B00(S RES 1/16W 10K 0402 0.1%). Change PR83 from SD034255200(S RES 1/16W 25.5K 0402 1%)
44
to SD034649100(S RES 1/16W 6.49K 0402 1%). Change PR93 from SD034412100(S RES 1/16W 4.12K 0402 1%) to SD034499100(S RES 1/16W 4.99K 0402 1%). Change PR96 from SD034715100(S RES 1/16W 7.15K 0402 1%) to SD034499100(S RES 1/16W 4.99K 0402 1%). Change PC68 from SE075682K00(S CER CAP 6800P 25V +-10%
45
X7R 0402) to SE042333K00(S CER CAP .033U 25V K X7R 0603).
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
DVT
DVT
DVT
DVT
DVT
DVT
DVT
DVT
DVT
11
For HDQ70, add snuber on LX. Add snuber on LX to improve high side noise. 0.1 Add PC130 SE024681J00(S CER CAP 680P 50V J NPO 0603).
For HDQ70 1.5VALWP ripple voltage is
12
too large. For HDQ70, 1.8VP ripple voltage is
13
too large.
14
For HDQ70, change 1.8VP OCP point. For HDQ70, change 1.8VP OCP point.
15
3 3
4 4
For HDQ70, change 1.8VP OCP point. For HDQ70, change 1.8VP OCP point.
For HDQ70, fix the 2.5VSP's power
16
sequence.
A
Because we need to improve the ripple of 1.5VALWP. 0.1 46
Because we need to improve the ripple of 1.8VP. Change PC84 from SGA20151330 to SGASGA19331D00.
0.1
0.1
0.1
Because we need to fix the power sequence of 2.5VSP.
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0.1 47
2005/07/29 2006/07/29
C
Change PC80 from SGA20151330 to SGASGA19331D00.
46
Change PR107 from SD034174100(S RES 1/16W 1.74K 0402 1%)
46
to SD034243100(S RES 1/16W 2.43K 0402 1%) Change PR116 from SD034806200(S RES 1/16W 80.6K 0402 1%)
46
to SD034715200(S RES 1/16W 71.5K 0402 1%). Change PC96 from SE075222K00(S CER CAP 2200P 25V +-10% X7R 0402) to SE076473K00(S CER CAP 0.047U 16V K X7R 0402).
Deciphered Date
D
Title
Size Document Number Rev
Custom
Date: Sheet
星期日
401353
0.1
0.1
0.1
0.1
0.1
0.1
DVT
DVT
DVT
DVT
DVT
DVT
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
01, 2006
一月
49 50,
E
B
of
Page 50
5
4
3
2
1
Version change list (P.I.R. List) Page 1 of 1
Reason for change PG# Modify ListItem
1
D D
2
LAN LED on 8110SBL P.26 Unpop R449 on both 8100CL and 8110SBL
3 4 5 6 7 8 9 10 11 12 13 14 15 16
C C
17 18
5 Way BTN problem Add 5WAY_BTN signal and R184 Remove New Card circuit P.24 Remove New Card Circiut New Card Clock Request Change IEEE1394 Connector Change IEEE1394 Connector Type Codec VREF ca p a citor Change C497 value from 0.1uf to 10uf +SD_VCC and +XD_VCC Power Switch Add R572, R573 for SD, XD Power SwitchP.23 Un-used Codec Clock unpoped R89P.13 Un-used ODD Connector Add 10uF capacitor on GMCH Add C703 on +3VS_DAC Changed for Sp e aker and Subwoofer Change Main A mplifier Gain f or m 10dB to 8dB, a n d M o d ify Woofer BPF val u e Change CRT and TV-out Pi Filter Value Change CRT and TV-out Pi Filter Value to Following Chipset Recommand Change DVI S MBUS Pull-up V alue Change R346,R348 from 30K to 6.8KP.16 Change TV-Tuner Pin98,100 definition P.29,32,36 Add TV_THERM# signal, Del C81, C82 PVT(Rev03) Change S/PDIF /Headphone O u t Pin Define Change S/PDIF /Headphone O u t Pin DefineP.37 PVT(Rev03) Add AMP_MONO for sub-woofer Add AMP_MONO signal and C704, R574 PVT(Rev03)
19 20 21 22 23 24 25 26 27
Change Amplifier Gain P.37 R120 change to 10K, C97 change to 0.01uf Del reserved USB port P.31 Del JP23,C390,C385,C386,D5,JP38,C653,C646,C645,D13 Change FAN control circuit Change FAN control circuit to GMT G993 Add EMI Solution on AV-In Connector Add L32, L33, L34, L35, L36 on AV-IN Signals Add ESD Diode on MIC Signals Add D32 on MIC Signals Add NBA_PLUG t o D isable MONO_OUT Connect NBA_PLUG to Disable Codec M O NO_OUT when Hea d p h o ne PluggedP.36 PVT(Rev03) Separate +2.5VS_CRT from +2.5VS Add L37,C706,C707,C708,C709.C710P.9 PVT(Rev03) Change ICH6 C r ystal Load Capacitor Chang C96 , C102 from 18P to 10P
28 29 30
B B
31 32
Change Speaker 0Ohm Resistor to Bead Change R235, R236, R237, R238 to BeadP.37
Add 2ND FAN Circuit For TV-Tuner Add 2N D FA N Circuit For TV-TunerP.39 Change RF-Jack Material P.29
P.32AC_IN Signal Remove R189, D11
P.33,34
P.25 P.36
P.21 P.9 P.37,38 P.14
P.38
P.39 P.29 P.37
P.18 PVT(Rev03) P.38
HW section
Change R531,R551 value from 100K to 180KModify +1.8V S and +1.5VS po wer sequence P.40
Connect PCIE_CLKREQ1# to Clock Gen pin.32P.13
Remove the JP47 and C362,C366,C675,C678,C681
Del JP27, JP31, JP34, JP3Del reserved Audio Jack P.37
Add L38, L39 on Subwoofer Conn.Add L38, L39 on Subwoofer Conn. for EMI
Add C711, C712 on T/P SignalAdd Capacitor for EMI P.34
Date
DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02) DVT(Rev02)
PVT(Rev03) PVT(Rev03) PVT(Rev03) PVT(Rev03) PVT(Rev03) PVT(Rev03)
PRE-MP(Rev1) PRE-MP(Rev1) PRE-MP(Rev1) PRE-MP(Rev1) PRE-MP(Rev2)Change RF-Jack Material
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/07/29 2006/07/29
3
Deciphered Date
Title
Size Document Number Rev
B
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2781
401353
星期日
01, 2006
一月
1
B
50 50,
of
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