Acer Aspire 9500 Schematics

A

1 1

B

C

D

E

Compal Confidential

2 2

HQD70/HDQ71 Schematics Document

Intel Dothan Processor with 915PM/915GM + DDRII + ICH6M

(With ATi M26-P)

3 3

2005-07-29

REV: 2.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

星期日

01, 2006

一月

E

B

150,

of

A

B

C

D

E

Compal Confidential

Model Name : HDQ70
File Name : LA-2781

1 1

DVI-D Conn.

page 16

Fan Control

(G993)

LCD Conn.

page 15

page 39

CRT & TV-out

page 14

Pentium-M(Dothan)

uPGA-478 Package

H_A#(3..31)

533MHz

PSB

page 4,5

H_D#(0..63)

Thermal Se nsor

G781

page 4

Memory BUS(DDRII)

DVI Transmitter

CH7307C

page 16

PCI-Express

Intel 915PM/GM

uFCBGA-1257

page 6,7,8,9,10

Dual Channel

1.8V DDRII 400/533

VGA/B Conn.

LCD Conn.

2 2

IDSEL:AD16
(PIRQE#,
GNT#2,
REQ#2)

IEEE 1394

TSB43AB22A

page 25

page 15

IDSEL:AD19
(PIRQH/A#,
GNT#4,
REQ#4)

Mini PCI
socket

(TV-Tuner) (WLAN)

page 29

1394 Conn.

3 3

page 25

with 128/256MB VRAM

3.3V 33 MHz

IDSEL:AD18
(PIRQG/H#,
GNT#3,
REQ#3)

Mini PCI
socket

page 28

IDSEL:AD17
(PIRQF#,
GNT#3,
REQ#3)

LAN (GbE)

RTL8110SBL/
RTL8100CL

RJ45

page 27

page 26

PCI BUS

IDSEL:AD20
(PIRQA#,
GNT#2,
REQ#2)

CardBus

ENE CB714

Slot 0

page 23

Intel ICH6-M

page 22

4 in 1
socket

page 23

ATI M26-P

DMI

BGA-609

page 17,18,19,20

PCI Express

3.3V 48MHz

3.3V 24.576MHz/48Mhz

3.3V ATA-100
S-ATA

IDE

S-ATA HDD
Conn.

page 21

New Card
Socket

USB port 3

CDROM
Conn.

HDD
Conn.

LPC BUS

Clock Generator

ICS 954226AG

page 13

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

page 24

AC-LINK/Azalia

USB conn x5

USB port 0, 1, 2, 4, 6

page 11,12

page 31

MDC 1.5
Conn

page 21

page 21

page 33

Audio AMP

page 37

Bluetooth
Conn

USB port5

USB port 1

HDA Codec

ALC260D

page 36

Subwoofer

page 36

page 38

RTC CKT.

page 35

Power On/Off CKT.

page 39

4 4

DC/DC Interface CKT.

page 40

Button/B Conn.

page 34

TP/B Co nn.

page 34

LCM Conn.

page 34

Touch Pad

EC I/O Buffer

Power Circuit DC/DC

page 41,42,43,44,
45,46,47,48

A

B

ENE KB910Q

page 34

page 33

page 32

Int.KBD

page 33

Parallel Port

page 30

BIOS

page 33

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

C

Compal Secret Data

Super I/O

SMsC LPC47N217

Deciphered Date

page 30

FIR

D

page 30

Title

Size Document Number Rev

B

Date: Sheet

Phone Jack x3

page 37

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

星期日

01, 2006

一月

B

250,

E

of

A

Voltage Rails

Power Plane Description

1 1

2 2

VIN
B+
+CPU_CORE
+0.9VS 0 .9V s wi t ched power rail for DDR terminator
+1.05VS
+1.5VALW 1.5V always on power rail
+1.5VS
+1.8V
+1.8VS 1.8V switched power rail
+2.5VS
+3VALW
+3VS
+5VALW
+5VS
+VSB VSB always on power rail ON ON*
+RTC V C C RTC power

Adapter power supply (19V)
AC or batte ry power rail for power circuit.
Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail
5V always on power rail
5V switched power rail

B

S1 S3 S5

N/A N/A N/A

ON OFF
ON OFF
ON OFF OF F
ON
ON OFF OF F
ON
ON
ON
ON
ON
ON

ON
ON

N/AN/AN/A
OFF
OFF

ON*ON

ON

OFF
OFF

OFF

OFF

OFF

ON ON*

OFF

OFF

ON

ON*

OFF

OFFON

ONON

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

D

LOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

AD_BID

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

E

SLP_S4# SLP_S5# +VA LW +V +VS Clock

0 V

HIGH

LOWLOWLOW

ON

HIGHHIGHHIGH

HIGH

HIGH

Vtyp

ON

ON

ON

ON

AD_BID

0 V 0 V

0.503 V

0.819 V

ON

ON

ON

OFF

OFF

V

AD_BID

0.538 V

0.875 V

ON ON

ON

OFF

OFF

OFF

max

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

LOW

OFF

OFF

OFF

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

Device IDSEL # REQ # / GNT # Interrupts

CardBus(SD)

1394

LAN
Mini-PCI(WLAN)
Mini-PCI(TV-Tuer)

3 3

AD20
AD16 0
AD17
AD18
AD19 4

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)
GMT G781-1

Address Address

1010 000X b
1001 101X b

2

3
1

PIRQA/PIRQB
PIRQE
PIRQF
PIRQG/PORQH
PIRQH/PORQA

EC SM Bus2 address

Device

GMT G781

1001 100X b0001 011X b

BOARD ID Table

Board ID

0
1
2

*

3
4
5
6
7

SKU ID Table

SKU ID

0
1
2
3

PCB Revision

0.1

0.2

0.3

1.0

SKU

PM
GM

BTO Option Table

BTO Item BOM Structure

VGA
LAN

TV-TUNER TV_TUNER@

PM@
GM@

8110S@
8100C@

4
5
6

ICH6M SM Bus address

Device

4 4

Clock Generator
( ICS 954226)

DDR DIMM0
DDR DIMM2

A

Address

1101 001Xb

1001 000Xb
1001 010Xb

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

C

7

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

星期日

01, 2006

一月

B

350,

E

of

5

H_A#[3..31]6

D D

H_REQ#[0..4]6

C C

H_RS#[0..2]6

B B

A A

H_A#[3..31]

H_REQ#[0..4]

H_RS#[0..2]

H_ADSTB#06
H_ADSTB#16

CLK_CPU_BCLK13

CLK_CPU_BCLK#13

H_ADS#6
H_BNR#6

H_BPRI#6

H_BR0#6

H_DEFER#6

H_DRDY#6

H_HIT#6
H_HITM#6

H_LOCK#6

H_CPURST#6

H_TRDY#6

H_DBSY#6
H_DPSLP#18
H_DPRSTP#18
H_DPWR#6

H_PWRGOOD18

H_CPUSLP#6,18

H_THERMTRIP#6,18

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_IERR#
H_CPURST#

H_RS#0
H_RS#1
H_RS#2

ITP_DBRRESET#

PRO_CHOT#
H_PWRGOOD

H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

THERMDA
THERMDC

THERMDA & THERMDC Trace / Space = 10 / 10 mil

5

4

JP33A

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#

W1

A8#

T4

A9#

W2

A10#

Y4

A11#

Y1

A12#

U1

A13#

AA3

A14#

Y3

A15#

AA2

A16#

AF4

A17#

AC4

A18#

AC7

A19#

AC3

A20#

AD3

A21#

AE4

A22#

AD2

A23#

AB4

A24#

AC6

ADDR GROUP

A25#

AD5

A26#

AE2

A27#

AD6

A28#

AF3

A29#

AE1

A30#

AF1

A31#

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

U3

ADSTB0#

AE5

ADSTB1#

A16

ITP_CLK0

A15

ITP_CLK1

B15

BCLK0

B14

BCLK1

N2

ADS#

L1

BNR#

J3

BPRI#

N4

BR0#

L4

DEFER#

H2

DRDY#

K3

HIT#

K4

HITM#

A4

IERR#

J2

LOCK#

B11

RESET#

H1

RS0#

K1

RS1#

L2

RS2#

M3

TRDY#

C8

BPM0#

B8

BPM1#

A9

BPM2#

C9

BPM3#

A7

DBR#

M2

DBSY#

B7

DPSLP#

G1

DPRSTP#

C19

DPWR#

A10

PRDY#

B10

PREQ#

B17

PROCHOT#

E4

PWRGOOD

A6

SLP#

A13

TCK

C12

TDI

A12

TDO

C5

TEST1

F23

TEST2

C11

TMS

B13

TRST#

B18

THERMDA

A18

THERMDC

C17

THERMTRIP#

TYCO_1612365-1_Dothan

4

Dothan

DATA GROUP

HOST CLK

CONTROL GROUP

MISC

THERMAL
DIODE

LEGACY CPU

3

H_D#0

A19

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#

D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#

LINT0
LINT1

STPCLK#

SMI#

A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DINV#0 6
H_DINV#1 6
H_DINV#2 6
H_DINV#3 6

H_DSTBN#0 6
H_DSTBN#1 6
H_DSTBN#2 6
H_DSTBN#3 6
H_DSTBP#0 6
H_DSTBP#1 6
H_DSTBP#2 6
H_DSTBP#3 6

H_A20M# 18
H_FERR# 18
H_IGNNE# 18
H_INIT# 18
H_INTR 18
H_NMI 18

H_STPCLK# 18
H_SMI# 18

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

3

H_D#[0..63]

2200P_0402_50V7K

EC_SMB_CK232
EC_SMB_DA232

Compal Secret Data

Deciphered Date

H_D#[0..63] 6

C480

1

2

2

THERMDA
THERMDC

ITP_TDI
ITP_TDO
H_CPURST#
ITP_TMS
PRO_CHOT#
H_PWRGOOD
H_IERR#

ITP_DBRRESET#

ITP_TRST#

ITP_TCK
TEST1
TEST2

2

+3VS

1

C473

0.1U_0402_16V4Z

2

U38

2
3
8
7

G781_SOP8

R430 150_0402_5%
R427 54.9_0402_1%@
R429 54.9_0402_1%@
R428 40.2_0402_1%
R433 56_0402_5%
R435 200_0402_5%
R434 56_0402_5%

R437 150_0402_5%

R431 680_0402_5%
R432 27.4_0402_1%
R436 1K_0402_5%@
R454 1K_0402_5%@

VDD1

D+

ALERT#

D-

THERM#

SCLK
SDATA

GND

12
12
12
12
12
12
12

12

12
12
12
12

Title

Size Document Number Rev

B

Date: Sheet

星期日

1

12

R416

10K_0402_5%@

1
6
4
5

+1.05VS

+3VS

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

01, 2006

一月

1

B

450,

of

5

JP33B

1

2

+1.05VS

VCCSENSE
VSSSENSE

GTL_REF0

COMP0
COMP1
COMP2
COMP3

AE7

VCCSENSE

AF6

VSSSENSE

F26

VCCA0

B1

VCCA1

N1

VCCA2

AC26

VCCA3

P23

VCCQ0

W4

VCCQ1

D10

VCCP

D12

VCCP

D14

VCCP

D16

VCCP

E11

VCCP

E13

VCCP

E15

VCCP

F10

VCCP

F12

VCCP

F14

VCCP

F16

VCCP

K6

VCCP

L5

VCCP

L21

VCCP

M6

VCCP

M22

VCCP

N5

VCCP

N21

VCCP

P6

VCCP

P22

VCCP

R5

VCCP

R21

VCCP

T6

VCCP

T22

VCCP

U21

VCCP

D6

VCC

D8

VCC

D18

VCC

D20

VCC

D22

VCC

E5

VCC

E7

VCC

E9

VCC

E17

VCC

E19

VCC

E21

VCC

F6

VCC

F8

VCC

F18

VCC

E1

PSI#

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AD26

GTLREF

C16

BSEL0

C14

BSEL1

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

B2

RSVD

C3

RSVD

E26

RSVD

AF7

RSVD

AC1

RSVD

TYCO_1612365-1_Dothan

COMP0
COMP1
COMP2
COMP3

Dothan

R186 54.9_0402_1%@

1 2

R194 54.9_0402_1%@

1 2

+VCCA

D D

1.8V FOR DOTHAN-A

1 2

+1.8VS

R479 0_1206_5%@

1.5V FOR DOTHAN-B

1 2

+1.5VS

R488 0_1206_5%

C C

R183
1K_0402_1%

B B

A A

1 2

R182 2K_0402_1%

20mils

1

C534

0.01U_0402_16V7K

+1.05VS

R504 27.4_0402_1%
R509 54.9_0402_1%
R180 27.4_0402_1%
R178 54.9_0402_1%

C545

2

10U_0805_10V4Z

+CPU_CORE

PSI#48

CPU_VID048
CPU_VID148

12

CPU_VID248
CPU_VID348
CPU_VID448
CPU_VID548

CPU_BSEL013
CPU_BSEL113

1 2
1 2
1 2
1 2

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils

5

4

A2

VSS

A5

VSS

A8

VSS

A11

VSS

A14

VSS

A17

VSS

A20

VSS

A23

VSS

A26

VSS

B3

VSS

B6

VSS

B9

VSS

B12

VSS

B16

VSS

B19

VSS

B22

VSS

B25

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C13

VSS

C15

VSS

C18

VSS

C21

VSS

C24

VSS

D2

VSS

D5

VSS

D7

VSS

D9

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E10

VSS

E12

VSS

E14

VSS

E16

VSS

E18

VSS

E20

VSS

E22

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1

+1.05VS

1

+

2

150U_D2_6.3VM

POWER, GROUNG, RESERVED SIGNALS AND NC

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

1

C524

2

Issued Date

3

+CPU_CORE

330U_D_2VM

1

+

C54

2

330U_D_2VM@

+CPU_CORE

10U_0805_10V4Z

1

C110

2

10U_0805_10V4Z

+CPU_CORE

10U_0805_10V4Z

1

C130

C142

2

10U_0805_10V4Z

+CPU_CORE

10U_0805_10V4Z

1

C560

C561

2

10U_0805_10V4Z

+CPU_CORE

10U_0805_10V4Z

1

C618

C617

2

10U_0805_10V4Z

+CPU_CORE

10U_0805_10V4Z

1

C145

C154

2

10U_0805_10V4Z

Vcc-core
Decoupling

SPCAP,Polymer
MLCC 0805 X5R

0.1U_0402_16V4Z

1

C158

C26

2

0.1U_0402_16V4Z

3

2

1

2

1

C116

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

+

C53

C125

C123

C569

C607

C131

330U_D_2VM

1

2

1

2

1

2

1

2

1

2

1

+

C647

2

10U_0805_10V4Z

1

C134

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C114

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C581

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C596

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C118

2

10U_0805_10V4Z

2 x 330uF (7+9mOhm/2)

10U_0805_10V4Z

1

1

C144

C109

C586

C585

C76

2

1

2

1

2

1

2

1

2

C152

10U_0805_10V4Z

C107

10U_0805_10V4Z

C600

10U_0805_10V4Z

C577

10U_0805_10V4Z

C90

C151

2

10U_0805_10V4Z

1

C108

2

10U_0805_10V4Z

1

C608

2

10U_0805_10V4Z

1

C567

2

10U_0805_10V4Z

1

C85

2

10U_0805_10V4Z

1

2

1

2

1

2

1

2

1

2

C,uF ESR, mohm ESL,nH

2X330uF 7m ohm/2 3.5nH/2
35X10uF 5m ohm/35 0.6nH/35

1

C28

2

0.1U_0402_16V4Z

Deciphered Date

0.1U_0402_16V4Z

1

C22

2

0.1U_0402_16V4Z

1

1

C29

2

0.1U_0402_16V4Z

2005/07/29 2006/07/29

C23

2

1

2

Compal Secret Data

1

C24

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C25

2

2

1

C27

2

0.1U_0402_16V4Z

+CPU_CORE

C153

1

JP33C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC

Y22
AA5
AA7

AA9
AA11
AA13
AA15
AA17
AA19
AA21

AB6

AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC9
AC11
AC13
AC15
AC17
AC19

AD8
AD10
AD12
AD14
AD16
AD18

AE9
AE11
AE13
AE15
AE17
AE19

AF8

AF10
AF12
AF14
AF16
AF18

M4

M5
M21
M24

N3

N6
N22
N23
N26

P2

P5
P21
P24

R1
R4

R6
R22
R25

T3

T5
T21
T23

TYCO_1612365-1_Dothan

Title

Size Document Number Rev

B

Date: Sheet

星期日

Dothan

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

01, 2006

一月

T26

VSS

U2

VSS

U6

VSS

U22

VSS

U24

VSS

V1

VSS

V4

VSS

V5

VSS

V21

VSS

V25

VSS

W3

VSS

W6

VSS

W22

VSS

W23

VSS

W26

VSS

Y2

VSS

Y5

VSS

Y21

VSS

Y24

VSS

AA1

VSS

AA4

VSS

AA6

VSS

AA8

VSS

AA10

VSS

AA12

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA20

VSS

AA22

VSS

AA25

VSS

AB3

VSS

AB5

VSS

AB7

VSS

AB9

VSS

AB11

VSS

AB13

VSS

AB15

VSS

AB17

VSS

AB19

VSS

AB21

VSS

AB23

VSS

AB26

VSS

AC2

VSS

AC5

VSS

AC8

VSS

AC10

VSS

AC12

VSS

AC14

VSS

AC16

VSS

AC18

VSS

AC21

VSS

AC24

VSS

AD1

VSS

AD4

VSS

AD7

VSS

AD9

VSS

AD11

VSS

AD13

VSS

AD15

VSS

AD17

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE3

VSS

AE6

VSS

AE8

VSS

AE10

VSS

AE12

VSS

AE14

VSS

AE16

VSS

AE18

VSS

AE20

VSS

AE23

VSS

AE26

VSS

AF2

VSS

AF5

VSS

AF9

VSS

AF11

VSS

AF13

VSS

AF15

VSS

AF17

VSS

AF19

VSS

AF21

VSS

AF24

VSS

550,

1

of

B

5

H_RS#[0..2]

H_A#[3..31]4
H_REQ#[0..4]4

D D

C C

CLK_MCH_BCLK#13
CLK_MCH_BCLK13

B B

H_A#[3..31]

H_ADSTB#04
H_ADSTB#14

H_DSTBN#04
H_DSTBN#14
H_DSTBN#24
H_DSTBN#34
H_DSTBP#04
H_DSTBP#14
H_DSTBP#24
H_DSTBP#34
H_DINV#04
H_DINV#14
H_DINV#24
H_DINV#34

H_CPURST#4

H_ADS#4
H_TRDY#4

H_DPWR#4

H_DRDY#4
H_DEFER#4

H_HITM#4
H_HIT#4
H_LOCK#4
H_BR0#4
H_BNR#4
H_BPRI#4
H_DBSY#4

Un-pop for Dothan-A

R82 0_0402_5%

12

R36
100_0603_1%

12

R35
200_0603_1%

1 2

5

H_CPUSLP#4,18

A A

(5mil:15mil) (12mil:10mil)

H_VREF H_XSWING H_YSWING

1

C75

0.1U_0402_16V4Z

2

H_RS#[0..2] 4

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

CPU_SLP#
H_RS#0
H_RS#1
H_RS#2

0.1U_0402_16V4Z

U40A

G9

HA3#

Alviso

C9

HA4#

E9

HA5#

B7

HA6#

A10

HA7#

F9

HA8#

D8

HA9#

B10

HA10#

E10

HA11#

G10

HA12#

D9

HA13#

E11

HA14#

F10

HA15#

G11

HA16#

G13

HA17#

C10

HA18#

C11

HA19#

D11

HA20#

C12

HA21#

B13

HA22#

A12

HA23#

F12

HA24#

G12

HA25#

E12

HA26#

C13

HA27#

B11

HA28#

D13

HA29#

A13

HA30#

F13

HA31#

A11

HPCREQ#

A7

HREQ#0

D7

HREQ#1

B8

HREQ#2

C7

HREQ#3

A8

HREQ#4

B9

HADSTB#0

E13

HADSTB#1

AB1

HCLKN

AB2

HCLKP

G4

HDSTBN#0

K1

HDSTBN#1

R3

HDSTBN#2

V3

HDSTBN#3

G5

HDSTBP#0

K2

HDSTBP#1

R2

HDSTBP#2

W4

HDSTBP#3

H8

HDINV#0

K3

HDINV#1

T7

HDINV#2

U5

HDINV#3

H10

HCPURST#

F8

HADS#

B5

HTRDY#

G6

HDPWR#

F7

HDRDY#

E6

HDEFER#

F6

HEDRDY#

D6

HHITM#

D4

HHIT#

B3

HLOCK#

E7

HBREQ0#

A5

HBNR#

D5

HBPRI#

C6

HDBSY#

G8

HCPUSLP#

A4

HRS0#

C5

HRS1#

B4

HRS2#

ALVISO_BGA1257PM@

CPU_SLP#

+1.05VS +1.05VS+1.05VS

12

R68
221_0603_1%

1

C59

2

12

R52
100_0603_1%

HOST

HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP

HXSWING
HYSWING

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HVREF

4

E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2

J11
C1
C2
T1
L1
D1
P1

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_VREF
H_XRCOMP

R43 24.9_0402_1%

H_XSCOMP

R45 54.9_0402_1%

H_YRCOMP

R116 24.9_0402_1%

H_YSCOMP

R104 54.9_0402_1%

H_XSWING
H_YSWING

H_D#[0..63]H_REQ#[0..4]

Alviso Check List : NC

12

1 2

12

1 2

H_D#[0..63] 4

R163 40.2_0402_1%@
R164 40.2_0402_1%@

R172 80.6_0402_1%

+1.8V

R174 80.6_0402_1%

+1.05VS

1 2
1 2

1 2
1 2

H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil

12

R107
221_0603_1%

(12mil:10mil)

1

C91

0.1U_0402_16V4Z

2

12

R111
100_0603_1%

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DMI_ITX_MRX_N019
DMI_ITX_MRX_N119
DMI_ITX_MRX_N219
DMI_ITX_MRX_N319

DMI_ITX_MRX_P019
DMI_ITX_MRX_P119
DMI_ITX_MRX_P219
DMI_ITX_MRX_P319

DMI_MTX_IRX_N019
DMI_MTX_IRX_N119
DMI_MTX_IRX_N219
DMI_MTX_IRX_N319

DMI_MTX_IRX_P019
DMI_MTX_IRX_P119
DMI_MTX_IRX_P219
DMI_MTX_IRX_P319

(10mil:20mil)

3

U40B

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

DDRA_CLK011
DDRA_CLK111

DDRB_CLK012
DDRB_CLK112

DDRA_CLK0#11
DDRA_CLK1#11

DDRB_CLK0#12
DDRB_CLK1#12

DDRA_CKE011
DDRA_CKE111
DDRB_CKE012
DDRB_CKE112

DDRA_SCS#011
DDRA_SCS#111
DDRB_SCS#012
DDRB_SCS#112

DDRA_ODT011
DDRA_ODT111
DDRB_ODT012
DDRB_ODT112

10mils
10mils

R159

1K_0402_1%

R151

1K_0402_1%

10mils
10mils

10mils
10mils

+1.8V

M_OCDCOMP0
M_OCDCOMP1

M_RCOMPN
M_RCOMPP
SMVREF

M_XSLEW
M_YSLEW

12

0.1U_0402_16V4Z

12

C124

2005/07/29 2006/07/29

3

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3

Y33

DMITXP0

AA37

DMITXP1

AB33

DMITXP2

AC37

DMITXP3

AM33

SM_CK0

AL1

SM_CK1

AE11

SM_CK2

AJ34

SM_CK3

AF6

SM_CK4

AC10

SM_CK5

AN33

SM_CK0#

AK1

SM_CK1#

AE10

SM_CK2#

AJ33

SM_CK3#

AF5

SM_CK4#

AD10

SM_CK5#

AP21

SM_CKE0

AM21

SM_CKE1

AH21

SM_CKE2

AK21

SM_CKE3

AN16

SM_CS0#

AM14

SM_CS1#

AH15

SM_CS2#

AG16

SM_CS3#

AF22

SM_OCDCOMP0

AF16

SM_OCDCOMP1

AP14

SM_ODT0

AL15

SM_ODT1

AM11

SM_ODT2

AN10

SM_ODT3

AK10

SMRCOMPN

AK11

SMRCOMPP

AF37

SMVREF0

AD1

SMVREF1

AE27

SMXSLEWIN

AE28

SMXSLEWOUT

AF9

SMYSLEWIN

AF10

SMYSLEWOUT

SMVREF

15mils

1

1

2

C127

0.1U_0402_16V4Z

2

Compal Secret Data

Deciphered Date

ALVISO_BGA1257PM@

2

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12

DMIDDR MUXING

CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22

CFG/RSVD

RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

PM

DREF_CLKN
DREF_CLKP

DREF_SSCLKP

CLK

DREF_SSCLKN

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

NC10

NC

NC11

2

G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

J23
J21
H22
F5
AD30
AE29

A24
A23
D37
C37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

1

CLK_DREF_SSC
CLK_DREF_SSC#

CFG0
MCH_CLKSEL1
MCH_CLKSEL0

CFG5
CFG6
CFG7

CFG9

CFG12
CFG13

CFG16
CFG18

CFG19

R56 0_0402_5%PM@

1 2

R46 0_0402_5%PM@

1 2

MCH_CLKSEL1 13
MCH_CLKSEL0 13

CFG0

R85 10K_0402_5%

CFG5

R86 1K_0402_5%@

CFG6

R66 1K_0402_5%

CFG7

R51 1K_0402_5%@

CFG9

R67 1K_0402_5%@

CFG12

R50 1K_0402_5%@

CFG13

R90 1K_0402_5%@

CFG16

R94 1K_0402_5%@

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

CFG[17:3]: internal pull-up

CFG18

R84 1K_0402_5%@

CFG19

1 2

R83 1K_0402_5%@

1 2

CFG[19:18]: internal pull-down

EXT_TS#0
EXT_TS#1
H_THERMTRIP#

CLK_DREF_96M#
CLK_DREF_96M
CLK_DREF_SSC
CLK_DREF_SSC#

CFG[2:0]
CFG5
CFG6
CFG7

CFG9

CFG[13:12]

CFG16
(FSB Dynamic
ODT)

CFG18
(VCC Select)

CFG19
(VTT Select)

PM_BMBUSY# 19

H_THERMTRIP# 4,18
VGATE 13,19,48

PLT_RST# 17,19,21,30,32

CLK_DREF_96M# 13
CLK_DREF_96M 13
CLK_DREF_SSC 13
CLK_DREF_SSC# 13

EXT_TS#0

R97 10K_0402_5%

EXT_TS#1

Title

Size Document Number Rev

B

Date: Sheet

星期日

01, 2006

1 2

R96 10K_0402_5%

1 2

Refer to sheet 6 for FSB
frequency select
Low = DMI x 2

High = DMI x 4
Low = DDR-II

High = DDR-I
Low = DT/Transportable CPU

High = Mobile CPU
Low = Reverse Lane

High = Normal Operation
00 = Reserved

01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation (Default)

Low = Disabled
High = Enabled

Low = 1.05V (Default)
High = 1.5V

Low = 1.05V (Default)
High = 1.2V

*
*

*

*

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

一月

1

+1.5VS

*

*

650,

+1.05VS

+2.5VS

+2.5VS

*

*

B

of

5

4

3

2

1

DDRA_SDQ[0..63]11

DDRA_SDM[0..7]11

D D

C C

B B

DDRA_SMA[0..13]11

DDRA_SBS0#11
DDRA_SBS1#11
DDRA_SBS2#11 DDRB_SBS2#12

DDRA_SDQS011
DDRA_SDQS111
DDRA_SDQS211
DDRA_SDQS311
DDRA_SDQS411
DDRA_SDQS511
DDRA_SDQS611
DDRA_SDQS711

DDRA_SDQS0#11
DDRA_SDQS1#11
DDRA_SDQS2#11
DDRA_SDQS3#11
DDRA_SDQS4#11
DDRA_SDQS5#11
DDRA_SDQS6#11
DDRA_SDQS7#11

DDRA_SCAS#11
DDRA_SRAS#11

DDRA_SWE#11

AF28,AF29 should be routed to a via AF14,AF15 should be routed to a via

DDRA_SDQ[0..63]
DDRA_SDM[0..7]

DDRA_SMA[0..13]

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7

DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13

AK15
AK16

AL21
AJ37

AP35

AL29

AP24

AP9
AP4

AJ2

AD3

AK36
AP33
AN29
AP23

AM8
AM4

AJ1

AE5

AK35
AP34
AN30
AN23

AN8
AM5
AH1

AE4

AL17
AP17
AP18
AM17
AN18
AM18

AL19
AP20
AM19

AL20
AM16
AN20
AM20
AM15

AN15
AP16

AF29

AF28
AP15

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

ALVISO_BGA1257PM@

DDRB_SDQ[0..63]12
DDRB_SDM[0..7]12

DDRB_SMA[0..13]12

U40C

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8

SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43

DDR MEMORY SYSTEM A

SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

DDRB_SBS0#12
DDRB_SBS1#12

DDRB_SDQS012
DDRB_SDQS112
DDRB_SDQS212
DDRB_SDQS312
DDRB_SDQS412
DDRB_SDQS512
DDRB_SDQS612
DDRB_SDQS712

DDRB_SDQS0#12
DDRB_SDQS1#12
DDRB_SDQS2#12
DDRB_SDQS3#12
DDRB_SDQS4#12
DDRB_SDQS5#12
DDRB_SDQS6#12
DDRB_SDQS7#12

DDRB_SCAS#12
DDRB_SRAS#12

DDRB_SWE#12

DDRB_SDQ[0..63]
DDRB_SDM[0..7]

DDRB_SMA[0..13]

DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7

DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7

DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13

AJ15
AG17
AG21

AF32
AK34
AK27
AK24

AJ10

AK5
AE7
AB7

AF34
AK32

AJ28
AK23
AM10

AH6
AF8
AB4

AF35
AK33
AK28

AJ23

AL10

AH7
AF7
AB5

AH17
AK17
AH18

AJ18
AK18

AJ19
AK19
AH19

AJ20
AH20

AJ16
AG18
AG20
AG15

AH14
AK14

AF15

AF14
AH16

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

ALVISO_BGA1257PM@

U40D

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8

SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42

DDR SYSTEM MEMORY B

SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

星期日

01, 2006

一月

1

B

750,

5

+3VS +2.5VS

12

R28

2.2K_0402_5%GM@

ENBKL15,32

D D

C C

+2.5VS

R54 4.7K_0402_5%

1 2

R55 4.7K_0402_5%

1 2

R42 2.2K_0402_5%

1 2

R48 2.2K_0402_5%

1 2

R69 100K_0402_5%

1 2

R47 1.5K_0402_1%

1 2

R41 150_0402_5%

1 2

R49 150_0402_5%

1 2

R40 150_0402_5%

1 2

B B

+2.5VS

R27

2.2K_0402_5%GM@

LDDC_CLK

R24

A A

2.2K_0402_5%GM@

LDDC_DATA

G

2

1 2

13

D

S

Q4

+2.5VS

G

2

1 2

13

D

S

Q2

5

2

G

1 3

D

Q3

GMCH_TV_COMPS14
GMCH_TV_LUMA14
GMCH_TV_CRMA14

GMCH_CRT_CLK14
GMCH_CRT_DATA14
GMCH_CRT_B14

GMCH_CRT_G14
GMCH_CRT_R14

GMCH_CRT_VSYNC14
GMCH_CRT_HSYNC14

GMCH_CRT_CLK
GMCH_CRT_DATA
LCTLB_DATA
LCTLA_CLK

LBKLT_EN
LIBG
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

GMCH_LCD_CLK

BSS138_SOT23GM@

GMCH_LCD_DATA

BSS138_SOT23GM@

S

BSS138_SOT23GM@

+3VS

+3VS

LBKLT_EN

R26

1 2

R25

1 2

GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA

R95 4.99K_0402_1%

GMCH_CRT_CLK
GMCH_CRT_DATA

R70 150_0402_5%
R38 150_0402_5%
R39 150_0402_5%

4.7K_0402_5%GM@

GMCH_LCD_CLK 15

4.7K_0402_5%GM@

GMCH_LCD_DATA 15

4

U40G

REFSET

H24

H25
AB29
AC29

A15

C16

A17

B15

B16

B17

E24

E23

E21

D21

C20

B20

A19

B19

H21

G21

E25

C23

C22

C33

C31

B30

B29

C25

C24

B34

B33

B32

A34

A33

B31

C29

D28

C27

C28

D27

C26

J18

J20

F25

F23
F22
F26

F28
F27

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

ALVISO_BGA1257PM@

SDVO_SDAT16
SDVO_SCLK16

CLK_MCH_3GPLL#13
CLK_MCH_3GPLL13

12

10mils

TV_REFSET

12
12
12

1 2

R101 255_0402_1%

10mils

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA

GMCH_ENVDD15

GMCH_TXCLK-15
GMCH_TXCLK+15
GMCH_TZCLK-15
GMCH_TZCLK+15

GMCH_TXOUT0-15
GMCH_TXOUT1-15
GMCH_TXOUT2-15

GMCH_TXOUT0+15
GMCH_TXOUT1+15
GMCH_TXOUT2+15

GMCH_TZOUT0-15
GMCH_TZOUT1-15
GMCH_TZOUT2-15

GMCH_TZOUT0+15
GMCH_TZOUT1+15
GMCH_TZOUT2+15

GMCH_ENVDD
LIBG

GMCH_TXCLK­GMCH_TXCLK+
GMCH_TZCLK­GMCH_TZCLK+

GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

GMCH_TZOUT0­GMCH_TZOUT1­GMCH_TZOUT2-

GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PEG_COMP

EXP_COMPI

EXP_ICOMPO

EXP_RXN0/SDVO_TVCLKIN#

MISCTVVGALVDS

EXP_RXN1/SDVO_INT#

EXP_RXN2/SDVO_FLDSTALL#

EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0/SDVO_TVCLKIN

EXP_RXP1/SDVO_INT

EXP_RXP2/SDVO_FLDSTALL

EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0/SDVOB_RED#

EXP_TXN1/SDVOB_GREEN#

EXP_TXN2/SDVOB_BLUE#

EXP_TXN3/SDVOB_CLKN

EXP_TXN4/SDVOC_RED#

EXP_TXN5/SDVOC_GREEN#

EXP_TXN6/SDVOC_BLUE#

EXP_TXN7/SDVOC_CLKN

PCI - EXPRESS GRAPHICS

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0/SDVOB_RED

EXP_TXP1/SDVOB_GREEN

EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP

EXP_TXP4/SDVOC_RED

EXP_TXP5/SDVOC_GREEN

EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP

EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

2005/07/29 2006/07/29

3

D36
D34

E30
F34
G30
H34

EXP_RXN3

J30

EXP_RXN4

K34

EXP_RXN5

L30

EXP_RXN6

M34

EXP_RXN7

N30

EXP_RXN8

P34

EXP_RXN9

R30
T34
U30
V34
W30
Y34

D30
E34
F30
G34

EXP_RXP3

H30

EXP_RXP4

J34

EXP_RXP5

K30

EXP_RXP6

L34

EXP_RXP7

M30

EXP_RXP8

N34

EXP_RXP9

P30
R34
T30
U34
V30
W34

E32
F36
G32
H36
J32
K36
L32
M36
N32

EXP_TXN8

P36

EXP_TXN9

R32
T36
U32
V36
W32
Y36

D32
E36
F32
G36
H32
J36
K32
L36
M32

EXP_TXP8

N36

EXP_TXP9

P32
R36
T32
U36
V32
W36

Compal Secret Data

Deciphered Date

10mils

PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15

PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2

PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3

2

PCIE_MTX_C_GRX_N[0..15]15

PCIE_MTX_C_GRX_P[0..15]15
PCIE_GTX_C_MRX_N[0..15]15
PCIE_GTX_C_MRX_P[0..15]15

1 2

R53 24.9_0402_1%

C437 0.1U_0402_16V4ZPM@

1 2

C462 0.1U_0402_16V4ZPM@

1 2

C492 0.1U_0402_16V4ZPM@

1 2

C512 0.1U_0402_16V4ZPM@

1 2

C525 0.1U_0402_16V4ZPM@

1 2

C548 0.1U_0402_16V4ZPM@

1 2

C570 0.1U_0402_16V4ZPM@

1 2

C583 0.1U_0402_16V4ZPM@

1 2

C428 0.1U_0402_16V4ZPM@

1 2

C455 0.1U_0402_16V4ZPM@

1 2

C484 0.1U_0402_16V4ZPM@

1 2

C503 0.1U_0402_16V4ZPM@

1 2

C519 0.1U_0402_16V4ZPM@

1 2

C544 0.1U_0402_16V4ZPM@

1 2

C562 0.1U_0402_16V4ZPM@

1 2

C580 0.1U_0402_16V4ZPM@

1 2

C434 0.1U_0402_16V4Z@

1 2

1 4
2 3

RP11 0_0404_4P2R_5%@

1 4
2 3

RP12 0_0404_4P2R_5%@

1 4
2 3

RP13 0_0404_4P2R_5%@

1 4
2 3

RP14 0_0404_4P2R_5%@

2

1

PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P[0..15]

+1.5VS

C427 0.1U_0402_16V4ZPM@

1 2

C453 0.1U_0402_16V4ZPM@

1 2

C482 0.1U_0402_16V4ZPM@

1 2

C496 0.1U_0402_16V4ZPM@

1 2

C518 0.1U_0402_16V4ZPM@

1 2

C543 0.1U_0402_16V4ZPM@

1 2

C559 0.1U_0402_16V4ZPM@

1 2

C579 0.1U_0402_16V4ZPM@

1 2

C425 0.1U_0402_16V4ZPM@

1 2

C447 0.1U_0402_16V4ZPM@

1 2

C471 0.1U_0402_16V4ZPM@

1 2

C490 0.1U_0402_16V4ZPM@

1 2

C513 0.1U_0402_16V4ZPM@

1 2

C535 0.1U_0402_16V4ZPM@

1 2

C551 0.1U_0402_16V4ZPM@

1 2

C573 0.1U_0402_16V4ZPM@

1 2

C448 0.1U_0402_16V4Z@

1 2

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

星期日

01, 2006

一月

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15

SDVO_INT# 16
SDVO_INT 16

SDVOB_R# 16
SDVOB_R 16

SDVOB_G# 16
SDVOB_G 16

SDVOB_B# 16
SDVOB_B 16

SDVOB_CLK# 16
SDVOB_CLK 16

850,

1

B

5

4

3

2

1

C161

0.1U_0402_16V4Z

+1.8V

+1.8V

C632

330U_D_2VM@

+2.5VS

VCCA_LVDS (Ball A35)

+2.5VS_CRT

10U_1206_16V4Z

VCC_SYNC(Ball H20)

C166

0.1U_0402_16V4Z

12

0.1U_0402_16V4Z

1

C616

10U_0805_10V4Z

2

(0.1uF x1)

1 2

R71 0_0603_5%

C64

0.1U_0402_16V4Z

Deciphered Date

C146

0.1U_0402_16V4Z

12

0.1U_0402_16V4Z

2200mA

0.1U_0402_16V4Z

1

2

1

2

1

2

C164

0.1U_0402_16V4Z

C143

1

2

+

C122

C48

0.1U_0402_16V4Z

C710

12

12

C606

+2.5VS

1

2

12

12

C170

(10uF x2, 0.1uF x6)

C150

0.1U_0402_16V4Z

1

C49

2

0.01U_0402_16V7K

1

C72

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

+3VS

2

U40E

+1.05VS

D D

C C

+1.5VS

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL

20mils

+1.5VS_DPLLA

1

C42

2

10U_1206_16V4Z

+1.5VS_HPLL

1

C568

2

10U_1206_16V4Z

+2.5VS

1

+

C706

2

150U_D2_6.3VM@

0.1U_0402_16V4Z@

60mA

1

C35

10U_1206_16V4Z

2

(470uF x1, 0.1uF x1)

60mA

1

C578

10U_1206_16V4Z

2

(470uF x1, 0.1uF x1) (470uF x1, 0.1uF x1)

B B

A A

T29

VCC0

R29

VCC1

N29

VCC2

M29

VCC3

K29

VCC4

J29

VCC5

V28

VCC6

U28

VCC7

T28

R28

P28
N28
M28

L28

K28

J28
H28
G28

V27
U27

T27
R27

P27
N27
M27

L27

K27

J27
H27

K26
H26

K25

J25

K24

K23

K22

K21

W20

U20

T20

K20

V19
U19

K19

W18

V18

T18

K18

K17

AC1
AC2

B23
C35
AA1
AA2

1

C707

2

0.1U_0402_16V4Z@

L7
CHB1608U301_0603

1 2

Change to 0 ohm

1

C47

2

0.1U_0402_16V4Z

L27
CHB1608U301_0603

1 2

Change to 0 ohm Change to 0 ohm

1

C115

2

0.1U_0402_16V4Z

5

POWER

VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

ALVISO_BGA1257PM@

1

C708

2

0.1U_0402_16V4Z@

1

C709

2

+1.5VS_DPLLB

+1.5VS

+1.5VS_MPLL

+1.5VS

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCA_TVBG
VSSA_TVBG

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCA_LVDS

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_3GBG
VSSA_3GBG

VCC_SYNC

VCCA_CRTDAC0
VCCA_CRTDAC1

VSSA_CRTDAC

1

2

1

C45

10U_1206_16V4Z

2

10U_1206_16V4Z

1

C590

10U_1206_16V4Z

2

10U_1206_16V4Z

F17
E17
D18
C18
F18
E18

H18
G18

D19
H17

B26
B25
A25

A35
B22

VCCHV0

B21

VCCHV1

A21

VCCHV2

B28
A28
A27

AF20
AP19
AF19
AF18

AE37

VCC3G0

W37

VCC3G1

U37

VCC3G2

R37

VCC3G3

N37

VCC3G4

L37

VCC3G5

J37

VCC3G6

Y29
Y28
Y27

F37

0.15mA

G37
H20
F19

E19
G19

L37
CHB1608U301_0603

1 2

C69

4.7U_0805_10V4Z

L9
CHB1608U301_0603

1 2

Change to 0 ohm

1

C56

2

0.1U_0402_16V4Z

L30
CHB1608U301_0603

1 2

1

C112

2

0.1U_0402_16V4Z

60mA

1

C44

2

(470uF x1, 0.1uF x1)

60mA

1

C602

2

120mA

24mA

60mA

10mA
2mA

60mA

1000mA

70mA

+2.5VS_CRT

+3VS_DAC

+1.5VS

+2.5VS

+1.5VS_DDRDLL

+1.5VS

+1.5VS_3GPLL

+2.5VS_3GBG

+2.5VS_CRT

+1.5VS

+1.5VS

4

+1.05VS

C37

1

0.47U_0603_16V4Z

2

1

C38

2

0.47U_0603_16V4Z

C106

0.22U_0603_10V7K

0.22U_0603_10V7K

1

C633

10U_1206_16V4Z

2

10U_1206_16V4Z

(100uF x1, 0.1uF x1) (220uF x1, 10uF x2)

+1.5VS_3GPLL

1

C622

2

10U_0805_10V4Z

(10uF x1, 0.1uF x1)

1

2

1

C70

2

1

C629

2

1

C113

0.1U_0402_16V4Z

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

K13

J13

K12

W11

V11
U11
T11
R11
P11
N11

M11

L11
K11

W10

V10

U10

T10

R10

P10
N10
M10

K10

J10

Y9

W9

U9
R9
P9
N9

M9

L9
J9
N8

M8

N7

M7

N6

M6

A6
N5

M5

N4

M4

N3

M3

N2

M2

B2
V1

N1
M1
G1

1

2

R517

0.5_0603_1%

1 2

Issued Date

U40F

VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7

POWER

VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51

ALVISO_BGA1257PM@

R532
0_0603_5%

1 2

C167

0.1U_0402_16V4Z

+3GPLL

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

+1.5VS+1.5VS_DDRDLL

+1.5VS

220U_D2_4VM_R12

L29
CHB1608U301_0603

1 2

+1.5VS

Change to 0 ohm

2005/07/29 2006/07/29

3

V1.8_DDR_CAP2

AH37

V1.8_DDR_CAP5

AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9

V1.8_DDR_CAP6

AP8

V1.8_DDR_CAP4

AM1

V1.8_DDR_CAP3

AE1

VCC3G

1

+

C591

2

10U_0805_10V4Z

+2.5VS_3GBG

1

2

Compal Secret Data

V1.8_DDR_CAP1

AM37

+1.05VS

C77
10U_0805_10V4Z

0.1U_0402_16V4Z

1

2

C117

1

2

VCCHV(Ball A21,B21,B22)

1

2

(0.1uF x1, 0.01uF x1)

VCCA_CRTD AC(Ball F19 ,E19)

1

2

(10uF x1, 0.1uF x1)

C43

+1.5VS

1

C51

2

0.1U_0402_16V4Z

2.2U_0805_16V4Z

L8

CHB1608U301_0603

1 2

1

C31

+

2

150U_D2_6.3VM

+1.05VS

4000mA

10U_0805_10V4Z

C119

1

C98

2

0.1U_0402_16V4Z

1

2

C126

1

2

0.1U_0402_16V4Z

(10uF x1, 0.1uF x1)

C40

4.7U_0805_10V4Z

C65

0.1U_0402_16V4Z

VCCD_TVDAC (Ball D19)

0.1U_0402_16V4Z

1

C57

2

(10uF x1, 0.1uF x1)

950mA

1

C73

2

2.2U_0805_16V4Z

Title

Size Document Number Rev

B

Date: Sheet

+3VS_DAC

1

2

10U_1206_16V4Z

星期日

(10uF x3, 0.1uF x3)

1

C92

2

10U_0805_10V4Z

1

C121

2

0.1U_0402_16V4Z

1

C52

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C79

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C139

2

1

C41

2

4.7U_0805_10V4Z

(4.7uF x1, 0.1uF x1)

1

C101

2

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C141

1

2

VCCTX_LVDS(Ball A27,A28,B28)

(0.1uF x1, 0.022uF x1)

1

C61

2

0.022U_0402_16V7K

(0.1uF x1, 0.022uF x1)

0.1U_0402_16V4Z

1

2

1

C55

2

0.022U_0402_16V7K

1

C74

2

VCCDQ_TVDAC (Ball H17)VCCD_LVDS(Ball A25,B25,B26)

(0.1uF x1, 0.022uF x1)

C83

0.022U_0402_16V7K

(0.47uF x2, 0.22uF x2)

1

C84

2

1

C100

2

2.2U_0805_16V4Z

VCCA_TVDAC VCCA_TVBG

0.022U_0402_16V7K

1

C703

C60

2

0.1U_0402_16V4Z

120mA

1

C71

2

1

C39

2

2.2U_0805_16V4Z

(0.1uF x1, 0.022uF x1)(0.1uF x1, 0.022uF x1)

(Ball H18)

0.022U_0402_16V7K

1

C50

2

0.1U_0402_16V4Z

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

01, 2006

一月

401353

950,

1

1

C93

2

1

2

C46

0.1U_0402_16V4Z

1

2

1

C63

2

of

B

5

4

3

2

1

U40H

+1.05VS

D D

C C

B B

+1.05VS

A A

L12

VTT_NCTF17

M12

VTT_NCTF16

N12

VTT_NCTF15

P12

VTT_NCTF14

R12

VTT_NCTF13

T12

VTT_NCTF12

U12

VTT_NCTF11

V12

VTT_NCTF10

W12

VTT_NCTF9

L13

VTT_NCTF8

M13

VTT_NCTF7

N13

VTT_NCTF6

P13

VTT_NCTF5

R13

VTT_NCTF4

T13

VTT_NCTF3

U13

VTT_NCTF2

V13

VTT_NCTF1

W13

VTT_NCTF0

Y12

VSS_NCTF68

AA12

VSS_NCTF67

Y13

VSS_NCTF66

AA13

VSS_NCTF65

L14

VSS_NCTF64

M14

VSS_NCTF63

N14

VSS_NCTF62

P14

VSS_NCTF61

R14

VSS_NCTF60

T14

VSS_NCTF59

U14

VSS_NCTF58

V14

VSS_NCTF57

W14

VSS_NCTF56

Y14

VSS_NCTF55

AA14

VSS_NCTF54

AB14

VSS_NCTF53

L15

VSS_NCTF52

M15

VSS_NCTF51

N15

VSS_NCTF50

P15

VSS_NCTF49

R15

VSS_NCTF48

T15

VSS_NCTF47

U15

VSS_NCTF46

V15

VSS_NCTF45

W15

VSS_NCTF44

Y15

VSS_NCTF43

AA15

VSS_NCTF42

AB15

VSS_NCTF41

L16

VSS_NCTF40

M16

VSS_NCTF39

N16

VSS_NCTF38

P16

VSS_NCTF37

R16

VSS_NCTF36

T16

VSS_NCTF35

U16

VSS_NCTF34

V16

VSS_NCTF33

W16

VSS_NCTF32

Y16

VSS_NCTF31

AA16

VSS_NCTF30

AB16

VSS_NCTF29

R17

VSS_NCTF28

Y17

VSS_NCTF27

AA17

VSS_NCTF26

AB17

VSS_NCTF25

AA18

VSS_NCTF24

AB18

VSS_NCTF23

AA19

VSS_NCTF22

AB19

VSS_NCTF21

AA20

VSS_NCTF20

AB20

VSS_NCTF19

R21

VSS_NCTF18

Y21

VSS_NCTF17

AA21

VSS_NCTF16

AB21

VSS_NCTF15

Y22

VSS_NCTF14

AA22

VSS_NCTF13

AB22

VSS_NCTF12

Y23

VSS_NCTF11

AA23

VSS_NCTF10

AB23

VSS_NCTF9

Y24

VSS_NCTF8

AA24

VSS_NCTF7

AB24

VSS_NCTF6

Y25

VSS_NCTF5

AA25

VSS_NCTF4

AB25

VSS_NCTF3

Y26

VSS_NCTF2

AA26

VSS_NCTF1

AB26

VSS_NCTF0

V25

VCC_NCTF10

W25

VCC_NCTF9

L26

VCC_NCTF8

M26

VCC_NCTF7

N26

VCC_NCTF6

P26

VCC_NCTF5

R26

VCC_NCTF4

T26

VCC_NCTF3

U26

VCC_NCTF2

V26

VCC_NCTF1

W26

VCC_NCTF0

ALVISO_BGA1257

PM@

5

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10

VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70

NCTF

VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25

+1.8V

+1.05VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U40I

Y1
D2

G2

J2
L2
P2
T2

V2
AD2
AE2
AH2

AL2

AN2

A3

C3
AA3
AB3
AC3

AJ3

C4

H4

L4

P4

U4

Y4
AF4
AN4

E5

W5

AL5

AP5

B6

J6

L6

P6

T6
AA6
AC6
AE6

AJ6

G7

V7
AA7
AG7
AK7
AN7

C8

E8

L8

P8

Y8

AL8

A9

H9

K9

T9

V9
AA9
AC9
AE9
AH9
AN9
D10

L10
Y10

AA10

F11

H11

Y11

ALVISO_BGA1257

PM@

VSS271
VSS270
VSS269
VSS268
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196

VSS

2005/07/29 2006/07/29

3

VSSALVDS

Compal Secret Data

B36
AA11

VSS195

AF11

VSS194

AG11

VSS193

AJ11

VSS192

AL11

VSS191

AN11

VSS190

B12

VSS189

D12

VSS188

J12

VSS187

A14

VSS186

B14

VSS185

F14

VSS184

J14

VSS183

K14

VSS182

AG14

VSS181

AJ14

VSS180

AL14

VSS179

AN14

VSS178

C15

VSS177

K15

VSS176

A16

VSS175

D16

VSS174

H16

VSS173

K16

VSS172

AL16

VSS171

C17

VSS170

G17

VSS169

AF17

VSS168

AJ17

VSS167

AN17

VSS166

A18

VSS165

B18

VSS164

U18

VSS163

AL18

VSS162

C19

VSS161

H19

VSS160

J19

VSS159

T19

VSS158

W19

VSS157

AG19

VSS156

AN19

VSS155

A20

VSS154

D20

VSS153

E20

VSS152

F20

VSS151

G20

VSS150

V20

VSS149

AK20

VSS148

C21

VSS147

F21

VSS146

AF21

VSS145

AN21

VSS144

A22

VSS143

D22

VSS142

E22

VSS141

J22

VSS140

AH22

VSS139

AL22

VSS138

H23

VSS137

AF23

VSS136

B24

VSS135

D24

VSS134

F24

VSS133

J24

VSS132

AG24

VSS131

AJ24

VSS130

Deciphered Date

2

U40J

AL24

AN24

A26
E26
G26

J26
B27
E27
G27

W27
AA27
AB27

AF27

AG27

AJ27
AL27

AN27

E28

W28
AA28
AB28
AC28

A29
D29
E29

F29
G29
H29

L29
P29
U29
V29

W29
AA29
AD29
AG29

AJ29

AM29

C30

Y30
AA30
AB30
AC30
AE30
AP30

D31

E31

F31
G31
H31

J31
K31

L31
M31
N31
P31
R31

T31
U31
V31

W31
AD31
AG31

AL31

A32
C32

Y32
AA32
AB32

ALVISO_BGA1257

PM@

VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68

VSS

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781
401353

星期日

01, 2006

一月

VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0

1

AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37

10 50,

B

of

5

+DIMM_VREF

DDRA_SDQ0
DDRA_SDQ1

DDRA_SDQS0#7
DDRA_SDQS07

D D

DDRA_SDQS1#7
DDRA_SDQS17

DDRA_SDQS2#7
DDRA_SDQS27

C C

DDRA_CKE06

DDRA_SBS2#7

DDRA_SBS0#7
DDRA_SWE#7

DDRA_SCAS#7
DDRA_SCS#16

DDRA_ODT16

DDRA_SDQS4#7
DDRA_SDQS47

B B

DDRA_SDQS6#7
DDRA_SDQS67

A A

D_CK_SDATA12,13
D_CK_SCLK12,13

DDRA_SDQS0#
DDRA_SDQS0

DDRA_SDQ2
DDRA_SDQ3

DDRA_SDQ8
DDRA_SDQ9

DDRA_SDQS1#
DDRA_SDQS1

DDRA_SDQ10
DDRA_SDQ11

DDRA_SDQ16
DDRA_SDQ17

DDRA_SDQS2#
DDRA_SDQS2

DDRA_SDQ18
DDRA_SDQ19

DDRA_SDQ24
DDRA_SDQ25

DDRA_SDM3

DDRA_SDQ26
DDRA_SDQ27

DDRA_SBS2#
DDRA_SMA12

DDRA_SMA9
DDRA_SMA8

DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#

DDRA_SCAS#
DDRA_SCS#1

DDRA_ODT1
DDRA_SDQ32

DDRA_SDQ33
DDRA_SDQS4#

DDRA_SDQS4
DDRA_SDQ34

DDRA_SDQ35
DDRA_SDQ40

DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42

DDRA_SDQ43
DDRA_SDQ48

DDRA_SDQ49

DDRA_SDQS6#
DDRA_SDQS6

DDRA_SDQ50
DDRA_SDQ51

DDRA_SDQ56
DDRA_SDQ57

DDRA_SDM7
DDRA_SDQ58

DDRA_SDQ59
D_CK_SDATA

D_CK_SCLK

+3VS

+1.8V +1.8V

JP45

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5652C-A0G16

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1
RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

SA1

A11

S0#

NC

A7
A6

A4
A2
A0

NC

DIMM0 STD H:5.2mm (BOT)

5

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

4

DDRA_SDQ4
DDRA_SDQ5

DDRA_SDM0
DDRA_SDQ6

DDRA_SDQ7
DDRA_SDQ12

DDRA_SDQ13
DDRA_SDM1

DDRA_SDQ14
DDRA_SDQ15

DDRA_SDQ20
DDRA_SDQ21

DDRA_SDM2
DDRA_SDQ22

DDRA_SDQ23
DDRA_SDQ28

DDRA_SDQ29
DDRA_SDQS3#

DDRA_SDQS3
DDRA_SDQ30

DDRA_SDQ31
DDRA_CKE1DDRA_CKE0

DDRA_SMA11
DDRA_SMA7
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS#0

DDRA_ODT0
DDRA_SMA13

DDRA_SDQ36
DDRA_SDQ37

DDRA_SDM4
DDRA_SDQ38

DDRA_SDQ39
DDRA_SDQ44

DDRA_SDQ45
DDRA_SDQS5#

DDRA_SDQS5
DDRA_SDQ46

DDRA_SDQ47
DDRA_SDQ52

DDRA_SDQ53

DDRA_SDM6
DDRA_SDQ54

DDRA_SDQ55
DDRA_SDQ60

DDRA_SDQ61
DDRA_SDQS7#

DDRA_SDQS7
DDRA_SDQ62

DDRA_SDQ63

1 2

R246 10K_0402_5%

1 2

R247 10K_0402_5%

4

3

+1.8V

+DIMM_VREF

DDRA_CLK0 6
DDRA_CLK0# 6

DDRA_SMA[0..13]7
DDRA_SDQ[0..63]7

DDRA_SDM[0..7]7

DDRA_SDQS3# 7
DDRA_SDQS3 7

DDRA_CKE1 6

DDRA_SBS1# 7
DDRA_SRAS# 7
DDRA_SCS#0 6

DDRA_ODT0 6

DDRA_SDQS5# 7
DDRA_SDQS5 7

DDRA_CLK1 6
DDRA_CLK1# 6

DDRA_SDQS7# 7
DDRA_SDQS7 7

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

3

DDRA_SBS2#
DDRA_CKE0

DDRA_SMA9
DDRA_SMA12

DDRA_SMA5
DDRA_SMA8

DDRA_SMA1
DDRA_SMA3

DDRA_SBS0#
DDRA_SMA10

DDRA_SCS#0
DDRA_SWE#

DDRA_ODT1
DDRA_SRAS#

DDRA_CKE1
DDRA_SMA11

DDRA_SMA7
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2

DDRA_SMA0
DDRA_SBS1#

DDRA_SCS#1
DDRA_SCAS#

DDRA_ODT0
DDRA_SMA13

Compal Secret Data

20mils

C272

2.2U_0805_16V4Z

DDRA_SMA[0..13]
DDRA_SDQ[0..63]
DDRA_SDM[0..7]

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1

2

1

C278

0.1U_0402_16V4Z

2

RP26 56_0404_4P2R_5%

RP27 56_0404_4P2R_5%

RP28 56_0404_4P2R_5%

RP29 56_0404_4P2R_5%

RP30 56_0404_4P2R_5%

RP31 56_0404_4P2R_5%

RP32 56_0404_4P2R_5%

RP54 56_0404_4P2R_5%

RP50 56_0404_4P2R_5%

RP52 56_0404_4P2R_5%

RP53 56_0404_4P2R_5%

RP33 56_0404_4P2R_5%

RP51 56_0404_4P2R_5%

Deciphered Date

+0.9VS

2

12

R534
1K_0402_1%

12

R533
1K_0402_1%

2

1

+1.8V +1.8V +1.8V

1

C698

1000P_0402_50V7K@

2

+1.05VS +1.5VS +3VS

1

C699

2

1000P_0402_50V7K@

1

C700

1000P_0402_50V7K@

2

For EMI

+1.8V

1

C277

2.2U_0805_16V4Z

2

+1.8V

1

C270

0.1U_0402_16V4Z

2

+0.9VS

1

C286

2

0.1U_0402_16V4Z

+0.9VS

1

C292

0.1U_0402_16V4Z

2

+0.9VS

1

C669

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

B

Date: Sheet of

1

C299

2

2.2U_0805_16V4Z

1

C298

2

0.1U_0402_16V4Z

1

C288

0.1U_0402_16V4Z

2

1

C293

2

0.1U_0402_16V4Z

1

C670

2

0.1U_0402_16V4Z

SCHEMATIC, M/B LA-2781

401353

星期日

01, 2006

一月

1

C297

2.2U_0805_16V4Z

2

1

C274

0.1U_0402_16V4Z

2

1

C289

2

0.1U_0402_16V4Z

1

C291

0.1U_0402_16V4Z

2

1

C667

0.1U_0402_16V4Z

2

1

C269

2

2.2U_0805_16V4Z

1

C303

2

0.1U_0402_16V4Z

1

C287

0.1U_0402_16V4Z

2

1

C668

2

0.1U_0402_16V4Z

Compal Electronics, Inc.

1

1

C273

2.2U_0805_16V4Z

2

1

C290

2

0.1U_0402_16V4Z

1

C671

0.1U_0402_16V4Z

2

11 50,

B

A

JP41

+DIMM_VREF

DDRB_SDQ0
DDRB_SDQ1

DDRB_SDQS0#7
DDRB_SDQS07

1 1

DDRB_SDQS1#7
DDRB_SDQS17

DDRB_SDQS2#7
DDRB_SDQS27

2 2

DDRB_CKE06

DDRB_SBS2#7

DDRB_SBS0#7
DDRB_SWE#7

DDRB_SCAS#7
DDRB_SCS#16

DDRB_ODT16

DDRB_SDQS4#7
DDRB_SDQS47

3 3

DDRB_SDQS6#7
DDRB_SDQS67

4 4

D_CK_SDATA11,13
D_CK_SCLK11,13

DDRB_SDQS0#
DDRB_SDQS0

DDRB_SDQ2
DDRB_SDQ3

DDRB_SDQ8
DDRB_SDQ9

DDRB_SDQS1#
DDRB_SDQS1

DDRB_SDQ10
DDRB_SDQ11

DDRB_SDQ16
DDRB_SDQ17

DDRB_SDQS2#
DDRB_SDQS2

DDRB_SDQ18
DDRB_SDQ19

DDRB_SDQ24
DDRB_SDQ25

DDRB_SDM3

DDRB_SDQ26
DDRB_SDQ27

DDRB_CKE0

DDRB_SBS2#
DDRB_SMA12

DDRB_SMA9
DDRB_SMA8

DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#

DDRB_SCAS#
DDRB_SCS#1

DDRB_ODT1
DDRB_SDQ32

DDRB_SDQ33
DDRB_SDQS4#

DDRB_SDQS4
DDRB_SDQ34

DDRB_SDQ35
DDRB_SDQ40

DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42

DDRB_SDQ43
DDRB_SDQ48

DDRB_SDQ49

DDRB_SDQS6#
DDRB_SDQS6

DDRB_SDQ50
DDRB_SDQ51

DDRB_SDQ56
DDRB_SDQ57

DDRB_SDM7
DDRB_SDQ58

DDRB_SDQ59
D_CK_SDATA

D_CK_SCLK

+3VS

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692C-A0G16

VSS
DQ4
DQ5

VSS
DM0

VSS
DQ6
DQ7

VSS

DQ12
DQ13

VSS
DM1

VSS

CK0

CK0#

VSS

DQ14
DQ15

VSS

VSS

DQ20
DQ21

VSS
DM2

VSS

DQ22
DQ23

VSS

DQ28
DQ29

VSS

DQS3#

DQS3

VSS

DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS

DQ36
DQ37

VSS
DM4

VSS

DQ38
DQ39

VSS

DQ44
DQ45

VSS

DQS5#

DQS5

VSS

DQ46
DQ47

VSS

DQ52
DQ53

VSS

CK1

CK1#

VSS
DM6

VSS

DQ54
DQ55

VSS

DQ60
DQ61

VSS

DQS7#

DQS7

VSS

DQ62
DQ63

VSS
SAO

SA1

A11

S0#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DIMM1 STD H:9.2mm (BOT)

A

B

+1.8V+1.8V

DDRB_SDQ4
DDRB_SDQ5

DDRB_SDM0
DDRB_SDQ6

DDRB_SDQ7
DDRB_SDQ12

DDRB_SDQ13
DDRB_SDM1

DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ20
DDRB_SDQ21

DDRB_SDM2
DDRB_SDQ22

DDRB_SDQ23
DDRB_SDQ28

DDRB_SDQ29
DDRB_SDQS3#

DDRB_SDQS3
DDRB_SDQ30

DDRB_SDQ31
DDRB_CKE1

DDRB_SMA11
DDRB_SMA7
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2
DDRB_SMA0

DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS#0

DDRB_ODT0
DDRB_SMA13

DDRB_SDQ36
DDRB_SDQ37

DDRB_SDM4
DDRB_SDQ38

DDRB_SDQ39
DDRB_SDQ44

DDRB_SDQ45
DDRB_SDQS5#

DDRB_SDQS5
DDRB_SDQ46

DDRB_SDQ47
DDRB_SDQ52

DDRB_SDQ53

DDRB_SDM6
DDRB_SDQ54

DDRB_SDQ55
DDRB_SDQ60

DDRB_SDQ61
DDRB_SDQS7#

DDRB_SDQS7
DDRB_SDQ62

DDRB_SDQ63

1 2

R229 10K_0402_5%

1 2

R230 10K_0402_5%

B

C

+DIMM_VREF

1

C650

2.2U_0805_16V4Z

2

DDRB_CLK0 6
DDRB_CLK0# 6

DDRB_SMA[0..13]7
DDRB_SDQ[0..63]7

DDRB_SDM[0..7]7

DDRB_SDQS3# 7
DDRB_SDQS3 7

DDRB_CKE1 6

DDRB_SBS1# 7
DDRB_SRAS# 7
DDRB_SCS#0 6

DDRB_ODT0 6

DDRB_SDQS5# 7
DDRB_SDQS5 7

DDRB_CLK1 6
DDRB_CLK1# 6

DDRB_SDQS7# 7
DDRB_SDQS7 7

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

C

1

C651

2

0.1U_0402_16V4Z

DDRB_SBS2#
DDRB_CKE0

DDRB_SMA9
DDRB_SMA12

DDRB_SMA5
DDRB_SMA8

DDRB_SMA1
DDRB_SMA3

DDRB_SBS0#
DDRB_SMA10

DDRB_SCAS#
DDRB_SWE#

DDRB_ODT1
DDRB_SCS#1

DDRB_CKE1
DDRB_SMA11

DDRB_SMA7
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2

DDRB_SMA0
DDRB_SBS1#

DDRB_SRAS#
DDRB_SCS#0

DDRB_ODT0
DDRB_SMA13

Compal Secret Data

DDRB_SMA[0..13]
DDRB_SDQ[0..63]
DDRB_SDM[0..7]

1 4
2 3

RP48 56_0404_4P2R_5%

1 4
2 3

RP47 56_0404_4P2R_5%

RP46 56_0404_4P2R_5%

RP45 56_0404_4P2R_5%

RP49 56_0404_4P2R_5%

RP44 56_0404_4P2R_5%

RP43 56_0404_4P2R_5%

RP18 56_0404_4P2R_5%

RP19 56_0404_4P2R_5%

RP20 56_0404_4P2R_5%

RP23 56_0404_4P2R_5%

RP21 56_0404_4P2R_5%

RP22 56_0404_4P2R_5%

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

Deciphered Date

+0.9VS

D

+1.8V

1

+

C307
150U_D2_6.3VM@

2

+1.8V

1

C261

2

3300P_0402_50V7K

D

1

+

C637

330U_D2E_2.5VM

C267
3300P_0402_50V7K

C233

0.1U_0402_16V4Z

2

1

C275

2

33P_0402_50V8J

+1.8V

1

C252

2.2U_0805_16V4Z

2

+1.8V

1

C232

2

0.1U_0402_16V4Z

+0.9VS

1

C641

2

0.1U_0402_16V4Z

+0.9VS

1

C239

0.1U_0402_16V4Z

2

+0.9VS

1

C638

0.1U_0402_16V4Z

2

1

2

1

C217

2

0.1U_0402_16V4Z

1

C202

0.1U_0402_16V4Z

2

For EMI

1

2

C253

2.2U_0805_16V4Z

C231

0.1U_0402_16V4Z

C240

0.1U_0402_16V4Z

C241

0.1U_0402_16V4Z

C639

0.1U_0402_16V4Z

Title

Size Document Number Rev

B

Date: Sheet

C268

33P_0402_50V8J

1

2.2U_0805_16V4Z

2

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

1

0.1U_0402_16V4Z

2

1

2

C235

C258

C242

C640

0.1U_0402_16V4Z

C643

C301

0.1U_0402_16V4Z@

1

2

2.2U_0805_16V4Z

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

1

2

0.1U_0402_16V4Z

1

2

1

2

C236

C260

C243

C644

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781
401353

星期日

01, 2006

一月

E

1

C250

2

0.1U_0402_16V4Z

1

C300

0.1U_0402_16V4Z@

2

1

C251

2.2U_0805_16V4Z

2

1

2

1

C244

2

0.1U_0402_16V4Z

1

C642

0.1U_0402_16V4Z

2

E

C256
3300P_0402_50V7K

C302

33P_0402_50V8J

1

2

1

2

1

2

1

2

1

2

B

12 50,

of

A

FSC FSB FSA CPU

CLKSEL0 CLKSEL1 CLKSEL2

0

1 1

0

*

0

0
1
1

+3VS

R72

4.7K_0402_5%

1 2
1 2

R100
0_0402_5%@

A

CLKSEL2

CLK_PCI2

CLK_PCI1

CLK_PCI0

1 3

+1.05VS

1 2

R154 10K_0402_5%

1 2

R102 10K_0402_5%

1 2

R152 10K_0402_5%

1 2

R149 10K_0402_5%

2 2

3 3

CK_SCLK19,24

CLKSEL0

4 4

+3VS

D

CLK_ICH_48M19
CLK_SD_48M22

CLK_14M_CODEC36

2

G

S

Q7
2N7002_SOT23

R91

1K_0402_5%@
R92

0_0402_5%

1 2

1 2

R99
0_0402_5%

11
1
1
00

R109

4.7K_0402_5%

1 2

D_CK_SCLK

33P_0402_50V8J

CLK_PCI_LPC32
CLK_PCI_MINI229
CLK_PCI_SIO30
CLK_PCI_MINI128

CLK_PCI_LAN26
CLK_PCI_PCM22
CLK_PCI_139425

CLK_PCI_ICH17

12

B

SRC

MHz

100
133
166
200

PCI

MHz

MHz

100 33.3
100

33.3

100

33.3

100

33.3

Table : ICS 95 4226AG

C68

1 2

33P_0402_50V8J

1 2

D_CK_SCLK11,12

D_CK_SDATA11,12

+3VS

CK_SDATA19,24

MCH_CLKSEL0 6

CPU_BSEL0 5

CLKSEL1

C67

Y1

14.318MHZ_16PF_DSX840GA

12

CLK_ICH_48M

CLK_14M_CODEC CLKSEL0

R161

4.7K_0402_5%

1 2
1 2

R158
0_0402_5%@

B

C

+CLK_VDD48 +CLK_VDDREF

1

C550

2

2.2U_0805_16V4Z

+CLK_VDD2

1 2

1 2

R141 12_0402_5%

1 2

R155 12_0402_5%

1 2

R89 33_0402_5%@

CLK_PCI_LPC
CLK_PCI_MINI2
CLK_PCI_SIO
CLK_PCI_MINI1 CLK_PCI4

CLK_PCI_1394 CLK_PCI1

CLK_PCI_ICH
D_CK_SCLK

D_CK_SDATA

+3VS

2

1 3

D

+1.05VS

1 2

12

1 2

R139 12_0402_5%

1 2

R153 12_0402_5%

1 2

R124 12_0402_5%

1 2

R136 12_0402_5%

1 2

R119 33_0402_5%

1 2

R105 33_0402_5%

1 2

R122 33_0402_5%

1 2

R127 33_0402_5%

R98

4.7K_0402_5%

G

1 2

D_CK_SDATA

S

Q6
2N7002_SOT23

R157

1K_0402_5%@
R162

0_0402_5%

1 2

12

R166
0_0402_5%

1

C553

2

10P_0402_50V8J

+CLK_VDD1

+CLK_VDD1

1 2

+3VS

MCH_CLKSEL1 6

C

+CLK_VDDREF

+CLK_VDD48

XTALIN
XTALOUT

CLKSEL2CLK_SD_48M

CLKSEL1

CLK_PCI5

CLK_PCI3CLK_PCI_LAN
CLK_PCI2CLK_PCI_PCM

CLK_PCI0

CLKIREF

CPU_BSEL1 5

R450 1_0402_5%

R459 2.2_0402_5%

R451 475_0402_1%

D

L24
KC FBM-L11-201209-221LMAT_0805

1 2

1

C507
10P_0402_50V8J

2

U5

21

VDDPCIEX_0

28

VDDPCIEX_1

34

VDDPCIEX_2

1

VDDPCI_0

7

VDDPCI_1

42

VDDCPU

48

VDDREF

15mil

11

VDD48

15mil

50

X1

49

X2

12

FS_A/USB_48MHz

53

REF1/FSLC/TEST_SEL

16

FSLB/TEST_MODE

5

PCICLK5

4

PCICLK4

3

PCICLK3

56

PCICLK2/REQ_SEL

9

SELPCIEX_LCDCLK#/PCICLK_F1

8

ITP_EN/PCICLK_F0

46

SCLK

47

SDATA

39

IREF

15mil

13

GND_0

29

GND_1

2

GND_2

45

GND_3

51

GND_4

6

GND_5

ICS954226AGT_TSSOP56

+3VS

Change to 0 ohm

VDDA

GNDA

PCI/SRC_STOP#

CPU_STOP#

CPUCLKT1
CPUCLKC1

CPUCLKT0
CPUCLKC0

CPUCLKT2_ITP/PCIEXT6

CPUCLKC2_ITP/PCIEXC6

PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5

PCIEXT4

PCIEXC4

SATACLKT
SATACLKC

PCIEXT3

PCIEXC3

PCIEXT2

PCIEXC2

PCIEXT1

PCIEXC1

LCDCLK_SS/PCIEX0T

LCDCLK_SS/PCIEX0C

DOTT_96MHz
DOTC_96MHz

VTT_PWRGD#/PD

REF0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/07/29 2006/07/29

E

1

C516

2.2U_0805_16V4Z

2

1

37
38

55
54

41
40

44
43

36
35

33
32

31
30

26
27

24
25

22
23

19
20

17
18

14
15

10
52

2

PM_STP_PCI#
PM_STP_CPU#

CLK_CPU1
CLK_CPU1#

CLK_CPU0
CLK_CPU0#

CLK_SRC6
CLK_SRC6#

CLK_SRC5
CLK_SRC5#

CLK_SRC4
CLK_SRC4#

CLK_SRC3
CLK_SRC3#

CLK_SRC1
CLK_SRC1#

CLK_SRC0
CLK_SRC0#

CLK_DOT
CLK_DOT#

CLK_REF CLK_14M_SIO

1

C505
1000P_0402_50V7K

2

+CLK_VCCA

40mil

C517

2.2U_0805_16V4Z

R74 33_0402_5%

1 2

R75 33_0402_5%

1 2

R80 33_0402_5%

1 2

R81 33_0402_5%

1 2

R76 33_0402_5%

1 2

R77 33_0402_5%

1 2

R443 0_0402_5%

R78 33_0402_5%

1 2

R79 33_0402_5%

1 2

R117 33_0402_5%

1 2

R113 33_0402_5%

1 2

R137 33_0402_5%

1 2

R126 33_0402_5%

1 2

R134 33_0402_5%

1 2

R135 33_0402_5%

1 2

R128 33_0402_5%

1 2

R129 33_0402_5%

1 2

R132 33_0402_5%

1 2

R133 33_0402_5%

1 2

1 2

R88 12_0402_5%

1 2

R87 12_0402_5%

Compal Secret Data

Deciphered Date

E

12

1 2

R455

2.2_0402_5%

1

C509

2

10P_0402_50V8J

PM_STP_PCI# 19

PM_STP_CPU# 19,48

CLK_ICH_14M

F

G

+CLK_VDD1

40mil

1

C555
10P_0402_50V8J

2

+CLK_VDD1

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_PCIE_VGA CLK_PCIE_VGA#
CLK_PCIE_VGA#

CLK_PCIE_CARD1
CLK_PCIE_CARD1#

CLK_PCIE_SATA
CLK_PCIE_SATA#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_DREF_SSC
CLK_DREF_SSC#

CLK_DREF_96M
CLK_DREF_96M#

1 2

+3VS

R140 10K_0402_5%

VTT_POWERGD#

CLK_14M_SIO 30

CLK_ICH_14M 19

F

1

C554
1000P_0402_50V7K

2

L23

KC FBM-L11-201209-221LMAT_0805

1 2

+3VS

Change to 0 ohm

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15

PCIEC_CLKREQ1# 24

CLK_PCIE_CARD1 24
CLK_PCIE_CARD1# 24

CLK_PCIE_SATA 18
CLK_PCIE_SATA# 18

CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8

CLK_PCIE_ICH 19
CLK_PCIE_ICH# 19

CLK_DREF_SSC 6
CLK_DREF_SSC# 6

CLK_DREF_96M 6
CLK_DREF_96M# 6

Title

Size Document Number Rev

Date: Sheet

B

1

C506
10P_0402_50V8J

2

1

C522

2

2.2U_0805_16V4Z

2

1 3

D

G

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_PCIE_VGA

CLK_PCIE_CARD1
CLK_PCIE_CARD1#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_96M#

S

Q11
2N7002_SOT23

1

2

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781
401353

星期日

01, 2006

一月

G

H

Clock Generator

40mil

C552
10P_0402_50V8J

VGATE 6,19,48

+CLK_VDD2

1

C547

2

0.047U_0402_16V4Z

1 2

R59 49.9_0402_1%

1 2

R60 49.9_0402_1%

1 2

R64 49.9_0402_1%

1 2

R65 49.9_0402_1%

1 2

R57 49.9_0402_1%

1 2

R58 49.9_0402_1%

1 2

R61 49.9_0402_1%

1 2

R62 49.9_0402_1%

1 2

R118 49.9_0402_1%

1 2

R112 49.9_0402_1%

1 2

R138 49.9_0402_1%

1 2

R125 49.9_0402_1%

1 2

R150 49.9_0402_1%

1 2

R144 49.9_0402_1%

1 2

R142 49.9_0402_1%

1 2

R143 49.9_0402_1%

1 2

R147 49.9_0402_1%

1 2

R148 49.9_0402_1%

13 50,

of

H

B

A

B

C

D

E

CRT Connector

1 1

R335 0_0402_5%PM@

VGA_CRT_R15
GMCH_CRT_R8

VGA_CRT_G15
GMCH_CRT_G8

VGA_CRT_B15
GMCH_CRT_B8

2 2

1 2
1 2

R334 0_0402_5%GM@
R339 0_0402_5%PM@

1 2
1 2

R338 0_0402_5%GM@
R337 0_0402_5%PM@

1 2
1 2

R336 0_0402_5%GM@

VGA_CRT_HSYNC15
GMCH_CRT_HSYNC8

150_0402_5%

1 2

R342 0_0402_5%PM@

1 2

R343 39_0402_5%GM@

VGA_CRT_VSYNC15
GMCH_CRT_VSYNC8

12

R331

C377 0.1U_0402_16V4Z

12

R333

150_0402_5%

1 2

CRT_HSYNC CRT_HSYNC_B

1 2

R13 0_0402_5%PM@

1 2

R8 39_0402_5%GM@

CRT_R CRT_R_L

CRT_G

CRT_B

12

R332

150_0402_5%

1

C372

3.3P_0402_50V8CPM@

2

3.3P_0402_50V8CPM@

+CRT_VCC

1

5

P

4

OE#

A2Y

G

U32

SN74AHCT1G125GW_SOT353-5

3

1 2

C11 0.1U_0402_16V4Z

CRT_VSYNC CRT_VSYNC_B

1

C370

2

+CRT_VCC

3.3P_0402_50V8CPM@

R19 10K_0402_5%

1

5

P

4

OE#

A2Y

G

U1
SN74AHCT1G125GW_SOT353-5

3

+CRT_PULLUP

1 2

L19

FCM2012C-800_0805

1 2

L21

FCM2012C-800_0805

1 2

L20

FCM2012C-800_0805

1

C371

2

10P for GM

12

CRT_G_L

CRT_B_L

3.3P_0402_50V8CPM@

D2

DAN217_SC59@

1

C3

2

TV-OUT Conn.

D17

C382

DAN217_SC59@

2

1

2

82P_0402_50V8JPM@

3 3

+CRT_PULLUP

VGA_TV_LUMA15
GMCH_TV_LUMA8
VGA_TV_CRMA15
GMCH_TV_CRMA8
VGA_TV_COMPS15
GMCH_TV_COMPS8

4 4

1 2

R14 0_0402_5%PM@

1 2

R20 0_0402_5%GM@

1 2

R17 0_0402_5%PM@

1 2

R21 0_0402_5%GM@

1 2

R18 0_0402_5%PM@

1 2

R22 0_0402_5%GM@

12

R12

150_0402_5%

150_0402_5%

12

12

R11

150_0402_5%

TV_LUMA

TV_CRMA

TV_COMPS

R10

C12
82P_0402_50V8JPM@

1 2

L4 FCM1608C-121T_0603

1 2

L3 FCM1608C-121T_0603

1 2

L2 FCM1608C-121T_0603

1

1

C13

2

82P_0402_50V8JPM@

1

C14

82P_0402_50V8JPM@

2

2

D19

1

DAN217_SC59@

1

3

C383
82P_0402_50V8JPM@

2

1

2

D18

DAN217_SC59@

1

2

1

2

82P_0402_50V8JPM@

3

TV_CRMA_L
TV_COMPS_L

TV_LUMA_L

3

C384

D3

DAN217_SC59@

1

2

3

C2

3.3P_0402_50V8CPM@

1 2

L18 FCM1608C-121T_0603

1 2

L1 FCM1608C-121T_0603

1

2

3

1

2

10P_0402_50V8J

4.7K_0402_5%

DSUB_12

DSUB_15

JP19

3
6
7
5
2
4
1
8
9

SUYIN_030107FR007SX08FU

5.6P for GM

1

2

3.3P_0402_50V8CPM@

C369

+CRT_VCC

R1

1

2

3

C8

CRT_HSYNC_L

CRT_VSYNC_L

1

2

12

4.7K_0402_5%

D4

DAN217_SC59@

12

R2

+5VS

RB411D_SOT23

1

C5
10P_0402_50V8J

2

+CRT_PULLUP

2

G

1 3

D

Q19
BSS138_SOT23

Q1

BSS138_SOT23

D20

2 1

DDC_MD2

1

C6

2

100P_0402_50V8J

68P_0402_50V8J

S

2

G

1 3

D

S

W=40mils

F1

POLYSWITCH_1A

C4

R340 0_0603_5%PM@

R341 0_0603_5%GM@

R15 0_0402_5%GM@

1 2

1 2

R3

C368

0.1U_0402_16V4Z

1

2

1 2

1 2

12

12

0_0402_5%GM@

1

2

1

C7
68P_0402_50V8J

2

R16
0_0402_5%PM@

R9
0_0402_5%PM@

+CRT_VCC+R_CRT_VCC

W=40mils

JP17

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_070549FR015S208CR

DSUB_12

DSUB_15

+3VS

+2.5VS

GMCH_CRT_DATA 8

VGA_DDC_DATA 15

VGA_DDC_CLK 15

GMCH_CRT_CLK 8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

星期日

01, 2006

一月

B

14 50,

E

of

5

4

3

2

1

LCD POWER CIRCUIT

2

+3VS

G

4.7U_0805_10V4ZGM@

W=60mils

S

Q26

D

1 3

1

C399

2

D28
RB751V_SOD323

21

SI2301BDS_SOT23GM@

1

4.7U_0805_10V4ZGM@

2

+LCDVDD

1

2

C406

AOS 3413

W=60mils

C400

0.1U_0402_16V4Z

GM@

+3VS

12

R491

4.7K_0402_5%

VGA_TV_LUMA14
VGA_TV_CRMA14
VGA_TV_COMPS14

VGA_CRT_R14
VGA_CRT_G14
VGA_CRT_B14

VGA_CRT_VSYNC14
VGA_CRT_HSYNC14

DVI_DETECT16
VGA_DVI_SCLK16
VGA_DVI_SDATA16

+LCDVDD

D D

300_0603_5%GM@

2N7002_SOT23GM@

GMCH_ENVDD8

C C

R371

Q24

12

13

D

S

R374

10K_0402_5%GM@

+3VALW

12

R373
100K_0402_5%

GM@

2

G

2

G

12

R375 1K_0402_5%GM@

13

D

Q23

BSS138_SOT23GM@

S

BKOFF#32

12

1

C417

0.047U_0402_16V4ZGM@

2

BKOFF# DISPOFF#

LCD Conn.

INVPWR_B+

+3VS +LCDVDD

5

GMCH_LCD_CLK
GMCH_LCD_DATA

GMCH_TZOUT0-

GMCH_TZOUT1+
GMCH_TZOUT1-

GMCH_TZOUT2+
GMCH_TZOUT2-

GMCH_TZCLK­GMCH_TZCLK+

12

12

GMCH_LCD_CLK8

B B

A A

GMCH_LCD_DATA8

GMCH_TZOUT0-8
GMCH_TZOUT0+8

GMCH_TZOUT1+8
GMCH_TZOUT1-8

GMCH_TZOUT2+8
GMCH_TZOUT2-8

GMCH_TZCLK-8
GMCH_TZCLK+8

L6

KC FBM-L11-201209-221LMAT_0805

GM@

L5

KC FBM-L11-201209-221LMAT_0805

GM@

1

C34

68P_0402_50V8JGM@

2

JP4

1

21

2

22

3

23

4

24

5

25

6

26

7

27

8

28

9

29

10

30

11

31

12

32

13

33

14

34

15

35

16

36

17

37

18

38

19

39

20

40

ACES_88107-4000GGM@

+3VSINVPWR_B+

B+

1

C32

0.1U_0402_16V4ZGM@

2

DAC_BRIG
INVT_PWM
DISPOFF#

GMCH_TXOUT0­GMCH_TXOUT0+GMCH_TZOUT0+

GMCH_TXOUT1­GMCH_TXOUT1+

GMCH_TXOUT2+
GMCH_TXOUT2-

GMCH_TXCLK­GMCH_TXCLK+

+LCDVDD

1

C411

2

10U_0805_10V4ZGM@

4

DAC_BRIG 32
INVT_PWM 32

GMCH_TXOUT0- 8
GMCH_TXOUT0+ 8

GMCH_TXOUT1- 8
GMCH_TXOUT1+ 8

GMCH_TXOUT2+ 8
GMCH_TXOUT2- 8

GMCH_TXCLK- 8
GMCH_TXCLK+ 8

1

C412

0.1U_0402_16V4ZGM@

2

CLK_PCIE_VGA13
CLK_PCIE_VGA#13

VGA_DDC_CLK14
VGA_DDC_DATA14

EC_SMB_CK132,33,44

+1.5VS

EC_SMB_DA132,33,44

+2.5VS

1

C592

0.1U_0402_16V4ZPM@

2

1

C601

2

0.1U_0402_16V4ZPM@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

3

PCIE_GTX_C_MRX_N[0..15]8
PCIE_GTX_C_MRX_P[0..15]8

PCIE_MTX_C_GRX_N[0..15]8
PCIE_MTX_C_GRX_P[0..15]8

VGA_TV_LUMA
VGA_TV_CRMA
VGA_TV_COMPS

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

VGA_CRT_VSYNC
VGA_CRT_HSYNC

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

VGA_DDC_CLK
VGA_DDC_DATA

+1.8VS

C611

1

2

0.1U_0402_16V4ZPM@

Compal Secret Data

Deciphered Date

VGA BOARD Conn.

PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]

JP29

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

81

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97

99

99

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

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119

121

121

123

123

125

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127

127

129

129

131

131

133

133

135

135

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139

139

141

141

143

143

145

145

147

147

149

149

151

151

153

153

155

155

157

157

159

159

ACES_88394-1G71PM@

2

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

62

64

64

66

66

68

68

70

70

72

72

74

74

76

76

78

78

80

80

82

82

84

84

86

86

88

88

90

90

92

92

94

94

96

96

98

98

100

100

102

102

104

104

106

106

108

108

110

110

112

112

114

114

116

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118

118

120

120

122

122

124

124

126

126

128

128

130

130

132

132

134

134

136

136

138

138

140

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142

142

144

144

146

146

148

148

150

150

152

152

154

154

156

156

158

158

160

160

Title

Size Document Number Rev

B

Date: Sheet

B+

PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0

PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1

PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2

PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3

PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4

PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5

PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6

PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7

PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8

PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9

PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10

PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11

PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12

PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13

PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14

PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15

DAC_BRIG
DISPOFF#
INVT_PWM

SUSP#
ENBKL

+1.8VS

1

C605

0.1U_0402_16V4ZPM@

2

0.1U_0402_16V4ZPM@

Compal Electronics, Inc.

SCHEMATIC, M/B LA-2781

401353

星期日

01, 2006

一月

VGA_DVI_TXC+ 16
VGA_DVI_TXC- 16
VGA_DVI_TXD0+ 16
VGA_DVI_TXD0- 16
VGA_DVI_TXD1+ 16
VGA_DVI_TXD1- 16
VGA_DVI_TXD2+ 16
VGA_DVI_TXD2- 16

PLTRST_VGA# 16,19

SUSP# 24,32,33,40

ENBKL 8,32

+3VS

1

C595

2

1

0.1U_0402_16V4ZPM@

2

1

C587

15 50,

+5VALW

B

of