Acer Aspire 8730, Aspire 8730Z Schematics

5

Big Bear 2 Block Diagram

D D

CLK GEN.

RTM875N-606-VD

3

DDR2 DIMM1

667/800 MHz

667/800MHz

12

DDR2 DIMM2

667/800 MHz

C C

INT.MIC

35

Line In

35

MIC In

35

B B

INT.SPKR

35

Line Out (SPDIF)

RJ11

A A

5

667/800MHz

13

Codec

ALC888S VC

33

OP AMP

G1431Q

34

OP AMP G1412

34

MODEM

MDC Card

BIOS/DASH 2Mb

25

37

AZALIA

SPI

1st HDD SATA 2nd HDD SATA

ODD SATA

Mobile CPU

Penryn

HOST BUS 667/800/1067MHz@1.05V

Cantiga

AGTL+ CPU I/F DDR Memory I/F

INTEGRATED GRAHPICS

LVDS, CRT I/F

X4 DMI 400MHz

ICH9M

6 PCIe ports

PCI/PCI BRIDGE

ACPI 2.0 4 SATA

12 USB 2.0/1.1 ports

ETHERNET (10/100/1000MbE)

High Definition Audio

LPC I/F

Serial Peripheral I/F

Matrix Storage Technology(DO)

Active Managemnet Technology(DO)

Blue Tooth (USB)

SATA

24

SATA

24

4

4, 5

6,7,8,9,10,11

C-Link0

19,20,21,22

USB

25

4

THERMAL EMC2102

23

PCIex16

PCIex1

LPC BUS

Camera (USB)

USB 4 Port

15

26

Giga LAN

BCM5764MKMLG

New card

KBC

WPC775

Touch Pad

36 36

Finger Printer

CardReader Realtek RTS5158E

CRT

LCD

HDMI

MXM CONN

28

31

36

INT. KB

3

17

15

18

TXFM RJ45

29 29

PWR SW G577BR91U

Mini Card

a/b/g/n

Kedron

Mini Card

a/b/g/n

Kedron

BIOS

MX25L16 W25X16 16M Bits

37

Launch Buttom

14

CIR

36

MS/MS Pro/xD /MMC/SD

5 in 1

27

3

30

LPC

DEBUG CONN

2

Project code: 91.4AV01.001 PCB P/N : 48.4AV01. REVISION : -1

1

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

OUTPUTS

5V_S5 3D3V_S5

43

PCB STACKUP

TOP

VCC

S

GND

BOTTOM

32

31

32

SYSTEM DC/DC

TPS51124

INPUTS OUTPUTS

DCBATOUT

RT9026

1D8V_S3

RT9018A

1D8V_S3 1D5V_S0

G9131

3D3V_S0 2D5V_S0

GFXCORE DC/DC

ISL6263 INPUTS

DCBATOUT

1D05V_S0 1D8V_S3

DDR_VREF_S0

DDR_VREF_S3

OUTPUTS

VGFXCORE

0.7~1.25V

45

44

46

CPU DC/DC

ISL6266A

CHARGER

BQ24745

DCBATOUT

150Wednesday, October 22, 2008

OUTPUTS VCC_CORE_S0

INPUTS

37

UMA

27

Title

BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

2

Date: Sheet

DCBATOUT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Big Bear 2

1

0.35~1.5V

OUTPUTSINPUTS BT+

DCBATOUT

of

42

47

-1

http://hobi-elektronika.net

A

ICH9M Functional Strap Definitions

Signal

HDA_SDOUT

HDA_SYNC

4 4

GNT2#/ GPIO53

GPIO20 GNT1#/

GPIO51

GNT3#/ GPIO55

GNT0#: SPI_CS1#/ GPIO58

SPI_MOSI

3 3

GPIO49

SATALED#

SPKR

TP3

GPIO33/ HDA_DOCK _EN#

Usage/When Sampled

XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK

PCIE config1 bit0, Rising Edge of PWROK.

PCIE config2 bit2, Rising Edge of PWROK.

Reserved ESI Strap (Server Only)

Rising Edge of PWROK

Top-Block Swap Override. Rising Edge of PWROK.

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK.

Integrated TPM Enable, Rising Edge of CLPWROK

DMI Termination Voltage, Rising Edge of PWROK.

PCI Express Lane Reversal. Rising Edge of PWROK.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h). This signal has weak internal pull-down

This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h)

This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) This signal should not be pulled high.

ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

The signal is required to be low for desktop applications and required to be high for mobile applications.

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.

This signal should not be pull low unless using XOR Chain testing.

Sampled low:the Flash Descriptor Security will be overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister.

ICH9 EDS 642879 Rev.1.5

Comment

2 2

USB Table

USB

PCIE Routing

LANE1 LANE2 LANE3 LANE4 LANE5 LANE6

1 1

LAN MARVELL 88E8071 MiniCard WLAN MiniCard WWAN/TV JMB385 Card Reader NewCard

NC

Pair

Device

0

USB1

1

USB4 USB2

2 3

USB5(DOCK)

4

USB3

5

Bluetooth

6

FP

7

MINIC1

8

WEBCAM

9 NEW1

MINIC2

10 11

NC

B

page 92

SMBus

KBC

ICH9M

C

ICH9M Integrated Pull-up and Pull-down Resistors

SIGNAL Resistor Type/Value

CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 ENERGY_DETECT HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GLAN_DOCK#

GNT[3:0]#/GPIO[55,53,51]

GPIO[20] GPIO[49] LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]

Media Board

SMBC_Therm SMBD_Therm

BAT_SCL BAT_SDA

Thermal

BATTERY

CHARGER

SO-DIMM

SMBC_ICH

9LPRS365BKLFT

http://hobi-elektronika.net

The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller

MXM

DDR

ICH9 EDS 642879 Rev.1.5

PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K

PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K

Cantiga chipset and ICH9M I/O controller Hub strapping configuration

D

Montevina Platform Design guide 22339 0.5

Pin Name

CFG[2:0]

CFG[4:3] CFG8 CFG[15:14] CFG[18:17]

CFG5 CFG6

CFG7

CFG9

CFG10 PCIE Loopback enable

CFG[13:12]

CFG16

CFG19

CFG20

SDVO_CTRLDATA

L_DDC_DATA

NOTE:

1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

Strap Description

FSB Frequency Select

Reserved

DMI x2 Select iTPM Host

Interface

Intel Management engine Crypto strap

PCIE Graphics Lane

XOR/ALL

FSB Dynamic ODT

DMI Lane Reversal

Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe

SDVO Present

Local Flat Panel (LFP) Present

UMA

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Configuration

000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

0 = DMI x2

1 = DMI x4

0= The iTPM Host Interface is enabled(Note2)

1=The iTPM Host Interface is disalbed(default)

0 = Transport Layer Security (TLS) cipher suite with no confidentiality

1 = TLS cipher suite with confidentiality (default)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane Numbered in order

0 = Enable (Note 3)

1= Disabled (default)

00 = Reserve 10 = XOR mode Enabled 01 = ALLZ mode Enabled (Note 3)

11 = Disabled (default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled 0 = Normal operation(Default):

Lane Numbered in Order

1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1)

0 = Only Digital Display Port or PCIE is operational (Default)

1 =Digital display Port and PCIe are operting simulataneously via the PEG port

0 =No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabled

Reference

Big Bear 2

E

page 218

(Default)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

250Wednesday, October 22, 2008

-1

A

R216

1 2

Do Not Stuff

CLK48_ICH

EMI

4 4

CL=20pF±0.2pF

3 3

3D3V_S0

CPU_SEL24,7

CLK48_CR

EMI

SATACLKREQ#20 CLK_MCH_OE#7 LAN_CLKREQ#28 MXM_CLKREQ#30

SC

82.30005.891

82.30005.951

SC

12

EC44

EC44 Do Not Stuff

Do Not Stuff

DY

C328

C328 SC33P50V2JN-3GP

SC33P50V2JN-3GP

1 2

12

C324

1 2

SC33P50V2JN-3GP

RN49

8 7 6

SRN10KJ-6-GP

12

EC43

EC43 Do Not Stuff

Do Not Stuff

DY

3D3V_48MPWR_S0

DY

1 2 3 4 5

GEN_XTAL_IN

X3

X3 X-14D31818M-35GP

X-14D31818M-35GP

GEN_XTAL_OUT_R

PCLKCLK2

1

PCLKCLK4

2

PCLKCLK5

3

CPU_SEL2_R

45

12

C309

Do Not Stuff

RN50

8 7 6

SRN470J-3-GP

R226

1 2

CLK_ICH1420

CPU_SEL14,7

12

C316

SC1U16V3ZY-GP

PCLKCLK0 PCLKCLK1 CR#_H CR#_G

Do Not Stuff

CLK48_CR27 CLK48_ICH20

CPU_SEL04,7

3D3V_S0

PCLK_FWH37 PCLK_KBC36 PCLK_ICH20

R228 Do Not Stuff

EMI

2 2

ICS9LPRS365BKLFT setting table

PIN NAME DESCRIPTION

Byte 5, bit 7 0 = PCI0 enabled (default)

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME PCI3

1 1

PCI4/27M_SEL PCI_F5/ITP_EN

SRCT3/CR#_C

1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair

Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed

3.3V PCI clock output

0 = Pin24 as SRC-1, Pin25 as SRC-1#, Pin20 as DOT96, Pin21 as DOT96# 1 = Pin24 as 27MHz, Pin25 as 27MHz_SS, Pin20 as SRC-0, Pin21 as SRC-0#

0 =SRC8/SRC8# 1 = ITP/ITP#

Byte 5, bit 3 0 = SRC3 enabled (default) 1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit 2 0 = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pair

A

B

3D3V_S0

45

678

DY

CLK_PWRGD

DY

123

RN51

RN51 SRN10KJ-6-GP

SRN10KJ-6-GP

GEN_XTAL_OUT

RN46 SRN33J-5-GP-URN46 SRN33J-5-GP-U

2 3 1

R221 2K2R2J-2-GPR221 2K2R2J-2-GP

PM_STPPCI#20

PM_STPCPU#20

CLK_PWRGD20

12

1 2 3 4 5

SRN33J-7-GP

12

B

12

C312

SMBC_ICH12,13,22 SMBD_ICH12,13,22

RN48

EC111

EC111 Do Not Stuff

Do Not Stuff

DY

12

Do Not Stuff

4

12

8 7 6

C

1D05V_CLKPLL_S0

12

C322

C314

SCD1U16V2ZY-2GP

PCLKCLK0 PCLKCLK1 PCLKCLK2 PCLKCLK3 PCLKCLK4 PCLKCLK5

CPU_SEL2_R

12

C329

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP

3D3V_48MPWR_S0

U13

3 2

CLK48

17

45 44

7 6

63

8 10 11 12 13 14

64

5 55

ICS9LPRS365BKLFT-GP-U

71.09365.A03

71.00875.C03

71.00875.C03 RTM875N-606-VD-GRT-GP

RTM875N-606-VD-GRT-GP

12

X1 X2

USB_48MHZ/FSLA

PCI_STOP# CPU_STOP#

SCLK SDATA

CK_PWRGD/PD#

PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN

FSLB/TEST_MODE REF0/FSLC/TEST_SEL

NC#55

C318

C330

SCD1U16V2ZY-2GP

4

VDDREF

GND48

18

PIN NAME DESCRIPTION

Byte 5, bit 1 0 = SRC3 enabled (default)

SRCC3/CR#_D

SRCC7/CR#_E

SRCT7/CR#_F

SRCC11/CR#_G

SRCT11/CR#_H

http://hobi-elektronika.net

1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair

Byte 6, bit 7 0 = SRC7# enabled (default) 1= CR#_F controls SRC6

Byte 6, bit 6 0 = SRC7 enabled (default) 1= CR#_F controls SRC8

Byte 6, bit 5 0 = SRC11# enabled (default) 1= CR#_G controls SRC9

Byte 6, bit 4 0 = SRC11 enabled (default) 1= CR#_H controls SRC10

C

R218

Do Not Stuff

12

C310

SCD1U16V2ZY-2GP

3D3V_CLKGEN_S0

46

62

16

9

23

VDD48

VDDPCI

VDDSRC

VDDCPU

VDDPLL3

GNDREF

GNDPCI

GND

GNDSRC

1

15

22

30

36

12

19

27

VDD96_IO

GNDSRC

GNDCPU

26

49

59

Do Not Stuff

DY

1D05V_CLKPLL_S0

43

52

VDDSRC_IO

VDDPLL3_IO

GND

12

C306

33

56

VDDSRC_IO

VDDCPU_IO

27MHZ_NONSS/SRCT1/SE1

27MHZ_SS/SRCC1/SE2

GND

65

12

C325

CPUT0 CPUC0

CPUT1_F CPUC1_F

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F

SRCC7/CR#_E

SRCT6 SRCC6

SRCT10 SRCC10

SRCT11/CR#_H

SRCC11/CR#_G

SRCT9 SRCC9

SRCT4 SRCC4

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

SRCT0/DOTT_96

SRCC0/DOTC_96

SC4D7U10V5ZY-3GP

61 60

58 57

54 53

51 50

48 47

41 42

40 39

37 38

34 35

31 32

28 29

DREFSSCLK_1

24

DREFSSCLK#_1

25

DREFCLK_1

20

DREFCLK#_1

21

D

12

C311

SCD1U16V2ZY-2GP

CR#_H CR#_G

D

E

3D3V_S03D3V_S0 1D05V_S0

R227

Do Not Stuff

12

C331

SCD1U16V2ZY-2GP

DREFSSCLK 7 DREFSSCLK# 7

DREFCLK 7 DREFCLK# 7

1 01

12

DY

WirelessLAN

CPU

100M 133M 166M 200M

12

C321

SCD1U16V2ZY-2GP

UMA

2 3 1

UMA

3D3V_CLKGEN_S0

12

C323

SCD1U16V2ZY-2GP

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6

CLK_PCIE_ICH 20 CLK_PCIE_ICH# 20

CLK_PCIE_NEW 31 CLK_PCIE_NEW# 31

CLK_PCIE_MINI1 32 CLK_PCIE_MINI1# 32

CLK_PCIE_LAN 28 CLK_PCIE_LAN# 28

CLK_PCIE_PEG 30 CLK_PCIE_PEG# 30

CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7

CLK_PCIE_MINI2 32 CLK_PCIE_MINI2# 32

CLK_PCIE_SATA 19 CLK_PCIE_SATA# 19

RN44

RN44 SRN0J-6-GP

SRN0J-6-GP

4

RN45

RN45 SRN0J-6-GP

SRN0J-6-GP

4

SEL2 FSC

SEL1 FSB

1 0

01

01 01 0

SEL0 FSA

00 0

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock Generator

Size Document Number Rev

Date: Sheet of

Big Bear 2

E

350Wednesday, October 22, 2008

12

C301

Do Not Stuff

CPU NB SB DMI

New Card

LAN

MXM NB CLK TV

SB SATA

NB CLK NB CLK

(96 MHz)

FSB

X 533M 667M 800M

1066M266M

-1

A

B

C

D

E

H_A#[35..3]6

4 4

H_ADSTB#06 H_REQ#[4..0]6

3 3

Side Band Non GTL

H_ADSTB#16

H_A20M#19

H_FERR#19

H_IGNNE#19

H_STPCLK#19

H_INTR19 H_NMI19 H_SMI#19

2 2

XDP_TDI XDP_TMS XDP_BPM#5

H_CPURST#

XDP_TCK

1 1

XDP_TRST#

H_A#[35..3]

CPU1A

H_A#3

J4 L5 L4

K5

M3

N2

J1 N3 P5 P2

L2 P4 P1 R1

M1

K3 H2 K2

J3

L1 Y2

U5 R3

W6

U4 Y5 U1 R4 T5 T3

W2 W5

Y4 U2 V4

W3 AA4 AB2 AA3

V1 A6

A5 C4

D5 C6 B4 A3

M4

N5 T2 V3 B2 C3 D2

D22

D3 F6

B1

RN3

SRN56J-5-GP

1 2

DY

RN2

SRN56J-4-GP

A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0#

REQ0# REQ1# REQ2# REQ3# REQ4#

A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6

KEY_NC

BGA479-SKT6-GPU7

62.10079.001

62.10053.401

8 7 6

4

H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 CPU_PROCHOT#

1 2 3 4 5

R71 Do Not Stuff

1 2 3

All place within 2" to CPU

A

1 OF 4

ADDR GROUP 0

ADDR GROUP 1

ICH

RESERVED

1D05V_S0

DEFER#

DRDY#

DBSY#

IERR#

LOCK#

RESET#

TRDY#

HITM#

BPM0# BPM1# BPM2#

BPM3# PRDY# PREQ#

TRST#

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL THERMAL

THERMAL

PROCHOT#

THRMDA THRMDC

THERMTRIP#

HCLK

BCLK0

BCLK1

ADS# BNR# BPRI#

BR0#

INIT#

RS0#

RS1#

RS2#

HIT#

TCK

TDI TDO TMS

DBR#

H1 E2 G5

H5 F21 E1

F1 D20

B3 H4 C1

F3 F4 G3 G2

G6 E4

XDP_BPM#0

AD4

XDP_BPM#1

AD3

XDP_BPM#2

AD1

XDP_BPM#3

AC4

XDP_BPM#4

AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

XDP_TDO

AB3

XDP_TMS

AB5

XDP_TRST#

AB6

XDP_DBRESET#

C20

D21 A24 B25

C7

A22 A21

TP274 Do Not StuffTP274 Do Not Stuff

H_IERR#

H_RS#0 H_RS#1 H_RS#2

PM_THRMTRIP# should connect to ICH9 and MCH without T-ing

( No stub)

B

H_ADS# 6 H_BNR# 6

H_BPRI# 6

H_DEFER# 6 H_DRDY# 6 H_DBSY# 6

H_BREQ#0 6

H_INIT# 19 H_LOCK# 6

H_CPURST# 6,39

H_TRDY# 6 H_HIT# 6

H_HITM# 6

H_THERMDA 23 H_THERMDC 23

PM_THRMTRIP-A# 7,19,40

CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3

H_RS#[2..0] 6

TP272 Do Not StuffTP272 Do Not Stuff TP18 Do Not StuffTP18 Do Not Stuff TP21 Do Not StuffTP21 Do Not Stuff TP19 Do Not StuffTP19 Do Not Stuff TP20 Do Not StuffTP20 Do Not Stuff TP22 Do Not StuffTP22 Do Not Stuff TP17 Do Not StuffTP17 Do Not Stuff TP273 Do Not StuffTP273 Do Not Stuff TP23 Do Not StuffTP23 Do Not Stuff TP24 Do Not StuffTP24 Do Not Stuff TP271 Do Not StuffTP271 Do Not Stuff TP29 Do Not StuffTP29 Do Not Stuff

Place testpoint on H_IERR# with a GND

0.1" away

1D05V_S0

TP27 Do Not StuffTP27 Do Not Stuff

DY

1 2

Do Not Stuff

R73

Layout Note: "CPU_GTLREF0"

0.5" max length.

H_THERMDA

H_THERMDC

R64

1KR2F-3-GP

R63

2KR2F-3-GP

1D05V_S0

4

RN8

SRN56J-4-GP

1

2 3

12

C74

DY

Do Not Stuff

CPU_PROCHOT#_R 42

1 2 12

CPU_GTLREF0

12

DY

C48

Follow Demo Circuit

DY

12

DY

1 2

DY

1 2

DY

TEST1

TEST2

TEST4

Do Not Stuff

C

3D3V_S0

1D05V_S0

1 2

R75 Do Not Stuff

1 2

R72 Do Not Stuff

C43 Do Not Stuff

XDP_DBRESET#

XDP_TDO

R74

R65

http://hobi-elektronika.net

H_DINV#[3..0] H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0]

H_IERR#CPU_PROCHOT#

H_DSTBN#06 H_DSTBP#06 H_DINV#06

H_DSTBN#16 H_DSTBP#16 H_DINV#16

Do Not Stuff

CPU_SEL03,7 CPU_SEL13,7 CPU_SEL23,7

Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals

TP28Do Not StuffTP28Do Not Stuff TP144Do Not StuffTP144Do Not Stuff

TP148Do Not StuffTP148Do Not Stuff

H_DINV#[3..0] 6 H_DSTBN#[3..0] 6 H_DSTBP#[3..0] 6 H_D#[63..0] 6

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8

H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

AD26

TEST1 TEST2 RSVD_CPU_12 TEST4

AF26

RSVD_CPU_13 RSVD_CPU_14

E22 F24 E26 G22 F23 G25 E25 E23 K24 G24

J24

J23 H22 F26 K22 H23

J26 H26 H25

N22 K25 P26 R23

L23 M24

L22 M23 P25 P23 P22 T24 R24

L25 T25 N25

L26 M26 N24

C23 D25 C24

AF1 A26

B22 B23 C21

2 OF 4

CPU1B

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0#

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

BSEL0 BSEL1 BSEL2

BGA479-SKT6-GPU7

62.10079.001

62.10053.401

MISC

D

DATA GRP0 DATA GRP1

DATA GRP2DATA GRP3

DSTBN2# DSTBP2#

DINV2#

DSTBN3# DSTBP3#

DINV3# COMP0

COMP1 COMP2 COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47#

D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#

SLP#

PSI#

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25 Y26 AA26 U22

H_D#48

AE24

H_D#49

AD24

H_D#50

AA21

H_D#51

AB22

H_D#52

AB21

H_D#53

AC26

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AC25

H_D#58

AE21

H_D#59

AD21

H_D#60

AC22

H_D#61

AD23

H_D#62

AF22

H_D#63

AC23 AE25 AF24 AC20

COMP0

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

UMA

Title

Size Document Number Rev

Date: Sheet of

R70 27D4R2F-L1-GPR70 27D4R2F-L1-GP

COMP1

R69 54D9R2F-L1-GPR69 54D9R2F-L1-GP

COMP2

R66 27D4R2F-L1-GPR66 27D4R2F-L1-GP

COMP3

R68 54D9R2F-L1-GPR68 54D9R2F-L1-GP

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

CPU (1 of 2)

H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6

1 2 1 2 1 2 1 2

H_DPRSTP# 7,19,42 H_DPSLP# 19 H_DPWR# 6 H_PWRGD 19,39,40 H_CPUSLP# 6 PSI# 42

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Big Bear 2

450Wednesday, October 22, 2008

E

H_D#32

Y22

-1

A

B

C

D

E

VCC_CORE

G7

1 2

Do Not Stuff

C56

SCD1U10V2KX-4GP

H_VID[6..0] 42

VCC_CORE

12

C53

DY

12

C469

1D05V_S0

12

C61

SCD1U16V2KX-3GP

R60

R60 100R2F-L1-GP-U

100R2F-L1-GP-U

R62

R62 100R2F-L1-GP-U

100R2F-L1-GP-U

12

C45

Do Not Stuff

DY

12

C464

SC10U6D3V5MX-3GP

layout note: "1D5V_VCCA_S0" as short as possible

1D5V_VCCA_S0

Layout Note:

B

12

C68

C71

Do Not Stuff

SC10U6D3V5MX-3GP

C71

Do Not Stuff

DY

SC10U6D3V5MX-3GP

12

C420

C46

SC10U6D3V5MX-3GP

12

C467

1D05V_S0

12

C47

12

C418

SCD01U16V2KX-3GP

VCC_SENSE 42

VSS_SENSE 42

VCCSENSE and VSSSENSE lines should be of equal length.

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

12

C466

C52

SC10U6D3V5MX-3GP

Do Not Stuff

DY

12

C64

C60

SCD1U10V2KX-4GP

SCD1U16V2KX-3GP

L11

1 2

HCB1608KF121T30-GP

68.00230.041

68.00206.021

1D5V_S0

http://hobi-elektronika.net

12

C51

Do Not Stuff

DY

12

C465

Do Not Stuff

DY

12

Do Not Stuff

12

C59

C57

Do Not Stuff

SCD1U16V2KX-3GP

DY

C

DY

12

C62

Do Not Stuff

12

3 4

TC1

TC1 ST900U2D5VM-1-GP

ST900U2D5VM-1-GP

77.E9071.011

NEC

12

C58

Do Not Stuff

DY

A11 A14 A16 A19

TP146

Do Not Stuff

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

A23 AF2

B11 B13 B16 B19 B21 B24

C11 C14 C16 C19

C22 C25

D11 D13 D16 D19 D23 D26

E11 E14 E16 E19 E21 E24

F11 F13 F16 F19

F22 F25

G4

G1 G23 G26

H21 H24

J22 J25

K23 K26

L21 L24

M2

M5 M22 M25

N23 N26

CPU (2 of 2)

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

VCC_CORE

VCCP_1D05

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

12

VCC_CORE

4 4

3 3

AA10 AA12

2 2

1 1

AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

CPU1C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC VCC VCC VCC VCC VCC VCC VCC

AB9

VCC VCC VCC VCC VCC VCC VCC VCC

BGA479-SKT6-GPU7

62.10079.001

62.10053.401

3 OF 4

A

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VCCSENSE

VSSSENSE

CPU1D

A4

VSS

A8

VSS VSS VSS VSS VSS VSS VSS

B6

VSS

B8

VSS VSS VSS VSS VSS VSS VSS

C5

VSS

C8

VSS VSS VSS VSS VSS

C2

VSS VSS VSS

D1

VSS

D4

VSS

D8

VSS VSS VSS VSS VSS VSS VSS

E3

VSS

E6

VSS

E8

VSS VSS VSS VSS VSS VSS VSS

F5

VSS

F8

VSS VSS VSS VSS VSS

F2

VSS VSS VSS VSS VSS VSS VSS

H3

VSS

H6

VSS VSS VSS

J2

VSS

J5

VSS VSS VSS

K1

VSS

K4

VSS VSS VSS

L3

VSS

L6

VSS VSS VSS VSS VSS VSS VSS

N1

VSS

N4

VSS VSS VSS

P3

VSS

BGA479-SKT6-GPU7

62.10079.001

62.10053.401

4 OF 4

P6

VSS

P21

VSS

P24

VSS

R2

VSS

R5

VSS

R22

VSS

R25

VSS

T1

VSS

T4

VSS

T23

VSS

T26

VSS

U3

VSS

U6

VSS

U21

VSS

U24

VSS

V2

VSS

V5

VSS

V22

VSS

V25

VSS

W1

VSS

W4

VSS

W23

VSS

W26

VSS

Y3

VSS

Y6

VSS

Y21

VSS

Y24

VSS

AA2

VSS

AA5

VSS

AA8

VSS

AA11

VSS

AA14

VSS

AA16

VSS

AA19

VSS

AA22

VSS

AA25

VSS

AB1

VSS

AB4

VSS

AB8

VSS

AB11

VSS

AB13

VSS

AB16

VSS

AB19

VSS

AB23

VSS

AB26

VSS

AC3

VSS

AC6

VSS

AC8

VSS

AC11

VSS

AC14

VSS

AC16

VSS

AC19

VSS

AC21

VSS

AC24

VSS

AD2

VSS

AD5

VSS

AD8

VSS

AD11

VSS

AD13

VSS

AD16

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE1

VSS

AE4

VSS

AE8

VSS

AE11

VSS

AE14

VSS

AE16

VSS

AE19

VSS

AE23

VSS

AE26

VSS

A2

VSS

AF6

VSS

AF8

VSS

AF11

VSS

AF13

VSS

AF16

VSS

AF19

VSS

AF21

VSS

A25

VSS

AF25

VSS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Big Bear 2

550Wednesday, October 22, 2008

E

Do Not Stuff

Do Not Stuff TP145

TP145

Do Not Stuff

Do Not Stuff TP147

TP147 TP155

TP155 Do Not Stuff

Do Not Stuff

TP149

TP149 Do Not Stuff

Do Not Stuff

-1

5

D D

H_SWING routing Trace width and Spacing use 10 / 20 mil

H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )

C C

H_RCOMP routing Trace width and Spacing use 10 / 20 mil

H_SWING

12

C115

C115 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

R79

24D9R2F-L-GP

1D05V_S0

12

R80

R80 221R2F-2-GP

221R2F-2-GP

12

R86

R86 100R2F-L1-GP-U

100R2F-L1-GP-U

H_RCOMP

Place them near to the chip ( < 0.5")

B B

H_D#[63..0]4

1D05V_S0

1 2

12

4

R302

R302 1KR2F-3-GP

1KR2F-3-GP

R301

R301 2KR2F-3-GP

2KR2F-3-GP

H_D#[63..0]

SCD1U16V2ZY-2GP

12

C497

3

1 OF 10

NB1A

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_CPURST#4,39

H_CPUSLP#4

H_AVREF

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.D1U

HOST

1 OF 10

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1

H_REQ#_2 H_REQ#_3

H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

2

H_A#[35..3]

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3

H_DPWR# 4 H_DRDY# 4 H_HIT# 4 H_HITM# 4

H_LOCK# 4

H_TRDY# 4

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

1

H_A#[35..3] 4

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

A A

5

4

http://hobi-elektronika.net

3

2

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (1 of 6)

Size Document Number Rev

Big Bear 2

Date: Sheet of

Big Bear 2

1

650Wednesday, October 22, 2008

-1

5

1D8V_S3

12

R133

R133 1KR2F-3-GP

1KR2F-3-GP

SM_RCOMP_VOH

D D

12

R126

R126 3K01R2F-3-GP

3K01R2F-3-GP

R314

R314 1KR2F-3-GP

1KR2F-3-GP

12

C167

SCD01U16V2KX-3GP

12

C522

SCD01U16V2KX-3GP

12

C171

C171 SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SM_RCOMP_VOL

12

C526

C526 SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

layout take note

1D8V_S3

12

R312

R312 80D6R2F-L-GP

80D6R2F-L-GP

M_RCOMPP

M_RCOMPN

12

R310

R310 80D6R2F-L-GP

C C

3D3V_S0

R128

1 2

Do Not Stuff

DY

R121

12

Do Not Stuff

DY

B B

A A

80D6R2F-L-GP

R122

Do Not Stuff

CFG20

CFG9

PWROK20,23 GFXVR_EN 46

Do Not Stuff

DY

PM_SYNC#20

H_DPRSTP#4,19,42

R148

PLT_RST1#20,27,28,30,31,32,36,37

PM_THRMTRIP-A#4,19,40

PM_DPRSLPVR20,42

12

1 2

Do Not Stuff

R87 100R2J-2-GPR87 100R2J-2-GP

Do Not Stuff

CFG6

CPU_SEL03,4 CPU_SEL13,4 CPU_SEL23,4

CFG9

CFG20

PM_SYNC# H_DPRSTP#H_DPRSTP#H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1 PWROK_GD RSTIN# PM_THRMTRIP-A# PM_DPRSLPVR

12

C119

DY

NB1B

M36

RESERVED#M36

N36

RESERVED#N36

R33

RESERVED#R33

T33

RESERVED#T33

AH9

RESERVED#AH9

AH10

RESERVED#AH10

AH12

RESERVED#AH12

AH13

RESERVED#AH13

K12

RESERVED#K12

AL34

RESERVED#AL34

AK34

RESERVED#AK34

AN35

RESERVED#AN35

AM35

RESERVED#AM35

T24

RESERVED#T24

B31

RESERVED#B31

B2

RESERVED#B2

M1

RESERVED#M1

AY21

RESERVED#AY21

BG23

RESERVED#BG23

BF23

RESERVED#BF23

BH18

RESERVED#BH18

BF18

RESERVED#BF18

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC#BG48

BF48

NC#BF48

BD48

NC#BD48

BC48

NC#BC48

BH47

NC#BH47

BG47

NC#BG47

BE47

NC#BE47

BH46

NC#BH46

BF46

NC#BF46

BG45

NC#BG45

BH44

NC#BH44

BH43

NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

4

2 OF 10

AP24

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0

SB_CK#_1 SA_CKE_0

SA_CKE_1 SB_CKE_0

RSVD

SB_CKE_1 SA_CS#_0

SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1

CFG

PM

NC

R158

R158 10KR2J-3-GP

10KR2J-3-GP

DMI_TXN_2 DMI_TXN_3

DMI

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

MEHDA

CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

MISC

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

3D3V_S0

12

CLK_MCH_OE#

M_CLK_DDR0 12

AT21

M_CLK_DDR1 12

AV24

M_CLK_DDR2 13

AU20

M_CLK_DDR3 13

AR24

M_CLK_DDR#0 12

AR21

M_CLK_DDR#1 12

AU24

M_CLK_DDR#2 13

AV20

M_CLK_DDR#3 13

BC28

M_CKE0 12

AY28

M_CKE1 12

AY36

M_CKE2 13

BB36

M_CKE3 13

BA17

M_CS0# 12

AY16

M_CS1# 12

AV16

M_CS2# 13

AR13

M_CS3# 13

BD17

M_ODT0 12

AY17

M_ODT1 12

BF15

M_ODT2 13

AY13

M_ODT3 13

M_RCOMPP

BG22

M_RCOMPN

BH21

SM_RCOMP_VOH

BF28

SM_RCOMP_VOL

BH28 AV42

AR36 BF17 BC36

DDR2 : Leave as NC

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35 AH34

N28 M28 G36 E36 K36 H36

B12

B28 B30 B29 C29 A28

DDR2 : connect to GND

SM_REXT

R91 499R2F-2-GPR91 499R2F-2-GP

1 2

TP_SM_DRAMRST#

DREFCLK DREFCLK# DREFSSCLK DREFSSCLK#

CLK_MCH_3GPLL# 3

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4

GFXVR_EN

CLPWROK_MCH

1 2

MCH_CLVREF

For HDMI port C

DY

R127 Do Not Stuff

12

MCH_TSATN#

HDA_BCLK HDA_RST# HDA_SDI

R134 33R2J-2-GP

HDA_SDO HDA_SYNC

HDA_SYNC HDA_BCLK HDA_SDO HDA_RST#

1D05V_S0

MCH_TSATN#

GFXVR_EN

TP283 Do Not StuffTP283 Do Not Stuff

DREFCLK 3

DREFCLK# 3

DREFSSCLK 3

DREFSSCLK# 3

CLK_MCH_3GPLL 3

DMI_TXN0 20 DMI_TXN1 20 DMI_TXN2 20 DMI_TXN3 20

DMI_TXP0 20 DMI_TXP1 20 DMI_TXP2 20 DMI_TXP3 20

DMI_RXN0 20 DMI_RXN1 20 DMI_RXN2 20 DMI_RXN3 20

DMI_RXP0 20 DMI_RXP1 20 DMI_RXP2 20 DMI_RXP3 20

R144

R144 Do Not Stuff

Do Not Stuff

GMCH_HDMI_CLK 18 GMCH_HDMI_DATA 18

CLK_MCH_OE# 3

MCH_ICH_SYNC# 20

UMA

1 2

RN86

1 2 3 4 5

SRN33J-7-GP

UMA

12

R88

56R2J-4-GP

12

R319

R319 100KR2J-1-GP

100KR2J-1-GP

3

DDR_VREF_S3

GFX_VID[4..0] 46

CL_CLK0 20

CL_DATA0 20 PWROK 20,23 CL_RST#0 20

3D3V_S0

8

ACZ_SYNC_R 19

7

ACZ_BIT_CLK_R 19

6

ACZ_SDATAOUT_R 19 ACZ_RST#_R 19,30

12

C187

C227

SCD1U10V2KX-4GP

1D05V_S0

1 2

12

SCD1U10V2KX-4GP

ACZ_SDIN3 19

GMCH_GREEN17

GMCH_DDCCLK17 GMCH_DDCDATA17

GMCH_HSYNC17 GMCH_VSYNC17

R137

R137 1KR2F-3-GP

1KR2F-3-GP

R146

R146 511R2F-2-GP

511R2F-2-GP

FOR Cantiga:500 ohm Teenah: 392 ohm

2

3 OF 10

NB1C

L_BKLTCTL15

GMCH_BL_ON36

CLK_DDC_EDID15 DAT_DDC_EDID15

GMCH_LCDVDD_ON15

GMCH_BLUE17

GMCH_RED17

L_BKLTCTL GMCH_BL_ON LCTLA_CLK

TP270Do Not Stuff TP270Do Not Stuff

LCTLB_DATA

TP281Do Not Stuff TP281Do Not Stuff

CLK_DDC_EDID DAT_DDC_EDID

GMCH_LCDVDD_ON

LIBG L_LVBG

TP287Do Not Stuff TP287Do Not Stuff

GMCH_TXACLK-15 GMCH_TXACLK+15 GMCH_TXBCLK-15 GMCH_TXBCLK+15

GMCH_TXAOUT0-15 GMCH_TXAOUT1-15 GMCH_TXAOUT2-15

GMCH_TXAOUT0+15 GMCH_TXAOUT1+15 GMCH_TXAOUT2+15

GMCH_TXBOUT0-15 GMCH_TXBOUT1-15 GMCH_TXBOUT2-15

GMCH_TXBOUT0+15 GMCH_TXBOUT1+15 GMCH_TXBOUT2+15

TVA_DAC TVB_DAC TVC_DAC

GMCH_BLUE GMCH_GREEN GMCH_RED

GMCH_DDCCLK GMCH_DDCDATA

R139

CRT_IREF

12

1K02R2F-1-GP

UMA

FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm

CRT_IREF routing Trace width use 20 mil

DREFCLK DREFCLK# DREFSSCLK DREFSSCLK#

L32 G32 M32

M33 K33

J33

M29 C44 B43 E37 E38 C41 C40 B37 A37

H47 E46 G40 A40

H48 D45

F40 B40

A41 H38 G37

J37 B42

G38

F37 K37

F25 H25 K25

H24

C31 E32

E28 G28

J28 G29 H32

J32

J29 E29

L29

RN33

4 5 3 2 1

Do Not Stuff

DIS

NB1C

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK

L_CTRL_DATA L_DDC_CLK L_DDC_DATA

L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TV_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE CRT_GREEN CRT_RED CRT_IRTN CRT_DDC_CLK

CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

6 7 8

LVDS

TV VGA

FOR Discrete,change to 0 ohm

63.R0034.1DL

3 OF 10

PEG_CMP

T37

PEG_COMPI

T36

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12

PCI-EXPRESS GRAPHICS

PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

PEG_RXN0

H44

PEG_RXN1

J46

PEG_RXN2

L44

PEG_RXN3

L40

PEG_RXN4

N41

PEG_RXN5

P48

PEG_RXN6

N44

PEG_RXN7

T43

PEG_RXN8

U43

PEG_RXN9

Y43

PEG_RXN10

Y48

PEG_RXN11

Y36

PEG_RXN12

AA43

PEG_RXN13

AD37

PEG_RXN14

AC47

PEG_RXN15

AD39

PEG_RXP0

H43

PEG_RXP1

J44

PEG_RXP2

L43

PEG_RXP3

L41

PEG_RXP4

N40

PEG_RXP5

P47

PEG_RXP6

N43

PEG_RXP7

T42

PEG_RXP8

U42

PEG_RXP9

Y42

PEG_RXP10

W47

PEG_RXP11

Y37

PEG_RXP12

AA42

PEG_RXP13

AD36

PEG_RXP14

AC48

PEG_RXP15

AD40

GTXN0

J41

GTXN1

M46

GTXN2

M47

GTXN3

M40

GTXN4

M42

GTXN5

R48

GTXN6

N38

GTXN7

T40

GTXN8

U37

GTXN9

U40

GTXN10

Y40

GTXN11

AA46

GTXN12

AA37

GTXN13

AA40

GTXN14

AD43

GTXN15

AC46

GTXP0

J42

GTXP1

L46

GTXP2

M48

GTXP3

M39

GTXP4

M43

GTXP5

R47

GTXP6

N37

GTXP7

T39

GTXP8

U36

GTXP9

U39

GTXP10

Y39

GTXP11

Y46

GTXP12

AA36

GTXP13

AA39

GTXP14

AD42

GTXP15

AD46

Place close to MXM slot for BB2

TO level shifter

RN31

GMCH_BLUE GMCH_GREEN GMCH_RED

RN31

4 5 3

6

2

7

1

8

SRN150J-1-GP

UMA_DIS:66.R0036.A8L

FOR Discrete,change to 0 ohm

66.R0036.A8L

TVA_DAC TVB_DAC TVC_DAC

UMA_DIS:66.R0036.A8L

RN27

1

8

2

7

3

6

4 5

SRN75J-1-GP

UMA_DIS:66.R0036.A8L

1D05V_S0

12

R142 49D9R2F-GPR142 49D9R2F-GP

C461 Do Not Stuff

1 2

DIS

C459 Do Not Stuff

1 2

DIS

C457 Do Not Stuff

1 2

DIS

C455 Do Not Stuff

1 2

DIS

C436 Do Not Stuff

1 2

DIS

C453 Do Not Stuff

1 2

DIS

C434 Do Not Stuff

1 2

DIS

C451 Do Not Stuff

1 2

DIS

C432 Do Not Stuff

1 2

DIS

C449 Do Not Stuff

1 2

DIS

C430 Do Not Stuff

1 2

DIS

C447 Do Not Stuff

1 2

DIS

C428 Do Not Stuff

1 2

DIS

C445 Do Not Stuff

1 2

DIS

C426 Do Not Stuff

1 2

DIS

C443 Do Not Stuff

1 2

DIS

C462 Do Not Stuff

1 2

DIS

C460 Do Not Stuff

1 2

DIS

C458 Do Not Stuff

1 2

DIS

C456 Do Not Stuff

1 2

DIS

C437 Do Not Stuff

1 2

DIS

C454 Do Not Stuff

1 2

DIS

C435 Do Not Stuff

1 2

DIS

C452 Do Not Stuff

1 2

DIS

C433 Do Not Stuff

1 2

DIS

C450 Do Not Stuff

1 2

DIS

C431 Do Not Stuff

1 2

DIS

C448 Do Not Stuff

1 2

DIS

C429 Do Not Stuff

1 2

DIS

C446 Do Not Stuff

1 2

DIS

C427 Do Not Stuff

1 2

DIS

C444 Do Not Stuff

1 2

DIS

GTXN0 GTXN1 GTXN2 GTXN3

GTXP0 GTXP1 GTXP2 GTXP3

PEG_RXP3

UMA

Close to GMCH as 500 mils.

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

R81

1

PEG_RXN[15..0] 30

PEG_RXP[15..0] 30

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

C77 SCD1U10V2KX-5GP

C77 SCD1U10V2KX-5GP C81 SCD1U10V2KX-5GP

C81 SCD1U10V2KX-5GP C79 SCD1U10V2KX-5GP

C79 SCD1U10V2KX-5GP C75 SCD1U10V2KX-5GP

C75 SCD1U10V2KX-5GP C78 SCD1U10V2KX-5GP

C78 SCD1U10V2KX-5GP C82 SCD1U10V2KX-5GP

C82 SCD1U10V2KX-5GP C80 SCD1U10V2KX-5GP

C80 SCD1U10V2KX-5GP C76 SCD1U10V2KX-5GP

C76 SCD1U10V2KX-5GP

0R2J-2-GP

GMCH_BL_ON GMCH_LCDVDD_ON

LIBG

R156 2K37R2F-GP

CRT_IREF GMCH_HSYNC

GMCH_VSYNC

LCTLA_CLK LCTLB_DATA

PM_EXTTS#0 PM_EXTTS#1

RN87

2 3 1

SRN100KJ-6-GP

UMA

1 2

RN32

4 5 3 2 1

Do Not Stuff

DIS

RN34

4

SRN10KJ-5-GP

UMA

RN35

4

SRN10KJ-5-GP

PEG_TXN[15..0] 30

PEG_TXP[15..0] 30

HDMI_DATA2- 18 HDMI_DATA1- 18 HDMI_DATA0- 18 HDMI_CLK- 18

HDMI_DATA2+ 18 HDMI_DATA1+ 18 HDMI_DATA0+ 18 HDMI_CLK+ 18

HDMI_DETECT# 18

4

6 7 8

3D3V_S0

1 23

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (2 of 6)

Size Document Number Rev

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Big Bear 2

1

-1

of

750Wednesday, October 22, 2008

of

750Wednesday, October 22, 2008

of

750Wednesday, October 22, 2008

5

NB1D

M_A_DQ[63..0]12

D D

C C

B B

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

NB1D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

DDR SYSTEM MEMORY A

4 OF 10

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

4

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6

M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8

M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

M_A_BS#0 12 M_A_BS#1 12 M_A_BS#2 12

M_A_RAS# 12 M_A_CAS# 12 M_A_WE# 12

M_A_DM[7..0] 12

M_A_DQS[7..0] 12

M_A_DQS#[7..0] 12

M_A_A[14..0] 12

3

NB1E

M_B_DQ[63..0]13

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

NB1E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

2

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

M_B_DM0

AM47

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

DDR SYSTEM MEMORY B

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_DM[7..0]

M_B_A[14..0]

M_B_RAS# 13 M_B_CAS# 13 M_B_WE# 13

1

M_B_BS#0 13 M_B_BS#1 13 M_B_BS#2 13

M_B_DM[7..0] 13

M_B_DQS[7..0] 13

M_B_DQS#[7..0] 13

M_B_A[14..0] 13

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (3 of 6)

Size Document Number Rev

5

4

http://hobi-elektronika.net

3

2

Date: Sheet of

Big Bear 2

1

850Wednesday, October 22, 2008

-1

5

4

3

2

1

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

VCC_GFXCORE

SM_LF1_GMCH SM_LF2_GMCH SM_LF3_GMCH SM_LF4_GMCH SM_LF5_GMCH SM_LF6_GMCH SM_LF7_GMCH

12

C125

R100

1 2

Do Not Stuff

DIS

R338

1 2

0R5J-5-GP

UMA

R351

1 2

0R5J-5-GP

UMA

R354

1 2

0R5J-5-GP

UMA

R337

1 2

0R5J-5-GP

UMA

R92

1 2

0R2J-2-GP

UMA

R136

1 2

0R2J-2-GP

UMA

R132

1 2

0R2J-2-GP

UMA

R131

1 2

0R2J-2-GP

UMA

R125

1 2

0R2J-2-GP

UMA

R89

1 2

0R2J-2-GP

UMA

R119

1 2

0R2J-2-GP

UMA

R102

1 2

0R2J-2-GP

UMA

12

C122

SCD1U10V2KX-4GP

1D05V_S0

1D05V_S0VCC_GFXCORE

C502

SC10U6D3V5MX-3GP

12

C478

SC10U10V5KX-2GP

12

C110

SCD1U16V2KX-3GP

Coupling CAP 370 mils from the Edge

12

C507

C188

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

Coupling CAP

G10

1 2

Do Not Stuff

C168

SCD1U16V2KX-3GP

VCC_GMCH_35

Do Not Stuff

79.22719.20L

VCC_GFXCORE

12

TC17

DY

Place CAP where LVDS and DDR2 taps

12

C535

Do Not Stuff

DY

12

C533

UMA

C533

SC10U6D3V5MX-3GP

UMA

12

C512

C532

C511

SC10U6D3V5MX-3GP

UMA

Place on the Edge Coupling CAP

FOR VCC SM

12

C152

SCD1U16V2KX-3GP

12

C169

TC18

C175

SCD1U16V2KX-3GP

TC18

C536

SC4D7U10V5ZY-3GP

Do Not Stuff

77.C3371.10L

SC4D7U10V5ZY-3GP

SCD1U16V2KX-3GP

DY

C572

Do Not Stuff

12

DY

12

C159

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

UMA

12

C574

Do Not Stuff

DY

12

C123

UMA

12

C544

SC10U10V5KX-2GP

12

C137

C124

UMA

1D8V_S3

C124

SCD1U10V2KX-4GP

UMA

SC1U10V3ZY-6GP

AG34 AC34

AM33

AG33

AC33

AH28 AC28

AG26 AC26

AH25 AG25

AG24 AH23

NB1F

VCC VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC VCC

AK33

VCC

AJ33

VCC VCC

AF33

VCC

AE33

VCC VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC VCC

AF28 AA28

AJ26 AE26

AF25 AJ23 AF23

T32

VCC CORE

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC

Place on the Edge

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

12

C112

C134

SCD22U10V2KX-1GP

SCD1U10V2KX-4GP

SCD22U10V2KX-1GP

12

C207

C201

C212

SCD47U16V3ZY-3GP

SC1U10V3KX-3GP

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

POWER

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

VCC NCTF

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

6 OF 10

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

1D05V_S0

7 OF 10

1D8V_S3

D D

VCC_GFXCORE

C C

B B

VCC_AXG_SENSE46 VSS_AXG_SENSE46

NB1G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW29

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_SM/NC

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

POWER

VCC SMVCC GFX

7 OF 10

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC GFX NCTF

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

VCC SM LF

place near Cantiga

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (4 of 6)

Size Document Number Rev

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Big Bear 2

1

-1

of

950Wednesday, October 22, 2008

of

950Wednesday, October 22, 2008

of

950Wednesday, October 22, 2008

5

5V_S0

12

D D

UMA

1D05V_S0

R324

1 2

Do Not Stuff

R323

1 2

Do Not Stuff

1D05V_S0

C C

12

R294

R294 Do Not Stuff

Do Not Stuff

1 2

FCM1608KF-1-GP

68.00217.161

68.00206.021

120ohm 100MHz

1 2

FCM1608KF-1-GP

68.00217.161

68.00206.021

120ohm 100MHz

1D05V_S0

L14

B B

1 2

FCM1608CF-221T02-GP

68.00217.521

68.00084.A81

220ohm 100MHz

1D5V_S0

R123

Do Not Stuff

L4

1 2

HCB1608K-181T20GP

68.00214.101

180ohm 100MHz

A A

Imax = 300 mA

U40

1 2

RT9198-33PBR-GP

C208

SC1U16V3ZY-GP

74.09198.G7F

C570

C569

1D05V_SUS_MCH_PLL2

L1

L12

12

68.00206.041

VIN

VOUT GND EN3NC#4

74.09091.J3F

74.09091.J3F UMA

UMA

12

C563

SC10U6D3V5MX-3GP

UMA

12

C562

SC10U6D3V5MX-3GP

UMA

SC4D7U6D3V3KX-GP

12

C483

12

Do Not Stuff

DY

C481

5

3D3V_S0_DAC

5 4

C538

65mA

M_VCCA_DPLLAM_VCCA_DPLLA

12

Do Not Stuff

DY

65mA

M_VCCA_DPLLB

12

Do Not Stuff

DY

12

C488

12

C487

12

C225

SCD1U10V2KX-4GP

12

C155

SCD1U10V2KX-4GP

12

C164

SCD1U10V2KX-4GP

12

SC1U16V3ZY-GP

UMA

24mA

M_VCCA_HPLL

SCD1U10V2KX-4GP

139.2mA

M_VCCA_MPLL

SCD1U10V2KX-4GP

50mA

1D05V_RUN_PEGPLL

58.7mA

1D5VRUN_TVDAC

1D5VRUN_QDAC

C543

C543 SC22U16V0KX-1GP

SC22U16V0KX-1GP

3D3V_S0_DAC

1D5V_S0

1D05V_S0

Do Not Stuff

1D05V_S0

3D3V_S0_DAC

1D5V_S0

1D05V_SUS_MCH_PLL2

C158

C158 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

R96

1 2

Do Not Stuff

1 2

3D3V_S0_DAC

UMA

5mA

12

C517

UMA

R157

Do Not Stuff

480mA

C503

Do Not Stuff

12

DY

R124

Do Not Stuff

C537

SCD1U10V2KX-4GP

1D8V_S3

60.3mA

4

12

C519

SCD01U16V2KX-3GP

UMA

SCD1U10V2KX-4GP

1D8V_TXLVDS_S3

C561

Do Not Stuff

C499

C126

Do Not Stuff

12

DY

12

C567

C166

DY

12

UMA

157.2mA

12

C486

SCD1U10V2KX-4GP

4

12

C525

SCD1U10V2KX-4GP

12

DY

12

C224

C224 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

UMA

C127

Do Not Stuff

12

DY

C156

SCD1U10V2KX-4GP

C156

SCD1U10V2KX-4GP

12

Do Not Stuff

12

C515

Do Not Stuff

12

C226

SCD1U10V2KX-4GP

12

M_VCCA_DPLLA M_VCCA_DPLLB M_VCCA_HPLL M_VCCA_MPLL

13.2mA

VCCA_PEG_BG

1D05V_RUN_PEGPLL 1D05V_SM

C135

SC1U10V3KX-3GP

Do Not Stuff

12

24mA

1D05V_SM_CK

DY

79mA

50mA

1D5VRUN_TVDAC 1D5VRUN_QDAC

1D05V_RUN_PEGPLL

12

C196

C516

SCD1U16V2KX-3GP

Do Not Stuff

UMA

DY

http://hobi-elektronika.net

NB1H

B27

VCCA_CRT_DAC

A26

VCCA_CRT_DAC

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM

AP20

VCCA_SM

AN20

VCCA_SM

AR17

VCCA_SM

AP17

VCCA_SM

AN17

VCCA_SM

AT16

VCCA_SM

AR16

VCCA_SM

AP16

VCCA_SM

AP28

VCCA_SM_CK

AN28

VCCA_SM_CK

AP25

VCCA_SM_CK

AN25

VCCA_SM_CK

AN24

VCCA_SM_CK

AM28

VCCA_SM_CK_NCTF

AM26

VCCA_SM_CK_NCTF

AM25

VCCA_SM_CK_NCTF

AL25

VCCA_SM_CK_NCTF

AM24

VCCA_SM_CK_NCTF

AL24

VCCA_SM_CK_NCTF

AM23

VCCA_SM_CK_NCTF

AL23

VCCA_SM_CK_NCTF

B24

VCCA_TV_DAC

A24

VCCA_TV_DAC

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS

L37

VCCD_LVDS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

3

CRTPLLA PEGA SM

A LVDS

POWER

A CK

TV

HDA

D TV/CRT

LVDS

AXF

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

SM CK

VCC_TX_LVDS

HV

PEG

DMI

VTTLF

8 OF 10

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VTT

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VCC_AXF VCC_AXF VCC_AXF

VCC_HV VCC_HV VCC_HV

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

VCC_DMI VCC_DMI VCC_DMI VCC_DMI

VTTLF VTTLF VTTLF

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47 C35

B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

106mA

1782mA

456mA

VTTLF1 VTTLF2 VTTLF3

1

2

12

C142

C154

SC1U10V3KX-3GP

C117

12

3D3V_HV_S0

12

C163

SC1U10V3KX-3GP

SCD47U6D3V2KX-GP

C108

C109

1

2

12

C143

SC1U10V3KX-3GP

1D05V_S0

C506

Do Not Stuff

C506

12

DY

SCD1U10V2KX-4GP

C510

12

DY

12

SCD47U6D3V2KX-GP

C118

1

Do Not Stuff

1D8V_TXLVDS_S3

C560

C121

SC1U10V3KX-3GP

2

1

Do Not Stuff

C180

1

C170

SC1U10V3KX-3GP

2

DY

D16

1

2

Do Not Stuff

DY

852mA73mA

1D05V_HV_S0

3

83.00054.Z81

1D05V_S0

12

DY

1D05V_S0

Do Not Stuff

C179

3D3V_S0 3D3V_HV_S0

R289

Do Not Stuff

DY

R141

12

Do Not Stuff

322mA

1D8V_S31D8V_SUS_SM_CK

R305

200mA

119mA

C566

Do Not Stuff

C566

Do Not Stuff

C565

SCD1U16V2KX-3GP

Do Not Stuff

12

DY

1D05V_S0

Do Not Stuff

12

C571

DY

Do Not Stuff

C480

12

DY

Title

Cantiga (5 of 6)

Size Document Number Rev

Date: Sheet of

1 2

Do Not Stuff

12

DY

12

C479

SC10U10V5KX-2GP

12

R305

1 2

C514

SC10U6D3V5MX-3GP

1D8V_S3

UMA

12

R325 0R3-0-U-GP

1D05V_S0

C568

SC10U10V5KX-2GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Big Bear 2

10 50Wednesday, October 22, 2008

1

12

C177

SCD1U10V2KX-4GP

-1

5

NB1I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

D D

C C

B B

A A

5

AF47

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

VSS

4

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

3

NB1J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17

VSS

M17

VSS

H17

VSS

C17

VSS

BA16

VSS

AU16

VSS

AN16

VSS

N16

VSS

K16

VSS

G16

VSS

E16

VSS

BG15

VSS

AC15

VSS

W15

VSS

A15

VSS

BG14

VSS

AA14

VSS

C14

VSS

BG13

VSS

BC13

VSS

BA13

VSS

AN13

VSS

AJ13

VSS

AE13

VSS

N13

VSS

L13

VSS

G13

VSS

E13

VSS

BF12

VSS

AV12

VSS

AT12

VSS

AM12

VSS

AA12

VSS

J12

VSS

A12

VSS

BD11

VSS

BB11

VSS

AY11

VSS

AN11

VSS

AH11

VSS

Y11

VSS

N11

VSS

G11

VSS

C11

VSS

BG10

VSS

AV10

VSS

AT10

VSS

AJ10

VSS

AE10

VSS

AA10

VSS

M10

VSS

BF9

VSS

BC9

VSS

AN9

VSS

AM9

VSS

AD9

VSS

G9

VSS

B9

VSS

BH8

VSS

BB8

VSS

AV8

VSS

AT8

VSS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

http://hobi-elektronika.net

3

VSS

VSS NCTF

NCTF_VSS_SCB#BH48

NCTF_VSS_SCB#BH1

NCTF_VSS_SCB#A48

NCTF_VSS_SCB#C1

NCTF_VSS_SCB#A3

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

VSS SCB

NC

10 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

NC#E1 NC#D2 NC#C3 NC#B4 NC#A5

NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46

NC#F48 NC#E48 NC#C48 NC#B48

2

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

TP185 Do Not StuffTP185 Do Not Stuff TP156 Do Not StuffTP156 Do Not Stuff TP184 Do Not StuffTP184 Do Not Stuff TP157 Do Not StuffTP157 Do Not Stuff TP302 Do Not StuffTP302 Do Not Stuff

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (6 of 6)

Size Document Number Rev

Date: Sheet of

Big Bear 2

1

11 50Wednesday, October 22, 2008

-1

A

4 4

3 3

DDR_VREF_S3

8 7 6

SRN56J-5-GP

8 7 6

SRN56J-5-GP

8 7 6

SRN56J-5-GP

8 7 6

SRN56J-5-GP

8 7 6

SRN56J-5-GP

8 7 6

SRN56J-5-GP

8 7 6

SRN56J-5-GP

RN82

RN10

RN20

RN75

RN81

RN22

RN77

PARALLEL TERMINATION

1 2 3 45

M_A_A9 M_A_A12 M_A_BS#2 M_CKE0

M_A_A13 M_CS0# M_ODT0 M_A_RAS#

M_A_BS#1 M_A_A0 M_A_A2 M_A_A4

M_ODT1 M_CS1#

M_A_CAS#

M_A_A3 M_A_A14 M_A_A5 M_A_A8

M_A_A11 M_A_A7 M_A_A6 M_CKE1

M_A_WE# M_A_BS#0 M_A_A10 M_A_A1

Put decap near power(0.9V) and pull-up resistor

Decoupling Capacitor

DDR_VREF_S3

2 2

Put decap near power(0.9V) and pull-up resistor

12

C67

C421

Do Not Stuff

DY

12

C422

C477

Do Not Stuff

DY

C85

C107

Do Not Stuff

DY

12

C70

SCD1U16V2ZY-2GP

12

C424

C470

SCD1U16V2ZY-2GP

12

B

M_A_A[14..0]8

TP277

Do Not Stuff

12

C439

C63

SCD1U16V2ZY-2GP

M_A_BS#28 M_A_BS#08

M_A_BS#18

M_A_DQ[63..0]8

M_A_DQS#[7..0]8

M_A_DQS[7..0]8

DDR_VREF_S3_1

C181

DY

Do Not Stuff

C

DIM1

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_ODT07 M_ODT17

12

C183

SCD1U16V2ZY-2GP

DIM1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

/DQS0

29

/DQS1

49

/DQS2

68

/DQS3

129

/DQS4

146

/DQS5

167

/DQS6

186

/DQS7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

ODT0

119

ODT1

1

VREF

2

VSS

202

GND

SKT-SODIMM20022U2GP

62.10017.691

62.10017.911

High 5.2mm

108

/RAS

109

/WE

113

/CAS

110

/CS0

115

/CS1

79

CKE0

80

CKE1

30

CK0

32

/CK0

164

CK1

166

/CK1

M_A_DM0

10

DM0

M_A_DM1

26

DM1

M_A_DM2

52

DM2

M_A_DM3

67

DM3

M_A_DM4

130

DM4

M_A_DM5

147

DM5

M_A_DM6

170

DM6

M_A_DM7

185

DM7

195

SDA

197

SCL

199

VDDSPD

198

SA0

200

SA1

50

NC#50

69

NC#69

83

NC#83

120

NC#120

163

NC#163/TEST

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

REVERSE TYPE

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

M_A_RAS# 8 M_A_WE# 8 M_A_CAS# 8

M_CS0# 7 M_CS1# 7

M_CKE0 7 M_CKE1 7

M_CLK_DDR0 7 M_CLK_DDR#0 7

M_CLK_DDR1 7 M_CLK_DDR#1 7

SMBD_ICH 3,13,22 SMBC_ICH 3,13,22

Do Not Stuff

1D8V_S3

M_A_DM[7..0] 8

C54

12

DY

D

3D3V_S0

1D8V_S3

Place these Caps near DM1

12

C425

C473

SC4D7U6D3V3KX-GP

12

C89

C90

SCD1U16V2KX-3GP

DY

12

C468

Do Not Stuff

DY

12

C100

Do Not Stuff

DY

12

C423

C87

DY

12

C103

Do Not Stuff

DY

Do Not Stuff

E

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR2 Socket 0 (DM1)

Size Document Number Rev

Date: Sheet

A

B

http://hobi-elektronika.net

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Big Bear 2

E

-1

of

12 50Wednesday, October 22, 2008

of

12 50Wednesday, October 22, 2008

of

12 50Wednesday, October 22, 2008

A

4 4

3 3

2 2

DDR_VREF_S3

12

C92

DY

RN13

8 7 6

SRN56J-5-GP

RN21

8 7 6

SRN56J-5-GP

RN9

8 7 6

SRN56J-5-GP

RN7

8 7 6

SRN56J-5-GP

RN11

8 7 6

SRN56J-5-GP

RN23

8 7 6

SRN56J-5-GP

RN12

8 7 6

SRN56J-5-GP

Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor

12

C101

C116

Do Not Stuff

DY

PARALLEL TERMINATION

1 2 3 45

M_B_A6 M_B_A14 M_B_A11

M_B_A8 M_B_A9 M_B_A5 M_B_A1

M_CS2# M_B_BS#1 M_B_RAS# M_B_A0

M_ODT3 M_B_CAS# M_B_A13 M_ODT2

M_B_A3 M_B_A2 M_B_A4 M_B_A7

M_CKE3 M_CKE2 M_B_BS#2 M_B_A12

M_B_WE# M_B_A10 M_B_BS#0 M_CS3#

Do Not Stuff

Put decap near power(0.9V) and pull-up resistor

12

C114

C91

Do Not Stuff

DY

12

C83

Do Not Stuff

DY

12

C105

B

M_B_A[14..0]8

TP276

Do Not Stuff

12

C120

C65

SCD1U16V2ZY-2GP

12

C66

C69

SCD1U16V2ZY-2GP

M_B_BS#28 M_B_BS#08

M_B_BS#18

M_B_DQ[63..0]8

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

DDR_VREF_S3_1

C182

C

DIM2

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_ODT27 M_ODT37

12

DY

Do Not Stuff

DIM2

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

1

VREF

2

VSS

C185

202

GND

MH1

DDR2-200P-23-GP-U1

62.10017.A71

62.10017.B51

SCD1U16V2ZY-2GP

High 9.2mm

108

RAS#

109

WE#

113

CAS#

110

CS0#

115

CS1#

79

CKE0

80

CKE1

30

CK0

32

CK0#

164

CK1

166

CK1#

M_B_DM0

10

DM0

M_B_DM1

26

DM1

M_B_DM2

52

DM2

M_B_DM3

67

DM3

M_B_DM4

130

DM4

M_B_DM5

147

DM5

M_B_DM6

170

DM6

M_B_DM7

185

DM7

195

SDA

197

SCL

199

VDDSPD

198

SA0

200

SA1

50

NC#50

69

NC#69

83

NC#83

120

NC#120

163

NC#163/TEST

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

REVERSE TYPE

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

MH2

DDRB_SA0

M_B_RAS# 8 M_B_WE# 8 M_B_CAS# 8

M_CS2# 7 M_CS3# 7

M_CKE2 7 M_CKE3 7

M_CLK_DDR2 7 M_CLK_DDR#2 7

M_CLK_DDR3 7 M_CLK_DDR#3 7

SMBD_ICH 3,12,22 SMBC_ICH 3,12,22

R67

10KR2J-3-GP

1D8V_S3

M_B_DM[7..0] 8

12

1D8V_S3

SC1U10V3KX-3GP

C55

D

3D3V_S0

DY

C441

E

12

Do Not Stuff

Place these Caps near DM2

12

C73

C73 SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

C99

SCD1U16V2KX-3GP

12

C419

Do Not Stuff

DY

12

C104

Do Not Stuff

C84

SCD1U16V2KX-3GP

DY

12

C438

C474

Do Not Stuff

DY

12

C72

Do Not Stuff

DY

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR2 Socket 1 (DM2)

Size Document Number Rev

Date: Sheet

A

B

http://hobi-elektronika.net

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Big Bear 2

E

-1

of

13 50Wednesday, October 22, 2008

of

13 50Wednesday, October 22, 2008

of

13 50Wednesday, October 22, 2008

5

D D

C C

4

3

WIRELESS_BTN# INTERNET# MAIL# BT_BTN#

SRN10KJ-6-GP

WIRELESS_BTN#36

INTERNET#36

BT_BTN#36

RN107

1 2 3 4 5

MAIL#36

2

3D3V_S0

8 7 6

RN80

4 5 3 2 1

SRN470J-3-GP

1

WIRELESS_BTN#_R

LSW1

1

2 4

62.40009.681

INTERNET#_R

1

2 4

62.40009.681

6 7 8

62.40009.681

MAIL#_R

1

2 4

62.40009.681

BT_BTN#_R

1

2 4

62.40009.681

SW-TACT-122-GP

62.40009.661

LSW2

SW-TACT-122-GP

62.40009.661

LSW3

SW-TACT-122-GP

62.40009.661

LSW4

SW-TACT-122-GP

62.40009.661

3 5

SC

B B

LID_CLOSE# I2C_INT

E-BUTTON#

EKCN1

LID_CLOSE#_R50 E-BUTTON#_R50

RN76

E-BUTTON#36

A A

4

SRN470J-4-GP-U

5

3D3V_AUX_S5

LID_CLOSE#_R

LID_CLOSE#_R I2C_INT_R

23

E-BUTTON#_R

1

EKCN1

9 1 2

3 4 5 6 7 8

10

ACES-CON8-15-GP

20.K0315.008

20.K0381.008

ACES-CON8-15-GP

20.K0315.008

RN59

6 7 8

SRN10KJ-6-GP

LEDB1

9 1 2

3 4 5 6 7 8

10

20.K0381.008

4

3D3V_AUX_S5

3D3V_S0

45 3 2 1

3D3V_AUX_S5

Xres

SC

5V_S0

BAT_SCL_R BAT_SDA_R

TP267 Do Not StuffTP267 Do Not Stuff

BAT_SCL_R 50 I2C_INT_R 50 BAT_SDA_R 50

RN109

1

8

2

7

3

6

4 5

SRN0J-7-GP

http://hobi-elektronika.net

BAT_SCL 36,47,48 I2C_INT 36LID_CLOSE#36 BAT_SDA 36,47,48

3

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

LAUNCH

Size Document Number Rev

Date: Sheet of

2

Date: Sheet

Big Bear 2

1

of

14 50Wednesday, October 22, 2008

-1

BLON_OUT

DCBATOUT

12

C390

SC10U25V6KX-1GP

LCD/INVERTER/CCD CONN

LCD1

41

USBPN820

USBPP820

1 2

R257

1 2

12

C391

SCD1U50V3ZY-GP

3D3V_S0

33R2J-2-GP

F3

POLYSW-1D1A24V-GP

69.50007.A41

LCD_EDID_CLK LCD_EDID_DAT

CCD_PWR BRIGHTNESS_CN BLON_OUT1

PWR_INVERTER

2 4

6

8 10 12 14 16 18 20 22 24 26 28 30

42

ACES-CONN40A-2GP

20.F0993.040

20.F1084.040

1 3

5 7 9 11 13 15 17 19 21 23 25 27 29 3132 3334 3536 3738 3940

SC10U10V5ZY-1GP

LCDVDD

12

C373

DY

LVDS_TXBCLK+ LVDS_TXBCLKLVDS_TXBOUT2+ LVDS_TXBOUT2LVDS_TXBOUT1+ LVDS_TXBOUT1LVDS_TXBOUT0+ LVDS_TXBOUT0LVDS_TXACLK+ LVDS_TXACLKLVDS_TXAOUT2+ LVDS_TXAOUT2LVDS_TXAOUT1+ LVDS_TXAOUT1LVDS_TXAOUT0+ LVDS_TXAOUT0-

12

C366

DY

Do Not Stuff

C370

C370 Do Not Stuff

Do Not Stuff

Inverter Pin Pin

1 2 3 4 5 6

CCD Pin Pin

1

3 42GND 5

Symbol Vin Vin Brightness BLON GND GND

Symbol CCD_PWR USBUSB+

GND

Place close to MXM slot for BB2

RN17

LVDS_TXBOUT0LVDS_TXBOUT0+ LVDS_TXBOUT1LVDS_TXBOUT1+

LVDS_TXBOUT2LVDS_TXBOUT2+ LVDS_TXBCLKLVDS_TXBCLK+

LVDS_TXAOUT0LVDS_TXAOUT0+ LVDS_TXAOUT1LVDS_TXAOUT1+

LVDS_TXAOUT2LVDS_TXAOUT2+ LVDS_TXACLKLVDS_TXACLK+

LVDS_TXBCLK+ LVDS_TXBCLKLVDS_TXBOUT2+ LVDS_TXBOUT2-

RN17

1 2 3

UMA

4 5

SRN0J-7-GP

RN18

1 2 3

UMA

4 5

SRN0J-7-GP

RN15

1 2 3

UMA

4 5

SRN0J-7-GP

RN16

1 2 3

UMA

4 5

SRN0J-7-GP

8 7 6

G72_TXBCLK+ 30

G72_TXBCLK- 30

G72_TXBOUT2+ 30

G72_TXBOUT2- 30

GMCH_TXBOUT0- 7

GMCH_TXBOUT0+ 7

GMCH_TXBOUT1- 7

GMCH_TXBOUT1+ 7

GMCH_TXBOUT2- 7

GMCH_TXBOUT2+ 7

GMCH_TXBCLK- 7

GMCH_TXBCLK+ 7

GMCH_TXAOUT0- 7

GMCH_TXAOUT0+ 7

GMCH_TXAOUT1- 7

GMCH_TXAOUT1+ 7

GMCH_TXAOUT2- 7

GMCH_TXAOUT2+ 7

GMCH_TXACLK- 7

GMCH_TXACLK+ 7

LVDS_TXBOUT1+ LVDS_TXBOUT1LVDS_TXBOUT0+

LCD_EDID_CLK30 LCD_EDID_DAT30

LVDS_TXBOUT0-

LVDS_TXACLK+ LVDS_TXACLKLVDS_TXAOUT2+ LVDS_TXAOUT2-

LVDS_TXAOUT1+ LVDS_TXAOUT1LVDS_TXAOUT0+ LVDS_TXAOUT0-

2 3 1

UMA

R255 Do Not Stuff

DY

12

C378

DY

Layout 40 mil

12

3D3V_S0

SRN10KJ-5-GP

12

C364

DY

R256 33R2J-2-GPR256 33R2J-2-GP

Do Not Stuff

RN63

12

1

23

4

U20

1

IN#1

2

OUT

3

EN

4

GND

G5281RC1U-GP

74.05281.093

BRIGHTNESS_CN BLON_OUT

UMA

GMCH_LCDVDD_ON7

LCDVDD_ON30

1 2

R250 0R2J-2-GP

CCD_PWR

12

C371

SC4D7U10V5ZY-3GP

DY

C368

Do Not Stuff

12

Do Not Stuff

DY

F2

1 2

FUSE-1A6V-2-GP

69.50007.721

12

C376

Do Not Stuff

LCDVDD

C363

SC4D7U10V3KX-GP

69.50007.981

LCDVDD_ON

9

GND

8

IN#8

7

IN#7

6

IN#6

5

IN#5

L_BKLTCTL 7

3D3V_S0

BRIGHTNESS 36 BLON_OUT 36

12

C360

SC4D7U10V3KX-GP

CLK_DDC_EDID7 DAT_DDC_EDID7

Place close to MXM slot for BB2

http://hobi-elektronika.net

4

G72_TXBOUT1+ 30 G72_TXBOUT0+ 30

G72_TXAOUT2+ 30

G72_TXAOUT1+ 30 G72_TXAOUT0+ 30

RN62

RN62 SRN0J-6-GP

SRN0J-6-GP

G72_TXBOUT1- 30 G72_TXBOUT0- 30

G72_TXACLK+ 30

G72_TXACLK- 30

G72_TXAOUT2- 30

G72_TXAOUT1- 30 G72_TXAOUT0- 30

3D3V_S0

1

23

SRN2K2J-1-GP

SRN2K2J-1-GP RN61

RN61

4

LCD_EDID_CLK LCD_EDID_DAT

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD CONN

Size Document Number Rev

Date: Sheet of

Big Bear 2

15 50Wednesday, October 22, 2008

-1

5

4

3

2

1

EBC

Q30

5V_S5

12

C688

C688 Do Not Stuff

Do Not Stuff

DY

L-line_LED#_R NUM_LED#_R

MEDIA_LED#_R CAP_LED#_R KBC_PWRBTN#_R FRONT_PWRLED#_1 STDBY_LED#_1

5

Q30

R2

R1

FRONT_PWRLED# STDBY_LED#

EBC

Q31

R2

R1

EBC

Q28

R2

R1

EBC

Q29

R2

R1

L-line_LED#_R L-line_LED#

604R2F-2-GP

5V_S0

1 2 3

DC_BATFULL#

CHARGE_LED#

STDBY_LED# STDBY_LED#_1

FRONT_PWRLED#

R430

12

C689

C689 Do Not Stuff

Do Not Stuff

DY

RN54

4

SRN100J-3-GP

1 2 3

DDTC143ZUA-7-F-GP

L-line_LED#_R NUM_LED#_R MEDIA_LED#_R CAP_LED#_R KBC_PWRBTN#_R FRONT_PWRLED#_1 STDBY_LED#_1

FRONT_PWRLED#_R

STDBY_LED#_R

RN53

4

SRN100J-3-GP

R421

12

Do Not Stuff

Do Not Stuff R418

R418

12

Do Not Stuff

Q32

C

R1

E

R2

84.00143.D1K

DC_BATFULL#_R

CHARGE_LED#_R

FRONT_PWRLED#_1

B

L-line_LED#_R 50 NUM_LED#_R 50 MEDIA_LED#_R 50 CAP_LED#_R 50 KBC_PWRBTN#_R 50 FRONT_PWRLED#_1 50 STDBY_LED#_1 50

4

ACLED1

3 2

4

LED-OB-2-GP

83.19223.A70

83.00195.G70

LED-GY-14-GP

83.00195.I70

83.19223.B70

L-line_LED 36

3D3V_AUX_S5

5V_S5

1

3D3V_AUX_S5

BTYLED1

13

24

NUM_LED36

12

R253

R253 10KR2J-3-GP

10KR2J-3-GP

KBC_PWRBTN#_R

G23

G23 Do Not Stuff

Do Not Stuff

2 1

http://hobi-elektronika.net

R251

1 2

470R2J-2-GP

3

WLAN_TEST_LED36

CAP_LED36

12

C374

C374 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

BT_LED36

WLAN_LED#32

Q4

R1

B

DDTC143ZUA-7-F-GP

84.00143.D1K

MEDIA_LED#19

DDTC143ZUA-7-F-GP

84.00143.D1K

KBC_PWRBTN# 36

B

DDTC143ZUA-7-F-GP

84.00143.D1K

D D

C C

B B

A A

FRONT_PWRLED36

STDBY_LED36

DC_BATFULL36

CHARGE_LED36

PWCN1

13

1 2

3 4 5 6 7 8 9 10 11 12

14

ACES-CON12-9-GP

20.K0315.012

2ND = 20.K0370.012

DDTC143ZUA-7-F-GP

84.00143.D1K

DDTC143ZUA-7-F-GP

84.00143.D1K

DDTC143ZUA-7-F-GP

84.00143.D1K

DDTC143ZUA-7-F-GP

84.00143.D1K

R2

Q6

R1

R2

Q3

R1

B

R2

R252

1 2

33R2J-2-GP

G

S

2N7002E-1-GP

84.2N702.D31

84.2N702.E31

C E

Q13

.....

D

NUM_LED#

MEDIA_LED#

CAP_LED#

WLAN_LED#_1

1 2 3 4 5

2

RN24

2 3 1

SRN150J-1-GP

8 7 6

SRN100J-3-GP

RN14

4

BLT_LED#_RBLT_LED#

WLAN_LED#_1_R

EMI

12

EC102

Do Not Stuff

DY

NUM_LED#_R

MEDIA_LED#_R

CAP_LED#_R

UMA

Title

Power & LED Board

Size Document Number Rev

Date: Sheet of

5V_S0

LED3

AK

LED-B-68-GP

83.19217.070

83.00190.P70

3D3V_S0

LED2

AK

LED-Y-57-GP

83.01921.P70

83.00190.S7A

WLAN_LED#_1_R

BLT_LED#_R

12

EC103

Do Not Stuff

DY

MEDIA_LED#_R

EMI

Big Bear 2

NUM_LED#_R CAP_LED#_R

12

DY

EC34 Do Not Stuff

EC30 Do Not Stuff

EC19 Do Not Stuff

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

16 50Wednesday, October 22, 2008

1

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