Acer Aspire 5020 Schematics

5

4

3

2

1

See 'TEXT' in 0MEMO or 1MEMO property in component

Dummy when 'USE EZ4'

Dummy when 'NO EZ4'

Dummy when use '10/100'

Dummy when use 'GIGA'

D D

Dummy when use 'UMA'

Dummy when use 'DIS'

Dummy when use 'SATA'

Dummy when use 'IDE'

Dummy when use ''M26'

Dummy when use ''M24'

CLK GEN

IDT CV137

LEDs RTC BAT. BUTTONs

Bolsena Block Diagram

AMD CPU

3

17 18 35

35W/25W

4,5,6,7

HyperTransport

6.4GB/S 16b/8b

DDR 333/400

91.4C501.001 (04243)

200-PIN DDR SODIMM

DDR x2

SVIDEO/COMP

8,9,10

TVOUT

16

PWR SW

TSP2220A

PCMCIA SLOT

Support TypeII

C C

28

1394 4pin Conn

28

PCMCIA I/F

MS/xD SM/MMC/SD

5 in 1

28

TI

PCI 7411

1* Slot Cardbus 1* 1394 CardReader

26,27

ATI

RS480M

AGTL+ CPU I/F + UMA

11,12,13,14

PCI-Express x2

PCI Express x16

VRAM x4

ATI

M26/M24

50,51,52

53,54(M26/M24 diff.)

CH7301C

LVDS

RGB CRT

15

TMDS

ATI

PCI

25

SB400

ACPI 2.0

ATA 133

18,19,20,21,22

PIDE

HDD

25

6xUSB 2.0

6-CH AC97 2.2

LPC I/F

SIDE

DVD/ CD-RW

USB x 4

24

AC97

MODEM MDC Card

NS SIO

PC87392

25

FIR

RJ11 CONN

37

LPC Bus / 33MHz

Thermal & Fan

G792

CODEC

ALC655

32

OP AMP

30

G1421

3324

KBC

23

KB3910

Touch Pad

35 35

34

Int. KB

Mini-PCI

PCI Bus / 33MHz

802.11a/b/g

31

RJ45

TXFM

30

1000Mb

PCI LAN

Realtek RTL8110SBL

B B

TXFM

10/100Mb

30

1000/100/10 RTL8100C 100/10

29

SATA

LCD

CRT

DVI-D

(EZ4 only )

BlueTooth miniUSB

Line In MIC In

Line Out

Int. SPKR

XBUS

17

16

15

24

33

ISA ROM

Power Block Diag -> Page 40

36

A A

Port Replicator 4 (124 PIN)

AC IN

RJ45-11

SEARIAL PORT

5

CRT

PRINTER

PS2

4

MIC

LINE IN

LINE OUT

TV OUT

DVI PCIeX2 SMBUS

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM

Size Document Number Rev

A3

Bolsena

Date: Sheet

Date: Sheet of

158Tuesday, April 12, 2005

of

1

-1

5

4

3

2

1

PCI Routing

IRQ

MiniPCI

LAN

D D

21 23 2 22 17411 E (CardBus)

F H

22 17411 G (1394) 22 17411 E (FlashMedia)

C C

REQ/GNTIDSEL

0

B B

Ref. function schematic BOM

------------------------U81 cpu socket 62.10055.091 (DON'T CHANGE) (3mm high) U80 north bridge 71.RS48M.00U 71.RS48M.B0U (ver A22) U43 south bridge 71.SB400.B0U 71.SB400.D0U (ver A32) U32 clock gen. 71.00137.A0W 71.00137.B0W

--U70 VGA M24 71.0M26P.00U 71.00M24.C0U U64 VRAM FOR M24 72.55732.B0U 72.52832.E05 U65 VRAM FOR M24 72.55732.B0U 72.52832.E05 U69 VRAM FOR M24 72.55732.B0U 72.52832.E05 U71 VRAM FOR M24 72.55732.B0U 72.52832.E05

--U70 VGA M26 71.0M26P.00U (DON'T CHANGE) U64 VRAM FOR M26 72.55732.B0U (DON'T CHANGE) U65 VRAM FOR M26 72.55732.B0U (DON'T CHANGE) U69 VRAM FOR M26 72.55732.B0U (DON'T CHANGE) U71 VRAM FOR M26 72.55732.B0U (DON'T CHANGE)

--U66 BIOS SOCKET 72.39040.G03 62.10002.032 (NO NEED WHEN PD) U66 BIOS IC 72.39040.G03 72.39040.H03 (DIP STAGE IN LAB, SMT IN PD)

---

A A

LOUT1 AUDIO 22.10257.001 22.10147.031 (NO SPDIF)

--U75 GIGA LAN 71.08110.00G 71.08110.A0G U75 10/100 LAN 71.08110.00G 71.08100.C0G

--HDD1 20.80175.044 20.80592.044 SATA1 20.F0614.022 20.F0665.022 EZ4 20.80579.120 20.80591.120 (AFTER SB)

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CHANGE HISTORY

Size Document Number Rev

Bolsena -1

A3

Bolsena -1

A3

Bolsena -1

A3

Date: Sheet

258Thursday, March 31, 2005

of

1

of

A

3D3V_S0

L14

1 2

0R0603-PAD

SC 0308

4 4

12

C421

C421 SCD1U16V

SCD1U16V

C416

C416 SCD1U16V

SCD1U16V

12

C423

C423 SCD1U16V

SCD1U16V

C417

C417 SCD1U16V

SCD1U16V

Dummy when 'NO EZ4'

SMBC_SB_EZ457 SMBD_SB_EZ457

RN120

SRN33-2-U2

SMBC_SB8,21

3 3

SMBD_SB8,21

SC 0309

SB_OSC_CLK21

CLK14_AUDIO32

1

23

4

12

C397

C397 SCD1U16V

SCD1U16V

12

C420

C420 SCD1U16V

SCD1U16V

R279

1 2

R280

1 2

CLK48_CARDBUS26

CLK48_USB21

R261 33R2R261 33R2

1 2 1 2

R260 33R2R260 33R2

33R2

12

1 2

C398

C398 SCD1U16V

SCD1U16V

C419

C419 SCD1U16V

SCD1U16V

C400

SC33P50V2JN

X-14D318MHZ-1-U1

1 2

C422

SC33P50V2JN

CLK14_NB13

CLK14_SIO37

B

12

C415

C415 SC10U10V5ZY

SC10U10V5ZY

3D3V_CLK_VDDA

3D3V_S0 3D3V_CLK_VDD

12

R264 22R2R264 22R2

1 2

R263 22R2R263 22R2

1 2

SB 0219

3D3VDD48_S0

12

C399

C399 SC2D2U16V5ZY

SC2D2U16V5ZY

R278

R278 DUMMY-R3

DUMMY-R3

R277

1 2

R274

1 2

R273

1 2

12

R298

R298 100R2F

100R2F

75R2F

USB_48M SMBC_CLK SMBD_CLK

33R2

IREF_CLKGEN

12

FS2 FS1 FS0

CLK_REF2 CLK_HTT66

R272

R272 475R2F

475R2F

X2

SC 0309

HTREF_CLK13

1 2

0R0603-PAD

SC 0308

XI_CLK

XO_CLK

L13

U32

3

VDD_48

39

VDDA

32

VDD_SRC

21

VDD_SRC

14

VDD_SRC

35

VDD_SRC

56

VDD_REF

51

VDD_PC1

43

VDD_CPU

48

VDD_HTT

1

XIN

2

XOUT

4

USB_48

7

SCL

8

SDA

10

CLKREQ0#

11

CLKREQ1#

9

SEL24/24_48#

53

REF1

54

REF0

52

REF2

47

HTT66

50

PCI0

37

IREF

6

NC#6

IDTCV137PAG

CHANGE TO 71.00137.B0W

C

SRCC0 SRCT0 SRCC3 SRCT3 SRCC4 SRCT4 SRCC5 SRCT5 SRCC6 SRCT6 SRCC7 SRCT7

CPUC1 CPUT1 CPUC0 CPUT0

SRCC1 SRCT1 SRCC2 SRCT2

VSS_SRC VSS_SRC

RESET#

TURBO1

VSS_CPU

VSS_PCI

VSS_HTT

VSS_SRC

VSS_48

VSS_REF

VSSA

33 34 25 24 23 22 19 18 17 16 13 12

40 41 44 45

29 30 28 27

36 20 15 26

42 49 46 31 38 5 55

3D3V_CLK_VDDA3D3V_CLK_VDD

12

C418

C418 SCD1U16V

SCD1U16V

SRC_CLK0# SRC_CLK0 SRC_CLK3# SRC_CLK3 SRC_CLK4# SRC_CLK4 SRC_CLK5# SRC_CLK5

CPUCLKJ_CY CPUCLK_CY

ATI_CLK0# ATI_CLK0 ATI_CLK1# ATI_CLK1

3D3V_S0

L12

1 2

0R0603-PAD

12

C414

C414 SC10U10V5ZY

SC10U10V5ZY

R296 15R2JR296 15R2J

1 2

R297 15R2JR297 15R2J

1 2

RN55

2 3 1

SRN33-2-U2

RN44

1 2 3

SRN33-2-U2

SC 0308

2 3 1

1 2 3

RN46

1 2 3

SRN33-2-U2

SRN33-2-U2 RN47

RN47

1 2 3

SRN33-2-U2

Dummy when no EZ4

4

Dummy when use UMA

D

RN56

SRN33-2-U2

4

RN45

4

SRN33-2-U2

4

CPUCLK# 6 CPUCLK 6

NBSRC_CLK# 13 NBSRC_CLK 13

GFX_CLK# 49 GFX_CLK 49

SBLINK_CLK# 13 SBLINK_CLK 13

SBSRC_CLK# 18 SBSRC_CLK 18

CLK_PCIE_DOCK1# 57 CLK_PCIE_DOCK1 57

CLK_PCIE_DOCK2# 57 CLK_PCIE_DOCK2 57

CLK_PCIE_DOCK1# CLK_PCIE_DOCK1 CLK_PCIE_DOCK2# CLK_PCIE_DOCK2

SBLINK_CLK# SBLINK_CLK SBSRC_CLK# SBSRC_CLK GFX_CLK# GFX_CLK

E

R253

1 2

49D9R2F

R254

1 2

49D9R2F

R255

1 2

49D9R2F

R256

1 2

49D9R2F

Dummy when no EZ4

R294

1 2

R295

1 2

R251

1 2

R252

1 2

R249

1 2

R250

1 2

49D9R2F

49D9R2F 49D9R2F

49D9R2F

Dummy when use UMA

2 2

NBSRC_CLK# NBSRC_CLK

3D3V_CLK_VDD

DY

R281

1 2

2K2R2

1 2

DUMMY-R2

R299

R275

1 2

1 1

R257

1 2 1 2

R276

R258

2K2R2

DY

DUMMY-R2

DY

2K2R2

2K2R2 DUMMY-R2

DUMMY-R2

for ICS

A

FS0

FS1

FS2

Title

Size Document Number Rev

A3

Date: Sheet

B

C

D

Date: Sheet

CLKGEN_IDTCV137

Bolsena

R292

1 2

49D9R2F

R293

1 2

49D9R2F

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

358Thursday, March 31, 2005

of

E

of

-1

A

4 4

B

C

D

E

HTT for CPU sideA Transmit power and NB sideA Receive power

1D2V_S0

12

3 3

C244

C244 SCD22U16V3ZY

SCD22U16V3ZY

12

C245

C245 SCD22U16V3ZY

SCD22U16V3ZY

12

NB0CADOUT[15..0]11 NB0CADOUTJ[15..0]11

C246

C246 SCD22U16V3ZY

SCD22U16V3ZY

Used SideB Power Plane

2 2

1D2V_HT0B_S0

1 1

12

C247

C247 SCD22U16V3ZY

SCD22U16V3ZY

NB0HTTCLKOUT111 NB0HTTCLKOUTJ111 NB0HTTCLKOUT011 NB0HTTCLKOUTJ011

1 2 1 2

NB0HTTCTLOUT11 NB0HTTCTLOUTJ11

R176 49D9R2FR176 49D9R2F R177 49D9R2FR177 49D9R2F

NB0CADOUT15 NB0CADOUTJ15 NB0CADOUT14 NB0CADOUTJ14 NB0CADOUT13 NB0CADOUTJ13 NB0CADOUT12 NB0CADOUTJ12 NB0CADOUT11 NB0CADOUTJ11 NB0CADOUT10 NB0CADOUTJ10 NB0CADOUT9 NB0CADOUTJ9 NB0CADOUT8 NB0CADOUTJ8 NB0CADOUT7 NB0CADOUTJ7 NB0CADOUT6 NB0CADOUTJ6 NB0CADOUT5 NB0CADOUTJ5 NB0CADOUT4 NB0CADOUTJ4 NB0CADOUT3 NB0CADOUTJ3 NB0CADOUT2 NB0CADOUTJ2 NB0CADOUT1 NB0CADOUTJ1 NB0CADOUT0 NB0CADOUTJ0

NB0HTTCLKOUT1 NB0HTTCLKOUTJ1 NB0HTTCLKOUT0 NB0HTTCLKOUTJ0

CPUHTTCTLIN1 CPUHTTCTLINJ1 NB0HTTCTLOUT NB0HTTCTLOUTJ

U81A

D29

VLDT0_A

D27

VLDT0_A

D25

VLDT0_A

C28

VLDT0_A

C26

VLDT0_A

B29

VLDT0_A

B27

VLDT0_A

T25

L0_CADIN_H15

R25

L0_CADIN_L15

U27

L0_CADIN_H14

U26

L0_CADIN_L14

V25

L0_CADIN_H13

U25

L0_CADIN_L13

W27

L0_CADIN_H12

W26

L0_CADIN_L12

AA27

L0_CADIN_H11

AA26

L0_CADIN_L11

AB25

L0_CADIN_H10

AA25

L0_CADIN_L10

AC27

L0_CADIN_H9

AC26

L0_CADIN_L9

AD25

L0_CADIN_H8

AC25

L0_CADIN_L8

T27

L0_CADIN_H7

T28

L0_CADIN_L7

V29

L0_CADIN_H6

U29

L0_CADIN_L6

V27

L0_CADIN_H5

V28

L0_CADIN_L5

Y29

L0_CADIN_H4

W29

L0_CADIN_L4

AB29

L0_CADIN_H3

AA29

L0_CADIN_L3

AB27

L0_CADIN_H2

AB28

L0_CADIN_L2

AD29

L0_CADIN_H1

AC29

L0_CADIN_L1

AD27

L0_CADIN_H0

AD28

L0_CADIN_L0

Y25

L0_CLKIN_H1

W25

L0_CLKIN_L1

Y27

L0_CLKIN_H0

Y28

L0_CLKIN_L0

R27

L0_CTLIN_H1

R26

L0_CTLIN_L1

T29

L0_CTLIN_H0

R29

L0_CTLIN_L0

62.10055.091

SB 0127

ME : 60.10055.091 (3MM HEIGHT)

VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H0

L0_CADOUT_L0 L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

AH29 AH27 AG28 AG26 AF29 AE28 AF25

N26 N27 L25 M25 L26 L27 J25 K25 G25 H25 G26 G27 E25 F25 E26 E27 N29 P29 M28 M27 L29 M29 K28 K27 H28 H27 G29 H29 F28 F27 E29 F29

J26 J27 J29 K29

N25 P25 P28 P27

CPUCADOUT15 CPUCADOUTJ15 CPUCADOUT14 CPUCADOUTJ14 CPUCADOUT13 CPUCADOUTJ13 CPUCADOUT12 CPUCADOUTJ12 CPUCADOUT11 CPUCADOUTJ11 CPUCADOUT10 CPUCADOUTJ10 CPUCADOUT9 CPUCADOUTJ9 CPUCADOUT8 CPUCADOUTJ8 CPUCADOUT7 CPUCADOUTJ7 CPUCADOUT6 CPUCADOUTJ6 CPUCADOUT5 CPUCADOUTJ5 CPUCADOUT4 CPUCADOUTJ4 CPUCADOUT3 CPUCADOUTJ3 CPUCADOUT2 CPUCADOUTJ2 CPUCADOUT1 CPUCADOUTJ1 CPUCADOUT0 CPUCADOUTJ0

CPUHTTCLKOUT1 CPUHTTCLKOUTJ1 CPUHTTCLKOUT0 CPUHTTCLKOUTJ0

CPUHTTCTLOUT0 CPUHTTCTLOUTJ0

HTT for CPU sideB Receive power and NB sideA Transmit power

1D2V_HT0B_S0

12

Used SideA Power Plane

CPUHTTCLKOUT1 11 CPUHTTCLKOUTJ1 11 CPUHTTCLKOUT0 11 CPUHTTCLKOUTJ0 11

CPUHTTCTLOUT0 11 CPUHTTCTLOUTJ0 11

C242

C242 SC4D7U10V5ZY

SC4D7U10V5ZY

LAYOUT: Place bypass cap on topside of board near HTT power pins that are not connected directly to downstream HTT device, but connected internally to other HTT power pins.

CPUCADOUT[15..0] 11 CPUCADOUTJ[15..0] 11

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

A

B

C

D

Date: Sheet

CPU(1/4)_HyperTransport I/F

Bolsena

458Thursday, March 31, 2005

of

E

of

-1

A

VREF_DDR_MEM

B

C

D

E

NOTE: Test with passive probes only. NOTE: Install to bypass op-amp

2D5V_S3

4 4

12

R291

R291 100R2F

100R2F

R290

R290 100R2F

100R2F

12

C441

C441 SCD1U

SCD1U

12

VREF_DDR_MEM

C440

C440 SCD1U

SCD1U

12

C439

C439 SC1000P50V2KX

SC1000P50V2KX

2D5V_S3

M_DATA[63..0]9

1 2 1 2

LAYOUT: Locate close to DIMMs.

NOTE: Remove to bypass op-amp

3 3

VREF_DDR_CLAW

2D5V_S3

12

2 2

Place it near CPU

1 1

12

R197

R197 100R2F

100R2F

R198

R198 100R2F

100R2F

C309

C309 SCD1U

SCD1U

12

C311

C311 SCD1U

SCD1U

VREF_DDR_CLAW

LAYOUT: Locate close to CPU.

R203

1 2

R204

1 2

R199

1 2

R200

1 2

121R2F

A

M_CLK7 M_CLK#7

M_CLK6 M_CLK#6

M_CLK5 M_CLK#5

M_CLK4 M_CLK#4

12

C312

C312 SC1000P50V2KX

SC1000P50V2KX

M_ADM[7..0]9

M_DQS[7..0]9

B

TP47TPAD30 TP47TPAD30

VREF_DDR_CLAW

R206 34D8R2FR206 34D8R2F R205 34D8R2FR205 34D8R2F

DDRVTT_SENSE

MEMZN MEMZP

M_DATA63 M_DATA62 M_DATA61 M_DATA60 M_DATA59 M_DATA58 M_DATA57 M_DATA56 M_DATA55 M_DATA54 M_DATA53 M_DATA52 M_DATA51 M_DATA50 M_DATA49 M_DATA48 M_DATA47 M_DATA46 M_DATA45 M_DATA44 M_DATA43 M_DATA42 M_DATA41 M_DATA40 M_DATA39 M_DATA38 M_DATA37 M_DATA36 M_DATA35 M_DATA34 M_DATA33 M_DATA32 M_DATA31 M_DATA30 M_DATA29 M_DATA28 M_DATA27 M_DATA26 M_DATA25 M_DATA24 M_DATA23 M_DATA22 M_DATA21 M_DATA20 M_DATA19 M_DATA18 M_DATA17 M_DATA16 M_DATA15 M_DATA14 M_DATA13 M_DATA12 M_DATA11 M_DATA10 M_DATA9 M_DATA8 M_DATA7 M_DATA6 M_DATA5 M_DATA4 M_DATA3 M_DATA2 M_DATA1 M_DATA0

M_ADM8 M_ADM7 M_ADM6 M_ADM5 M_ADM4 M_ADM3 M_ADM2 M_ADM1 M_ADM0 M_DQS8 M_DQS7 M_DQS6 M_DQS5 M_DQS4 M_DQS3 M_DQS2 M_DQS1 M_DQS0

AE13

AG12

D14 C14

A16 B15 A12 B11 A17 A15 C13 A11 A10

C11

AC1 AC3

AC2 AD1 AE1 AE3

AG3

AJ4

AE2

AF1

AH3

AJ3 AJ5 AJ6

AJ7 AH9 AG5 AH5

AJ9

AJ10

AH11

AJ11

AH15

AJ15

AG11

AJ12 AJ14 AJ16

A13

AA1 AG1 AH7

AH13

A14

AB1

AJ2

AJ8

AJ13

B9 C7 A6

A9 A5 B5 C5 A4 E2 E1 A3 B3 E3

F1 G2 G1

L3

L1 G3

J2

L2 M1 W1 W3

W2

Y1

R1

A7

C2

H1

T1

A8

D1

J1

VTT_SENSE

MEMVREF1 MEMZN

MEMZP

MEMDATA63 MEMDATA62 MEMDATA61 MEMDATA60 MEMDATA59 MEMDATA58 MEMDATA57 MEMDATA56 MEMDATA55 MEMDATA54 MEMDATA53 MEMDATA52 MEMDATA51 MEMDATA50 MEMDATA49 MEMDATA48 MEMDATA47 MEMDATA46 MEMDATA45 MEMDATA44 MEMDATA43 MEMDATA42 MEMDATA41 MEMDATA40 MEMDATA39 MEMDATA38 MEMDATA37 MEMDATA36 MEMDATA35 MEMDATA34 MEMDATA33 MEMDATA32 MEMDATA31 MEMDATA30 MEMDATA29 MEMDATA28 MEMDATA27 MEMDATA26 MEMDATA25 MEMDATA24 MEMDATA23 MEMDATA22 MEMDATA21 MEMDATA20 MEMDATA19 MEMDATA18 MEMDATA17 MEMDATA16 MEMDATA15 MEMDATA14 MEMDATA13 MEMDATA12 MEMDATA11 MEMDATA10 MEMDATA9 MEMDATA8 MEMDATA7 MEMDATA6 MEMDATA5 MEMDATA4 MEMDATA3 MEMDATA2 MEMDATA1 MEMDATA0

MEMDQS17 MEMDQS16 MEMDQS15 MEMDQS14 MEMDQS13 MEMDQS12 MEMDQS11 MEMDQS10 MEMDQS9 MEMDQS8 MEMDQS7 MEMDQS6 MEMDQS5 MEMDQS4 MEMDQS3 MEMDQS2 MEMDQS1 MEMDQS0

U81BU81B

MEMRESET_L

MEMCLK_H7 MEMCLK_L7 MEMCLK_H6 MEMCLK_L6 MEMCLK_H5 MEMCLK_L5 MEMCLK_H4 MEMCLK_L4 MEMCLK_H3 MEMCLK_L3 MEMCLK_H2 MEMCLK_L2 MEMCLK_H1 MEMCLK_L1 MEMCLK_H0 MEMCLK_L0

MEMCS_L7 MEMCS_L6 MEMCS_L5 MEMCS_L4 MEMCS_L3 MEMCS_L2 MEMCS_L1 MEMCS_L0

MEMRASA_L MEMCASA_L

MEMWEA_L

MEMBANKA1 MEMBANKA0

MEMADDA13 MEMADDA12 MEMADDA11 MEMADDA10

MEMADDA9 MEMADDA8 MEMADDA7 MEMADDA6 MEMADDA5 MEMADDA4 MEMADDA3 MEMADDA2 MEMADDA1 MEMADDA0

MEMRASB_L MEMCASB_L

MEMWEB_L

MEMBANKB1 MEMBANKB0

MEMADDB13 MEMADDB12 MEMADDB11 MEMADDB10

MEMADDB9 MEMADDB8 MEMADDB7 MEMADDB6 MEMADDB5 MEMADDB4 MEMADDB3 MEMADDB2 MEMADDB1 MEMADDB0

MEMCHECK7 MEMCHECK6 MEMCHECK5 MEMCHECK4 MEMCHECK3 MEMCHECK2 MEMCHECK1 MEMCHECK0

C

VTT_A VTT_A VTT_A VTT_A VTT_B VTT_B VTT_B VTT_B

MEMCKEA MEMCKEB

NC_E13 NC_C12

NC_E14 NC_D12

D17 A18 B17 C17 AF16 AG16 AH16 AJ17

AG10 AE8

AE7 D10

C10 E12 E11 AF8 AG8 AF10 AE10 V3 V4 K5 K4 R5 P5 P3 P4

D8 C8 E8 E7 D6 E6 C4 E5

H5 D4 G5

K3 H3

E13 C12 E10 AE6 AF3 M5 AE5 AB5 AD3 Y5 AB4 Y3 V5 T5 T3 N5

H4 F5 F4

L5 J5

E14 D12 E9 AF6 AF4 M4 AD5 AC5 AD4 AA5 AB3 Y4 W5 U5 T4 M3

N3 N1 U3 V1 N2 P1 U1 U2

1D25V_S3

MEMRESET# M_CKE#0

M_CKE#1 M_CLK7

M_CLK#7 M_CLK6 M_CLK#6 M_CLK5 M_CLK#5 M_CLK4 M_CLK#4

M_CLK1 M_CLK#1 M_CLK0 M_CLK#0

M_CS#7 M_CS#6 M_CS#5 M_CS#4 M_CS#3 M_CS#2 M_CS#1 M_CS#0

M_ARAS# M_ACAS# M_AWE#

M_ABS#1 M_ABS#0

RSVD_M_AA15 RSVD_M_AA14 M_AA13 M_AA12 M_AA11 M_AA10 M_AA9 M_AA8 M_AA7 M_AA6 M_AA5 M_AA4 M_AA3 M_AA2 M_AA1 M_AA0

M_BRAS# M_BCAS# M_BWE#

M_BBS#1 M_BBS#0

RSVD_M_BA15 RSVD_M_BA14 M_BA13 M_BA12 M_BA11 M_BA10 M_BA9 M_BA8 M_BA7 M_BA6 M_BA5 M_BA4 M_BA3 M_BA2 M_BA1 M_BA0

CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0

12

For REGISTED DIMM Only UNBUFFER DIMM NC

12

C267

M_CKE#0 8,9 M_CKE#1 8,9

M_CLK7 8 M_CLK#7 8 M_CLK6 8 M_CLK#6 8 M_CLK5 8 M_CLK#5 8 M_CLK4 8 M_CLK#4 8

M_CS#3 8,9 M_CS#2 8,9 M_CS#1 8,9 M_CS#0 8,9

M_ARAS# 8,9 M_ACAS# 8,9 M_AWE# 8,9

M_ABS#1 8,9 M_ABS#0 8,9

M_BRAS# 8,9 M_BCAS# 8,9 M_BWE# 8,9

M_BBS#1 8,9 M_BBS#0 8,9

TP60

TPAD30

TP90

TPAD30

TP59

TPAD30

TP83

TPAD30

TP89

TPAD30

TP88

TPAD30

TP84

TPAD30

TP85

TPAD30

C267 SC1000P50V2KX

SC1000P50V2KX

M_CLK#1 M_CLK#0 M_CLK1 M_CLK0

M_AA[13..0] 8,9

M_BA[13..0] 8,9

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

C266

C266 SCD1U

SCD1U

AMD suggested M_AA13 connect to DIMM pin123

AMD suggested M_BA13 connect to DIMM pin123

D

2D5V_S3

RN36

1

8

2

7

3

6

45

SRN10K-2

M_DQS8 M_ADM8

MEMRESET# M_CS#7 M_CS#6 M_CS#5 M_CS#4 RSVD_M_AA15 RSVD_M_AA14 RSVD_M_BA15 RSVD_M_BA14

TP86 TPAD30TP86 TPAD30 TP87 TPAD30TP87 TPAD30

TP44 TPAD30TP44 TPAD30 TP53 TPAD30TP53 TPAD30 TP54 TPAD30TP54 TPAD30 TP49 TPAD30TP49 TPAD30 TP61 TPAD30TP61 TPAD30 TP50 TPAD30TP50 TPAD30 TP55 TPAD30TP55 TPAD30 TP51 TPAD30TP51 TPAD30 TP52 TPAD30TP52 TPAD30

NOT SUPPORT ECC CHECK AMD suggested remove PULL-HI resistor.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU(2/4)_DDR

Bolsena

558Thursday, March 31, 2005

E

-1

of

-1

A

2D5V_VDDA_S0

2D5V_S0

1 2

0R0603-PAD

12

C239

C239 SC10U10V5ZY

SC10U10V5ZY

SC 0308

R173

R174

1 2

DY

0R3-U

2D5V_CPUR_S0

1 2

0R0805-PAD

12

TC3

ST100U4VBM-U

4 4

2D5V_CPUA_S0

AMD SUGGEST TO USE 2D5V_CPUA_S0

KEMET,NT:5.7, B2 size ST100U4VBM-1 (80.10716.321)

3 3

2D5V_S0

2 2

DY

DBREQJ DBRDY TCK TMS TDI TRST_L TDO

2D5V_S3

CHANGE FROM 1KR3 TO 680R2 FOR AMD CHECK LIST

NC_AG17 NC_AJ18 NC_D18

NC_B19

1 1

NC_C19 NC_D20 NC_C21

Iripple=1.1A,ESR=70mohm

SANYO, NT$:6.1 Iripple=1.1A,ESR=70mohm

3.5/2.8/2.0

77.21071.031

678

RN28

12

C160

C160 SCD1U

SCD1U

R207

1 2

1 2 3 4 5

RN28

123

4 5

680R3F

DY

RN31 SRN680-URN31 SRN680-U

8 7 6

RN33

SRN680-U

A

DY

SRN680-U

AMD SUGGEST TO USE 100 ~ 300UH

Change L270H

R175

SC 0308

2D5V_VDDA_S0

12

LAYOUT: Route trace 50 mils wide and 500 to 750 mils long between these caps.

12

C240

C240 SC4D7U10V5ZY

SC4D7U10V5ZY

1D2V_HT0B_S0

12

R155

R156

680R3F

DY

R153 44D2R2FR153 44D2R2F

1 2

R154 44D2R2FR154 44D2R2F

1 2

AMD suggest voltege from 2D5V_S0 to 2D5V_S3

differentially impedance 100

B

3D3V_S0

12

C210

C210 SC1U10V3KX

SC1U10V3KX

DY

2D5V_S0

DY

LDT_RST#13,18 SB_CPUPWRGD18 LDT_STP#13,18

1 2

1D25V_S3

2D5V_S0

SRN680-U

LDT_RST# SB_CPUPWRGD LDT_STP#

12

C243

C243 SC3300P50V2KX

SC3300P50V2KX

12

C211

C211 SC1000P50V2KX

SC1000P50V2KX

2D5V_S3

R616 820R3R616 820R3

1 2

R605 820R3R605 820R3

1 2

R189 680R3FR189 680R3F R190 680R3FR190 680R3F R606 680R3FR606 680R3F

LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil traces to exit ball field) and 500 mils long.

12

C241

C241 SCD22U16V3ZY

SCD22U16V3ZY

12

C212

C212 SC1000P50V2KX

SC1000P50V2KX

CPUCLK3

CPUCLK#3

1 2 1 2 1 2

Validation Test Points

NC_C15 NC_AE23 NC_AF23 NC_AF22 NC_AF21

B

LAYOUT: Place close to the CPU.

TP56

TPAD30

TP42

TPAD30

TP39

TPAD30

TP41

TPAD30

TP40

TPAD30

LDT_RST# CLKIN CLKIN# CORE_SENSE VDDIOFB VDDIOFBJ VDDIOSENSE NC_AE24 NC_AF24

C

Iomax=120mA

U73

1

SHDN#

2

GND

3

IN

G913C-U

DY

COREFB41

COREFB#41

C790

C790 SC3900P50V3KX

SC3900P50V3KX

C789

C789 SC3900P50V3KX

SC3900P50V3KX

1 2 1 2

RN32

C

R193

R193 R194

R194

123

12

680R3F

680R3F 680R3F

680R3F

678

TP38

TP38 TP34

TP34 TP35

TP35 TP43

TP43 TP46

TP46 TP45

TP45 TP48

TP48 TP27

TP27 TP26

TP26

4 5

5

SET

4

OUT

L0_REF1 L0_REF0

COREFB COREFB# CORE_SENSE

VDDIOFB VDDIOFBJ VDDIOSENSE

CLKIN

R618

R618 169R2F

169R2F

CLKIN# NC_AJ23 NC_AH23 NC_AE24 NC_AF24

DBRDY NC_C15 TMS

TCK TRST_L TDI

NC_C18 NC_A19

NC_AE23 NC_AF23 NC_AF22 NC_AF21

DY

TPAD30

TPAD30 TPAD30

TPAD30

2D5V_CPUA_S0

2D5V_VDDA_VREF

DY

12

C734

C734 SC1U10V3KX

SC1U10V3KX

DY

AH25

AJ25 AF20

AE18

AJ27

AF27 AE26

A23 A24 B23

AE12 AF12 AE11

AJ21

AH21

AJ23

AH23

AE24 AF24

C16

AG15 AH17

C15 E20

E17 B21 A21

C18 A19 A28

AJ28

AE23 AF23 AF22 AF21

C1

J3

R3

AA2

D3

AG2

B18

AH1

AE21

C20

AG4

C6 AG6 AE9 AG9

12

C733

C733 SC22P50V2JN-1

SC22P50V2JN-1

U81CU81C

VDDA1 VDDA2

RESET_L PWROK LDTSTOP_L

L0_REF1 L0_REF0

COREFB_H COREFB_L CORE_SENSE

VDDIOFB_H VDDIOFB_L VDDIO_SENSE

CLKIN_H CLKIN_L

NC_AJ23 NC_AH23

NC_AE24 NC_AF24

VTT_A VTT_B

DBRDY NC_C15 TMS

TCK TRST_L TDI

NC_C18 NC_A19 KEY1

KEY0 NC_AE23

NC_AF23 NC_AF22 NC_AF21

NC_C1 NC_J3 NC_R3 NC_AA2 NC_D3 NC_AG2 NC_B18 NC_AH1 NC_AE21 NC_C20 NC_AG4 NC_C6 NC_AG6 NC_AE9 NC_AG9

D

12

DY

R604

R1

20KR2F

12

R152

R152 20KR2F

20KR2F

DY

Vout = 1.25*(1+ R1/R2)

R2

THERMTRIP#

THERMDA THERMDC

VID4 VID3 VID2 VID1 VID0

NC_AG18 NC_AH18 NC_AG17

NC_AJ18

A20 A26

A27 AG13

AF14 AG14 AF15 AE15

AG18 AH18 AG17 AJ18

VID4 VID3 VID2 VID1 VID0

NC_AG18 NC_AH18 NC_AG17 NC_AJ18

THERMTRIP_L

THERMDP 23 THERMDN 23

TP37 TPAD30TP37 TPAD30 TP36 TPAD30TP36 TPAD30

VID[4..0] 41

E

LAYOUT: Route FBCLKOUT_H/L

differentially impedance 80

12

R617

R617 80D6R2F

80D6R2F

R191

1 2

DUMMY-R3

2D5V_S3

THERMTRIP#Level shift to SB400

2D5V_S0

12

R192

R192 680R3F

680R3F

THERMTRIP#

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

CPU(3/4)_Control & Debug

2

1

NS3

Bolsena

3

Q10

Q10 MMBT3904-U1

MMBT3904-U1

R195

1 2

SB 0201

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1KR2

E

2D5V_S0

658Thursday, March 31, 2005

CPU_THERMTRIP# 23

of

-1

FBCLKOUT_H

FBCLKOUT_L

DBREQ_L

NC_D20 NC_C21 NC_D18 NC_C19 NC_B19

TDO

NC_AF18

NC_D22 NC_C22

NC_B13

NC_B7 NC_C3 NC_K1 NC_R2

NC_AA3

NC_F3 NC_C23 NC_AG7

NC_AE22

NC_C24 NC_A25

NC_C9

FBCLKOUT

AH19 AJ19

FBCLKOUTJ

DBREQJ

AE19

NC_D20

D20

NC_C21

C21

NC_D18

D18

NC_C19

C19

NC_B19

B19

TDO

A22

AF18

Connect to VDDIO for AMD suggest.

D22 C22

B13 B7 C3 K1 R2 AA3 F3 C23 AG7 AE22 C24 A25 C9

D

U81EU81E

Y17

VSS

K17

VSS

H17

VSS

F17

VSS

E18

VSS

AJ26

VSS

AE29

VSS

AC16

VSS

AA16

VSS

J16

VSS

G16

VSS

E16

VSS

AH14

4 4

3 3

2 2

1 1

AD15 AB15

K15 E15

D16 AE14 AC14 AA14

G14

AF17 AD13 AB13

Y13 K13 H13

F13 AH12 AC12 AA12

G12

B12 AD11 AB11

Y11

K11

H11

F11 AH10 AC10

W10

U10

R10

N10

G10

B10

AD9

AH8 AC8

AD7

AB7

AH6 AC6

AA6

AH4 AH2

AD2

AB2

C29 AH28

AF28

AC28

W28

R28

VSS VSS VSS VSS VSS VSS VSS VSS VSS

J14

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

L10

VSS

J10

VSS VSS VSS VSS

Y9

VSS

V9

VSS

T9

VSS

P9

VSS

M9

VSS

K9

VSS

H9

VSS

F9

VSS VSS VSS

W8

VSS

U8

VSS

R8

VSS

N8

VSS

L8

VSS

J8

VSS

G8

VSS

B8

VSS VSS VSS

V7

VSS

T7

VSS

P7

VSS

M7

VSS

K7

VSS

H7

VSS

F7

VSS VSS VSS VSS

U6

VSS

R6

VSS

N6

VSS

L6

VSS

J6

VSS

G6

VSS

B6

VSS VSS

B4

VSS VSS VSS VSS

Y2

VSS

V2

VSS

T2

VSS

P2

VSS

M2

VSS

K2

VSS

H2

VSS

F2

VSS VSS VSS VSS VSS VSS VSS

L28

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

A

VCC_CORE_S0 2D5V_S3

N20 L20 J20 AF19 AD19 AB19 Y19 K19 H19 F19 D19 AC18 AA18 G18 B16 AD17 AB17 H15 F15 G28 D28 B28 C27 AH26 AF26 AD26 Y26 T26 M26 H26 D26 B26 C25 B25 AJ24 AG24 AC24 AA24 W24 U24 R24 N24 J24 G24 E24 AG23 AD23 AB23 Y23 V23 T23 P23 K23 H23 F23 D23 AJ22 AH22 AG22 AC22 AA22 AG29 U22 R22 N22 L22 J22 G22 E22 B22 AG21 AD21 Y21 V21 T21 P21 M21 K21 H21 F21 D21 AJ20 AG20 AE20 AC20 AA20 W20 U20 R20 G20 J18 AE16 Y15 B14 J12 AA10 AB9 AA8 Y7 W6 AF2 D2 AG27 AG25 L24 M23 W22 AB21 AH20 B2

A

AC15

H18 B20 E21 H22

H24 F26

V10 G13 K14 Y14

AB14

G15

AA15

H16 K16 Y16

AB16

G17

AA17 AC17 AE17

F18 K18

Y18 AB18 AD18 AG19

E19

G19 AC19 AA19

F20

H20

K20

M20

P20

T20

V20

Y20 AB20 AD20

G21

N21

R21

U21

W21 AA21 AC21

F22 K22 M22 P22 T22 V22

Y22 AB22 AD22

E23

G23

N23

R23

U23

W23 AA23 AC23

B24 D24 F24 K24 M24 P24 T24 V24

Y24 AB24 AD24 AH24 AE25

K26

P26

V26

U81DU81D

L7

VDD VDD VDD VDD VDD VDD

J23

VDD VDD VDD

N7

VDD

L9

VDD VDD VDD VDD VDD VDD VDD

J15

VDD VDD VDD VDD VDD VDD VDD

J17

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

J19

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

J21

VDD

L21

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

L23

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

E4 G4 J4 L4 N4 U4 W4 AA4 AC4 AE4 D5 AF5 F6 H6 K6 M6 P6 T6 V6 Y6 AB6 AD6 D7 G7 J7 AA7 AC7 AF7 F8 H8 AB8 AD8 D9 G9 AC9 AF9 F10 AD10 D11 AF11 F12 AD12 D13 AF13 F14 AD14 F16 AD16 D15 R4

N28 U28 AA28 AE27 R7 U7 W7 K8 M8 P8 T8 V8 Y8 J9 N9 R9 U9 W9 AA9 H10 K10 M10 P10 T10 Y10 AB10 G11 J11 AA11 AC11 H12 K12 Y12 AB12 J13 AA13 AC13 H14 AB26 E28 J28

B

VCC_CORE_S0

B

VCC_CORE_S0

1 2

0.22u x 4

DY

2D5V_S3

12

1D25V_S3

12

0.22u x 2

C

LAYOUT: Place in uPGA socket cavity.

0.22u x 6

12

1 2

SCD22U16V3ZY

DY

12

SCD22U16V3ZY

C274

SCD22U16V3ZY

C269

SCD22U16V3ZY

C794

DY

SCD22U16V3ZY

C339

SCD22U16V3ZY

1D25V_S3

4.7u x 2

12

C791

C316

SCD22U16V3ZY

12

C814

C815

1 2

SC10U10V5ZY

SCD22U16V3ZY

10u x 2

12

SCD22U16V3ZY

SC4D7U10V5ZY

C

12

C319

SCD22U16V3ZY

12

C265

SC4D7U10V5ZY

12

C273

12

C276

12

C792

SC10U10V5ZY

C341

SCD22U16V3ZY

C318

SCD22U16V3ZY

12

C271

SCD22U16V3ZY

LAYOUT: Place on backside of processor.

C816

C813

1 2

SCD22U16V3ZY

DY

12

C268

C340

SCD22U16V3ZY

12

C275

SCD22U16V3ZY

D

10u x 4

12

C315

C818

SCD22U16V3ZY

2D5V_S3

12

C320

10u x 1 4.7u x 6

SC10U10V5ZY

12

C313

C272

SC4D7U10V5ZY

SC10U10V5ZY

12

C314

SC4D7U10V5ZY

C817

SC10U10V5ZY

12

C365

SC4D7U10V5ZY

D

C793

SC10U10V5ZY

12

C317

SC4D7U10V5ZY

E

12

C367

C366

SC4D7U10V5ZY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

CPU(4/4)_Power

Bolsena

758Thursday, March 31, 2005

E

-1

of

-1

A

M_AA0 M_AA1 M_AA2 M_AA3 M_AA4 M_AA5 M_AA6 M_AA7 M_AA8 M_AA9 M_AA10 M_AA11

4 4

3 3

2 2

1 1

M_ARAS#5,9 M_ACAS#5,9 M_AWE#5,9

VREF_DDR_MEM VREF_DDR_MEM

Layout trace 20 mil Layout trace 20 mil

M_AA12 M_ABS#0

M_ABS#1 M_DATA_R_0

M_DATA_R_1 M_DATA_R_2 M_DATA_R_3 M_DATA_R_4 M_DATA_R_5 M_DATA_R_6 M_DATA_R_7 M_DATA_R_8 M_DATA_R_9 M_DATA_R_10 M_DATA_R_11 M_DATA_R_12 M_DATA_R_13 M_DATA_R_14 M_DATA_R_15 M_DATA_R_16 M_DATA_R_17 M_DATA_R_18 M_DATA_R_19 M_DATA_R_20 M_DATA_R_21 M_DATA_R_22 M_DATA_R_23 M_DATA_R_24 M_DATA_R_25 M_DATA_R_26 M_DATA_R_27 M_DATA_R_28 M_DATA_R_29 M_DATA_R_30 M_DATA_R_31 M_DATA_R_32 M_DATA_R_33 M_DATA_R_34 M_DATA_R_35 M_DATA_R_36 M_DATA_R_37 M_DATA_R_38 M_DATA_R_39 M_DATA_R_40 M_DATA_R_41 M_DATA_R_42 M_DATA_R_43 M_DATA_R_44 M_DATA_R_45 M_DATA_R_46 M_DATA_R_47 M_DATA_R_48 M_DATA_R_49 M_DATA_R_50 M_DATA_R_51 M_DATA_R_52 M_DATA_R_53 M_DATA_R_54 M_DATA_R_55 M_DATA_R_56 M_DATA_R_57 M_DATA_R_58 M_DATA_R_59 M_DATA_R_60 M_DATA_R_61 M_DATA_R_62 M_DATA_R_63

12

C458

C458 SCD1U

SCD1U

A

3D3V_S0

C456

C456 SCD1U

SCD1U

TP62

TP62 TPAD30

TPAD30

DDR1

112

A0

111

A1

110

A2

109

A3

108

A4

107

A5

106

A6

105

A7

102

A8

101

A9

115

A10 / AP

100

A11

99

A12

117

BA0

116

BA1

5

DQ0

7

DQ1

13

DQ2

17

DQ3

6

DQ4

8

DQ5

14

DQ6

18

DQ7

19

DQ8

23

DQ9

29

DQ10

31

DQ11

20

DQ12

24

DQ13

30

DQ14

32

DQ15

41

DQ16

43

DQ17

49

DQ18

53

DQ19

42

DQ20

44

DQ21

50

DQ22

54

DQ23

55

DQ24

59

DQ25

65

DQ26

67

DQ27

56

DQ28

60

DQ29

66

DQ30

68

DQ31

127

DQ32

129

DQ33

135

DQ34

139

DQ35

128

DQ36

130

DQ37

136

DQ38

140

DQ39

141

DQ40

145

DQ41

151

DQ42

153

DQ43

142

DQ44

146

DQ45

152

DQ46

154

DQ47

163

DQ48

165

DQ49

171

DQ50

175

DQ51

164

DQ52

166

DQ53

172

DQ54

176

DQ55

177

DQ56

181

DQ57

187

DQ58

189

DQ59

178

DQ60

182

DQ61

188

DQ62

190

DQ63

71

CB0

73

CB1

79

CB2

83

CB3

72

CB4

74

CB5

80

CB6

84

CB7

85

NC#85

86

NC#86/(RESET#)

97

NC#97/A13

98

NC#98/BA2

123

NC#123

124

NC#124

200

NC#200

118

/RAS

120

/CAS

119

/WE

1

VREF

2

VREF

197

VDDSPD

199

VDDID

201

GND

/CS0 /CS1

CKE0 CKE1

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8

CK0

/CK0

CK1

/CK1

CK2

/CK2

SCL SDA

SA0 SA1 SA2

VDD VDD VDD VDD VDD VDD VDD

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS

REVERSE TYPE 5.2MM

VSS

VSS GND

121 122

96 95

11 25 47 61 133 147 169 183 77

12 26 48 62 134 148 170 184 78

35 37 160 158 89 91

195 193

194 196 198

9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192

3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186

202

B

M_CS#0 5,9

M_CKE#0

M_DQS_R0 M_DQS_R1 M_DQS_R2 M_DQS_R3 M_DQS_R4 M_DQS_R5 M_DQS_R6 M_DQS_R7

M_ADM_R0 M_ADM_R1 M_ADM_R2 M_ADM_R3

M_ADM_R5 M_ADM_R6 M_ADM_R7

DDR_CLK0 DDR_CLK#0

SMBC_SB SMBD_SB

NOT SUPPORT ECC CHECK AMD suggested pull-low

1ST 62.10017.701 - 2ND 62.10017.201

Part Number = 62.10017.201

DDR-SODIMM-R-U2

ME : 62.10017.201 2nd :62.10017.701

B

M_CS#1 5,9 M_CKE#0 5,9 M_CKE#1 5,9

M_ADM#0 M_ADM#1 M_ADM#2 M_ADM#3 M_ADM#4 M_ADM#5 M_ADM#6 M_ADM#7

M_CLK5 5 M_CLK#5 5 M_CLK7 5 M_CLK#7 5

2D5V_S3

C

DDR2

M_BA0 M_BA1 M_BA2 M_BA3 M_BA4 M_BA5 M_BA6 M_BA7 M_BA8 M_BA9 M_BA10 M_BA11 M_BA12

M_BBS#0 M_BBS#1

M_DATA_R_0 M_DATA_R_1 M_DATA_R_2 M_DATA_R_3 M_DATA_R_4 M_DATA_R_5 M_DATA_R_6 M_DATA_R_7 M_DATA_R_8 M_DATA_R_9 M_DATA_R_10 M_DATA_R_11 M_DATA_R_12 M_DATA_R_13 M_DATA_R_14 M_DATA_R_15 M_DATA_R_16 M_DATA_R_17 M_DATA_R_18 M_DATA_R_19 M_DATA_R_20 M_DATA_R_21 M_DATA_R_22 M_DATA_R_23 M_DATA_R_24 M_DATA_R_25 M_DATA_R_26 M_DATA_R_27 M_DATA_R_28 M_DATA_R_29 M_DATA_R_30 M_DATA_R_31 M_DATA_R_32 M_DATA_R_33 M_DATA_R_34 M_DATA_R_35 M_DATA_R_36 M_DATA_R_37 M_DATA_R_38 M_DATA_R_39 M_DATA_R_40 M_DATA_R_41 M_DATA_R_42 M_DATA_R_43 M_DATA_R_44 M_DATA_R_45 M_DATA_R_46 M_DATA_R_47 M_DATA_R_48 M_DATA_R_49 M_DATA_R_50 M_DATA_R_51 M_DATA_R_52 M_DATA_R_53 M_DATA_R_54 M_DATA_R_55 M_DATA_R_56 M_DATA_R_57 M_DATA_R_58 M_DATA_R_59 M_DATA_R_60 M_DATA_R_61 M_DATA_R_62 M_DATA_R_63

M_BA13M_AA13

M_BRAS#5,9 M_BCAS#5,9 M_BWE#5,9

12

3D3V_S0

C497

C498

SCD1U

TP63

TP63 TPAD30

TPAD30

DDR2

112

A0

111

A1

110

A2

109

A3

108

A4

107

A5

106

A6

105

A7

102

A8

101

A9

115

A10 / AP

100

A11

99

A12

117

BA0

116

BA1

5

DQ0

7

DQ1

13

DQ2

17

DQ3

6

DQ4

8

DQ5

14

DQ6

18

DQ7

19

DQ8

23

DQ9

29

DQ10

31

DQ11

20

DQ12

24

DQ13

30

DQ14

32

DQ15

41

DQ16

43

DQ17

49

DQ18

53

DQ19

42

DQ20

44

DQ21

50

DQ22

54

DQ23

55

DQ24

59

DQ25

65

DQ26

67

DQ27

56

DQ28

60

DQ29

66

DQ30

68

DQ31

127

DQ32

129

DQ33

135

DQ34

139

DQ35

128

DQ36

130

DQ37

136

DQ38

140

DQ39

141

DQ40

145

DQ41

151

DQ42

153

DQ43

142

DQ44

146

DQ45

152

DQ46

154

DQ47

163

DQ48

165

DQ49

171

DQ50

175

DQ51

164

DQ52

166

DQ53

172

DQ54

176

DQ55

177

DQ56

181

DQ57

187

DQ58

189

DQ59

178

DQ60

182

DQ61

188

DQ62

190

DQ63

71

CB0

73

CB1

79

CB2

83

CB3

72

CB4

74

CB5

80

CB6

84

CB7

85

NC#85

86

NC#86/(RESET#)

97

NC#97/A13

98

NC#98/BA2

123

NC#123

124

NC#124

200

NC#200

118

/RAS

120

/CAS

119

/WE

1

VREF

2

VREF

197

VDDSPD

199

VDDID

201

GND

SKT-SODIMM2006U1

C

121

/CS0

122

/CS1

96

CKE0

95

CKE1

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8

CK0

/CK0

CK1

/CK1

CK2

/CK2

SCL SDA

SA0 SA1 SA2

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

REVERSE TYPE 9.2MM

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

M_DQS_R0

11

M_DQS_R1

25

M_DQS_R2

47

M_DQS_R3

61

M_DQS_R4

133

M_DQS_R5

147

M_DQS_R6

169

M_DQS_R7

183 77

M_ADM_R0

12

M_ADM_R1

26

M_ADM_R2

48

M_ADM_R3

62

M_ADM_R4M_ADM_R4

134

M_ADM_R5

148

M_ADM_R6

170

M_ADM_R7

184 78

35 37 160 158

DDR_CLK1

89

DDR_CLK#1

91 195

193 194

196 198

9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192

3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186

202

DM_SA0

2D5V_S3

62.10017.391

ME : 62.10017.391

D

M_CS#2 5,9 M_CS#3 5,9

! NOT THIS LIBRARY

M_ADM#0 M_ADM#1 M_ADM#2 M_ADM#3 M_ADM#4 M_ADM#5 M_ADM#6 M_ADM#7

M_CLK4 5 M_CLK#4 5 M_CLK6 5 M_CLK#6 5

SMBC_SB 3,21 SMBD_SB 3,21

1 2

R312

R312 4K7R2

4K7R2

DDR1(Reverse 5.2mm)

DDR2(Reverse 9.2mm)

D

E

M_ADM_R[7..0] 9 M_DATA_R_[63..0] 9 M_DQS_R[7..0] 9

M_AA[13..0] 5,9 M_ABS#[1..0] 5,9 M_BA[13..0] 5,9 M_BBS#[1..0] 5,9

3D3V_S0

2D5V_S3

RN62

DDR_CLK#1 DDR_CLK#0 DDR_CLK1 DDR_CLK0

8 7 6

RN62

SRN10K-2

1 2 3 45

SB 0203

AMD CPU

MD63

Title

Size Document Number Rev

A3

Date: Sheet

DDR SO-DIMM SKT

SMA10

SMA11

SMA0 SMA12

SMA14

Pin 199

Pin 200 Pin 2

Pin 199 Pin 1

Pin 200 Pin 2

(Bottom view)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bolsena

E

Pin 1

MD0

858Thursday, March 31, 2005

-1

of

-1

A

SERIES DAMPING PARALLEL TERMINATION

PLACE RNs CLOSE TO FIRST DIMM, < 0.75" STRICT EQUAL LENGTH LIMITATION WITH DQS, CB PINS

SRN10J-3

M_DATA4 M_ADM0

M_DATA6 M_DATA7 M_DATA13 M_DATA12

4 4

M_ADM1

M_DATA1 M_DATA0 M_DQS0 M_DATA2 M_DATA3 M_DATA8 M_DATA9 M_DQS1

M_DATA14 M_DATA_R_14 M_DATA15 M_DATA21 M_DATA20 M_ADM2 M_DATA23 M_DATA_R_23 M_DATA22 M_DATA28 M_DATA_R_28

3 3

M_DATA11 M_DATA10 M_DATA17 M_DATA16 M_DQS2 M_DQS_R2 M_DATA19 M_DATA_R_19 M_DATA18

M_DATA31 M_DATA_R_31

M_DATA24 M_DATA_R_24 M_DATA_R_27 M_DQS3 M_DQS_R3 M_DATA26 M_DATA_R_26 M_DATA27 M_DATA_R_27

2 2

SRN10J-3

8 9 7 6 5 4 3 2 1

RN49

RN49 SRN10J-3

SRN10J-3

8 9 7 6 5 4 3 2 1

RN38

RN38 SRN10J-3

SRN10J-3

8 9 7 6 5 4 3 2 1

RN50

RN50 SRN10J-3

SRN10J-3

8 9 7 6 5 4 3 2 1

RN39

RN51

4 5 3 2 1

RN40

SRN10-1

10 11 12 13 14 15 16

SRN10-1

6 7 8

M_DATA_R_4 M_DATA_R_5M_DATA5 M_ADM_R0 M_DATA_R_6 M_DATA_R_7 M_DATA_R_13 M_DATA_R_12 M_ADM_R1

M_DATA_R_1 M_DATA_R_0 M_DQS_R0 M_DATA_R_2 M_DATA_R_3 M_DATA_R_8 M_DATA_R_9 M_DQS_R1

M_DATA_R_15 M_DATA_R_21 M_DATA_R_20 M_ADM_R2

M_DATA_R_22

M_DATA_R_11 M_DATA_R_10 M_DATA_R_17 M_DATA_R_16

M_DATA_R_18 M_DATA_R_25M_DATA25

M_DATA_R_29M_DATA29 M_ADM_R3M_ADM3

M_DATA_R_30M_DATA30

M_ADM4 M_ADM_R4 M_DATA39 M_DATA_R_39

M_DATA33 M_DATA_R_33 M_DATA34 M_DATA_R_34

M_DATA35 M_DATA41 M_DATA40 M_DQS5 M_DATA42 M_DATA43 M_DATA49 M_DATA48

M_DATA38 M_DATA45 M_DATA44 M_ADM5 M_DATA47 M_DATA46 M_DATA53 M_DATA52

M_DQS6 M_DATA50 M_DATA51 M_DATA56 M_DATA57 M_DQS7 M_DATA58 M_DATA59

M_ADM6 M_DATA54 M_DATA55 M_DATA61 M_DATA60 M_ADM7 M_DATA62 M_DATA63

4 5 3 2 1

RN41

8 9 7 6 5 4 3 2 1

SRN10-1

RN52

SRN10-1

SRN10-1 SRN10J-3

SRN10J-3

RN42

RN42 SRN10J-3

SRN10J-3

RN53

RN53 SRN10J-3

SRN10J-3

RN43

RN43 SRN10J-3

SRN10J-3

RN54

B

6 7 8

10 11 12 13 14 15 16

M_DATA_R_37M_DATA37 M_DATA_R_36M_DATA36

M_DATA_R_32M_DATA32 M_DQS_R4M_DQS4

M_DATA_R_35 M_DATA_R_41 M_DATA_R_40 M_DQS_R5 M_DATA_R_42 M_DATA_R_43 M_DATA_R_49 M_DATA_R_48

M_DATA_R_38

M_DATA_R_45

M_DATA_R_44 M_ADM_R5 M_DATA_R_47 M_DATA_R_46 M_DATA_R_53 M_DATA_R_52

M_DQS_R6 M_DATA_R_50 M_DATA_R_51 M_DATA_R_56 M_DATA_R_57 M_DQS_R7 M_DATA_R_58 M_DATA_R_59

M_ADM_R6 M_DATA_R_54 M_DATA_R_55 M_DATA_R_61 M_DATA_R_60 M_ADM_R7 M_DATA_R_62 M_DATA_R_63

C

PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO SECOND DM ( DM2 )

SRN68J-1

M_ADM_R1 M_DATA_R_13 M_DATA_R_12 M_DATA_R_7 M_DATA_R_6 M_ADM_R0 M_DATA_R_5 M_DATA_R_4

M_DATA_R_1 M_DATA_R_0 M_DQS_R0 M_DATA_R_2 M_DATA_R_3 M_DATA_R_8 M_DATA_R_9 M_DQS_R1

M_DATA_R_28 M_DATA_R_23 M_DATA_R_22 M_ADM_R2 M_ADM_R5 M_DATA_R_21 M_DATA_R_20 M_DATA_R_15 M_DATA_R_14

M_DATA_R_11 M_DATA_R_10 M_DATA_R_16 M_DATA_R_17 M_DQS_R2 M_DATA_R_19 M_DATA_R_18 M_DATA_R_24

M_DATA_R_26 M_DQS_R3 M_DATA_R_25

M_DATA_R_31 M_DATA_R_30 M_ADM_R3 M_DATA_R_29

SRN68J-1

8 9 7 6 5 4 3 2 1

RN113

SRN68J-1

8 9 7 6 5 4 3 2 1

RN59

RN59 SRN68J-1

SRN68J-1

8 9 7 6 5 4 3 2 1

RN114

RN114 SRN68J-1

SRN68J-1

8 9 7 6 5 4 3 2 1

RN60

RN60 RN61

RN61

1 2 3 4 5

4 5 3 2 1

RN115

1D25V_S3 1D25V_S3

4 5 10 11 12 13 14 15 16

10 11 12 13 14 15 16

SRN68-1

8 7 6

6 7 8

SRN68-1

3

2

1

RN66

4 5

3

2

1

RN110

SRN68J-1

8 9 7 6 5 4 3 2 1

RN68

RN68 SRN68J-1

SRN68J-1

8 9 7 6 5 4 3 2 1

RN111

RN111 SRN68J-1

SRN68J-1

8 9 7 6 5 4 3 2 1

RN69

RN69 SRN68J-1

SRN68J-1

8 9 7 6 5 4 3 2 1

RN112

NO EQUAL LENGTH LIMITATION

M_DATA_R_32 M_DATA_R_33

6

M_DQS_R4

7

M_DATA_R_35

8

SRN68-1

M_DATA_R_36 M_DATA_R_37

6

M_ADM_R4

7

M_DATA_R_38

8

SRN68-1

M_DATA_R_48 M_DATA_R_49

10

M_DATA_R_43

11

M_DATA_R_42

12

M_DQS_R5

13

M_DATA_R_41

14

M_DATA_R_40

15

M_DATA_R_34

16

M_DATA_R_39 M_DATA_R_44

10

M_DATA_R_45

11 12

M_DATA_R_46

13

M_DATA_R_47

14

M_DATA_R_52

15

M_DATA_R_53

16

M_DATA_R_59 M_DATA_R_58

10

M_DQS_R7

11

M_DATA_R_57

12

M_DATA_R_56

13

M_DATA_R_51

14

M_DATA_R_50

15

M_DQS_R6

16

M_ADM_R6 M_DATA_R_54

10

M_DATA_R_55

11

M_DATA_R_60

12

M_DATA_R_61

13

M_ADM_R7

14

M_DATA_R_62

15

M_DATA_R_63

16

D

M_CKE#0 M_AA12

M_BA12 M_BA5

M_AA11 M_AA9 M_AA7 M_AA5 M_AA4 M_AA8 M_AA6 M_AA3

M_AWE# M_ABS#0

M_BA3 M_BA7

M_AA1 M_AA10 M_AA2 M_AA0 M_ABS#1 M_ARAS# M_CS#2 M_BA13

M_BA9 M_BA6 M_BA10 M_BA1 M_BA2 M_BA0 M_BBS#0 M_BWE#

M_BA4 M_BA8 M_BA11 M_CKE#1

M_AA13 M_CS#0 M_CS#1 M_ACAS#

M_CS#3 M_BCAS# M_BRAS# M_BBS#1

SRN47J

1 4 2

RN57

RN57 SRN47J

SRN47J

1 4 2

RN63

RN63 SRN47J-1-U

SRN47J-1-U

8 9 7 6 5 4 3 2 1

RN64

4 5 3 2 1

RN67 SRN47JRN67 SRN47J

1 4 2

RN70

1 4 2

SRN47J-1-U

8 9 7 6 5 4 3 2 1

RN65

RN65 SRN47J-1-U

SRN47J-1-U

8 9 7 6 5 4 3 2 1

RN71

SRN47-1

4 5 3 2 1

RN108

SRN47-1

4 5 3 2 1

RN58

SRN47-1

RN109

6 7 8

3

10 11 12 13 14 15 16

3

SRN47J

3

10 11 12 13 14 15 16

E

M_ADM_R[7..0] 8

M_ADM[7..0] 5 M_DATA[63..0] 5 M_DATA_R_[63..0] 8 M_DQS[7..0] 5 M_DQS_R[7..0] 8

M_AA[13..0] 5,8

M_ABS#[1..0] 5,8

M_BA[13..0] 5,8

M_BBS#[1..0] 5,8

M_AWE# 5,8

M_ACAS# 5,8

6 7 8

M_CKE#05,8

M_CKE#15,8

M_ARAS# 5,8

M_BWE# 5,8

M_BCAS# 5,8

M_BRAS# 5,8

M_CS#0 5,8

M_CS#1 5,8

M_CS#2 5,8

M_CS#3 5,8

M_CKE#0 M_CKE#1

1 1

05/10 Remove the damping resistor for AMD suggest.

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

DDR DAMPING & TERMINATION

Bolsena

958Thursday, March 31, 2005

of

E

of

-1

A

B

C

D

E

4 4

2D5V_S3

1D25V_S3

3 3

2D5V_S3

1D25V_S3

2 2

12

C873

C873 SCD1U

SCD1U

DY

12

C868

C868 SCD1U

SCD1U

DY

12

C879

C879 SCD1U

SCD1U

DY

12

C882

C882 SCD1U

SCD1U

DY

12

C875

C877

SCD1U

12

C870

C872

SCD1U

12

C881

C881 SCD1U

SCD1U

C886

C886 SCD1U

SCD1U

C883

C883 SCD1U

SCD1U

12

C888

C888 SCD1U

SCD1U

LAYOUT:Place altemating caps to GND and 2D5_S3

12

C867

C867 SCD1U

SCD1U

DY

12

C874

C874 SCD1U

SCD1U

DY

12

C885

C885 SCD1U

SCD1U

DY

12

C890

C890 SCD1U

SCD1U

DY

12

C869

C869 SCD1U

SCD1U

12

C876

C876 SCD1U

SCD1U

12

C887

C887 SCD1U

SCD1U

12

C880

C880 SCD1U

SCD1U

12

C871

C363

SCD1U

DY

12

C878

C878 SCD1U

SCD1U

C889

C889 SCD1U

SCD1U

C884

C884 SCD1U

SCD1U

C496

C496 SCD1U

SCD1U

DY

12

C503

C503 SCD1U

SCD1U

DY

12

C504

C504 SCD1U

SCD1U

DY

12

C364

C364 SCD1U

SCD1U

C436

C436 SCD1U

SCD1U

C368

C368 SCD1U

SCD1U

C370

C370 SCD1U

SCD1U

C388

C388 SCD1U

SCD1U

12

C437

C437 SCD1U

SCD1U

12

C409

C409 SCD1U

SCD1U

12

C411

C411 SCD1U

SCD1U

12

C407

C407 SCD1U

SCD1U

DY

12

C405

C405 SCD1U

SCD1U

DY

12

C321

C321 SCD1U

SCD1U

DY

12

C322

C322 SCD1U

SCD1U

DY

12

C406

C406 SCD1U

SCD1U

C404

C404 SCD1U

SCD1U

C342

C342 SCD1U

SCD1U

C343

C343 SCD1U

SCD1U

C438

C438 SCD1U

SCD1U

12

C386

C386 SCD1U

SCD1U

12

C369

C369 SCD1U

SCD1U

12

C371

C371 SCD1U

SCD1U

12

C338

C454

SCD1U

DY

12

C385

C361

SCD1U

DY

12

C389

C389 SCD1U

SCD1U

C390

C390 SCD1U

SCD1U

C408

C408 SCD1U

SCD1U

DY

12

C412

C412 SCD1U

SCD1U

DY

12

C387

C387 SCD1U

SCD1U

12

C362

C362 SCD1U

SCD1U

12

C410

C410 SCD1U

SCD1U

12

C449

C449 SCD1U

SCD1U

12

C310

C455

SCD1U

DY

12

C337

C308

SCD1U

DY

12

C447

C447 SCD1U

SCD1U

C448

C448 SCD1U

SCD1U

C466

C466 SCD1U

SCD1U

DY

12

C467

C467 SCD1U

SCD1U

DY

1D25V_S3

12

DY

C460

C460 SCD1U

SCD1U

12

C459

C459 SCD1U

SCD1U

DY

C462

C462 SCD1U

SCD1U

12

C463

C463 SCD1U

SCD1U

DY

C457

C457 SCD1U

SCD1U

12

C502

C465

SCD1U

DY

LAYOUT:Place close to Power Pin of DDR socket.

LAYOUT:Place at end of the DIMMs

1D25V_S3

12

DY

TC17

TC17 ST100U4VBM-U

ST100U4VBM-U

12

TC26

SE100U10VM

79.10711.4C1

SB

12

C892

C892 SC10U10V5ZY

SC10U10V5ZY

12

C865

C865 SC10U10V5ZY

SC10U10V5ZY

12

C891

C891 SC10U10V5ZY

SC10U10V5ZY

12

C866

C866 SC10U10V5ZY

SC10U10V5ZY

2D5V_S3 2D5V_S3

C445

1 2

SCD22U16V3ZY

SCD22U16V3ZY C443

C443

1 2

SCD22U16V3ZY

SCD22U16V3ZY C446

C446

1 2

DY

SCD22U16V3ZY

DY

C444

C444 SCD22U16V3ZY

SCD22U16V3ZY C442

C442 SCD22U16V3ZY

SCD22U16V3ZY

1 2

C464

C464 SCD22U16V3ZY

SCD22U16V3ZY C501

C501 SCD22U16V3ZY

SCD22U16V3ZY

DY

C500

C500 SCD22U16V3ZY

SCD22U16V3ZY

DY

C461

C461 SCD22U16V3ZY

SCD22U16V3ZY C499

C499 SCD22U16V3ZY

SCD22U16V3ZY

0.22u x 10

1 1

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

DDR DECOUPLING

Bolsena

E

10 58Thursday, March 31, 2005

of

-1

A

4 4

B

C

D

E

CLAW HAMMER TO NB NB TO CLAW HAMMER

CPUCADOUT[15..0]4 CPUCADOUTJ[15..0]4

3 3

1D2V_S0

12

2 2

AROUND NB

C221

C221 SCD1U16V

SCD1U16V

DY

12

C222

C222 SCD1U16V

SCD1U16V

1D2V_S0

CPUHTTCLKOUT14 CPUHTTCLKOUTJ14

CPUHTTCLKOUT04 CPUHTTCLKOUTJ04

CPUHTTCTLOUT04 CPUHTTCTLOUTJ04

R162 49D9R2FR162 49D9R2F

1 2

R161 49D9R2FR161 49D9R2F

1 2

CPUCADOUT15 CPUCADOUTJ15 CPUCADOUT14 CPUCADOUTJ14 CPUCADOUT13 CPUCADOUTJ13 CPUCADOUT12 CPUCADOUTJ12 CPUCADOUT11 CPUCADOUTJ11 CPUCADOUT10 CPUCADOUTJ10 CPUCADOUT9 CPUCADOUTJ9 CPUCADOUT8 CPUCADOUTJ8

CPUCADOUT7 CPUCADOUTJ7 CPUCADOUT6 CPUCADOUTJ6 CPUCADOUT5 CPUCADOUTJ5 CPUCADOUT4 CPUCADOUTJ4 CPUCADOUT3 CPUCADOUTJ3 CPUCADOUT2 CPUCADOUTJ2 CPUCADOUT1 CPUCADOUTJ1 CPUCADOUT0 CPUCADOUTJ0

CPUHTTCLKOUT1 CPUHTTCLKOUTJ1

CPUHTTCLKOUT0 CPUHTTCLKOUTJ0

CPUHTTCTLOUT0 CPUHTTCTLOUTJ0

HT_RXCALN HT_RXCALP

W25

W24 AA25 AA24 AB26 AA26 AC25 AC24 AD26 AC26

W30

AB29 AA29 AC29 AC28

W26

W29

W28

T26 R26 U25 U24 V26 U26

R29 R28 T30 R30 T28 T29 V29 U29 Y30

Y28 Y29

Y26

P29 N29

D27 E27

U80A

HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N

HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N

HT_RXCLK1P HT_RXCLK1N

HT_RXCLK0P HT_RXCLK0N

HT_RXCTLP HT_RXCTLN

HT_RXCALN HT_RXCALP

PART 1OF6

HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N

HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N

HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N

HT_TXCLK1P HT_TXCLK1N

HT_TXCLK0P HT_TXCLK0N

HT_TXCTLP

HT_TXCTLN HT_TXCALP

HT_TXCALN

R24 R25 N26 P26 N24 N25 L26 M26 J26 K26 J24 J25 G26 H26 G24 G25

L30 M30 L28 L29 J29 K29 H30 H29 E29 E28 D30 E30 D28 D29 B29 C29

L24 L25

F29 G29

M29 M28

B28 A28

NB0CADOUT15 NB0CADOUTJ15 NB0CADOUT14 NB0CADOUTJ14 NB0CADOUT13 NB0CADOUTJ13 NB0CADOUT12 NB0CADOUTJ12 NB0CADOUT11 NB0CADOUTJ11 NB0CADOUT10 NB0CADOUTJ10 NB0CADOUT9 NB0CADOUTJ9 NB0CADOUT8 NB0CADOUTJ8

NB0CADOUT7 NB0CADOUTJ7 NB0CADOUT6 NB0CADOUTJ6 NB0CADOUT5 NB0CADOUTJ5 NB0CADOUT4 NB0CADOUTJ4 NB0CADOUT3 NB0CADOUTJ3 NB0CADOUT2 NB0CADOUTJ2 NB0CADOUT1 NB0CADOUTJ1 NB0CADOUT0 NB0CADOUTJ0

NB0HTTCLKOUT1 NB0HTTCLKOUTJ1

NB0HTTCLKOUT0 NB0HTTCLKOUTJ0

NB0HTTCTLOUT NB0HTTCTLOUTJ

HT_TXCALP HT_TXCALN

R583

1 2

NB0CADOUT[15..0] 4 NB0CADOUTJ[15..0] 4

NB0HTTCLKOUT1 4 NB0HTTCLKOUTJ1 4

NB0HTTCLKOUT0 4 NB0HTTCLKOUTJ0 4

NB0HTTCTLOUT 4 NB0HTTCTLOUTJ 4

100R2F

CHANGE TO 71.RS48M.B0U (VER A22)

HYPER TRANSPORT CPU I/F

1 1

A

B

C

CHANGE TO 71.RS48M.B0U (VER A22)

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

ATI-RS480M (1 of 4) HT

Bolsena

11 58Thursday, March 31, 2005

E

of

-1

A

4 4

3 3

IDCKP_1

R634

1 2

IDCKP15

IDCKN15

R636

1 2

33R2

IDCKN_1

Dummy when 'USE DVO'

R217

1 2

0R0603-PAD

SC 0308

2 2

1D8V_S0

12

R208

R208 1KR2F

1KR2F

MEM_VREF

12

1 1

R214

R214 1KR2F

1KR2F

C823 SCD47U16V3ZYC823 SCD47U16V3ZY

MEM_CAP1

1 2

MEM_CAP2

1 2

C832 SCD47U16V3ZYC832 SCD47U16V3ZY

RS480_MEM_VMODE

MEM_VREF MPVDD_PLL

12

C324

C324 SC1U10V3KX

SC1U10V3KX

NO DVO: MEM_COMPP = NC MEM_COMPN = NC MEM_CAP1 = 470nF MEM_CAP2 = 470nF MEM_VMODE = GND (IF VDD_MEM = 2.5V) MEM_VREF = VDD_MEM / 2

A

U80C

AF17

MEM_A0

AK17 AH16

AF16 AJ22

AJ21 AH20 AH21 AK19 AH19

AJ17 AG16 AG17 AH17

AJ18 AG26

AJ29 AE21 AH24 AH12 AG13

AH8 AE8

AF25 AH30 AG20

AJ25 AH13

AF14

AG8

AG25 AH29

AF21 AK25

AJ12

AF13

AK7 AF9

AE17 AH18 AE18

AJ19

AF18 AK16

AJ16

AE28

AJ20

AK20

AJ15

AJ14

AJ7

AJ4

PART 3 OF 6

MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14

MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7

MEM_DQS0P MEM_DQS1P MEM_DQS2P MEM_DQS3P MEM_DQS4P MEM_DQS5P MEM_DQS6P MEM_DQS7P

MEM_DQS0N MEM_DQS1N MEM_DQS2N MEM_DQS3N MEM_DQS4N MEM_DQS5N MEM_DQS6N MEM_DQS7N

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE

MEM_CKP MEM_CKN

MEM_CAP1 MEM_CAP2

MEM_VMODE

MEM_VREF MPVDD

MPVSS

CHANGE TO 71.RS48M.B0U (VER A22)

B

AF28

MEM_DQ0

AF27

MEM_DQ1

AG28

MEM_DQ2

AF26

MEM_DQ3

AE25

MEM_DQ4

AE24

MEM_DQ5

AF24

MEM_DQ6

AG23

MEM_DQ7

AE29

MEM_DQ8

AF29

MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39 MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43

MEM_A I/F

MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63

MEM_COMPP MEM_COMPN

AG30 AG29 AH28 AJ28 AH27 AJ27 AE23 AG22 AF23 AF22 AE20 AG19 AF20 AF19 AH26 AJ26 AK26 AH25 AJ24 AH23 AJ23 AH22 AK14 AH14 AK13 AJ13 AJ11 AH11 AJ10 AH10 AE15 AF15 AG14 AE14 AE12 AF12 AG11 AE11 AJ9 AH9 AJ8 AK8 AH7 AJ6 AH6 AJ5 AG10 AF11 AF10 AE9 AG7 AF8 AF7 AE7

AH5 AD30

WITH DVO: MEM_COMPP = 61.9 OHM TO GND MEM_COMPN = 61.9 OHM TO VDD_MEM MEM_CAP1 = NC MEM_CAP2 = NC MEM_VMODE = 1.8V(IF VDD_MEM = 1.8V) MEM_VREF = VDD_MEM / 2

B

DVO_MDA33 DVO_MDA34 DVO_MDA35 DVO_MDA36 DVO_MDA37 DVO_MDA38 DVO_MDA39

DVO_MDA48 DVO_MDA49 DVO_MDA50 DVO_MDA51 DVO_MDA52 DVO_MDA53 DVO_MDA54 DVO_MDA55

MEM_COMPP MEM_COMPN

PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13 PEG_TXN13 PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5

LANE REVERSE

PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0

PCIE_RXP057

PCIE_RXN057

PCIE_RXP157

PCIE_RXN157

PCIE_RX0P_SB18 PCIE_RX0N_SB18

PCIE_RX1P_SB18 PCIE_RX1N_SB18

R620 10KR2R620 10KR2

1 2 1 2

8K25R3F

R633

1D8V_S0

R211 61D9R2FR211 61D9R2F

1 2

R630 61D9R2FR630 61D9R2F

1 2

Dummy when 'NO DVO'

SC 0308

RS480_MEM_VMODE

C

PCE_TXISET

C

PCE_ISET

PEG_TXP[15..0]49 PEG_TXN[15..0]49

PEG_RXP[15..0]49 PEG_RXN[15..0]49

U80B

D8

GFX_RX0P

D7

GFX_RX0N

D5

GFX_RX1P

D4

GFX_RX1N

E4

GFX_RX2P

F4

GFX_RX2N

G5

GFX_RX3P

G4

GFX_RX3N

H4

GFX_RX4P

J4

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

G1

GFX_RX6P

G2

GFX_RX6N

K5

GFX_RX7P

K4

GFX_RX7N

L4

GFX_RX8P

M4

GFX_RX8N

N5

GFX_RX9P

N4

GFX_RX9N

P4

GFX_RX10P

R4

GFX_RX10N

P5

GFX_RX11P

P6

GFX_RX11N

P2

GFX_RX12P

R2

GFX_RX12N

T5

GFX_RX13P

T4

GFX_RX13N

U4

GFX_RX14P

V4

GFX_RX14N

W1

GFX_RX15P

W2

GFX_RX15N

AE1

GPP_RX0P/SB_RX2P

AE2

GPP_RX0N/SB_RX2N

AB2

GPP_RX1P/SB_RX3P

AC2

GPP_RX1N/SB_RX3N

AB5

GPP_RX2P

AB4

GPP_RX2N

Y4

GPP_RX3P

AA4

GPP_RX3N

AG1

SB_RX0P

AH1

SB_RX0N

AC5

SB_RX1P

AC6

SB_RX1N

AH3

PCE_ISET

AJ3

PCE_TXISET

1D8V_S0

12

R209

R209 1KR2

1KR2

PART 2 OF 6

PCIE I/F TO SLOT

PCIE I/F TO SB

Dummy when 'NO DVO'

R210

R210 1KR2

1KR2

1 2

Dummy when 'USE DVO'

A7

GFX_TX0P

B7

GFX_TX0N

B6

GFX_TX1P

B5

GFX_TX1N

A5

GFX_TX2P

A4

GFX_TX2N

B3

GFX_TX3P

B2

GFX_TX3N

C1

GFX_TX4P

D1

GFX_TX4N

D2

GFX_TX5P

E2

GFX_TX5N

F2

GFX_TX6P

F1

GFX_TX6N

H2

GFX_TX7P

J2

GFX_TX7N

J1

GFX_TX8P

K1

GFX_TX8N

K2

GFX_TX9P

L2

GFX_TX9N

GPP_TX2P GPP_TX2N

GPP_TX3P GPP_TX3N

SB_TX0P SB_TX0N

SB_TX1P SB_TX1N

PCE_PCAL PCE_NCAL

DVO_MDA33 DVO_MDA34 DVO_MDA35 DVO_MDA36 DVO_MDA37 DVO_MDA38 DVO_MDA39

DVO_MDA48 DVO_MDA49 DVO_MDA50 DVO_MDA51 DVO_MDA52 DVO_MDA53 DVO_MDA54 DVO_MDA55

M2 M1 N1 N2 R1 T1 T2 U2 V2 V1 Y2 AA2

AD2 AD1

AA1 AB1

Y5 Y6

W5 W4

AF2 AG2

AC4 AD4

AH2 AJ2

GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P/SB_TX2P GPP_TX0N/SB_TX2N

GPP_TX1P/SB_TX3P GPP_TX1N/SB_TX3N

PCIE I/F TO VIDEO

SC 0308

D

PEG_RXP15_NB PEG_RXP15 PEG_RXP14_NB PEG_RXP13_NB

PEG_RXN13_NB PEG_RXP12_NB PEG_RXN12_NB PEG_RXP11_NB PEG_RXN11_NB PEG_RXP10_NB PEG_RXN10_NB PEG_RXP9_NB PEG_RXN9_NB PEG_RXP8_NB PEG_RXN8_NB PEG_RXP7_NB PEG_RXN7_NB PEG_RXP6_NB PEG_RXN6_NB PEG_RXP5_NB PEG_RXN5_NB PEG_RXP4_NB PEG_RXN4_NB PEG_RXP3_NB PEG_RXN3_NB PEG_RXP2_NB PEG_RXN2_NB PEG_RXP1_NB PEG_RXN1_NB PEG_RXP0_NB PEG_RXN0_NB

PCIE_TXP0_NB PCIE_TXN0_NB

PCIE_TXP1_NB PCIE_TXN1_NB

SB_TX0P SB_TX0N

SB_TX1P SB_TX1N

PCE_PCAL PCE_NCAL

CHANGE TO 71.RS48M.B0U (VER A22)

DVO_MDA33 15 DVO_MDA34 15 DVO_MDA35 15 DVO_MDA36 15 DVO_MDA37 15 DVO_MDA38 15 DVO_MDA39 15

DVO_MDA48 15 DVO_MDA49 15 DVO_MDA50 15 DVO_MDA51 15 DVO_MDA52 15 DVO_MDA53 15 DVO_MDA54 15 DVO_MDA55 15

D

C742

1 2

SCD1U16V

C743

C743 C744

C744 C745

C745 C746

C746 C747

C747 C748

C748 C749

C749 C751

C751 C750

C750 C774

C774 C772

C772 C777

C777 C776

C776 C770

C770 C773

C773 C781

C781 C780

C780 C775

C775 C771

C771 C779

C779 C778

C778 C799

C799 C801

C801 C807

C807 C803

C803 C797

C797 C800

C800 C805

C805 C806

C806 C802

C802 C798

C798

C826

C826 C827

C827 C804

C804 C808

C808

C829

1 2

C828

1 2

C830

1 2

C831

1 2

1 2 1 2

Title

Size Document Number Rev

Date: Sheet

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

1 2

SCD1U16V

SCD1U16V SCD1U16V

SCD1U16V R632 150R2FR632 150R2F R631 100R2FR631 100R2F

ATI-RS480M (2 of 4) PCIE

A3

Dummy when no EZ4

E

PEG_RXN15PEG_RXN15_NB PEG_RXP14 PEG_RXN14PEG_RXN14_NB PEG_RXP13 PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10 PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0

Dummy when use UMA

PCIE_TXP0 57 PCIE_TXN0 57

PCIE_TXP1 57 PCIE_TXN1 57

PCIE_TX0P_SB 18 PCIE_TX0N_SB 18

PCIE_TX1P_SB 18 PCIE_TX1N_SB 18

1D2V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bolsena

12 58Thursday, March 31, 2005

E

LANE REVERSE

-1

of

-1

A

12

DY

1 2

150R5F

SC 0308

12

LPC_RST#18,34,37

AVDDQ

12

C766

C769

SCD1U16V

SC10U10V5ZY

Dummy when use Discrete

UMA_CRMA57

UMA_LUMA57

UMA_COMP57

UMA_R57 UMA_G57

1D8V_S0

12

R635

R635 4K7R2

4K7R2

NB_SUS_STAT#

UMA_B57

R593

1 2

BLM11A121S

HTPVDD

12

C768

12

C767

SCD1U16V

SC10U10V5ZY

DO NOT SUPPORT SIDEPORT MEMORY DO NOT SUPPORT SERIAL STRAP ROM DUMMY IT

1 2

3D3V_S5

C968

12

SCD1U16V

SC 0310

1 2

A

C765

R183

12

147

PLVDD

C740

SC10U10V5ZY

SCD1U16V

3D3V_S01D8V_S0

DY

0R2-0

1 2

SC 0301

R585 102R2FR585 102R2F

R165 102R2FR165 102R2F

R586 102R2FR586 102R2F

12

C717

C741

SCD1U16V

SC2D2U16V5ZY

R188

1 2

0R0603-PAD

SC 0308

EDID_CLK17,49 EDID_DAT17,49

12

C259

C259 SC1U10V3ZY

SC1U10V3ZY

3 4

Dummy when use Discrete

U22A

R760

33R2

R760

1 2

RS480_RST#

33R2

3

TSLCX08MTC-U

R159

1D8V_S0

3D3VDDR_S0

RN107

RN107 SRN0-2-U

SRN0-2-U

R759

R759 0R2-0

0R2-0

DY

1 2

1D8V_S0

R610

1 2

0R0603-PAD

SC 0308

4 4

3 3

1D8V_S0

R609

2 2

LDT_RST#6,18

ALL_PWROK39

1 1

B

AVDD3D3V_S0

R584

1 2

0R0603-PAD

SC 0308

R164

1 2

0R0603-PAD

R588

150R2F

1 2

3D3V_S0

2 1

0R0603-PAD

SC 0308

12

R589

R587

150R2F

UMA_VS16 UMA_HS16

UMA_CRT_DDC_C16 UMA_CRT_DDC_D16

CLK14_NB3 SB_OSC_INT21

RS480_CLK15

RN106

3

12

C220

C220 SC2D2U16V5ZY

SC2D2U16V5ZY

AVDDQ

12

C254

C254 SC1U10V3ZY

SC1U10V3ZY

ALLOW_LDTSTOP18

14 2

SRN10KJ

GMODULE_RST# 34

Place close the two resistor

AG_RST# 49

SC 0307

12

C251

C251 DUMMY-C3

DUMMY-C3

B

C735

C735 SC2D2U16V5ZY

SC2D2U16V5ZY

1D8VAVDDD1_S0

R163

1 2

634R3F

NB_PWRGD39

LDT_STP#6,18

TP32TPAD30 TP32TPAD30 TP24TPAD30 TP24TPAD30 TP23TPAD30 TP23TPAD30

R594

1 2

DY

BMREQ#18

SC 0228

22R2

RS480_RST#

NB_SUS_STAT#

NB_OSC_OUT

R595 10KR2R595 10KR2

1 2

DFT_GPIO0 DFT_GPIO2

RS480_CLK RS480_DAT

LVDS_DIGON

NB_PWRGD

LVDS_BLON

IRSET_NB

3D3V_S5

4 5

12

R608

R608 1KR2

1KR2

C

U80D

B27

AVDD1

C27

AVDD2

D26

AVSSN1

D25

AVSSN2

C24

AVDDDI

B24

AVSSDI

E24

AVDDQ

D24

AVSSQ

B25

C

A25

Y

A24

COMP

C25

RED

A26

GREEN

B26

BLUE

A11

DAC_VSYNC

B11

DAC_HSYNC

C26

RSET

E11

DAC_SCL

F11

DAC_SDA

A14

PLLVDD

B14

PLLVSS

M23

HTPVDD

L23

HTPVSS

D14

SYSRESET#

B15

POWERGOOD

B12

LDTSTOP#

C12

ALLOW_LDTSTOP

AH4

SUS_STAT#

H13

VDDR3_1

H12

VDDR3_2

A13

OSCIN

B13

OSCOUT

B9

TVCLKIN

F12

DFT_GPIO0/RSV

E13

DFT_GPIO1/RSV

D13

DFT_GPIO2/RSV

F10

BMREQb

C10

I2C_CLK

C11

I2C_DATA

AF4

THERMALDIODE_P

AE4

THERMALDIODE_N

CHANGE TO 71.RS48M.B0U (VER A22)

R185

1 2

DY

U22B

147

TSLCX08MTC-U

6

3D3V_S5

147

12 13

C

PART 4 OF 6

CRT/TVOUT

PLL PWR

PM

CLOCKs

MIS.

0R2-0

U22D

R607

11

1 2

TSLCX08MTC-U

Dummy when use Discrete

DFT_GPIO3/RSV DFT_GPIO4/RSV DFT_GPIO5/RSV

LCDVDD_ON

0R2-0

TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

TXCLK_UP TXCLK_UN

TXCLK_LP

LVDS

TXCLK_LN

LPVDD LPVSS

LVDDR18D LVDDR18A_1 LVDDR18A_2

LVSSR1 LVSSR2 LVSSR3 LVSSR4 LVSSR5 LVSSR6 LVSSR7 LVSSR8

LVDS_DIGON

LVDS_BLON LVDS_BLEN

GFX_CLKP

GFX_CLKN

HTTSTCLK

HTREFCLK

SB_CLKP SB_CLKN

TMDS_HPD

STRP_DATA

DDC_DATA TESTMODE

VCC_CORE_S0

12

D18 C18 B19 A19 D19 C19 D20 C20

B16 A16 D16 C16 B17 A17 E17 D17

B20 A20 B18 C17

E18 F17 E19 G20 H20

G19 E20 F20 H18 G18 F19 H19 F18

E14 F14 F13

B8 A8

P23 N23

E8 E7

C13 C14 C15

A10 E10 B10 E12

R186

R186 DUMMY-R2

DUMMY-R2

R187

R187 4K7R2

4K7R2

R739

R739 10KR2

10KR2

1 2

D

TXBOUT0+ TXBOUT0TXBOUT1+ TXBOUT1TXBOUT2+

TXBOUT2TXBOUT3+ TXBOUT3-

TXAOUT0+

TXAOUT0-

TXAOUT1+

TXAOUT1-

TXAOUT2+

TXAOUT2TXAOUT3+ TXAOUT3-

TXBCLK+

TXBCLK-

TXACLK+

TXACLK-

LVDS_DIGON LVDS_BLON LVDS_BLEN_NB

HTTST_CLK

DFT_GPIO3

DFT_GPIO4DFT_GPIO1

DFT_GPIO5

DDC_DATA TESTMODE_NB

BL_ON 34,49

SB 0201

D

TP28TP28 TP22TP22

R196

1 2

DDC_DATA 15

E

TXACLK+ TXACLKTXAOUT2+ TXAOUT2-

TXAOUT1+ TXAOUT1TXAOUT0+ TXAOUT0-

TXBOUT1+ TXBOUT1TXBOUT0+ TXBOUT0-

TXBCLK+ TXBCLKTXBOUT2+ TXBOUT2-

LCDVDD_ON

6 7 8

R184

RN90

RN89

RN95

RN94

12

0R2-0

45 3 2 1

SRN0-1-U

45 3 2 1

SRN0-1-U

45 3 2 1

SRN0-1-U

45 3 2 1

SRN0-1-U

LCD_TXACLK+ 17,54

LCD_TXACLK- 17,54

LCD_TXAOUT2+ 17,54

LCD_TXAOUT2- 17,54

LCD_TXAOUT1+ 17,54

LCD_TXAOUT1- 17,54

LCD_TXAOUT0+ 17,54

LCD_TXAOUT0- 17,54

LCD_TXBOUT1+ 17,54

LCD_TXBOUT1- 17,54

LCD_TXBOUT0+ 17,54

LCD_TXBOUT0- 17,54

LCD_TXBCLK+ 17,54

LCD_TXBCLK- 17,54

LCD_TXBOUT2+ 17,54

LCD_TXBOUT2- 17,54

LCD_VDD_ON 17,54

Dummy when use Discrete

R592 TP30TP30 TP29TP29

1D8VLPVDD_S0

LVDDR18D_S0

LVDDR18A_S0

TP31 TPAD30TP31 TPAD30

NBSRC_CLK 3 NBSRC_CLK# 3

10KR2

HTREF_CLK 3 SBLINK_CLK 3

SBLINK_CLK# 3

TP81 TPAD30TP81 TPAD30 TP80 TPAD30TP80 TPAD30 TP79 TPAD30TP79 TPAD30

TMDS_UMA_HPD 15

TP33 TPAD28TP33 TPAD28

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

ATI-RS480M (3 of 4) LVDS CRT

A3

12

C739

SC1U10V3ZY

12

C738

12

SC1U10V3ZY

C226

C737

SC1U10V3ZY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bolsena

E

12

SCD1U16V

C227

SC2D2U16V5ZY

C225

SCD1U16V

13 58Thursday, March 31, 2005

R592

1 2

R591

1 2

R590

1 2

of

1D8V_S0

BLM11A121S

-1

A

B

C

D

E

VSS89

H17

H10

H16

H14

E16

D10

E15

F15

U15

V14

R15

T14

N15

V12

N13

P14

U17

T16

R17

P12

T12

R13

W13

W17

P18

V18

M18

U13

N17

W15

V16

T18

M14

M12

M16

P16

U19

AC16

AG18

AC23

AD8

AD11

AD13

AD16

AD19

AD23

AG5

AG6

AG21

AD17

AG15

AG12

AF30

AG24

AG9

AC19

AG27

AC11

AD7

AJ30

AC21

AK5

AK10

AC13

AD21

AK22

AK29

W19

AE26

AE27

T27

R27

AD28

F24

F27

G28

U80F

4 4

3 3

12

C253

C253 SCD1U16V

SCD1U16V

C280

C280 SCD1U16V

SCD1U16V

C825

C825 SCD1U16V

SCD1U16V

C293

C293 SCD1U16V

SCD1U16V

12

C252

C252 SCD1U16V

SCD1U16V

12

C281

C281 SCD1U16V

SCD1U16V

DY

12

C285

C285 SCD1U16V

SCD1U16V

12

C329

C329 SCD1U16V

SCD1U16V

DY

L11

1 2

BLM11A121S

DY

1 2

U25

U25 BAV99-1

BAV99-1

DY

A

0R2-0

3

12

R216

C257

C257 SCD1U16V

SCD1U16V

DY

C282

C282 SCD1U16V

SCD1U16V

C330

C330 SCD1U16V

SCD1U16V

C325

C325 SCD1U16V

SCD1U16V

12

C284

C284 SC10U10V5ZY

SC10U10V5ZY

DY

12

C278

C278 SCD1U16V

SCD1U16V

2 2

12

C821

C821 SC10U10V5ZY

SC10U10V5ZY

12

C326

C326 SCD1U16V

SCD1U16V

1D8V_S0

1 1

3D3V_S0

3

1 2

U24

U24 BAV99-1

BAV99-1

DY

12

DY

R215

0R2-0

C255

C255 SCD1U16V

SCD1U16V

C283

C283 SCD1U16V

SCD1U16V

C287

C287 SCD1U16V

SCD1U16V

C331

C331 SCD1U16V

SCD1U16V

DY

12

C346

12

SCD1U16V

C223

C223 SCD1U16V

SCD1U16V

C279

C279 SCD1U16V

SCD1U16V

C323

C323 SCD1U16V

SCD1U16V

C344

C344 SCD1U16V

SCD1U16V

1D8VDD_S0

12

C258

SCD1U16V

12

VSS111

VSS112

C224

C224 SCD1U16V

SCD1U16V

C277

C277 SCD1U16V

SCD1U16V

C328

C328 SCD1U16V

SCD1U16V

C327

C327 SCD1U16V

SCD1U16V

C291

SCD1U16V

VSS108

VSS109

VSS110

1D8V_S0

12

C288

VSS107

C345

C333

C333 SCD1U16V

SCD1U16V

1D2V_S0

SC1U10V3KX

VSS102

VSS103

VSS104

VSS105

VSS106

1D2V_S0

VDDHT30 VDDHT31

SCD1U16V

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

VSS101

U80E

N27

VDD_HT1

U27

VDD_HT2

V27

VDD_HT3

G27

VDD_HT4

V24

VDD_HT5

H27

VDD_HT6

K24

VDD_HT7

AB24

VDD_HT8

P27

VDD_HT9

J27

VDD_HT10

AA27

VDD_HT11

K27

VDD_HT12

P24

VDD_HT13

AB27

VDD_HT14

AB23

VDD_HT15

V23

VDD_HT16

G23

VDD_HT17

E23

VDD_HT18

W23

VDD_HT19

K23

VDD_HT20

J23

VDD_HT21

H23

VDD_HT22

U23

VDD_HT23

AA23

VDD_HT24

D23

VDD_HT25

F23

VDD_HT26

C23

VDD_HT27

B23

VDD_HT28

A23

VDD_HT29

A29

VDD_HT30

AC30

VDD_HT31

AK23

VDD_MEM1

AK28

VDD_MEM2

AK11

VDD_MEM3

AK4

VDD_MEM4

AE30

VDD_MEM5

AC14

VDD_MEM6

AD12

VDD_MEM7

AC18

VDD_MEM8

AC20

VDD_MEM9

AD10

VDD_MEM10

AD14

VDD_MEM11

AD15

VDD_MEM12

AD20

VDD_MEM13

AC10

VDD_MEM14

AD18

VDD_MEM15

AC12

VDD_MEM16

AD22

VDD_MEM17

AC22

VDD_MEM18

AH15

VDD_MEMCK

H15

VDD_18_1

AC17

VDD_18_2

AC15

VDD_18_3

B21

VDD_CORE47

C21

VDD_CORE46

A22

VDD_CORE45

B22

VDD_CORE44

C22

VDD_CORE43

F21

VDD_CORE42

F22

VDD_CORE41

E21

VDD_CORE40

G21

VDD_CORE39

B

VSS93

VSS94

VSS89

VSS90

VSS91

VSS92

PART 5 OF 6

VSS85

VSS86

VSS87

VSS88

VSS129

VSS130

VSS131

VSS132

K25

V25

V28

U28

R23

POWER

VSS83

VSS84

VSS127

VSS128

E26

VDDA_12_14

VDDA_12_1 VDDA_12_2 VDDA_12_3 VDDA_12_4 VDDA_12_5 VDDA_12_6 VDDA_12_7 VDDA_12_8

VDDA_12_9 VDDA_12_10 VDDA_12_11 VDDA_12_12 VDDA_12_13

VDDA_18_1

VDDA_18_2

VDDA_18_3

VDDA_18_4

VDDA_18_5

VDDA_18_6

VDDA_18_7

VDDA_18_8

VDDA_18_9 VDDA_18_10 VDDA_18_11 VDDA_18_12 VDDA_18_13 VDD_CORE1 VDD_CORE2 VDD_CORE3 VDD_CORE4 VDD_CORE5 VDD_CORE6 VDD_CORE7 VDD_CORE8 VDD_CORE9

VDD_CORE10 VDD_CORE11 VDD_CORE12 VDD_CORE13 VDD_CORE14 VDD_CORE15 VDD_CORE16 VDD_CORE17 VDD_CORE18 VDD_CORE19 VDD_CORE20 VDD_CORE21 VDD_CORE22 VDD_CORE23 VDD_CORE24 VDD_CORE25 VDD_CORE26 VDD_CORE27 VDD_CORE28 VDD_CORE29 VDD_CORE30 VDD_CORE31 VDD_CORE32 VDD_CORE33 VDD_CORE34 VDD_CORE35 VDD_CORE36 VDD_CORE37 VDD_CORE38

VSS77

VSS78

VSS79

VSS80

VSS81

VSS82

VSS122

VSS123

VSS124

VSS125

VSS126

L27

P25

P28

H24

N28

M27

H9 AA7 G9 U8 N7 N8 U7 F9 AA8 G8 G7 J8 J7 B1 AG4 R8 AC8 AC7 AF6 AE6 L8 W8 W7 L7 R7 AF5 AK2 N16 M13 M15 W16 N18 P19 N12 P15 N14 M17 T19 G22 R12 P13 R14 V19 R18 U16 U12 T13 U14 T17 U18 E22 R16 V13 T15 P17 W18 D22 W12 V15 W14 V17 M19 H22 H21 D21

VSS72

VSS73

VSS74

VSS75

VSS76

VSS114

VSS115

VSS116

VSS117

VSS118

VSS119

VSS120

J28

T23

K28

H28

N19

M24

VDDA12_13

VDDA18_13

CHANGE TO 71.RS48M.B0U (VER A22)

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

GROUND

VSS113

T8

F28

12

1D8V_VDDA

12

1D2V_S0

C

VSS62

VSS63

VSS64

VSS65

12

C261

C261 SC1U10V3KX

SC1U10V3KX

12

C332

C332 SC1U10V3KX

SC1U10V3KX

12

C289

C289 SC10U10V5ZY

SC10U10V5ZY

12

C292

C292 SC10U10V5ZY

SC10U10V5ZY

VSS60

VSS61

C263

C263 SCD1U16V

SCD1U16V

C302

C302 SCD1U16V

SCD1U16V

DY

VSS59

VSS58

VSSA60M7VSSA61V7VSSA62F6VSSA63E6VSSA64U5VSSA65U6VSSA66E5VSSA67L5VSSA68

AJ1

VSSA59

12

VSS55

VSS56

VSS57

VSSA58L6VSSA59

AG3

C304

C304 SCD1U16V

SCD1U16V

C303

C303 SCD1U16V

SCD1U16V

C294

C294 SCD1U16V

SCD1U16V

C290

C290 SCD1U16V

SCD1U16V

VSS54

VSS53

12

VSS50

VSS51

VSS52

C301

C301 SCD1U16V

SCD1U16V

C262

C262 SCD1U16V

SCD1U16V

C295

C295 SCD1U16V

SCD1U16V

C286

C286 SCD1U16V

SCD1U16V

VSS48

VSS49

VSSA51K7VSSA52H7VSSA53M3VSSA54V6VSSA55H8VSSA56C2VSSA57

AD6

12

DY

12

VSS44

VSS45

VSS46

VSS47

VSSA44D6VSSA45C4VSSA46K3VSSA47

VSSA48T7VSSA49Y7VSSA50

AB8

AD5

1D2V_VDDA_RS480_S0

12

C299

C299 SCD1U16V

SCD1U16V

C300

C300 SCD1U16V

SCD1U16V

C256

C256 SCD1U16V

SCD1U16V

DY

C297

C297 SCD1U16V

SCD1U16V

12

C260

C260 SCD1U16V

SCD1U16V

C298

C298 SCD1U16V

SCD1U16V

VSS40

VSS41

VSS42

VSS43

C305

C305 SC10U10V5ZY

SC10U10V5ZY

12

VSS37

VSS38

VSS39

VSSA38C9VSSA39C7VSSA40J5VSSA41R6VSSA42J3VSSA43

AA5

TC10

TC10 ST100U6D3VDM-5

ST100U6D3VDM-5

DY

12

D

F26

W27

D11

H11

AD25

VSS33

VSS34

VSS35

VSS36

VSSA34G3VSSA35B4VSSA36P7VSSA37

AB7

12

DY

1 2

C296

C296 SCD1U16V

SCD1U16V

VSS30

D15

AD9

G11

F16

G30

AB28

AB25

D12

AD24

AA28

G17

Y23

AC9

R19

Y27

C28

G16

F25

B30

T24

VSS12D9VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSSA22A2VSSA23

VSSA24P8VSSA25J6VSSA26C8VSSA27

VSSA28V8VSSA29F3VSSA30

VSSA31

VSSA32M5VSSA33

AF3

AE3

1 2

TC9

TC9 ST100U6D3VDM-5

ST100U6D3VDM-5

1D8V_S0

L9

L9 MLB-201209-11

MLB-201209-11

AA3

AB3

AD3

VSSA22

1D2V_S0

L10

L10 MLB-201209-11

MLB-201209-11

SB 0127

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

ATI-RS480M (4 of 4) PWR, GND

A3

Bolsena

AC27

G15

G14

Y24

G13

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10E9VSS11

VSSA7R3VSSA8

VSSA9T3VSSA10M6VSSA11C5VSSA12F8VSSA13M8VSSA14Y8VSSA15V3VSSA16C3VSSA17W3VSSA18K8VSSA19D3VSSA20C6VSSA21

F5

AA6

VDDA12_13

VSSA22

VDDA18_13

VSSA59

VDDHT30

VSS30

VDDHT31

VSS89

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

AD27

VSS4

VSSA4N3VSSA5F7VSSA6

AD29

VSS3

VSSA3

V5

G10

G12

VSS2

PAR 6 OF 6

VSSA2

R5

AE5

14 58Thursday, March 31, 2005

VSS1

VSSA1

12

C264

C264 SC4D7U10V5ZY

SC4D7U10V5ZY

C334

C334 SC4D7U10V5ZY

SC4D7U10V5ZY

C736

C736 SC4D7U10V5ZY

SC4D7U10V5ZY

C796

C796 SC4D7U10V5ZY

SC4D7U10V5ZY

of

-1

A

B

C

D

E

3D3V_S0

2

14

RN16

SRN10KJ

4 4

To Discrete

RN20

DIS_DVI_DDC_D49

DIS_DVI_DDC_C49

3 4

SRN0-2-U

Dummy when use UMA

To UMA

DDC_DATA13

RS480_CLK13

3 3

2 2

2 1

3 4

3D3V_S0

12

DVI_D_1

DVI_C_1

RN21

SRN0-2-U

R720

R720 10KR2

10KR2

DY

R723

R723 330R2

330R2

SRN10KJ

3

5 6

2 1

PCIRST_BUF#18,26,28,29,31,57

1 2

34 2 1

R733 0R2-0R733 0R2-0

12

U11

U11 2N7002DW

2N7002DW

C955

3D3V_S0

DUMMY-C2

1D8V_S0

To Discrete

R42

DVI_HPD49

TMDS_UMA_HPD13

1 2

To UMA & CH7301

1 1

A

B

5V_S0

2

14

RN15

SRN10KJ

3

DVO_MDA3312 DVO_MDA3412 DVO_MDA3512 DVO_MDA3612 DVO_MDA3712 DVO_MDA3812 DVO_MDA4812 DVO_MDA3912 DVO_MDA5112 DVO_MDA5012 DVO_MDA4912 DVO_MDA5212

DVO_MDA5312

DVO_MDA5412 DVO_MDA5512

RN118 SRN0-2-URN118 SRN0-2-U

DVI_D_1

3

DVI_C_1

4

R721 0R2-0

1 2

R722 0R2-0

1 2

R724 140R2F-GPR724 140R2F-GP

1 2

R725

1 2

2K4R2F

0R2-0

IDCKN12 IDCKP12

DY

DY DY

DY

R361KR2 R361KR2 R351KR2 R351KR2

12

To EZ4 (5V level)

EZ4_DVI_DDC_D 57

EZ4_DVI_DDC_C 57

DVO_MDA33 DVO_MDA34 DVO_MDA35 DVO_MDA36 DVO_MDA37 DVO_MDA38 DVO_MDA48 DVO_MDA39 DVO_MDA51DVO_MDA51 DVO_MDA50 DVO_MDA49 DVO_MDA52

DVO_MDA53

DVO_MDA54 DVO_MDA55

CH7301_DATA

2

CH7301_CLK

1

DVI_GIPO0 DVI_GIPO1

DVI_AS

DVI_VSWING VREF_DVI

12 12

C25SCD1U10V2MX C25SCD1U10V2MX

TMDS_HPD

DVI_ISET

Dummy when use UMA

R41

0R2-0

Dummy when use Discrete

SB 0128

CHT2222A

50

D11

51

D10

52

D9

53

D8

54

D7

55

D6

58

D5

59

D4

60

D3

61

D2

62

D1

63

D0

56

XCLK#

57

XCLK

2

DE

46

P-OUT/TLDET#

4

H

5

V

13

RESET#

14

SPD

15

SPC

8

GPIO0

7

GPIO1/TLDET#

10

AS

35

ISET

19

VSWING

3

VREF

Q3

12

10KR2

3

2

C

R43

1

TMDS_EZ4_TX0-

TMDS_EZ4_TX0+

TMDS_EZ4_TX1-

21

24

22

TDC0

TDC0#

TDC1#

XI/FIN

42

Q4

CHT2222A

TMDS_EZ4_TX2-

TMDS_EZ4_TX2+

TMDS_EZ4_TXC+

TMDS_EZ4_TX1+

27

25

28

TDC1

TDC2

TDC2#

3D3V_S0

12

3

2

30

TLC

TMDS_EZ4_TXC-

31

TLC#

R56

R56 10KR2

10KR2

1

C/HSYNC

XO

CH7301C-T

43

HPDET

BCO

CVBS

CVBS/B

DVDD DVDD DVDD

DGND DGND DGND

DVDDV

TVDD

TVDD TGND TGND TGND

AVDD

AVDD AGND AGND AGND

VDD GND GND

SB 0202

U10

Y/G C/R

SB 0127

9 47 48 36 37 38 39 1

12 49

6 11 64

45 23

29 20 26 32

18 44 16 17 41 33 34 40

TMDS_UMA_HPD

R726 75R2F

1 2

DY

R728 75R2F

1 2

DY

R727 75R2F

1 2

DY

3D3V_DVI_DVDD_S0

1D8V_DVI_DVDDV_S0

3D3V_DVI_TVDD_S0

3D3V_DVI_AVDD_S0

3D3V_DVI_VDD_S0

TMDS_EZ4_TX2- 49,57

TMDS_EZ4_TX2+ 49,57

TMDS_EZ4_TX1- 49,57

TMDS_EZ4_TX1+ 49,57

TMDS_EZ4_TX0- 49,57

TMDS_EZ4_TX0+ 49,57

TMDS_EZ4_TXC+ 49,57

TMDS_EZ4_TXC- 49,57

12

C954

C953

SC10U10V5ZY

1 2

SCD1U10V2MX

12

C26

C27

1 2

SCD1U10V2MX

12

R3

SB 0127

100KR2R3100KR2

Place Near Dock

D

SB change much in this page 0127

3D3V_S0

R34

12

BLM11A121S

12

C51

C52

R54

12

BLM11A121S

R4

SC2200P50V2KX

1 2

10KR2R410KR2

1D8V_S0

3D3V_S0

R39

12

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

1 2

SC2200P50V2KX

12

C57

C56

1 2

SC2200P50V2KX

12

C29

C30

1 2

SC2200P50V2KX

Dummy when use Discrete

DVI_EZ4_HPD 57

Dummy when no EZ4

UMA DVI - CH7301C

BLM11A121S

12

C24

SC10U10V5ZY

SCD1U10V2MX

D51

12

C55

12

C28

Bolsena

21

SSM5817S

R40

SC10U10V5ZY

12

BLM11A121S

SC10U10V5ZY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

-1

15 58Thursday, March 31, 2005

of

-1

A

CRT CONN

200mA Rating/Spec 500mA

5V_S0

4 4

RN6

2

UMA_HS13 UMA_VS13

Dummy when use Discrete

DIS_HS49 DIS_VS49

3 4

Dummy when use UMA

SRN0-2-U

RN7

SRN0-2-U

VSYNC_5_1

1

2 1

HSYNC_5_1

14

4

5 6

7

2 3

U2B

TSAHCT125

U2A

14

1

HSYNC_5

TSAHCT125

7

VSYNC_5

C3

DUMMY-C2C3DUMMY-C2

B

To SYS and EZ4 CRT Both

R1

1 2

10R3R110R3

R2

1 2

10R3R210R3

12

SC 0308

C2

DUMMY-C2C2DUMMY-C2

SYS_HS

SYS_VS

RN5

3 4

SRN0-2-U

Dummy when no EZ4

2 1

UMA_CRT_DDC_D13

UMA_CRT_DDC_C13

EZ4_HS 57

EZ4_VS 57

C

RN3

3 4

SRN0-2-U

Dummy when use Discrete

DIS_CRT_DDC_D49

DIS_CRT_DDC_C49

2

14

RN82

SRN10KJ

3

CRT_DDC_D_1

2

CRT_DDC_C_1

1

RN4

SRN0-2-U

2 1

3 4

Dummy when use UMA

D

3D3V_S0

5V_CRT_S0

2

5V_S0

12

14

C657

C657 SCD01U50V2ZY

SCD01U50V2ZY

U1

U1 2N7002DW

2N7002DW

34 5 6

2

1

To SYS and EZ4 CRT Both

RN1

SRN10KJ

3

SYS_CRT_DDC_D5 SYS_CRT_DDC_C5

RN2

SRN0-2-U

5V_CRT_S0

2 1

D28

1 2

RB751V-40-U

3 4

E

EZ4_CRT_DDC_D 57 EZ4_CRT_DDC_C 57

Dummy when no EZ4

3 3

CRT_R_SYS57

CRT_G_SYS57

CRT_B_SYS57

2 2

1 1

12

DY

TV_LUMA_SYS57

TV_COMP_SYS57

TV_CRMA_SYS57

C666

A

12

SC47P50V2JN

DY

C667

12

C668

SC47P50V2JN

DY

12

R505150R2FR505150R2F

R504150R2FR504150R2F

SC 0228

R171

R172

R151

150R2F

1 2

SC 0302

12

R506150R2FR506150R2F

L22

1 2

L23

1 2

L24

1 2

12

C236

C236 SC100P50V2JN

SC100P50V2JN

1 2

12

C237

C237 SC100P50V2JN

SC100P50V2JN

1 2

12

C238

SC100P50V2JN

BLM18BB750SN1D

C232

C232 SC47P50V2JN

SC47P50V2JN

L6

IND-1D2UH

C233

C233 SC47P50V2JN

SC47P50V2JN

L7

IND-1D2UH

C231

C231 SC47P50V2JN

SC47P50V2JN

L8

IND-1D2UH

B

C652

SC8D2P50V2CC

TV_LUMA_CON

12

C235

C235 SC270P50V

SC270P50V

TV_COMP_CON

12

C234

C234 SC270P50V

SC270P50V

TV_CRMA_CON

12

C209

SC270P50V

CRT_R

CRT_G

CRT_B

12

C653

SC8D2P50V2CC

SC 0228

12

C654

SC 0228

3

2

1 4

2 5 7 6 3

MINDIN7-11

22.10021.D81

ME : 22.10021.D81

TV1

3

SC8D2P50V2CC

D34

BAV99-2

D35

BAV99-2

D36

BAV99-2

SC 0302

DY

D27

BAV99-2

DY

2

1

2

1

2

1

3

2

3D3V_S0

D26

1

BAV99-2

DY

3

2

TV_LUMA_CON

TV_COMP_CON

TV_CRMA_CON

C

D25

1

BAV99-2

DY

SYS_HS

SYS_VS

C655

SC100P50V2JN

5V_S0

8

9

SYS_CRT_DDC_D5

SYS_CRT_DDC_C5

C659

12

C656

SC100P50V2JN

SC10P50V2JN-1

TV CONN

COMPOSIT

D

CRT_R

CRT_G CRT_B

5V_CRT_S0

12

C658

SC10P50V2JN-1

456

123

7

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

CRT / TV

CRT / TV Bolsena

Bolsena

CRT1

17

6 1

11

7 2 8 3 9 4

10

5

20.20378.015

VIDEO-15-42

12 13 14 15 16

SYS_CRT_DDC_D5 SYS_HS SYS_VS SYS_CRT_DDC_C5

ME : 20.20378.015

LUMACHROMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

16 58Thursday, March 31, 2005

E

-1

of

-1

A

B

C

D

E

LEDs

4 4

Dummy when use IDE

R22

C663

1 2

0R2-0

2

1

SC 0310

DCBATOUT

C651

12

SC10U35V0ZY-U

D8

MEDIA_LED#

3

BAW56D8BAW56

NUM_LED#34 CAP_LED#34 MAIL_LED#34 BLT_LED#34

STDBY_LED#34 CHARGE_LED#34 DC_BATFULL#34

FRONT_PWRLED#34

LCD CONN

LCD1

42

2 4

6 8

3D3V_S0

C664

12

SCD1U

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 41

JST-CONN40A-2

20.F0439.040

1ST 20.F0687.040 - 2ND 20.F0439.040

NUM_LED#

CAP_LED# MAIL_LED# MEDIA_LED#

WLAN_LED#

STDBY_LED# BLT_LED#

CHARGE_LED#

DC_BATFULL#

FRONT_PWRLED#

LCDPOWER_S0

12

C39

C37

SC10U10V5ZY

C37

1 3

5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

SB 0202

B

DY

LCD_TXBCLK+ 13,54 LCD_TXBCLK- 13,54 LCD_TXBOUT2+ 13,54 LCD_TXBOUT2- 13,54 LCD_TXBOUT1+ 13,54 LCD_TXBOUT1- 13,54 LCD_TXBOUT0+ 13,54 LCD_TXBOUT0- 13,54 LCD_TXACLK+ 13,54 LCD_TXACLK- 13,54 LCD_TXAOUT2+ 13,54 LCD_TXAOUT2- 13,54 LCD_TXAOUT1+ 13,54 LCD_TXAOUT1- 13,54 LCD_TXAOUT0+ 13,54 LCD_TXAOUT0- 13,54

1 2 3 4 5

C644SC100P50V2JNC644SC100P50V2JN

1 2

C229SC100P50V2JNC229SC100P50V2JN

1 2

12

C38

SCD1U

DY

SCD1U

EVEN CHANNEL

ODD CHANNEL

R21

1 2

0R2-0

WLAN_LED#31

EDID_CLK13,49

EDID_DAT13,49

C665

1 2

SC100P50V2JN

A

SATA_LED#19

HDD_LED#_525

Dummy when use SATA

CDROM_LED#_525

3 3

2 2

BRIGHTNESS34

FPBACK34

1 1

?modify R ?half light

SRC100P50V-U

RC2

8 7 6

SRC100P50V-U

RC9

8 7 6

on KB cover

LED ButtonVV

POWER1 E-MAIL INTERNET e-BTN PROGRAM

Front panel

LED ButtonVV

BlutToothWireless Charger Power2

LCD_VDD_ON13,54

C

NUM_LED#

CAP_LED#

MAIL_LED#

MEDIA_LED#

WLAN_LED#

SC 0302

FRONT_PWRLED#

DC_BATFULL#

BLT_LED#

STDBY_LED#

CHARGE_LED#

V

R17

1 2

R16

1 2

R14

1 2

R19

1 2

R483

1 2

R10

1 2

R497

1 2

R495

1 2

R480

1 2

R496

1 2

R494

1 2

SC 0302

330R2

VVVV

V

VV

V

(Please See M.E. drawing LED position)

LCD POWER

Layout 40 mil

1KR2

LCDVDD_ON_1

12

C40

SC1U10V3KX

12

C42

C42 SCD1U

SCD1U

R50

1 2

D6 LED-G-31D6 LED-G-31

1 2

D5 LED-G-31D5 LED-G-31

1 2

D4 LED-G-31D4 LED-G-31

1 2

D7 LED-G-31D7 LED-G-31

1 2

D24 LED-Y-22D24 LED-Y-22

1 2

D3 LED-G-31D3 LED-G-31

1 2

D50 LED-G-31D50 LED-G-31

1 2

D48 LED-G-31D48 LED-G-31

1 2

D23

LED-B-27-U-GP

D49 LED-Y-22D49 LED-Y-22

1 2

D47 LED-Y-22D47 LED-Y-22

1 2

CAPS NUM HDD

Charger: Green : DC only or Battery full with DC Orange : Charging Orange Blink : Battery low

U13

1

OUT

2

GND ON/OFF#3IN

AAT4280IGU-3-T1

D

GND

IN

5V_S0

5V_S5

SC 0308

5V_S0

12

5V_S5

VVV

6 5 4

Title

Size Document Number Rev

A3

Date: Sheet

SC 0302

on KB Cover on KB Cover on KB Cover on KB Cover

on Front Panel

on KB Cover

on Front Panel

SC 0302

on Front Panel on Front Panel

3D3V_S0LCDPOWER_S0

12

C43

C43 SC1U10V3KX

SC1U10V3KX

LCD / LEDs

Power2: Green : S0 Orange : S3 Orange Blinking : Enter S4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bolsena

E

-1

17 58Thursday, March 31, 2005

of

-1

A

?3.9p need app PN

PCIE_RX0P_SB12 PCIE_RX0N_SB12 PCIE_RX1P_SB12 PCIE_RX1N_SB12

PCIE_VDDR

RSTDRV#_5 25

SC 0228

SBSRC_CLK3 SBSRC_CLK#3

PCIE_TX0P_SB12 PCIE_TX0N_SB12 PCIE_TX1P_SB12 PCIE_TX1N_SB12

12

C486

DY

SCD1U16V

10

INT_PIRQG#

9

INT_PIRQD#INT_PIRQC#

8

INT_PIRQE#

7

INT_PIRQF#

LPC_RST# 13,34,37

ALLOW_LDTSTOP13 SB_CPUPWRGD6

BMREQ#13 LDT_RST#6,13

CHANGE TO - 3.9P -> 78.3R974.1F1

C579

1 2

SC12P50V2JN-1

4 4

XTAL-32D768K-4P

1D8V_S0

3 3

2 2

A_RST# RSTDRV#_R

A_RST#

12

1 1

SC12P50V2JN-1

X5

2 3

C566

1 2

SC12P50V2JN-1

CHANGE TO - 3.9P -> 78.3R974.1F1

SB

L16

1 2

MLB-201209-11

R367

R367 8K2R2

8K2R2

PCIRST#

12

5V_S0

14

12 11

7

1 2

3D3V_S5

4 5

41

C479

SC10U10V5ZY

13

3D3V_S5

147

R381

R382

20MR3

32K_X1 32K_X2

MAIN SOURCE: 82.30001.031 EPSON

PCIE_PVDD

2ND SOURCE: 82.30001.341 KDS

12

1D8V_S0 PCIE_VDDR

1 2

U2D

TSAHCT125

C480

SC1U10V3KX

L15

0R0603-PAD

SC 0308

INT_PIRQA# INT_PIRQB#

INT_PIRQH#

3D3V_S0

C485

SCD1U16V

12

DY

R13

1 2

C475

SC10U10V5ZY

RP4

1 2 3 4 5 6

SRP10K

33R2

PCIRST# 3V to 5V level shift for HDD & CDROM

SB400 asserts PLTRST# to reset devices on the platform.

U51A

3

TSLCX08-U

U51B

PCI_RST#

6

TSLCX08-U

PLT_RST#_R

R368

1 2

R366

1 2

33R2

10R3

12

Secondary PCI Bus reset signal.

A

B

A_RST#

C478 SCD01U16V2KXC478 SCD01U16V2KX

1 2

C481 SCD01U16V2KXC481 SCD01U16V2KX

1 2

C476 SCD01U16V2KXC476 SCD01U16V2KX

1 2

C477 SCD01U16V2KXC477 SCD01U16V2KX

1 2

R304 150R2FR304 150R2F

1 2

R305 150R2FR305 150R2F

1 2

R303 4K12R2FR303 4K12R2F

1 2

A11, A12 4K53 1% A21, A22 5K5 1% A23 4K12 1% PA_IXP400AC10.PDF

12

C450

3D3V_S0

12

C483

DY

SCD1U16V

TP72TP72 TP71TP71

INT_PIRQE#26 INT_PIRQF#26,31 INT_PIRQG#26 INT_PIRQH#29

TP66TP66 TP64TP64 TP94TP94 TP65TP65 TP68TP68

LDT_STP#6,13

TP67TP67 TP93TP93 TP92TP92

TP91TP91

CHANGE TO 71.SB400.D0U (VER A32)

B

12

PCIRST_BUF# 15,26,28,29,31,57

SC 0307

PCIE_PVDD

C482

SCD1U16V

12

PCIE_CALRP PCIE_CALRN

PCIE_CALI

SB_CPUSTP#

SB_PCISTP# INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

INT_PIRQE#

INT_PIRQF#

INT_PIRQG#

INT_PIRQH#

SB_C29 SB_A28 H_NMI FWH_INIT# SB_D29

SB_B30

H_A20M# H_FERR#

H_DPRSLP#

R365

R365 8K2R2

8K2R2

TX0P TX0N TX1P TX1N

32K_X1

32K_X2

U43A

AH8

A_RST#

L27

PCIE_RCLKP

M27

PCIE_RCLKN

M30

PCIE_TX0P

N30

PCIE_TX0N

K30

PCIE_TX1P

L30

PCIE_TX1N

H30

PCIE_TX2P

J30

PCIE_TX2N

F30

PCIE_TX3P

G30

PCIE_TX3N

M29

PCIE_RX0P

N29

PCIE_RX0N

M28

PCIE_RX1P

N28

PCIE_RX1N

J29

PCIE_RX2P

K29

PCIE_RX2N

J28

PCIE_RX3P

K28

PCIE_RX3N

G27

PCIE_CALRP

H27

PCIE_CALRN

G28

PCIE_CALI

R30

PCIE_PVDD

F26

PCIE_VDDR_1

R29

PCIE_VDDR_2

G26

PCIE_VDDR_3

P26

PCIE_VDDR_4

K26

PCIE_VDDR_5

L26

PCIE_VDDR_6

P28

PCIE_VDDR_7

N26

PCIE_VDDR_8

P27

PCIE_VDDR_9

H28

PCIE_VSS_1

F29

PCIE_VSS_2

H29

PCIE_VSS_3

H26

PCIE_VSS_4

F27

PCIE_VSS_5

G29

PCIE_VSS_6

L29

PCIE_VSS_7

J26

PCIE_VSS_8

L28

PCIE_VSS_9

J27

PCIE_VSS_10

N27

PCIE_VSS_11

M26

PCIE_VSS_12

K27

PCIE_VSS_13

P29

PCIE_VSS_14

P30

PCIE_VSS_15

AJ8

CPU_STP#/DPSLP#

AK7

PCI_STP#

AG5

INTA#

AH5

INTB#

AJ5

INTC#

AH6

INTD#

AJ6

INTE#/GPIO33

AK6

INTF#/GPIO34

AG7

INTG#/GPIO35

AH7

INTH#/GPIO36

B2

X1

B1

X2

C29

CPU_PG

A28

INTR/LINT0

C28

NMI/LINT1

B29

INIT#

D29

SMI#

E4

SLP#/LDT_STP#

B30

IGNNE#

F28

A20M#

E28

FERR#

E29

STPCLK#/ALLOW_LDTSTP

D25

LDT_PG/SSMUXSEL/GPIO0

E27

DPRSLPVR

D27

BMREQ#

D28

LDT_RST#

SB400-1

5

C

SB400 SB

Part 1 of 4

PCI EXPRESS INTERFACE

PCI INTERFACE

REQ4#/PLL_BP33/PDMA_REQ1#

GNT3#/PLL_BP66/PDMA_GNT0# GNT4#/PLL_BP50/PDMA_GNT1#

LPC

CPU XTAL

RTC_IRQ#/ACPWR_STRAP

RTC

RTC_AUX_S5_1

123

4

RTC2

SCON3

21.D0010.103

C

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK9

PCICLK_FB

PCI CLKS

PCIRST# AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11

AD8/ROMA9

AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7

AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE0#/ROMA10

CBE1#/ROMA1

CBE2#/ROMWE#

CBE3#

FRAME#

DEVSEL#/ROMA0

IRDY#

TRDY#/ROMOE#

PAR/ROMA19

STOP# PERR# SERR#

REQ0#

REQ1#

REQ5#/GPIO13 REQ6#/GPIO31

GNT5#/GPIO14 GNT6#/GPIO32

CLKRUN#

LFRAME#

LDRQ0# LDRQ1#

SERIRQ

RTCCLK

RTC_GND

EC91

EC91 SC470P50V2KX

SC470P50V2KX

REQ2#

GNT0#

GNT1#

GNT2#

LOCK#

LAD0 LAD1 LAD2 LAD3

VBAT

SC 0310

REQ3#/PDMA_REQ0#

12

L4 L3 L2 L1 M4 M3 M2 M1 N4 N3 N2

AJ7 W3 Y2 W4 Y3 V1 Y4 V2 W2 AA4 V4 AA3 U1 AA2 U2 AA1 U3 T4 AC1 R2 AD4 R3 AD3 R4 AD2 P2 AE3 P3 AE2 P4 AF2 N1 AF1 V3 AB4 AC2 AE4 T3 AC4 AC3 T2 U4 T1 AB2 AB3 AF4 AF3 AG2 AG3 AH1 AH2 AH3 AJ2 AK2 AJ3 AK3 AG4 AH4 AJ4 AG1 AB1

AG25 AH25 AJ25 AH24 AG24 AH26 AG26

AK27

C2 F3

A2 A1

PCI_CLK1_R PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R PCI_CLK6_R

PCI_CLK9_R PCI_CLK9_FB

PCIRST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PCI_REQ#4

PCI_REQ#5 PCI_REQ#6

PCI_GNT#3 PCI_GNT#4 PCI_GNT#5 PCI_GNT#6

PCI_LOCK#

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LPC_LDRQ1#

VBAT

12

C565

1 2

22R2

1 2

22R2

1 2

22R2

1 2

22R2

1 2

22R2

1 2

PCI_REQ#3

TP105TP105 TP104TP104 TP106TP106 TP107TP107

P_SERIRQ 26,34,37

RTC_CLK 22 AUTO_ON# 22

12

C561

SC1U10V3KX

RTC_AUX_S5

SCD1U16V

D

32K suspend clock output

PM_SLP_S3#21,34,38,39,43,44,55,57 RTC_CLK22

CLK33_CBUS

R40022R2 R40022R2

CLK33_LAN

R397

CLK33_MINI

R396

CLK33_KBC

R402

CLK33_SIO

R401

CLK33_LPCROM

R398

R399

22R2

1 2

PCI_AD[31..0] 22,26,29,31

12

C591

C591 DUMMY-C2

DUMMY-C2

3D3V_S0

RN78

123

SRN10K-2

LPC_LAD[0..3] 34,37

LPC_LFRAME# 34,37 LPC_LDRQ0# 37

3D3V_AUX_S5

3

1 2

D

RN80

678

4 5

123

SRN10K-2

Close to chip

U47

U47 BAT54C-U

BAT54C-U

5V_S5

U44A

147

1 2

PCI_CLK7 22 PCI_CLK8 22

C588

C588 SC100P50V2JN

SC100P50V2JN

DY

12

C585

C585 DUMMY-C2

DUMMY-C2

RN77

678

123

4 5

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

4 5

SRN10K-2

PM_CLKRUN# 26,29,31,34,37

RTC_AUX_S5

R362

R362 1KR2

1KR2

1 2

RTC_AUX_S5_1

123

5

RTC1 SCON3

ME : 21.D0010.103

21.D0010.103

ATI-SB400 (1 of 5) PCI, PCIE

3

TSAHCT08-U

CLK33_CBUS CLK33_LAN CLK33_MINI CLK33_KBC CLK33_SIO CLK33_LPCROM

12

C584

C593

DUMMY-C2

RN79

678

R4038K2R2 R4038K2R2

12

123

4 5

SRN10K-2

DY

12

EC61

EC61 SC470P50V2KX

SC470P50V2KX

SC 0308

4

DY

SC 0310

Bolsena -1

E

R349

1 2

10R3

CLK33_CBUS 26 CLK33_LAN 22,29 CLK33_MINI 22,31 CLK33_KBC 22,34 CLK33_SIO 22,37 CLK33_LPCROM 22

12

C592

C587

DUMMY-C2

RN74

LPC_LAD0 LPC_LAD3 LPC_LAD2 LPC_LAD1

RN74

1 2 3 4 5

SRN10K-2

PCI_CBE#0 26,29,31

PCI_CBE#1 26,29,31

PCI_CBE#2 26,29,31

PCI_CBE#3 26,29,31

PCI_FRAME# 26,29,31

PCI_DEVSEL# 26,29,31

PCI_IRDY# 26,29,31

PCI_TRDY# 26,29,31

PCI_PAR 26,29,31

PCI_STOP# 26,29,31

PCI_PERR# 26,29,31

PCI_SERR# 26,29,31

PCI_REQ#0 31 PCI_REQ#1 26 PCI_REQ#2 29

PCI_GNT#0 31 PCI_GNT#1 26 PCI_GNT#2 29

SC 0310

8 7 6

Pull up 100k to 3D3V_S0

P_SERIRQ LPC_LDRQ1# LPC_LDRQ0#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

1 2 1 2 1 2

18 58Thursday, March 31, 2005

R326

R326 R306

R306 R327

R327

of

CLK32_G791 23

3D3V_S0

10KR2

10KR2 10KR2

10KR2

A

B

C

D

E

U43B

4 4

SATA_TXP025 SATA_TXN025

SATA_RXN025 SATA_RXP025

1 2 1 2

C515 SCD01U50V3KXC515 SCD01U50V3KX C516 SCD01U50V3KXC516 SCD01U50V3KX

C622 SCD01U50V3KXC622 SCD01U50V3KX C621 SCD01U50V3KXC621 SCD01U50V3KX

SATA_TP0 SATA_TN0

SATA_RN0 SATA_RP0

Close to SouthBridge

R342

1 2

1KR2F

C542

1 2

SCD01U50V3KX

3 3

SATA_LED#17

SATA_X2

SATA_X1

X-25MHZ-11-U

1 2

X4

1 2

C545

C545 SC27P50V2JN

SC27P50V2JN

C544

C544 SC27P50V2JN

SC27P50V2JN

Dummy when use IDE

R344

R344 0R2-0

0R2-0

1D8V_SATA_S0

12

R328

R328 0R2-0

0R2-0

2 2

SATA_X1

12

Dummy when use SATA

1D8V_S0 1D8V_SATA_S0

R343

1 1

1 2

0R5J-1

12

C546

SC10U10V5ZY

1D8V_SP_S0 1D8V_SX_S0 1D8V_SATA_S0

12

C541

SCD1U50V5ZY

SATA_X1 SATA_X2

12

U43B

AK22

SATA_TX0+

AJ22

SATA_TX0-

AK21

SATA_RX0-

AJ21

SATA_RX0+

AK19

SATA_TX1+

AJ19

SATA_TX1-

AK18

SATA_RX1-

AJ18

SATA_RX1+

AK14

SATA_TX2+

AJ14

SATA_TX2-

AK13

SATA_RX2-

AJ13

SATA_RX2+

AK11

SATA_TX3+

AJ11

SATA_TX3-

AK10

SATA_RX3-

AJ10

SATA_RX3+

AJ15

SATA_CAL

AJ16

SATA_X1

AK16

SATA_X2

AK8

SATA_ACT#

AH15

PLLVDD_SATA

AH16

XTLVDD_SATA

AG10

AVDD_SATA_1

AG14

AVDD_SATA_2

AH12

AVDD_SATA_3

AG12

AVDD_SATA_4

AG18

AVDD_SATA_5

AG21

AVDD_SATA_6

AH18

AVDD_SATA_7

AG20

AVDD_SATA_8

AG9

AVSS_SATA_1

AF10

AVSS_SATA_2

AF11

AVSS_SATA_3

AF12

AVSS_SATA_4

AF13

AVSS_SATA_5

AF14

AVSS_SATA_6

AF15

AVSS_SATA_7

AF16

AVSS_SATA_8

AF17

AVSS_SATA_9

AF18

AVSS_SATA_10

AF19

AVSS_SATA_11

AF20

AVSS_SATA_12

AF21

AVSS_SATA_13

AF22

AVSS_SATA_14

AH9

AVSS_SATA_15

AG11

AVSS_SATA_16

AG15

AVSS_SATA_17

AG17

AVSS_SATA_18

AG19

AVSS_SATA_19

AG22

AVSS_SATA_20

AG23

AVSS_SATA_21

AF9

AVSS_SATA_22

AH17

AVSS_SATA_23

AH23

AVSS_SATA_24

AH13

AVSS_SATA_25

AH20

AVSS_SATA_26

AK9

AVSS_SATA_27

AJ12

AVSS_SATA_28

AK17

AVSS_SATA_29

AK23

AVSS_SATA_30

AH10

AVSS_SATA_31

AJ23

AVSS_SATA_32

SB400-1

CHANGE TO 71.SB400.D0U(VER A32)

12

C543

C518

SCD1U50V5ZY

C540

SCD1U50V5ZY

SB400 SB

Part 2 of 4

SERIAL ATA

PRIMARY ATA 66/100

SECONDARY ATA 66/100

SERIAL ATA POWER

L19

1 2

0R3-U

Capacitor PLACE NEAR THE ACCORDED BALLS

PIDE_IORDY

PIDE_IRQ

PIDE_A0 PIDE_A1 PIDE_A2

PIDE_DACK#

PIDE_DRQ PIDE_IOR#

PIDE_IOW#

PIDE_CS1# PIDE_CS3#

PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8

PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15

SIDE_IORDY

SIDE_IRQ

SIDE_A0

SIDE_A1

SIDE_A2

SIDE_DACK#

SIDE_DRQ SIDE_IOR#

SIDE_IOW#

SIDE_CS1# SIDE_CS3#

SIDE_D0/GPIO15 SIDE_D1/GPIO16 SIDE_D2/GPIO17 SIDE_D3/GPIO18 SIDE_D4/GPIO19 SIDE_D5/GPIO20 SIDE_D6/GPIO21 SIDE_D7/GPIO22 SIDE_D8/GPIO23

SIDE_D9/GPIO24 SIDE_D10/GPIO25 SIDE_D11/GPIO26 SIDE_D12/GPIO27 SIDE_D13/GPIO28 SIDE_D14/GPIO29 SIDE_D15/GPIO30

AVSS_SATA_33 AVSS_SATA_34 AVSS_SATA_35 AVSS_SATA_36 AVSS_SATA_37 AVSS_SATA_38 AVSS_SATA_39 AVSS_SATA_40 AVSS_SATA_41 AVSS_SATA_42 AVSS_SATA_43 AVSS_SATA_44 AVSS_SATA_45

1D8V_S01D8V_S0 1D8V_SX_S01D8V_SP_S0

12

C548

C548 SC2D2U16V5ZY

SC2D2U16V5ZY

AD30 AE28 AD27 AC27 AD28 AD29 AE27 AE30 AE29 AC28 AC29

PIDE_D0

AF29

PIDE_D1

AF27

PIDE_D2

AG29

PIDE_D3

AH30

PIDE_D4

AH28

PIDE_D5

AK29

PIDE_D6

AK28

PIDE_D7

AH27

PIDE_D8

AG27

PIDE_D9

AJ28

PIDE_D10

AJ29

PIDE_D11

AH29

PIDE_D12

AG28

PIDE_D13

AG30

PIDE_D14

AF30

PIDE_D15

AF28 V29

T27 T28 U29 T29 V30 U28 W29 W30 R27 R28

SIDE_D0

V28

SIDE_D1

W28

SIDE_D2

Y30

SIDE_D3

AA30

SIDE_D4

Y28

SIDE_D5

AA28

SIDE_D6

AB28

SIDE_D7

AB27

SIDE_D8

AB29

SIDE_D9

AA27

SIDE_D10

Y27

SIDE_D11

AA29

SIDE_D12

W27

SIDE_D13

Y29

SIDE_D14

V27

SIDE_D15

U27

AG13 AH22 AK12 AH11 AJ17 AH14 AH19 AJ20 AH21 AJ9 AG16 AK15 AK20

L20

1 2

0R3-U

12

C547

C547 SC2D2U16V5ZY

SC2D2U16V5ZY

Capacitor PLACE NEAR THE ACCORDED BALLS

PIDE_IORDY 25 PIDE_IRQ14 25 PIDE_A0 25 PIDE_A1 25 PIDE_A2 25

PIDE_DREQ 25 PIDE_IOR# 25 PIDE_IOW# 25 PIDE_CS#0 25 PIDE_CS#1 25

PIDE_D[15..0] 25

SIDE_IORDY 25 SIDE_IRQ15 25 SIDE_A0 25 SIDE_A1 25 SIDE_A2 25 SIDE_DACK# 25 SIDE_DREQ 25 SIDE_IOR# 25 SIDE_IOW# 25 SIDE_CS#0 25 SIDE_CS#1 25

SIDE_D[15..0] 25

Dummy when use IDE

A

B

C

SC 0308

R463

12

also strap function

0R0402-PAD

PIDE_DACK# 25

PDACK# 22

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ATI-SB400 (2 of 5) IDE

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

D

Date: Sheet

Bolsena

19 58Thursday, March 31, 2005

E

of

-1

A

B

C

D

E

1D8V_S0

12

C507

4 4

DY

SC10U10V5ZY

12

C451

SCD1U16V

DY

3D3V_SB_S0

12

C595

3 3

2 2

1 1

SC10U10V5ZY

12

C568

SCD1U16V

DY

3D3V_SB_S5

12

C581

DY

SC10U10V5ZY

1D8V_S5 1D8V_S5

12

C559

SC10U10V5ZY

DY

12

C505

C529

SCD1U16V

SC10U10V5ZY

DY

12

DY

12

DY

C469

SCD1U16V

C590

C487

C583

C532

C509

SCD1U16V

12

C514

SCD1U16V

12

C490

SCD1U16V

DY

12

C563

SCD1U16V

12

C564

SCD1U16V

A

12

C550

SCD1U16V

DY

12

C519

SCD1U16V

DY

12

C491

SCD1U16V

12

C517

SCD1U16V

12

C582

SCD1U16V

DY

12

C562

SCD1U16V

DY

12

C474

C484

C468

12

C558

C474

C506

SCD1U16V

DY

12

C549

SCD1U16V

12

C586

SCD1U16V

12

C470

SCD1U16V

DY

12

SCD1U16V

12

C539

SCD1U16V

DY

SCD1U16V

DY

12

SCD1U16V

DY

C594

SCD1U16V

DY

C569

SCD1U16V

0R0805-PAD

C578

SCD1U16V

C512

SCD1U16V

C489

SCD1U16V

0R0805-PAD

12

C567

12

C473

R383

SC 0308

12

C537

3D3V_S0

R404

12

SC 0308

SCD1U16V

12

C597

SCD1U16V

3D3V_S5

12

C560

SCD1U16V

Vf = 0.38v (@1mA) 1v (@40mA)

C488

SCD1U16V

1D8V_S5

B

12

C589

DY

D16

1 2

RB751V-40-U

SCD1U16V

3D3V_S0

12

C471

3D3V_S5

5V_S0

SCD1U16V

1D8V_S0

12

D18

RB751V-40-U

D17

1 2

RB751V-40-U

L17

1 2

V5_VREF MIN 4.5 NORMAL 5.0 MAX 5.5

R405

1 2

1KR2

MLB-201209-11

12

C510

C510 SC10U10V5ZY

SC10U10V5ZY

DY

12

C598

1D2V_S0

1D8VAVDDCK_S0

12

C508

C508 SC1U10V3KX

SC1U10V3KX

V5_VREF

12

C596

SC1U10V3KX

1D8V_S0

1 2

0R0402-PAD

12

SCD1U16V

C

3D3V_SB_S0

3D3V_SB_S5

1D8V_S5

SC 0308

R302

C513

C513 SCD1U16V

SCD1U16V

CPU_1D2V

V5_VREF

12

C472

C472 SCD1U16V

SCD1U16V

U43C

A30 D30 E24 E25

J5 K1 K5 N5 P5 R1 U5

U26 U30

V5

V26

Y1

Y26

AA5

AA26

AB5

AC30

AD5

AD26

AE1 AE5

AE26

AF6

AF7 AF24 AF25

AK1

AK4 AK26 AK30

M12

M13

M18

M19

N12 N13 N18 N19 V12 V13 V18

V19 W12 W13 W18 W19

A3 A7 E6 E7 E1 F5

E9 E10 E20 E21

E13 E14 E16 E17

C30

AG6

A24 B24

A4

A8 A29 B28

C1

E5

E8 E11 E12 E15 E18

SB400-1

CHANGE TO 71.SB400.D0U(VER A32)

SB400 SB

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23 VDDQ_24 VDDQ_25 VDDQ_26 VDDQ_27 VDDQ_28 VDDQ_29 VDDQ_30 VDDQ_31 VDDQ_32 VDDQ_33 VDDQ_34

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6

S5_1.8V_1 S5_1.8V_2 S5_1.8V_3 S5_1.8V_4

USB_PHY_1.8V_1 USB_PHY_1.8V_2 USB_PHY_1.8V_3 USB_PHY_1.8V_4

CPU_PWR V5_VREF AVDDCK

AVSSCK VSS_1

VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11

Part 3 of 4

VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51

POWER

VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

E19 E22 E23 E26 E30 F1 F4 G5 H5 J1 J4 K4 L5 M5 P1 R5 R26 T5 T26 T30 W1 W5 W26 Y5 AB26 AB30 AC5 AC26 AD1 AF5 AF8 AF23 AF26 AG8 AJ1 AJ24 AJ30 AK5 AK25 M14 M15 M16 M17 N14 N15 N16 N17 P12 P13 P14 P15 P16 P17 P18 P19 R12 R13 R14 R15 R16 R17 R18 R19 T12 T13 T14 T15 T16 T17 T18 T19 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 W14 W15 W16 W17

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

D

Date: Sheet of

ATI-SB400 (3 of 5) POWER

Bolsena

20 58Thursday, March 31, 2005

E

-1

A

3D3V_S5

678

4 5

123

1 2

DY

678

RN76

4 5

SRN4K7

PM_SLP_S5# PME#_SB

PM_SLP_S3#_SB GPM6# SYS_REST PM_PWRBTN# PM_THRM#

C511

C511 SC33P50V2JN

SC33P50V2JN

X3

DY

X-14D318MHZ-1-U1

1 2

C534

C534 SC33P50V2JN

SC33P50V2JN

DY

3D3V_S0

RN73

SRN10K-2

A

LUSB2#57

SB 0202

R323

1 2

0R0402-PAD

SC 0308

XI_CLK_SB14

XO_CLK_SB14

678

123

4 5

12

DDC1_SCL DDC1_SDA

DDC2_SCL DDC2_SDA

RN75

4 4

3 3

2 2

1 1

123

SRN4K7

SB_OSC_CLK3 SB_OSC_INT13

Use CLK GEN REF

14.318M CLK to SB OSCIN DUMMY IT

SC 0303

DY

R32510KR2DYR32510KR2

R32410KR2DYR32410KR2

R38410KR2 R38410KR2

R37910KR2 R37910KR2

R38610KR2 R38610KR2

R37810KR2 R37810KR2

12

R31710KR2 R31710KR2

R36310KR2 R36310KR2

12

S3_STATE

LUSB2# PM_SUS_STAT#PCIE_WAKE# KA20GATE KBRCIN# ECSCI#_KBC ECSMI#_KBC USB_OC#5

R743 1KR2R743 1KR2

R319

1 2

R318

DY

R338

R338 1MR2

1MR2

R339

DY

KBC_SLP_WAKE34

R393

R393 680R2

680R2

AC97_RST#

SMBC_SB3,8 SMBD_SB3,8

0R2-0

SPKR_SB32

0R2-0

12

1 2

DY

3D3V_S5

AC97_BITCLK_SB32 AC97_DOUT22,24,32 AC97_DIN032 AC97_DIN124

AC97_SYNC24,32 AC97_RST#24,32 SPDIF_OUT_STRAP22

ECSCI#_KBC34 ECSMI#_KBC34 ECSWI#34

12

DY

3D3V_S5

12

RI#

SB 0202

ECSWI#

R301 10KR2R301 10KR2

1 2

R300 10KR2R300 10KR2

1 2

SMBC_SB SMBD_SB

TP103TP103

3D3V_S0

R262

2K2R2

RN72

SRN10K-2

SC 0308

X1_CLK_SB14_1 XO_CLK_SB14_1

12

123

KA20GATE34 KBRCIN#34

1 2 1 2

R380 0R2-0

1 2

DY

RSMRST#_KBC34,46

VRM_PWRGD39,41

R321 33R2R321 33R2

1 2

R322 33R2R322 33R2

1 2

R259

2K2R2

SMBC_SB SMBD_SB

B

678

4 5

KBC_SLP_WAKE GPIO1 GPIO6

PM_THRM#23

PME#_SB29,34

PM_SLP_S3#_SB

PM_SLP_S5#34,44,57 PM_PWRBTN#34 SB_PWRGD39 PM_SUS_STAT#34,37

R364 0R0402-PADR364 0R0402-PAD R320 0R0402-PADR320 0R0402-PAD

SB_LUSB2#

TP95TP95

SMBC_SB_1 SMBD_SB_1 DDC1_SCL DDC1_SDA DDC2_SCL DDC2_SDA

R394 0R0402-PADR394 0R0402-PAD

R392 33R2R392 33R2

1 2

R395

1 2

33R2

B

GPM6# RI#

R390 10KR2R390 10KR2

1 2

R388 10KR2R388 10KR2

1 2

S3_STATE

SYS_REST

PCIE_WAKE#

SIO_CLK_SB

AGP_STP# AGP_BUSY#

SC 0308

AC97_DIN2 AC_SYNC

ECSCI# ECSMI#

GPIO1 GPIO6

AC_BITCLK AC_SDOUT

PM_SLP_S3#_SB

U43D

SB400 SB

C6

TALERT#/TEMP_ALERT#/GPIO10

D5

BLINK/GPM6#

C4

PCI_PME#/GEVENT4#

D3

RI#/EXTEVNT0#

B4

SLP_S3#

E3

SLP_S5#

B3

PWR_BTN#

C3

PWR_GOOD

D4

SUS_STAT#

F2

TEST1

E2

TEST0

AJ26

GA20IN

AJ27

KBRST#

D6

SMBALERT#/THRMTRIP#/GEVENT2#

C5

LPC_PME#/GEVENT3#

A25

LPC_SMI#/EXTEVNT1#

D8

VOLT_ALERT#/S3_STATE/GEVENT5#

D7

SYS_RESET#/GPM7#

D2

WAKE#/GEVENT8#

D1

RSMRST#

A23

14M_X1/OSC

B23

14M_X2

AK24

SIO_CLK

B25

ROM_CS#/GPIO1

C25

GHI#/GPIO6

C23

VGATE/GPIO7

D24

AGP_STP#/GPIO4

D23

AGP_BUSY#/GPIO5

A27

FANOUT0/GPIO3

C24

SPKR/GPIO2

A26

SCL0/GPOC0#

B26

SDA0/GPOC1#

B27

DDC1_SCL/GPIO9

C26

DDC1_SDA/GPIO8

C27

DDC2_SCL/GPIO11

D26

DDC2_SDA/GPIO12

J2

NC1

K3

NC4

J3

NC3

K2

NC2

G1

AC_BITCLK

G2

AC_SDOUT

H4

AC_SDIN0

G3

AC_SDIN1

G4

AC_SDIN2

H1

AC_SYNC

H3

AC_RST#

H2

SPDIF_OUT

SB400-1

CHANGE TO 71.SB400.D0U(VER A32)

SB400 SB

C

Part 4 of 4

USB_OC6#/FAN_ALERT#/GEVENT6#

USB_OC7#/CASE_ALERT#/GEVENT7#

ACPI / WAKE UP EVENTS

CLK / RST

GPIOAC97 (NOT USED)

3D3V_S5

U22C

147

9

10

C

8

TSLCX08MTC-U

48M_X1/USBCLK

48M_X2

USB_RCOMP

USB_VREFOUT

USB_ATEST1

USB_ATEST0 USB_OC0#/GPM0# USB_OC1#/GPM1#

USB_OC2#/FANOUT1/GPM2#

USB_OC3#/GPM3# USB_OC4#/GPM4# USB_OC5#/GPM5#

USB_HSDP7+

USB_HSDM7-

USB_HSDP6+

USB_HSDM6-

USB_HSDP5+

USB_HSDM5-

USB_HSDP4+

USB_HSDM4-

USB_HSDP3+

USB INTERFACE

USB_HSDM3-

USB_HSDP2+

USB_HSDM2-

USB_HSDP1+

USB_HSDM1-

USB_HSDP0+

USB_HSDM0-

AVDDTX_0 AVDDTX_1 AVDDTX_2

AVDDTX_3 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3

AVDDC

AVSSC

AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8

AVSS_USB_9 AVSS_USB_10 AVSS_USB_11

USB PWR

AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24

PM_SLP_S3# 18,34,38,39,43,44,55,57

A15 B15 C15 D16 C16 D15 B8 C8 C7 B7 B6 A6 B5 A5

A11 B11

A10 B10

A14 B14

A13 B13

A18 B18

A17 B17

A21 B21

A20 B20

C21 C18 D13 D10 D20 D17 C14 C11

A16 B16 A9

A12 A19 A22 B9 B12 B19 B22 C9 C10 C12 C13 C17 C19 C20 C22 D9 D11 D12 D14 D18 D19 D21 D22

USB_PCOMP USB_VREFOUT USB_TE1 USB_TE0

USB_OC#2

USB_OC#3

USB_OC#4 USB_OC#6

SB_LUSB1# USB_PP7

USB_PN7 USB_PP6

USB_PN6 USB_PP5

USB_PN5 USB_PP4

USB_PN4 USB_PP3

USB_PN3

R341

1 2

DY

R361

1 2

0R0402-PAD

USB_PP4 24 USB_PN4 24

USB_PP3 24 USB_PN3 24

USB_PP2 24 USB_PN2 24

USB_PP1 24 USB_PN1 24

USB_PP0 24 USB_PN0 24

AVDD_USB

3D3V_AVDDC

D

0R2-0

R337

1 2

TP102TP102 TP101TP101 TP100TP100

USB_OC#2 24 USB_OC#3 24

SC 0308

D

11K8R3F

USB_OC#01 24

ECSWI#

1 2

TP70TP70 TP69TP69

TP114TP114 TP115TP115

TP96TP96 TP97TP97

BlueTooth

SB 0201

E

CLK48_USB 3

SB 0211

RP3

USB_OC#01 USB_OC#2 USB_OC#4 USB_OC#3

3D3V_S5

LUSB1# 57

SB 0202

L21

1 2

0R0603-PAD

SC 0308

DY

L18

1 2

MLB-201209-11

ATI-SB400 (4 of 5) USB GPIO

R744

R744 1KR2

1KR2

SB 0201

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

RP3

1 2 3 4 5 6

SRP10K

12

C580

SC10U10V5ZY

DY

12

C533

C533 SC10U10V5ZY

SC10U10V5ZY

12

C527

C527 SC10U10V5ZY

SC10U10V5ZY

DY

Bolsena

3D3V_AVDDC

12

C528

C528 SC1U10V3KX

SC1U10V3KX

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

10 9 8 7

C536

SCD1U16V

C538

SCD1U16V

C535

C535 SCD1U16V

SCD1U16V

21 58Thursday, March 31, 2005

3D3V_S5

USB_OC#5 LUSB1#

USB_OC#6

12

C531

of

AVDD_USB

12

C530

SCD1U16V

-1

A

3D3V_S5 3D3V_S0 3D3V_S5 3D3V_S03D3V_S03D3V_S03D3V_S03D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0

B

12

R391

R391 10KR2

10KR2

12

R424

R424 10KR2

10KR2

12

R385

R385 10KR2

10KR2

12

R426

R426 10KR2

10KR2

C

12

R429

R429 10KR2

10KR2

12

R428

R428 10KR2

10KR2

12

R439

R439 10KR2

10KR2

12

R438

R438 10KR2

10KR2

D

12

R433

R433 10KR2

10KR2

12

R432

R432 10KR2

10KR2

12

R436

R436 10KR2

10KR2

E

AUTO_ON#18 AC97_DOUT21,24,32 RTC_CLK18

4 4

REQUIRED SYSTEM STRAPS

3 3

2 2

SPDIF_OUT_STRAP21 CLK33_LAN18,29 CLK33_MINI18,31 CLK33_KBC18,34 CLK33_SIO18,37 CLK33_LPCROM18 PCI_CLK718 PCI_CLK818

12

DY

ACPWRON PCI_CLK5SPDIF_OUT

STRAP HIGH

STRAP LOW

PDACK#19 PCI_AD3118,26,29,31 PCI_AD3018,26,29,31 PCI_AD2918,26,29,31 PCI_AD2818,26,29,31 PCI_AD2718,26,29,31 PCI_AD2618,26,29,31 PCI_AD2518,26,29,31 PCI_AD2418,26,29,31 PCI_AD2318,26,29,31

MANUAL PWR ON

DEFAULT

AUTO PWR ON

3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S03D3V_S03D3V_S03D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0

12

R462

R462 10KR2

10KR2

DY

R389

R389 10KR2

10KR2

12

R423

R423 10KR2

10KR2

AC_SDOUT RTC_CLK

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

12

R647

R647 10KR2

10KR2

12

DY

INTERNAL RTC

DEFAULT

EXTENNAL RTC (NOT SUPPORTED W/IT8712)

12

R628

R628 10KR2

10KR2

R387

R387 10KR2

10KR2

DY

SIO 24MHz

SIO 48MHz

DEFAULT

12

R646

R646 10KR2

10KR2

DY

12

R425

R425 10KR2

10KR2

12

R430

R430 10KR2

10KR2

SB400 version A31/A32 not the same!

PCI_CLK2

48MHZClock Input Buffer

DEFAULT

48MHZ

-Crytsal Pad

12

R625

R625 10KR2

10KR2

12

DY

12

DY

PCI_CLK3

USB PHY PWRDOWN DISABLE

DEFAULT

USB PHY PWRDOWN ENABLE

R644

R644 10KR2

10KR2

R427

R427 10KR2

10KR2

DY

12

DY

PCI_CLK7

12

R640

R640 10KR2

10KR2

DY

12

DY

PCI_CLK6

CPU I/F=K8

DEFAULT

CPU I/F=P4

R622

R622 10KR2

10KR2

R434

R434 10KR2

10KR2

12

R440

R440 10KR2

10KR2

12

R437

R437 10KR2

10KR2

DY

PCI_CLK4

USB INT PLL48

DEFAULT

USB EXT. 48MHZ

12

R621

R621 10KR2

10KR2

DY

14MHZ OSC MODE

DEFAULT

14MHZ XTAL MODE

12

R642

R642 10KR2

10KR2

DY

R431

R431 10KR2

10KR2

12

PCI_CLK8

ROM TYPE H,H=PCI (X Bus) ROM

H,L=LPC ROM I

L,H=LPC ROM II

L,L=Firmware Hub ROM

Place these R close to SouthBridge if possible

R435

R435 10KR2

10KR2

12

R464

R464 1KR2

1KR2

DEBUG STRAPS

STRAP

1 1

HIGH

STRAP LOW

DY

USE LONG RESET

DEFAULT

USE SHORT RESET

12

R648

R648 10KR2

10KR2

DY

12

R627

R627 10KR2

10KR2

DY

PCI_AD31 PCI_AD30

RESERVED

RESERVED RESERVED RESERVED

12

DY

PCI_AD29

R645

R645 10KR2

10KR2

12

DY

PCI_AD28

R626

R626 10KR2

10KR2

12

PCI_AD27

BYPASS PCI PLL

USE PCI PLL

DEFAULT DEFAULT

R643

R643 10KR2

10KR2

12

R624

R624 10KR2

10KR2

PCI_AD26

PCI_AD25 PCI_AD24PDACK#

BYPASS ACPI BCLK

USE ACPI BCLK

DEFAULT

12

R641

R641 10KR2

10KR2

BYPASS IDE PLL

USE IDE PLL

12

R623

R623 10KR2

10KR2

EEPROM PCIE STRAPS

USE DEFAULT PCIE STRAPS

DEFAULT

12

R639

R639 10KR2

10KR2

PCI_AD23

RESERVEDUSE

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ATI-SB400 STRAPPING(5 of 5)

Size Document Number Rev

A3

Date: Sheet

Bolsena

22 58Thursday, March 31, 2005

of

-1

*Layout* 15 mil

12

C214

C214 SCD1U

SCD1U

5V_S0

R181

1 2

200R3

12

C248

C248 SCD1U

SCD1U

Setting T8 as 100 Degree

V_DEGREE =(((Degree-72)*0.02)+0.34)*VCC

HW thermal shut down tempature setting 95 degree . Put Near CPU .

12

C213

C213 SC10U10V5ZY

SC10U10V5ZY

12

R182

R182 10KR2

10KR2

12

R180

R180 49K9R2F

49K9R2F

5V_G792_S0

SB 0307

V_DEGREE

DY

SB

FAN1_VCC

D10

S1N4148-U

1 2

*Layout* 30 mil

5V_S0

12

C216

SC4D7U10V5ZY

RUNPWROK39

ALERT#

12

C217

SCD1U

1 2

DY

12

C215

C215 SC2200P50V2KX

SC2200P50V2KX

C218

SCD1U

12

R157

0R2-0

DY

1 2

R178 0R2-0R178 0R2-0

R179

R179 10KR2

10KR2

5V_S0

12

R158

R158 10KR2

10KR2

PR_HW_SDN#

G792_RST#

SD 0325

PM_THRM# 21

6

20

7 9

11

ALERT#

15 13

3 2

DXP1:108 Degree DXP2:H/W Setting DXP3:88 Degree

U21

VCC DVCC

DXP1 DXP2 DXP3

ALERT# THERM# THERM_SET RESET#

G792SFX

FAN1

FG1 CLK

SDA

SCL

DGND DGND

SGND1 SGND2 SGND3

5V_S0

12

R137

R137 10KR2

1 2

GAP-CLOSE

10KR2

FAN1

1 2

12

U23

1

SET

2

GND OUT#3HYST

G709T1U

3

CON3-4

20.D0012.103

C161

C161 SC1000P50V2KX

SC1000P50V2KX

12

C250

C250 SC2200P50V2KX

SC2200P50V2KX

C219

C219 SC2200P50V2KX

SC2200P50V2KX

USE 0R2 63.R0034.1D1 WHEN UMA

VCC

ME : 20.D0012.103

C249

C249 SC2200P50V2KX

SC2200P50V2KX

5V_AUX_S5

12

R202

R202 150R2F

150R2F

5 4

THERMDP 6

To CPU

THERMDN 6

VGA_THERM_DP

VGA_THERM_DN

DY

3 4

12

RN119

SRN0-2-U

C716

C716 SC470P50V2KX

SC470P50V2KX

By Sourcer requset: Main souce 74.00709.07F Second souce

74.00710.03P

74.06509.07F

74.06510.A7P

12

C270

C270 SC4D7U10V5ZY

SC4D7U10V5ZY

1

DY

THERM_SYS_DP

THERM_SYS_DN

3

Q27

Q27 MMBT3904-U1

MMBT3904-U1

2

SC 0311

To VGA

place back side of GPU

12

C306

SC470P50V2KX

3904 on system (Thermal Sensor)

Put RN near thermal diode

2 1

VGA_LOCAL_DP 49,54

VGA_LOCAL_DN 49,54

Dummy when use UMA

1

3

Q31

Q31 MMBT3904-U1

MMBT3904-U1

2

*Layout* 15 mil

FAN1_VCC

FAN1_FB

1 4 14 16 18 19

NC

5 17

8 10 12

CLK32_G791 18

SMBD_G792 34

SMBC_G792 34

G12

1 2

GAP-CLOSE

G13

Dummy when G792 enhanced T8 function

T8_RSET:27K SET TO 80°C T8_RSET:20K SET TO 90°C T8_RSET:15K SET TO 100°C

T8_SET 5V_G709_AUX_S5

12

R201

R201 20KR2F

20KR2F

3D3V_AUX_S5

3

D38

R611

R611 10KR2

10KR2

DY

D38

1

BAT54-1

12

(dummy, KBC already delay)

2

C782

C782 SCD1U16V

SCD1U16V

Put under CPU Socket

S5_ENABLE34

SD 0324

PURE_THRM_SDN#

RSMRST# 34

U77

1

A

2

B GND3Y

NC7S08-U

VCC

5

4

3D3V_AUX_S5

S5PWR_ENABLE 43,44

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

THERMAL G792

Bolsena

23 58Thursday, March 31, 2005

-1

CPU_THERMTRIP#6

2

1

D43

3

BAW56

3

DY

D39

2

LOW3_OFF48

1

100 mil

5V_USB0_S0

TC24

TC15

SE100U10VM

SE150U10VM

12

C836

100 mil

5V_USB1_S0

12

C435

12

C812

SCD1U

SC1000P50V2KX

12

C846

SCD1U

SC1000P50V2KX

12

100 mil

5V_USB2_S0

12

TC1

SE100U10VM

12

C5

C6

SCD1UC6SCD1U

SC1000P50V2KX

BLUETOOTH MODULE

U9

2

BLUETOOTH_EN34

ME : 20.D0012.108 2ND : 20.D0122.108

20.D0012.108

GND

3

NC

4

ON/OFF#

AAT4250-U

BLUE1

10 8

7 6 5 4 3 2 1

9

MOLEX-CON8-2

20.D0122.108 - 2ND

IN

OUT

BT_AUX BT_GPIO2 BT_GPIO1 BT_LINK_LED

3D3V_BT_S0

MDC 1.5 CONNECTOR

AC97_DOUT21,22,32

AC97_SYNC21,32

AC97_DIN121 AC97_RST#21,32

12

C128

C128 SC22P50V2JN-1

SC22P50V2JN-1

R105

AC97_DIN1_MDC

12

33R2

5V_USB0_S0

5V_S5

USB_PWR_EN#34

U90

1

GND

2

VCC

3

EN1#/EN1 EN2#/EN24OC2#

G5258B2

OC1# OUT1 OUT2

8 7 6 5

G5258B2 Active Low 1.5A

SB 0127

5V_S5 5V_USB2_S0

USB_PWR_EN#

SB 0127

5V_S0

D52

D52 SSM5817-U

SSM5817-U

2 1

U59

1

GND

2

IN

3

IN EN#/EN4FLG

G528P1U

OUT OUT OUT

8 7 6 5

G528P1U Active Low

3D3V_S0

5

3D3V_BT_S0

1

TP2 TPAD30TP2 TPAD30

ME : 20.F0582.012 2ND : 20.F0604.012

3D3V_BT_S0

TP1

12

TPAD30

DY

EC3

SC1000P50V2KX

MDC1

13

MH1

1 3

5 7 9

11

MH2 17

16

AMP-CONN12A

2ND : 20.F0604.012

20.F0582.012

1 2 1 2

12

DY

EC4

15 14 2

4 6 8 10 12

18

R48 0R2-0

R48 0R2-0 R25 0R2-0

R25 0R2-0

SC1000P50V2KX

R556

100KR2

12

DY

DY DY

DY

TP76 TPAD30TP76 TPAD30 TP77 TPAD30TP77 TPAD30

12

C710

C710 SC4D7U10V5ZY

SC4D7U10V5ZY

DY

BT_COEX2 31 BT_COEX1 31

USB_PN4 21 USB_PP4 21

SB 0131

3D3V_LAN_S5

AC97_BITCLK 32

5V_USB1_S0

R734

1KR2

1 2

R735

1KR2

1 2

R736 1KR2R736 1KR2

1 2

USB PORT

USB_PN021

USB_OC#01 21

USB_OC#2 21

12

SB 0127

12

SB 0127

C957

SCD1U

C958

SCD1U

C956

SCD1U

USB_PP021

USB_PN121

USB_OC#3 21

USB_PP121

USB_PN221

USB_PP221

USB_PN321

USB_PP321

3 4

1

TR4

L-63UH

4

RN34

SRN0-2-U

1

TR5

L-63UH

4

RN37

SRN0-2-U

1

TR6

L-63UH

4

RN48

SRN0-2-U

1

TR1

L-63UH

4

RN88

SRN0-2-U

2

68.03216.20B

3

2 1

2

68.03216.20B

3

2 1

2

68.03216.20B

3

2 1

2

68.03216.20B

3

2 1

5V_USB0_S0

USB_0-

DY

USB_0+

USB_1-

DY

USB_1+

USB_2-

DY

USB_2+

USB_3-

DY

USB_3+

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

USB_0+

5V_USB0_S0

USB_1USB_1+

5V_USB1_S0

USB_2USB_2+

5V_USB2_S0

USB_3USB_3+

ME : 22.10218.H01 2ND : 22.10218.C91

USB / MDC / BLUETOOTH

Bolsena

USB2

6 1

2 3 4 5

SKT-USB-97-U

22.10218.H01

USB3

6 1

2 3 4 5

SKT-USB-97-U

22.10218.H01

USB4

6 1

2 3 4 5

SKT-USB-97-U

22.10218.H01

USB1

6 1

2 3 4 5

SKT-USB-97-U

22.10218.H01

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

24 58Thursday, March 31, 2005

-1

A

B

C

D

E

HDD

PIDE_D[15..0]19

RSTDRV#_518

4 4

PIDE_DREQ19 PIDE_IOW#19 PIDE_IOR#19 PIDE_IORDY19 PIDE_DACK#19 PIDE_IRQ1419 PIDE_A119 PIDE_A019 PIDE_CS#019

HDD_LED#_517

5V_S0

3 3

5V_S0

R461

R461 4K7R2

4K7R2

1 2

12

C641

PIDE_D6 PIDE_D5 PIDE_D4 PIDE_D3 PIDE_D2 PIDE_D1 PIDE_D0

12

SC10U10V5ZY

C624

SCD1U

SATA Connector

2 2

12

SATA_TXP019 SATA_TXN019

SATA_RXN019 SATA_RXP019

TC18

TC18 ST22U6D3VBM

ST22U6D3VBM

PWR TRACE 100mil

1 1

A

5V_S0

12

C620

C620 SCD1U16V

SCD1U16V

HDD1

46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10

8 6 4

2

20.80175.044

CHANGE TO 20.80592.044

3D3V_S0

43

41

39

37

35

33

31

29

27

25

23

21

19

17

15

13

11

9

7

5

3

1

45

SPD-CONN44D-7-U1

ME : 20.80592.044 (DIFFERENT FROM ORCAD P/N)

SATA1

23

MH1

1 2

3 4 5 6 7

8

9 10 11 12 13 14 15 16 17 18 19 20 21

CHANGE TO 20.F0665.022

22

MH2

24

20.F0614.022

Dummy when use IDE

PIDE_D8PIDE_D7 PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15

PIDE_A2 19 PIDE_CS#1 19

PWR TRACE 100mil

Dummy when use SATA

For HDD & SATA both

21

D20

B240LA

SC 0308

ME : 20.F0665.022 (DIFFERENT FROM ORCAD P/N)

B

PIDE_IORDY

12

TC19

5V_S0

12

R465

R465 4K7R2

4K7R2

SIDE_D[15..0]19

5V_S0

12

C623

C623 SCD1U

SCD1U

ST100U6D3VDM-5

C

CD_AUDR32

SIDE_D8 SIDE_D9

SIDE_D11 SIDE_D12 SIDE_D13 SIDE_D14

C307

TP57TPAD30 TP57TPAD30 TP58TPAD30 TP58TPAD30

SC10U10V5ZY

SIDE_D15

12

C336

SCD1U

SIDE_DREQ19 SIDE_IOR#19

SIDE_DACK#19

SIDE_A219 SIDE_CS#119

5V_S0

12

CDROM

ODD1

2 4

6

8 10 12 14 16 18 20 22 24 26 28

BAY_ID0

30

BAY_ID1

32 34 36 38 40 42 44 46 48

12

50

C335

STC-CONN50-4R

SCD1U

20.80251.050

PIN 49,50 DON'T USE

ME : 20.80251.050

D

51 1

3

RSTDRV#_5

5

SIDE_D7

7

SIDE_D6SIDE_D10

9

SIDE_D5

11

SIDE_D4

13

SIDE_D3

15

SIDE_D2

17

SIDE_D1

19

SIDE_D0

21 23 25 27 29 31 33 35 37 39 41 43 45

CSEL

47 49 52

Title

Size Document Number Rev

Date: Sheet

HDD / CDROM / SATA

A3

R213

1 2

Bolsena

CD_AUDL 32 CD_AGND 32

SIDE_IORDY

SIDE_IOW# 19 SIDE_IORDY 19 SIDE_IRQ15 19 SIDE_A1 19 SIDE_A0 19 SIDE_CS#0 19

4K7R2

CDROM_LED#_5 17

5V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

25 58Thursday, March 31, 2005

E

5V_S0

12

R212

R212 4K7R2

4K7R2

-1

of

-1

A

B

C

D

E

R716

1 2

R717

1 2

R697

3

SRN10KJ

3D3V_S0

100R2F

10KR2

12

47KR2

CBUS_TP1 CBUS_TP2

CBUS_TP3 CBUS_TP4

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3

7411_IDSELPCI_AD22

4 4

PCI_AD[31..0]18,22,29,31

3 3

PCI_CBE#[3..0]18,29,31

PCI_PAR18,29,31

PCI_FRAME#18,29,31

PCI_TRDY#18,29,31

PCI_IRDY#18,29,31

PCI_STOP#18,29,31

PCI_DEVSEL#18,29,31

PCI_PERR#18,29,31 PCI_SERR#18,29,31

PCI_REQ#118 PCI_GNT#118

12

A

3D3V_S0

CLK33_CBUS18

TP110TP110

CB_DATA28

CB_CLOCK28

CB_LATCH28

CB_SPKR32

1 4 2

TP112TP112 TP111TP111

TP113TP113 TP109TP109

RN117

2 2

1 1

PCIRST_BUF#15,18,28,29,31,57

SC 0228

C964

SC22P50V2JN-1

W10

U10 R10 N10 V11 U11 R11

W12

V12 U12 N11

W13 W11

W17

T19 P12

W3

W2

W6

V10

W9 W7 W4

W8 W5

U2 V1 V2 U3

V3 U4 V4 V5 U5 R6 P6

V6 U6 R7 V9 U9 R9 N9

P9 V7 R8 U7

N8 V8

U8 U1 T2 P5 R3 T1 T3

R2 N1

L6 N2 L7

E1 E2

M2 M3

L5 L2 K5 K3 K7 L1 L3

U97A

VCCP VCCP

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

C/BE0# C/BE1# C/BE2# C/BE3#

PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT# PCLK PRST# GRST# RI_OUT#/PME#

SUSPEND# DATA

CLOCK LATCH SPKROUT

B_USB_EN# A_USB_EN#

SDA SCL

NC#W17 RSVD TEST0

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

PCI7411

B

U1-1

U1-7

CARD BUS

1394

U1-8

MS_CLK/SD_CLK/SM_EL_WP#

U1-10

U1-5

U1-6

U1-9

UNUSED TERMINALS

MS_BS/SD_CMD/SM_WE#

SD/SDIO

MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1

MS_SDIO(DATA0)/SD_DAT0/SM_D0

1 of 4

PHY_TEST_MA

PC0(TEST1) PC1(TEST2) PC2(TEST3)

MC_PWR_CTRL_0 MC_PWR_CTRL_1

SD_CLK/SM_RE#

SD_CMD/SM_ALE

SD_DAT0/SM_D4 SD_DAT1/SM_D5 SD_DAT2/SM_D6 SD_DAT3/SM_D7

SD_WP/SM_CE

SM_PHYS_WP#

MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6

CLK_48

AVDD AVDD AVDD

VDPLL_33

VSSPLL

VDPLL_15

VSSPLL

TPBIAS0

TPA0P TPA0N

TPB0P TPB0N

CPS

CNA

AGND AGND AGND

TPBIAS1

TPA1P TPA1N

TPB1P TPB1N

SD_CD# MS_CD# SM_CD#

SM_CLE SM_R/B#

N3

INTA#

M5

INTB#

P1

INTC#

P2 P3

INTD#

CB_MFUNC5

N5 R1

M1

R13 R14 V17

VDPLL

V19 P14

7420_FILTER0

T18 T17

1394_R0

U18

R0

1394_R1

U19

R1

U15 V15

W15 V14

W14

1394_PHYTEST

R17 M11 P15

R19

XO

R18

XI

R12 U13 V13

N12 U14 U16

U17 V18

W18 V16

W16

F1 F2

E3 F5 F6 G5 F3

H5 G3 G2

G1 J5 J3

H3 J6 J1 J2

H7 J7 K1 K2

1394_CNA 1394_XO

1394_XI

1394_AGND

1394_TPBIAS1

MC_PWR_CTRL-0 MC_PWR_CTRL-1

R698

1 2

CLK48_CARDBUS 3

R709 0R0402-PADR709 0R0402-PAD

1 2

R708

1 2

6K34R2F

1394_TPBIAS0 28 1394_TPA0P 28

1394_TPA0N 28 1394_TPB0P 28

1394_TPB0N 28

1 2

12

1394_AGND

SD_CD# 28

MS_CD# 28 SM_CD# 28 MS_CLK 28 MSCBS 28

MSCSDIO 28 SDCCLK 28 SDCCMD 28

SD_WP 28 SM_CLE 28 SM_R# 28 SM_PHYS_WP# 28

C

4K7R2

SC 0308

C928

C928 SCD1U

SCD1U

R707

4K7R2

R706

1 2

X8

82.30023.181

1 2

X-24D576M-2

C930

C930 SCD1U

SCD1U

TP108 TPAD30TP108 TPAD30

MS_D3 28 MS_D2 28 MS_D1 28

SM_D4 28 SM_D5 28 SM_D6 28 SM_D7 28

3D3V_PLL_S0

1394_AGND

4K7R2

1 2

INT_PIRQE# 18 INT_PIRQF# 18,31 INT_PIRQG# 18 P_SERIRQ 18,34,37

PM_CLKRUN# 18,29,31,34,37

C917

SC22P50V2JN-1

C929

C929 SC22P50V2JN-1

SC22P50V2JN-1

MS/MS_pro

3D3V_S0

14

1

INTA# CARBUS 1 (INT_PIRQE#) INTB# (WIFI) (INT_PIRQF#) INTC# 1394 (INT_PIRQG#) INTD# CardReader (INT_PIRQE#) share

2

RN116

SRN10KJ

3

MC_PWR_CTRL 28

3

Q32

PDTC144EU

2

MS/MS_pro

SM_D[4..7] 28 MS_D[1..3] 28

XD

D

G46

1 2

GAP-CLOSE

1394_AGND

Bypass/Decupoling Capacitors Should be places as close to PCI7411 as possible

3D3V_S0

12

C934

C934 SC1000P50V2KX

SC1000P50V2KX

3D3V_S0

12

C933

C933 SC1000P50V2KX

SC1000P50V2KX

R715

1 2

0R0603-PAD

SC 0308

Title

Size Document Number Rev

Date: Sheet

TI_PCI7411(1 of 2)

A3

12

1394_AGND

Bolsena

12

C901

C901 SCD1U

SCD1U

12

C915

C915 SCD1U

SCD1U

C932

C932 SC10U10V5ZY

SC10U10V5ZY

12

C935

C935 SCD1U

SCD1U

12

C936

C936 SCD1U

SCD1U

3D3V_PLL_S03D3V_S0

12

C947

C947 SC1000P50V2KX

SC1000P50V2KX

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

12

C949

C949 SC1U10V3KX

SC1U10V3KX

26 58Thursday, March 31, 2005

of

-1

A

A5 A11

D1 C1 D3 C2 B1 B4 A4 E6 B5 C6 B6 G9 C7 B7 A7 A10 E11 G11 C11 B11 C12 B12 A12 E12 C13 F12 A13 C14 E13 A14 B14 E14

C5 F9 B10 G12

G10 C8

A8 B8 A9 C9 E10

F10 B3

E7 B9

B2 C3 E9

C4 A6

A2 C15

E5 A3 E8

B13 D2 C10

VCC_ASKT_S0

1 2

R688

1 2

2 of 4

U97B

4 4

U1-2

3 3

2 2

CARDBUS A

A_CSTSCHG/A_BVD1(STSCHG#/RI#)

PCI7411

2 of 4

VCCA VCCA

A_CAD31/A_D10

A_CAD30/A_D9 A_CAD29/A_D1 A_CAD28/A_D8 A_CAD27/A_D0 A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6

A_CAD19/A_A25

A_CAD18/A_A7 A_CAD17/A_A24 A_CAD16/A_A17

A_CAD15/A_IOWR#

A_CAD14/A_A9

A_CAD13/A_IORD#

A_CAD12/A_A11

A_CAD11/A_OE#

A_CAD10/A_CE2#

A_CAD9/A_A10

A_CAD8/A_D15

A_CAD7/A_D7

A_CAD6/A_D13

A_CAD5/A_D6

A_CAD4/A_D12

A_CAD3/A_D5

A_CAD2/A_D11

A_CAD1/A_D4 A_CAD0/A_D3

A_CC/BE3#/A_REG#

A_CC/BE2#/A_A12

A_CC/BE1#/A_A8

A_CC/BE0#/A_CE1#

A_CPAR/A_A13

A_CFRAME#/A_A23

A_CTRDY#/A_A22

A_CIRDY#/A_A15

A_CSTOP#/A_A20

A_CDEVSEL#/A_A21

A_CBLOCK#/A_A19

A_CPERR#/A_A14

A_CSERR#/A_WAIT#

A_CREQ#/A_INPACK#

A_CGNT#/A_WE#

A_CCLKRUN#/A_WP(IOIS16#)

A_CCLK/A_A16

A_CINT#/A_READY(IREQ#)

A_CRST#/A_RESET

A_CAUDIO/A_BVD2(SPKR#)

A_CCD1#/A_CD1# A_CCD2#/A_CD2#

A_CVS1/A_VS1# A_CVS2/A_VS2#

A_RSVD/A_D14

A_RSVD/A_D2

A_RSVD/A_A18

B

C903

C903 SCD01U16V2KX

SCD01U16V2KX

33R2

CBB_D10 28 CBB_D9 28 CBB_D1 28 CBB_D8 28 CBB_D0 28 CBB_A0 28 CBB_A1 28 CBB_A2 28 CBB_A3 28 CBB_A4 28 CBB_A5 28 CBB_A6 28 CBB_A25 28 CBB_A7 28 CBB_A24 28 CBB_A17 28

CBB_IOWR# 28

CBB_A9 28

CBB_IORD# 28

CBB_A11 28

CBB_OE# 28

CBB_CE2# 28 CBB_A10 28 CBB_D15 28 CBB_D7 28 CBB_D13 28 CBB_D6 28 CBB_D12 28 CBB_D5 28 CBB_D11 28 CBB_D4 28 CBB_D3 28

CBB_REG# 28 CBB_A12 28 CBB_A8 28

CBB_CE1# 28 CBB_A13 28 CBB_A23 28

CBB_A22 28 CBB_A15 28 CBB_A20 28 CBB_A21 28 CBB_A19 28

CBB_A14 28

CBB_WAIT# 28 CBB_INPACK# 28

CBB_WE# 28

CBB_BVD1# 28 CBB_WP 28

CBB_RDY 28 CBB_RESET 28

CBB_BVD2# 28 CBB_CD1# 28

CBB_CD2# 28 CBB_VS1# 28 CBB_VS2# 28

CBB_D14 28 CBB_D2 28 CBB_A18 28

CBB_A16 28

CBB_D[0..15] 28 CBB_A[0..25] 28

U97C

U1-3

CARDBUS B

PCI7411

3 of 4

RSVD RSVD

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD RSVD RSVD

RSVD RSVD RSVD RSVD

RSVD RSVD RSVD

D19 K19

B15 A16 B16 A17 C16 D17 C19 D18 E17 E19 G15 F18 H14 H15 G17 K17 L13 K18 L15 L17 L18 L19 M17 M14 M15 N19 N18 N15 M13 P18 P17 P19

F15 G18 K14 M18

K13 G19

H17 J13 J17 H19 J19

J18 B18

E18 J15

F14 A18 H18

B19 F17 C17

N13 B17 C18 F19

N17 A15 K15

C

12

3D3V_S0

C919

C919 SCD1U16V

SCD1U16V

D

4 of 4

U97D

M10 M12

H10 H11 H12

K12

G13 H13

K10 K11

L10 L11 L12

U97D

H8

VCC

H9

VCC VCC VCC VCC

J8

VCC

M7

VCC

J12

VCC

M9

VCC VCC VCC

K8

VCC VCC

N7

VCC

G7

GND

G8

GND GND GND

J9

GND

J10

GND

J11

GND

K9

GND GND GND

L8

GND

L9

GND GND GND GND

M8

GND

M19

VR_PORT

H1

VR_PORT

H2

VR_EN#

12

Place it near to chip

POWER TERMINALS

U1-4

C918

3D3V_S0

12

C916

SCD1U16V

R695

R695 10KR2

10KR2

DY

R696

R696 1KR2

1KR2

SB 0201

E

from spec : this pin is active low

PCI7411

1 1

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

TI_PCI7411(2 of 2)

A3

Bolsena

27 58Thursday, March 31, 2005

of

E

of

-1

A

U

B

C

D

E

PCMCIA Socket

PCH1

1

4 4

VCC_ASKT_S0

C906

C908

12

C904

C904 SC1000P50V2KX

SC1000P50V2KX

SC10U10V5ZY

3 3

2 2

SC10U10V5ZY

CBB_A16

VPP_ASKT_S0

12

C909

C909 SCD1U

SCD1U

Place close to pin 19.

12

C907

C907 DUMMY-C2

DUMMY-C2

CBB_D3 CBB_D4

CBB_D11 CBB_D5 CBB_D12 CBB_D6 CBB_D13 CBB_D7 CBB_D14

CBB_D15

CBB_A10

CBB_A11 CBB_A9

CBB_D0 CBB_D8 CBB_D1 CBB_D9 CBB_D2 CBB_D10

CBB_A8 CBB_A17 CBB_A13 CBB_A18 CBB_A14 CBB_A19

CBB_A20 CBB_A21

CBB_A16 CBB_A22 CBB_A15 CBB_A23 CBB_A12 CBB_A24 CBB_A7 CBB_A25 CBB_A6

CBB_A5 CBB_A4 CBB_A3 CBB_A2 CBB_A1 CBB_A0

12

C905

C905 SCD1U

SCD1U

Clock AC termination

CBB_CD1#

CBB_CE1#

CBB_CE2# CBB_OE# CBB_VS1#

CBB_IORD# CBB_IOWR#

CBB_WE# CBB_RDY

CBB_VS2# CBB_RESET CBB_WAIT# CBB_INPACK# CBB_REG# CBB_BVD2# CBB_BVD1#

CBB_WP CBB_CD2#

33MHz clock for 32-bit Cardbus card I/F

1 1

A

VCC_ASKT_S0

12

47K

12

R420

R420 DUMMY-R2

DUMMY-R2

C603

C603 SCD01U16V2KX

SCD01U16V2KX

35

2

36

3

37

4

38

5

39

6

40

7

41

8

42

9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68

PCMCIA-12-U

62.10024.131

ME : 62.10024.131

B

Cardbus I/F

CBB_D[0..15] 27 CBB_A[0..25] 27

CBB_IORD# 27 CBB_IOWR# 27 CBB_OE# 27 CBB_WE# 27 CBB_REG# 27

CBB_RESET 27

CBB_WAIT# 27

CBB_INPACK# 27

CBB_CE1# 27 CBB_CE2# 27

CBB_BVD1# 27 CBB_BVD2# 27

CBB_CD1# 27

CBB_CD2# 27 CBB_VS1# 27 CBB_VS2# 27

PC1

3 4

CARD-SKT18-U

21.H0056.001

ME : 21.H0056.001

SB 0202

MC_PWR_CTRL26

CBB_RDY 27

CBB_WP 27

21

1394 Connector

1394_TPA0P26

1394_TPA0N26

1394_TPB0P26

1394_TPB0N26

1394_TPBIAS026

Power switch

3D3V_S0

POWER SWITCH

U95

2

GND

3

NC

4

ON/OFF#

AAT4250-U

74.04250.03F

C

5V_S0 VPP_ASKT_S0

12

C608

C608 SCD1U16V

SCD1U16V

12

C900

SC1U10V3ZY

MSCSDIO26

IN

OUT

12

R711

R711 56R2F

56R2F

1394_AGND 1394_AGND

Close to the cardbus Controller.

CB_DATA26 CB_CLOCK26 CB_LATCH26 PCIRST_BUF#15,18,26,29,31,57

5V_S0

12

C619

C619 SC4D7U10V5ZY

SC4D7U10V5ZY

12

DY

3D3V_CR_S0

12

C927

C914

SCD1U16V

MSCSDIO

SCD1U16V

MS_D1 MS_D2 MS_D3

MS_D1 MS_D2 MS_D3 MSCBS

MS_D1 MS_D2 MS_D3 SM_D4 SM_D5 SM_D6 SM_D7

SM_CD# MSCSDIO

3D3V_S0 3D3V_CR_S0

5 1

12

C894

SC1U10V3ZY

12

C606

C606 SCD1U16V

SCD1U16V

12

C893

R710

R710 56R2F

56R2F

C931

C931 SC1U10V3KX

SC1U10V3KX

1 2

SCD1U16V

12

10KR2

R422

12

C607

C607 SC1U10V3ZY

SC1U10V3ZY

CARD1

40

XD-VCC

29

S.M-VCC

20

MS-VCC

9

SD-VCC

7

SD-DAT0

6

SD-DAT1

12

SD-DAT2

11

SD-DAT3

15

MS-DATA0

14

MS-DATA1

16

MS-DATA2

18

MS-DATA3

33

S.M/XD-D1

32

S.M/XD-D2

31

S.M/XD-D3

21

S.M/XD-D4

22

S.M/XD-D5

23

S.M/XD-D6

24

S.M/XD-D7

25

S.M-LVD

30

S.M-CD#

34

S.M-D0

SKT-MEMO-9-U1

62.10051.331

ME : 62.10051.331

R714

R714 56R2F

56R2F

1394_TPBIBS

C948

SC220P50V2KX-U

12 21

13

20

11 25

D

12

R713

R713 56R2F

56R2F

12

R712

R712 4K99R2F

4K99R2F

U53

3

DATA

4

CLOCK

5

LATCH RESET# SHDN#

3.3V

1

5V

2

5V

7

12V 12V

GND GND

TSP2220A

SM-CD-COM

SD-CD-COM

S.M#/XD-CLE S.M#/XD-ALE

S.M#/XD-WE

S.M#/XD-R/B

S.M/XD-WP-IN

TR2

TR2 ACM2012-900-2P-T

1

2 1

2

ACM2012-900-2P-T

AVCC AVCC

AVPP

OC#

NC NC NC NC NC NC NC NC NC

2

SM-CD-SW

SM-WP-SW

SD-CD-SW

SD-WP-SW

S.M#/XD-CE S.M#/XD-RE

3 43

13

MS-BS

17

MS-INS

19

MS-SCLK

4

RSV#4

39

XD-CD

41 42 5 8

SD-CLK

10

SD-CMD

38 37 36 28 27 26 35

46

GND

45

GND

44

GND

1

GND

Title

Size Document Number Rev

A3

Date: Sheet

ACM2012-900-2P-T

4

3 4

3

VCC_ASKT_S0

9 10

8

15

24 23 22 19 18 17 16 14 6

SM_PHYS_WP#

MS_CLK-R

SD_WP_R SD_WP

MS_CLK

SDCCMD

MSCBS

R685

1 2

0R0402-PAD

PCMCA / 1394 / CARD READER

TR3

SM_CD#

R694

1 2

0R0402-PAD

R705

1 2

0R0402-PAD

R686

1 2

R687

1 2

0R0402-PAD

Bolsena

TPA0+ TPA0TPB0+ TPB0-

SM_CD# 26

SC 0308

0R2-0

SC 0308

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

4 3 2 1

ME : 20.90036.001 2ND : 22.10245.141

12

C605

C605 SCD1U16V

SCD1U16V

VCC_ASKT_S0

SC 0308

SD_CD# 26

SC 0308

SM_CLE 26

SD_WP 26 SDCCLK 26 SM_R# 26

DY

SM_PHYS_WP# 26

MS_CLK-R

E

1394

AMP-CONN4A

22.10245.141 - 2ND

20.90036.001

VPP_ASKT_S0

12

R421

R421 100KR2

100KR2

12

C618

C618 SCD1U16V

SCD1U16V

MSCBS 26 MS_CD# 26 MS_CLK 26

SDCCMD 26

SM_D[4..7] 26 MS_D[1..3] 26

28 58Thursday, March 31, 2005

of

6

5

12

-1

C604

C604 SC4D7

SC4D7

DY

A

TGP0 TGN0 TGN1

12

R571

R571 49D9R2F

49D9R2F

4 4

12

TGP1

12

R570

R570 49D9R2F

49D9R2F

C726

C726 SCD01U50V3KX

SCD01U50V3KX

12

R573

R573 49D9R2F

49D9R2F

MID1XMID0X MID2X MID3X

12

TGP2 TGN2

12

R572

R572 49D9R2F

49D9R2F

C727

C727 SCD01U50V3KX

SCD01U50V3KX

LAVDDH LAN_X1 LAN_X2 CTRL18 LDVDD_A

12

R577

R577 49D9R2F

49D9R2F

12

C728

C728 SCD01U50V3KX

SCD01U50V3KX

Dummy when use Giga

R569

1 2

5K6R3F

R568

1 2

2K49R3F

3 3

Dummy when use 10/100

LAVDDH

LDVDD

Dummy when use Giga

TGP230

TGN230

2 2

3D3V_S0

1

SC 0308

2

PME#_SB21,34

1 1

Dummy when use 10/100

TGP030

TGN030

TGP130

TGN130

R575

1 2

0R2-0

R574

1 2

0R2-0

TGP330

TGN330

R580 1KR2R580 1KR2

3

R581

1 2

INT_PIRQH#18

3D3V_LAN_S5

PCIRST_BUF#15,18,26,28,31,57

CLK33_LAN18,22

PCI_GNT#218

PCI_REQ#218

CLK33_LAN

1 2

15KR2F

1 2

0R0402-PAD

SC 0308

R582

12

1 2

A

D53 BAT54-1D53 BAT54-1

TGP0 TGN0 LAVDDL

TGP1 TGN1 LAVDDL CTRL25

LAVDDH

LV_12P

TGP2 TGN2

LAVDDL TGP3

TGN3 LAVDDL

ISOLATE# LDVDD INT_PIRQH#

CLK33_LAN PCI_GNT#2 PCI_REQ#2 PME#_LAN LDVDD PCI_AD31 PCI_AD30

PCI_AD29 PCI_AD28

C730

(10/100) 71.08100.C0G - (GIGA ver:C) 71.08110.A0G

SC10P50V2JN-1

LAN_IDSELPCI_AD23

R603

100R2F

RSET

U75

1

MDI0+

2

MDI0-

3

AVDDL

4

VSS

5

MDI1+

6

MDI1-

7

AVDDL

8

CTRL25

9

VSS

10

AVDDH

11

HSDAC+

12

HSDAC-

13

VSS

14

MDI2+

15

MDI2-

16

AVDDL

17

VSS

18

MDI3+

19

MDI3-

20

AVDDL

21

VSSPST

22

GND

23

ISOLATE#

24

VDD18

25

INTA#

26

VDD33

27

PCIRST#

28

PCICLK

29

GNT#

30

REQ#

31

PME#

32

VDD18

33

PCIAD31

34

PCIAD30

35

GND

36

PCIAD29

37

PCIAD28

38

VSSPST

RTL8110SBL

3D3V_LAN_S5

2K49R3F

128

127

VSS

RSET

PCI_AD27 PCI_AD26

PCI_AD25 PCI_AD24 PCI_CBE#3 LDVDD LAN_IDSEL

PCI_AD23 PCI_AD22 PCI_AD21

126

AVDD18

B

12

CLOSE TO LAN CHIP

12

R579

R579 49D9R2F

49D9R2F

12

C729

C729 SCD01U50V3KX

SCD01U50V3KX

R578

R578 49D9R2F

49D9R2F

TGP3 TGN3

R576

R576 49D9R2F

49D9R2F

Dummy when use 10/100

111

116

118

124

123

VSS

122

VSS

B

125

CTRL18

PCIAD2739PCIAD2640VDD3341PCIAD2542PCIAD2443CBEB344VDD1845IDSEL46PCIAD2347GND48PCIAD2249PCIAD2150VSSPST51GND52PCIAD2053VDD1854PCIAD1955VDD3356PCIAD1857PCIAD1758PCIAD1659CBEB260FRAME#61GND62IRDY#63VDD18

119

121

120

117

115

GND

AVDDH

VSSPST

LED0

VDD18

XTAL2

XTAL1

109

110

112

114

113

GND

LED1

LED2

LED3

EESK

VDD18

64

=> LED1 : LINK

RTL_LED1#

RTL_LED2#

ACT_LED# LDVDD

RTL_LED2# 1G_LED# LAN_EESK LDVDD LAN_EEDI LAN_EEDO 3D3V_LAN_S5 LAN_EECS_3

PCI_AD0 PCI_AD1

105

106

107

104

103

108

EEDI

EECS

EEDO

VDD33

PCIAD0

PCIAD1

LANWAKE

VSSPST

PCIAD10 PCIAD11 PCIAD12

PCIAD13 PCIAD14

VSSPST

PCIAD15

DEVSEL#

VSSPST

CLKRUN#

LDVDD PCI_IRDY# PCI_FRAME# PCI_CBE#2 PCI_AD16 PCI_AD17 PCI_AD18

PCI_AD19 LDVDD PCI_AD20

RTL_LED1#

PCIAD2

GND

VDD18 PCIAD3 PCIAD4 PCIAD5 PCIAD6

VDD33 PCIAD7

CBEB0 PCIAD8

PCIAD9

M66EN

VDD33

GND

VDD18

CBEB1

PAR

SERR#

NC#74

GND

NC#72 VDD33 PERR# STOP#

TRDY#

C

R612 0R0402-PADR612 0R0402-PAD

1 2

D40

1

6

2

3 4

RB731U

ACT_LED# 30,57

1G_LED#

5

DY

=> LED0 : ACT

3D3V_LAN_S5

Dummy when use Giga

PCI_AD2

102 101 100

LDVDD

99

PCI_AD3

98

PCI_AD4

97

PCI_AD5

96

PCI_AD6

95 94

PCI_AD7

93

PCI_CBE#0

92 91

PCI_AD8

90

PCI_AD9

89 88

PCI_AD10

87

PCI_AD11

86

PCI_AD12

85 84

PCI_AD13

83

PCI_AD14

82 81 80

PCI_AD15

79

LDVDD

78

PCI_CBE#1

77

PCI_PAR

76

PCI_SERR#

75 74 73 72 71

PCI_PERR#

70

PCI_STOP#

69

PCI_DEVSEL#

68

PCI_TRDY#

67 66

PM_CLKRUN#

65

Dummy when use 10/100

GIGALAN: RTL8110SBL 10/100 LAN:RTL8100C

PCI_IRDY# 18,26,31 PCI_FRAME# 18,26,31

3D3V_LAN_S5

C

3D3V_S5

D

PCI_CBE#[3..0]18,26,31

PCI_AD[31..0]18,22,26,31

100M_LED# 30

3

DY

U78

1 2

BAT54C-L

SC 0308

EEPROM LED OPTION USE '01' (DEFINED IN SPEC) => LED0 : ACT => LED1 : LINK (BOTH 10/100 AND GIGA CHIP)

0R2-0

CTRL25

R149

1 2

CTRL18

1 2

R170 0R2-0R170 0R2-0

PCI_PAR 18,26,31 PCI_SERR# 18,26,31

PCI_PERR# 18,26,31 PCI_STOP# 18,26,31 PCI_DEVSEL# 18,26,31 PCI_TRDY# 18,26,31

PM_CLKRUN# 18,26,31,34,37

G68

1 2

GAP-CLOSE-PWR

3D3V_LAN_S5 3D3V_LAN_S5

3D3V_LAN_S5

12

3D3V_LAN_S5

3

1

2

12

C787

C787 SC10U10V5ZY

SC10U10V5ZY

Q9

Q9 BCP69T1-U

BCP69T1-U

C783

SCD1U

3D3V_LAN_S5

D

10M_LED# 30,57

DY

R614 10KR2

1 2

R615 3K6R3DR615 3K6R3D

1 2

12

SCD1U

C207

C207 SCD1U

SCD1U

12

C731

12

SCD1U

12

C206

C206 SCD1U

SCD1U

C760

SCD1U

CTRL25

C732

C732 SCD1U

SCD1U

12

C786

C758

SCD1U

Dummy when use 10/100

Title

Size Document Number Rev

A3

Date: Sheet

LAN_X2

X-25MHZ-11-U

LAN_X1

LAN_EECS_3 LAN_EESK LAN_EEDI

LAN_EEDO

12

C762

C784

SCD1U

LDVDD

12

C761

C788

SCD1U

3D3V_LAN_S5

1

RTL8110SBL/RTL8100C

X7

1 2

0R0603-PAD

12

C201

3

Q7

Q7 BCP69T1-U

BCP69T1-U

2

C159

12

SC10U10V5ZY

Bolsena

1 2

U79

1

CS

2

SK

3

DI

4

DO

M93C46-W-3

45 Ohm, 600mA

L5

SC 0308

12

C230

SCD1U

Dummy when use Giga

C204

12

SCD1U

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

C725

C725 SC12P50V2JN

SC12P50V2JN

C759

C759 SC12P50V2JN

SC12P50V2JN

ORG GND

LAVDDH

45 Ohm, 600mA

1 2

0R0603-PAD

SCD1U

12

R150

R150 0R3-U

0R3-U

C208

12

E

VCC

L4

SCD1U

DC

8 7 6 5

12

C203

C203 SCD1U

SCD1U

SC 0308

LAVDDL

C205

12

29 58Thursday, March 31, 2005

3D3V_LAN_S5

12

C202

C202 SCD1U

SCD1U

LDVDD_A

12

C200

12

SCD1U

of

12

SCD1U

C785

C785 SCD1U

SCD1U

12

C199

C199 SCD1U

SCD1U

C757

C757 SCD1U

SCD1U

-1

A

Green - 10Mbps/802.11b

Link: YellowActivity:

Orange - 100Mbps/802.11a Yellow - 1Gbps

TIP

R20

RING

R18

470R2

TDP_RJ45-1 TDN_RJ45-2 RDP_RJ45-3 RJ45-4 RJ45-5 RDN_RJ45-6 RJ45-7 RJ45-8 CONN_PWR_B2

12

470R2

10M_LED# CONN_PWR

12

ACT_LED#

LINK:GREEN ON

10M_LED#29,57

3D3V_LAN_S5

4 4

100M_LED#29

3D3V_LAN_S5

ACT_LED#29,57

ACT:YELLOW BLINKING

ME : 22.10177.721 2nd : (canceled)

MDCW1

34

MLXCON2

1 2

3 3

21.D0010.102

ME : 21.D0010.102

LAN1

9 RJ11_1 RJ11_2

A1 A2

A3 RJ45_1 RJ45_2 RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8

B1

B2

10

22.10177.721

22.10177.711 LED COLOR

A1:GREEN

A3:ORANGE

B2:YELLOW

SKT-RJ45+RJ11-2

SC 0310

L1

1 2 1 2

L2

22.10177.711 - 2ND

BLM18HG601SN1D

BLM18HG601SN1D BLM18HG601SN1D

BLM18HG601SN1D

10/100M Lan Transformer

S_TTGP0 S_TTGN0

MCT3 MCT4 V_DAC

7 8

6 14 11

3

Dummy when use Giga

U60

TD+ TD-

CT CT CT CT

XFORM-112

68.0H80P.301

CHANGE NETSWAP?

B

10M_LED# 100M_LED# ACT_LED#

TIPTIP_MDC RINGRING_MDC

TDP_RJ45-1

10

TX+

RD+

RDRX+

TX-

RX-

9 1

2 16

15

TDN_RJ45-2 S_RTGP1

S_RTGN1 RDP_RJ45-3

RDN_RJ45-6

LANKOM 68.0H80P.301

CONN_PWR_B2 CONN_PWR

C14

SC1000P50V2KX

RJ45-8 RJ45-7 RJ45-5 RJ45-4

12

C11

12

EC1

EC1 SCD1U

SCD1U

12

C10

SC1000P50V2KX

123

MCT1

12

EC2

EC2 SCD1U

SCD1U

12

SC1000P50V2KX

678

RN13

4 5

SRN0-1-U

MCT2

C

Function An to nB1 An to nB2

TGN029 TGP029 TGN129 TGP129 TGN229 TGP229 TGN329 TGP329

SEL

D

L H

LAN switch

2 4

8 10 15 17 21 23

3

5

7

9 11 13 16 18 20 22 27 30 33 37 40 43 46

U12

A0 A1 A2 A3 A4 A5 A6 A7

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

PI3L301DA

0B1 1B1 2B1 3B1 4B1 5B1 6B1 7B1

0B2 1B2 2B2 3B2 4B2 5B2 6B2 7B2

SEL

VDD VDD VDD VDD VDD

E

S_TTGN0

48

S_TTGP0

47

S_RTGN1

42

S_RTGP1

41

S_TGN2

35

S_TGP2

34

S_TGN3

29

S_TGP3

28

D_TTGN0

45

D_TTGP0

44

D_RTGN1

39

D_RTGP1

38

D_TGN2

32

D_TGP2

31

D_TGN3

26

D_TGP3

25

14

NC

DOCK_ON_1

24

1 6 12 19 36

SYSTEM

3D3V_LAN_S5

12

D_TTGN0 57 D_TTGP0 57 D_RTGN1 57 D_RTGP1 57 D_TGN2 57 D_TGP2 57 D_TGN3 57 D_TGP3 57

DOCK_ON_1 57

C31

C31 SCD1U10V2MX-1

SCD1U10V2MX-1

DOCK

Dummy when no EZ4

TGN0 TGP0 TGN1 TGP1 TGN2 TGP2 TGN3 TGP3

RN98 SRN0-2-URN98 SRN0-2-U

3 4

RN99 SRN0-2-URN99 SRN0-2-U

3 4

RN100 SRN0-2-URN100 SRN0-2-U

3 4

RN101 SRN0-2-URN101 SRN0-2-U

3 4

2 1 2 1 2 1 2 1

S_TTGN0 S_TTGP0 S_RTGN1 S_RTGP1 S_TGN2 S_TGP2 S_TGN3 S_TGP3

2 2

GIGA Lan Transformer

NETSWAP GIGA THICK PN IS 68.62401.301, DON'T USE NETSWAP THIN

U61

S_TGP3 S_TGN3

S_TGP2 S_TGN2

S_RTGP1 S_RTGN1

S_TTGP0 S_TTGN0 TDN_RJ45-2

C32

12

C33

SCD01U50V3KX

V_DAC

12

C36

SCD01U50V3KX

12

C35

LAVDDL

1 1

0R2-0

12

R517

1 2

Dummy when use 10/100

U61

2

TD1+

3

TD1-

5

TD2+

6

TD2-

8

TD3+

9

TD3-

11

TD4+

12

TD4-

1

TCT1

4

TCT2

7

TCT3

10

TCT4

XFORM-153

68.02402.30A

Dummy when use 10/100

12

SCD01U50V3KX

C34

C34 SCD1U

SCD1U

MCT1 MCT2 MCT3 MCT4

LANKOM 68.02402.30A netSWAP 68.62401.301 (GIGA ,Thick)

RJ45-7

23

MX1+

MX1-

MX2+

MX2-

MX3+

MX3-

MX4+

MX4-

22 20

19 17

16 14

13 24

21 18 15

C13

1 2

RJ45-8 RJ45-4

RJ45-5 RDP_RJ45-3

RDN_RJ45-6 TDP_RJ45-1

MCT1 MCT2 MCT3 MCT4

LAN_TC_GND

12

SC1KP2KV

SC1KP2KV C12

C12 SC1000P50V2KX

SC1000P50V2KX

1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.

3.No vias, No 90 degree bends.

4.pairs must be equal lengths.

5.6mil trace width,12mil separation.

6.36mil between pairs and any other trace.

7.Must not cross ground moat,except RJ-45 moat.

678

RN12

123

4 5

SRN75J

DY

SC 0310

Dummy when use Giga

A

B

C

Dummy when use EZ4

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

A3

LAN CONN

Bolsena

30 58Thursday, March 31, 2005

of

E

of

-1

A

B

C

D

E

MINI-PCI

4 4

3D3V_S0

PCI_AD[31..0]18,22,26,29 PCI_CBE#[3..0]18,26,29

MINI1

1 3

5 7

80211_ACTIVE

WIRELESS_EN34

MINI_P_IRQF#

PCI_AD31 PCI_AD29

PCI_AD27 PCI_AD25

PCI_CBE#3 PCI_AD24 PCI_AD23

PCI_AD21

PCI_AD17 PCI_CBE#2

PCI_CBE#1 PCI_AD14

PCI_AD12 PCI_AD10

PCI_AD8 PCI_AD7

PCI_AD5 PCI_AD3 PCI_AD1

B

PM_CLKRUN#18,26,29,34,37

3D3V_S0

CLK33_MINI18,22

PCI_IRDY#18,26,29

PCI_SERR#18,26,29

5V_S0

3 3

BT_COEX224

3D3V_S0

12

R637

R637 10KR2

10KR2

PCI_PERR#18,26,29

2 2

1 1

A

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99

101 103 105 107 109 111 113 115 117 119 121

123

ME : 62.10032.001 2ND : 62.10032.031

125 2

4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122

124 126

PCIMODEM124A1U1

62.10032.001

RINGTIP

(VCC)

(M66EN)

12

C809

C809 SC4D7U10V5ZY

SC4D7U10V5ZY

DY

5V_S0

12

DY

MINI_P_IRQF#

PME#_MINI PCI_AD30 PCI_AD28

PCI_AD26 MINI_IDSEL PCI_AD22

PCI_AD20PCI_AD19 PCI_AD18

PCI_AD16

PCI_AD15 PCI_AD13 PCI_AD11

PCI_AD9 PCI_CBE#0

PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0

62.10032.031 - 2ND

C811

C811 SC4D7U10V5ZY

SC4D7U10V5ZY

R629

1 2

0R0402-PAD

SC 0308

C

12

C810

C834

C834 SCD1U

SCD1U

12

C810 SCD1U

SCD1U

C833

SCD1U

DY

INT_PIRQF# 18,26

PCIRST_BUF# 15,18,26,28,29,57 PCI_GNT#0 18PCI_REQ#018

BT_COEX1 24

TP82

TP82 TPAD30

TPAD30

R638

1 2

100R2F

PCI_PAR 18,26,29

PCI_FRAME# 18,26,29 PCI_TRDY# 18,26,29 PCI_STOP# 18,26,29

PCI_DEVSEL# 18,26,29

PCI_AD21

12

C835

C835 SCD1U

SCD1U

D

WLAN_TEST_LED34

80211_ACTIVE

WIRELESS_EN

3D3V_S0

R565

R565 10KR2

10KR2

1 2

2

SB 0214

Title

Size Document Number Rev

Date: Sheet

MINI-PCI

A3

3D3V_S0

2222K

K

2222K

K

Bolsena

R566

R566 10KR2

10KR2

1 2

31

Q29

Q29 DTC124EUA-U1

DTC124EUA-U1

31

Q28

Q28 DTC124EUA-U1

DTC124EUA-U1

2222K

2

K

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

31

Q30

Q30 DTC124EUA-U1

DTC124EUA-U1

31 58Thursday, March 31, 2005

WLAN_LED# 17

of

-1

5

4

3

2

1

12

C613

C613 SC10U10V5ZY

SC10U10V5ZY

5V_AUDIO_S0

12

R447

R447 28K7R2F

28K7R2F

C611

SC22P50V2JN-1

12

R446

R446 10KR2F-U

10KR2F-U

AUD_AGND

DY

U52

5

VCC

4

Y

NC7SZ08-U

12

C943

DY

SC1000P50V2KX

C938

C938 SC1000P50V2KX

SC1000P50V2KX

C923

12

SC1U10V3ZY

DY

GND

SB 0219

SCD1U

AUDLINL AUDLINR

R416

12

0R2-0

1

A

2

B

3

12

C942

SC1U10V3KX

DY

AUD_MICIN1

BITCLK_BUFF

AC97_RST#

12

C944

12

C945

SCD1U

14 15

16 17

39 41

23 24

35 36

21 22

VREFOUT2

ADAF2 ADAF1

VREFOUT1

CODECVREF

SC10U10V5ZY

U98

AUX-L AUX-R

JD2 JD1/GPIO1

SURR-OUT-L SURR-OUT-R

LINE-L LINE-R

FRONT-OUT-L FRONT-OUT-R

MIC1 MIC2

ALC655-U

30

AFILT129AFILT2

CD-L18CD-R

20

19

VRDA31VRAD

CD-GND

VREFOUT133

3D3V_S05V_AUDIO_S0

12

C614

C617

SCD1U

28

34

32

27

VREF

VREFOUT

FRONT-MIC

MONO-OUT-R

CEN-OUT43LFE-OUT

37

44

PC-BEEP12PHONE

33

NC#33

13

40

NC#40

38

AVDD25AVDD

AGND26AGND

42

9

VDD1VDD

SPDIFI/EAPD

GND4GND

7

DY

12

C616

SCD1U

XTL-IN

XTL-OUT

SPDIFO

SDIN

SDOUT

JD0/GPIO0

XTLSEL

BITCLK

SYNC

RESET#

12

C615

C602

SCD1U

0R0402-PAD

EAPD 33

0R0402-PAD

R689

1 2

0R0402-PAD

R449

1 2

SC 0308

R690

R450

1 2

0R0402-PAD

R415

R415 R414

R414

1 2

12

22R2

12

33R2

33R2 10KR2

10KR2

SC 0308

DY

XTALIN_CODEC

2 3

SPDIF_OUT

48 47

AC97_DATIN

8 5

45 46

AC97_CBITCLK BITCLK_BUFF

6 10

11

CLK14_AUDIO 3

C910

1 2

SC22P50V2JN

AC97_BITCLK_SB21

D D

AC97_BITCLK24

C C

AUD_LINL33

AUD_LINR33

AUD_LOL33

AUD_LOR33

AUD_MICIN33

B B

1 2

33R2

R417

1 2

33R2

12

C939

C939 SCD1U

SCD1U

AUD_AGND

C920

C920 C946

C946

12

C937

C937 SC1000P50V2KX

SC1000P50V2KX

AUD_AGND AUD_AGND

3D3V_S0

12

C940

1 2 1 2

R419

R419 10KR2

10KR2

DY

12

C941

SC1000P50V2KX

SC1U10V3KX

SC1U10V3KX SC1U10V3KX

SC1U10V3KX

12

AC97_BITCLK_ALL

R418

5V_S0

U55

1

SHDN#

SET

2

AUD_AGND

GND IN3OUT

G923-330T1U-1

C610

12

SC1U10V3KX

AC97_DIN0 21 AC97_DOUT 21,22,24

XTSEL HI: USE 24.576M XTAL XTSEL LOW: USE 14.318M CLK FROM CLK GEN

AC97_SYNC 21,24 AC97_RST# 21,24

5

5V_AUDIO_S0

4

12

EC5

5VA_SET

12

SPDIF 33,57

SC1000P50V2KX

R704

R704 100KR2

100KR2

12

CDAUDL

CDAGND

CDAUDR

R703

R703 100KR2

100KR2

AUD_AGND

1 2

12

R702

R702 100KR2

100KR2

R700

CD_AUDL25

CD_AGND25

CD_AUDR25

A A

1 2

75R2F

R451

1 2

GAP-CLOSE-PWR

R699

1 2

75R2F

5

12

C924

C924 SC1U10V3KX

SC1U10V3KX C925

C925 SC1U10V3KX

SC1U10V3KX C922

C922 SC1U10V3KX

SC1U10V3KX

CDAUD_L

CDAUD_GND

CDAUD_R

C911

R691 4K7R2R691 4K7R2

AUD_AGND

AUD_PC_BEEP AUD_SYS_BEEP

4

C921

12

SCD1U

AUD_AGND AUD_AGND

3

12

C926

SC2200P50V2KX

1 2

R692 4K7R2R692 4K7R2

1 2

12

R701

R701 2K2R2

2K2R2

R693 4K7R2R693 4K7R2

1 2

C911

12

SC4D7U10V5ZY

SC4D7U10V5ZY C912

C912

12

SC4D7U10V5ZY

SC4D7U10V5ZY C913

C913

12

SC4D7U10V5ZY

CB_SPKR 26

SPKR_SB 21

KBC_BEEP 34

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

AUDIO (1/2) -- CODEC ALC655

A3

G105 GAP-CLOSEG105 GAP-CLOSE

12

G106 GAP-CLOSEG106 GAP-CLOSE

12

G107 GAP-CLOSEG107 GAP-CLOSE

12

G108 GAP-CLOSEG108 GAP-CLOSE

12

AUD_AGND

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bolsena

1

SC 0308

-1

32 58Thursday, March 31, 2005

of

-1

AMPGND

12

AMPGND

SC4D7U10V5ZY

12

C612

C612 SC4D7U10V5ZY

SC4D7U10V5ZY

5VA_OP_S0

C950

SC1U10V3KX

AMPGND

R457

R457 10KR2

10KR2

DY

AMPGND

12

C629

A

C636

CSOUTL1

1 2

SC2D2U16V5ZY

C952

CSOUTL2

1 2

SC2D2U16V5ZY

SC 0309

12

C633

5VA_OP_S0

SCD1U

R458

R458 10KR2

10KR2

1 2

2

E

Q21

Q21 PDTA124EU

PDTA124EU

B

1

12

AUD_LOR32

SC4D7U10V5ZY

AMPGND

C

AMPGND

HP_IN_1

12

3

C627

1 2

SC2D2U16V5ZY

C626

1 2

SC2D2U16V5ZY

SC 0309

R456

GAP-CLOSE

R479

1 2

R719

1 2

15KR2F

HP_L L_BYPASS

HP_IN_1

AMPGND

R_BYPASS HP_R

By GMT suggest. Change from

74.01421.01G to 74.01421.A1G

CSOUTR1

R455

1 2

R472

CSOUTR2

1 2

10KR2

L_LINE_IN

15KR2F

10KR2

5V_S0 5VA_OP_S0

G43

1 2

GAP-CLOSE-PWR

4 4

AUD_LOL32

12

C951

SC10U10V5ZY

AMP_SHUTDOWN34

3 3

R_BYPASS L_BYPASS

12

C635

AMPGND

2 2

LEVEL SHIFT

5V_S0

KBC_MUTE34

1 1

EAPD32

SC 0308

BAT54C-U

R459

0R0402-PAD

10KR2

R460

A

U56

12

AMPGND

3

1 2

12

14

10

U2C

9 8

7

TSAHCT125

AUD_MUTE

HP_L

4 5 6 7

8

2 17 23

18 19 20 21

R_LINE_IN

HP_R

SYS_LOUT_IN

DTC124EUA-U1

AUD_MICIN32

B

U57

LLINEIN LHPIN LBYPASS LVDD

SHUTDOWN TJ HP-IN VOL

RVDD RBYPASS RHPIN RLINEIN

G1421BF3U

Q33

VREFOUT132

B

SB 0203ALL AUD_AGND -> AMPGND

1 2

SC220P50V2KX-U

R478

1 2

R718

1 2

HP/LINE#

MUTEOUT

GND

25

R471

1 2

R470

1 2

5VA_OP_S0

12

R732

2K2R2

31

K

AMPGND

12

C625

C625 SC3300P50V2KX

SC3300P50V2KX

AMPGND

C634

10KR2

C632

C632 SC220P50V2KX-U

SC220P50V2KX-U

18KR2F

LOUT+

LOUT-

SE/BTL#

MUTEIN GND/HS

GND/HS GND/HS GND/HS

ROUT-

ROUT+

18KR2F

C630

C630 SC220P50V2KX-U

SC220P50V2KX-U

10KR2

C628

C628 SC220P50V2KX-U

SC220P50V2KX-U

2222K

2

SYS_EXT_MIC_IN

12

1 2 1 2 1 2

3 10

14 16 11 9 1 12 13 24

15 22

R475

R475 2K2R2

2K2R2

R468

R468 R469

R469 R476

R476

AMPGND

12

SPKR_L+ SPKR_L-

HP_IN

AUD_MUTE

SPKR_RSPKR_R+

R489

R489 10KR2

10KR2

SYS_LOUT_IN#SYS_LOUT_IN#

AMPGND

SB 0127

Dummy when 'USE EZ4'

1 2

3 1

Q23

DTC124EUA-U1

Dummy when no EZ4

C631

C631 SC4D7U10V5ZY

SC4D7U10V5ZY

1 2

AMPGND

SYS_EXT_MIC_IN

0R0402-PAD

INT_MIC_IN

0R0402-PAD

0R0402-PAD 0R0402-PAD

0R0402-PAD

DOCK_EXT_MIC 57

K

K 22

22

12

R467

2

R454

R454 100KR2

100KR2

D22

3 4

2

1

RB731U

0R2-0

K

K 22

22

DOCK_MIC_JKIN57

C

SYS_LOUT_IN

5

6

5V_AUDIO_S0

12

DOCK_JACK_IN 57

ENAUDIO# 37

R452

1 2

300R2F

SB 0201

R445

R445 10KR2

10KR2

R764 0R2-0

G109 GAP-CLOSEG109 GAP-CLOSE

12

G110 GAP-CLOSEG110 GAP-CLOSE

12

G111 GAP-CLOSEG111 GAP-CLOSE

12

G112 GAP-CLOSEG112 GAP-CLOSE

12

AMPGND

LINE IN/MIC IN

AUD_LINR32

AUD_LINL32

LINE OUT

TC30

SPKR_L+ SPKR_R+

TC29 SE100U10VM

AUD_LINE_L

5V_AUDIO_S0

MIC_JKIN# 37

SC 0309

close to diode

SC 0308

MIC_JKIN#_1

12

DY

Q20

DTC124EUA-U1

2222K

2

Dummy when no EZ4

D21

2

1

BAW56-1

31

K

SC 0308

1 2

12

R48510KR2 R48510KR2

AMPGND

79.10711.4C1

SE100U10VM

1 2 1 2

79.10711.4C1

SB 0201

12

R453

R453 10KR2

10KR2

2

3

D

SPKR_LSPKR_L+ SPKR_R+ SPKR_R-

SPKR_L+ SPKR_R+

R477

1 2

R473

1 2

0R2-0

0R2-0 0R2-0

0R2-0

Dummy when no EZ4

12

C647

R486

R484

R48810KR2 R48810KR2

C647

SC1U10V3ZY

SC1U10V3ZY 1KR2

1KR2

C645

SC1U10V3ZY

AUD_LINE_R

AUD_LINE_L

SYS_LOUT_IN#=LOW after PLUG-IN

SB 0127

SPKR_L+1

SPKR_R+1 SPKR_R_A1

AMPGND

INT_MIC_IN

2222K

K

D

R492

1 2

R490

1 2

12

R493

R491

1KR2

AMPGND

31

Q22

Q22 DTC124EUA-U1

DTC124EUA-U1

LOW OFF

Title

Size Document Number Rev

Custom

Date: Sheet

Internal Speaker

12

C638

SC680P50V2KX

R487

R487 1KR2

1KR2

AMPGND

C648

12

SPDIF32,57

SYS_LOUT_IN#

SPKR_L_A1

12

C650

SC680P50V2KX

12

SC100P50V2JN

12

C649

12

C637

SC680P50V2KX

DOCK_LIN_R 57 DOCK_LIN_L 57

C646

SC100P50V2JN

22R2

22R2 22R2

22R2

Internal Mic

INT_MIC

C1

SC1000P50V2KX

1 2

AUDIO (2/2)

Bolsena

E

SPK1

5 4 3 2

1

12

C639

C640

SC680P50V2KX

ME : 20.D0122.104 2ND : 20.D0012.104

SPKR_L_DOCK 57 SPKR_R_DOCK 57

5VA_OP_S0

12

R466

12

EC8

SC330P50V2KX

3D3V_S0

1ST CHANGE TO 22.10147.031 - 22.10251.031 2ND

12

EC6

SC680P50V2KX

SC330P50V2KX

MIC1

1 2

CON2-10-U2

ME : 20.D0012.102

20.D0012.102

R751 0R3-UR751 0R3-U

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

6

ETY-CON4-S

20.D0122.104

2ND : 20.D0012.104

SC 0309

LIN1

100KR2

MIC_JKIN#_1

5 4 3 6 2 1

12

EC7

AUDIO-JK30-U

SC330P50V2KX

22.10088.571

22.10271.011 - 2ND

ME : 22.10088.571 2ND : 22.10271.011

ME : 22.10133.561 2ND : 22.10257.001 2ND : 56.1549C.011

LOUT1

9

GND

8

VCC

7

VIN

16

6 5 4 2 3 1

MINDIN10-1-U2

SC330P50V2KX

3

4

33 58Thursday, March 31, 2005

MINDIN10-1-U2

22.10257.001

SB 0204

of

12

EC9

-1

RN27

SRN10K-2

RN105

SRN10KJ

R134

DUMMY-R2

R131

R131 10KR2

10KR2

12

5

3D3V_AUX_S5

C127

C127 SCD1U16V

SCD1U16V

LPC_LFRAME#18,37 P_SERIRQ18,26,37

6 7 8

3D3V_AUX_S5

R124

DUMMY-R2

12

C152

C709

SCD1U16V

KBCBIOS_RD# KBCBIOS_WE# KBCBIOS_CS#

A036 A136 A236 A336 A436 A536 A636 A736 A836 A936 A1036 A1136 A1236 A1336 A1436 A1536 A1636 A1736 A1836

TDATA_535 TCLK_535

12

R125

DUMMY-R2

12

R127

R127 10KR2

10KR2

SCD1U16V

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

KBC_D0 KBC_D1 KBC_D2 KBC_D3 KBC_D4 KBC_D5 KBC_D6 KBC_D7

ECSWI#21

PM_PWRBTN#21 RSMRST#_KBC21,46

S5_ENABLE23

BRIGHTNESS17

KBC_PWRBTN#35

KBC_SLP_WAKE21

L3

1 2

BLM11P600S

12

SCD1U16V

15

LAD0

14

LAD1

13

LAD2

10

LAD3

9

LFRAME#

18

LCLK

7

SERIRQ

150

RD#

151

WR#

173

MEMCS#

152

IOCS#

138

D0

139

D1

140

D2

141

D3

144

D4

145

D5

146

D6

147

D7

124

A0

125

A1

126

A2

127

A3

128

A4

131

A5

132

A6

133

A7

143

A8

142

A9

135

A10

134

A11

130

A12

129

A13

121

A14

120

A15

113

A16

112

A17

104

A18

103

A19

117

PSDAT3

116

PSCLK3

115

PSDAT2

114

PSCLK2

111

PSDAT1

110

PSCLK1

KBC_BEEP32

AC_IN#47

KBC_LID#35

SB 0201

C724

1 2

C228

C228 SCD1U16V

SCD1U16V

TP15TP15

1 2 3 45

3

SC 0308

12

R133

R133 10KR2

10KR2

DY

12

R130

5

12

DUMMY-R2

12

C153

C153 SCD1U16V

SCD1U16V

LPC_LAD[0..3]18,37

CLK33_KBC18,22

KBCBIOS_RD#36 KBCBIOS_WE#36 KBCBIOS_CS#36

KBC_D[0..7]36 BAT_SDA_548

SRN47-1

4 5 3 2 1

RN26

TDATA_5 TCLK_5

12

R132

R132 10KR2

10KR2

DY

12

R128

R129

10KR2

DUMMY-R2

3D3V_AUX_S5

12

D D

C C

B B

A1 A4 A5 FAN3PWM FAN3FB

A A

A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable A4 for DMRP==>High=Disable,Low=Enable

A5 for EMWB==>High=Enable,Low=Disable

GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended)

C723

C723 SCD1U16V

SCD1U16V

5V_S0

12

C124

C124 SCD1U16V

SCD1U16V

PS2_MDAT57 PS2_MCLK57 PS2_KDAT57 PS2_KCLK57

8 7 6

1 4 2

12

3D3V_KBC_AUX_S5

12

VCC16VCC34VCC45VCC

PWM743PWM640PWM539PWM438PWM337PWM236PWM133PWM0

R741

1KR2

SB 0201

R745

1 2

PM_SLP_S3#18,21,38,39,43,44,55,57

BRIGHTNESS

GMODULE_RST#13

4

123

136

157

VCC

LPC

X-bus ROM

PS/2

RSMRST#_KBC

0R0402-PAD

4

95

161

166

VCC

VCCA

VCCBAT

GPWU02GPWU126GPWU229GPWU330GPWU444GPWU576GPWU6

32

TP118TP118

KBC_PME#

BRIGHTNESS_PWM

R746 0R2-0

1 2

SC 0307

USB_PWR_EN#24

KCOL1

KCOL2

KCOL3

KCOL4

KCOL5

KCOL6

KCOL7

KCOL8

KCOL9

KCOL10

KCOL11

KCOL12

53

KSO556KSO657KSO758KSO859KSO9

60

KSO1061KSO1164KSO1265KSO1366KSO1467KSO1568KSO16

50

KSO049KSO1

KSO251KSO352KSO4

KB Matrix

KB3910

DA099DA1

DA2

DA3

GPWU7

100

101

172

TP119TP119

DY

176

102

TP25TP25

GMODULE_RST#

BRIGHTNESS_DA

SB 0201

KCOL13

KCOL14

DA41DA542DA647DA7

KCOL[1..16] 35 KROW[8..1] 35

KCOL15

KCOL16

153

154

KSO17

AD081AD182AD283AD384AD487AD588AD689AD7

174

AC_VOL_SENSE

BAT_SENSE

AC_VOL_SENSE BAT_SENSE

3

KROW1

KROW2

KROW3

KROW4

KROW5

KROW6

KROW7

KROW8

KSI071KSI172KSI273KSI374KSI477KSI578KSI679KSI7

90

TP120TP120

KBC_BB_ENABLE#

AD_IA

AD+ BT+

12

3

80

ECRST#19ECSCI#

31

EC_RST#

1 2

R599

R599 100KR2F

100KR2F

R600

R600 13K3R2F

13K3R2F

BAT_SCL_5

BAT_SDA_5

KBC_SCL2

KBC_SDA2

164

170

163

169

SCL1

SCL2

SDA1

SDA2

AGND96BATGND

159

SB 0201

1KR2

R742

KBC_BB_ENABLE# 36

12

R602

R602 560KR2F

560KR2F

12

R601

R601 100KR2F

100KR2F

KBC_XO

KBC_XI

158

160

XCLKI

XCLKO

GND17GND35GND46GND

122

ECSCI#_KBC 21

AD_IA 47

1 2

32

X6

X6 X-32D768KHZ-12-U

X-32D768KHZ-12-U

1 4

1 2

U20

GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 GPIO16 GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO09 GPIO08 GPIO07 GPIO06 GPIO05 GPIO04 GPIO03 GPIO02 GPIO01 GPIO00

GPIO0F GPIO0E GPIO0D GPIO0C GPIO0B GPIO0A

GPIO1F GPIO1E GPIO1D GPIO1C GPIO1B GPIO1A

GPIOI2D

GPIO2F GPIO2E GPIO2C GPIO2B GPIO2A

GND

KB3910SF

CHANGE TO 71.03910.B0G

137

167

3D3V_AUX_S5

12

C198

SC10U10V5ZY

C125

C125 SC8D2P50V2CC

SC8D2P50V2CC

C126

C126 SC8D2P50V2CC

SC8D2P50V2CC

155 149 148 119 118 109

A20

108

E51TXD

107

E51RXD

106

E51CS#

105 86 85 75 70 69 63

R737

1 2

62 55

R563 10KR2R563 10KR2

54 48

1 2

22 21 20

FAN3FB

12

FAN3PWM

11 8

KBCRST#

6 5

R738 10KR2R738 10KR2

4 3

41

1 2

28 27 25 24 23

98 97 94 93 92 91

VCC3VSB

168 175 171

KBC_PCIRST#

165 162 156

12

R146

R146 10KR2

10KR2

2

1

CH3906Q6CH3906

3

2

KBC_SCL2 KBC_SDA2

TP19 TPAD28TP19 TPAD28

TP116TP116

DY

0R2-0

12

R560 1KR2R560 1KR2

12

SB

R740 1KR2R740 1KR2

SB 0201

3D3V_AUX_S5

KBC_PME#

Q6

2

3D3V_AUX_S5

3

RN103

SRN10KJ

2

1 4

SMBC_G79223

MATRIXID2# 36 MATRIXID1# 36

PRE_CHG 47

BLT_BTN# 35 CHG_ON# 47 AD_OFF 48

STDBY_LED# 17

INTERNET# 35 MAIL# 35 PM_SLP_S5# 21,44,57

4S1P_I 47

PM_SUS_STAT# 21,37

SB 0128

CAP_LED# 17

FRONT_PWRLED# 17 KBC_MUTE 33

KEY5# 35

WIRELESS_BTN# 35 KA20GATE 21

KEY4# 35

BAT_THERMAL 47,48

EZIN_EM# 57

ECSMI#_KBC 21 WIRELESS_EN 31 PM_CLKRUN# 18,26,29,31,37

FPBACK 17

NUM_LED# 17

BLUETOOTH_EN 24

DC_BATFULL# 17

BLT_LED# 17

WLAN_TEST_LED 31 MAIL_LED# 17 CHARGE_LED# 17

0R0402-PAD

R167

R167 10KR2

10KR2

12

10KR2

AMP_SHUTDOWN 33

BL_ON 13,49

R103

1 2

12

R145

1

3D3V_S0

U72 2N7002DWU72 2N7002DW

KBC_SCL2

34 2 1

BAT_SCL_548

EZIN_EM#

USB_PWR_EN#

KBRCIN# 21

100K PULL 3.3V AT EZ4 SIDE

R102

R102 100KR2

100KR2

C123

SC1U10V3ZY

3D3V_S5

2

22

22 K

K

R168

DY

0R2-0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

KBC KB3910

KBC KB3910 Bolsena

Bolsena

EZ_PWROK

31

1

SMBD_G792 23

R166 100KR2R166 100KR2

1 2

R731 100KR2

1 2

DY

PRE_CHG

1 2

34 58Thursday, March 31, 2005

3D3V_AUX_S5

1 2

3D3V_S0

R562

R562 1KR2

1KR2

1 2

EZ_PWROK 57

12

SB 0201

3D3V_S5

22

22 K

K

Q8

Q8 DTC124EUA-U1

DTC124EUA-U1

5 6

R148

R148 100KR2

100KR2

PE_REQ1# 57

12

1 2

KBC_SDA2

TP20 TPAD28TP20 TPAD28 TP21TP21

SB 0213

R126 10KR2R126 10KR2

LPC_RST# 13,18,37

CHK_PW# 36

RSMRST# 23

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

SMBC_G792 SMBD_G792

3D3V_AUX_S5

SD 0324

RN104

2 1 4

SRN8K2J

SB 0201

R561

R561 1MR2

1MR2

1 2

PME#_SB 21,29

of

5V_S0

3

R555

R555 10KR2

10KR2

2

14

RN102

SRN10KJ

3

-1

A

POWER BUTTON

4 4

Power

PWRBTN#_1

PWR1

1 2

5 43

SW-TACT-34-U2

62.40009.241

ME : 62.40009.241 (ALL 11 PCS)

Buttons

Internet Mail P1 P2

MAIL#_1 INTERNET#_1 KEY4#_1 KEY5#_1

MAIL1

1 2

5 43

SW-TACT-34-U2

62.40009.241

3 3

WIRELESS_BTN# BLT_BTN#

12

C642

C642 SCD1U

SCD1U

NET1

1 2

SW-TACT-34-U2

62.40009.241

5 43

P1

1 2

SW-TACT-34-U2

62.40009.241

5 43

Wireless ON/OFFBlueTooth ON/OFF

BLUE2

BLT_BTN#_1 WIRELESS_BTN#_1

12

C643

C643 SCD1U

SCD1U

BLUE2

1 2

PUSH-SW89

43

SC 0310

WIRELESS_BTN#34

BLT_BTN#34

PWRBTN#_1

1 2

SW-TACT-34-U2

1 2

PUSH-SW89

R482 470R2R482 470R2

1 2

R481 470R2R481 470R2

1 2

B

3D3V_AUX_S5

12

R11

R11 10KR2

10KR2

1 2

3D3V_S5

R754 10KR2R754 10KR2

1 2

R753 10KR2R753 10KR2

1 2

R755 10KR2R755 10KR2

1 2

R756 10KR2R756 10KR2

1 2

P2

5 43

62.40009.241

WLAN1

43

R12

470R2

12

ME : 62.40082.081 (2 PCS)

WIRELESS_BTN#_1

BLT_BTN#_1

C8 SCD1UC8SCD1U

MAIL#_1 KEY4#_1 KEY5#_1

INTERNET#_1

SB 0204

KBC_PWRBTN# 34

SC 0310

RN81

1 4 2

R47 470R2R47 470R2

1 2

R46 470R2R46 470R2

1 2

R45 470R2R45 470R2

1 2

R44 470R2R44 470R2

1 2

SRN10KJ

3

3D3V_S5

45

C

678

123

RC1

RC1 SRC100P50V-U

SRC100P50V-U

MAIL# 34 KEY4# 34 KEY5# 34 INTERNET# 34

D

Cover Up Switch

KBC_LID#34

TOUCH PAD

TDATA_534

TP_SCROLL_LEFT

SCRL2

1 2

SW-TACT-34-U2

62.40009.241

TCLK_534

5 43

TP_SCROLL_UP

SCRL1

1 2

SW-TACT-34-U2

62.40009.241

?ESD ?

TP_SCROLL_DOWN

SCRL4

1 2

SW-TACT-34-U2

62.40009.241

3D3V_S5

5V_S0

2

14

RN35

SRN10KJ

3

5 43

12

1 2 1 2

5 43

R23

R23 47KR2

47KR2

R24

1 2

100R2F

C15

C15 SC1000P50V2KX

SC1000P50V2KX

R219 100R2FR219 100R2F R218 100R2FR218 100R2F

SCRL3

1 2

SW-TACT-34-U2

62.40009.241

LID_SW

TP_DATA

TP_CLK

C348

12

SC47P50V2JN

TP_SCROLL_RIGHT

5 43

E

LID1

3 1 2

CON2-10-U2

4

20.D0012.102

ME : 20.D0012.102

5V_S0

12

C347

C350

SCD1U

SC1U10V3KX

C349

TP_RIGHT TP_SCROLL_RIGHT TP_SCROLL_UP TP_SCROLL_LEFT TP_SCROLL_DOWN

SC47P50V2JN

TP_LEFT

SB 0127

TP_LEFT

LEFT1

1 2

5 43

SW-TACT-34-U2

62.40009.241

SB 0204

TPAD1

MLX-CON12-7

14 12 11 10

9 8 7 6 5 4 3 2

1

13

20.K0063.012

ME : 20.K0063.012

TP_RIGHT

RIGHT1

1 2

5 43

SW-TACT-34-U2

62.40009.241

EMI Bypass cap.

KCOL1 KCOL2 KCOL3

KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9

KCOL10

KCOL11 KCOL12

KCOL13 KCOL14 KCOL15 KCOL16

KROW[8..1] 34 KCOL[1..16] 34

Pin1 ==>*R01 Pin2 ==>*R02 Pin3 ==>*R03 Pin4 ==> C01 Pin5 ==> C02 Pin6 ==> C03 Pin7 ==>*R04 Pin8 ==> C04 Pin9 ==> C05 Pin10 ==> C06 Pin11 ==> C07 Pin12 ==> C08 Pin13 ==> C09 Pin14 ==>*R05 Pin15 ==> C10 Pin16 ==>*R06 Pin17 ==>*R07 Pin18 ==> C11 Pin19 ==> C12 Pin20 ==>*R08 Pin21 ==> C13 Pin22 ==> C14 Pin23 ==> C15 Pin24 ==> C16 Pin25 ==> NC

C

KROW7 KCOL11 KCOL12 KROW8

KCOL5 KCOL6 KCOL7 KCOL8

KCOL2 KCOL3 KROW4 KCOL4

KCOL9 KROW5 KCOL10 KROW6

KROW1 KROW2 KROW3 KCOL1

KCOL13 KCOL14 KCOL15 KCOL16

RC7

1 2 3 4 5

SRC100P50V-U

SRC100P50V-U RC5

RC5

1 2 3 4 5

SRC100P50V-U

SRC100P50V-U RC4

RC4

1 2 3 4 5

SRC100P50V-U

SRC100P50V-U RC6

RC6

1 2 3 4 5

SRC100P50V-U

SRC100P50V-U RC3

RC3

1 2 3 4 5

SRC100P50V-U

SRC100P50V-U RC8

RC8

1 2 3 4 5

SRC100P50V-U

TP_RIGHT

8 7 6

TP_SCROLL_RIGHT

TP_SCROLL_UP

TP_SCROLL_LEFT

TP_SCROLL_DOWN

TP_LEFT

D

Internal KeyBoard CONN

2 2

KB1

125

........

1 1

ME : 20.K0090.025

A

26

NC#26

1

C01

2

C02

3

C03

4

R01

5

R02

6

R03

7

C04

8

R04

9

R05

10

R06

11

R07

12

R08

13

R09

14

C05

15

R10

16

C06

17

C07

18

R11

19

R12

20

C08

21

R13

22

R14

23

R15

24

R16

25

NC#25

27

NC#27

MLX-CON25

20.K0090.025

B

KROW1 KROW2 KROW3

KROW4

KROW5 KROW6

KROW7

KROW8

EC13 SC1000P50V2KX

1 2

DY

EC14 SC1000P50V2KX

1 2

DY

EC15 SC1000P50V2KX

1 2

DY

EC16 SC1000P50V2KX

1 2

DY

EC17 SC1000P50V2KX

1 2

DY

EC18 SC1000P50V2KX

1 2

DY

Title

Size Document Number Rev

Date: Sheet

BUTTONs / KB / TOUCHPAD

A3

Bolsena

SB 0203

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

35 58Thursday, March 31, 2005

of

E

of

-1

5

D D

C C

4

KBC_D[0..7] 34

KBCBIOS_WE#34 KBCBIOS_RD#34 KBCBIOS_CS#34

KBC_D034 KBC_D134 KBC_D234 KBC_D334 KBC_D434 KBC_D534 KBC_D634 KBC_D734

A034 A134 A234 A334 A434 A534 A634 A734

3

3D3V_AUX_S5

12

C686

U66

SCD1U16V

13

DQ0

14

DQ1

15

DQ2

17

DQ3

18

DQ4

19

DQ5

20

DQ6

21

DQ7

SST39VF040-70-1

(SOCKET) 62.10002.032 - (IC)72.39040.H03 IN DIP,SMT

32

VDD

VSS

16

22

31

1

24

CE#

OE#

WE#

A012A111A210A39A48A57A66A7

2

A162A1730A18

3

A15

29

A14

28

A13

4

A12

25

A11

23

A10

26

A9

27

A8

5

ROM SIZE MAX. 512KBYTE

A18 34 A17 34 A16 34

A15 34 A14 34 A13 34 A12 34 A11 34 A10 34 A9 34 A8 34

1

PLCC32 Socket P/N:

3D3V_S0

B B

KBC_BB_ENABLE#34 CHK_PW#34 MATRIXID1#34 MATRIXID2#34

A A

5

2

3

3D3V_S0

2

14

RN30

3

RN30

SRN100KJ

1 2 3 4

SW-2184LPSTR

14

RN29

RN29 SRN10KJ

SRN10KJ

Keyboard matrix ( from vendor )

Low Bit

MATRIXID1#

High Bit

MATRIXID2#

SW1

1

8 7 6 5

JapUS

100

01

4

OtherEur

10

SSKT3262.10002.032 SSKT32 62.10005.032

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

2

Date: Sheet of

BIOS ROM

BIOS ROM Bolsena

Bolsena

-1

of

36 58Thursday, March 31, 2005

1

-1

3D3V_S0

RP2

LPCPD#

1 2 3 4 5 6

SRP10K

SC 0310

10 9 8 7

Board Version Setting

PCB_VER0

Ver. SA

SC 0

1

PCB_VER1

00

0

1SB 1 1

1

SIO_PNF XFD_INST# ENAUDIO#

SC 0310

CLK33_SIO18,22

C64

1 2

DUMMY-C2

3D3V_S0

12

DY

R313

R313 10KR2

10KR2

R316

R316 10KR2

10KR2

12

C89

C89 SC1U10V3ZY

SC1U10V3ZY

MIC_JKIN#33

12

R315

R315 10KR2

10KR2

PCB_VER0 PCB_VER1

R314

R314 10KR2

10KR2

DY

SC 0308

12

1 2

C129

C129 SCD1U16V

SCD1U16V

PCB_VER0 PCB_VER1

SC 0310

CLK14_SIO3

DUMMY-C2

C62

12

C63

C63 SCD1U16V

SCD1U16V

100

12

C88

C88 SCD1U16V

SCD1U16V

3

GPIO00/XD0/JOYABTN1

2

GPIO01/XD1/JOYBBTN1

1

GPI002/XD2/JOYAY GPIO03/XD3/JOYBY

99

GPIO04/XD4/JOYBX

98

GPIO05/XD5/JOYAX

97

GPIO06/XD6/JOYBBTN0

96

GPIO07/XD7/JOYABTN0

81

GPIO10/XA12/RI2#/JOYABTN1

80

GPIO11/XA13/DTR2_BOUT2#/JOYBBTP1

79

GPIO12/XA14/CTS2#/JOYAY

78

GPIO13/XA15/SOUT2/JOYBY

77

GPIO14/XA16/RTS2#/JOYBX

76

GPIO15/XA17/SIN2/JOYAX

75

GPIO16/XA18/DSR2#/JOYBBTN0

74

GPIO17/XA19/DCD2#/JOYABTN0

86

GPIO27/XA7/PIRQB

87

GPIO26/XA6/PIRQA/XSTB2#

72

GPIO25/XCS0#/XRDY/DR1#

91

GPIO24/XA4/XSTB0#

92

GPIO23/XA3

93

GPIO22/XA2

94

GPIO21/XA1

95

GPIO20/XA0

3D3V_S0

IRSL0_3

IRRX_3

IRTX_3

69

65

68

88

VDD14VDD39VDD63VDD

70

NC

IRTX

IRRX1

IRRX2_IRSL0

SIO PC87392

SLCT/WGATE#36BUSY_WAIT#/MTR1#40ACK#/DR1#41SLIN_ASTRB#/STEP#47INIT#/DIR#

PE/WDATA#

VSS13VSS38VSS64VSS

89

37

66

67

IRSL1

PWUREQ#/IRSL3

PD0/INDEX#52PD1/TRK0#50PD2/WP#48PD3/RDATA#46PD4/DSKCHG#45PD5/MSEN044PD6/DRATE043PD7/MSEN1

49

PCIRST_BUF#_SIO

20

12

10

9

8

11

LCLK

CLKIN

LDRQ#

SERIRQ

LRESET#

42

R63

12

33R2

LPC_LFRAME#_1 LPC_LAD0_1 LPC_LAD0

LPCPD#

7

18

LAD015LAD116LAD217LAD3

LPCPD#

LFRAME#

XCS1#/MTR1#/DRATEO/XIOWR#

ERR#/HDSEL#51AFD_DSTRB#/DENSEL/DRATE153STB_WRITE#

PNF/XRDY#

54

35

SIO_PNF

EZ4_PD7 EZ4_PD6 EZ4_PD5 EZ4_PD4 EZ4_PD3 EZ4_PD2 EZ4_PD1 EZ4_PD0

R62 0R0402-PADR62 0R0402-PAD

1 2

R61 0R0402-PADR61 0R0402-PAD

1 2

SC 0308

1 2

56

55

57

60

62

RI1#

SIN1

CTS1#

DSR1#

DCD1#

GPIO37/DR1#/IRSL2/XIORD#

GPIO36/CLKRUN#

GPIO35/SMI#

GPIO34/XRD#/WDO#

GPIO33/XA11/MDTX/XIOWR#

GPIO32/XA10/MDRX/XIORD#

GPIO31/XA9/PIRQD/MTR1#

GPIO30/XA8/PIRQC

DTR1_BOUT1/BADDR

RTS1#/TEST

SOUT1/XCNF0

XWR#/XCNF1

XSTB1#/XCNF2/NC

RDATA# WDATA# WGATE#

HDSEL#

DIR# STEP# TRK0#

INDEX#

DSKCHG#

WP#

MTR0#

DR0#

DENSEL

DRATEO/IRSL2

STROB#_5 58

AUTOFD#_5 58

ERROR#_5 58

EZ4_PD[7..0] 58

PRINIT#_5 58 SLCTIN#_5 58 PRNACK#_5 58 BUSY_5 58 PE_5 58 SLCT_5 58

R106

R106 DUMMY-R2

DUMMY-R2

U16

71 6 19 5 82 83 84 85

61 58 59 4 90 73

23 27 26 22 29 28 25 32 21 24 31 30 33 34

PC87392-U

LPC_LAD1 LPC_LAD2 LPC_LAD3

XFD_INST#

3D3V_S0

12

C860

C860 SC1U10V3KX

SC1U10V3KX

LPC_RST# 13,18,34

P_SERIRQ 18,26,34 LPC_LDRQ0# 18

LPC_LFRAME# 18,34

LPC_LAD[0..3] 18,34

PM_SUS_STAT# 21,34

SIN1_5 57

CTS1#_5 57 DSR1#_5 57 DCD1#_5 57

RI1#_5 57

ENAUDIO# 33

PM_CLKRUN# 18,26,29,31,34

RTS1#_5 57 SOUT1_5 57

12

C864

C864 SC4D7U10V5ZY

SC4D7U10V5ZY

3D3V_S0

12

R104

R104 10KR2

10KR2

DY

!for test, after ok, delete R

DTR1_BOUT1_5 57

Infineon FIR Module

IR1

1

VCC2/IRED_ANODE

2

IRED_CATHODE

3

TXD

4

RXD

5

SD

6

VCC1

7

MODE

8

GND

FIR-TFDU6102

10mil 10mil 10mil

R677

1 2

10KR2

DY

40mil

IRTX_3 IRRX_3 IRSL0_3

IRMODE

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

SUPER IO NC87392

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

Bolsena

of

37 58Thursday, March 31, 2005

-1

A

B

C

D

E

Run Power

4 4

DCBATOUT

PM_RUNCTL

R412

1 2

10KR2

PM_RUNCTL_G

R411

1 2

330KR2

PM_SLP_S3#18,21,34,39,43,44,55,57

3 3

2 2

1 2

R408 1K5R3R408 1K5R3

SB 0201

1

12

C600

SC1U10V3KX

3 12

R410

R410 1KR2

1KR2

3

Q17

PDTC144EU

2

12VGATE_S041

Q18

Q18 TP0610T

TP0610T

12

R413

R413 47KR2

47KR2

DY

1

G

2 3

12

C601

D

Q19

Q19 2N7002

2N7002

S

DY

1 2

R409

330KR2

SCD22U25V5ZY

D37

RB751V-40-U

21

D19

12

MMGZ5242B

2D5V_S01D8V_S0

DY

SC 0308

C574 SCD1U

1 2

C452 SCD1UC452 SCD1U

1 2

DY

1 2

SB 0201

3D3V_S0

SB 0201

2D5V_S0

C763 SCD1U

SB 0201

C401 SCD1U

DY

1 2

U49

1

S

2

S

3

S

4 5

GD

AO4422

U37

1

S

2

S

3

S

4 5

GD

AO4422

U76

1

S

2

S

3

S

4 5

GD

AO4422

1D8V_S0

5V_S55V_S0

8

D

7

D

6

D

12

3D3V_S5

8

D

7

D

6

D

12

2D5V_S3

8

D

7

D

6

D

12

U33

1

S

2

S

3

S

4 5

GD

AO4422

C575

C575 SCD1U

SCD1U

C453

C453 SCD1U

SCD1U

C795

C795 SCD1U

SCD1U

8

D

7

D

6

D

1D8V_S5

12

C402

C402 SCD1U

SCD1U

SB 0201

1 1

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

PWR CTL LOGIC / PWR PLANE

A3

Bolsena

38 58Thursday, March 31, 2005

of

E

of

-1

A

B

C

D

E

4 5

12

C599

C599 DUMMY-C3

DUMMY-C3

5V_S5

13 12

1D25V_S3_PG#

12

C571

C571 SCD1U

SCD1U

DY

1D25V_S35V_S5

12

C572

C572 SC1U10V3KX

SC1U10V3KX

DY

5V_S5

147

1

U44B

6

TSAHCT08-U

73.07408.0JB

SB_PWRGD 21

U44C

11

TSAHCT08-U

73.07408.0JB

5V_S5

12

3

Q15

PDTC144EU

2

DY

1D2V_S0_EN

VDDA_2D5_PG

R348

R348 10KR2

10KR2

1D25V_S3_PG

DY

ALL_PWROK13

10

12

C554

C554 SC1U10V3KX

SC1U10V3KX

1D8V_S0_PG

1D2V_S0_EN 44

5V_S5

9

SB 0201

D

147

U44D

8

TSAHCT08-U

73.07408.0JB

12 13

5V_S5

U41A

VTT_VDDA_PG

PM_SLP_S3#

3D3V_S5

U51D

147

11

TSLCX08-U

Title

Size Document Number Rev

Custom

Date: Sheet

147

1 2

3

TSAHCT08-U

73.07408.0JB

NB_PWRGD 13

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

POWERGOOD&ENABLES

Bolsena

E

VCORE_EN 41

39 58Thursday, March 31, 2005

-1

of

3D3V_AUX_S5 3D3V_AUX_S5

U54A

147

NB_PWRGD NB_PWRGD_N

4 4

3 3

2 2

1 1

1 2

?U54 CHOOSE CHEAPER

SB_PWRGD IS 35MS AFTER NB_PWRGD

VTT_VDDA_PG PM_SLP_S3#

TSLCX14MTC-L-U

R370

1 2

DY

A

27KR2F

4 5

DY

VRM_PWRGD21,41

12

5V_S5

147

R441

1 2

DY

SD 0324

1D8V_PG_SET

R372

R372 10KR2

10KR2

6

73.07408.0JB

270KR2F

R443

220KR2J

5V_S5

DY

U41B

VTT_1D2V_PG

TSAHCT08-U

VRM_PWRGD

12

C609

C609 SC1U10V3ZY

SC1U10V3ZY

R369

R369 4K7R2

4K7R2

R371

R371 1MR2

1MR2

1D8V_S0

DY

1D8V_S0_PG#

12

1D8V_S0_FB

13 12

12

1 2

DY

R373

R373 0R2-0

0R2-0

5V_S5

ALL_PWROK13

12

147

3 4

1

C570

C570 SCD1U

SCD1U

11

73.07408.0JB

RUNPWROK23

TSLCX14MTC-L-U

3D3V_S5

DY

U41C

TSAHCT08-U

Reduce leakage (WHEN 3D3V_AUX_S5 ON, 3D3V_S0 OFF)

U54B

R442

1KR2

1 2

3D3V_S5

147

9

10

9

SD 0325

1 2 3 4

5V_S5

147

U48

1OUT 1IN1IN+ GND

DY

5V_S5

12

1D8V_S0_PG

3

Q16

PDTC144EU

2

VTT_VRM_PG

B

R407

R407 10KR2

10KR2

SB 0201

U51C

8

TSLCX08-U

LM393ADR

1 2

U41D

8

TSAHCT08-U

SD 0324

VCC

2OUT

2IN-

2IN+

R374

R374 47KR2

47KR2

DY

SC 0307

ALL_PWROK

8 7 6 5

1D25V_PG_SET

12

R375

R375 10KR2

10KR2

DY

PM_SLP_S3#18,21,34,38,43,44,55,57

12

R345

R345 10KR2

10KR2

12

C552

C552 SCD1U

SCD1U

DY

C

2D5V_S32D5V_S0

12

2D5V_S3_PG 2D5V_S0_PG

12

DY

5V_S5

1 2

12

DY

C553

C553 SCD1U

SCD1U

1 2

DY

ALL_PWROK 13

VRM_PWRGD

R406

1 2

R346

R346 10KR2

10KR2

C551

C551 SCD1U

SCD1U

R347

4K7R2

R376

1MR2

330R2

SB 0201

A

CPU_CORE MAX1544ETL

VID0_PWM

VID1_PWM

4 4

VID2_PWM

VID3_PWM

VID4_PWM

VID Setting

VID0(I / 3.3V)

VID1(I / 3.3V)

VID2(I / 3.3V)

VID3(I / 3.3V)

VID4(I / 3.3V)

Input Signal

VCORE_EN

EN (I / 3.3V)

Voltage Sense

COREFB

COREFB#

3 3

VSEN(I / Vcore)

RGND(I / Vcore)

Input Power

DCBATOUT

5V_S0

3D3V_S0

VCC(I)

Output Signal

VROK()

Output Power

VCC_CORE_PWR(O)

Max1999 5V/3D3V

2 2

SHUTDOWN_S5 MAX1999_PGD

SHUTDOWN_S5

DCBATOUT

PM_SLP_S3#

Input Signal

ON3

ON5

SHDN#

SKIP#

Input Power

DCBATOUT

1 1

V+

A

Output Signal

PGOOD(OD / 5V)

Output Power

5V(O)

3D3V(O)

LDO5(O)

B

MAX1544_VRM

VCC_CORE_S0(Imax=27.3A)

1D2V_S0_EN

S5PWR_ENABLE

GND

DCBATOUT_5130

DCBATOUT

5V_S5

5V_AUX_S5

5V_S0

5V_S5 (6A)

3D3V_S5 (4A)

MAX1999_LDO5 (30mA)

MAX1999_LDO3 (30mA)LDO3 (O)

B

Input Signal

PM_SLP_S5#

SS_STBY1(I / 5V)

SS_STBY2(I / 5V)

SS_STBY3(I / 5V)

STBY_LDO(I / 5V)

STBY_VREF5(I / 28V)

STBY_VREF3.3(I / 28V)

Input Power

VIN (I / 28V)

REG5V_IN(I / 5V)

5V_AUX_S5

For PGOUT

CHARGE_OFF

BT_TH

BAT+SENSE

BT_SCL_5

BT_SDA_5

FLASH_GPIO1

FLASH_GPIO2

AC_IN

AD+

C

TI TPS5130 2D5V/1D2V/1D8V

FOR

2.5V FOR

1.2V FOR

1.8V

Charger_Max8725

CLS (I / 3.3V)

THM (I / 3.3V)

BATT (I / 3.3V)

SCL (IO / 5V)

SDA (IO / 5V)

RESET#/PB5 (I/5V)

PB0/MOSI/AIN0

Input Power

DCIN (I)

C

Output Signal

PGOUT(OD / 5V)

Pull High (5V)

Output Power

2D5(O)

1D2V(O)

1D8V(O)

2D5V (9A)

1D2V (5A)

1D8V (5A)

LDO(O)

Output SignalInput Signal

LDO (O / 5.4V)

XTAL2/PB4 (O/5V)

AD_IN

CHARGE_LED#

XTAL1/PB3 (O/5V) BL2#

Output Power

VCC (O)

DCBATOUT

BT+

D

DCBATOUT

AUX_SD

2D5V_S3

5V_S5

APL5331_1D25V_VREF

5V_S0

DCBATOUT

PM_SLP_S3#

AD_OFF

AD_JK

5V_AUX_S5

(Power Team)

D

E

5V_AUX_S5

INPUT

SD

LP2951ACM

OUT

5V_AUX_S5

1D25V_S3

VIN

1D25V_S0

VCNTL

VOUT

VREF

APL5331KAC

FAN5234_VGA_Core 1D15V or 1D20V

Input Power

VCC

VIN

Input Signal

EN

Output Signal

PG

Output Power

1D15V (O) or 1D20V (O)

1D15V (5.2A) or 1D20V (9A)

Adapter

Input Signal

(I)

Input Power

VCC(I)

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

Output Signal

AD_IN

(O)

Output Power

VCC(O)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

POWER BLOCK DIAGRAM

Bolsena

E

AD+

40 58Thursday, March 31, 2005

of

-1

A

CPU_VCORE VID=1.20V Iomax=27.3A (35W) OCP=40A~45A

4 4

TABLE 1. VOLTAGE IDENTIFICATION CODES VID4 VID3 VID2 VID1 VID0 DAC 0 0 0 0 0 1.550 0 0 0 0 1 1.525 0 0 0 1 0 1.500 0 0 0 1 1 1.475 0 0 1 0 0 1.450 0 0 1 0 1 1.425 0 0 1 1 0 1.400 0 0 1 1 1 1.375 0 1 0 0 0 1.350 0 1 0 0 1 1.325 0 1 0 1 0 1.300 0 1 0 1 1 1.275 0 1 1 0 0 1.250 0 1 1 0 1 1.225 0 1 1 1 0 1.200 0 1 1 1 1 1.175 1 0 0 0 0 1.150 1 0 0 0 1 1.125

3 3

1 0 0 1 0 1.100 1 0 0 1 1 1.075 1 0 1 0 0 1.050 1 0 1 0 1 1.025 1 0 1 1 0 1.000 1 0 1 1 1 0.975 1 1 0 0 0 0.950 1 1 0 0 1 0.925 1 1 0 1 0 0.900 1 1 0 1 1 0.875 1 1 1 0 0 0.850 1 1 1 0 1 0.825 1 1 1 1 0 0.800 1 1 1 1 1 Shutdown

2 2

U28

2N7002DW

VID0_PWM

VID1_PWM

1 1

From KBC

VID4

A

VID3

VID2

1 2 3 4

U27

2N7002DW

1 2 3 4

1

2N7002

D

Q12

12

R240

R240 60K4R3F

60K4R3F

1544_AGND

TON: Frequency: GND 550KHz REF 300KHz OPEN 200KHz VCC 100KHz

6 5

G

23

S

VID0

VID3_PWM

VID1

VID2_PWM

VID4_PWM

B

DCBATOUT_MAX1544

MAX1544_V+

MAX1544_REF

12VGATE_S0 38

B

R237

R237 0R0603-PAD

0R0603-PAD

1 2

12

R238

R238 12K7R2F

12K7R2F

DY

R242

1 2

R271

1 2

0R0402-PAD

VID[4..0]6

SC 0308

121KR2F

12

C392

C392 SC100P

SC100P

1544_AGND

SC

MAX1544_ILIM

12

R241

R241 80K6R3F

80K6R3F

R243

R243 100KR2F

100KR2F

MAX1544_VCC

R225

1 2

100KR2

C

5V_S0

D42

MAX1544_BSTS

2

3

C391

SC1U25V-U

MAX1544_TIME

MAX1544_OFS MAX1544_REF

12

MAX1544_CCI VID0_PWM

VID1_PWM VID2_PWM VID3_PWM VID4_PWM MAX1544_OVP

12

C413

C413 SCD22U16V3KX-1

SCD22U16V3KX-1

1544_AGND

12

R749

R749 1KR3F

1KR3F

SB SB

C396

SC1U10V3KX

C372

12

SC2D2U10V5KX

1 2 3 7 8

14 24

23 22 21 20 19

MAX1544ETL

12

R227

1KR2F

12

1544_AGND

12

MAX1544_VCC

U29

10

TIME TON SUS OFS REF CCI

D0 D1 D2 D3 D4 OVP

16

MAX1544_OAIN-

SC SC

12

R246

R246 511R3F

511R3F

12

R750

R750 1KR3F

1KR3F

VCC

OAIN-

30

VDD

OAIN+

17

MAX1544_OAIN+

12

R245

R245 10R3

10R3

R228

R228 511R3F

511R3F

12

MAX1544_SKIP#

MAX1544_V+

36

18

V+

SKIP#

S04S1

5

12

MAX1544_BSTM

1

BAW56-1

R224

R224 100KR2

100KR2

6

38

33

DHS

CMN

SHDN#

GNDS

FB

BSTS

13

15

35

MAX1544_BSTS

MAX1544_FB

SC1000P25V

12

C393

SC470P50V

R226

R226 1KR2F

1KR2F

MAX1544_CMP

MAX1544_CSP MAX1544_FB

MAX1544_CMN MAX1544_CSN

MAX1544_VCC

37

40

39

CSP

CSN

CMP

GND

PGND31GND

11

41

1544_AGND

MAX1544_GNDS

C395

12

R248

R248 1MR2

1MR2

1544_AGND

MAX1544_CCI

R239

1 2

0R2-0

DLM DHM

LXM BSTM VROK

CCV

DLS

LXS

ILIM

12

DY

29 28

27 26 25

12 32 34 9

R247

R247 100R2F

100R2F

MAX1544_VCC

MAX1544_CCV

MAX1544_ILIM

R244

26K7R2F

SC

1544_AGND

For alone test==>short C395 pin1 and pin2

COREFB 6

12

R230

R230 0R0402-PAD

0R0402-PAD

SC 0308

VCC_CORE_S0 feedback

SC:

1. Change R246 and R228 to 511R3F(64.51105.651).

2. Change R224 to 26K7R2F(64.26725.6D1).

3. Cut off a trace between pin7 and pin8 of U29.

C

D

For Dummy Phase 2

1 2

SCD22U16V3KX-1

R223

1 2

100KR2

1 2

SCD22U16V3KX-1

12

C394

C394 SC270P50V

SC270P50V

1544_AGND

COREFB# 6

VCC_CORE_S0

(Power Team)

D

E

VCORE_EN 39

MAX1544_DHS 42

MAX1544_CMN 42 MAX1544_CMP 42

MAX1544_CSP 42 MAX1544_CSN 42

MAX1544_DLM 42 MAX1544_DHM 42

C373

3D3V_S0

MAX1544_BSTS

C424

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

MAX1544_LXM 42,56

MAX1544_BSTM

VRM_PWRGD 21,39

MAX1544_DLS 42 MAX1544_LXS 42,56

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU Vcore 1

Bolsena

of

41 58Thursday, March 31, 2005

E

-1

A

G69

1 2

G70

1 2

G71

1 2

G72

1 2

G73

12

TC25

TC25 SE100U25VM-1-U

SE100U25VM-1-U

1 2

G74

1 2

G75

1 2

4 4

DCBATOUT

12

C970

SC1U25V5ZY

B

GAP-CLOSE-PWR

SB

DCBATOUT_MAX1544

678

DDD

C969

1 2

SC1U25V5ZY

1 2

C824

1 2

C

C822

C822 SC10U35V0ZY-L

SC10U35V0ZY-L C819

C819 SC10U35V0ZY-L

SC10U35V0ZY-L

C820

C820 SC10U35V0ZY-L

SC10U35V0ZY-L

DUMMY-C3

SC 0311

D

VCC_CORE_S0

DY

12

TC5

ST330U3VDM-1-GP

SC 0310 SC 0310

TC23

TC7

ST330U3VDM-1-GP

E

DY

12

TC4

ST330U3VDM-1-GP

TC6

12

TC8

ST330U3VDM-1-GP

SB

AO4422

SC 0311

MAX1544_DHM41

3 3

MAX1544_LXM41,56 MAX1544_DLM41

AO4430

U101

AO4422 U100

U100

SSS

GD

SSS

GD

123

4 5

678

DDD

SSS

GD

SSS

GD

123

4 5

Panasonic 0.56uH, 10*10*4 DCR=1.6mohm, Imax=15A(0.56uH), 27A(0.5uH)

L33

1 2

L-D56UH-U

R619 D001R7520FR619 D001R7520F

1 2

12

VCC_CORE_S0

R229

0R0402-PAD

Place 0R0402-PAD close to the resistor

MAX1544_CMN 41 MAX1544_CMP 41

SB 0201

KEMET 330uF / 3V / 80.3371X.L02 ESR=9mohm / Iripple=3.7A

7.3/4.3/1.9, NT:9.0

2 2

MAX1544_DHS41 MAX1544_LXS41,56 MAX1544_DLS41

1 1

A

B

DCBATOUT_MAX1544

678

DDD

GD

4 5

U102

678

AO4430

GD

4 5

DDD

SC 0311

C960

1 2

SC10U35V0ZY-L

AO4422

AO4422 U99

U99

SSS

123

SSS

123

SB

Panasonic 0.56uH, 10*10*4 DCR=1.6mohm, Imax=15A(0.56uH), 27A(0.5uH)

L34

C

L34

1 2

L-D56UH-U

R752

1 2

D001R7520F

12

R282

R282 0R0402-PAD

0R0402-PAD

VCC_CORE_S0

MAX1544_CSN 41 MAX1544_CSP 41

(Power Team)

D

SB 0203

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

CPU Vcore 2

Bolsena

42 58Thursday, March 31, 2005

of

E

of

-1

A

SYSTEM DC/DC 3D3V_S5/5V_S5

G90

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G89

4 4

3D3V_DC_S5

3 3

Iomax=4.0A OCP:7A~9A

3D3V_DC_S5

12

C859

SCD1U16V

KEMET, NT=6.35 ST150U6D3VDM-9

80.15715.191 ESR=40mohm Iripple=1.7A

2 2

1 1

7.3/4.3/1.9

G89

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G87

G87

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G92

G92

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G88

G88

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G91

G91

1 2

GAP-CLOSE-PWR

12

TC16

ST150U6D3VDM-9

80.15715.191

12

R350

R350 100KR2

100KR2

MAX1999_SKIP

A

DCBATOUT_MAX1999

SB 0127

C521

12

SC100P50V2JN

U45 2N7002DWU45 2N7002DW

1 2 3 4

3D3V_S5

12

C494

C494 SC10U35V0ZY-L

SC10U35V0ZY-L

12

R329

R329 6K65R2F

6K65R2F

12

R332

R332 10K2R2F

10K2R2F

12

C495

C495 SCD1U

SCD1U

DY

L31

1 2

68.6R810.10A

Imax=6.0A, DCR=25mohm 12*12*3.9

678

DDD

SSS

123

IND-6D8UH-14

DCBATOUT_MAX1999

SSS

123

U38

U38 AO4406

AO4406

84.04406.037

GD

4 5

SB 0202

12

C862

C862 SC47P50V2JN

SC47P50V2JN

DY

MAX1999_LX3_1

12

R679

R679 2MR2

2MR2

DY

MAX1999_FB3

MAX1999_VCC

MAX1999_REF

Ton = VCC : 200KHz/300KHz Ton = GND : 400KHz/500KHz (5V/3D3V)

MAX1999_VCCMAX1999_VCC

12

R355

R355 100KR2

100KR2

MAX1999_SKIP#

6 5

PM_SLP_S3# 18,21,34,38,39,44,55,57

B

G36

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G37

G37

4D7R5

MAX1999_REF

R357

10KR2

C520

C520 SCD22U16V3ZY

SCD22U16V3ZY

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G39

G39

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G38

G38

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G40

G40

1 2

GAP-CLOSE-PWR

DCBATOUT_MAX1999_1

R680300KR2F R680300KR2F

12

C493

12

SCD1U

GAP-CLOSE-PWR

DY

R309 0R2-0

1 2

R334

1 2

S5PWR_ENABLE23,44

MAX1999_SHDN#

MAX1999_TON

1 2

12

DUMMY-R3

MAX1999_REF

MAX1999_SKIP#

R682

R682 DUMMY-R3

DUMMY-R3

MAX1999_ILIM5_3

12

C524

C523

SCD1U

MAX1999_BST3

SC1U25V5ZY

R311

1 2

MAX1999_BST3_1 MAX1999_BST5_1

28

BST3

26

DH3

27

LX3

24

DL3

22

OUT3

7

FB3

SC 0308

3

0R0402-PAD

R356

ON3

4

ON5

6

SHDN#

13

TON

8

REF

12

SKIP#

DCBATOUT DCBATOUT_MAX1999 5V_S55V_DC_S5

R336

1 2

678

U39

DDD

84.04422.037

GD

AO4422

4 5

SC 0310

MAX1999_LX356

MAX1999_DH3 MAX1999_LX3 MAX1999_DL3

5130_PGOUT44

1 2

12

B

C

MAX1999_LDO5 MAX1999_VCC

R360

1 2

10R3

3

2

D15

BAW56-1

20

V+

LDO3

25

10R3

1

PGOOD

LDO5

MAX1999EEI

18

OCP Setting

12

C526

12

SC1U25V5ZY

C

C556

1 2

SC1U10V3KX

MAX1999_BST5

12

R358

U42

BST5

DH5

OUT5

PRO#

ILIM5

ILIM3

GND

17

VCC

LX5 DL5

FB5

NC

14

16

MAX1999_LX5

15 19 21 9

10 1

MAX1999_ILIM5

11

MAX1999_ILIM3

5

MAX1999_PGD

2

23

MAX1999_LDO5MAX1999_LDO3

GAP-CLOSE-PWR

1 2

MAX1999_DH5

MAX1999_DL5

MAX1999_FB5

MAX1999_PRO#

12

R331

51K1R2F

1 2

12

30mA MAX.30mA MAX.

R335

1 2

C525

C525 SC1U25V5ZY

SC1U25V5ZY

5V_AUX_S5

0R3-U

DY

SB 0201

MAX1999_ILIM5

MAX1999_ILIM3

12

R351

R351 10KR2F-U

10KR2F-U

12

R330

R330 10KR2F-U

10KR2F-U

Adjust 3V/5V current limit

C555

C555 SCD1U

SCD1U

SC 0310

MAX1999_LX5 56

R352

100KR2

1 2

R354

SC

33KR2F

MAX1999_ILIM5_3

D

U50

AO4422

GD

4 5

GD

4 5

R310

10KR2

DY

R359

1 2

GAP-CLOSE-PWR

D

78.47522.521

678

DDD

84.04422.037

SSS

123

678

U46

DDD

AO4422

SSS

123

MAX1999_LDO5

Open Drian

MAX1999_VCC

(Power Team)

DCBATOUT_MAX1999

DY

12

C577

C577 SC4D7U25V6KX-U

SC4D7U25V6KX-U

12

C576

C576 SC10U35V0ZY-L

SC10U35V0ZY-L

Imax=6.0A, DCR=25mohm

L32

1 2

68.6R810.10A

12

C863

C863 SC47P50V2JN

SC47P50V2JN

DY

MAX1999_LX5_1

12

R681

R681 2MR2

2MR2

DY

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

12*12*3.9

IND-6D8UH-14

MAX1999_FB5

E

12

C557

C557 SCD1U

SCD1U

SB 0127SB 0127

12

C899

SCD1U16V

12

R333

15KR2F

12

Max1999 / 3D3V / 5V

SC 0308SC 0308

C522

12

SC100P50V2JN

R353

R353 9K76R2F

9K76R2F

12

R678

100KR2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bolsena

E

G98

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G101

G101

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G104

G104

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G103

G103

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G102

G102

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G100

G100

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G99

G99

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G93

G93

1 2

GAP-CLOSE-PWR

Iomax=5A OCP:8A~10A

5V_DC_S5

12

TC28

80.22715.191

ST220U6D3VDM-4

KEMET, NT:8.22 ESR=25mohm Iripple=2.2A

7.3/4.3/1.9

MAX1999_SHDN#

12

C861

C861 SCD1U

SCD1U

43 58Thursday, March 31, 2005

of

-1

5

For 1.8V SETTING=1.8275V

R662

1 2

10KR2F-U

12

R652

R652 2KR2F

10KR2F-U

2KR2F

12

C383

C383 SC3900P50V3KX

SC3900P50V3KX

12

R231

R231 2KR2F

2KR2F

D D

For 2.5V SETTING=2.516V

R649

1 2

5130_INV3 5130_FB3

R232

1 2

R236

1 2

680R3F

R663

1 2

11K5R2F

close to IC

1 2

330R2

R655

1 2

19K6R3F

78.56224.2B1

close to IC

12

5130_INV1

C376

C376 SC3900P50V3KX

SC3900P50V3KX

5130_FB1

1D8V_PWR

C360

C360 SC5600P50V3KX

SC5600P50V3KX

2D5V_PWR

C374

C374 SC5600P50V3KX

SC5600P50V3KX

PWM_SEL

C C

C377

3D3V_AUX_S5

U54E

TSLCX14MTC-L-U

PM_SLP_S5#21,34,57

3D3V_AUX_S5

B B

1D2V_S0_EN39

5V_AUX_S5

R664

1 2

100KR2

147

11 10

147

9 8

TPS5130_1D8V_EN#

U54D

TSLCX14MTC-L-U

T(soft)=1.736ms

PM_SLP_S5

5130_SS_STBY2

12

C379

SC4700P50V3KX

1D2V_S0_EN#

U89 2N7002DW

3 4 2 1

84.27002.03F

U88 2N7002DWU88 2N7002DW

5 6

R656

R656 100KR2

100KR2

5 6

5130_SS_STBY3

C377

5130_SS_STBY1

34

1D2V_S0_EN#

2 1

S5PWR_ENABLE 23,43

12

C384

SC1500P50V3KX

A A

R659

PM_SLP_S3#18,21,34,38,39,43,55,57

1 2

0R2-0

DY

5130_STBY_LDO

12

R661

R661 0R0402-PAD

0R0402-PAD

SC 0308

4

TI TPS5130 for 2.5V, 1.2V, 1.8V

Vo=(R1*0.85)/R2+0.85

(2D5V=>CH1 , 1D2V=>CH2 , 1D8V =>CH3)

For 1.2V SETTING=1.2172V

R233

1 2

10KR2F-U

12

C378

SC3300P50V3KX

Condition Voltage

H : Auto PWM/SKIP 2.2V(Min)~

*

L : PWM fixed (300KHz) ~0.3V(Max)

1 2

SC1500P50V3KX

1 2

DCBATOUT_5130

SB 0201

5130_3D3V_LDO

R658

DUMMY-R2

12

R657

R657 100KR2

100KR2

R235

1 2

R234

R234 2KR2F

2KR2F

5130_INV2 5130_FB2

5130_FLT

C375

C375 SCD01U16V2KX

SCD01U16V2KX

100KR2

12

5130_PGOUT43

R654

close to IC

5130_FB1 5130_SS_STBY1 5130_INV2 5130_FB2 5130_SS_STBY2 5130_PWMSELPM_SLP_S3# 5130_CT

5130_REF STBY_REF

5130_STBY_LDO

5130_CT

C380

C380 SC47P50V2JN

SC47P50V2JN

78.47034.1F1

680R3F

1 2

5130_REF

12

C381

SC1U10V3ZY

1 2

R653

R653 4K32R2F

4K32R2F

1 2 3 4 5 6 7 8

9 10 11 12

5130_SS_STBY3 5130_FB3 5130_INV3

5V_S0

1D2V_PWR

C840

C840 SC4700P50V3KX

SC4700P50V3KX

5130_FLT 5130_INV1

FB1 SS_STBY1 INV2 FB2 SS_STBY2 PWM_SEL CT GND REF STBY_VREF5 STBY_VREF3.3 STBY_LDO

12

R660

R660 10KR2

10KR2

DY

SB 0201

3

5130_5V_LDO

1

2

D12

83.00054.L03

3

BAT54-1

5130_LH1

1 2

44

45

LL1

LH1

OUT1_D43OUT2_D

OUT1_U

OUTGND142OUTGND2

40

TRIP141TRIP2

VIN_SENSE12

47

46

48

FLT

INV1

TPS5130

FB3

INV3

LH3

TRIP3

VIN_SENSE3

PGOUT16PG_DELAY

18

19

17

5130_PG_DELAY

12

C382

C382 SC2200P50V2KX

SC2200P50V2KX

OUT3_U

20

21

5130_LH3

5130_TRIP3

SB 0201

SS_STBY3

13

14

15

5130_LL1

C353

C353 SCD1U50V3KX

SCD1U50V3KX

5130_OUT1U 5130_OUT1D

5130_TRIP1 5130_TRIP2

5130_OUT2D

38

39

37

REG5V_IN

LDO_CUR

LDO_GATE

LDO_OUT

LL3

OUT3_D

OUTGND3

22

23

24

5130_OUT3D 5130_LL3 5130_OUT3U

1 2

D13

3

83.00054.L03

BAT54-1

DY

SC 0310

DCBATOUT_5130

36

LL2

35

OUT2_U

34

LH2

33

VIN

32

VREF3.3

31

VREF5

30 29

LDO_IN

28 27 26 25

INV_LDO

C358

C358 SCD1U50V3KX

SCD1U50V3KX

5130_5V_LDO

1 2

DCBATOUT_5130

5130_5V_LDO

5130_LL1 45,56

5130_OUT1U 45 5130_OUT1D 45

5130_OUT2D 45

U26

5130_REGIN

LDO SETTING

TPS5130PT-U

5130_OUT3D 45 5130_OUT3U 45 5130_LL3 45,56

1

2

D11

83.00054.L03

BAT54-1

3

5130_LH2

5130_OUT2U

5130_3D3V_LDO

SC 0310

2

C354

1 2

SCD1U50V3KX

close to IC

R651

1 2

0R0805-PAD

SC 0308

2D5V_OCP

SC

5130_TRIP1

1 2

close to IC

1D2V_OCP

SC

5130_TRIP2

1 2

close to IC

1D8V_OCP

1 2

SC

5130_TRIP3

close to IC

5130_LL2

DCBATOUT_5130

5130_OUT2U 45

5V_AUX_S5

PWM_SEL

(Power Team)

1

DCBATOUT_5130DCBATOUT

G76

R221

R221 18KR2F

18KR2F C352

C352

1 2

R220

R220 11K3R2F

11K3R2F C351

C351

1 2

R222

R222 12K1R2F

12K1R2F C359

C359

1 2

5130_LL2 45,56

1 2

5V_S5

1 2

DCBATOUT_5130

OCP

SCD1U

12A=>R225=18K 18A=>R225=28K

DCBATOUT_5130

OCP

SCD1U

8.4A=>R226=13K 10A=>R226=22K

DCBATOUT_5130

OCP

SCD1U

8.4A=>R229=12.65K 10A=>R229=22K

SC 0310

5130_5V_LDO

C355

C355 SCD1U50V3KX

SCD1U50V3KX

R650

R650 0R3-U

0R3-U

SB 0201

12

C357

C357 SC4D7U10V5ZY

SC4D7U10V5ZY

78.47593.411

5130_3D3V_LDO

12

Condition Voltage

H : Auto PWM/SKIP 2.2V(Min)~

*

L : PWM fixed (300KHz) ~0.3V(Max)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS5130 1D2V/1D8V2D5V/ (1/2)

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

Bolsena -1

1 2

C356

C356 SC4D7U10V5ZY

SC4D7U10V5ZY

78.47593.411

44 58Thursday, March 31, 2005

G76

GAP-CLOSE-PWR

GAP-CLOSE-PWR G82

G82

GAP-CLOSE-PWR

GAP-CLOSE-PWR G78

G78

GAP-CLOSE-PWR

GAP-CLOSE-PWR G81

G81

GAP-CLOSE-PWR

GAP-CLOSE-PWR G80

G80

GAP-CLOSE-PWR

GAP-CLOSE-PWR G77

G77

GAP-CLOSE-PWR

GAP-CLOSE-PWR G84

G84

GAP-CLOSE-PWR

GAP-CLOSE-PWR G83

G83

GAP-CLOSE-PWR

G79

1 2

GAP-CLOSE

ZZ.CON2C.XX1

G113

1 2

GAP-CLOSE

ZZ.CON2C.XX1

G114

1 2

GAP-CLOSE

ZZ.CON2C.XX1

SC 0310

of

5

4

3

2

1

TI TPS5130 for 2D5V, 1D2V, 1D8V

(2D5V=>CH1 , 1D2V=>CH2 , 1D8V =>CH3)

DCBATOUT_5130

D D

5130_OUT1U44 5130_LL144,56

5130_OUT1D44

5130_OUT1U 5130_LL1

SC 0310

5130_OUT1D

DDD

U91

AO4422

GD

4 5

DDD

U86

AO4422

GD

4 5

678

Imax=9.3A

SSS

Rdson=19.6~24mohm

123

678

SSS

123

12

C839

C839 SCD1U

SCD1U

L28

1 2

IND-4D7UH-16-GP

68.4R71B.101

SC 0310

12

TC12

TC12 ST220U4VDM-10

ST220U4VDM-10

SC 0310

C C

12

C837

678

DDD

U84

AO4422

Imax=9.3A

SSS

GD

SSS

GD

Rdson=19.6~24mohm

123

4 5

5130_OUT2U44 5130_LL244,56

B B

5130_OUT2D44

5130_OUT3U44 5130_LL344,56

A A

5130_OUT3D44

5130_OUT2U

5130_LL2

AO4422

5130_OUT2D

AO4422

5130_OUT3U

5130_LL3

AO4422

5130_OUT3D

678

DDD

U87

SSS

GD

SSS

GD

123

4 5

678

DDD

U92

SSS

GD

SSS

GD

123

4 5

678

DDD

U93

SSS

GD

SSS

GD

123

4 5

Imax=9.3A Rdson=19.6~24mohm

C837 SCD1U

SCD1U

L27

1 2

IND-3D3UH-35

Imax=6A DCR=30mOhm 7*7*3.0

12

C847

C847 SCD1U

SCD1U

L29

1 2

IND-4D7UH-16-GP

Imax=5.5A DCR=40mOhm 7*7*3.0

12

SC10U35V0ZY-L

2D5V_PWR

12

DCBATOUT_5130

12

1D2V_PWR

12

DCBATOUT_5130

12

1D8V_PWR

12

C841

SB 0127

2D5V Iomax=9A OCP>18A

TC13

TC13 ST330U6D3VDM-7

ST330U6D3VDM-7

KEMET, NTD:10.5 (Q1) ESR=25mohm Iripple=2.2A

7.3*4.3*1.9

C838

C838 SC10U35V0ZY-L

SC10U35V0ZY-L

DY

SB 0127

SC 0310

1D2V Iomax=5A OCP>10A

TC11

TC11 ST220U4VDM-10

ST220U4VDM-10

C848

C848 SC10U35V0ZY-L

SC10U35V0ZY-L

SB 0127

1D8V Iomax=5A OCP>10A

TC14

TC14 ST220U4VDM-13

ST220U4VDM-13

KEMET, NTD:7.8 (Q1) ESR=25mohm Iripple=2.2A

7.3*4.3*1.9

2D5V_PWR 2D5V_S3

1D2V_PWR 1D2V_S0

G21

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G27

G27

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G28

G28

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G22

G22

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G26

G26

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G25

G25

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G23

G23

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G24

G24

1 2

GAP-CLOSE-PWR

G20

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G19

G19

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G16

G16

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G17

G17

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G18

G18

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G14

G14

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G15

G15

1 2

GAP-CLOSE-PWR

G35

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G34

G34

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G33

G33

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G32

G32

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G31

G31

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G30

G30

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G29

G29

1 2

GAP-CLOSE-PWR

1D8V_S51D8V_PWR

(Power Team)

1D2V_VGA_S01D2V_S0

G66

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G65

G65

1 2

GAP-CLOSE-PWR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS5130 1D2V/1D8V2D5V/ (2/2)

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

Bolsena

of

45 58Thursday, March 31, 2005

-1

A

B

C

D

E

SC22P50V2JN-1

SC1U10V3KX

3D3V_G913_S5

Rx

12

R761

18KR2F

Output = 3.5V output=1.25(1+(Rx/Ry))

12

R762

10KR2F-U

Ry

3D3V_G913_S5

D54

CH521S-30

3D3V_AUX_S5

21

CH521S-30

D55

2 1

RSMRST#_KBC21,34

C155

C155 SCD1U

SCD1U

3D3V_AUX_S5

Ra change from 169K to 182K for output = 3.4827V output=1.235(1+(Ra/Rb))

1 2

R135 182KR2FR135 182KR2F

Ra

1 2

U19

12

C154

SC1U10V3ZY

U19

1

OUT

2

SENSE

3

SD

4

GND

LP2951ACM

C156

C156 SC330P50V2KX

SC330P50V2KX

100mA

LP2951ACM_FB3D3V_AUX_LP2951_S5

INPUT

5V/TAP

ERROR

8 7

FB

6

12

5

Rb

R136

100KR2F

12

C157

DUMMY-C5

DCBATOUT

12

DY

C158

C158 SC1U50V5ZY

SC1U50V5ZY

78.10594.411

3D3V_G913_S5

C965

4 4

5V_S5

C966

SC1U10V3KX

12

3 3

1 2 3

U103

SHDN# GND IN

G913C-U

SET

OUT

5 4

C965

3D3V_G913_SET

C967

12

SD 0303

2D5V_S3

GAP-CLOSE-PWR

G95

12

C898

C898 SC22U10V6ZY-L

SC22U10V6ZY-L

G95

1 2

G97

1 2

G96

1 2

G94

1 2

GAP-CLOSE-PWR

1D25V_S31D25V_LDO

GAP-CLOSE-PWR

SB 0127

Trace Length=1cm (500mils) Trace Width=8mils Trace Resistance>25mohm

12

C896

C896 SC10U10V5ZY

SC10U10V5ZY

78.10693.411

2 2

12

C895

C895 SC10U10V5ZY

SC10U10V5ZY

78.10693.411

78.10693.411 DY

DY

2D5V_S3

12

R683

R683 1KR2F

1KR2F

APL5331_1D25V_VREF

12

R684

R684 1KR2F

1KR2F

5V_S5

12

C902

C902 SCD1U

SCD1U

U96

VIN1VOUT

3

VREF

12

C897

C897 SCD1U

SCD1U

VCNTL6NC

2

GND

9

GND

APL5331KAC-TR

SO-8-P

1D25V_S3 Iomax=1.5A

Vo(cal.)=1.250V

4 8

7

NC

5

NC

12

TC27

SE100U10VM

DY

79.10711.4C1

KEMET 100uF / 4V / B2 Size / NTD:5.615 Iripple=1.1A / ESR=70mohm

SB 0127

1 1

(Power Team)

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

1D2V_S3 / 3D3V_AUX

A3

Bolsena

E

of

46 58Thursday, March 31, 2005

-1

AC_IN Threshold 2.089V Max. AC_IN > 2.089V --> AC DETECT

ACOK is 17.8V

3D3V_S5

12

R269

R269 100KR2

100KR2

CHG_ON#34

From KBC

Pre charge=2.967A

AD_IA34

1

G

PRE_CHG34

1 2

AC_IN#34

D

2N7002

2N7002 Q13

Q13

S

2 3

SB 0202

1

G

G85

GAP-CLOSE-PWR

10KR2F-U

TSLCX14MTC-L-U

AD+

MAX1909_REF

12

R270

R270 2K8R3F-L

2K8R3F-L

D

2N7002

2N7002 Q14

Q14

S

2 3

SB 0202

R666

12

3D3V_AUX_S5

AD+

12

R513

R513 100KR2F

100KR2F

MAX1909_ACIN

12

R514

R514 13K3R2F

13K3R2F

D46

21

CH521S-30

12

C433

C433 SCD1U

SCD1U

MAX1909_LDO

12

R668

R668 49K9R2F

49K9R2F

Icharge=2.967A

12

R667

R667 51K1R2F

51K1R2F

12

4S1P_I34

CELL is 4 Cell

From Battery Connector

12

C842

C842 SCD1U16V3KX

SCD1U16V3KX

MAX1909_ACOKMAX1909_ACOKMAX1909_ACOKMAX1909_ACOK

12

C853

C853 SC1U10V3KX

SC1U10V3KX

12

MAX1909_LDO

12

U54C

147

56

D

8

D

7

D

6

12

R268

R268 100KR2

100KR2

R757

R757 33KR2F

33KR2F

1

G

2 3

R670

R670 10KR2

10KR2

C844

C844 SCD1U16V3KX

SCD1U16V3KX

12

R288

R288 10KR2

10KR2

12

R665

R665 15KR2F

15KR2F

U62

AO4407

12

D

2N7002

2N7002 Q34

Q34

S

SB 0213

12

C843

C843 SCD01U50V3KX

SCD01U50V3KX

S

S S

S GD

GD

R669

R669 100KR2

100KR2

12

1 2 3 45

Close to MAX1909 pin 24

MAX1909_PDS AD+_TO_SYS MAX1909_DC_IN

MAX1909_VCTL MAX1909_ICTL MAX1909_MODE

MAX1909_IINP

MAX1909_CLS

MAX1909_ACOK

PKPRES#

MAX1909_CCV MAX1909_CCI

MAX1909_CCS

C845

C845 SCD01U50V3KX

SCD01U50V3KX

12

C854

SC1U10V3KX

AD+_TO_SYS

C687

C687 SC1U50V5ZY

SC1U50V5ZY

12

C856

C856 SCD1U

SCD1U

U94

27

PDS

24

SRC

1

DCIN

11

VCTL

10

ICTL

7

MODE

3

ACIN

8

IINP

9

CLS

6

ACOK

5

PKPRES

13

CCV

12

CCI

14

CCS

MAX8725ETI

Rx

D01R2512F-1-GP

R518

1 2

For EMI

G52

GAP-CLOSE-PWR

1 2

26

MAX1909_REF

12

Rx

G51

GAP-CLOSE-PWR

1 2

25

CSSN

DLOV

PGND PGND

BATT

DHIV

PDL

LDO

DLO

CSIP

CSIN

GND

DHI

AD+_TO_SYS

12

MAX1909_DHIV

22 28 2

MAX1909_DLOV

21

MAX1909_DHI

23

MAX1909_DLO

20

19 29 18

17 16 15

C857

C857 SCD1U

SCD1U

CSSP

12

C855

C855 SCD1U

SCD1U

REF

4

V_REF :4.2235V (<500uA)

12

R674

R674 49K9R2F

49K9R2F

MAX1909_CLS

12

R673

R673 63K4R3F

63K4R3F

90W ADAPTER

64.63425.651

ISOURCE_MAX = (0.075/Rx)*(VCLS/VREF) TOTAL_POWER : Adapter=65W,Total_Power=58.5W

DCBATOUT

12

C430

C430 SCD1U

SCD1U

SC 0308

MAX1909_LDO

Near MAX1909 Pin 2

C434

1 2

SC1U10V3KX

12

R675

R675 33R2

33R2

Near MAX1909 Pin 21

12

C858

C858 SC1U10V3KX

SC1U10V3KX

SI4800BDY

84.04800.B37

G86

1 2

GAP-CLOSE-PWR

BAT+SENSE 48

From Battery Connector

SC 0302

MAX1909_PDL

R283 DUMMY-R3R283 DUMMY-R3

1 2

45

DDD

678

U30

DDD

GD

4 5

12

R285

R285 DUMMY-R3

DUMMY-R3

123

SSGD

S

SSGD

S

U34

U34 SI4431BDY

SI4431BDY

84.04431.C37

SC 0310

CHG_PWR-2

SC 0310

SSS

123

G115 GAP-CLOSEG115 GAP-CLOSE

1 2

G116 GAP-CLOSEG116 GAP-CLOSE

1 2

SC 0310

D14

B220LFA

2 1

DY

1 2 3 4 5

12

C425

C425 SCD1U

SCD1U

CHG_PWR-2 56

L30

1 2

IND-15UH-30

DY

U35

S

D

S

D

AO4407

AO4407 U36

U36

AO4407

12

CHG_PWR-3

BAT_THERMAL34,48

8

D

7

D

6

D

8

D

7

D

6

C427

C427 SC10U25V6KX

SC10U25V6KX

1 2

G41

1 2

DCBATOUT

GAP-CLOSE-PWR

S

S S

S GD

GD

S

S S

S GD

GD

(Power Team)

BT+

12

DY

C429

C429 SCD1U

SCD1U

12

C426

C426 SC10U25V6KX

SC10U25V6KX

CHG_PWR-3 56

SC 0310

R284

D015R2512F-1

DY

12

G42

1 2

R286

0R0402-PAD

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

C428

SC10U25V6KX

GAP-CLOSE-PWR

MAX1909_LDO

12

CHARGER MAX8725

Bolsena

BT+

12

SB 0127

R289

R289 68KR2F

68KR2F

PKPRES#

R287

R287 100KR2

100KR2

12

C431

C432

SC10U25V0KX

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

47 58Thursday, March 31, 2005

of

-1

A

DOCK_AD+ AD_JK_1

G48 GAP-CLOSE-PWRG48 GAP-CLOSE-PWR

1 2

G47 GAP-CLOSE-PWRG47 GAP-CLOSE-PWR

4 4

3 3

2 2

1 2

G50 GAP-CLOSE-PWRG50 GAP-CLOSE-PWR

1 2

G49 GAP-CLOSE-PWRG49 GAP-CLOSE-PWR

1 2

DC1

DC-JACK75-U

22.10037.701

ME : 22.10037.701

4

1

2

3 5

6 MH1

B

Adaptor in to generate DCBATOUT

R8 0R5J-1R8 0R5J-1

1 2

R729 0R5J-1R729 0R5J-1

1 2

R730 0R5J-1R730 0R5J-1

1 2

Dummy when 'USE EZ4'

D29

AD_JK

R9 1KR2R91KR2

12

C662

SCD1U50V3ZY

2222K

2

12

C661

SCD1U50V3ZY

AD_OFF34

12

2

1

SBM1040CT-13

Dummy when no EZ4

31

Q1

Q1 DTC124EUA-U1

DTC124EUA-U1

K

BATTERY CONNECTOR

BT+

Put close to battery connector

C

SB 0127

3

AD_JK_1

S

AD+_2

R503

R503 56KR3F

56KR3F

12

C850

1

D45

DY

BAV99-2

1 2 3 4 5

3

S

S S

S GD

GD

83.00099.L01

3

12

R502

12

100KR2

C7

R672

C7 SCD1U50V3ZY

SCD1U50V3ZY

0R0402-PAD

12

DY

2

E

Q2

Q2 PDTA124EU

C

3

PDTA124EU

1 2

B

1

BAT_SCL_534 BAT_SDA_534

BAT_THERMAL34,47

BAT+SENSE47

D

D31

2 1

PZM24NB1

DY

U63

D

8

D

7

D

6

AO4407

ID = -10A/70deg Rds(ON) = 24mohm SO-8

5V_AUX_S5

R676

1 2

12

C851

1

D44

DY

BAV99-2

27R3F

12

C852

3

2

83.00099.L01

R671

1 2

12

C849

27R3F

EC12

AD+

12

BTSMCLK BTSMDATA

12

C670

C670 SCD1U

SCD1U

12

EC11

E

CHANGE TO 20.80605.007

BAT1

SYN-CON7-9

SD 0324

1 2

3 4 5 6 7

20.80269.007

ME : 20.80269.007

SC10P50V2JN-1

SCD1U50V3ZY

SC1000P50V2KX

SC10P50V2JN-1

SD 0324

SC10P50V2JN-1

DCBATOUT

DY

C403

SCD1U10V2MX-1

VCC

DY

SB

HTH

12

R267

R267 1MR2

1MR2

DY

12

DY

R266

R266 15KR2F

15KR2F

DY

12

R265

R265 110KR2F

110KR2F

B

U31

HTH

1

HTH

2

GND LTH3RESET#/RESET

G680LT1

Output type: Open-Drain RESET#

Low3 Circuit :

L3# at 11.25V

1 1

A

MAX1999_LDO5

12

12.78V (High) Turn On

11.25V (Low)

5 4

LOW3_OFF 23

C

Turn Off

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

AD/BATT CONN

A3

Bolsena

48 58Thursday, March 31, 2005

of

E

of

-1

5

Dummy when use UMA (WHOLE PAGE)

PEG_TXP[15..0]12

PEG_TXN[15..0]12 PEG_RXP[15..0]12 PEG_RXN[15..0]12

U14

12

U14

1

XIN/CLKIN

2

XOUT

3

PD#

4

LF

P2779A-08ST

71.02779.00A

C53

C53 SC270P50V

SC270P50V

ORIGNAL P2779A-08TT USE W180-01 GEOMETRY

VDD REF

MODOUT

VSS

8 7 6 5

XTALIN_M24

12

X1

R55

R55 1MR2

1MR2

12

C83

12

X1

X-27MHZ-7-U

1 2

SC27P50V2JN

SC27P50V2JN C54

C54 SCD01U16V2KX

SCD01U16V2KX

P2779A_XO

R53

620R2F

12

C58

D D

SC27P50V2JN

adjust SWING at 1.2v

PEG_TXP0

PEG_TXN0

PEG_TXP1

PEG_TXN1

PEG_TXP2

PEG_TXN2

PEG_TXP3

C C

3D3V_S0

12

R118

R118 10KR2

B B

A A

10KR2

STERE0SYNC PWRGD_MASK

12

R119

R119 DUMMY-R2

DUMMY-R2

DIS_LUMA57 DIS_CRMA57 DIS_COMP57

12

R123

R123 DUMMY-R2

DUMMY-R2

R121

R121 0R0402-PAD

0R0402-PAD

1 2

The PERSTB must deplay 4ms from M24 bug.

R541150R2F R541150R2F

R542150R2F R542150R2F

R551150R2F R551150R2F

12

VGA_SMB_CLK54 VGA_SMB_DAT54

EDID_CLK13,17

EDID_DAT13,17

5

PEG_TXN3

PEG_TXP4

PEG_TXN4

PEG_TXP5

PEG_TXN5

PEG_TXP6

PEG_TXN6

PEG_TXP7

PEG_TXN7

PEG_TXP8

PEG_TXN8

PEG_TXP9

PEG_TXN9

PEG_TXP10

PEG_TXN10

PEG_TXP11

PEG_TXN11

PEG_TXP12

PEG_TXN12

PEG_TXP13

PEG_TXN13

PEG_TXP14

PEG_TXN14

PEG_TXP15

PEG_TXN15

SC 0308

RN23 SRN0-2-URN23 SRN0-2-U

3 4

SB 0127

1D2V_VGA_S0

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

3D3V_S0

VGA_SMB_DAT

2 1

3D3V_SS_S0 P2779A_REF VGA_GPIO16

SCD1U16V

C195

C195 C193C193 C194C194 C192C192 C190C190 C188C188 C191C191 C189C189 C187C187 C185C185 C183C183 C181C181 C186C186 C184C184 C182C182 C180C180 C178C178 C176C176 C179C179 C177C177 C175C175 C173C173 C171C171 C169C169 C174C174 C172C172 C170C170 C168C168 C166C166 C164C164 C167C167 C165C165

R97 150R2FR97 150R2F

1 2

R144 100R2FR144 100R2F

1 2

R110 10KR2F-UR110 10KR2F-U

1 2

R111 10KR2R111 10KR2

1 2

R101 715R3FR101 715R3F

1 2

VGA_SMB_CLK

R553 10KR2R553 10KR2

1 2

R120 10KR2R120 10KR2

1 2

R122 1KR2R122 1KR2

1 2

R77 1KR2R77 1KR2

1 2

R69 1KR2R69 1KR2

1 2

4

3D3V_S0

12

R86

R86 180R2F

180R2F

12

PEG_TXP0_VGA PEG_TXP1_VGA PEG_TXP2_VGA PEG_TXP3_VGA PEG_TXP4_VGA PEG_TXP5_VGA PEG_TXP6_VGA PEG_TXP7_VGA PEG_TXP8_VGA PEG_TXP9_VGA PEG_TXP10_VGA PEG_TXP11_VGA PEG_TXP12_VGA PEG_TXP13_VGA PEG_TXP14_VGA PEG_TXP15_VGA

RN22

3

TP75TP75

TP18TP18

4

R534

0R0805-PAD

1 2

SC 0308

12

C698

C698 SCD1U

SCD1U

R85

R85 105R3F

105R3F

GFX_CLK3 GFX_CLK#3

AG_RST#13

SRN10KJ

14 2

PEG_RXP0

PEG_RXN0

PEG_RXP1

PEG_RXN1

PEG_RXP2

PEG_RXN2

PEG_RXP3

PEG_RXN3

PEG_RXP4

PEG_RXN4

PEG_RXP5

PEG_RXN5

PEG_RXP6

PEG_RXN6

PEG_RXP7

PEG_RXN7

PEG_RXP8

PEG_RXN8

PEG_RXP9

PEG_RXN9

PEG_RXP10

PEG_RXN10

PEG_RXP11

PEG_RXN11

PEG_RXP12

PEG_RXN12

PEG_RXP13

PEG_RXN13

PEG_RXP14

PEG_RXN14

PEG_RXP15

PEG_RXN15

PEG_TXN0_VGA PEG_TXN1_VGA PEG_TXN2_VGA PEG_TXN3_VGA PEG_TXN4_VGA PEG_TXN5_VGA PEG_TXN6_VGA PEG_TXN7_VGA PEG_TXN8_VGA

PEG_TXN9_VGA PEG_TXN10_VGA PEG_TXN11_VGA PEG_TXN12_VGA PEG_TXN13_VGA PEG_TXN14_VGA PEG_TXN15_VGA

PCIE_CALP_VGA PCIE_CALN_VGA PCIE_CALI_VGA

PCIE_TESTIN

PWRGD_MASK

VGA_SSIN VGA_SSOUT

XTALIN_M24

TESTEN

STERE0SYNC

U70A

AH30

PCIE_RX0P

AG30

PCIE_RX0N

AG29

PCIE_RX1P

AF29

PCIE_RX1N

AE29

PCIE_RX2P

AE30

PCIE_RX2N

AD30

PCIE_RX3P

AD29

PCIE_RX3N

AC29

PCIE_RX4P

AB29

PCIE_RX4N

AB30

PCIE_RX5P

AA30

PCIE_RX5N

AA29

PCIE_RX6P

Y29

PCIE_RX6N

W29

PCIE_RX7P

W30

PCIE_RX7N

V30

PCIE_RX8P

V29

PCIE_RX8N

U29

PCIE_RX9P

T29

PCIE_RX9N

T30

PCIE_RX10P

R30

PCIE_RX10N

R29

PCIE_RX11P

P29

PCIE_RX11N

N29

PCIE_RX12P

N30

PCIE_RX12N

M30

PCIE_RX13P

M29

PCIE_RX13N

L29

PCIE_RX14P

K29

PCIE_RX14N

K30

PCIE_RX15P

J30

PCIE_RX15N

AF26

PCIE_TX0P

AE26

PCIE_TX0N

AC25

PCIE_TX1P

AB25

PCIE_TX1N

AC27

PCIE_TX2P

AB27

PCIE_TX2N

AC26

PCIE_TX3P

AB26

PCIE_TX3N

Y25

PCIE_TX4P

W25

PCIE_TX4N

Y27

PCIE_TX5P

W27

PCIE_TX5N

Y26

PCIE_TX6P

W26

PCIE_TX6N

U25

PCIE_TX7P

T25

PCIE_TX7N

U27

PCIE_TX8P

T27

PCIE_TX8N

U26

PCIE_TX9P

T26

PCIE_TX9N

P25

PCIE_TX10P

N25

PCIE_TX10N

P27

PCIE_TX11P

N27

PCIE_TX11N

P26

PCIE_TX12P

N26

PCIE_TX12N

L25

PCIE_TX13P

K25

PCIE_TX13N

L27

PCIE_TX14P

K27

PCIE_TX14N

L26

PCIE_TX15P

K26

PCIE_TX15N

AF27

PCIE_REFCLKP

AE27

PCIE_REFCLKN

AC23

PCIE_CALRP

AB24

PCIE_CALRN

AB23

PCIE_CALI

AE25

PCIE_TESTIN

AD25

PERSTb

AD24

PERSTb_MASK

AH21

R2SET

AK21

Y_G

AJ22

C_R_PR

AK22

COMP_B_PB

AJ24

H2SYNC

AK24

V2SYNC

AG22

DDC3CLK

AG23

DDC3DATA

AJ23

SSIN

AH24

SSOUT

AH28

XTALIN

AJ29

XTALOUT

AH27

TESTEN

E8

TEST_YCLK

B6

TEST_MCLK

AF25

PLLTEST

AH25

STEREOSYNC

M26-P-1

(M24)71.00M24.C0U - (M26)71.0M26P.00U

3

PCI EXPRESS

DAC2

SS

CLK

3

Part 1 of 6

GPIO_PWRCNTL

GPIO_MEMSSIN

DVOMODE

DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8

DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13

DVO / EXT TMDS / GPIOTMDSDAC1

DVPDATA_14 DPVDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2

DVPCNTL_3

TXOUT_L0N

TXOUT_L0P

TXOUT_L1N

TXOUT_L1P

TXOUT_L2N

TXOUT_L2P

TXOUT_L3N

TXOUT_L3P

TXCLK_LN TXCLK_LP

TXOUT_U0N

TXOUT_U0P

TXOUT_U1N

TXOUT_U1P

LVDS

TXOUT_U2N

TXOUT_U2P

TXOUT_U3N

TXOUT_U3P

TXCLK_UN TXCLK_UP

DDC2CLK

DDC2DATA

DDC1DATA

DDC1CLK

GPIO_AUXWIN

THERM

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14

VREFG

DIGON

BLON TX0M

TX0P

TX1M

TX1P

TX2M

TX2P

TXCM

TXCP

HPD1

HSYNC VSYNC

RSET

DPLUS

DMINUS

R G

B

VGA_GPIO0

AJ5

VGA_GPIO1

AH5

VGA_GPIO2

AJ4

VGA_GPIO3

AK4

VGA_GPIO4

AH4

VGA_GPIO5

AF4

VGA_GPIO6

AJ3

VGA_GPIO7

AK3

VGA_GPIO8

AH3

VGA_GPIO9

AJ2

VGA_GPIO10P2779A_XI

AH2

VGA_GPIO11

AH1

VGA_GPIO12

AG3

VGA_GPIO13

AG1

VGA_ALERT#

AG2 AF3 AF2

AE10 AH6

AJ6 AK6 AH7 AK7 AJ7 AH8 AJ8 AH9 AJ9 AK9 AH10 AE6 AG6 AF6 AE7 AF7 AE8 AG8 AF8 AE9 AF9 AG10 AF10

AJ10 AK10 AJ11 AH11

AG4

AH15 AH16 AJ16 AJ17 AJ18 AK18 AJ20 AJ21 AK19 AJ19 AG16 AG17 AF16 AF17 AE18 AE19 AF19 AF20 AG19 AG20

AE12 AG12

AK13 AJ13 AJ14 AJ15 AK15 AK16 AJ12 AK12

AE13 AE14

AF12 AK27

AJ27 AJ26

AJ25 AK25

AH26 AG25

AF24 AG24

AF11 AE11

R82

12

0R0402-PAD

VGA_GPIO16 VGA_DVOMODE

DVPDATA_0 DVPDATA_1

CHECK VRAM TYPE AND SIZE

DVPDATA_2

CHECK VRAM TYPE AND SIZE

R533 DUMMY-R2

CHECK VRAM TYPE AND SIZE

R528 DUMMY-R2

Dummy when use ''M24'

M26 : HYNIX 128MB 1.8V,64MB 1.8V M24 : HYNIX 64MB 1.8V

VGA_SDA1 VGA_SCL1

DVPCNTL0_VGA DVPCNTL1_VGA DVPCNTL2_VGA DVPCNTL3_VGA

ATI_TXAOUT3ATI_TXAOUT3+

ATI_TXBOUT3ATI_TXBOUT3+

1 2 1 2 1 2 1 2

VGA_VREFG

ATI_TXAOUT0- 54 ATI_TXAOUT0+ 54 ATI_TXAOUT1- 54 ATI_TXAOUT1+ 54 ATI_TXAOUT2- 54 ATI_TXAOUT2+ 54

ATI_LCDVDD_ON 54 BL_ON 13,34

TMDS_DIS_TX0TMDS_DIS_TX0+ TMDS_DIS_TX1TMDS_DIS_TX1+ TMDS_DIS_TX2TMDS_DIS_TX2+ TMDS_DIS_TXCTMDS_DIS_TXC+

DIS_DVI_DDC_C 15 DIS_DVI_DDC_D 15

GPIO_AUXWIN 54

VGA_LOCAL_DP 23,54 VGA_LOCAL_DN 23,54

1 2

TP10TP10

TP11TP11 TP9TP9

VGA_ALERT# 54

GPIO_PWRCNTL 55

SC 0309

R92 0R0402-PADR92 0R0402-PAD

1 2

1 2 1 2

R529

1 2

1KR2

TP6TP6 TP5TP5

SC 0308

R543 0R0402-PADR543 0R0402-PAD R532 0R0402-PADR532 0R0402-PAD R539 0R0402-PADR539 0R0402-PAD R540 0R0402-PADR540 0R0402-PAD

TP74TP74 TP17TP17

TP14TP14 TP13TP13

SB 0213

DIS_HS 16 DIS_VS 16

R552

1 2

470R2F

DIS_CRT_DDC_D 16 DIS_CRT_DDC_C 16

R117

1 2

10KR2

Dummy when use ''M24'

2

R758 10KR2R758 10KR2

for EYE DIAGRAM

3D3V_S0

SC 0219

MUST TO CHECK

DVOMODE=VSS 3.3V MODE DVOMODE=VDDC to 1.8V 1.8V MODE DVOMODE=GND NO USE DVPDATA

STRAPS

3D3V_S0

PLL_CAL_FORCE_EN PCIE_MODE(1:0) CAL_OFF

SC 0225

BYPASS_PLL ICOMP DEBUG_ACCESS ROMIDCFG(3:0)

MULTIFUNC(1:0)

1D8V_S0

C82

ATI_TXACLK- 54 ATI_TXACLK+ 54 ATI_TXBOUT0- 54 ATI_TXBOUT0+ 54 ATI_TXBOUT1- 54 ATI_TXBOUT1+ 54 ATI_TXBOUT2- 54 ATI_TXBOUT2+ 54

ATI_TXBCLK- 54 ATI_TXBCLK+ 54

SCD1U16V

3D3V_S0

12

TMDS_DIS_TX1TMDS_DIS_TX1+

12

R84

R84 100R2F

100R2F

12

R83

100R2F

TMDS_DIS_TX0TMDS_DIS_TX0+ TMDS_DIS_TXC+ TMDS_DIS_TXC-

TMDS_DIS_TX2TMDS_DIS_TX2+

VIP_DEVICE DWNGR0

RN25

1 2 3 4 5

SRN0-1-U

Place Near To EZPORT4

DIS_R 57 DIS_G 57 DIS_B 57

SC 0228

2

SC 0228

1 2

R554 102R2FR554 102R2F

R550 102R2FR550 102R2F

R549 102R2FR549 102R2F

Title

ATI M26 PCIE LVDS (1/3)

Size Document Number Rev

A3

Date: Sheet

1

for REVERSE LANE

VGA_GPIO0 VGA_GPIO4

VGA_GPIO2

R530 DUMMY-R2R530 DUMMY-R2

VGA_GPIO3

R527 DUMMY-R2R527 DUMMY-R2

VGA_GPIO5

SB 0215

R531 10KR2R531 10KR2

1 2

R526 10KR2R526 10KR2

1 2 1 2 1 2

R81 DUMMY-R2R81 DUMMY-R2

1 2

3D3V_S0

DEFAULTPIN

GPIO0CAL_BG_BACKUP GPIO1

GPIO(3:2)

GPIO4 GPIO5 GPIO6 GPIO8

GPIO(9,13:11)

LCDDATA(17:16) LCDDATA(20) LCDDATA(21)

(internal pull-down)

ATI Ref. Datasheets(page 3-32) DOC.NO.:CHS-216M24-03

GPIO[0..13] are internal pull-down.

TMDS_DIS_TX0- TMDS_DIS_TX0+ TMDS_DIS_TX1TMDS_DIS_TX2TMDS_DIS_TXC-

DVPDATA_2, 1, 0 0 0 0 64MB Hynix 0 0 1 64MB Samsung 0 1 0 64MB X brand 0 1 1 64MB Y brand 1 0 0 128MB Hynix 1 0 1 128MB Samsung 1 1 0 128MB X brand 1 1 1 128MB Y brand

8 7 6

12

R93

R93 100KR2

100KR2

Bolsena

R95 330R2R95 330R2

1 2

R96 330R2R96 330R2

1 2

R98 330R2R98 330R2

1 2

R94 330R2R94 330R2

1 2

SC 0225

RN24

1 2 3 4 5

8 7 6

SRN0-1-U

DVI_HPD 15

VGA_GPIO11 VGA_GPIO10

VGA_GPIO9 VGA_GPIO6 VGA_GPIO7

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

49 58Thursday, March 31, 2005

1

1 1 00 1 0 0 0

0000

00

0 0

TMDS_DIS_TX1+ TMDS_DIS_TX2+ TMDS_DIS_TXC+

FOR M24

FOR M26

TMDS_EZ4_TX0- 15,57 TMDS_EZ4_TX0+ 15,57 TMDS_EZ4_TXC+ 15,57 TMDS_EZ4_TXC- 15,57

TMDS_EZ4_TX2- 15,57 TMDS_EZ4_TX2+ 15,57

TMDS_EZ4_TX1- 15,57 TMDS_EZ4_TX1+ 15,57

RN17

1

2

3

4 5

SRN10K-2

SRN10K-2 RN18

RN18

1

2

3

4 5

SRN10K-2

of

SB 0219

8 7 6

-1

A

Dummy when use UMA (WHOLE PAGE)

1D8V_S0

C94

12

C75

C92

12

C78

C136

12

C95

12

C93

4 4

SCD01U16V2KX

U17

DY

3

C122

12

3 3

DY

CHANGE TO 74.05308.E31

SC1U10V3KX

2

VOUT

VIN

1

GND

APL5308-15AC-TR

1D8V_S0

1 2

12

C77

SC1U10V3KX

R99

0R0603-PAD

R100

0R0603-PAD

12

SCD01U16V2KX

C79

SC1U10V3KX

2D8V_S03D3V_S0

C121

DY

SB 0201

SC 0308

12

SC1U10V3KX

C74

SC1U10V3KX

2 2

2D5V_S0

1 2

0R0603-PAD

1 2

0R0603-PAD

1 2

0R0603-PAD

R115

R114

R116

SC 0308

R545

1 2

0R0603-PAD

C149

12

C151

12

1 1

R67

1 2

0R0603-PAD

SC 0308

1D8V_MPVDD_S0

SCD01U16V2KX

12

2D5V_S0

SC 0308

C148

12

SC10U10V5ZY

C150

12

SC10U10V5ZY

SCD01U16V2KX

C135

SC10U10V5ZY

2D8V_S0

R544

1 2

C118

12

C119

12

SC1U10V3KX

C117

12

SC1U10V3KX

C111

12

SC10U10V5ZY

0R3-U

SC100P50V2JN

SC1U10V3KX

12

1D8V_S0

SCD01U16V2KX

12

TC2

ST100U6D3VDM-5

R546

1 2

DY

12

C116

SC100P50V2JN

1D8V_S0

R112

1 2

0R0603-PAD

SC 0308

B

12

C76

SCD01U16V2KX

0R3-U

C115

SCD1U16V

2D5V_2D8V_LVDDR_S0

1D8V_TVDD_S0

1D8V_A2VDD_S0 1D8V_A2VDDQ_S0 1D8V_AVDD

1D8V_DDQ

1D8V_PVDD_S0

U70D

Part 4 of 6

T7

VDDR1#T7

R4

VDDR1#R4

R1

VDDR1#R1

N8

VDDR1#N8

N7

VDDR1#N7

M4

VDDR1#M4

L8

VDDR1#L8

K23

VDDR1#K23

K24

VDDR1#K24

N4

VDDR1#N4

J8

VDDR1#J8

J7

VDDR1#J7

J4

VDDR1#J4

J1

VDDR1#J1

H10

VDDR1#H10

H13

VDDR1#H13

H15

VDDR1#H15

H17

VDDR1#H17

T8

VDDR1#T8

V4

VDDR1#V4

V7

VDDR1#V7

V8

VDDR1#V8

AA1

VDDR1#AA1

AA4

VDDR1#AA4

AA7

VDDR1#AA7

AA8

VDDR1#AA8

A3

VDDR1#A3

A9

VDDR1#A9

A15

VDDR1#A15

A21

VDDR1#A21

A28

VDDR1#A28

B1

VDDR1#B1

B30

VDDR1#B30

D26

VDDR1#D26

D23

VDDR1#D23

D20

VDDR1#D20

D17

VDDR1#D17

D14

VDDR1#D14

D11

VDDR1#D11

D8

VDDR1#D8

D5

VDDR1#D5

E27

VDDR1#E27

F4

VDDR1#F4

G7

VDDR1#G7

G10

VDDR1#G10

G13

VDDR1#G13

G15

VDDR1#G15

G19

VDDR1#G19

G22

VDDR1#G22

G27

VDDR1#G27

H22

VDDR1#H22

H19

VDDR1#H19

AD4

VDDR1#AD4

L23

VDDR1#L23

AE16

LVDDR_25#AE16

AE17

LVDDR_25#AE17

AF15

LVDDR_18#AF15

AE15

LVDDR_18#AE15

AH19

LPVDD

AH13

TPVDD

AF13

TXVDDR#AF13

AF14

TXVDDR#AF14

F18

VDDRH0

N6

VDDRH1

AF21

A2VDD#AF21

AE20

A2VDD#AE20

AF23

A2VDDQ

AH23

AVDD

AE23

VDD1DI

AE22

VDD2DI

AK28

PVDD

A7

MPVDD

M26-P-1

(M24)71.00M24.C0U - (M26)71.0M26P.00U

Part 4 of 6

VDDC#AC13 VDDC#AD13 VDDC#AD15 VDDC#AC15 VDDC#AC17

VDD15#P8

VDD15#Y8 VDD15#AC11 VDD15#AC20

VDD15#H20 VDD15#H11 VDD15#M23

VDD15#Y23

VDDR3#AD7 VDDR3#AD19 VDDR3#AD21 VDDR3#AC22

VDDR3#AC8 VDDR3#AC21 VDDR3#AC19

VDDR4#AG7

VDDR4#AD9

VDDR4#AC9 VDDR4#AC10 VDDR4#AD10

PCIE_VDDR_12#AG26 PCIE_VDDR_12#AK29

PCIE_VDDR_12#AJ30 PCIE_VDDR_12#AG29 PCIE_VDDR_12#AH29

PCIE_PVDD_12#N24 PCIE_PVDD_12#N23

PCIE_PVDD_12#P23

PCIE_PVDD_18#U23

PCIE_PVDD_18#T23 PCIE_PVDD_18#V23

PCIE_PVDD_18#W23

NC#D9 NC#D13 NC#D19 NC#D25

NC#E4

NC#T4 NC#AB4

AVSSQ

LVSSR#AF18

LVSSR#AH17 LVSSR#AG15 LVSSR#AG18

LPVSS TPVSS

TXVSSR#AH12 TXVSSR#AG13 TXVSSR#AG14

VSSRH0 VSSRH1

A2VSSN#AH20

A2VSSN#AG21

A2VSSQ

AVSSN

VSS1DI VSS2DI

I/O POWER

PVSS

MPVSS

AC13 AD13 AD15 AC15 AC17

P8 Y8 AC11 AC20 H20 H11 M23 Y23

AD7 AD19 AD21 AC22 AC8 AC21 AC19

AG7 AD9 AC9 AC10 AD10

AG26 AK29 AJ30 AG28 AG27

N24 N23 P23

U23 T23 V23 W23

D9 D13 D19 D25 E4 T4 AB4

AD22

AF18 AH17 AG15 AG18

AH18 AH12

AH14 AG13 AG14

F19 M6

AH20 AG21

AF22 AH22

AE24 AE21

AJ28 A6

C

current of power to VDDC on M26 is up to 10A + margin (25% or more).

12

C104

3D3V_S0

SC10U10V5ZY

D33

DY

SSM5818SL

2 1

3D3V_VDDR3

12

C722

C752

SC1U10V3KX

3D3V_VDDR4

12

PCIE_PVDDR_18 800mA + margin (transition, 4us duration) and 330mA + margin (continuous).

C107

SC10U10V5ZY

12

C80

12

C721

SC1U10V3KX

12

C197

SC10U10V5ZY

12

C101

SCD01U16V2KX

12

SC10U10V5ZY

12

1D2V_VGA_PVDD

12

C144

C144 SC10U10V5ZY

SC10U10V5ZY

12

C113

SCD01U16V2KX

R559

1 2

0R0603-PAD

SC 0308

R80

1 2

0R0603-PAD

SC 0308

C81

SC1U10V3KX

1D2V_VGA_VDDR

12

C196

SC10U10V5ZY

12

C140

SC330P50V2KX

SCD01U16V2KX

1D8V_VGA_PVDD

12

C141

SCD01U16V2KX

C112

C114

SCD01U16V2KX

3D3V_S0

PCIE_VDDR_12

1.6A + margin (transition, 4us duration) and

1.1A + margin (continuous).

12

C719

C146

C147

SC330P50V2KX

SCD01U16V2KX

12

C143

12

C718

PCIE_PVDD_12

C139

150mA + margin (transition, 4us duration) and 90mA + margin (continuous).

SCD01U16V2KX

12

C142

SCD01U16V2KX

ADD ASIC DECOUPLING FOR ALL POWER AS REQUIRED

WITH AS MANY AS POSSIBLE PLACED UNDER THE ASIC

D

D32

SSM5818SL

DY

C720

12

TC20

DY

ST100U6D3VDM-5

SB

12

SCD01U16V2KX

C137

SC1U10V3KX

12

C105

SCD01U16V2KX

12

0R0603-PAD

3D3V_S0

12

C110

SCD01U16V2KX

C96

SC1U10V3KX

1D2V_VGA_S0

R558

SC 0308

R557

12

C98

SCD01U16V2KX

12

SC 0308

DY

12

C100

SCD01U16V2KX

1D5V_VGA_S0

C102

SC1U10V3KX

12

C106

SCD01U16V2KX

12

21

C109

SC1U10V3KX

12

C97

SCD01U16V2KX

VGA_CORE_S0

12

C99

C103

SCD01U16V2KX

M22 Power UP Squence

3D3_VDDR3 3D3_VDDR4 2D5_VDDR1

1D8V_S0

R113

12

0R0603-PAD

12

C145

SC330P50V2KX

SC 0308

PLACED CLOSE TO THE POWER/GND PINS

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

1D2_VDDC PCIE_VDDR_12 PCIE_PVDD_12

VDD_15 PCIE_PVDD_18

ATI M26 POWER (2/3)

E

12

C715

C714

SC1U10V3KX

SCD01U16V2KX

DIODE SUPPLIES POWER TO VDDC RAIL WHILE VDDC REGULATOR STABALIZES DURING POWER ON

T1 < 1mS

T2 < 1mS

T3 < 1uS

T4 < 100nS

T5 < 100nS

T6 < 1uS

T7 < 100nS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bolsena

50 58Thursday, March 31, 2005

-1

of

Dummy when use UMA (WHOLE PAGE)

A

MDA[63..0]52

4 4

3 3

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

2 2

U70B

H28

DQA0

H29

DQA1

J28

DQA2

J29

DQA3

J26

DQA4

H25

DQA5

H26

DQA6

G26

DQA7

G30

DQA8

D29

DQA9

D28

DQA10

E28

DQA11

E29

DQA12

G29

DQA13

G28

DQA14

F28

DQA15

G25

DQA16

F26

DQA17

E26

DQA18

F25

DQA19

E24

DQA20

F23

DQA21

E23

DQA22

D22

DQA23

B29

DQA24

C29

DQA25

C25

DQA26

C27

DQA27

B28

DQA28

B25

DQA29

C26

DQA30

B26

DQA31

F17

DQA32

E17

DQA33

D16

DQA34

F16

DQA35

E15

DQA36

F14

DQA37

E14

DQA38

F13

DQA39

C17

DQA40

B18

DQA41

B17

DQA42

B15

DQA43

C13

DQA44

B14

DQA45

C14

DQA46

C16

DQA47

A13

DQA48

A12

DQA49

C12

DQA50

B12

DQA51

C10

DQA52

C9

DQA53

B9

DQA54

B10

DQA55

E13

DQA56

E12

DQA57

E10

DQA58

F12

DQA59

F11

DQA60

E9

DQA61

F9

DQA62

F8

DQA63

M26-P-1

(M24)71.00M24.C0U - (M26)71.0M26P.00U

Part 2 of 6

MEMORY INTERFACE A

MEMORY CHANNEL A

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12 MAA13 MAA14

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0

QSA1

QSA2

QSA3

QSA4

QSA5

QSA6

QSA7 RASA# CASA#

WEA# CSA0# CSA1#

CKEA

CLKA0

CLKA0#

CLKA1

CLKA1#

MVREFD MVREFS

DIMA_0 DIMA_1

M22,24,26P :Not connected

E22 B22 B23 B24 C23 C22 F22 F21 C21 A24 C24 A25 E21 B20 C19

J25 F29 E25 A27 F15 C15 C11 E11

J27 F30 F24 B27 E16 B16 B11 F10

A19 E18 E19 E20 F20 B19

B21 C20

C18 A18

B7 B8

D30 B13

B

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

CSA#1

ATI_MVREFD

ATI_MVREFS

DIMA_0 DIMA_1

RASA# 52 CASA# 52 WEA# 52 CSA#0 52 CSA#1 52 CKEA 52

CLKA0 52 CLKA#0 52

CLKA1 52 CLKA#1 52

TP16TP16 TP12TP12

12

R89

R89 100R2F

100R2F

DQMA#[7..0] 52

QSA[7..0] 52

12

R71

R71 100R2F

100R2F

MAA[13..0] 52

CKEA

CKEB

1D8V_S0

12

C91

C91 SCD1U16V

SCD1U16V

1 2

R70

R70 100R2F

100R2F

1D8V_S0

C73

C73 SCD1U16V

SCD1U16V

MDB[63..0]53

R90

10KR2

R78

10KR2

SB 0201

12

R68

R68 100R2F

100R2F

As close to CHIP as possible

C

U70C

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

U70C

D7

DQB0

F7

DQB1

E7

DQB2

G6

DQB3

G5

DQB4

F5

DQB5

E5

DQB6

C4

DQB7

B5

DQB8

C5

DQB9

A4

DQB10

B4

DQB11

C2

DQB12

D3

DQB13

D1

DQB14

D2

DQB15

G4

DQB16

H6

DQB17

H5

DQB18

J6

DQB19

K5

DQB20

K4

DQB21

L6

DQB22

L5

DQB23

G2

DQB24

F3

DQB25

H2

DQB26

E2

DQB27

F2

DQB28

J3

DQB29

F1

DQB30

H3

DQB31

U6

DQB32

U5

DQB33

U3

DQB34

V6

DQB35

W5

DQB36

W4

DQB37

Y6

DQB38

Y5

DQB39

U2

DQB40

V2

DQB41

V1

DQB42

V3

DQB43

W3

DQB44

Y2

DQB45

Y3

DQB46

AA2

DQB47

AA6

DQB48

AA5

DQB49

AB6

DQB50

AB5

DQB51

AD6

DQB52

AD5

DQB53

AE5

DQB54

AE4

DQB55

AB2

DQB56

AB3

DQB57

AC2

DQB58

AC3

DQB59

AD3

DQB60

AE1

DQB61

AE2

DQB62

AE3

DQB63

M26-P-1

(M24)71.00M24.C0U - (M26)71.0M26P.00U

MEMORY CHANNEL B

M24 use 45ohm 1% M26 use 240ohm 1%

N5

Part 3 of 6

MEMORY INTERFACE B

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8

MAB9 MAB10 MAB11 MAB12 MAB13 MAB14

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6

QSB7 RASB# CASB#

WEB# CSB0# CSB1#

CKEB CLKB0

CLKB0#

CLKB1

CLKB1#

DIMB_0 DIMB_1

ROMCS#

MEMVMODE_0 MEMVMODE_1

MEMTEST

R76

R76 240R2F

240R2F

M1 M3 L3 L2 M2 M5 P6 N3 K2 K3 J2 P5 P3 P2

E6 B2 J5 G3 W6 W2 AC6 AD2

F6 B3 K6 G1 V5 W1 AC5 AD1

R2 T5 T6 R5 R6 R3 N1

N2 T2

T3

E3 AA3

AF5 C6

C7 C8

12

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

CSB#1

D

12

RASB# 53 CASB# 53 WEB# 53 CSB#0 53 CSB#1 53 CKEB 53 CLKB0 53

CLKB#0 53 CLKB1 53

CLKB#1 53

TP3 TPAD30TP3 TPAD30 TP4 TPAD30TP4 TPAD30

TP7 TPAD30TP7 TPAD30

R75

R75 45R2F

45R2F

1 2

R72

R72 10KR2

10KR2

DY

MAB[13..0] 53

VGA_CORE_S0

U70F

P17

VDDC#P17

P18

VDDC#P18

P19

VDDC#P19

U12

VDDC#U12

U13

VDDC#U13

U14

VDDC#U14

U17

VDDC#U17

U18

VDDC#U18

U19

VDDC#U19

W17 W18 W12 W13 W14

M19 M18 M12

M13 M14

M17 W19

R91 0R0603-PADR91 0R0603-PAD

1 2

SC 0308

R74

10KR2

1 2

R73 10KR2R73 10KR2

V19

VDDC#V19

V18

VDDC#V18

V17

VDDC#V17

V14

VDDC#V14

V13

VDDC#V13

V12

VDDC#V12

N18

VDDC#N18

N17

VDDC#N17

N14

VDDC#N14 VDDC#W17 VDDC#W18 VDDC#W12 VDDC#W13 VDDC#W14

N13

VDDC#N13

N19

VDDC#N19 VDDC#M19 VDDC#M18 VDDC#M12

N12

VDDC#N12 VDDC#M13 VDDC#M14

P12

VDDC#P12

P13

VDDC#P13

P14

VDDC#P14 VDDC#M17 VDDC#W19

M26-P-1

(M24)71.00M24.C0U - (M26)71.0M26P.00U

DY

DQMB#[7..0] 53

QSB[7..0] 53

VGA_CORE_S0 VGA_CORE_VDDCI

M22,24,26P :Not connected

1 2

12

R51

10KR2

Dummy when use ''M26'

*When use M26, pin C6 = GPIO_17, C7 = NC

12

C108

C108 SC330P50V2KX

SC330P50V2KX

1D8V_S0

E

VSS#M16

Part 6 of 6

VSS#N16 VSS#N15 VSS#P15 VSS#P16 VSS#R18 VSS#R17 VSS#R16 VSS#R15 VSS#R14 VSS#R13 VSS#R12 VSS#T13 VSS#T14 VSS#T15

VSS#W15

VSS#V16 VSS#V15 VSS#U15 VSS#U16 VSS#T19 VSS#T18 VSS#T17 VSS#T16

CENTER ARRAY

VDDC1#W16

VDDC1#M15 VDDC1#R19

VDDC1#T12

When use M22/24P

PIN C6 C7

1.8V =

2.5V =

M16 N16 N15 P15 P16 R18 R17 R16 R15 R14 R13 R12 T13 T14 T15 W15 V16 V15 U15 U16 T19 T18 T17 T16

W16 M15 R19 T12

PD PU PU PD

Dummy when use ''M24'

W24

U70E

U8

VSS#U4U4VSS#U8

VSS#W7W7VSS#W8

Part 5 of 6

AC4

Y4

AC12

AC14

AC16

AC18

AB8

VSS#AB8

AB7

VSS#AB7

AB1

VSS#AB1

AD16

VSS#AC4

VSS#AC12

VSS#AC14

VSS#AC16

VSS#AD16

W8

VSS#Y4

L28

M27

M26

M24

M25

PCIE_VSS#L28

PCIE_VSS#K28

PCIE_VSS#M27

PCIE_VSS#M26

M28

P28

N28

R25

PCIE_VSS#P28

PCIE_VSS#N28

PCIE_VSS#M24

PCIE_VSS#M25

PCIE_VSS#M28

CORE GND

K28

AD18

AK2

AJ1

VSS#AJ1

VSS#AK2

VSS#AC18

VSS#AD18

T28

T24

V24

R23

R24

R26

R27

PCIE_VSS#R25

PCIE_VSS#R23

PCIE_VSS#R24

PCIE_VSS#R26

V26

R28

U28

PCIE_VSS#T28

PCIE_VSS#T24

PCIE_VSS#V24

PCIE_VSS#R27

PCIE_VSS#R28

PCIE_VSS#U28

W28

AA26

AA27

AA23

AA24

AA25

AA28

AB28

AE28

AD26

AD27

AC28

AD28

V27

V25

V28

Y28

AH29

AF28

MVDDQ=

1.8v/ 2.5v

PCIE_VSS#V26

PCIE_VSS#V27

PCIE_VSS#V25

PCIE_VSS#V28

PCIE_VSS#Y28

PCIE_VSS#W23

PCIE_VSS#W28

PCIE_VSS#AA26

PCIE_VSS#AA27

PCIE_VSS#AA23

PCIE_VSS#AA24

PCIE_VSS#AA25

PCIE_VSS#AA28

PCIE_VSS#AF28

PCIE_VSS#AB28

PCIE_VSS#AE28

PCIE_VSS#AD26

PCIE_VSS#AD27

PCIE_VSS#AC28

PCIE_VSS#AD28

PCIE_VSS#AH29

1 1

VSS#A2A2VSS#A10

VSS#A16

VSS#A22

VSS#A29

VSS#C1C1VSS#C3C3VSS#C28

VSS#C30

VSS#D27

VSS#D24

VSS#D21

VSS#D18

VSS#D15

VSS#D12

VSS#D10

VSS#D6D6VSS#D4D4VSS#F27

A10

A16

A22

A29

C28

C30

D27

D24

D21

D18

D15

D12

D10

VSS#G9G9VSS#G12

VSS#G16

VSS#G18

VSS#G21

VSS#G24

VSS#H27

VSS#H23

VSS#H21

VSS#H18

VSS#H16

VSS#H14

VSS#H12

VSS#H9H9VSS#H8H8VSS#H4

F27

G12

G16

G18

G21

G24

H27

H23

H21

H18

H16

H14

H12

VSS#AD12

VSS#AG5

VSS#AG9

VSS#J24

VSS#J23

H4

J24

J23

VSS#AG11

R7

AG5

AG9

AD12

AG11

VSS#K8K8VSS#K7K7VSS#K1K1VSS#L4L4VSS#M8M8VSS#M7M7VSS#P4P4VSS#R7

VSS#R8R8VSS#T1

T1

VDDR1 MEMVMODE_0 MEMVMODE_1

1.8V

2.5V

2.8V

+VDDC_CT +VDDC_CT

+VDDC_CTGND

GND+VDDC_CT

SB 0127

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

ATI M26 MEM (3/3)

Bolsena

51 58Thursday, March 31, 2005

of

-1

5

Dummy when use UMA (WHOLE PAGE)

All dampings in this page must near the VRAM.

C90

C90 SCD1U16V

SCD1U16V

C134

SC330P50V2KX

R109

R109 10R3

10R3

12

R107

R88

10R3

60D4R2F

12

D D

12

C C

CLKA051

CLKA#051

CLOSE TO MEM !!

B B

A A

12

C70

C70 SCD1U16V

SCD1U16V

12

C66

SC330P50V2KX

RASA#51 CASA#51

WEA#51 CSA#051 CSA#151

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11

MAA12 MAA13

CKEA51 VDDRA_CLK0+

VDDRA_CLK0+

12

VDDRA_CLK0-

12

R108

1 2

BC751_1

12

C132

C132 SCD1U16V

SCD1U16V

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

C68

C68 SCD1U16V

SCD1U16V

C131

SC330P50V2KX

M2

L2 L3 N2

M4

N5 N6

M6

N7 N8

M9

N9 N10 N11

M8

L6

M7

L9

N4

M5

M10

N12 M11 M12

60D4R2F

F6

F7

F8

F9

G6 G7 G8 G9

H6

H7

H8

H9

J6 J7 J8 J9

M13

HY5DS573222F-28

12

C67

C67 SCD1U16V

SCD1U16V

12

C163

SC330P50V2KX

U71A

RAS# CAS# WE# CS# NC#M4

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 NC#L9

BA0 BA1 NC#M10

CKE CLK CLK#

VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL

MCL/DSF

12

C41

C41 SCD1U16V

SCD1U16V

C712

SC330P50V2KX

NC#C4C4NC#C11

NC#H4H4NC#H11

C11

H11

NC#L12

L12

Layout trace 20 mil

5

12

C691

C691 SCD1U16V

SCD1U16V

12

C713

SC330P50V2KX

1 of 5

VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VREF

NC#L13

NC#M3

NC#N3

N3

M3

L13

CLOSE TO MEM

D7 D8 E4 E11 L4 L7 L8 L11

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

E5 E7 E8 E10 K6 K7 K8 K9 L5 L10

N13

12

4

C704

C704 SCD1U16V

SCD1U16V

C138

SC330P50V2KX

12

4

12

C701

1D8V_S0

12

C703

SC10U10V5ZY

C708

C708 SCD1U16V

SCD1U16V

VDDR_VREF1

C707

C707 SCD1U16V

SCD1U16V

1D8V_S0

C690

C690 SCD1U16V

SCD1U16V

SC330P50V2KX

SB 0201

12

C711

SB 0201

1D8V_S0

3

MDA[63..0]51

DQMA#1

QSA1

DQMA#2

QSA2

DQMA#0

QSA0

DQMA#3

QSA3

MDA12 MDA11 MDA9 MDA10 MDA13 MDA8 MDA15 MDA14

MDA21 MDA18 MDA17 MDA22 MDA19 MDA23 MDA16 MDA20

MDA6 MDA2 MDA0 MDA7 MDA1 MDA4 MDA5 MDA3

MDA26 MDA31 MDA30 MDA24 MDA27 MDA25 MDA29 MDA28

MAA[13..0]51 DQMA#[7..0]51 QSA[7..0]51

2 of 5

U71B

B5

DQ3

C6

DQ1

B6

DQ2

B7

DQ0

D2

DQ6

D3

DQ5

C2

DQ4

E2

DQ7

B3

DM0

B2

DQS0

HY5DS573222F-28

3 of 5

U71C

K13

DQ8

G13

DQ12

G12

DQ13

J13

DQ10

F13

DQ14

K12

DQ9

F12

DQ15

J12

DQ11

H12

DM1

H13

DQS1

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

4 of 5

U71D

G3

DQ18

K3

DQ23

J3

DQ20

F3

DQ16

J2

DQ21

G2

DQ19

F2

DQ17

K2

DQ22

H3

DM2

H2

DQS2

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

U71E

5 of 5

D12

DQ26

D13

DQ25

E13

DQ24

C9

DQ30

B10

DQ28

B8

DQ31

C13

DQ27

B9

DQ29

B12

DM3

B13

DQS3

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

3

12

C705

C705 SCD01U16V2KX

SCD01U16V2KX

12

C162

SCD01U16V2KX

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

SC10U10V5ZY

12

R547

R547 1KR2F

1KR2F

12

R548

R548 1KR2F

1KR2F

1D8V_S0

12

U69B

MDA45

B5

MDA58 MDA63 MDA61 MDA56 MDA59 MDA57 MDA62 MDA60

K13 G13 G12

K12

H12 H13

C6 B6 B7 D2 D3 C2 E2

B3 B2

U69C

J13 F13

F12 J12

U69D

G3

K3

J3

F3

J2

G2

F2 K2

H3 H2

D12 D13 E13

C9

B10

B8

C13

B9

B12 B13

DQ3 DQ1 DQ2 DQ0 DQ6 DQ5 DQ4 DQ7

DM0 DQS0

HY5DS573222F-28

DQ8 DQ12 DQ13 DQ10 DQ14 DQ9 DQ15 DQ11

DM1 DQS1

DQ18 DQ23 DQ20 DQ16 DQ21 DQ19 DQ17 DQ22

DM2 DQS2

MDA46 MDA43 MDA44 MDA42 MDA40 MDA47 MDA41

DQMA#5

QSA5

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

MDA49 MDA53 MDA54 MDA50 MDA52 MDA48 MDA55 MDA51

DQMA#6

QSA6

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

MDA37 MDA35 MDA34 MDA39 MDA33 MDA36 MDA38 MDA32

DQMA#4

QSA4

DQMA#7

QSA7

12

C133

C72

C72 SCD1U16V

SCD1U16V

C69

C69 SC330P50V2KX

SC330P50V2KX

2 of 5

HY5DS573222F-28

U69E

DQ26 DQ25 DQ24 DQ30 DQ28 DQ31 DQ27 DQ29

DM3 DQS3

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

C133 SCD1U16V

SCD1U16V

12

C71

C71 SCD01U16V2KX

SCD01U16V2KX

CLKA151

CLKA#151

3 of 5

4 of 5

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

5 of 5

R66

R65

SB 0201SB 0201

10R3

12 12

10R3

R49

60D4R2F

CLOSE TO MEM !!

2

U69A

RASA#

M2

N10 N11

M10

N12 M11 M12

60D4R2F

M13

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6 A7 A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1 NC#M10

CKE CLK CLK#

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL MCL/DSF

NC#C4C4NC#C11

NC#H4H4NC#H11

NC#L12

NC#L13

HY5DS573222F-28

Title

Size Document Number Rev

A3

Date: Sheet of

NC#M3

M3

L12

L13

C11

H11

ATI VRAM (1/2)

CASA# WEA# CSA#0 CSA#1

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11

MAA12 MAA13

CKEA51

VDDRA_CLK1+

VDDRA_CLK1-

R64

1 2

BC752_1

12

C65

C65 SCD1U16V

SCD1U16V

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

2

1

1 of 5

D7

VDD

D8

VDD

E4

VDD

E11

VDD

L4

VDD

L7

VDD

L8

VDD

L11

VDD

C3

VDDQ

C5

VDDQ

C7

VDDQ

C8

VDDQ

C10

VDDQ

C12

VDDQ

E3

VDDQ

E12

VDDQ

F4

VDDQ

F11

VDDQ

G4

VDDQ

G11

VDDQ

J4

VDDQ

J11

VDDQ

K4

VDDQ

K11

VDDQ

B4

VSSQ

B11

VSSQ

D4

VSSQ

D5

VSSQ

D6

VSSQ

D9

VSSQ

D10

VSSQ

D11

VSSQ

E6

VSSQ

E9

VSSQ

F5

VSSQ

F10

VSSQ

G5

VSSQ

G10

VSSQ

H5

VSSQ

H10

VSSQ

J5

VSSQ

J10

VSSQ

K5

VSSQ

K10

VSSQ

E5

VSS

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

N13

VREF

NC#N3

N3

12

C689

C689 SCD1U16V

SCD1U16V

VDDR_VREF2

12

C688

C688 SCD1U16V

SCD1U16V

Layout trace 20 mil

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bolsena

1

1D8V_S0

12

C692

52 58Thursday, March 31, 2005

SC10U10V5ZY

12

C702

SB 0201

1D8V_S0

SB 0201

SC10U10V5ZY

12

R520

R520 1KR2F

1KR2F

R519

R519 1KR2F

1KR2F

-1

5

Dummy when use UMA (WHOLE PAGE)

All dampings in this page must near the VRAM.

12

D D

12

C C

CLKB051

CLKB#051

B B

A A

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

C47

C47 SCD1U16V

SCD1U16V

C694

C694 SC330P50V2KX

SC330P50V2KX

R28

R29

10R3

60D4R2F

CLOSE TO MEM !!

12

C45

C45 SCD1U16V

SCD1U16V

12

C683

C683 SC330P50V2KX

SC330P50V2KX

12

10R3

12

R26

12

RASB# CASB# WEB# CSB#0 CSB#1

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11

MAB12 MAB13

CKEB

VDDRC_CLK0+ VDDRC_CLK0-

R27

R27 60D4R2F

60D4R2F

1 2

BC753_1

12

C19

C19 SCD1U16V

SCD1U16V

5

12

C17

C17 SCD1U16V

SCD1U16V

12

C48

C48 SC330P50V2KX

SC330P50V2KX

U64A

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1

M10

NC#M10

N12

CKE

M11

CLK

M12

CLK#

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL

M13

MCL/DSF

HY5DS573222F-28

12

C46

C46 SCD1U16V

SCD1U16V

C20

C20 SC330P50V2KX

SC330P50V2KX

C44

C44 SCD1U16V

SCD1U16V

12

C130

C130 SC330P50V2KX

SC330P50V2KX

NC#C4C4NC#C11

C11

12

C674

C674 SCD1U16V

SCD1U16V

12

C21

C21 SC330P50V2KX

SC330P50V2KX

1 of 5

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREF

NC#H4H4NC#H11

NC#L12

NC#L13

NC#M3

NC#N3

N3

M3

L12

L13

H11

CLOSE TO MEM

Layout trace 20 mil

VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4

12

C49

C49 SC330P50V2KX

SC330P50V2KX

D7 D8 E4 E11 L4 L7 L8 L11

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

E5 E7 E8 E10 K6 K7 K8 K9 L5 L10

N13

VDDR_VREF3

4

C16

C16 SCD1U16V

SCD1U16V

12

C678

C678 SC330P50V2KX

SC330P50V2KX

1D8V_S0

12

C672

SC10U10V5ZY

C676

C676 SCD1U16V

SCD1U16V

C677

C677 SCD1U16V

SCD1U16V

1D8V_S0

C693

C693 SCD1U16V

SCD1U16V

12

1D8V_S0

12

C50

C50 SCD01U16V2KX

SCD01U16V2KX

SB 0201

C675

C675 SC10U10V5ZY

SC10U10V5ZY

SB 0201

12

R516

R516 1KR2F

1KR2F

12

R515

R515 1KR2F

1KR2F

SB 0201

12

C671

C671 SCD01U16V2KX

SCD01U16V2KX

MDB7 MDB6 MDB5 MDB4 MDB1 MDB0 MDB2 MDB3

DQMB#0

QSB0

MDB28 MDB29 MDB31 MDB25 MDB26 MDB27 MDB24 MDB30

DQMB#3

QSB3

MDB14 MDB9 MDB11 MDB13 MDB10 MDB15 MDB12 MDB8

DQMB#1

QSB1

MDB20 MDB23 MDB22 MDB16 MDB19 MDB17 MDB21 MDB18

DQMB#2

QSB2

3

1D8V_S0

MDB32 MDB33 MDB34 MDB35 MDB36 MDB38 MDB37 MDB39

DQMB#4

QSB4

MDB63 MDB59 MDB58 MDB60 MDB56 MDB62 MDB57 MDB61

DQMB#7

QSB7

MDB43 MDB47 MDB45 MDB42 MDB44 MDB40 MDB41 MDB46

DQMB#5

QSB5

MDB53 MDB54 MDB52 MDB51 MDB50 MDB49 MDB55 MDB48

DQMB#6

QSB6

SB 0201

G13 G12

K13

F13 K12 F12

H12 H13

D12 D13 E13

B10 C13

B12 B13

U65B

B5 C6 B6 B7 D2 D3 C2 E2

B3 B2

U65C

J13

J12

U65D

G3

K3

J3

F3

J2

G2

F2 K2

H3 H2

C9 B8 B9

12

U64B

B5

DQ3

C6

DQ1

B6

DQ2

B7

DQ0

D2

DQ6

D3

DQ5

C2

DQ4

E2

DQ7

B3

DM0

B2

DQS0

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

U64C

K13

DQ8

G13

DQ12

G12

DQ13

J13

DQ10

F13

DQ14

K12

DQ9

F12

DQ15

J12

DQ11

H12

DM1

H13

DQS1

U64D

G3

DQ18

K3

DQ23

J3

DQ20

F3

DQ16

J2

DQ21

G2

DQ19

F2

DQ17

K2

DQ22

H3

DM2

H2

DQS2

U64E

D12

DQ26

D13

DQ25

E13

DQ24

C9

DQ30

B10

DQ28

B8

DQ31

C13

DQ27

B9

DQ29

B12

DM3

B13

DQS3

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

12

C680

C680 SCD1U16V

SCD1U16V

C22

C22 SC330P50V2KX

SC330P50V2KX

2 of 5

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

5 of 5

C18

C18 SCD1U16V

SCD1U16V

12

C673

C673 SCD01U16V2KX

SCD01U16V2KX

3 of 5

4 of 5

HY5DS573222F-28

3

2

MDB[63..0]51 MAB[13..0]51

CKEB51

R31 10R3R31 10R3 R32 10R3R32 10R3

R33

60D4R2F

CLOSE TO MEM !!

12 12

RASB#51 CASB#51

WEB#51 CSB#051 CSB#151

VDDRC_CLK1+ VDDRC_CLK1-

1 2

BC754_1

12

C23

2

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11

MAB12 MAB13

R30

R30 60D4R2F

60D4R2F

SCD1U16V

M10

M11 M12

M13

DQMB#[7..0]51 QSB[7..0]51

2 of 5

DQ3 DQ1 DQ2 DQ0 DQ6 DQ5 DQ4 DQ7

DM0 DQS0

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

DQ8 DQ12 DQ13 DQ10 DQ14 DQ9 DQ15 DQ11

DM1 DQS1

DQ18 DQ23 DQ20 DQ16 DQ21 DQ19 DQ17 DQ22

DM2 DQS2

U65E

DQ26 DQ25 DQ24 DQ30 DQ28 DQ31 DQ27 DQ29

DM3 DQS3

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

CLKB151

CLKB#151

3 of 5

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

4 of 5

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

5 of 5

1

1 of 5

NC#L12

NC#L13

L12

L13

1 of 5

D7

VDD

D8

VDD

E4

VDD

E11

VDD

L4

VDD

L7

VDD

L8

VDD

L11

VDD

C3

VDDQ

C5

VDDQ

C7

VDDQ

C8

VDDQ

C10

VDDQ

C12

VDDQ

E3

VDDQ

E12

VDDQ

F4

VDDQ

F11

VDDQ

G4

VDDQ

G11

VDDQ

J4

VDDQ

J11

VDDQ

K4

VDDQ

K11

VDDQ

B4

VSSQ

B11

VSSQ

D4

VSSQ

D5

VSSQ

D6

VSSQ

D9

VSSQ

D10

VSSQ

D11

VSSQ

E6

VSSQ

E9

VSSQ

F5

VSSQ

F10

VSSQ

G5

VSSQ

G10

VSSQ

H5

VSSQ

H10

VSSQ

J5

VSSQ

J10

VSSQ

K5

VSSQ

K10

VSSQ

E5

VSS

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

N13

VREF

NC#M3

NC#N3

N3

M3

12

VDDR_VREF4

12

U65A

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1 NC#M10

N12

CKE CLK CLK#

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL MCL/DSF

NC#C4C4NC#C11

HY5DS573222F-28

(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U

NC#H4H4NC#H11

C11

H11

CLOSE TO MEM

Layout trace 20 mil

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

ATI VRAM (2/2)

Bolsena

1

53 58Thursday, March 31, 2005

1D8V_S0

12

C684

SC10U10V5ZY

C682

C682 SCD1U16V

SCD1U16V

C681

C681 SCD1U16V

SCD1U16V

of

SB 0201

12

SB 0201

1D8V_S0

C679

-1

SC10U10V5ZY

12

R510

R510 1KR2F

1KR2F

R509

R509 1KR2F

1KR2F

5

D D

SB 0201

4

3

2

1

C C

ATI_TXBCLK+49 ATI_TXBCLK-49 ATI_TXBOUT2+49 ATI_TXBOUT2-49

ATI_TXBOUT1+49 ATI_TXBOUT1-49 ATI_TXBOUT0+49 ATI_TXBOUT0-49

ATI_TXACLK+49 ATI_TXACLK-49 ATI_TXAOUT2+49 ATI_TXAOUT2-49

ATI_TXAOUT1+49 ATI_TXAOUT1-49 ATI_TXAOUT0+49

B B

VGA_LOCAL_DP23,49

VGA_LOCAL_DN23,49

SB 0201

A A

5

4

12

DY

C695

C695 SC2200P50V2KX

SC2200P50V2KX

DY

ATI_TXAOUT0-49

ATI_LCDVDD_ON49

U67

1

VCC

2

DXP

3

DXN

4

THERM#

12

C697

G781

SCD1U

DY

SMBCLK

SMBDATA

ALERT#

3

SRN0-1-U

4 5 3 2 1

RN97

RN97 SRN0-1-U

SRN0-1-U

4 5 3 2 1

RN96

RN96 SRN0-1-U

SRN0-1-U

4 5 3 2 1

RN92

RN92 SRN0-1-U

SRN0-1-U

4 5 3 2 1

RN91

R160

1 2

8 7 6 5

GND

6 7 8

0R2-0

LCD_TXBCLK+ 13,17 LCD_TXBCLK- 13,17 LCD_TXBOUT2+ 13,17 LCD_TXBOUT2- 13,17

LCD_TXBOUT1+ 13,17 LCD_TXBOUT1- 13,17 LCD_TXBOUT0+ 13,17 LCD_TXBOUT0- 13,17

LCD_TXACLK+ 13,17 LCD_TXACLK- 13,17 LCD_TXAOUT2+ 13,17 LCD_TXAOUT2- 13,17

LCD_TXAOUT1+ 13,17 LCD_TXAOUT1- 13,17 LCD_TXAOUT0+ 13,17 LCD_TXAOUT0- 13,17

LCD_VDD_ON 13,17

3D3V_S0

VGA_SMB_CLK 49 VGA_SMB_DAT 49

SB

R521

R521 2K2R2

2K2R2

DY

1 2

VGA_ALERT# 49

To M26

Dummy when use UMA

3D3V_S03D3V_S0

12

R536

R536 10KR2

10KR2

R535

1 2

3

0R2-0

Q26

1

DY

PDTC144EU

2

DY

2

Dummy when use ''M26'

Title

Size Document Number Rev

A3

Date: Sheet of

To M24

GPIO_AUXWIN 49

VGA SELECTOR

VGA SELECTOR Bolsena

Bolsena

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

-1

54 58Thursday, March 31, 2005

1

A

B

C

D

E

FAN5234 FOR VGA_Core

Dummy when use 'UMA' (whole page)

4 4

5V_S5

12

C59

C59 SC4D7U10V5ZY

SC4D7U10V5ZY

D9

12

5234_VSEN

2 1

SSM5818SL

U68

16 15

7 4 3

6 5 1

11

C61

C61 SCD1U25V3KX

SCD1U25V3KX

10KR2

DCBATOUT_5234

12

5V_S0

12

R524

R524 DUMMY-R2

DUMMY-R2

R60

1 2

0R0603-PAD

SC 0308

C696

C696 SCD22U16V3ZY

SCD22U16V3ZY

DY

5234_VIN

12

C700

5234_SS

5234_ILIM

5234_EN

12

SC2200P50V2KX

R523

R523 40K2R2F

40K2R2F

3 3

2 2

SB 0131

PM_SLP_S3#18,21,34,38,39,43,44,57

R525

1 2

12

PGND

FPWM

AGND

BOOT SS ILIM EN

ISNS

SW

VSEN

HDRV

VOUT

LDRV

VIN

PGOOD

VCC

FAN5234MTCX

PWM Mode: FPWM (High)=>Fixed PWM Mode. FPWM (Low)=>Hysteretic Mode.

DCBATOUT DCBATOUT_5234

C60

C60 SCD1U16V

SCD1U16V

C84

5234_BOOT

9 8

12 13

14 10

2

5234_ISEN 5234_SW

5234_HDRV 5234_LDRV

TP73

TP73 TPAD30

TPAD30

1 2

SCD1U25V3KX

G63

1 2

G8

1 2

G61

1 2

G9

1 2

G10

1 2

G62

1 2

R522

1 2

GAP-CLOSE-PWR

1K2R2F

FDS6690A

DCBATOUT_5234

12

678

U18

DDD

FDS6612A

SSS

GD

SSS

GD

123

4 5

L25

1 2

IND-2D2UH-4

U15

678

DDD

SSS

GD

SSS

GD

123

4 5

300KHz

C86

SC10U25V0KX

SB 0127

5V_S0

SC 0303

12

R57

R57 10KR2

10KR2

12

R58

DUMMY-R3

12

C85

C85 SCD1U

SCD1U

12

C699

C699 SCD01U16V2JX

SCD01U16V2JX

R538

2KR2F

12

C87

SC10U25V0KX

SB 0127

12

R59

12

R537

R537 698R2F

698R2F

12

2N7002

R59 464R3F

464R3F

D

Q5

1

G

S

2 3

VGA_CORE_S0

GAP-CLOSE-PWR

C706

C706 SCD1U

SCD1U

GPIO_PWRCNTL 49

12

R87

R87 10KR2

10KR2

VGA_CORE_PWR VGA_CORE_S0

G7

1 2

G3

1 2

G2

1 2

12

KEMET B2 Size 220uF 2.5V ESR=35mohm Iripple=1.6A NTD:6.0

TC22

TC22 ST330U2D5VDM-3

ST330U2D5VDM-3

G58

1 2

G57

1 2

G60

1 2

G59

1 2

G54

1 2

G56

1 2

G55

1 2

G53

1 2

G6

1 2

G5

1 2

G1

1 2

G4

1 2

GAP-CLOSE-PWR

1D2V or 1D15V Iomax=10 or 5.2A OCP>20A

VGA_CORE_PWR

12

TC21

TC21 ST330U2D5VDM-3

ST330U2D5VDM-3

KEMET V Size 330uF 2.5V ESR=9mohm, Iripple=3.7A NTD:9.0

Rilim=(11.2/Iilim)*((100+Rsense)/Rdson)

3D3V_S0

12

C754

C754 SC10U10V5ZY

SC10U10V5ZY

1 1

12

A

C756

C756 SC10U10V5ZY

SC10U10V5ZY

4

2

1

3

FB

BS

VIN

VOUT

NC#88NC#77GND6NC#55GND

<VGA>

APL5332KAC

APL5332KAC U74

U74

9

1D5V_VGA_1_S0

12

R597

R597 8K66R2F

8K66R2F

C753

SCD1U

12

R596

R596 10KR2F-U

DY

10KR2F-U

12

C755

C755 SC10U25V6KX

SC10U25V6KX

B

G67

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G64

G64

1 2

GAP-CLOSE-PWR

1D5V_VGA_S0

C

High(3.3V)=>Vo=1.0V Low(0V)=>Vo=1.2V

M24/M26 POWER PLAY (GPIO_PWRCNTL) high (3.3V) = set lower core voltage (VDDC = 1.0V) low (0V) = set higher core voltage (VDDC = 1.2V)

(Power Team)

D

Vout Setting:

0.9V/Rlow=(Vout-0.9V)/Rhigh

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA CORE 1D2V or 1D0V

Size Document Number Rev

A3

Date: Sheet

Bolsena

E

55 58Thursday, March 31, 2005

of

-1

5

4

HOLE13

HOLE13 HOLE

HOLE

HOLE24

HOLE24 HOLE

HOLE

HOLE1

HOLE1 HOLE

HOLE

3

HOLE4

HOLE4 HOLE

HOLE

HOLE23

HOLE23 HOLE

HOLE

HOLE5

HOLE5 HOLE

HOLE

HOLE7

HOLE7 HOLE

HOLE

HOLE8

HOLE8 HOLE

HOLE

2

HOLE3

HOLE3 HOLE

HOLE

HOLE6

HOLE6 HOLE

HOLE

HOLE10

HOLE10 HOLE

HOLE

HOLE28

HOLE28 HOLE

HOLE

HOLE9

HOLE9 HOLE

HOLE

HOLE20

HOLE20 HOLE

HOLE

1

HOLE18

HOLE18 HOLE

HOLE

HOLE2

HOLE2 HOLE

HOLE

HOLE22

HOLE22 HOLE

HOLE

VGA_CORE_PWR 1D8V_S0 1D2V_S0

12

DY

EC19

SCD1U16V

12

DY

EC20

SCD1U16V

12

DY

EC21

SCD1U16V

D D

2D5V_S3 2D5V_S0

12

DY

EC24

SCD1U16V

12

EC28

SCD1U16V

12

EC31

C C

EC31

SCD1U16V

B B

DY

EC25

SCD1U16V

12

EC29

SCD1U16V

12

DY

EC32

SCD1U16V

GREEN COLOR FOR INSTALL

12

SCD1U16V

1D2V_PWR2D5V_PWR1D8V_PWR

12

EC30

SCD1U16V

3D3V_LAN_S53D3V_BT_S02D5V_S0 DCBATOUTDCBATOUT

12

EC33

SCD1U16V

SC 0308

12

DY

EC26

SCD1U16V

DY

FAN1_VCC

12

EC63

SCD1U16V

IMPORTANT: SCD1U => VOLTAGE 25V SCD1U16V => VOLTAGE 16V

DY

EC27

3D3V_S5

12

EC23

SCD1U16V

DCBATOUT

DY

EC34

EC34 SCD1U

SCD1U

12

DY

EC35

EC35 SCD1U

SCD1U

12

DY

EC22

EC22 SCD1U

SCD1U

12

1

5V_AUX_S5 AD+3D3V_LAN_S5

12

SCD1U16V

3D3V_S0

12

EC36

SCD1U16V

2D5V_S0 3D3V_S5 5VA_OP_S0

12

EC46

SCD1U16V

DCBATOUT

12

EC54

EC54 SCD1U

SCD1U

EC68

1

12

SCD1U16V

12

EC37

SCD1U16V

12

EC47

SCD1U16V

12

EC55

EC55 SCD1U

SCD1U

EC69

12

SCD1U16V

12

SCD1U16V

12

SCD1U16V

EC38

EC48

EC56

EC56 SCD1U

SCD1U

1

EC70

SC 0310

12

EC39

SCD1U16V

12

EC49

SCD1U16V

12

EC60

EC60 SCD1U

SCD1U

1

12

EC71

SCD1U16V

12

SCD1U16V

12

EC40

12

EC50

SCD1U16V

EC57

EC57 SCD1U

SCD1U

1

EC72

EC72 SCD1U

SCD1U

12

EC41

SCD1U16V

12

EC58

EC58 SCD1U

SCD1U

1

12

EC51

SCD1U16V

EC73

EC73 SCD1U

SCD1U

SC 0310

12

EC42

SCD1U16V

12

SCD1U16V

12

EC59

EC59 SCD1U

SCD1U

1

12

EC74

EC74 SCD1U

SCD1U

12

SCD1U16V

EC52

12

EC65

EC65 SCD1U

SCD1U

1

CHG_PWR-3 47

12

EC43

SCD1U16V

12

EC53

SCD1U16V

12

EC64

EC64 SCD1U

SCD1U

1

DY

EC44

DOCK_AD+

12

EC75

DY

12

EC83

12

EC45

SCD1U16V

EC62

EC62 SCD1U

SCD1U

12

SCD1U => VOLTAGE 25V

BT+

12

EC67

EC67 SCD1U

SCD1U

SC 0309

SC 0308

SC 0301

1

CHG_PWR-2 47

12

SC1500P50V3KX

DY

MAX1999_LX3 43

12

SC1500P50V3KX

DY

EC66

EC66 SCD1U

SCD1U

1

12

EC76

SC1000P50V2KX

DY

12

EC84

SC1000P50V2KX

DY

FOR VGA CHIP

HOLE14

1

34.42E05.001

1

5130_LL1 44,45

12

EC77

SC1500P50V3KX

DY

MAX1999_LX5 43

12

EC85

SC1500P50V3KX

DY

HOLE12

1

34.42E05.001

HOLE16

1

34.42E05.001

1

EC78

SC1000P50V2KX

12

EC86

SC1000P50V2KX

DY

12

EC79

SC1500P50V3KX

DY

EC87

SC1500P50V3KX

1

12

EC80

SC1000P50V2KX

DY

MAX1544_LXM 41,42

12

EC88

SC1000P50V2KX

DY

HOLE15

1

34.42E05.001

FOR MDC

1

12

DY

12

DY

1

5130_LL3 44,455130_LL2 44,45

12

EC81

SC1500P50V3KX

DY

MAX1544_LXS 41,42

12

EC89

EC90

SC1500P50V3KX

SC1000P50V2KX

DY

HOLE11

1

34.42E05.001

1

EC82

SC1000P50V2KX

DY

GND19

SPRING-23

1

34.39S07.001

34.39S07.001 DY

1

34.45T31.001

GND5

SPRING-1

1

DY

GND18

SPRING-1

1

GND4

SPRING-24

DY

34.40V16.001

GND20

SPRING-24

A A

GND22

SPRING-23

1

GND16

34.40V16.001

1

34.45T31.001

DY

GND21

SPRING-23

1

34.39S07.001

1

34.49U24.001

GND7

SPRING-24

1

34.45T31.001

34.39S07.001

GND6

SPRING-1

1

GND23

SPRING-1

1

GND17

1

GND8

SPRING-1

DY

34.40V16.001

DY

GND24

SPRING-23

1

34.40V16.001

34.49U24.001

DY

1

34.40V16.001

34.39S07.001

DY

GND3

SPRING-1

1

GND10

SPRING-1

DY

1

DY

GND1

SPRING-1

1

34.40V16.001

GND11

SPRING-1

34.40V16.001

ZZ.NDPAD.XXX

GND2

SPRING-1

34.40V16.001

DY

1

34.40V16.001

GND13

1

DY

1

34.40V16.001

GNDPAD

GND14

1

GNDPAD

ZZ.NDPAD.XXX

GND12

SPRING-1

1

GND15

SPRING-29

1

DY

GND9

SPRING-1

1

34.40V16.001

34.42T14.001

DY

34.40V16.001

3D3V_S5 3D3V_S5

U40A

14

1

2 3

TSLCX125

7

Dummy when no EZ4

3D3V_AUX_S5

U54F

147

13 12

TSLCX14MTC-L-U

14

13

12 11

7

U40D

TSLCX125

FOR NORTH BRIDGE

HOLE17

HOLE19

1

34.42E05.001

Title

Size Document Number Rev

A3

Bolsena

Date: Sheet

1

34.42E05.001

HOLE21

1

34.42E05.001

EMI

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

56 58Thursday, March 31, 2005

-1

A

EZ1

TMDS_EZ4_TX1-15,49 TMDS_EZ4_TX1+15,49 TMDS_EZ4_TX2+15,49 TMDS_EZ4_TX2-15,49

TMDS_EZ4_TX0-15,49

DVI_EZ4_HPD15

5V_S0

12

SC 0309

R501

R501 1KR2

1KR2

SC 0309

TMDS_EZ4_TX0+15,49

TMDS_EZ4_TXC+15,49 TMDS_EZ4_TXC-15,49

EZ4_DVI_DDC_C15

DOCK_LIN_R33 DOCK_MIC_JKIN33

DOCK_LIN_L33

SPKR_R_DOCK33 DOCK_EXT_MIC33

SPKR_L_DOCK33

EZ4_CRT_DDC_D16

EZ4_CRT_DDC_C16

CLK_PCIE_DOCK13 CLK_PCIE_DOCK1#3

EZIN_EM#

EZ4_DVI_DDC_D15

EZIN_EM#34

EZ4_HS16

SMBC_SB_EZ43

SMBD_SB_EZ43

DY

PCIE_RXP012 PCIE_RXN012

PCIE_TXP012

PCIE_TXN012 EZ_PWROK34

PE_REQ1#34

PCIE_RXN112 PCIE_RXP112

1

EZ4_VS16

3D3V_S5

12

3

2

R499

R499 10KR2

10KR2

Q24

Q24 CHT2222A

CHT2222A

A

1 2

R498 1KR2R498 1KR2

TV_COMP_DOCK TV_LUMA_DOCK

TV_CRMA_DOCK

CRT_R_DOCK

CRT_G_DOCK CRT_B_DOCK

DOCK_IN

EZ_PWROK

12

R500

R500 1MR2

1MR2

4 4

3 3

2 2

1 1

91 92 62 61

93 94 64 63 95 96 66 65 97 98 68 67 99

100

70

69 101 102

72

71 103 104

74

73 105 106

76

75 107 108

78

77 109 110

80

79 111 112

82

81 113 114

84

83 115 116

86

85 117 118

88

87 119 120

90

89 123 124

FOX-CONN120-2-GP

20.80591.120

SB 0127

ME : 20.80591.120

3D3V_S5

U58

1 2

A B GND3Y

NC7SZ08-U

VCC

5

4

B

126 1

2 31 32

3 4 33 34 5 6 35 36 7 8 37 38 9 10 39 40 11 12 41 42 13 14 43 44 15 16 45 46 17 18 47 48 19 20 49 50 21 22 51 52 23 24 53 54 25 26 55 56 27 28 57 58 29 30 59 60 122 121

125

D_TTGP0 D_TTGN0

D_RTGP1

D_TGP2

D_RTGN1

D_TGN2

D_TGP3 D_TGN3 PSTROB# PAUTOFD#

DOCK_JACK_IN PPD0 PERROR#

PPD1 PINIT#

PPD2 PSLCTIN#

PPD3 PPD4

PPD5 PPD6

PPD7 PACK#

PBUSY PPE

PSLCT SUSON

MAINON

1 2

DOCK_AD+

LUSB1# 21

?10K PULL TOO SLOW - 0324

R6

1KR2R61KR2

Function SYSTEM L DOCK H

DOCK_ON_1 30

PPD[7..0] 58

D_TTGP0 30 D_TTGN0 30

ACT_LED# 29,30

D_RTGP1 30

D_TGP2 30 D_RTGN1 30

D_TGN2 30

FOR LINK LED (GREEN)

D_TGP3 30 D_TGN3 30

PSTROB# 58 PAUTOFD# 58

DOCK_JACK_IN 33

PERROR# 58

SPDIF 32,33

RI1#_5 37

PINIT# 58 DTR1_BOUT1_5 37 CTS1#_5 37

PSLCTIN# 58

SOUT1_5 37

RTS1#_5 37

SIN1_5 37 DSR1#_5 37

DCD1#_5 37

PACK# 58

PS2_KDAT 34 PS2_KCLK 34

PBUSY 58

PPE 58

PS2_MDAT 34 PS2_MCLK 34

PSLCT 58

LUSB2# 21

R5 10KR2R5 10KR2

1 2

D2

1 2

CLK_PCIE_DOCK2 3

CLK_PCIE_DOCK2# 3

PCIE_TXP1 12 PCIE_TXN1 12

LAN

BAT54-1D2BAT54-1

R507

1 2

10KR2

3

5V_S0

1

10M_LED# 29,30

SC 0309

3D3V_S0

PCIRST_BUF# 15,18,26,28,29,31

12

R508

R508 10KR2

10KR2

DOCK_ON_2#

3

Q25

Q25 CHT2222A

CHT2222A

2

Dummy when no EZ4

B

C

12

C9

C9 SCD1U16V

SCD1U16V

RN83

DIS_COMP49 DIS_LUMA49 DIS_CRMA49

UMA_LUMA13 UMA_CRMA13 UMA_COMP13

1 2 3 4 5

SRN0-1-U

Dummy when use UMA

RN93

1 2 3 4 5

SRN0-1-U

Dummy when use Discrete

CRT SWITCH

12

C4

C4 SCD1U16V

SCD1U16V

RN86

DIS_R49 DIS_G49 DIS_B49

UMA_G13 UMA_B13 UMA_R13

Dummy when use Discrete

C

1 2 3 4 5

SRN0-1-U

Dummy when use UMA

RN85

1 2 3 4 5

SRN0-1-U

CTS1#_5 SIN1_5 DSR1#_5 DCD1#_5

123

45

RC14

678

SRC100P50V-U

Dummy when no EZ4

D

TV SWITCH

5V_S0

TV_COMP

8

TV_LUMA

7

TV_CRMA

6

CRT_R_1 CRT_G_1 CRT_B_1

CRT_G_1 CRT_B_1 CRT_R_1

0R0402-PAD

R7

1 2

SC 0308

TV_CRMA

DOCK_TV_ON#DOCK_ON_2#

8

TV_LUMA

7

TV_CRMA

6

TV_COMP

SC 0308

0R0402-PAD

R15

1 2

8 7 6

DOCK_ON_2# DOCK_CRT_ON#

SOUT1_5

DTR1_BOUT1_5

RI1#_5

RTS1#_5

123

45

RC15

678

SRC100P50V-U

4 5 6

Dummy when no EZ4

TV_COMP TV_LUMA TV_CRMA

5V_S0

CRT_G_1 CRT_G_DOCK

CRT_B_1

CRT_R_1

CRT_G_1 CRT_B_1 CRT_R_1

PM_SLP_S5#21,34,44

D

E

NC7SB3157P6X-U

U3

B0

A

GND

VCC

B1

S

NC7SB3157P6X-U

U4

B0

A

GND

VCC

B1

S

NC7SB3157P6X-U

U5

B0

A

GND

VCC

B1

S

Dummy when use EZ4

TV_COMP_DOCK

3 2 1

TV_LUMA_DOCKTV_LUMA

3 2 1

TV_CRMA_DOCK

3 2 1

1 2 3 4 5

RN84 SRN0-1-URN84 SRN0-1-U

TV_COMP_SYS 16

TV_LUMA_SYS 16

TV_CRMA_SYS 16

8 7 6

Function SYSTEM H

NC7SB3157P6X-U

U7

B0

GND

B1

NC7SB3157P6X-U

B0

GND

B1

NC7SB3157P6X-U

B0

GND

B1

RN87

1 2 3 4 5

3D3V_S5

3 2 1

CRT_B_DOCK

3 2 1

CRT_R_DOCK

3 2 1

SRN0-1-U

8 7 6

PM_SLP_S3#18,21,34,38,39,43,44,55

EZIN_EM#

U40B

14

4

5 6

7

SUSON

TSLCX125

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

EASY PORT4 (1/2)

Bolsena -1

3D3V_S5

9 8

Dummy when no EZ4

E

4

A

5

VCC

6

S

U8

4

A

5

VCC

6

S

U6

4

A

5

VCC

6

S

Dummy when no EZ4

Dummy when use EZ4

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

Function A to B0 A to B1

CRT

LDOCK

CRT_G_SYS 16

CRT_B_SYS 16

CRT_R_SYS 16

EZIN_EM#

14

10

7

of

57 58Thursday, March 31, 2005

U40C

MAINON

TSLCX125

S L H

TV

H L

PRINT PORT

PPD[7..0]57

EZ4_PD[7..0]37

RN9

PRINIT#_537

SLCTIN#_537

PRNACK#_537

BUSY_537 SLCT_537 PE_537

STROB#_537

AUTOFD#_537

ERROR#_537

1

EZ4_PD2 PPD2

2 3

EZ4_PD3 PPD3

4 5

SRN33

SRN33 RN11

RN11

1 2 3 4 5

SRN33

1 2

RN10

EZ4_PD4 PPD4 EZ4_PD5 PPD5 EZ4_PD7 EZ4_PD6 PPD6

EZ4_PD0 PPD0 EZ4_PD1 PPD1

RN10

1 2 3 4 5

SRN33

RN8

1 2 3 4 5

SRN33

R511

R511 33R2

33R2

8 7 6

PINIT# PSLCTIN#

PACK# PBUSY PSLCT PPE

PSTROB#

PPD7

PAUTOFD#

PERROR#

PINIT# 57 PSLCTIN# 57

PACK# 57 PBUSY 57 PSLCT 57 PPE 57

PSTROB# 57

PAUTOFD# 57

PERROR# 57

EZ4_PD1 ERROR#_5 EZ4_PD0 AUTOFD#_5

PE_5 SLCT_5 BUSY_5 PRNACK#_5

STROB#_5

5V_S0

D30

CH751H-40-U

RP5

1 2 3 4 5 6

SRP1K

RP6

1 2 3 4 5 6

SRP1K

R512

1 2

1KR2

Place near Dock1

PRN5V

21

10 9 8 7

1 2

PRINIT#_5 EZ4_PD2 SLCTIN#_5 EZ4_PD3

EZ4_PD4 EZ4_PD5 EZ4_PD6 EZ4_PD7

C685

C685 SCD1U16V

SCD1U16V C669

C669 SCD1U16V

SCD1U16V

PPD3

PSLCTIN#

PPD2 PINIT# PSLCT PPE PBUSY PACK#

PSTROB# PPD6 PPD7 PPD5 PPD4 PPD1 PERROR# PPD0 PAUTOFD#

RC10

123

45

RC13

678

SRC100P50V-U

123

45

678

SRC100P50V-U

45

678

SRC100P50V-U

45

RC12

678

SRC100P50V-U

Place near Dock1

123

RC11

123

12

C660

C660 SC100P50V2JN

SC100P50V2JN

For EMI

cap. between moat (for UMA RGB signal)

1D2V_S0 1D8V_S0 5V_S0

C962

1 2

SCD1U16V

C961

1 2

SCD1U16V

C962

SB 0213

1 2

SCD1U16V

C963

Dummy when no EZ4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

EASY PORT4 (2/2)

Bolsena

of

58 58Thursday, March 31, 2005

-1

Acer Aspire 5020 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual