Acer Aspire 4336z, Aspire 4736z, Aspire 4937z Schematics

A
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1 1
B
C
D
E
Compal Confidential
KALG1 M/B Schematics Document
2 2
Intel Penryn Processor with Cantiga + DDRIII + ICH9M
2009-03-02
REV 02
3 3
4 4
Security Classification
Security Classification
A
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2008/11/10 2008/11/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
KALG1
KALG1
KALG1
0.1
0.1
1 45Tuesday, March 24, 2009
1 45Tuesday, March 24, 2009
1 45Tuesday, March 24, 2009
E
0.1
A
B
C
D
E
Compal Confidential
Model Name : KALG1
File Name : LA-5271P
1 1
Fan Control
page 4
Intel Penryn Processor
uPGA-478 Package
(Socket P)
page 4,5,6
Thermal Sensor
EMC 1402
page 4
Clock Generator
ICS9LPRS387
page 16
H_A#(3..35) H_D#(0..63)
HDMI Conn.
page 24
TMDS
LCD Conn.
page 17
CRT Conn.
page 18
LVDS
LVDS
HDMI
ASM1442T
page 24
PCI-Express
DMI
2 2
PCI-Express
S-ATA
LAN(GbE)
ATHEROS AR8131
page 26
RJ45
page 27
3 3
MINI Card x1
WLAN
page 28
NEW Card
page 28
ESATA Conn.
page 29
port 2
port 1
CDROM Conn.
page 23
port 0
SATA HDD Conn.
page 23
FSB
667/800/1066MHz
Intel Cantiga
uFCBGA-1329
page 7,8,9,10,11,12,13
C-Link
Intel ICH9-M
BGA-676
page 20,21,22,23
LPC BUS
Memory BUS(DDRIII)
Dual Channel
1.5V DDRIII 800
USB conn x3
USB port 0, 1, 6
3.3V 48MHz
3.3V 24.576MHz/48Mhz
USB
GMCH HDA
page 08
204pin DDRIII-SO-DIMM X2
page 14,15
CMOS Camera
HDA Codec
ALC888S-VC
page 33
Audio AMP
APA2051
page 34
Bluetooth Conn
page 29page 29
MDC 1.5 Conn
page 32
BANK 0, 1, 2, 3
HD Audio
LS-4494P
Finger Print
AES1610
page 29page 17
Card Reader RTS5159-GR
page 25
ENE KB926
page 30
Phone Jack x3
page 34
RTC CKT.
page 20
Touch Pad
Power On/Off CKT.
page 32
DC/DC Interface CKT.
page 37
4 4
page 31
BIOS
page 31
Int.KBD
page 31
CIR
page 30
Power Circuit DC/DC
page 38,39,40,41,42,43
Security Classification
Security Classification
POWER SW
A
Page 36
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2008/11/10 2008/11/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
KALG1
KALG1
KALG1
0.1
0.1
2 45Tuesday, March 24, 2009
2 45Tuesday, March 24, 2009
2 45Tuesday, March 24, 2009
E
0.1
A
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Voltage Rails
Power Plane Description
VIN
1 1
2 2
B+
+CPU_CORE
+0.75VS 0.75VS power rail for DDR3 terminator
+1.05VS
+1.5V 1.5V power rail for HDA
+1.8V 1.8V power rail for NB(LVDS) ON OFFON
+3VALW 3.3V always on power rail ON ON ON*
+3V_LAN 3.3V power rail for LAN ON ON ON
+3V 3.3V power rail for SB ON ON OFF
+3VS 3.3V switched power rail OFFON OFF
+5VALW 5V always on power rail ON ON ON*
+5V 5V power rail for SB ON ON OFF
+5VS 5V switched power rail OFFON OFF
+VSB VSB always on power rail ON
+RTCVCC RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
1.05V switched power rail
B
S1 S3 S5
N/A N/A N/A
ON OFF
ON OFF
ON OFF OFF
ON ON OFF
ON OFF OFF+1.5VS 1.5V switched power rail
ON ON
N/AN/AN/A
OFF
OFF
ON ON*
ON
C
STATE
SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
LOW
LOW LOW LOW LOW
HIGH
LOWLOWLOW
D
HIGHHIGHHIGH
HIGH
HIGH
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0 0 0 V 1 2 3 4 5 6 7
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
AD_BID
ON
ON
ON
ON
ON
V typ
AD_BID
0 V 0 V
ON
ON
ON
OFF
OFF
V
AD_BID
ON ON
ON
OFF
OFF
OFF
max
E
LOW
OFF
OFF
OFF
BOARD ID Table
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
Board ID
0 1 2 3 4 5 6 7
PCB Revision
PCB 08Y LA-5271P REV0 M/B
EC SM Bus1 address
3 3
Device
Smart Battery
Address Address
EC SM Bus2 address
Device
EMC1402
1001 100X b0001 011X b
BTO Option Table
BTO Item BOM Structure
GL40 GL40@ GM45 GM45@
BOM Configuration Table
ICH9M SM Bus address
Device
Clock Generator (ICS9LPRS387, SLG8SP556V)
DDR3 DIMMA
DDR3 DIMMB
4 4
A
Address
1101 001Xb
1001 000Xb
1001 010Xb
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
Project BOM Configuration
KALG1-GM45 KALG1-GL40
C
GM45@/KALG1@/KAL90_G0_90+@ GL40@/KALG1@/KAL90_G0_90+@
Compal Secret Data
Compal Secret Data
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2008/11/10 2008/11/24
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
KALG1
KALG1
KALG1
0.1
0.1
3 45Tuesday, March 24, 2009
3 45Tuesday, March 24, 2009
3 45Tuesday, March 24, 2009
E
0.1
5
4
3
2
1
H_A#[3..35 ][7]
H_REQ#[0 ..4][7]
H_RS#[0..2 ][7]
H_A#[3..35 ]
H_REQ#[0 ..4]
H_RS#[0..2 ]
FAN1 Conn
JCPU1A
AA4 AB2 AA3
D22
K5 M3 N2
N3 P5 P2
P4 P1 R1 M1
K3 H2 K2
Y2 U5 R3
W6
U4 Y5 U1 R4 T5
T3 W2 W5
Y4
U2
V4 W3
V1
A6
A5
C4
D5
C6
B4
A3
M4
N5
T2
V3
B2
D2
D3
F6
J4 L5 L4
J1
L2
J3 L1
JCPU1A
A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#
REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#
A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]
ADDR GROUP_0
ADDR GROUP_0
ADDR GROUP_1
ADDR GROUP_1
THERMAL
THERMAL
ICH
ICH
THERMTRIP#
RESERVED
RESERVED
ADS# BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TCK
TDO TMS
TRST#
DBR#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
PROCHOT#
THERMDA THERMDC
H CLK
H CLK
BCLK[0] BCLK[1]
H1 E2 G5
H5 F21 E1
F1
H_IERR#
D20 B3
H4
H_RESET #
C1
H_RS#0
F3
H_RS#1
F4
H_RS#2
G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2
XDP_BPM #5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
TDI
AB3
XDP_TMS
AB5
XDP_TRS T#
AB6
XDP_DBR ESET#
C20
H_PROCH OT#
D21
H_THERM DA
A24
H_THERM DC
B25
C7
A22 A21
Layout Note: H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil
H_ADS# [7] H_BNR# [7] H_BPRI# [7 ]
H_DEFER # [7] H_DRDY# [7] H_DBSY# [7]
H_BR0# [7 ]
H_INIT# [20]
H_LOCK# [7 ]
H_RESET # [7]
H_TRDY# [7]
H_HIT# [7] H_HITM# [7]
XDP_DBR ESET# [21]
H_THERM TRIP# [8,20]
CLK_CPU _BCLK [16] CLK_CPU _BCLK# [16 ]
EN_DFAN 1[30]
+1.05VS
12
R48 56_0402 _5%
56_0402 _5%
B
B
2
E
E
3 1
C
C
Q5
Q5 MMBT390 4_SOT23-3
MMBT390 4_SOT23-3
@
@
+VCC_FA N1
R43
R43
300_040 2_5%
300_040 2_5%
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
@R48
@
OCP# [21 ]
D D
H_ADSTB #0[7]
C C
H_ADSTB #1[7]
H_A20M#[2 0]
H_FERR#[20]
H_IGNNE#[20]
H_STPCL K#[20]
H_INTR[20]
H_NMI[20]
H_SMI#[20]
B B
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
+5VS
12
1
C73
C73
2
C81 10U_ 0805_10V4ZC81 10U_ 0805_10V4Z
U4
U4
1
VEN
2
VIN
3
VO
4
VSET
APL5605 KI-TRL SOP 8P
APL5605 KI-TRL SOP 8P
FAN_SPE ED1[30]
1 2
GND GND GND GND
XDP_TDI
8 7 6 5
+3VS
12
R46
R46 10K_040 2_5%
10K_040 2_5%
1
C83
C83 1000P_0 402_50V7K
1000P_0 402_50V7K
2
R108 54.9_040 2_1%R108 54.9_040 2_1%
1 2
40mil
+VCC_FA N1
+5VS
12
D16
D16 1SS355_ SOD323-2
1SS355_ SOD323-2
1 2
10U_080 5_10V4Z
10U_080 5_10V4Z
1000P_0 402_50V7K
1000P_0 402_50V7K
D15
D15
BAS16_S OT23-3
BAS16_S OT23-3 C88
C88
1 2
C82
C82
1 2
ACES_85 205-03001
ACES_85 205-03001
CONN@
CONN@
+1.05VS
JP27
JP27
1 2 3
left NC if no ITP
XDP_TMS
XDP_BPM #5
H_PROCH OT#
H_IERR#
R109 54.9_040 2_1%R109 54.9_040 2_1%
1 2
R117 54.9_040 2_1%@R117 54.9_040 2_1%@
1 2
R53 56_0402 _5%R53 56_0402 _5%
R52 56_0402 _5%R52 56_0402 _5%
12
12
39Ohm
Penryn
Penryn
CONN@
CONN@
+3VS
H_THERM DA
1
C92
C92
2200P_0 402_50V7K
2200P_0 402_50V7K
A A
BSEL2 BSEL1 BSEL0 BCLK
2
H_THERM DC
0 0 0 266
0 1 0 200
1
5
1660 1
4
Security Class ification
Security Class ification
Security Class ification
2008/11/ 10 20 08/11/24
2008/11/ 10 20 08/11/24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/ 10 20 08/11/24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
XDP_TRS T#
XDP_TCK
C90
C90
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
1 2
U5
U5
1
VDD
2
DP
3
DN
4
THERM#
EMC1402 -1-ACZL-TR_MSOP 8
EMC1402 -1-ACZL-TR_MSOP 8
2
R107 54.9_040 2_1%R107 54.9_040 2_1%
R116 54.9_040 2_1%R116 54.9_040 2_1%
8
SMCLK
7
SMDATA
6
ALERT#
5
GND
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
B
B
B
12
1 2
R49
R49 10K_040 2_5%
10K_040 2_5%
KALG1
KALG1
KALG1
EC_SMB_ CK2 [30,31 ]
EC_SMB_ DA2 [30,31 ]
+3VS
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Penryn (1/3) & FAN Conn
Penryn (1/3) & FAN Conn
Penryn (1/3) & FAN Conn
1
0.1
0.1
0.1
4 45Tuesday, March 24, 2 009
4 45Tuesday, March 24, 2 009
4 45Tuesday, March 24, 2 009
5
hexainf@hotmail.com GRATIS - FOR FREE
4
3
2
1
H_D#[0..63 ]
JCPU1B
H_D#0
PAD
PAD
PAD
PAD
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
GTL_REF 0
@
@
@
@
TEST1 TEST2 TEST3 TEST4 TEST5
D D
H_DSTBN #0[7] H_DSTBN #2 [7] H_DSTBP #0[7] H_DSTBP#2 [7]
H_DINV#0[7]
C C
Trace Close CPU < 0.5'
Width=4 mil , Spacing: 15mil (55Ohm)
R385
R385 1K_0402 _1%
1K_0402 _1%
R386
R386 2K_0402 _1%
2K_0402 _1%
+1.05VS
1 2
1 2
H_DSTBN #1[7] H_DSTBN #3 [7] H_DSTBP #1[7] H_DSTBP#3 [7]
H_DINV#1[7]
R54 1K_0402 _5%@R54 1K_0402 _5%@ R55 1K_0402 _5%@R55 1K_0402 _5%@
C457 0.1U_040 2_16V4Z
C457 0.1U_040 2_16V4Z
@
@
1 2
12 12
T28
T28
T31
T31
CPU_BSE L0[16] CPU_BSE L1[16] CPU_BSE L2[16]
E22 F24 E26
G22
F23
G25
E25 E23 K24
G24
H22
F26 K22
H23
H26 H25
N22
K25 P26
R23
L23
M24
L22
M23
P25 P23 P22 T24
R24
L25 T25
N25
L26 M26 N24
AD26
C23 D25 C24
AF26
AF1
A26
B22
B23 C21
J24 J23
J26
C3
JCPU1B
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]
Penryn
Penryn
MISC
MISC
CONN@
CONN@
DATA GRP 0
DATA GRP 0
DATA GRP 1
DATA GRP 1
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#
DATA GRP 2DATA GRP 3
DATA GRP 2DATA GRP 3
D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]#
COMP[0] COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP# DPWR#
PWRGOOD
SLP#
PSI#
Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0 COMP1 COMP2 COMP3
H_PW RGOOD H_CPUSL P#
H_DINV#2 [7]
R51 27.4_040 2_1%R51 27.4_040 2_1% R50 54.9_040 2_1%R50 54.9_040 2_1% R105 27.4_040 2_1%R105 27.4_040 2_1% R106 54.9_040 2_1%R106 54.9_040 2_1%
H_DINV#3 [7]
1 2 1 2 1 2 1 2
H_DPRST P# [8,20,4 3] H_DPSLP # [20] H_DPW R# [7] H_PW RGOOD [20] H_CPUSL P# [7 ] PSI# [43]
H_D#[0..63 ] [7 ]
+CPU_CO RE
TRACE CLOSELY CPU < 0.5'
COMP0, COMP2 layout : Width 16mils and Space 25mils (27.4Ohms)
B B
COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)
A10 A12 A13 A15 A17 A18 A20
B10 B12 B14 B15 B17 B18 B20
C10 C12 C13 C15 C17 C18
D10 D12 D14 D15 D17 D18
E10 E12 E13 E15 E17 E18 E20
F10 F12 F14 F15 F17 F18 F20 AA7
AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20
AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18
A7 A9
B7 B9
C9
D9
E7 E9
F7 F9
JCPU1C
JCPU1C
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
Penryn
Penryn
VCCSENSE
VSSSENSE
CONN@
CONN@
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA[01] VCCA[02]
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6 AF5 AE5 AF4 AE3 AF3 AE2
AF7
AE7
.
.
+CPU_CO RE
VCCSENS E
VSSSENS E
C425
CPU_VID0 [43] CPU_VID1 [43] CPU_VID2 [43] CPU_VID3 [43] CPU_VID4 [43] CPU_VID5 [43] CPU_VID6 [43]
R88 100_040 2_1%R88 100_040 2_1%
R89 100_040 2_1%R89 100_040 2_1%
0.01U_04 02_16V7K
0.01U_04 02_16V7K
1 2
1 2
C425
+1.05VS
20mils
1
C426
C426
2
10U_080 5_10V4Z
10U_080 5_10V4Z
VCCSENS E [43 ]
VSSSENS E [43]
+1.5VS
1
2
+CPU_CO RE
A A
Security Class ification
Security Class ification
5
Security Class ification
2008/11/ 10 20 08/11/24
2008/11/ 10 20 08/11/24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/ 10 20 08/11/24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
KALG1
KALG1
KALG1
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Penryn (2/3)
Penryn (2/3)
Penryn (2/3)
5 45Tuesday, March 24, 2 009
5 45Tuesday, March 24, 2 009
5 45Tuesday, March 24, 2 009
1
0.1
0.1
0.1
5
JCPU1D
JCPU1D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
D D
C C
B B
A A
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080] VSS[081]P3VSS[162]
Penryn
Penryn
CONN@
CONN@
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]
VSS[163]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
.
.
4
+CPU_CO RE
1
2
10U_0805_6.3V6M
10U_0805_6.3V6M
+1.05VS
PVT
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
C445
C445
1
+
+
2
C182
C182
1
C446
C446
2
10U_0805_6.3V6M
10U_0805_6.3V6M
3
+CPU_CO RE
1
2
+
+
C145
C145 900P_PF AF250E128MNT TE_2.5VM
900P_PF AF250E128MNT TE_2.5VM
3 4
1
C447
C447
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C444
C444
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C428
C428
1
C429
C429
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C449
C449
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C441
C441
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C448
C448
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C440
C440
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C427
C427
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C430
C430
1
C431
C431
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C432
C432
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
Security Class ification
Security Class ification
Security Class ification
2008/11/ 10 20 08/11/24
2008/11/ 10 20 08/11/24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/ 10 20 08/11/24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Penryn (3/3)
Penryn (3/3)
Penryn (3/3)
KALG1
KALG1
KALG1
0.1
0.1
0.1
6 45Tuesday, March 24, 2 009
6 45Tuesday, March 24, 2 009
6 45Tuesday, March 24, 2 009
1
5
hexainf@hotmail.com GRATIS - FOR FREE
4
3
2
1
U21A
H_D#[0..63 ][5]
D D
C C
+1.05VS
12
R349
R350
R350
100_0402_1%
100_0402_1%
R349 221_040 2_1%
221_040 2_1%
1 2
1
C413
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
2
width=10mil
C409
C409
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@C413
@
width=10mil
12
R351
R351
24.9_040 2_1%
24.9_040 2_1%
H_RESET #[4]
H_CPUSL P#[5]
within 100mil to Ball A11,B11
B B
+1.05VS
R353
R353 1K_0402 _1%
1K_0402 _1%
width:spacing=10mil:20mil (<0.5")
R352
R352 2K_0402 _1%
2K_0402 _1%
1 2
12
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SW ING H_RCOMP
H_RESET # H_CPUSL P#
H_AVREF
U21A
F2
H_D#_0
G8
H_D#_1
F8
H_D#_2
E6
H_D#_3
G2
H_D#_4
H6
H_D#_5
H2
H_D#_6
F6
H_D#_7
D4
H_D#_8
H3
H_D#_9
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
AD14
H_D#_33
Y6
H_D#_34
Y10
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
AA8
H_D#_40
Y9
H_D#_41
AA13
H_D#_42
AA9
H_D#_43
AA11
H_D#_44
AD11
H_D#_45
AD10
H_D#_46
AD13
H_D#_47
AE12
H_D#_48
AE9
H_D#_49
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
H_D#_53
AD7
H_D#_54
AE14
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
AE11
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
C5
H_SWING
E3
H_RCOMP
C12
H_CPURST#
E11
H_CPUSLP#
A11
H_AVREF
B11
H_DVREF
CANTIGA B3 _FCBGA1329
CANTIGA B3 _FCBGA1329
H_ADSTB#_0 H_ADSTB#_1
H_BREQ#
H_DEFER#
HOST
HOST
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_LOCK# H_TRDY#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_HIT#
H_HITM#
GM45@
GM45@
A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20
H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9
J8 L3 Y13 Y1
L10 M7 AA5 AE6
L9 M8 AA6 AE5
B15 K13 F13 B13 B14
B6 F12 C8
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_ADS# H_ADSTB #0 H_ADSTB #1 H_BNR# H_BPRI# H_BR0# H_DEFER # H_DBSY# CLK_MCH _BCLK CLK_MCH _BCLK# H_DPW R# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN #0 H_DSTBN #1 H_DSTBN #2 H_DSTBN #3
H_DSTBP #0 H_DSTBP #1 H_DSTBP #2 H_DSTBP #3
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
H_A#[3..35 ] [4]
H_ADS# [4] H_ADSTB #0 [4] H_ADSTB #1 [4] H_BNR# [4] H_BPRI# [4 ] H_BR0# [4 ] H_DEFER # [4] H_DBSY# [4] CLK_MCH _BCLK [16] CLK_MCH _BCLK# [16] H_DPW R# [5] H_DRDY# [4] H_HIT# [4] H_HITM# [4] H_LOCK# [4 ] H_TRDY# [4]
H_DINV#0 [5] H_DINV#1 [5] H_DINV#2 [5] H_DINV#3 [5]
H_DSTBN #0 [5] H_DSTBN #1 [5] H_DSTBN #2 [5] H_DSTBN #3 [5]
H_DSTBP #0 [5] H_DSTBP #1 [5] H_DSTBP #2 [5] H_DSTBP #3 [5]
H_REQ#[0 ..4] [4]
H_RS#[0..2 ] [4 ]
A A
Security Class ification
Security Class ification
5
Security Class ification
2008/11/ 10 20 08/11/24
2008/11/ 10 20 08/11/24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/ 10 20 08/11/24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cantiga GMCH(1/7)-GTL
Cantiga GMCH(1/7)-GTL
Cantiga GMCH(1/7)-GTL
KALG1
KALG1
KALG1
0.1
0.1
0.1
7 45Tuesday, March 24, 2 009
7 45Tuesday, March 24, 2 009
7 45Tuesday, March 24, 2 009
1
5
D D
All RSVD balls on GMCH should be left No Connect.
C C
MCH_CLKSEL0[16] MCH_CLKSEL1[16] MCH_CLKSEL2[16]
PM_EXTTS#0
VGATE[16,21,43]
+1.05VS
12
R61
R61
54.9_0402_1%
54.9_0402_1%
R58
R58
1 2
330_0402_5%
330_0402_5%
1 2
R94 10K_0402_5%R94 10K_0402_5%
R84 10K_0402_5%R84 10K_0402_5%
R93 10K_0402_5%R93 10K_0402_5%
H_DPRSTP#[5,20,43] PM_EXTTS#0[14] PM_EXTTS#1[15]
H_THERMTRIP#[4,20]
PM_DPRSLPVR[21,43]
PM_EXTTS#1
1 2
MCH_CLKREQ#
1 2
Use VGATE for GMCH_PWROK
PM_SYNC#[21]
5
PLT_RST#[19,26,30]
VGATE
ICH_PWROK
2
B
B
@
@
1 2
R101 0_0402_5%
R101 0_0402_5%
1 2
R100 0_0402_5%R100 0_0402_5%
R110 0_0402_5%R110 0_0402_5% R64 0_0402_5%R64 0_0402_5%
R62 100_0402_5%R62 100_0402_5% R70 0_0402_5%R70 0_0402_5% R111 0_0402_5%R111 0_0402_5%
+3VS
12
R57
R57 1K_0402_5%
1K_0402_5%
C
C
Q7
Q7 MMBT3904_SOT23-3
MMBT3904_SOT23-3
E
E
3 1
1 2 1 2
1 2 1 2 1 2
+3VS
2
B
B
E
E
12
C
C
3 1
GMCH_PWROK
R56
R56 1K_0402_5%
1K_0402_5%
Q6
Q6 MMBT3904_SOT23-3
MMBT3904_SOT23-3
+3VS
ICH_PWROK[21]
B B
A A
MCH_TSATN#
MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2
MCH_CFG_5 MCH_CFG_6 MCH_CFG_7
MCH_CFG_9 MCH_CFG_10
MCH_CFG_12 MCH_CFG_13
MCH_CFG_16
MCH_CFG_19 MCH_CFG_20
PM_SYNC#_R PM_DPRSTP#_R PM_EXTTS#0 PM_EXTTS#1 GMCH_PWROK MCH_RSTIN# THERMTRIP#_R DPRSLPVR_R
MCH_TSATN_EC# [30]
4
U21B
U21B
M36
RSVD1
N36
RSVD2
R33
RSVD3
T33
RSVD4
AH9
RSVD5
AH10
RSVD6
AH12
RSVD7
AH13
RSVD8
K12
RSVD9
AL34
RSVD10
AK34
RSVD11
AN35
RSVD12
AM35
RSVD13
T24
RSVD14
B31
RSVD15
B2
RSVD16
M1
RSVD17
AY21
RSVD20
BG23
RSVD22
BF23
RSVD23
BH18
RSVD24
BF18
RSVD25
T25
CFG_0
R25
CFG_1
P25
CFG_2
P20
CFG_3
P24
CFG_4
C25
CFG_5
N24
CFG_6
M24
CFG_7
E21
CFG_8
C23
CFG_9
C24
CFG_10
N21
CFG_11
P21
CFG_12
T21
CFG_13
R20
CFG_14
M20
CFG_15
L21
CFG_16
H21
CFG_17
P29
CFG_18
R28
CFG_19
T28
CFG_20
R29
PM_SYNC#
B7
PM_DPRSTP#
N33
PM_EXT_TS#_0
P32
PM_EXT_TS#_1
AT40
PWROK
AT11
RSTIN#
T20
THERMTRIP#
R32
DPRSLPVR
BG48
NC_1
BF48
NC_2
BD48
NC_3
BC48
NC_4
BH47
NC_5
BG47
NC_6
BE47
NC_7
BH46
NC_8
BF46
NC_9
BG45
NC_10
BH44
NC_11
BH43
NC_12
BH6
NC_13
BH5
NC_14
BG4
NC_15
BH3
NC_16
BF3
NC_17
BH2
NC_18
BG2
NC_19
BE2
NC_20
BG1
NC_21
BF1
NC_22
BD1
NC_23
BC1
NC_24
F1
NC_25
A47
NC_26
CANTIGA B3_FCBGA1329
CANTIGA B3_FCBGA1329
4
RSVD CFG PM NC
RSVD CFG PM NC
GM45@
GM45@
DDR CLK/ CONTROL/ COMPENSATIONHDA
DDR CLK/ CONTROL/ COMPENSATIONHDA
DPLL_REF_SSCLK#
CLKDMIGRAPHICS VIDMEMISC
CLKDMIGRAPHICS VIDMEMISC
3
2
DDR3
M_CLK_DDR0
AP24
SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1
SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1
SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1
SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1
SA_ODT_0 SA_ODT_1 SB_ODT_O SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
PEG_CLK
PEG_CLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST# CL_VREF
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
AT21 AV24 AU20
AR24 AR21 AU24 AV20
BC28 AY28 AY36 BB36
BA17 AY16 AV16 AR13
BD17 AY17 BF15 AY13
BG22 BH21
BF28 BH28
AV42 AR36 BF17 BC36
B38 A38 E41 F41
F43 E43
AE41 AE37 AE47 AH39
AE40 AE38 AE48 AH40
AE35 AE43 AE46 AH42
AD35 AE44 AF46 AH43
B33 B32 G33 F33 E33
C34
AH37 AH36 AN36 AJ35 AH34
N28 M28 G36 E36 K36 H36
B12
B28 B30 B29 C29 A28
Issued Date
Issued Date
Issued Date
M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3
M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3
DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_CKE2_DIMMB DDR_CKE3_DIMMB
DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS2_DIMMB# DDR_CS3_DIMMB#
M_ODT0 M_ODT1 M_ODT2 M_ODT3
SMRCOMP SMRCOMP#
SM_RCOMP_VOH SM_RCOMP_VOL
DDR3_SM_PWROK SM_REXT SM_DRAMRST#
DDR3
CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC#
CLK_MCH_3GPLL CLK_MCH_3GPLL#
DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3
DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3
DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3
DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3
ICH_PWROK
CL_VREF
SDVO_SCLK SDVO_SDATA
MCH_CLKREQ#
MCH_TSATN#
HDA_BITCLK_MCH HDA_RST_MCH# HDA_SDIN2_MCH HDA_SDOUT_MCH HDA_SYNC_MCH
Notice: Please check HDA power rail to select HDA controller.
Notice: Please check HDA power rail to select HDA controller.
3
M_CLK_DDR0 [14] M_CLK_DDR1 [14] M_CLK_DDR2 [15] M_CLK_DDR3 [15]
M_CLK_DDR#0 [14] M_CLK_DDR#1 [14] M_CLK_DDR#2 [15] M_CLK_DDR#3 [15]
DDR_CKE0_DIMMA [14] DDR_CKE1_DIMMA [14] DDR_CKE2_DIMMB [15] DDR_CKE3_DIMMB [15]
DDR_CS0_DIMMA# [14] DDR_CS1_DIMMA# [14] DDR_CS2_DIMMB# [15] DDR_CS3_DIMMB# [15]
M_ODT0 [14] M_ODT1 [14] M_ODT2 [15] M_ODT3 [15]
R340 80.6_0402_1%R340 80.6_0402_1%
1 2
R339 80.6_0402_1%R339 80.6_0402_1%
1 2
SM_VREF
DDR3_SM_PWROK [32]
R338
R338
1 2
499_0402_1%
499_0402_1%
SM_DRAMRST# [14,15]
CLK_DREF_96M [16] CLK_DREF_96M# [16] CLK_DREF_SSC [16] CLK_DREF_SSC# [16]
CLK_MCH_3GPLL [16] CLK_MCH_3GPLL# [16]
DMI_ITX_MRX_N0 [21] DMI_ITX_MRX_N1 [21] DMI_ITX_MRX_N2 [21] DMI_ITX_MRX_N3 [21]
DMI_ITX_MRX_P0 [21] DMI_ITX_MRX_P1 [21] DMI_ITX_MRX_P2 [21] DMI_ITX_MRX_P3 [21]
DMI_MTX_IRX_N0 [21] DMI_MTX_IRX_N1 [21] DMI_MTX_IRX_N2 [21] DMI_MTX_IRX_N3 [21]
DMI_MTX_IRX_P0 [21] DMI_MTX_IRX_P1 [21] DMI_MTX_IRX_P2 [21] DMI_MTX_IRX_P3 [21]
CL_CLK0 [21] CL_DATA0 [21]
CL_RST#0 [21]
SDVO_SCLK [24]
SDVO_SDATA [24] MCH_CLKREQ# [16] MCH_ICH_SYNC# [21]
HDA_BITCLK_MCH [20] HDA_RST_MCH# [20]
HDA_SDOUT_MCH [20] HDA_SYNC_MCH [20]
Compal Secret Data
Compal Secret Data
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2008/11/10 2008/11/24
Compal Secret Data
SM_DRAMRST# would be needed for DDR3 only
For Cantiga
+1.5V +1.5V
20mil
DDR3
C171
C171
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C164
C164
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
R356 33_0402_5%R356 33_0402_5%
Deciphered Date
Deciphered Date
Deciphered Date
80 Ohm
DDR3
R103
R103
1K_0402_1%
1K_0402_1%
1 2
1 2
R104 0_0402_5%
+1.05VS
1 2
1 2
1 2
R97
R97
R98
R98
R104 0_0402_5%
R102
R102 1K_0402_1%
1K_0402_1%
1K_0402_1%
1K_0402_1%
511_0402_1%
511_0402_1%
2
1
2
1
2
R343
R343
1K_0402_1%
1K_0402_1%
R342
R342
R341
R341
+V_DDR3_DIMM_REF
@
@
Strap Pin Table
CFG[2:0]
CFG5
CFG6
CFG9
CFG10
CFG[13:12]
CFG16
CFG19
(PCIE/SDVO select)
SDVO_CTRLDATA
L_DDC_DATA
DDPC_CTRLDATA
HDA_SDIN2 [20]
+1.5V
12
12
12
CFG20
1
DDR3
SM_RCOMP_VOH
SM_RCOMP_VOH
1
C387
C387
2
3.01K_0402_1%
3.01K_0402_1%
1
C384
C384
2
1K_0402_1%
1K_0402_1%
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_9
MCH_CFG_10
MCH_CFG_12
MCH_CFG_13
MCH_CFG_16
MCH_CFG_19
MCH_CFG_20
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
C386
C386
2
0.01U_0402_16V7K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
011 = FSB667 010 = FSB800 000 = FSB1067
0 = DMI x 2 1 = DMI x 4
0 = iTPM Host Interface is enabled
1 = iTPM Host Interface is Disabled 0 = Lane Reversal Enable
1 = Normal Operation (Default)
0 = PCIe Loopback Enable 1 = Disable*(Default)
00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation
0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled
0 = Normal Operation 1 = DMI Lane Reversal Enable
0 = No SDVO Card Present 1 = SDVO Card Present
0 = LFP Disable 1 = LFP Card Present; PCIE disable
0 = Digital DisplayPort Disable 1 = Digital DisplayPort Device Present
0.01U_0402_16V7K
SM_RCOMP_VOL
1
C385
C385
2
0.01U_0402_16V7K
0.01U_0402_16V7K
*
(Default)
*
(Default)
*
*
(Default)
*
0 = Only PCIE or SDVO is operational.
*
(Default)
1 = PCIE/SDVO are operating simu.
@
@
R355 2.21K_0402_1%
R355 2.21K_0402_1%
R77 4.02K_0402_1%
R77 4.02K_0402_1%
R78 2.21K_0402_1%
R78 2.21K_0402_1%
R66 2.21K_0402_1%
R66 2.21K_0402_1%
R67 2.21K_0402_1%
R67 2.21K_0402_1%
R69 2.21K_0402_1%
R69 2.21K_0402_1%
R71 2.21K_0402_1%
R71 2.21K_0402_1%
R68 2.21K_0402_1%
R68 2.21K_0402_1%
R86 4.02K_0402_1%
R86 4.02K_0402_1%
R87 4.02K_0402_1%
R87 4.02K_0402_1%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Cantiga GMCH(2/7)-DMI/DDR
Cantiga GMCH(2/7)-DMI/DDR
Cantiga GMCH(2/7)-DMI/DDR
KALG1
KALG1
KALG1
12
@
@
12
@
@
12
@
@
12
@
@
12
@
@
12
@
@
12
@
@
12
@
@
12
@
@
12
1
*
(Default)
*
*
*
8 45Tuesday, March 24, 2009
8 45Tuesday, March 24, 2009
8 45Tuesday, March 24, 2009
(Default)
(Default)
(Default)
(Default)
+3VS
0.1
0.1
0.1
5
hexainf@hotmail.com GRATIS - FOR FREE
4
3
2
1
D D
DDR_A_D[0..63][14]
C C
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
AN38 AM38
AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36
AW36
BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12
AU10
BA11
AN10 AM11
AN12 AM13
AJ38 AJ41
AJ36 AJ40
BB9 BA9
AV9
BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5
AM5
AJ9 AJ8
AJ11 AJ12
U21D
U21D
SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63
CANTIGA B3_FCBGA1329
CANTIGA B3_FCBGA1329
DDR_A_BS0
BD21
SA_BS_0 SA_BS_1 SA_BS_2
SA_RAS# SA_CAS#
SA_WE#
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7
SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14
GM45@
GM45@
BG18 AT25
BB20 BD20 AY20
AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5
AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7
AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8
BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25
DDR_A_BS1 DDR_A_BS2
DDR_A_RAS# DDR_A_CAS# DDR_A_WE#
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14
DDR_A_BS0 [14] DDR_A_BS1 [14] DDR_A_BS2 [14]
DDR_A_RAS# [14] DDR_A_CAS# [14] DDR_A_WE# [14]
DDR_A_DM[0..7] [14]
DDR_A_DQS[0..7] [14]
DDR_A_DQS#[0..7] [14]
DDR_A_MA[0..14] [14]
DDR_B_D[0..63][15]
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
AM48
BG43
BG38
BG35
BG39 BG34
BG12
AK47 AH46 AP47 AP46 AJ46 AJ48
AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44
BF43 BE45 BC41 BF40 BF41
BF38 BH35
BH40
BH34 BH14
BH11
BH12 BF11
U21E
U21E
BG8
BF8 BG7 BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1
AL1 AL2
AJ1 AH1 AM2 AM3 AH3
AJ3
SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63
CANTIGA B3_FCBGA1329
CANTIGA B3_FCBGA1329
DDR_B_BS0
BC16
SB_BS_0 SB_BS_1 SB_BS_2
SB_RAS# SB_CAS#
SB_WE#
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7
SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14
GM45@
GM45@
BB17 BB33
AU17 BG16 BF14
AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2
AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6
AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5
AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33
DDR_B_BS1 DDR_B_BS2
DDR_B_RAS# DDR_B_CAS# DDR_B_WE#
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14
DDR_B_BS0 [15] DDR_B_BS1 [15] DDR_B_BS2 [15]
DDR_B_RAS# [15] DDR_B_CAS# [15] DDR_B_WE# [15]
DDR_B_DM[0..7] [15]
DDR_B_DQS[0..7] [15]
DDR_B_DQS#[0..7] [15]
DDR_B_MA[0..14] [15]
B B
A A
Security Classification
Security Classification
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
3
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2008/11/10 2008/11/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Cantiga GMCH(3/7)-DDR
Cantiga GMCH(3/7)-DDR
Cantiga GMCH(3/7)-DDR
KALG1
KALG1
KALG1
1
9 45Tuesday, March 24, 2009
9 45Tuesday, March 24, 2009
9 45Tuesday, March 24, 2009
of
of
of
0.1
0.1
0.1
5
ENBKL[30]
D D
R92
R92 100K_04 02_5%
100K_04 02_5%
C C
ENBKL
1 2
DPST_PW M[17]
GMCH_LC D_CLK[17]
GMCH_LC D_DATA[17]
GMCH_EN VDD[17]
1 2
R357 2.3 7K_0402_1%R357 2.3 7K_0402_1%
GMCH_TX CLK-[1 7] GMCH_TX CLK+[17]
GMCH_TX OUT0-[17] GMCH_TX OUT1-[17] GMCH_TX OUT2-[17]
GMCH_TX OUT0+[17] GMCH_TX OUT1+[17] GMCH_TX OUT2+[17]
Change to 0Ohm when use PM chip
GMCH_TV _CRMA
R75
R75
R74
R74
75_0402 _1%
75_0402 _1%
75_0402 _1%
B B
+3VS
R83 2.2K_040 2_5%R83 2.2K _0402_5%
1 2
R81 2.2K_040 2_5%R81 2.2K _0402_5%
1 2
R95 10K_040 2_5%R95 10K_040 2_5%
1 2
R85 10K_040 2_5%R85 10K_040 2_5%
1 2
R440 2.2 K_0402_5%R440 2.2 K_0402_5%
1 2
R447 2.2 K_0402_5%R447 2.2 K_0402_5%
1 2
75_0402 _1%
1 2
GMCH_CR T_B[18]
GMCH_CR T_G[18]
GMCH_CR T_R[18]
R76
R76 75_0402 _1%
75_0402 _1%
1 2
1 2
GMCH_CR T_HSYNC[18]
GMCH_CR T_VSYNC[18]
GMCH_LC D_CLK
GMCH_LC D_DATA
LCTLB_D ATA
LCTLA_C LK
GMCH_CR T_CLK
GMCH_CR T_DATA
Change to 0Ohm when use PM chip
R80 150_0402_1 %R80 150_0402_1 %
R73 150_0402_1 %R73 150_0402_1 %
R82 150_0402_1 %R82 150_0402_1 %
12
12
12
GMCH_CR T_CLK[18] GMCH_CR T_DATA[18]
4
LCTLA_C LK LCTLB_D ATA GMCH_LC D_CLK GMCH_LC D_DATA
LVDS_IBG
R91 0_0 402_5%R91 0_0402_ 5%
12
GMCH_TX CLK­GMCH_TX CLK+
GMCH_TX OUT0­GMCH_TX OUT1­GMCH_TX OUT2-
GMCH_TX OUT0+ GMCH_TX OUT1+ GMCH_TX OUT2+
GMCH_TV _COMPS GMCH_TV _LUMA
GMCH_CR T_CLK GMCH_CR T_DATA
R79
R79 1K_0402 _1%
1K_0402 _1%
1 2
CRT_IREF
U21C
U21C
L32
L_BKLT_CTRL
G32
L_BKLT_EN
M32
L_CTRL_CLK
M33
L_CTRL_DATA
K33
L_DDC_CLK
J33
L_DDC_DATA
M29
L_VDD_EN
C44
LVDS_IBG
B43
LVDS_VBG
E37
LVDS_VREFH
E38
LVDS_VREFL
C41
LVDSA_CLK#
C40
LVDSA_CLK
B37
LVDSB_CLK#
A37
LVDSB_CLK
H47
LVDSA_DATA#_0
E46
LVDSA_DATA#_1
G40
LVDSA_DATA#_2
A40
LVDSA_DATA#_3
H48
LVDSA_DATA_0
D45
LVDSA_DATA_1
F40
LVDSA_DATA_2
B40
LVDSA_DATA_3
A41
LVDSB_DATA#_0
H38
LVDSB_DATA#_1
G37
LVDSB_DATA#_2
J37
LVDSB_DATA#_3
B42
LVDSB_DATA_0
G38
LVDSB_DATA_1
F37
LVDSB_DATA_2
K37
LVDSB_DATA_3
F25
TVA_DAC
H25
TVB_DAC
K25
TVC_DAC
H24
TV_RTN
C31
TV_DCONSEL_0
E32
TV_DCONSEL_1
E28
CRT_BLUE
G28
CRT_GREEN
J28
CRT_RED
G29
CRT_IRTN
H32
CRT_DDC_CLK
J32
CRT_DDC_DATA
J29
CRT_HSYNC
E29
CRT_TVO_IREF
L29
CRT_VSYNC
CANTIGA B3 _FCBGA1329
CANTIGA B3 _FCBGA1329
3
PEG_COM P
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9
PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9
T37 T36
H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39
H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40
J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46
J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46
10mils
TMDS_B_ HPD#
PCIE_MTX_ GRX_N0 PCIE_MTX_ GRX_N1 PCIE_MTX_ GRX_N2 PCIE_MTX_ GRX_N3
PCIE_MTX_ GRX_P0 PCIE_MTX_ GRX_P1 PCIE_MTX_ GRX_P2 PCIE_MTX_ GRX_P3
PEG_COMPI
PEG_COMPO
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
GM45@
GM45@
PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8
PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
LVDS TV VGA
LVDS TV VGA
1 2
R96 49.9_0402_1 %R96 49.9_0402_1 %
1 2
C176 0.1U_0402_16V 7KC176 0.1U_0402_16V 7K
1 2
C401 0.1 U_0402_16V7KC401 0.1 U_0402_16V7K
CLOSE SPLIT POINT
1 2
C175 0.1 U_0402_16V7KC175 0.1 U_0402_16V7K
1 2
C402 0.1 U_0402_16V7KC402 0.1 U_0402_16V7K
2
TMDS_B_ HPD# [24]
C406 0.1U_040 2_16V7KC406 0.1U_040 2_16V7K
+1.05VS
1 2
C403 0.1 U_0402_16V7KC403 0.1 U_0402_16V7K
1 2
C177 0.1 U_0402_16V7KC177 0.1 U_0402_16V7K
HDMI_PCIE_MT X_C_GRX_N[0..3]
HDMI_PCIE_MT X_C_GRX_P[0..3]
1 2
1 2
C178 0.1U_0 402_16V7KC178 0.1U_0 402_16V7K
HDMI_PCIE_MT X_C_GRX_N0 HDMI_PCIE_MT X_C_GRX_N1 HDMI_PCIE_MT X_C_GRX_N2 HDMI_PCIE_MT X_C_GRX_N3
HDMI_PCIE_MT X_C_GRX_P0 HDMI_PCIE_MT X_C_GRX_P1 HDMI_PCIE_MT X_C_GRX_P2 HDMI_PCIE_MT X_C_GRX_P3
1
HDMI_PCIE_MT X_C_GRX_N[0..3] [24 ]
HDMI_PCIE_MT X_C_GRX_P[0..3] [24]
A A
Security Class ification
Security Class ification
Security Class ification
2008/11/ 10 20 08/11/24
2008/11/ 10 20 08/11/24
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/11/ 10 20 08/11/24
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Do cument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cantiga GMCH(4/7)-VGA/LVDS/TV
Cantiga GMCH(4/7)-VGA/LVDS/TV
Cantiga GMCH(4/7)-VGA/LVDS/TV
KALG1
KALG1
KALG1
10 45Tuesday, March 24 , 2009
10 45Tuesday, March 24 , 2009
10 45Tuesday, March 24 , 2009
1
0.1
0.1
0.1
5
hexainf@hotmail.com GRATIS - FOR FREE
U21F
+1.5V
D D
Reference PILLAR_ROCK CRB Rev1.0
Pins BA36, BB24, BD16, BB21, AW16, AW13, AT13 could be left NC for DDR2 board.
C C
VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16
VCC_SM_AW16
VCC_SM_AT13
+1.05VS
B B
@
@
PAD
PAD
T4
T4
@
@
PAD
PAD
T3
T3
A A
VCC_AXG_SENSE VSS_AXG_SENSE
5
U21F
2600mA
AP33
VCC_SM_1
AN33
VCC_SM_2
BH32
VCC_SM_3
BG32
VCC_SM_4
BF32
VCC_SM_5
BD32
VCC_SM_6
BC32
VCC_SM_7
BB32
VCC_SM_8
BA32
VCC_SM_9
AY32
VCC_SM_10
AW32
VCC_SM_11
AV32
VCC_SM_12
AU32
VCC_SM_13
AT32
VCC_SM_14
AR32
VCC_SM_15
AP32
VCC_SM_16
AN32
VCC_SM_17
BH31
VCC_SM_18
BG31
VCC_SM_19
BF31
VCC_SM_20
BG30
VCC_SM_21
BH29
VCC_SM_22
BG29
VCC_SM_23
BF29
VCC_SM_24
BD29
VCC_SM_25
BC29
VCC_SM_26
BB29
VCC_SM_27
BA29
VCC_SM_28
AY29
VCC_SM_29
AW29
VCC_SM_30
AV29
VCC_SM_31
AU29
VCC_SM_32
AT29
VCC_SM_33
AR29
VCC_SM_34
AP29
VCC_SM_35
BA36
VCC_SM_36/NC
BB24
VCC_SM_37/NC
BD16
VCC_SM_38/NC
BB21
VCC_SM_39/NC
AW16
VCC_SM_40/NC
AW13
VCC_SM_41/NC
AT13
VCC_SM_42/NC
Y26
VCC_AXG_1
AE25
VCC_AXG_2
AB25
VCC_AXG_3
AA25
VCC_AXG_4
AE24
VCC_AXG_5
AC24
VCC_AXG_6
AA24
VCC_AXG_7
Y24
VCC_AXG_8
AE23
VCC_AXG_9
AC23
VCC_AXG_10
AB23
VCC_AXG_11
AA23
VCC_AXG_12
AJ21
VCC_AXG_13
AG21
VCC_AXG_14
AE21
VCC_AXG_15
AC21
VCC_AXG_16
AA21
VCC_AXG_17
Y21
VCC_AXG_18
AH20
VCC_AXG_19
AF20
VCC_AXG_20
AE20
VCC_AXG_21
AC20
VCC_AXG_22
AB20
VCC_AXG_23
AA20
VCC_AXG_24
T17
VCC_AXG_25
T16
VCC_AXG_26
AM15
VCC_AXG_27
AL15
VCC_AXG_28
AE15
VCC_AXG_29
AJ15
VCC_AXG_30
AH15
VCC_AXG_31
AG15
VCC_AXG_32
AF15
VCC_AXG_33
AB15
VCC_AXG_34
AA15
VCC_AXG_35
Y15
VCC_AXG_36
V15
VCC_AXG_37
U15
VCC_AXG_38
AN14
VCC_AXG_39
AM14
VCC_AXG_40
U14
VCC_AXG_41
T14
VCC_AXG_42
AJ14
VCC_AXG_SENSE
AH14
VSS_AXG_SENSE
CANTIGA B3_FCBGA1329
CANTIGA B3_FCBGA1329
VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8
VCC SM
VCC SM
VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52
POWER
POWER
VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60
VCC GFX
VCC GFX
VCC SM LF
VCC SM LF
GM45@
GM45@
VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7
W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16
AV44 BA37 AM40 AV21 AY5 AM10 BB13
4
4
+1.05VS
VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7
C115
C115
3
2
1
Place close to the GMCH
VCC: 1930.4mA (GMCH), 1210.34mA (MCH)
+1.05VS
PVT
+1.05VS
PVT
+1.5V
1
+
+
C168
C168
PVT
2
Reference PILLAR_ROCK CRB Rev1.0
VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16 VCC_SM_AW16 VCC_SM_AT13
1
C114
C114
2
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C113
C113
C105
C105
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
2
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
C166
C166
C136
C136
2
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
(270UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)
1
1
+
+
2
220U_D2_4VY_R15M
220U_D2_4VY_R15M
1
+
+
C147
C147
2
Place close to the GMCH
VCC_SM: 2600mA (330UF*1, 22UF*2, 0.1UF*1)
C157
C157
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
C104
C104
@
@
1
2
C162
C162
C152
C93
C93
2
10U_0805_10V4Z
10U_0805_10V4Z
C152
C163
C163
0.1U_0402_16V4Z
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.1U_0402_16V4Z
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
Cavity Capacitors
VCC_AXG: 6326.84mA (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)
1
1
C132
C123
C123
C133
C133
2
1U_0402_6.3V6K
1U_0402_6.3V6K
0.47U_0603_16V4Z
0.47U_0603_16V4Z
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
C106
C106
2
10U_0805_10V4Z
10U_0805_10V4Z
Cavity Capacitors
C132
DDR3
1
1
1
C156
C156
C155
2
10U_0805_10V4Z
10U_0805_10V4Z
Place on the edge
1
C125
C125
2
0.1U_0402_16V7K
0.1U_0402_16V7K
C167
C167
0.47U_0603_16V4Z
0.47U_0603_16V4Z
3
C155
2
2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
C137
C137
C165
2
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
1
C170
C170
2
1U_0402_6.3V6K
1U_0402_6.3V6K
C165
2
@
@
1
2
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
Compal Secret Data
Compal Secret Data
Compal Secret Data
1
C151
C151
2
1
C135
C135
2
10U_0805_10V4Z
10U_0805_10V4Z
Deciphered Date
Deciphered Date
Deciphered Date
+1.05VS
1
1
C134
C134
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
U21G
U21G
AG34
VCC_1
AC34
VCC_2
AB34
VCC_3
AA34
VCC_4
Y34
VCC_5
V34
VCC_6
U34
VCC_7
AM33
VCC_8
AK33
VCC_9
AJ33
VCC_10
AG33
VCC_11
AF33
VCC_12
AE33
VCC_13
AC33
VCC_14
AA33
VCC_15
Y33
VCC_16
W33
VCC_17
V33
VCC_18
U33
VCC_19
AH28
VCC_20
AF28
VCC_21
AC28
VCC_22
AA28
VCC_23
AJ26
VCC_24
AG26
VCC_25
AE26
VCC_26
AC26
VCC_27
AH25
VCC_28
AG25
VCC_29
AF25
VCC_30
AG24
VCC_31
AJ23
VCC_32
AH23
VCC_33
AF23
VCC_34
T32
VCC_35
CANTIGA B3_FCBGA1329
CANTIGA B3_FCBGA1329
VCC CORE
VCC CORE
POWER
POWER
+1.05VS
VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8
VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28
VCC NCTF
VCC NCTF
VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44
GM45@
GM45@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Compal Electronics, Inc.
Cantiga GMCH(5/7)-VCC
Cantiga GMCH(5/7)-VCC
Cantiga GMCH(5/7)-VCC
KALG1
KALG1
KALG1
AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23
1
of
11 45Tuesday, March 24, 2009
11 45Tuesday, March 24, 2009
11 45Tuesday, March 24, 2009
0.1
0.1
0.1
5
4
3
2
1
L29
L29
+1.05VS
VCCA_HPLL: 24mA (4.7UF*1, 0.1UF*1)
D D
VCCA_MPLL: 139.2mA (22UF*1, 0.1UF*1)
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603
120Ohm@100MHz
L28
L28
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603
VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)
L32
L32
1 2
+3VS
MBK1608301YZF_0603
MBK1608301YZF_0603
1
PVT
+
+
0.1U_0402_16V4Z
C424
C424
220U_D2_4VY_R15M
220U_D2_4VY_R15M
C C
VCCA_DAC_BG: 2.6833333mA (0.1UF*1, 0.01UF*1)
+3VS
0.1U_0402_16V4Z
2
1 2
L10
L10 MBK1608221YZF_0603
MBK1608221YZF_0603
+1.05VS_HPLL
1
C391
C391
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+1.05VS_MPLL
12
R344
R344
0.5_0603_1%
0.5_0603_1%
1
C389
C389 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C418
C418
C417
C417
0.01U_0402_16V7K
0.01U_0402_16V7K
2
Close to Ball A26, B27
1
C415
C415
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C416
C416
2
2
0.01U_0402_16V7K
0.01U_0402_16V7K
1
C393
C393
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C103
C103
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS_CRTDAC
1
2
+3VS_DACBG
1
C423
C423
10U_0805_6.3V6M
10U_0805_6.3V6M
2
+1.05VS
+1.5VS
+1.05VS
PVT
C94
C94
@
@
220U_D2_4VY_R15M
220U_D2_4VY_R15M
1 2
L14
L14 0_1210_5%
0_1210_5%
VCCA_DPLLA VCCA_DPLLB: 64.8mA (220UF*1, 0.1UF*1)
1 2
L31
L31 0_1210_5%
0_1210_5%
R346
R346 0_0402_5%
0_0402_5%
1 2
+1.05VS
12
C399
C399
10U_0805_6.3V6M
10U_0805_6.3V6M
1 2
R63
R63
1
0_0805_5%
0_0805_5%
+
+
2
+1.05VS
Close to Ball A25
VCCA_TV_DAC: 40mA (0.1UF*1,
+3VS
180Ohm@100MHz
+1.5VS
L13
L13
MBK1608221YZF_0603
MBK1608221YZF_0603
180Ohm@100MHz
0.01UF*1 for each DAC)
L11
L11
1 2
MBK1608221YZF_0603
MBK1608221YZF_0603
VCCD_TVDAC: 58.696mA (0.1UF*1, 0.01UF*1)
1 2
1 2
R90
R90 100_0603_1%
100_0603_1%
5
C130
C130
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C146
C146
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)
1
C150
C150
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
1
C131
C131
2
2
0.01U_0402_16V7K
0.01U_0402_16V7K
+1.5VS_TVDAC
1
C149
C149
Also power for internal Thermal Sensor
2
0.022U_0402_16V7K
0.022U_0402_16V7K
1
C160
C160
2
0.01U_0402_16V7K
0.01U_0402_16V7K
+3VS_TVDAC
+1.5VS
+1.5VS_QDAC
4
B B
A A
+1.5VS
+1.05VS_DPLLA
PVT
C183
C183
220U_D2_4VY_R15M
220U_D2_4VY_R15M
+1.05VS_DPLLB
C408
C408 10U_0805_10V4Z
10U_0805_10V4Z
+1.8V_TX_LVDS
+VCCA_PEG_BG
1
C395
C395
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
L30
L30
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603
1 2
R347
R347 1_0402_1%
1_0402_1%
+1.05VS_A_SM
+1.05VS_A_SM_CK
1 2
R99
R99 0_0603_5%
0_0603_5%
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
NO_STUFF
1 2
R359
R359 0_0402_5%
0_0402_5%
+1.05VS_HPLL
+1.8V
1
1
C174
C174
+
+
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C405
C405
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C410
C410
1000P_0402_50V7K
1000P_0402_50V7K
C124
C124
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C148
C148
@
@
2
+1.05VS_PEGPLL
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCCA_LVDS: 13.2mA (1000PF*1)
2
VCCA_PEG_BG: 0.414mA (0.1UF*1)
VCCA_PEG_PLL: 50mA
1
C394
C394
(0.1UF*1)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
VCCA_SM: (22UF*2, 4.7UF*1, 1UF*1)
1
1
C116
C116
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
2
VCCA_SM_CK: 24mA (22UF*1, 2.2UF*1, 0.1UF*1)
1
C153
C153
C154
C154
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
22U_0805_6.3V6M
22U_0805_6.3V6M
+3VS_TVDAC
VCCD_HDA: 50mA (0.1UF*1)
1
C420
C420
Close to A32
2
VCCD_HPLL: 157.2mA (0.1UF*1)
+1.05VS_PEGPLL
VCCD_PEG_PLL: 50mA (0.1UF*1)
1 2
R348
R348 0_0603_5%
0_0603_5%
C398
C398
10U_0805_6.3V6M
10U_0805_6.3V6M
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
+3VS_CRTDAC
+3VS_DACBG
+1.05VS_DPLLA
+1.05VS_DPLLB
+1.05VS_HPLL
+1.05VS_MPLL
1
C138
C138
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
+1.5VS_HDA
+1.5VS_TVDAC
+1.5VS_QDAC
+1.8V_LVDS
1
2
VCCD_LVDS: 60.311111mA (1UF*1)
Issued Date
Issued Date
Issued Date
B27 A26
A25
B25
F47
L48
AD1
AE1
J48
J47
AD48
AA48
AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16
AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25
AL25
AM24
AL24
AM23
AL23
B24 A24
A32
M25
L28
AF1
AA47
M38
L37
1
C161
C161
1U_0402_6.3V6K
1U_0402_6.3V6K
2
3
U21H
U21H
73mA
VCCA_CRT_DAC_1 VCCA_CRT_DAC_2
2.69mA
VCCA_DAC_BG
VSSA_DAC_BG
64.8mA
VCCA_DPLLA
VCCA_DPLLB
24mA
VCCA_HPLL
139.2mA
VCCA_MPLL
13.2mA
VCCA_LVDS
VSSA_LVDS
0.414mA
VCCA_PEG_BG
50mA
VCCA_PEG_PLL
480mA
VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9
24mA
VCCA_SM_CK_1 VCCA_SM_CK_2 VCCA_SM_CK_3 VCCA_SM_CK_4 VCCA_SM_CK_5 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8
87.79mA
VCCA_TV_DAC_1 VCCA_TV_DAC_2
50mA
VCC_HDA
58.696mA
VCCD_TVDAC
48.363mA
VCCD_QDAC
157.2mA
VCCD_HPLL
50mA
VCCD_PEG_PLL
60.31mA
VCCD_LVDS_1 VCCD_LVDS_2
CANTIGA B3_FCBGA1329
CANTIGA B3_FCBGA1329
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2008/11/10 2008/11/24
POWER
POWER
A SM
A SM
HDA
HDA
LVDS D TV/CRT
LVDS D TV/CRT
852mA
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7
VTT
VTT
VCC_AXF_1 VCC_AXF_2 VCC_AXF_3
AXF
AXF
VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4
SM CK
SM CK
118.8mA
VCC_TX_LVDS
105.3mA
A CK
A CK
VCC_HV_1 VCC_HV_2 VCC_HV_3
HV
HV
1782mA
VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5
456mA
VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4
DMI PEG
DMI PEG
VTTLF
VTTLF
GM45@
GM45@
Deciphered Date
Deciphered Date
Deciphered Date
VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25
VTTLF1 VTTLF2 VTTLF3
CRTPLLA LVDSA PEG
CRTPLLA LVDSA PEG
TV
TV
Compal Secret Data
Compal Secret Data
Compal Secret Data
U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1
B22 B21 A21
BF21 BH20 BG20 BF20
K47
VCC_HV: 105.3mA
C35 B35 A35
V48 U48 V47 U47 U46
AH48 AF48 AH47 AG47
VCC_DMI: 456mA (0.1UF*1)
VTTLF_CAP1
A8
VTTLF_CAP2
L1
VTTLF_CAP3
AB2
C102
C102
0.47U_0603_16V4Z
0.47U_0603_16V4Z
2
VTT: 852mA
+1.05VS
(270UF*1, 4.7UF*2, 2.2UF*1, 0.47UF*1)
1
PVT
C396
C396
10U_0805_6.3V6M
10U_0805_6.3V6M
+1.8V_TX_LVDS: 118.8mA (22UF*1, 1000PF*1)
+3VS
1
C419
C419
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+1.05VS_PEG: 1782mA (220UF*1, 22UF*1, 4.7UF*1)
+1.05VS_DMI
1
C404
C404
2
0.47U_0603_16V4Z
0.47U_0603_16V4Z
+1.05VS +3VS
1
+
+
C400
C400
2
2
220U_D2_4VY_R15M
220U_D2_4VY_R15M
VCC_AXF: 321.35mA
+1.05VS_AXF
(10UF*1, 1UF*1)
1
C422
C422
@
@
2
+1.5V_SM_CK
1
2
10U_0805_10V4Z
10U_0805_10V4Z
1
1
C412
C412
0.47U_0603_16V4Z
0.47U_0603_16V4Z
2
2
D17
D17
2 1
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
1
C397
C397
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 2
R354
R354
1
0_0603_5%
0_0603_5%
C414
C414
1U_0402_6.3V6K
1U_0402_6.3V6K
2
VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1)
C139
C139
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8V_TX_LVDS
1
C407
C407
1000P_0402_50V7K
1000P_0402_50V7K
2
+1.05VS_PEG
1
1
C169
C169
2
2
1 2
R345
R345 0_0805_5%
0_0805_5%
1
C392
C392
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
R65
R65
1 2
10_0603_5%
10_0603_5%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
KALG1
KALG1
KALG1
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
C122
C122
1
C411
C411
2
10U_0805_10V4Z
10U_0805_10V4Z
PVT
+
+
C184
C184
220U_D2_4VY_R15M
220U_D2_4VY_R15M
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
C101
C101
2
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
0.47U_0603_16V4Z
0.47U_0603_16V4Z
+1.05VS
1uH 30%
1 2
L12
L12 MBK1608121YZF_0603
MBK1608121YZF_0603
R72
R72
1 2
1_0402_1%
1_0402_1%
Crestline GMCH (6/7)-VCC
Crestline GMCH (6/7)-VCC
Crestline GMCH (6/7)-VCC
C140 10U_0805_6.3V6MC140 1 0U_0805_6.3V6M
0.1uH 20%
1 2
R358
R358 0_0603_5%
0_0603_5%
1 2
R112
R112 0_0805_5%
0_0805_5%
+1.05VS
1 2
+1.05VS
1
+1.5V
+1.8V
0.1
0.1
12 45Tuesday, March 24, 2009
12 45Tuesday, March 24, 2009
12 45Tuesday, March 24, 2009
0.1
5
hexainf@hotmail.com GRATIS - FOR FREE
U21I
U21I
AU48
VSS_1
AR48
VSS_2
AL48
VSS_3
BB47
VSS_4
AW47
VSS_5
AN47
VSS_6
AJ47
VSS_7
AF47
VSS_8
AD47
VSS_9
AB47
VSS_10
Y47
VSS_11
T47
D D
C C
B B
A A
VSS_12
N47
VSS_13
L47
VSS_14
G47
VSS_15
BD46
VSS_16
BA46
VSS_17
AY46
VSS_18
AV46
VSS_19
AR46
VSS_20
AM46
VSS_21
V46
VSS_22
R46
VSS_23
P46
VSS_24
H46
VSS_25
F46
VSS_26
BF44
VSS_27
AH44
VSS_28
AD44
VSS_29
AA44
VSS_30
Y44
VSS_31
U44
VSS_32
T44
VSS_33
M44
VSS_34
F44
VSS_35
BC43
VSS_36
AV43
VSS_37
AU43
VSS_38
AM43
VSS_39
J43
VSS_40
C43
VSS_41
BG42
VSS_42
AY42
VSS_43
AT42
VSS_44
AN42
VSS_45
AJ42
VSS_46
AE42
VSS_47
N42
VSS_48
L42
VSS_49
BD41
VSS_50
AU41
VSS_51
AM41
VSS_52
AH41
VSS_53
AD41
VSS_54
AA41
VSS_55
Y41
VSS_56
U41
VSS_57
T41
VSS_58
M41
VSS_59
G41
VSS_60
B41
VSS_61
BG40
VSS_62
BB40
VSS_63
AV40
VSS_64
AN40
VSS_65
H40
VSS_66
E40
VSS_67
AT39
VSS_68
AM39
VSS_69
AJ39
VSS_70
AE39
VSS_71
N39
VSS_72
L39
VSS_73
B39
VSS_74
BH38
VSS_75
BC38
VSS_76
BA38
VSS_77
AU38
VSS_78
AH38
VSS_79
AD38
VSS_80
AA38
VSS_81
Y38
VSS_82
U38
VSS_83
T38
VSS_84
J38
VSS_85
F38
VSS_86
C38
VSS_87
BF37
VSS_88
BB37
VSS_89
AW37
VSS_90
AT37
VSS_91
AN37
VSS_92
AJ37
VSS_93
H37
VSS_94
C37
VSS_95
BG36
VSS_96
BD36
VSS_97
AK15
VSS_98
AU36
VSS_99
CANTIGA B3_FCBGA1329
CANTIGA B3_FCBGA1329
VSS
VSS
GM45@
GM45@
VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199
AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6
4
U21J
U21J
BG21
VSS_199
L12
VSS_200
AW21
VSS_201
AU21
VSS_202
AP21
VSS_203
AN21
VSS_204
AH21
VSS_205
AF21
VSS_206
AB21
VSS_207
R21
VSS_208
M21
VSS_209
J21
VSS_210
G21
VSS_211
BC20
VSS_212
BA20
VSS_213
AW20
VSS_214
AT20
VSS_215
AJ20
VSS_216
AG20
VSS_217
Y20
VSS_218
N20
VSS_219
K20
VSS_220
F20
VSS_221
C20
VSS_222
A20
VSS_223
BG19
VSS_224
A18
VSS_225
BG17
VSS_226
BC17
VSS_227
AW17
VSS_228
AT17
VSS_229
R17
VSS_230
M17
VSS_231
H17
VSS_232
C17
VSS_233
BA16
VSS_235
AU16
VSS_237
AN16
VSS_238
N16
VSS_239
K16
VSS_240
G16
VSS_241
E16
VSS_242
BG15
VSS_243
AC15
VSS_244
W15
VSS_245
A15
VSS_246
BG14
VSS_247
AA14
VSS_248
C14
VSS_249
BG13
VSS_250
BC13
VSS_251
BA13
VSS_252
AN13
VSS_255
AJ13
VSS_256
AE13
VSS_257
N13
VSS_258
L13
VSS_259
G13
VSS_260
E13
VSS_261
BF12
VSS_262
AV12
VSS_263
AT12
VSS_264
AM12
VSS_265
AA12
VSS_266
J12
VSS_267
A12
VSS_268
BD11
VSS_269
BB11
VSS_270
AY11
VSS_271
AN11
VSS_272
AH11
VSS_273
Y11
VSS_275
N11
VSS_276
G11
VSS_277
C11
VSS_278
BG10
VSS_279
AV10
VSS_280
AT10
VSS_281
AJ10
VSS_282
AE10
VSS_283
AA10
VSS_284
M10
VSS_285
BF9
VSS_286
BC9
VSS_287
AN9
VSS_288
AM9
VSS_289
AD9
VSS_290
G9
VSS_291
B9
VSS_292
BH8
VSS_293
BB8
VSS_294
AV8
VSS_295
AT8
VSS_296
CANTIGA B3_FCBGA1329
CANTIGA B3_FCBGA1329
VSS
VSS
VSS NCTF
VSS NCTF
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16
VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5
VSS SCB
VSS SCB
NC
NC
GM45@
GM45@
3
VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325
VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350
VSS_351 VSS_352 VSS_353 VSS_354
NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42
AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4
BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1
U24 U28 U25 U29
AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17
BH48 BH1 A48 C1 A3
E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48
2
1
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2008/11/10 2008/11/24
2008/11/10 2008/11/24
2008/11/10 2008/11/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cantiga GMCH(1/7)-GTL
Cantiga GMCH(1/7)-GTL
Cantiga GMCH(1/7)-GTL
KALG1
KALG1
KALG1
0.1
0.1
13 45Tuesday, March 24, 2009
13 45Tuesday, March 24, 2009
13 45Tuesday, March 24, 2009
1
0.1
5
DDR_A_DQS#[0..7][9]
DDR_A_D[0..63][9]
DDR_A_DM[0..7][9]
DDR_A_DQS[0..7][9]
DDR_A_MA[0..14][9]
D D
Layout Note:
C C
Layout Note: Place near JP4.203 & JP4.204
B B
A A
Place near JP4
+1.5V
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C142
C142
C141
C141
2
1
2
+0.75VS
C451U_0603_10V4Z C451U_0603_10V4Z
Layout Note: Place these 4 Caps near Command and Control signals of DIMMA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C107
C107
2
1
C471U_0603_10V4Z C471U_0603_10V4Z
5
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
2
2
1
C126
C126
C118
C118
2
2
2
1
1
C481U_0603_10V4Z C481U_0603_10V4Z
C461U_0603_10V4Z C461U_0603_10V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C108
C108
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
2
C49
C49
0.1U_0402_16V4Z
C127
C127
C110
C110
1
1
2
2
4
+1.5V
+V_DDR3_DIMM_REF
12
R123
1K_0402_1%
1K_0402_1%
2.2U_0805_16V4Z
2.2U_0805_16V4Z
1
C181
C181
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C117
C117
1
2
R123
12
C188
C188
R122
R122
1
1K_0402_1%
1K_0402_1%
2
DDR_CKE0_DIMMA[8]
DDR_A_BS2[9]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C95
C95
C97
C97
1
+
+
2
2
PVT
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
4
M_CLK_DDR0[8] M_CLK_DDR#0[8]
DDR_A_BS0[9]
DDR_A_WE#[9]
DDR_A_CAS#[9] M_ODT0 [8]
DDR_CS1_DIMMA#[8]
+3VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
+V_DDR3_DIMM_REF
10K_0402_5%
10K_0402_5%
1
1
C44
C44
C69
C69
2
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
3
+1.5V +1.5V
JDIMM1JDIMM1
VREF_DQ1VSS1
3
DDR_A_D0 DDR_A_D1
DDR_A_DM0
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
M_CLK_DDR0 M_CLK_DDR#0
DDR_A_MA10 DDR_A_BS0
DDR_A_WE# DDR_A_CAS#
DDR_A_MA13 DDR_CS1_DIMMA#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_DM5
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_DM7
DDR_A_D58 DDR_A_D59
R39
R39
1 2
12
R37
R37
10K_0402_5%
10K_0402_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2007/09/29 2008/11/24
2007/09/29 2008/11/24
2007/09/29 2008/11/24
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
VREF_CA
EVENT#
+0.75VS
DQ4 DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7 VSS8 DQ12 DQ13
VSS10
DM1
DQ14 DQ15
DQ20 DQ21
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1 CK1#
VDD12
BA1 RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35 DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47 DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
SDA
SCL VTT2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78
A15
80
A14
82 84
A11
86
A7
88 90
A6
92
A4
94 96
A2
98
A0
100 102 104 106 108 110 112 114
S0#
116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
G2
2
DDR_A_D4 DDR_A_D5
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D6 DDR_A_D7
DDR_A_D12 DDR_A_D13
DDR_A_DM1 SM_DRAMRST#
DDR_A_D14 DDR_A_D15
DDR_A_D20 DDR_A_D21
DDR_A_DM2
DDR_A_D22 DDR_A_D23
DDR_A_D28 DDR_A_D29
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D30 DDR_A_D31
DDR_CKE1_DIMMA
DDR_A_MA14
DDR_A_MA11 DDR_A_MA7
DDR_A_MA6 DDR_A_MA4
DDR_A_MA2 DDR_A_MA0
M_CLK_DDR1 M_CLK_DDR#1
DDR_A_BS1 DDR_A_RAS#
DDR_CS0_DIMMA# M_ODT0
M_ODT1
DDR_VREF_CA_DIMMA
DDR_A_D36 DDR_A_D37
DDR_A_DM4
DDR_A_D38 DDR_A_D39
DDR_A_D44 DDR_A_D45
DDR_A_DQS#5 DDR_A_DQS5
DDR_A_D46 DDR_A_D47
DDR_A_D52 DDR_A_D53
DDR_A_DM6
DDR_A_D54 DDR_A_D55
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
PM_EXTTS#0 CLK_SMBDATA CLK_SMBCLK
+0.75VS
2
1
SM_DRAMRST# [8,15]
DDR_CKE1_DIMMA [8]
M_CLK_DDR1 [8] M_CLK_DDR#1 [8]
DDR_A_BS1 [9] DDR_A_RAS# [9]
DDR_CS0_DIMMA# [8]
M_ODT1 [8]
1 2
R59 0_0402_5 %R 59 0_0402_5%
PM_EXTTS#0 [8]
CLK_SMBDATA [15,16] CLK_SMBCLK [15,16]
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
C109
C109
1
2
+V_DDR3_DIMM_REF
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C98
C98
2
DDR3 SO-DIMM A REVERSE
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
KALG1
KALG1
KALG1
1
0.1
0.1
14 45Tuesday, March 24, 2009
14 45Tuesday, March 24, 2009
14 45Tuesday, March 24, 2009
0.1
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