Acer Aspire 3010, Aspire 5010 Schematics

5

4

3

2

1

Xtal 14.318Mhz

SNIPE Block Diagram

300~400mA

CLK GEN

PCMCIA SLOT

ICS 951412 IDT CV137

TPS2224AP

D D

C C

Support TypeII

28

PCMCIA I/F

200Mhz

100/133Mhz

100Mhz

100/133Mhz

3

48Mhz for USB/ Cardbus

AVDDDI , AVDDQ 1.8V S0 ( CRT/TV)

28

CPU clk

NB clk

SB clk

VGA clk

AVDD 3.3 S0( CRT/TV)

TIPWR SW

PCI 7421

2* Slot Cardbus 1* 1394

1394 Conn

28

Mini-PCI

802.11a/b/g

B B

RJ45

31

TXFM

30

1000Mb

PCI LAN

Realtek RTL8110SBL

TXFM

A A

10/100Mb

30

1000/100/10 RTL8100C 100/10

VLDT 1.2V S0

VTT 1.25V S3

Mem Ref 1.25V fr S3

VDDA 2.5V S0

VDD VCC_core S0

VDDIO 2.5V S3

Vcore 1.2V S0

VDD HT 1.2V S0

VDD 1.8V S0

VDD mem 2.5V S3

LVDS 1.8V S0

PLL 1.8V S0 Clock 3.3V S0

Xtal 32.768 Khz

PCIE 1.8V S0

VDDQ 3.3V S0

VDD 1.8V S0

3.3 S5, 1.8 S5

26,27

PCI Bus / 33MHz

29

AMD CPU

Sempron / Athlon K8

4,5,6,7

HyperTransport

6.4GB/S 16b/8b

ATI

AGTL+ CPU I/F + UMA

0.13um, 706 BGA package 31mmx 31mm

1.0~1.2V CMOS technology

RS480M

11,12,13,14

PCI-Express x2

ATI

SB400

PCI

PIDE

HDD

ACPI 2.0

ATA 133

25

DVD/ CD-RW

18,19,20,21,22

SIDE

25

6xUSB 2.0

6-CH AC97 2.2

LPC I/F

PCI Express x16

USB x 4

AC97

MODEM MDC Card

NS SIO

PC87381

DDR 333/400

UMA

Discrete

ATI

0.11um, CSP/ BGA 708Pin , 31mmx 31mm

1.0~1.3V CMOS technology

M26/M24

VRAM x4

HY5DS573222F

53,54

24

RJ11 CONN

LPC Bus / 33MHz

Thermal & Fan

G791

37

FIR

TFDU6102

37

50,51,52

4Mx 32 bit x4= 64MB 8Mx 32 bit x4= 128MB 16Mx 32 bit x4= 256MB

29

23

VDD 2.5V S3

Vref DDR 1.25V S3

DDR x2

200-PIN DDR SODIMM

CODEC

ALC655

32

OP AMP

G1421

3324

KBC

KB3910

Touch Pad

35 35

8,9,10

SVIDEO/COMP

LVDS

RGB CRT

TMDS

Line In MIC In

Line Out

Int. SPKR

34

Int. KB

33

XBUS

ISA ROM

TVOUT

LCD

CRT

DVI-D

PCB Layer Stackup

L1: Signal 1 L2: GND

16

L3: Signal 2 L4: Signal 3 L5: VCC L6: Signal 4

17

Battery Charger

MAX1909ETI

16

15

INPUTS

AD+ BAT+

SYSTEM DC/DC

INPUT

DCBATOUT

OUTPUTS

DCBATOUT

MAX1999EEI

OUTPUT

5V_S5 , 3D3V_S5

SYSTEM DC/DC

TPS 5130

INPUT

DCBATOUT 2D5V_S3

OUTPUT

1D8V_S5 1D2V_S0

CPU V_CORE

ISL6559CR

INPUT

DCBATOUT

OUTPUT

VCC_CORE_S0

SYSTEM POWER

LP2951ACM/APL5331KAC-TR

INPUT

2D5V_S3 DCBATOUT

36

OUTPUT

1D25V_S3 5V_AUX_S5

48

44

45,46

42,43

47

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM

Size Document Number Rev

A3

SNIPE

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

156Monday, November 22, 2004

1

SA

of

5

4

3

2

1

SA to SB need to check

1. connect G781 Thermal Alert pin to VGA_GPIO14

2. ene KBC P165 LPCRST# , we suggest pull low avoid leakage

3. Clk to NB need to add Cap. when the trace change layer.

4. check page 9. what is the value of R481,R486, R498 and R499 is 100 ohm or 12 ohm.

5. check page 15, if on discrete mode does the 1D8V_S0 power for lvds should dummy or still contect on power plan.

D D

6. check page 19, can the 0 ohm resistance be dummied on P.19 right hand side?

7. check page 20, R203's voltage on pin 2.

8. page 21. check when the unused USB pin should be pull down or floating.

9. Can R471 change to common value?

10. check giga lan and 10/100 connect. Does them the same or can chose a cheaper one?

11. page 38. 12VGATE_S0 can decreased resistance.

12. Does the 1D5V_VGA_S0 can come from TPS5130?

Schematic change: R659, change from 0R2 to 10Kr2

C C

B B

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CHANGE HISTORY

Size Document Number Rev

SNIPE SA

A3

SNIPE SA

A3

SNIPE SA

A3

of

Date: Sheet of

5

4

3

2

Date: Sheet

256Thursday, November 18, 2004

1

A

3D3V_S0

L8

1 2

0R3-UL80R3-U

4 4

3 3

SB_OSC_CLK21

CLK14_AUDIO32

12

C793

C793 SCD1U16V

SCD1U16V

C800

C800 SCD1U16V

SCD1U16V

12

C807

C807 SCD1U16V

SCD1U16V

C801

C801 SCD1U16V

SCD1U16V

12

C810

C810 SCD1U16V

SCD1U16V

12

C811

C811 SCD1U16V

SCD1U16V

CLK48_CARDBUS27

CLK48_USB21

SMBC_SB8,21

SMBD_SB8,21

R146 33R2R146 33R2

1 2

R147 33R2R147 33R2

1 2

12

C808

C808 SCD1U16V

SCD1U16V

12

C812

C812 SCD1U16V

SCD1U16V

C206 SC33P50V2JNC206 SC33P50V2JN

1 2

X3

X-14D318MHZ-1-U1

1 2

C227

1 2

SC33P50V2JN

CLK14_NB13

CLK14_SIO37

B

12

C252

SC22U10V6ZY-U

3D3V_CLK_VDDA

3D3V_S0 3D3V_CLK_VDD

L22

1 2

0R3-U

SC2D2U16V5ZY

XI_CLK

XO_CLK

R152 22R2R152 22R2 R151 22R2R151 22R2 R158 0R2-0R158 0R2-0 R159 0R2-0R159 0R2-0

HTREF_CLK13

3D3VDD48_S0

12

C787

12

R145

R145 DUMMY-R3

DUMMY-R3

DY

1 2 1 2 1 2 1 2

R155 33R2R155 33R2

1 2

R162 33R2R162 33R2

1 2

R161 33R2R161 33R2

1 2

12

R170

R170 49D9R2F

49D9R2F

USB_48M SMBC_CLK SMBD_CLK

FS2 FS1 FS0

CLK_REF2

CLK_HTT66

IREF_CLKGEN

12

R182

475R2F

U28

3

VDD_48

39

VDDA

32

VDD_SRC

21

VDD_SRC

14

VDD_SRC

35

VDD_SRC

56

VDD_REF

51

VDD_PC1

43

VDD_CPU

48

VDD_HTT

1

XIN

2

XOUT

4

USB_48

7

SCL

8

SDA

10

CLKREQ0#

11

CLKREQ1#

9

SEL24/24_48#

53

REF1

54

REF0

52

REF2

47

HTT66

50

PCI0

37

IREF

6

NC#6

IDTCV137PAG

C

SRCC0 SRCT0 SRCC3 SRCT3 SRCC4 SRCT4 SRCC5 SRCT5 SRCC6 SRCT6 SRCC7 SRCT7

CPUC1 CPUT1 CPUC0 CPUT0

SRCC1 SRCT1 SRCC2 SRCT2

VSS_SRC VSS_SRC

RESET#

TURBO1

VSS_CPU

VSS_PCI

VSS_HTT

VSS_SRC

VSS_48

VSS_REF

VSSA

33 34 25 24 23 22 19 18 17 16 13 12

40 41 44 45

29 30 28 27

36 20 15 26

42 49 46 31 38 5 55

3D3V_CLK_VDDA3D3V_CLK_VDD

12

C253

C253 SCD1U16V

SCD1U16V

SRC_CLK0# SRC_CLK0 SRC_CLK3# SRC_CLK3

CPUCLKJ_CY CPUCLK_CY

ATI_CLK0# ATI_CLK0 ATI_CLK1# ATI_CLK1

D

3D3V_S0

L24

1 2

12

C794

0R3-U

SC22U10V6ZY-U

RN5 SRN33-2-U2RN5 SRN33-2-U2

2 3 1

1 2 3

4

CPUCLK# 6 CPUCLK 6

NBSRC_CLK# 13 NBSRC_CLK 13

GFX_CLK# 449 GFX_CLK 449

RN4 SRN33-2-U2RN4 SRN33-2-U2

R171 15R2JR171 15R2J

1 2

R172 15R2JR172 15R2J

1 2

RN7

2 3 1

4

SRN33-2-U2

1 2 3

VGA

SRN33-2-U2

4

SRN33-2-U2

RN6

Do not stuff when using UMA

SBLINK_CLK# 13 SBLINK_CLK 13

SBSRC_CLK# 18 SBSRC_CLK 18

SBLINK_CLK#

SBLINK_CLK

SBSRC_CLK#

SBSRC_CLK

GFX_CLK#

GFX_CLK

E

R192 49D9R2FR192 49D9R2F

1 2

R193 49D9R2FR193 49D9R2F

1 2

R190 49D9R2FR190 49D9R2F

1 2

R191 49D9R2FR191 49D9R2F

1 2

R198 49D9R2F

1 2

R189 49D9R2F

1 2

VGA

Do not stuff when using UMA

2 2

3D3V_CLK_VDD

1 1

DY

R148 2K2R2

1 2

R149

1 2

DUMMY-R2

DY

R153 2K2R2

DY

1 2

R154

1 2

DUMMY-R2

DY

R169 2K2R2

1 2

R160

1 2

DUMMY-R2

DY

FS0

FS1

DY

A

FS2

B

VGA_CORE_S0

12

C804

C804 SCD1U16V

SCD1U16V

NBSRC_CLK#

NBSRC_CLK

CLKGEN_IDTCV137

C803

C803 SCD1U16V

SCD1U16V

12

C805

C805 SCD1U16V

SCD1U16V

12

C806

C806 SCD1U16V

SCD1U16V

Title

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet

12

C

R199 49D9R2FR199 49D9R2F

1 2

R200 49D9R2FR200 49D9R2F

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SNIPE

E

SA

of

356Thursday, November 18, 2004

SA

A

1D2V_HT0A_S0

B

C

D

E

12

C81

C81 SCD22U16V3ZY

SCD22U16V3ZY

4 4

3 3

12

C67

C67 SCD22U16V3ZY

SCD22U16V3ZY

NB0CADOUT[15..0]11 NB0CADOUTJ[15..0]11

Used SideB Power Plane

2 2

1D2V_HT0A_S0

12

C82

C82 SCD22U16V3ZY

SCD22U16V3ZY

NB0HTTCLKOUT111 NB0HTTCLKOUTJ111 NB0HTTCLKOUT011 NB0HTTCLKOUTJ011

R384 49D9R3FR384 49D9R3F

1 2

R393 49D9R3FR393 49D9R3F

1 2

NB0HTTCTLOUT11 NB0HTTCTLOUTJ11

12

HTT for CPU sideA Transmit power and NB sideA Receive power

1D2V_HT0A_S0

C83

C83 SCD22U16V3ZY

SCD22U16V3ZY

NB0CADOUT15 NB0CADOUTJ15 NB0CADOUT14 NB0CADOUTJ14 NB0CADOUT13 NB0CADOUTJ13 NB0CADOUT12 NB0CADOUTJ12 NB0CADOUT11 NB0CADOUTJ11 NB0CADOUT10 NB0CADOUTJ10 NB0CADOUT9 NB0CADOUTJ9 NB0CADOUT8 NB0CADOUTJ8 NB0CADOUT7 NB0CADOUTJ7 NB0CADOUT6 NB0CADOUTJ6 NB0CADOUT5 NB0CADOUTJ5 NB0CADOUT4 NB0CADOUTJ4 NB0CADOUT3 NB0CADOUTJ3 NB0CADOUT2 NB0CADOUTJ2 NB0CADOUT1 NB0CADOUTJ1 NB0CADOUT0 NB0CADOUTJ0

NB0HTTCLKOUT1 NB0HTTCLKOUTJ1 NB0HTTCLKOUT0 NB0HTTCLKOUTJ0

CPUHTTCTLIN1 CPUHTTCTLINJ1 NB0HTTCTLOUT NB0HTTCTLOUTJ

D29 D27 D25 C28 C26 B29 B27

T25 R25 U27 U26 V25

U25 W27 W26

AA27 AA26 AB25 AA25 AC27 AC26 AD25 AC25

T27

T28

V29

U29

V27

V28

Y29 W29

AB29 AA29 AB27 AB28 AD29 AC29 AD27 AD28

Y25 W25

Y27

Y28

R27

R26

T29

R29

U13A

VLDT0_A VLDT0_A VLDT0_A VLDT0_A VLDT0_A VLDT0_A VLDT0_A

L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0

L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0

L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLIN_H0 L0_CTLIN_L0

VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H0

L0_CADOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

AH29 AH27 AG28 AG26 AF29 AE28 AF25

N26 N27 L25 M25 L26 L27 J25 K25 G25 H25 G26 G27 E25 F25 E26 E27 N29 P29 M28 M27 L29 M29 K28 K27 H28 H27 G29 H29 F28 F27 E29 F29

J26 J27 J29 K29

N25 P25 P28 P27

1D2V_HT0B_S0

CPUCADOUT15 CPUCADOUTJ15 CPUCADOUT14 CPUCADOUTJ14 CPUCADOUT13 CPUCADOUTJ13 CPUCADOUT12 CPUCADOUTJ12 CPUCADOUT11 CPUCADOUTJ11 CPUCADOUT10 CPUCADOUTJ10 CPUCADOUT9 CPUCADOUTJ9 CPUCADOUT8 CPUCADOUTJ8 CPUCADOUT7 CPUCADOUTJ7 CPUCADOUT6 CPUCADOUTJ6 CPUCADOUT5 CPUCADOUTJ5 CPUCADOUT4 CPUCADOUTJ4 CPUCADOUT3 CPUCADOUTJ3 CPUCADOUT2 CPUCADOUTJ2 CPUCADOUT1 CPUCADOUTJ1 CPUCADOUT0 CPUCADOUTJ0

CPUHTTCLKOUT1 CPUHTTCLKOUTJ1 CPUHTTCLKOUT0 CPUHTTCLKOUTJ0

CPUHTTCTLOUT0 CPUHTTCTLOUTJ0

HTT for CPU sideB Receive power and NB sideA Transmit power

12

C536

C536 SC4D7U10V5ZY

SC4D7U10V5ZY

Used SideA Power Plane

CPUHTTCLKOUT1 11 CPUHTTCLKOUTJ1 11 CPUHTTCLKOUT0 11 CPUHTTCLKOUTJ0 11

CPUHTTCTLOUT0 11 CPUHTTCTLOUTJ0 11

LAYOUT: Place bypass cap on topside of board near HTT power pins that are not connected directly to downstream HTT device, but connected internally to other HTT power pins.

CPUCADOUT[15..0] 11 CPUCADOUTJ[15..0] 11

62.10030.041

BGA754-SKT-U

By ME requset U11 P/N:

1 1

Main 62.10030.041 Second 62.10053.191 Third 62.10053.201

A

B

C

BGA754-SKT-U

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

D

Date: Sheet

CPU(1/4)_HyperTransport I/F

SNIPE

E

of

456Thursday, November 18, 2004

SA

A

B

C

D

E

U13B

TP75TP75

4 4

2D5V_S3

VREF_DDR_CLAW

R480 34D8R2FR480 34D8R2F

1 2

R479 34D8R2FR479 34D8R2F

1 2

DDRVTT_SENSE

MEMZN MEMZP

AE13

AG12

D14 C14

VTT_SENSE

MEMVREF1

MEMZN MEMZP

VREF_DDR_MEM

NOTE: Test with passive probes only.

M_DATA[63..0]9

2D5V_S3

3 3

NOTE: Install to bypass op-amp

12

R235

R235 100R3F

100R3F

R234

R234 100R3F

100R3F

12

C330

C330 SCD1U

SCD1U

12

VREF_DDR_MEM

C329

C329 SCD1U

SCD1U

12

C422

C422 SC1000P50V2KX

SC1000P50V2KX

LAYOUT: Locate close to DIMMs.

NOTE: Remove to bypass op-amp

2 2

VREF_DDR_CLAW

2D5V_S3

12

1 1

12

R500

R500 100R3

100R3

R506

R506 100R3

100R3

C671

C671 SCD1U

SCD1U

12

C682

C682 SCD1U

SCD1U

VREF_DDR_CLAW

LAYOUT: Locate close to CPU.

A

12

C693

C693 SC1000P50V2KX

SC1000P50V2KX

M_ADM[7..0]9

M_DQS[7..0]9

B

M_DATA63 M_DATA62 M_DATA61 M_DATA60 M_DATA59 M_DATA58 M_DATA57 M_DATA56 M_DATA55 M_DATA54 M_DATA53 M_DATA52 M_DATA51 M_DATA50 M_DATA49 M_DATA48 M_DATA47 M_DATA46 M_DATA45 M_DATA44 M_DATA43 M_DATA42 M_DATA41 M_DATA40 M_DATA39 M_DATA38 M_DATA37 M_DATA36 M_DATA35 M_DATA34 M_DATA33 M_DATA32 M_DATA31 M_DATA30 M_DATA29 M_DATA28 M_DATA27 M_DATA26 M_DATA25 M_DATA24 M_DATA23 M_DATA22 M_DATA21 M_DATA20 M_DATA19 M_DATA18 M_DATA17 M_DATA16 M_DATA15 M_DATA14 M_DATA13 M_DATA12 M_DATA11 M_DATA10 M_DATA9 M_DATA8 M_DATA7 M_DATA6 M_DATA5 M_DATA4 M_DATA3 M_DATA2 M_DATA1 M_DATA0

M_ADM8 M_ADM7 M_ADM6 M_ADM5 M_ADM4 M_ADM3 M_ADM2 M_ADM1 M_ADM0 M_DQS8 M_DQS7 M_DQS6 M_DQS5 M_DQS4 M_DQS3 M_DQS2 M_DQS1 M_DQS0

A16 B15 A12 B11 A17 A15 C13 A11 A10

C11

AC1 AC3

AC2 AD1 AE1 AE3

AG3

AJ4

AE2

AF1

AH3

AJ3 AJ5 AJ6

AJ7 AH9 AG5 AH5

AJ9

AJ10

AH11

AJ11

AH15

AJ15

AG11

AJ12 AJ14 AJ16

A13

AA1 AG1 AH7

AH13

A14

AB1

AJ2

AJ8

AJ13

B9 C7 A6

A9 A5 B5 C5 A4 E2 E1 A3 B3 E3

F1 G2 G1

L3

L1 G3

J2

L2 M1 W1 W3

W2

Y1

R1

A7

C2

H1

T1

A8

D1

J1

MEMDATA63 MEMDATA62 MEMDATA61 MEMDATA60 MEMDATA59 MEMDATA58 MEMDATA57 MEMDATA56 MEMDATA55 MEMDATA54 MEMDATA53 MEMDATA52 MEMDATA51 MEMDATA50 MEMDATA49 MEMDATA48 MEMDATA47 MEMDATA46 MEMDATA45 MEMDATA44 MEMDATA43 MEMDATA42 MEMDATA41 MEMDATA40 MEMDATA39 MEMDATA38 MEMDATA37 MEMDATA36 MEMDATA35 MEMDATA34 MEMDATA33 MEMDATA32 MEMDATA31 MEMDATA30 MEMDATA29 MEMDATA28 MEMDATA27 MEMDATA26 MEMDATA25 MEMDATA24 MEMDATA23 MEMDATA22 MEMDATA21 MEMDATA20 MEMDATA19 MEMDATA18 MEMDATA17 MEMDATA16 MEMDATA15 MEMDATA14 MEMDATA13 MEMDATA12 MEMDATA11 MEMDATA10 MEMDATA9 MEMDATA8 MEMDATA7 MEMDATA6 MEMDATA5 MEMDATA4 MEMDATA3 MEMDATA2 MEMDATA1 MEMDATA0

MEMDQS17 MEMDQS16 MEMDQS15 MEMDQS14 MEMDQS13 MEMDQS12 MEMDQS11 MEMDQS10 MEMDQS9 MEMDQS8 MEMDQS7 MEMDQS6 MEMDQS5 MEMDQS4 MEMDQS3 MEMDQS2 MEMDQS1 MEMDQS0

U13B

MEMRESET_L

MEMCLK_H7 MEMCLK_L7 MEMCLK_H6 MEMCLK_L6 MEMCLK_H5 MEMCLK_L5 MEMCLK_H4 MEMCLK_L4 MEMCLK_H3 MEMCLK_L3 MEMCLK_H2 MEMCLK_L2 MEMCLK_H1 MEMCLK_L1 MEMCLK_H0 MEMCLK_L0

MEMCS_L7 MEMCS_L6 MEMCS_L5 MEMCS_L4 MEMCS_L3 MEMCS_L2 MEMCS_L1 MEMCS_L0

MEMRASA_L MEMCASA_L

MEMWEA_L

MEMBANKA1 MEMBANKA0

MEMADDA13 MEMADDA12 MEMADDA11 MEMADDA10

MEMADDA9 MEMADDA8 MEMADDA7 MEMADDA6 MEMADDA5 MEMADDA4 MEMADDA3 MEMADDA2 MEMADDA1 MEMADDA0

MEMRASB_L MEMCASB_L

MEMWEB_L

MEMBANKB1 MEMBANKB0

MEMADDB13 MEMADDB12 MEMADDB11 MEMADDB10

MEMADDB9 MEMADDB8 MEMADDB7 MEMADDB6 MEMADDB5 MEMADDB4 MEMADDB3 MEMADDB2 MEMADDB1 MEMADDB0

MEMCHECK7 MEMCHECK6 MEMCHECK5 MEMCHECK4 MEMCHECK3 MEMCHECK2 MEMCHECK1 MEMCHECK0

C

VTT_A VTT_A VTT_A VTT_A VTT_B VTT_B VTT_B VTT_B

MEMCKEA MEMCKEB

NC_E13 NC_C12

NC_E14 NC_D12

D17 A18 B17 C17 AF16 AG16 AH16 AJ17

AG10

AE8 AE7

D10 C10 E12 E11 AF8 AG8 AF10 AE10 V3 V4 K5 K4 R5 P5 P3 P4

D8 C8 E8 E7 D6 E6 C4 E5

H5 D4 G5

K3 H3

E13 C12 E10 AE6 AF3 M5 AE5 AB5 AD3 Y5 AB4 Y3 V5 T5 T3 N5

H4 F5 F4

L5 J5

E14 D12 E9 AF6 AF4 M4 AD5 AC5 AD4 AA5 AB3 Y4 W5 U5 T4 M3

N3 N1 U3 V1 N2 P1 U1 U2

BGA754-SKT-U

1D25V_S3

MEMRESET#

M_CKE#0 M_CKE#1

M_CLK7 M_CLK#7 M_CLK6 M_CLK#6 M_CLK5 M_CLK#5 M_CLK4 M_CLK#4

M_CLK1 M_CLK#1 M_CLK0 M_CLK#0

M_CS#7 M_CS#6 M_CS#5 M_CS#4 M_CS#3 M_CS#2 M_CS#1 M_CS#0

M_ARAS# M_ACAS# M_AWE#

M_ABS#1 M_ABS#0

RSVD_M_AA15 RSVD_M_AA14 M_AA13 M_AA12 M_AA11 M_AA10 M_AA9 M_AA8 M_AA7 M_AA6 M_AA5 M_AA4 M_AA3 M_AA2 M_AA1 M_AA0

M_BRAS# M_BCAS# M_BWE#

M_BBS#1 M_BBS#0

RSVD_M_BA15 RSVD_M_BA14 M_BA13 M_BA12 M_BA11 M_BA10 M_BA9 M_BA8 M_BA7 M_BA6 M_BA5 M_BA4 M_BA3 M_BA2 M_BA1 M_BA0

CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0

12

For REGISTED DIMM Only UNBUFFER DIMM NC

12

C114

M_CKE#0 8,9 M_CKE#1 8,9

M_CLK7 8,9 M_CLK#7 8,9 M_CLK6 8,9 M_CLK#6 8,9 M_CLK5 8,9 M_CLK#5 8,9 M_CLK4 8,9 M_CLK#4 8,9

M_CS#3 8,9 M_CS#2 8,9 M_CS#1 8,9 M_CS#0 8,9

M_ARAS# 8,9 M_ACAS# 8,9 M_AWE# 8,9

M_ABS#1 8,9 M_ABS#0 8,9

M_BRAS# 8,9 M_BCAS# 8,9 M_BWE# 8,9

M_BBS#1 8,9 M_BBS#0 8,9

C114 SC1000P50V2KX

SC1000P50V2KX

M_CLK#1 M_CLK#0 M_CLK1 M_CLK0

M_AA[13..0] 8,9

M_BA[13..0] 8,9

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

C653

C653 SCD1U

SCD1U

AMD suggested M_AA13 connect to DIMM pin123

AMD suggested M_BA13 connect to DIMM pin123

TP94TP94 TP16TP16 TP95TP95 TP19TP19 TP21TP21 TP22TP22 TP23TP23 TP24TP24

D

2D5V_S3

RN72

1

8

2

7

3

6

45

SRN10K-2

MEMZN MEMZP M_DQS8 M_ADM8

MEMRESET# M_CS#7 M_CS#6 M_CS#5 M_CS#4 RSVD_M_AA15 RSVD_M_AA14 RSVD_M_BA15 RSVD_M_BA14

NOT SUPPORT ECC CHECK AMD suggested remove PULL-HI resistor.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU(2/4)_DDR

SNIPE

556Thursday, November 18, 2004

E

TP69TP69 TP68TP68 TP18TP18 TP17TP17

TP84TP84 TP82TP82 TP81TP81 TP83TP83 TP87TP87 TP73TP73 TP70TP70 TP72TP72 TP71TP71

SA

of

SA

A

B

C

2D5V_CPUA_S0

D

E

DY R360

DY

C520

C520 SC22P50V2JN-1

SC22P50V2JN-1

DY

VDDA1 VDDA2

RESET_L PWROK LDTSTOP_L

L0_REF1 L0_REF0

COREFB_H COREFB_L CORE_SENSE

VDDIOFB_H VDDIOFB_L VDDIO_SENSE

CLKIN_H CLKIN_L

NC_AJ23 NC_AH23

NC_AE24 NC_AF24

VTT_A VTT_B

DBRDY

NC_C15

TMS TCK TRST_L TDI

NC_C18

NC_A19

KEY1 KEY0

NC_AE23 NC_AF23 NC_AF22 NC_AF21

NC_C1 NC_J3 NC_R3 NC_AA2 NC_D3 NC_AG2 NC_B18 NC_AH1 NC_AE21 NC_C20 NC_AG4 NC_C6 NC_AG6 NC_AE9 NC_AG9

12

R360

R1

20KR3F

12

R361

R361 20KR3F

20KR3F

Vout = 1.25*(1+ R1/R2)

R2

THERMTRIP#

THERMDA THERMDC

VID4 VID3 VID2 VID1 VID0

NC_AG18 NC_AH18 NC_AG17

NC_AJ18

A20

A26 A27

AG13 AF14 AG14 AF15 AE15

AG18 AH18 AG17 AJ18

VID4 VID3 VID2 VID1 VID0

NC_AG18 NC_AH18 NC_AG17 NC_AJ18

THERMTRIP_L

THERMDP 23 THERMDN 23

TP62TP62 TP63TP63

VID[4..0] 41

LAYOUT: Route FBCLKOUT_H/L

differentially impedance 80

12

R452

R452 80D6R3F-U

80D6R3F-U

R451

1 2

DUMMY-R3

DY

2D5V_S3

2D5V_S0

12

THERMTRIP#

THERMTRIP#Level shift to SB400

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

CPU(3/4)_Control & Debug

R427

R427 680R3

680R3

2

SNIPE

3D3V_S5

12

R392

R392 10KR2

10KR2

3

Q26

Q26 MMBT3904-U1

MMBT3904-U1

1

NS3

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU_THERMTRIP# 21,23

2D5V_S0

R414

R414 1KR3

1KR3

656Thursday, November 18, 2004

E

of

SA

FBCLKOUT_H

FBCLKOUT_L

DBREQ_L

NC_D20 NC_C21 NC_D18 NC_C19 NC_B19

TDO

NC_AF18

NC_D22 NC_C22

NC_B13

NC_B7 NC_C3 NC_K1 NC_R2

NC_AA3

NC_F3 NC_C23 NC_AG7

NC_AE22

NC_C24 NC_A25

NC_C9

FBCLKOUT

AH19 AJ19

FBCLKOUTJ

DBREQJ

AE19

NC_D20

D20

NC_C21

C21

NC_D18

D18

NC_C19

C19

NC_B19

B19

TDO

A22

AF18

Connect to VDDIO for AMD suggest.

D22 C22

B13 B7 C3 K1 R2 AA3 F3 C23 AG7 AE22 C24 A25 C9

D

12

2D5V_VDDA_VREF

12

C524

C524 SC1U10V3KX

SC1U10V3KX

U13C

AH25

AJ25

AF20

AE18

AJ27

AF27 AE26

A23 A24 B23

AE12 AF12 AE11

AJ21

AH21

AJ23

AH23

AE24 AF24

C16

AG15

AH17

C15

E20 E17 B21 A21

C18

A19

A28

AJ28

AE23 AF23 AF22 AF21

C1

J3

R3

AA2

D3

AG2

B18

AH1

AE21

C20

AG4

C6 AG6 AE9 AG9

BGA754-SKT-U

2D5V_S0

3D3V_S0

12

LDT_RST#13,18 SB_CPUPWRGD18 LDT_STP#13,18

1 2

C525

C525 SC1U10V3KX

SC1U10V3KX

1D25V_S3

2D5V_S0

LDT_RST# CLKIN CLKIN# CORE_SENSE VDDIOFB VDDIOFBJ VDDIOSENSE NC_AE24 NC_AF24

2D5V_VDDA_S0

2D5V_S0

4 4

2D5V_CPUA_S0

1 2

12

C544

C544 SC10U10V5ZY

SC10U10V5ZY

R385

0R3-U

1 2

DY

63.R0004.151

2D5V_CPUR_S0

R382

R382 0R3-U

0R3-U

12

1 2

TC9

TC9 ST100U4VBM-1

ST100U4VBM-1

AMD SUGGEST TO USE 2D5V_CPUA_S0

KEMET,NT:5.7, B2 size ST100U4VBM-1 (80.10716.321)

3 3

Iripple=1.1A,ESR=70mohm

SANYO, NT$:6.1 Iripple=1.1A,ESR=70mohm

3.5/2.8/2.0

77.21071.031

HDT Connectors

2D5V_S0

2 2

1 1

12

C518

C518 SCD1U

SCD1U

DBREQJ

DY

DBRDY TCK TMS TDI TRST_L TDO

R359 680R3

2D5V_S3

CHANGE FROM 1KR3 TO 680R2 FOR AMD CHECK LIST

R359 680R3

NC_AG17 NC_AJ18 NC_D18

NC_B19 NC_C19 NC_D20 NC_C21

678

123

DY

1 2

DY

RN70 SRN680-URN70 SRN680-U

1 2 3 4 5

RN3 SRN680-URN3 SRN680-U

1 2 3 4 5

A

4 5

8 7 6

RN66

RN66 SRN680-U

SRN680-U

AMD SUGGEST TO USE 100 ~ 300UH

Change L270H

L19

L19 0R5J

0R5J

2D5V_VDDA_S0

12

DY

LAYOUT: Route trace 50 mils wide and 500 to 750 mils long between these caps.

12

C543 SC4D7U10V5ZY

78.47593.411

12

R358

R357

680R3

DY

1D2V_HT0A_S0

R389

R388

44D2R3F

1 2 1 2

44D2R3F

64.44R25.551

AMD suggest voltege from 2D5V_S0 to 2D5V_S3

differentially impedance 100

Add HDT connector for AMD suggested

2D5V_S0

12

C519

C519 SCD1U

SCD1U

DY

CN5

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24 26

SMC-CONN26A-FP

20.F0357.025

DY

LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil traces to exit ball field) and 500 mils long.

12

C556

C556 SC3300P50V2KX

SC3300P50V2KX

12

C535

C535 SC1000P50V2KX

SC1000P50V2KX

2D5V_S3

R428 820R3R428 820R3

R415 820R3R415 820R3

LDT_RST# SB_CPUPWRGD LDT_STP#

12

C571

C571 SCD22U16V3ZY

SCD22U16V3ZY

12

1 2 1 2

1 2

R441 680R3R441 680R3

1 2

R440 680R3R440 680R3

1 2

R408 680R3R408 680R3

C534

C534 SC1000P50V2KX

SC1000P50V2KX

CPUCLK3

CPUCLK#3

Validation Test Points

LAYOUT: Place close to the CPU.

NC_C15 NC_AE23 NC_AF23 NC_AF22 NC_AF21

B

TP66TP66 TP51TP51 TP52TP52 TP53TP53 TP54TP54

Iomax=120mA

U51

1

SHDN#

2

GND

3

IN

G913C-U

DY

L0_REF1 L0_REF0

123

C

COREFB COREFB# CORE_SENSE

VDDIOFB VDDIOFBJ VDDIOSENSE

CLKIN

12

R431

R431 169R3F

169R3F

CLKIN# NC_AJ23 NC_AH23 NC_AE24 NC_AF24

DBRDY

NC_C15

TMS TCK TRST_L TDI

NC_AE23 NC_AF23 NC_AF22 NC_AF21

678

4 5

TP60TP60 TP58TP58 TP59TP59 TP56TP56 TP76TP76 TP77TP77 TP74TP74 TP55TP55 TP57TP57

COREFB41

COREFB#41

C584

C584 SC3900P50V3KX

SC3900P50V3KX

C581

C581 SC3900P50V3KX

SC3900P50V3KX

R89 680R3R89 680R3

1 2

R88 680R3R88 680R3

SET

OUT

RN67

SRN680-U

DY

5

4

NC_C18

NC_A19

U13E

Y17

VSS

K17

VSS

H17

VSS

F17

VSS

E18

VSS

AJ26

VSS

AE29

VSS

AC16

VSS

AA16

VSS

J16

VSS

G16

VSS

E16

VSS

AH14

4 4

3 3

2 2

1 1

AD15 AB15

K15 E15

D16 AE14 AC14 AA14

G14

AF17 AD13 AB13

Y13 K13 H13

F13 AH12 AC12 AA12

G12

B12 AD11 AB11

Y11

K11

H11

F11 AH10 AC10

W10

U10

R10

N10

G10

B10

AD9

AH8 AC8

AD7

AB7

AH6 AC6

AA6

AH4

AH2 AD2

AB2

C29 AH28

AF28

AC28

W28

R28

J14

L10 J10

Y9 V9 T9 P9

M9

K9 H9 F9

W8

U8 R8 N8 L8 J8

G8

B8

V7 T7 P7

M7

K7 H7 F7

U6 R6 N6 L6 J6

G6

B6

B4

Y2 V2 T2 P2

M2

K2 H2 F2

L28

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

BGA754-SKT-U

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

A

VCC_CORE_S0 2D5V_S3

N20 L20 J20 AF19 AD19 AB19 Y19 K19 H19 F19 D19 AC18 AA18 G18 B16 AD17 AB17 H15 F15 G28 D28 B28 C27 AH26 AF26 AD26 Y26 T26 M26 H26 D26 B26 C25 B25 AJ24 AG24 AC24 AA24 W24 U24 R24 N24 J24 G24 E24 AG23 AD23 AB23 Y23 V23 T23 P23 K23 H23 F23 D23 AJ22 AH22 AG22 AC22 AA22 AG29 U22 R22 N22 L22 J22 G22 E22 B22 AG21 AD21 Y21 V21 T21 P21 M21 K21 H21 F21 D21 AJ20 AG20 AE20 AC20 AA20 W20 U20 R20 G20 J18 AE16 Y15 B14 J12 AA10 AB9 AA8 Y7 W6 AF2 D2 AG27 AG25 L24 M23 W22 AB21 AH20 B2

A

L7

AC15

H18 B20 E21 H22

J23 H24 F26

N7

L9 V10 G13 K14 Y14

AB14

G15

J15

AA15

H16 K16 Y16

AB16

G17

J17 AA17 AC17 AE17

F18 K18

Y18 AB18 AD18 AG19

E19

G19 AC19 AA19

J19 F20 H20 K20 M20 P20 T20 V20 Y20

AB20 AD20

G21

J21

L21 N21 R21 U21

W21 AA21 AC21

F22 K22 M22 P22 T22 V22

Y22 AB22 AD22

E23

G23

L23 N23 R23 U23

W23 AA23 AC23

B24 D24 F24 K24 M24 P24 T24 V24

Y24 AB24 AD24 AH24 AE25

K26

P26

V26

BGA754-SKT-U

U13D

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

E4 G4 J4 L4 N4 U4 W4 AA4 AC4 AE4 D5 AF5 F6 H6 K6 M6 P6 T6 V6 Y6 AB6 AD6 D7 G7 J7 AA7 AC7 AF7 F8 H8 AB8 AD8 D9 G9 AC9 AF9 F10 AD10 D11 AF11 F12 AD12 D13 AF13 F14 AD14 F16 AD16 D15 R4

N28 U28 AA28 AE27 R7 U7 W7 K8 M8 P8 T8 V8 Y8 J9 N9 R9 U9 W9 AA9 H10 K10 M10 P10 T10 Y10 AB10 G11 J11 AA11 AC11 H12 K12 Y12 AB12 J13 AA13 AC13 H14 AB26 E28 J28

B

VCC_CORE_S0

B

VCC_CORE_S0

C107

SCD22U16V3ZY

VCC_CORE_S0

C607

SCD22U16V3ZY

1 2

DY

0.22u x 4

2D5V_S3

12

1D25V_S3

12

0.22u x 2

C

LAYOUT: Place in uPGA socket cavity.

0.22u x 6

12

C100

SCD22U16V3ZY

C109

12

C101

SCD22U16V3ZY

12

C106

SCD22U16V3ZY

LAYOUT: Place on backside of processor.

C634

1 2

SCD22U16V3ZY

DY

12

C177

C164

SCD22U16V3ZY

12

C618

C105

SCD22U16V3ZY

1 2

SCD22U16V3ZY

DY

12

C176

C176 SCD22U16V3ZY

SCD22U16V3ZY

1D25V_S3

12

C175

C175 SCD22U16V3ZY

SCD22U16V3ZY

C104

C104 SC4D7U10V5ZY

SC4D7U10V5ZY

C600

SC10U10V5ZY

10u x 2

12

C174

C174 SCD22U16V3ZY

SCD22U16V3ZY

12

C609

C609 SC4D7U10V5ZY

SC4D7U10V5ZY

C635

C731

C731 SCD22U16V3ZY

SCD22U16V3ZY

12

C636

C608

C634

4.7u x 2

C

D

10u x 4

C108

2D5V_S3

12

C92

SC10U10V5ZY

12

C160

C160 SC10U10V5ZY

SC10U10V5ZY

C93

SC10U10V5ZY

12

C748

C748 SC4D7U10V5ZY

SC4D7U10V5ZY

SC10U10V5ZY

C606

C606 SC4D7U10V5ZY

SC4D7U10V5ZY

C115

C116

SC10U10V5ZY

12

C285

C285 SC4D7U10V5ZY

SC4D7U10V5ZY

12

10u x 1 4.7u x 6

D

12

C281

C283

SC4D7U10V5ZY

E

12

C282

C282 SC4D7U10V5ZY

SC4D7U10V5ZY

78.47593.411

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

CPU(4/4)_Power

SNIPE

of

756Thursday, November 18, 2004

E

SA

A

M_AA0 M_AA1 M_AA2 M_AA3 M_AA4 M_AA6 M_AA5 M_AA7 M_AA8 M_AA9 M_AA10 M_AA11

TP111TP111 TP33TP33 TP110TP110

C304

C304 SCD1U

SCD1U

M_AA12

M_ABS#0 M_ABS#1

M_DATA_R_0 M_DATA_R_1 M_DATA_R_2 M_DATA_R_3 M_DATA_R_4 M_DATA_R_5 M_DATA_R_6 M_DATA_R_7 M_DATA_R_8 M_DATA_R_9 M_DATA_R_10 M_DATA_R_11 M_DATA_R_12 M_DATA_R_13 M_DATA_R_14 M_DATA_R_15 M_DATA_R_16 M_DATA_R_17 M_DATA_R_18 M_DATA_R_19 M_DATA_R_20 M_DATA_R_21 M_DATA_R_22 M_DATA_R_23 M_DATA_R_24 M_DATA_R_25 M_DATA_R_26 M_DATA_R_27 M_DATA_R_28 M_DATA_R_29 M_DATA_R_30 M_DATA_R_31 M_DATA_R_32 M_DATA_R_33 M_DATA_R_34 M_DATA_R_35 M_DATA_R_36 M_DATA_R_37 M_DATA_R_38 M_DATA_R_39 M_DATA_R_40 M_DATA_R_41 M_DATA_R_42 M_DATA_R_43 M_DATA_R_44 M_DATA_R_45 M_DATA_R_46 M_DATA_R_47 M_DATA_R_48 M_DATA_R_49 M_DATA_R_50 M_DATA_R_51 M_DATA_R_52 M_DATA_R_53 M_DATA_R_54 M_DATA_R_55 M_DATA_R_56 M_DATA_R_57 M_DATA_R_58 M_DATA_R_59 M_DATA_R_60 M_DATA_R_61 M_DATA_R_62 M_DATA_R_63

12

A

DM1_RESET# DM1_A13 DM1_BA2

3D3V_S0

4 4

3 3

2 2

1 1

M_ARAS#5,9 M_ACAS#5,9 M_AWE#5,9

VREF_DDR_MEM VREF_DDR_MEM

Layout trace 20 mil Layout trace 20 mil

DM1

112

A0

111

A1

110

A2

109

A3

108

A4

107

A5

106

A6

105

A7

102

A8

101

A9

115

A10 / AP

100

A11

99

A12

117

BA0

116

BA1

5

DQ0

7

DQ1

13

DQ2

17

DQ3

6

DQ4

8

DQ5

14

DQ6

18

DQ7

19

DQ8

23

DQ9

29

DQ10

31

DQ11

20

DQ12

24

DQ13

30

DQ14

32

DQ15

41

DQ16

43

DQ17

49

DQ18

53

DQ19

42

DQ20

44

DQ21

50

DQ22

54

DQ23

55

DQ24

59

DQ25

65

DQ26

67

DQ27

56

DQ28

60

DQ29

66

DQ30

68

DQ31

127

DQ32

129

DQ33

135

DQ34

139

DQ35

128

DQ36

130

DQ37

136

DQ38

140

DQ39

141

DQ40

145

DQ41

151

DQ42

153

DQ43

142

DQ44

146

DQ45

152

DQ46

154

DQ47

163

DQ48

165

DQ49

171

DQ50

175

DQ51

164

DQ52

166

DQ53

172

DQ54

176

DQ55

177

DQ56

181

DQ57

187

DQ58

189

DQ59

178

DQ60

182

DQ61

188

DQ62

190

DQ63

71

CB0

73

CB1

79

CB2

83

CB3

72

CB4

74

CB5

80

CB6

84

CB7

85

NC

86

NC/(RESET#)

97

NC/A13

98

NC/BA2

123

NC

124

NC

200

NC

118

/RAS

120

/CAS

119

/WE

1

VREF

2

VREF

197

VDDSPD

199

VDDID

201

GND

DDR-SODIMM-N-U1

/CS0 /CS1

CKE0 CKE1

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8

CK0

/CK0

CK1

/CK1

CK2

/CK2

SCL

SDA

SA0 SA1 SA2

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

NORMAL TYPE

VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

B

TP41TP41 TP119TP119 TP40TP40

C381

C381 SCD1U

SCD1U

M_BA0 M_BA1 M_BA2 M_BA3 M_BA4 M_BA6 M_BA5 M_BA7 M_BA8 M_BA9 M_BA10 M_BA11 M_BA12

M_BBS#0 M_BBS#1

M_DATA_R_0 M_DATA_R_1 M_DATA_R_2 M_DATA_R_3 M_DATA_R_4 M_DATA_R_5 M_DATA_R_6 M_DATA_R_7 M_DATA_R_8 M_DATA_R_9 M_DATA_R_10 M_DATA_R_11 M_DATA_R_12 M_DATA_R_13 M_DATA_R_14 M_DATA_R_15 M_DATA_R_16 M_DATA_R_17 M_DATA_R_18 M_DATA_R_19 M_DATA_R_20 M_DATA_R_21 M_DATA_R_22 M_DATA_R_23 M_DATA_R_24 M_DATA_R_25 M_DATA_R_26 M_DATA_R_27 M_DATA_R_28 M_DATA_R_29 M_DATA_R_30 M_DATA_R_31 M_DATA_R_32 M_DATA_R_33 M_DATA_R_34 M_DATA_R_35 M_DATA_R_36 M_DATA_R_37 M_DATA_R_38 M_DATA_R_39 M_DATA_R_40 M_DATA_R_41 M_DATA_R_42 M_DATA_R_43 M_DATA_R_44 M_DATA_R_45 M_DATA_R_46 M_DATA_R_47 M_DATA_R_48 M_DATA_R_49 M_DATA_R_50 M_DATA_R_51 M_DATA_R_52 M_DATA_R_53 M_DATA_R_54 M_DATA_R_55 M_DATA_R_56 M_DATA_R_57 M_DATA_R_58 M_DATA_R_59 M_DATA_R_60 M_DATA_R_61 M_DATA_R_62 M_DATA_R_63

DM2_RESET# DM2_A13 DM2_BA2

M_BA13M_AA13

M_BRAS# M_BCAS# M_BWE#

12

3D3V_S0

121 122

M_CKE#0

96 95

M_DQS_R0

11

M_DQS_R1

25

M_DQS_R2

47

M_DQS_R3

61

M_DQS_R4

133

M_DQS_R5 M_DQS_R5

147

M_DQS_R6

169

M_DQS_R7

183 77

M_ADM_R0

12

M_ADM_R1

26

M_ADM_R2

48

M_ADM_R3

62 134

M_ADM_R5 M_ADM_R5

148

M_ADM_R6

170

M_ADM_R7

184 78

35 37 160 158

DDR_CLK0

89

DDR_CLK#0

91

SMBC_SB

195

SMBD_SB

193

194 196 198

9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192

3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186

202

NOT SUPPORT ECC CHECK AMD suggested pull-low

B

M_CS#0 5,9 M_CS#1 5,9

M_CKE#0 5,9 M_CKE#1 5,9

M_ADM#0 M_ADM#1 M_ADM#2 M_ADM#3 M_ADM#4 M_ADM#5 M_ADM#6 M_ADM#7

M_CLK5 5,9 M_CLK#5 5,9 M_CLK7 5,9 M_CLK#7 5,9

2D5V_S3

M_BRAS#5,9 M_BCAS#5,9 M_BWE#5,9

C

DM2

112

A0

111

A1

110

A2

109

A3

108

A4

107

A5

106

A6

105

A7

102

A8

101

A9

115

A10 / AP

100

A11

99

A12

117

BA0

116

BA1

5

DQ0

7

DQ1

13

DQ2

17

DQ3

6

DQ4

8

DQ5

14

DQ6

18

DQ7

19

DQ8

23

DQ9

29

DQ10

31

DQ11

20

DQ12

24

DQ13

30

DQ14

32

DQ15

41

DQ16

43

DQ17

49

DQ18

53

DQ19

42

DQ20

44

DQ21

50

DQ22

54

DQ23

55

DQ24

59

DQ25

65

DQ26

67

DQ27

56

DQ28

60

DQ29

66

DQ30

68

DQ31

127

DQ32

129

DQ33

135

DQ34

139

DQ35

128

DQ36

130

DQ37

136

DQ38

140

DQ39

141

DQ40

145

DQ41

151

DQ42

153

DQ43

142

DQ44

146

DQ45

152

DQ46

154

DQ47

163

DQ48

165

DQ49

171

DQ50

175

DQ51

164

DQ52

166

DQ53

172

DQ54

176

DQ55

177

DQ56

181

DQ57

187

DQ58

189

DQ59

178

DQ60

182

DQ61

188

DQ62

190

DQ63

71

CB0

73

CB1

79

CB2

83

CB3

72

CB4

74

CB5

80

CB6

84

CB7

85

NC

86

NC/(RESET#)

97

NC/A13

98

NC/BA2

123

NC

124

NC

200

NC

118

/RAS

120

/CAS

119

/WE

1

VREF

2

VREF

197

VDDSPD

199

VDDID

202

GND

DDR-SODIMM-R-U2

C

/CS0 /CS1

CKE0 CKE1

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8

CK0

/CK0

CK1

/CK1

CK2

/CK2

SCL SDA

SA0 SA1 SA2

VDD VDD VDD VDD VDD VDD VDD

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDD VDD VDD VDD VDD VDD VDD VDD

REVERSE TYPE

VDD VDD

VSS

GND

121 122

96 95

11 25 47 61 133 147 169 183 77

12 26 48 62 134 148 170 184 78

35 37 160 158 89 91

195 193

194 196 198

9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192

3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186

201

M_CS#2 5,9

M_CKE#1

M_DQS_R0 M_DQS_R1 M_DQS_R2 M_DQS_R3 M_DQS_R4

M_DQS_R6 M_DQS_R7

M_ADM_R0 M_ADM_R1 M_ADM_R2 M_ADM_R3 M_ADM_R4M_ADM_R4

M_ADM_R6 M_ADM_R7

DDR_CLK1 DDR_CLK#1

DM2_SA0

M_CS#3 5,9

M_ADM#0 M_ADM#1 M_ADM#2 M_ADM#3 M_ADM#4 M_ADM#5 M_ADM#6 M_ADM#7

M_CLK4 5,9 M_CLK#4 5,9 M_CLK6 5,9 M_CLK#6 5,9

SMBC_SB 3,21 SMBD_SB 3,21

2D5V_S3

1 2

By ME requset DM1 P/N: Main 62.10017.191 Second 62.10017.381

By ME requset DM2 P/N: Main 62.10017.201 Second 62.10017.371 Third 62.10017.701

D

M_ADM_R[7..0] 9

M_DATA_R_[63..0] 9

M_DQS_R[7..0] 9

M_AA[13..0] 5,9

M_ABS#[1..0] 5,9

M_BA[13..0] 5,9

M_BBS#[1..0] 5,9

R233

3D3V_S0

4K7R3

RN41

DDR_CLK#1 DDR_CLK#0 DDR_CLK1 DDR_CLK0

8 7 6

RN41

SRN10K-2

DY

2D5V_S3

1 2 3 45

E

AMD K8 ClawHummar

MD63

DDR SOCKET PLACEMENT

TOP VIEW PERSPECTIVE DRAWING

DM1

Pin 199

Pin 200 Pin 2

DM2(Reverse)

Title

Size Document Number Rev

A3

Date: Sheet of

D

Date: Sheet

DDR SO-DIMM SKT

SMA11

SNIPE

SMA10 SMA0

SMA14

SMA12

Pin 200

MD0

Pin 2

Pin 1

Pin 199

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Pin 1

856Thursday, November 18, 2004

E

SA

of

SA

A

SERIES DAMPING PARALLEL TERMINATION

PLACE RNs CLOSE TO FIRST DM ( DM1 ), < 0.75" STRICT EQUAL LENGTH LIMITATION WITH DQS, CB PINS

RN21

M_DATA4

M_ADM0 M_DATA6 M_DATA7 M_DATA13 M_DATA12

4 4

M_ADM1

M_DATA1 M_DATA0 M_DQS0 M_DATA2 M_DATA3 M_DATA8 M_DATA9 M_DQS1

M_DATA15 M_DATA21 M_DATA20 M_ADM2 M_DATA23 M_DATA_R_23 M_DATA22 M_DATA25 M_DATA_R_25

3 3

M_DATA11 M_DATA10 M_DATA17 M_DATA16 M_DQS2 M_DQS_R2 M_DATA19 M_DATA_R_19 M_DATA18 M_DATA24

M_DATA29 M_DATA28

M_ADM3 M_DATA26 M_DATA27 M_DATA30 M_DATA_R_30 M_DATA31

2 2

RN21

1 2 3 4 5 6 7 8 9

SRN10J-3

RN34

1 2 3 4 5 6 7 8 9

SRN10J-3

RN20

1 2 3 4 5 6 7 8 9

SRN10J-3

RN33

1 2 3 4 5 6 7 8 9

SRN10J-3

RN19

1 2 3 4 5 6 7 8 9

SRN10J-3

16 15 14 13 12 11 10

M_DATA_R_4 M_DATA_R_5M_DATA5 M_ADM_R0 M_DATA_R_6 M_DATA_R_7 M_DATA_R_13 M_DATA_R_12 M_ADM_R1

M_DATA_R_1 M_DATA_R_0 M_DQS_R0 M_DATA_R_2 M_DATA_R_3 M_DATA_R_8 M_DATA_R_9 M_DQS_R1

M_DATA_R_14M_DATA14 M_DATA_R_15 M_DATA_R_21 M_DATA_R_20 M_ADM_R2

M_DATA_R_22

M_DATA_R_11 M_DATA_R_10 M_DATA_R_17 M_DATA_R_16

M_DATA_R_18 M_DATA_R_24

M_DATA_R_29 M_DATA_R_28 M_DQS_R3M_DQS3 M_ADM_R3 M_DATA_R_26 M_DATA_R_27

M_DATA_R_31

M_DATA34 M_DATA32 M_DQS4 M_DATA33 M_DATA36 M_DATA37 M_ADM4 M_DATA39

M_DATA35 M_DATA41 M_DATA40 M_DQS5 M_DATA42 M_DATA43 M_DATA49 M_DATA48

M_DATA38 M_DATA45 M_DATA44 M_ADM5 M_DATA47 M_DATA46 M_DATA53 M_DATA52

M_DQS6 M_DATA50 M_DATA51 M_DATA56 M_DATA57 M_DQS7 M_DATA58 M_DATA59

M_ADM6 M_DATA54 M_DATA55 M_DATA61 M_DATA60 M_ADM7 M_DATA62 M_DATA63

1 2 3 4 5 6 7 8 9

RN18

SRN10J-3

RN28

SRN10J-3

RN17

SRN10J-3

RN27

SRN10J-3

RN16

SRN10J-3

B

16 15 14 13 12 11 10

M_DATA_R_34 M_DATA_R_32 M_DQS_R4 M_DATA_R_33 M_DATA_R_36 M_DATA_R_37 M_ADM_R4 M_DATA_R_39

M_DATA_R_35 M_DATA_R_41 M_DATA_R_40 M_DQS_R5 M_DATA_R_42 M_DATA_R_43 M_DATA_R_49 M_DATA_R_48

M_DATA_R_38

M_DATA_R_45

M_DATA_R_44 M_ADM_R5 M_DATA_R_47 M_DATA_R_46 M_DATA_R_53 M_DATA_R_52

M_DQS_R6 M_DATA_R_50 M_DATA_R_51 M_DATA_R_56 M_DATA_R_57 M_DQS_R7 M_DATA_R_58 M_DATA_R_59

M_ADM_R6 M_DATA_R_54 M_DATA_R_55 M_DATA_R_61 M_DATA_R_60 M_ADM_R7 M_DATA_R_62 M_DATA_R_63

M_ADM_R1 M_DATA_R_13 M_DATA_R_12 M_DATA_R_6 M_DATA_R_7 M_ADM_R0 M_DATA_R_5 M_DATA_R_4

M_DATA_R_1 M_DATA_R_0 M_DQS_R0 M_DATA_R_2 M_DATA_R_3 M_DATA_R_8 M_DATA_R_9 M_DQS_R1

M_DATA_R_25 M_DATA_R_22 M_DATA_R_23 M_ADM_R2 M_DATA_R_20 M_DATA_R_21 M_DATA_R_14 M_DATA_R_15

M_DATA_R_11 M_DATA_R_10 M_DATA_R_16 M_DATA_R_17 M_DQS_R2 M_DATA_R_19 M_DATA_R_18 M_DATA_R_24

M_DATA_R_30 M_DATA_R_31 M_DATA_R_26 M_DATA_R_27 M_ADM_R3 M_DQS_R3 M_DATA_R_29 M_DATA_R_28

RN44

1 2 3 4 5 6 7 8 9

SRN68J-1

SRN68J-1 RN52

RN52

1 2 3 4 5 6 7 8 9

SRN68J-1

SRN68J-1 RN43

RN43

1 2 3 4 5 6 7 8 9

SRN68J-1

SRN68J-1 RN51

RN51

1 2 3 4 5 6 7 8 9

SRN68J-1

SRN68J-1 RN42

RN42

1 2 3 4 5 6 7 8 9

SRN68J-1

C

PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO SECOND DM ( DM2 )

1D25V_S3 1D25V_S3

16 15 14 13 12 11 10

RN38

1 2 3 4 5 6 7 8 9

SRN68J-1

SRN68J-1 RN48

RN48

1 2 3 4 5 6 7 8 9

SRN68J-1

SRN68J-1 RN37

RN37

1 2 3 4 5 6 7 8 9

SRN68J-1

SRN68J-1 RN47

RN47

1 2 3 4 5 6 7 8 9

SRN68J-1

SRN68J-1 RN36

RN36

1 2 3 4 5 6 7 8 9

SRN68J-1

NO EQUAL LENGTH LIMITATION

M_DATA_R_36

16

M_DATA_R_32

15

M_DATA_R_37

14

M_DATA_R_33

13

M_ADM_R4

12

M_DQS_R4

11

M_DATA_R_38

10

M_DATA_R_39

M_DATA_R_48

16

M_DATA_R_49

15

M_DATA_R_43

14

M_DATA_R_42

13

M_DQS_R5

12

M_DATA_R_41

11

M_DATA_R_40

10

M_DATA_R_34

M_DATA_R_35

16

M_DATA_R_46

15

M_DATA_R_47

14

M_ADM_R5

13

M_DATA_R_44

12

M_DATA_R_45

11

M_DATA_R_53

10

M_DATA_R_52

M_DATA_R_59

16

M_DATA_R_58

15

M_DQS_R7

14

M_DATA_R_57

13

M_DATA_R_56

12

M_DATA_R_51

11

M_DATA_R_50

10

M_DQS_R6

M_DATA_R_55

16

M_DATA_R_54

15

M_ADM_R6

14

M_DATA_R_60

13

M_DATA_R_61

12

M_ADM_R7

11

M_DATA_R_63

10

M_DATA_R_62

D

M_CKE#1 M_BA12

M_CKE#0 M_AA12

M_AA11 M_AA9 M_AA7 M_AA5 M_AA4 M_AA8 M_AA6 M_AA3

M_CS#3 M_BA13 M_CS#2 M_BRAS# M_BBS#1 M_BCAS# M_BA0 M_BA2

M_AA1 M_AA10 M_AA2 M_AA0 M_ABS#1 M_ARAS# M_AWE# M_ABS#0

M_BA7 M_BA3 M_BA6 M_BA9 M_BA10 M_BA1 M_BBS#0 M_BWE#

M_BA5 M_BA8 M_BA11 M_BA4

M_AA13 M_CS#0 M_CS#1 M_ACAS#

RN50

2 1 4

SRN47J

SRN47J RN32

RN32

2 1 4

SRN47J

RN31

1 2 3 4 5 6 7 8 9

SRN47J-1-U

SRN47J-1-U RN39

RN39

1 2 3 4 5 6 7 8 9

SRN47J-1-U

SRN47J-1-U RN30

RN30

1 2 3 4 5 6 7 8 9

SRN47J-1-U

SRN47J-1-U RN49

RN49

1 2 3 4 5 6 7 8 9

SRN47J-1-U

RN40

1 2 3 4 5

SRN47-1

RN29

1 2 3 4 5

SRN47-1

8 7 6

E

3

16 15 14 13 12 11 10

M_ADM_R[7..0] 8

M_ADM[7..0] 5

M_DATA[63..0] 5

M_DATA_R_[63..0] 8

M_DQS[7..0] 5

M_DQS_R[7..0] 8

M_AA[13..0] 5,8

M_ABS#[1..0] 5,8

M_BA[13..0] 5,8

M_BBS#[1..0] 5,8

M_AWE# 5,8 M_ACAS# 5,8 M_ARAS# 5,8

M_BWE# 5,8 M_BCAS# 5,8 M_BRAS# 5,8

M_CS#0 5,8 M_CS#1 5,8 M_CS#2 5,8 M_CS#3 5,8

M_CKE#05,8

M_CKE#15,8

05/10 Remove the damping resistor for AMD suggest.

1 1

M_CKE#0

M_CKE#1

R498

1 2

121R3F

R481

1 2

121R3F

R499

1 2

121R3F

R486

1 2

121R3F

A

B

M_CLK7 M_CLK#7

M_CLK6 M_CLK#6

M_CLK5 M_CLK#5

M_CLK4 M_CLK#4

C

M_CLK7 5,8 M_CLK#7 5,8

M_CLK6 5,8 M_CLK#6 5,8

M_CLK5 5,8 M_CLK#5 5,8

M_CLK4 5,8 M_CLK#4 5,8

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

D

Date: Sheet of

DDR DAMPING & TERMINATION

SNIPE

E

of

956Thursday, November 18, 2004

SA

Place it near CPU

A

B

C

D

E

4 4

2D5V_S3

1D25V_S3

3 3

1D25V_S3

2 2

12

2D5V_S3

12

C290

SCD1U

C291

SCD1U

C456

SCD1U

C455

SCD1U

DY

12

C436

C436 SCD1U

SCD1U

C435

C435 SCD1U

SCD1U

C419

C419 SCD1U

SCD1U

C418

C418 SCD1U

SCD1U

12

C438

SCD1U

C437

SCD1U

C458

SCD1U

C457

SCD1U

LAYOUT:Place altemating caps to GND and 2D5_S3

12

C440

SCD1U

C439

SCD1U

C421

SCD1U

C420

SCD1U

12

C442

C410

C410 SCD1U

SCD1U

12

DY

C441

C409

C409 SCD1U

SCD1U

12

C292

C345

C345 SCD1U

SCD1U

12

C356

C459

C459 SCD1U

SCD1U

12

C444

SCD1U

C443

SCD1U

C249

SCD1U

C293

SCD1U

12

C446

C327

C327 SCD1U

SCD1U

12

DY

12

C445

C328

C328 SCD1U

SCD1U

12

C228

C228 SCD1U

SCD1U

C254

C254 SCD1U

SCD1U

12

C408

SCD1U

C208

SCD1U

12

C413

SCD1U

C447

SCD1U

C355

SCD1U

C407

SCD1U

12

C452

SCD1U

C451

SCD1U

C460

SCD1U

C280

SCD1U

12

C454

C454 SCD1U

SCD1U

12

DY

C453

C453 SCD1U

SCD1U

DY

12

C165

C165 SCD1U

SCD1U

12

DY

C207

C207 SCD1U

SCD1U

DY

1D25V_S3

12

DY

C434

C434 SCD1U

SCD1U

12

C430

C390

SCD1U

DY

12

C263

C263 SCD1U

SCD1U

C248

C248 SCD1U

SCD1U

DY

12

C284

C268

SCD1U

DY

12

DY

12

DY

C448

C448 SCD1U

SCD1U

C414

C414 SCD1U

SCD1U

C310

C310 SCD1U

SCD1U

C376

C376 SCD1U

SCD1U

12

C450

SCD1U

C449

SCD1U

C235

SCD1U

C319

SCD1U

12

C415

SCD1U

C416

SCD1U

C399

SCD1U

C245

SCD1U

12

C324

C379

C379 SCD1U

SCD1U

12

DY

C325

C378

C378 SCD1U

SCD1U

12

C275

C288

C288 SCD1U

SCD1U

12

C423

C269

C269 SCD1U

SCD1U

12

LAYOUT:Place close to Power Pin of DDR socket.

LAYOUT:Place at end of the DIMMs

1D25V_S3

12

TC27

TC27 ST100U4VBM-U

ST100U4VBM-U

12

TC28

TC28 ST100U4VBM-1

ST100U4VBM-1

12

C872

SC22U10V6ZY-U

12

C880

SC22U10V6ZY-U

12

C925

SC22U10V6ZY-U

12

C917

SC22U10V6ZY-U

2D5V_S3 2D5V_S3

C301

SCD22U16V3ZY

1 2

C323

1 2

SCD22U16V3ZY

C380

1 2

DY

SCD22U16V3ZY

C377

SCD22U16V3ZY

1 2

DY

C412

SCD22U16V3ZY

1 2

C302

1 2

DY

C411

1 2

DY

C417

1 2

SCD22U16V3ZY

C303

C303 SCD22U16V3ZY

SCD22U16V3ZY

C326

C326 SCD22U16V3ZY

SCD22U16V3ZY

0.22u x 10

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

A

B

C

D

Date: Sheet

DDR DECOUPLING

SNIPE

E

SA

of

10 56Thursday, November 18, 2004

SA

A

4 4

B

C

D

E

CLAW HAMMER TO NB NB TO CLAW HAMMER

CPUCADOUT[15..0]4 CPUCADOUTJ[15..0]4

3 3

1D2V_S0

12

SCD1U16V

2 2

AROUND NB

C111

12

DY

C715

C715 SCD1U16V

SCD1U16V

CPUHTTCLKOUT14 CPUHTTCLKOUTJ14

CPUHTTCLKOUT04 CPUHTTCLKOUTJ04

CPUHTTCTLOUT04 CPUHTTCTLOUTJ04

1D2V_HT0A_S0

R94 49D9R2FR94 49D9R2F

1 2

R87 49D9R2FR87 49D9R2F

1 2

CPUCADOUT15 CPUCADOUTJ15 CPUCADOUT14 CPUCADOUTJ14 CPUCADOUT13 CPUCADOUTJ13 CPUCADOUT12 CPUCADOUTJ12 CPUCADOUT11 CPUCADOUTJ11 CPUCADOUT10 CPUCADOUTJ10 CPUCADOUT9 CPUCADOUTJ9 CPUCADOUT8 CPUCADOUTJ8

CPUCADOUT7 CPUCADOUTJ7 CPUCADOUT6 CPUCADOUTJ6 CPUCADOUT5 CPUCADOUTJ5 CPUCADOUT4 CPUCADOUTJ4 CPUCADOUT3 CPUCADOUTJ3 CPUCADOUT2 CPUCADOUTJ2 CPUCADOUT1 CPUCADOUTJ1 CPUCADOUT0 CPUCADOUTJ0

CPUHTTCLKOUT1 CPUHTTCLKOUTJ1

CPUHTTCLKOUT0 CPUHTTCLKOUTJ0

CPUHTTCTLOUT0 CPUHTTCTLOUTJ0

HT_RXCALN HT_RXCALP

W25

W24 AA25 AA24 AB26 AA26 AC25 AC24 AD26 AC26

W30

AB29 AA29 AC29 AC28

W26

W29

W28

T26 R26 U25 U24 V26 U26

R29 R28 T30 R30 T28 T29 V29 U29 Y30

Y28 Y29

Y26

P29 N29

D27 E27

U20A

HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N

HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N

HT_RXCLK1P HT_RXCLK1N

HT_RXCLK0P HT_RXCLK0N

HT_RXCTLP HT_RXCTLN

HT_RXCALN HT_RXCALP

RS480M-U

NB0CADOUT15

PART 1OF6

HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N

HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N

HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N

HT_TXCLK1P HT_TXCLK1N

HT_TXCLK0P HT_TXCLK0N

HT_TXCTLP

HT_TXCTLN

HT_TXCALP HT_TXCALN

HYPER TRANSPORT CPU I/F

R24 R25 N26 P26 N24 N25 L26 M26 J26 K26 J24 J25 G26 H26 G24 G25

L30 M30 L28 L29 J29 K29 H30 H29 E29 E28 D30 E30 D28 D29 B29 C29

L24 L25

F29 G29

M29 M28

B28 A28

NB0CADOUTJ15 NB0CADOUT14 NB0CADOUTJ14 NB0CADOUT13 NB0CADOUTJ13 NB0CADOUT12 NB0CADOUTJ12 NB0CADOUT11 NB0CADOUTJ11 NB0CADOUT10 NB0CADOUTJ10 NB0CADOUT9 NB0CADOUTJ9 NB0CADOUT8 NB0CADOUTJ8

NB0CADOUT7 NB0CADOUTJ7 NB0CADOUT6 NB0CADOUTJ6 NB0CADOUT5 NB0CADOUTJ5 NB0CADOUT4 NB0CADOUTJ4 NB0CADOUT3 NB0CADOUTJ3 NB0CADOUT2 NB0CADOUTJ2 NB0CADOUT1 NB0CADOUTJ1 NB0CADOUT0 NB0CADOUTJ0

NB0HTTCLKOUT1 NB0HTTCLKOUTJ1

NB0HTTCLKOUT0 NB0HTTCLKOUTJ0

NB0HTTCTLOUT NB0HTTCTLOUTJ

HT_TXCALP HT_TXCALN

NB0HTTCLKOUT1 4 NB0HTTCLKOUTJ1 4

NB0HTTCLKOUT0 4 NB0HTTCLKOUTJ0 4

NB0HTTCTLOUT 4

R80 100R2FR80 100R2F

NB0HTTCTLOUTJ 4

1 2

NB0CADOUT[15..0] 4 NB0CADOUTJ[15..0] 4

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

A

B

C

D

Date: Sheet

NB-RS480M_HT

SNIPE

SA

of

11 56Thursday, November 18, 2004

E

SA

A

4 4

3 3

2D5V_S3

12

R549

R549 1KR2F

1KR2F

MEM_VREF

R550

R550 1KR2F

1KR2F

Connect MEM_VREF to VDD_MEM/2 PA_RS480F1.PDF

SCD47U16V3ZY

1 2 1 2

1 2

L20

1 2

0R5J-1

SCD47U16V3ZY

C707

2 2

1D8V_S0

C707 C244

C244

R542 1KR2R542 1KR2

NB_MEM_VMODE

12

C784

C784 SC1U10V3KX

SC1U10V3KX

MEM_CAP1 MEM_CAP2

MEM_VREF

MPVDD_PLL

AF17 AK17 AH16

AF16

AJ22

AJ21 AH20 AH21 AK19 AH19

AJ17 AG16 AG17 AH17

AJ18

AG26

AJ29 AE21 AH24 AH12 AG13

AH8 AE8

AF25 AH30 AG20

AJ25 AH13

AF14

AG8

AG25 AH29

AF21 AK25

AJ12

AF13

AK7 AF9

AE17 AH18 AE18

AJ19

AF18

AK16

AJ16

AE28

AJ20

AK20

AJ15

AJ14

AJ7

AJ4

U20C

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14

MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7

MEM_DQS0P MEM_DQS1P MEM_DQS2P MEM_DQS3P MEM_DQS4P MEM_DQS5P MEM_DQS6P MEM_DQS7P

MEM_DQS0N MEM_DQS1N MEM_DQS2N MEM_DQS3N MEM_DQS4N MEM_DQS5N MEM_DQS6N MEM_DQS7N

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE

MEM_CKP MEM_CKN

MEM_CAP1 MEM_CAP2

MEM_VMODE

MEM_VREF

MPVDD MPVSS

RS480M-U

PART 3 OF 6

B

AF28

MEM_DQ0

AF27

MEM_DQ1

AG28

MEM_DQ2

AF26

MEM_DQ3

AE25

MEM_DQ4

AE24

MEM_DQ5

AF24

MEM_DQ6

AG23

MEM_DQ7

AE29

MEM_DQ8

AF29

MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39 MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43

MEM_A I/F

MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63

MEM_COMPP MEM_COMPN

AG30 AG29 AH28 AJ28 AH27 AJ27 AE23 AG22 AF23 AF22 AE20 AG19 AF20 AF19 AH26 AJ26 AK26 AH25 AJ24 AH23 AJ23 AH22 AK14 AH14 AK13 AJ13 AJ11 AH11 AJ10 AH10 AE15 AF15 AG14 AE14 AE12 AF12 AG11 AE11 AJ9 AH9 AJ8 AK8 AH7 AJ6 AH6 AJ5 AG10 AF11 AF10 AE9 AG7 AF8 AF7 AE7

AH5 AD30

LANE REVERSE

PCIE_RX0P_SB18 PCIE_RX0N_SB18

PCIE_RX1P_SB18 PCIE_RX1N_SB18

MEM_COMPP MEM_COMPN

R559 60D4R2F

1 2

R115 60D4R2F

1 2

DO NOT SUPPORT SIDEPORT MEMORY DUMMY IT

C

PEG_TXP[15..0]449

PEG_TXN[15..0]449

PEG_RXP[15..0]449

PEG_RXN[15..0]449

U20B

PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13 PEG_TXN13 PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5 PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0

PCE_ISET

R181

1 2

10KR2

PCE_TXISET

R167

1 2

10KR2

2D5V_S3

DY

DY DY

DY

D8

GFX_RX0P

D7

GFX_RX0N

D5

GFX_RX1P

D4

GFX_RX1N

E4

GFX_RX2P

F4

GFX_RX2N

G5

GFX_RX3P

G4

GFX_RX3N

H4

GFX_RX4P

J4

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

G1

GFX_RX6P

G2

GFX_RX6N

K5

GFX_RX7P

K4

GFX_RX7N

L4

GFX_RX8P

M4

GFX_RX8N

N5

GFX_RX9P

N4

GFX_RX9N

P4

GFX_RX10P

R4

GFX_RX10N

P5

GFX_RX11P

P6

GFX_RX11N

P2

GFX_RX12P

R2

GFX_RX12N

T5

GFX_RX13P

T4

GFX_RX13N

U4

GFX_RX14P

V4

GFX_RX14N

W1

GFX_RX15P

W2

GFX_RX15N

AE1

GPP_RX0P/SB_RX2P

AE2

GPP_RX0N/SB_RX2N

AB2

GPP_RX1P/SB_RX3P

AC2

GPP_RX1N/SB_RX3N

AB5

GPP_RX2P

AB4

GPP_RX2N

Y4

GPP_RX3P

AA4

GPP_RX3N

AG1

SB_RX0P

AH1

SB_RX0N

AC5

SB_RX1P

AC6

SB_RX1N

AH3

PCE_ISET

AJ3

PCE_TXISET

RS480M-U

DO NOT SUPPORT SIDEPORT MEMORY DUMMY IT

PART 2 OF 6

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P/SB_TX2P GPP_TX0N/SB_TX2N

GPP_TX1P/SB_TX3P GPP_TX1N/SB_TX3N

PCIE I/F TO VIDEO

PCIE I/F TO SLOT

PCIE I/F TO SB

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

PCE_PCAL

PCE_NCAL

SB_TX0P SB_TX0N

SB_TX1P SB_TX1N

D

PEG_RXP15_NB PEG_RXP15

A7 B7

PEG_RXP14_NB

B6 B5

PEG_RXP13_NB

A5

PEG_RXN13_NB

A4

PEG_RXP12_NB

B3

PEG_RXN12_NB

B2

PEG_RXP11_NB

C1

PEG_RXN11_NB

D1

PEG_RXP10_NB

D2

PEG_RXN10_NB

E2

PEG_RXP9_NB

F2

PEG_RXN9_NB

F1

PEG_RXP8_NB

H2

PEG_RXN8_NB

J2

PEG_RXP7_NB

J1

PEG_RXN7_NB

K1

PEG_RXP6_NB

K2

PEG_RXN6_NB

L2

PEG_RXP5_NB

M2

PEG_RXN5_NB

M1

PEG_RXP4_NB

N1

PEG_RXN4_NB

N2

PEG_RXP3_NB

R1

PEG_RXN3_NB

T1

PEG_RXP2_NB

T2

PEG_RXN2_NB

U2

PEG_RXP1_NB

V2

PEG_RXN1_NB

V1

PEG_RXP0_NB

Y2

PEG_RXN0_NB

AA2

AD2 AD1

AA1 AB1

Y5 Y6

W5 W4

AF2 AG2

AC4 AD4

AH2 AJ2

Do not stuff when using M26

SB_TX0P

C798 SCD1U16VC798 SCD1U16V

1 2

SB_TX0N

C799

1 2

SCD1U16V

SB_TX1P

C791 SCD1U16VC791 SCD1U16V

1 2

SB_TX1N

C797

1 2

SCD1U16V

PCE_PCAL

R157 150R2R157 150R2

PCE_NCAL

1 2

R166 100R2R166 100R2

1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

C132

C132 SCD1U16V

SCD1U16V

C131

C131 SCD1U16V

SCD1U16V

C143

C143 SCD1U16V

SCD1U16V

C142

C142 SCD1U16V

SCD1U16V

C141

C141 SCD1U16V

SCD1U16V

C151

C151 SCD1U16V

SCD1U16V

C156

C156 SCD1U16V

SCD1U16V

C157

C157 SCD1U16V

SCD1U16V

C158

C158 SCD1U16V

SCD1U16V

C159

C159 SCD1U16V

SCD1U16V

C162

C162 SCD1U16V

SCD1U16V

C163

C163 SCD1U16V

SCD1U16V

C169

C169 SCD1U16V

SCD1U16V

C170

C170 SCD1U16V

SCD1U16V

C171

C171 SCD1U16V

SCD1U16V

C172

C172 SCD1U16V

SCD1U16V

C202

C202 SCD1U16V

SCD1U16V

C203

C203 SCD1U16V

SCD1U16V

C173

C173 SCD1U16V

SCD1U16V

C204

C204 SCD1U16V

SCD1U16V

C221

C221 SCD1U16V

SCD1U16V

C222

C222 SCD1U16V

SCD1U16V

C205

C205 SCD1U16V

SCD1U16V

C223

C223 SCD1U16V

SCD1U16V

C224

C224 SCD1U16V

SCD1U16V

C225

C225 SCD1U16V

SCD1U16V

C226

C226 SCD1U16V

SCD1U16V

C232

C232 SCD1U16V

SCD1U16V

C233

C233 SCD1U16V

SCD1U16V

C234

C234 SCD1U16V

SCD1U16V

C240

C240 SCD1U16V

SCD1U16V

C241

C241 SCD1U16V

SCD1U16V

PCIE_TX0P_SB 18 PCIE_TX0N_SB 18

PCIE_TX1P_SB 18 PCIE_TX1N_SB 18

1D2V_S0

PEG_RXN15PEG_RXN15_NB PEG_RXP14 PEG_RXN14PEG_RXN14_NB PEG_RXP13 PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10 PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0

E

LANE REVERSE

When disable local frame buffer, VDD_MEM connect to 2D5V_S3, MEM_VMODE connect to GND, MEM_VREF connect to 2D5V_S3, MPVDD connected to 1D8V

1 1

DSG-215-RS480-04.PDF

A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

NB-RS480M_MEM/PCIE_LINK I/F

Size Document Number Rev

A3

Date: Sheet of

B

C

D

Date: Sheet

SNIPE

of

12 56Thursday, November 18, 2004

E

SA

A

Y

1D8V_S0

R450

1 2

0R3-U

4 4

Do not stuff when using M26

3 3

1D8V_S0

2 2

ALL_PWROK39

1 1

12

DY

R98

1 2

BLM11A121S

1D8V_S0

12

LDT_RST#6,18

LPC_RST#18,37

AVDDQ

12

C599

C604

SC10U10V5ZY

SCD1U16V

1D8V_S0

12

R168

R168 4K7R2

4K7R2

NB_SUS_STAT#

LDT_RST#

R101

1 2

BLM11A121S

HTPVDD

12

C113

C705

SC10U10V5ZY

SCD1U16V

DY

R124 0R2-0

A

RS480_TV_CRMA54

RS480_TV_LUMA54

RS480_TV_COMP54

MAIN_CRT_R54 MAIN_CRT_G54

MAIN_CRT_B54

12

C118

C118 SCD1U16V

SCD1U16V

1 2

3D3V_S0

12

13

3D3V_S0

1

2

PLVDD

12

C122

C122 SC10U10V5ZY

SC10U10V5ZY

147

TSLCX08MTC-U

147

TSLCX08MTC-U

1 2

1D8V_S0

12

R464

12

75R2F

R468

12

75R2F

R467

R467 75R2F

75R2F

12

C127

C123

SCD1U16V

3D3V_S0

R514

1 2

0R3-U

DO NOT SUPPORT SIDEPORT MEMORY DO NOT SUPPORT SERIAL STRAP ROM DUMMY IT

U19D

11

U19A

RS480_RST#_R RS480_RST#

3

R107

R107 33R2

33R2

D

AG_RST# 34,449

R106

R106 33R2

33R2

1 2

R70

1 2

0R3-U

12

R477

12

75R2F

R478

12

75R2F

12

B

AVDD3D3V_S0

R86

1 2

0R3-U

R476

R476 75R2F

75R2F

VGA_CLK_DDC_354 VGA_DAT_DDC_354

0R3-U

12

MAIN_JVGA_VS54 MAIN_JVGA_HS54

C89

C89 SC1U10V3ZY

SC1U10V3ZY

AVDDQ

12

C90

C90 SC1U10V3ZY

SC1U10V3ZY

1D8VAVDDD1_S0

C605

C605 SC1U10V3ZY

SC1U10V3ZY

R438 715R3FR438 715R3F R502 0R2-0R502 0R2-0 R517 0R2-0R517 0R2-0

1 2 1 2 1 2

Do not stuff when using M26

NB_PWRGD39 LDT_STP#6,18 ALLOW_LDTSTOP18

3D3VDDR_S0

CLK14_NB3

C702

SB_OSC_INT21

SC1U10V3ZY

12

C121

C121 DUMMY-C3

DUMMY-C3

B

Use CLK GEN REF 14.318M CLK to SB OSCIN DUMMY IT

R528 3KR2F

R528 3KR2F R497 3KR2F

R497 3KR2F R496 3KR2FR496 3KR2F

LVDS_DIGON

RB751V-40-U

NB_PWRGD

RB751V-40-U

LVDS_BLON

1 2

R109 22R2

12 12 12

DY

DY DY

DY

BMREQ#18

12

D28

DY

D27

DY

1 2

DY

TPAD28

VGA_SMB_CLK54,449 VGA_SMB_DAT54,449

TP99TP99 TP100TP100

12

TP9

TP96

R123

R123 1KR2

1KR2

4

5

3D3V_S0

IRSET_NB VGA_CLK_DDC_NB VGA_DAT_DDC_NB

RS480_RST#

NB_SUS_STAT#

NB_OSC_OUT

DFT_GPIO0 DFT_GPIO1 DFT_GPIO2

THERMAL_P_NB THERMAL_N_NB

R105 0R2-0

147

6

3D3V_S0

147

9

10

DY

1 2

R122 0R2-0

C

B27 C27 D26 D25 C24

B24

E24 D24

B25

A25

A24

C25

A26

B26

A11

B11 C26

E11

F11

A14

B14

M23

L23

D14

B15

B12 C12 AH4

H13 H12

A13

B13

B9

F12

E13 D13

F10 C10 C11 AF4 AE4

1 2

U19B

TSLCX08MTC-U

U19C

8

TSLCX08MTC-U

C

U20D

AVDD1 AVDD2 AVSSN1 AVSSN2 AVDDDI AVSSDI

AVDDQ AVSSQ

C Y COMP

RED GREEN BLUE

DAC_VSYNC DAC_HSYNC RSET DAC_SCL DAC_SDA

PLLVDD PLLVSS

HTPVDD HTPVSS

SYSRESET# POWERGOOD LDTSTOP# ALLOW_LDTSTOP SUS_STAT#

VDDR3_1 VDDR3_2

OSCIN OSCOUT

TVCLKIN

DFT_GPIO0/RSV DFT_GPIO1/RSV DFT_GPIO2/RSV

BMREQb I2C_CLK I2C_DATA THERMALDIODE_P THERMALDIODE_N

RS480M-U

DY

PART 4 OF 6

CRT/TVOUT

PLL PWR

PM

CLOCKs

DFT_GPIO3/RSV DFT_GPIO4/RSV DFT_GPIO5/RSV

MIS.

LCDVDD_ON 54

BL_ON 34,449

RESISTOR

R503 R504

TXOUT_U0P

TXOUT_U0N

TXOUT_U1P

TXOUT_U1N

TXOUT_U2P

TXOUT_U2N

TXOUT_U3P

TXOUT_U3N

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

TXCLK_UP TXCLK_UN

TXCLK_LP

LVDS

TXCLK_LN

LPVDD

LPVSS

LVDDR18D LVDDR18A_1 LVDDR18A_2

LVSSR1 LVSSR2 LVSSR3 LVSSR4 LVSSR5 LVSSR6 LVSSR7 LVSSR8

LVDS_DIGON

LVDS_BLON LVDS_BLEN

GFX_CLKP

GFX_CLKN

HTTSTCLK

HTREFCLK

SB_CLKP SB_CLKN

TMDS_HPD

STRP_DATA

DDC_DATA

TESTMODE

VCC_CORE_S0

DY

D18 C18 B19 A19 D19 C19 D20 C20

B16 A16 D16 C16 B17 A17 E17 D17

B20 A20 B18 C17

E18 F17 E19 G20 H20

G19 E20 F20 H18 G18 F19 H19 F18

E14 F14 F13

B8 A8

P23 N23

E8 E7

C13 C14 C15

A10

E10

B10

E12

12

R503

R503 DUMMY-R2

DUMMY-R2

12

R504

R504 4K7R2

4K7R2

RS480M MODE

NORMAL MODE

D

TXBOUT3+ TXBOUT3-

TXAOUT3+ TXAOUT3-

LVDS_DIGON LVDS_BLON LVDS_BLEN_NB

HTTST_CLK

DFT_GPIO3 DFT_GPIO4 DFT_GPIO5

TP85TP85

DDC_NB_TP

TP7TP7

TESTMODE_NB

STRP_DATA

TEST MODE

D

TP86

TP86 TP80

TP80

TPAD30

TPAD30 TPAD30

TPAD30

TP91

TP91 TP90

TP90

TPAD30

TPAD30 TPAD30

TPAD30

1 2

TP8TP8

R112

2KR2

DY

E

3D3V_S0

12

R515

12

R515 4K7R2

4K7R2

VGA_SMB_CLK

VGA_SMB_DAT

1D8V_S0

R485

1 2

12

BLM11A121S

C667

C667 SCD1U16V

SCD1U16V

R102

1 2

12

BLM11A121S

C124

C124 SCD1U16V

SCD1U16V

R85

1 2

BLM11A121S

C88

C88 SCD1U16V

SCD1U16V

4

GND

3

A2

2

A1

1

A0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SNIPE

13 56Thursday, November 18, 2004

E

R516

4K7R2

TXBOUT0+ 54 TXBOUT0- 54 TXBOUT1+ 54 TXBOUT1- 54 TXBOUT2+ 54 TXBOUT2- 54

TXAOUT0+ 54 TXAOUT0- 54 TXAOUT1+ 54 TXAOUT1- 54 TXAOUT2+ 54 TXAOUT2- 54

TXBCLK+ 54 TXBCLK- 54 TXACLK+ 54 TXACLK- 54

1D8VLPVDD_S0

LVDDR18D_S0

LVDDR18A_S0

TP93TP93

NBSRC_CLK 3 NBSRC_CLK# 3

R523

R523 10KR2

10KR2

HTREF_CLK 3

SBLINK_CLK 3 SBLINK_CLK# 3

R505

12

3KR2F

3KR2F R518

R518

12

3KR2F

3KR2F R519

R519

12

3KR2F

DY

3D3V_S0

12

R114

R114 1KR2

1KR2

1 2

12

DY

R113

R113 2KR2

2KR2

VGA_SMB_CLK

Title

Size Document Number Rev

A3

Date: Sheet

12

C649

SC1U10V3ZY

12

C117

SC1U10V3ZY

12

C87

C87 SC1U10V3ZY

SC1U10V3ZY

DISABLE DEBUG MODE DUMMY IT

C678

C678 SCD1U16V

SCD1U16V

U16

5

SDA

6

SCL

7

WP

8

VCC

AT24C04N-10SI

DY

NB-RS480M_VIDEO/ CLOCK

SA

of

SA

A

B

C

D

E

VSS89

H17

H10

H16

H14

E16

D10

E15

F15

U15

V14

R15

T14

N15

V12

N13

P14

U17

T16

R17

P12

T12

R13

W13

W17

P18

V18

M18

U13

N17

W15

V16

T18

M14

M12

M16

P16

U19

AC16

AG18

AC23

AD8

AD11

AD13

AD16

AD19

AD23

AG5

AG6

AG21

AD17

AG15

AG12

AF30

AG24

AG9

AC19

AG27

AC11

AD7

AJ30

AC21

AK5

AK10

AC13

AD21

AK22

AK29

W19

AE26

AE27

T27

R27

AD28

F24

F27

G28

4 4

1D2V_S0

12

C651

C651 SCD1U16V

SCD1U16V

DY

C730

C730 SCD1U16V

SCD1U16V

C769

C769 SCD1U16V

SCD1U16V

C758

C758 SCD1U16V

SCD1U16V

12

R551

R551 0R2-0

0R2-0

DY

R81

0R5J-1

C668

C668 SCD1U16V

SCD1U16V

C722

C722 SCD1U16V

SCD1U16V

C243

C243 SCD1U16V

SCD1U16V

C746

C746 SCD1U16V

SCD1U16V

12

R552

R552 0R2-0

0R2-0

12

R82

0R5J-1

12

C669

C669 SCD1U16V

SCD1U16V

12

C681

C681 SCD1U16V

SCD1U16V

DY

12

C145

C145 SCD1U16V

SCD1U16V

12

C133

C133 SCD1U16V

SCD1U16V

DY

L21

1 2

BLM11A121S

0R5J-1

C706

C706 SCD1U16V

SCD1U16V

C670

C670 SCD1U16V

SCD1U16V

C783

C783 SCD1U16V

SCD1U16V

C757

C757 SCD1U16V

SCD1U16V

DY

3

1 2

U68

U68 BAV99-1

BAV99-1

A

3 3

12

C103

SC22U10V6ZY-U

DY

12

C723

C723 SCD1U16V

SCD1U16V

2 2

12

C146

SC22U10V6ZY-U

12

C134

C134 SCD1U16V

SCD1U16V

1D8V_S0

1 1

3D3V_S0

3

DY

1 2

U21

U21 BAV99-1

BAV99-1

12

DY

12

C759

C759 SCD1U16V

SCD1U16V

C652

C652 SCD1U16V

SCD1U16V

C721

C721 SCD1U16V

SCD1U16V

C144

C144 SCD1U16V

SCD1U16V

C747

C747 SCD1U16V

SCD1U16V

1D8VDD_S0

C745

C745 SCD1U16V

SCD1U16V

12

VSS110

VSS111

VSS112

R95

0R5J-1

C680

C680 SCD1U16V

SCD1U16V

C692

C692 SCD1U16V

SCD1U16V

2D5V_S3

C135

C135 SCD1U16V

SCD1U16V

C729

C729 SCD1U16V

SCD1U16V

C717

C717 SCD1U16V

SCD1U16V

VSS108

VSS109

12

C774

C774 SC1U10V3KX

SC1U10V3KX

1D2V_S0

VSS107

C760

C760 SCD1U16V

SCD1U16V

C782

C782 SCD1U16V

SCD1U16V

VSS102

VSS103

VSS104

VSS105

VSS106

1D2V_HT0A_S0

VDDHT30 VDDHT31

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

VSS101

U20E

U20E RS480M-U

RS480M-U

N27

VDD_HT1

U27

VDD_HT2

V27

VDD_HT3

G27

VDD_HT4

V24

VDD_HT5

H27

VDD_HT6

K24

VDD_HT7

AB24

VDD_HT8

P27

VDD_HT9

J27

VDD_HT10

AA27

VDD_HT11

K27

VDD_HT12

P24

VDD_HT13

AB27

VDD_HT14

AB23

VDD_HT15

V23

VDD_HT16

G23

VDD_HT17

E23

VDD_HT18

W23

VDD_HT19

K23

VDD_HT20

J23

VDD_HT21

H23

VDD_HT22

U23

VDD_HT23

AA23

VDD_HT24

D23

VDD_HT25

F23

VDD_HT26

C23

VDD_HT27

B23

VDD_HT28

A23

VDD_HT29

A29

VDD_HT30

AC30

VDD_HT31

AK23

VDD_MEM1

AK28

VDD_MEM2

AK11

VDD_MEM3

AK4

VDD_MEM4

AE30

VDD_MEM5

AC14

VDD_MEM6

AD12

VDD_MEM7

AC18

VDD_MEM8

AC20

VDD_MEM9

AD10

VDD_MEM10

AD14

VDD_MEM11

AD15

VDD_MEM12

AD20

VDD_MEM13

AC10

VDD_MEM14

AD18

VDD_MEM15

AC12

VDD_MEM16

AD22

VDD_MEM17

AC22

VDD_MEM18

AH15

VDD_MEMCK

H15

VDD_18_1

AC17

VDD_18_2

AC15

VDD_18_3

B21

VDD_CORE47

C21

VDD_CORE46

A22

VDD_CORE45

B22

VDD_CORE44

C22

VDD_CORE43

F21

VDD_CORE42

F22

VDD_CORE41

E21

VDD_CORE40

G21

VDD_CORE39

B

VSS93

VSS94

VSS89

VSS90

VSS91

VSS92

PART 5 OF 6

VSS85

VSS86

VSS87

VSS88

VSS129

VSS130

VSS131

VSS132

K25

V25

V28

U28

R23

POWER

VSS83

VSS84

VSS127

VSS128

E26

VDDA_12_14

VDDA_12_1 VDDA_12_2 VDDA_12_3 VDDA_12_4 VDDA_12_5 VDDA_12_6 VDDA_12_7 VDDA_12_8

VDDA_12_9 VDDA_12_10 VDDA_12_11 VDDA_12_12 VDDA_12_13

VDDA_18_1

VDDA_18_2

VDDA_18_3

VDDA_18_4

VDDA_18_5

VDDA_18_6

VDDA_18_7

VDDA_18_8

VDDA_18_9 VDDA_18_10 VDDA_18_11 VDDA_18_12 VDDA_18_13 VDD_CORE1 VDD_CORE2 VDD_CORE3 VDD_CORE4 VDD_CORE5 VDD_CORE6 VDD_CORE7 VDD_CORE8 VDD_CORE9

VDD_CORE10 VDD_CORE11 VDD_CORE12 VDD_CORE13 VDD_CORE14 VDD_CORE15 VDD_CORE16 VDD_CORE17 VDD_CORE18 VDD_CORE19 VDD_CORE20 VDD_CORE21 VDD_CORE22 VDD_CORE23 VDD_CORE24 VDD_CORE25 VDD_CORE26 VDD_CORE27 VDD_CORE28 VDD_CORE29 VDD_CORE30 VDD_CORE31 VDD_CORE32 VDD_CORE33 VDD_CORE34 VDD_CORE35 VDD_CORE36 VDD_CORE37 VDD_CORE38

VSS77

VSS78

VSS79

VSS80

VSS81

VSS82

VSS122

VSS123

VSS124

VSS125

VSS126

L27

P25

P28

H24

N28

M27

H9 AA7 G9 U8 N7 N8 U7 F9 AA8 G8 G7 J8 J7 B1 AG4 R8 AC8 AC7 AF6 AE6 L8 W8 W7 L7 R7 AF5 AK2 N16 M13 M15 W16 N18 P19 N12 P15 N14 M17 T19 G22 R12 P13 R14 V19 R18 U16 U12 T13 U14 T17 U18 E22 R16 V13 T15 P17 W18 D22 W12 V15 W14 V17 M19 H22 H21 D21

VSS76

VSS120

T23

VSS74

VSS75

VSS118

VSS119

K28

N19

VDDA12_13

VDDA18_13

VSS72

VSS73

VSS114

VSS115

VSS116

VSS117

J28

H28

M24

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

GROUND

VSS113

T8

F28

12

1D8V_VDDA

12

1D2V_S0

C

VSS62

VSS63

VSS64

VSS65

12

C728

C728 SC1U10V3KX

SC1U10V3KX

12

C792

C792 SC1U10V3KX

SC1U10V3KX

12

C744

SC22U10V6ZY-U

12

C112

SC22U10V6ZY-U

VSS60

VSS61

C727

C727 SCD1U16V

SCD1U16V

C786

C786 SCD1U16V

SCD1U16V

DY

VSS59

VSS58

VSSA60M7VSSA61V7VSSA62F6VSSA63E6VSSA64U5VSSA65U6VSSA66E5VSSA67L5VSSA68

AJ1

VSSA59

12

VSS55

VSS56

VSS57

VSSA58L6VSSA59

AG3

C768

C768 SCD1U16V

SCD1U16V

C781

C781 SCD1U16V

SCD1U16V

C704

C704 SCD1U16V

SCD1U16V

C703

C703 SCD1U16V

SCD1U16V

VSS54

VSS53

12

VSS50

VSS51

VSS52

C756

C756 SCD1U16V

SCD1U16V

C755

C755 SCD1U16V

SCD1U16V

C719

C719 SCD1U16V

SCD1U16V

C650

C650 SCD1U16V

SCD1U16V

VSS48

VSS49

VSSA51K7VSSA52H7VSSA53M3VSSA54V6VSSA55H8VSSA56C2VSSA57

AD6

12

DY

12

VSS46

VSS47

VSSA48T7VSSA49Y7VSSA50

AB8

12

C742

C742 SCD1U16V

SCD1U16V

12

C754

C754 SCD1U16V

SCD1U16V

C767

C767 SCD1U16V

SCD1U16V

C679

C679 SCD1U16V

SCD1U16V

VSS44

VSS45

VSSA44D6VSSA45C4VSSA46K3VSSA47

AD5

12

L23

1 2

MLB-201209-11

12

C743

C743 SCD1U16V

SCD1U16V

DY

12

C720

C720 SCD1U16V

SCD1U16V

VSS42

VSS43

C718

SC22U10V6ZY-U

VSS40

VSS41

1D8V_S0

VSS37

VSS38

VSS39

VSSA38C9VSSA39C7VSSA40J5VSSA41R6VSSA42J3VSSA43

AA5

12

D

D11

H11

AD25

VSS35

VSS36

1D2V_S0

C716

C716 SCD1U16V

SCD1U16V

VSS30

G10

G12

AD29

AD27

AC27

G15

G14

Y24

G13

D15

AD9

G11

F16

G30

AB28

AB25

D12

AD24

AA28

G17

Y23

AC9

R19

Y27

C28

G16

F25

B30

T24

F26

W27

VSS6

VSS7

VSS8

VSS9

VSS10E9VSS11

VSS12D9VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSSA22A2VSSA23

VSSA24P8VSSA25J6VSSA26C8VSSA27

VSSA28V8VSSA29F3VSSA30

VSSA31

VSSA32M5VSSA33

VSSA34G3VSSA35B4VSSA36P7VSSA37

AB7

AF3

AE3

AA3

AB3

AD3

VSSA22

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

NB-RS480M_POWER

VSSA9T3VSSA10M6VSSA11C5VSSA12F8VSSA13M8VSSA14Y8VSSA15V3VSSA16C3VSSA17W3VSSA18K8VSSA19D3VSSA20C6VSSA21

AA6

VDDA12_13

VSSA22

VDDA18_13

VSSA59

VDDHT30

VSS30

VDDHT31

VSS89

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SNIPE

E

VSS5

VSS4

VSSA4N3VSSA5F7VSSA6F5VSSA7R3VSSA8

V5

VSS2

VSS3

PAR 6 OF 6

VSSA2

VSSA3

AE5

14 56Thursday, November 18, 2004

VSS1

VSSA1

R5

U20F

U20F RS480M-U

RS480M-U

12

C150

SC4D7U10V5ZY

C251

SC4D7U10V5ZY

C91

SC4D7U10V5ZY

C129

SC4D7U10V5ZY

of

SA

A

4 4

TMDS_TXCTMDS_TXC+ TMDS_TX0TMDS_TX0+

TMDS_TX1TMDS_TX1+ TMDS_TX2TMDS_TX2+

B

TMDS_TXC- 449 TMDS_TXC+ 449 TMDS_TX0- 449 TMDS_TX0+ 449

TMDS_TX1- 449 TMDS_TX1+ 449 TMDS_TX2- 449 TMDS_TX2+ 449

C

DVI_SCL_5

DVI_SDA_5

D

12

R338

R338 8K2R2

8K2R2

12

C493

C493 SC100P50V2JN

SC100P50V2JN

5V_DVI_S0

R339

R339 8K2R2

8K2R2

C494

C494 SC100P50V2JN

SC100P50V2JN

12

E

D19

2 1

CH751H-40-U

83.R0304.08F

1 2

5V_S0

F1

FUSE-1A6V

DVI_VCC

3 3

2 2

DVI_VCC

D1

DVI_HPD449

1 1

1 2

S1N4148-U

A

R337

100KR2

Do not stuff when using UMA

DVI_SDA449

DVI_SCL449

DVI1

TMDS_TX1-

TMDS_TX1+

12

TMDS_TX0-

TMDS_TX0+

TMDS_TXC+

TMDS_TXCTMDS_HPD

29

17

9

18 10 19 11 20 12 21 13 22 14 23 15 24 16 C3

C4

30

AMP-CONN24-3R

27 MH1

TMDS_TX2-

1

25

TMDS_TX2+

2 3

4

5

DVI_SCL_5

6

DVI_SDA_5

7

8 C1 26 C5C6 C2 MH2 28

B

C

D

3D3V_S0

R351

R351 8K2R2

8K2R2

12

R352

G

8K2R2

1

S

2 3

Q1

Q1 2N7002LT1

2N7002LT1

D

S

2 3

Title

Size Document Number Rev

Custom

Date: Sheet

G

1

Q2

Q2 2N7002LT1

2N7002LT1

DVI_SDA_5

D

DVI_SCL_5

5V @ ext. CRT side

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DVI CONNECTOR

SNIPE

of

15 56Thursday, November 18, 2004

E

SA

12

A

R335

1 2

0R2-0

5V_S0

DY

4 4

CRT_HSYNC54

CRT_VSYNC54

3 3

CRT_RED54

CRT_GREEN54

CRT_BLUE54

DY

14

4

5 6

7

R325

1 2

0R2-0

DY

14

2 3

U47B

7

TSAHCT125

1

U47A

TSAHCT125

12

C477

SC47P50V2JN

DY

CRT

Signal level need check.

HSYNC_5

VSYNC_5

12

C476

C476 DUMMY-C2

DUMMY-C2

12

C488

SC47P50V2JN

DY

B

L14

1 2

0R5J-1

L15

1 2

0R5J-1

12

C490

C490 DUMMY-C2

DUMMY-C2

L11 BLM18BB750SN1DL11 BLM18BB750SN1D

L12 BLM18BB750SN1DL12 BLM18BB750SN1D

L13 BLM18BB750SN1DL13 BLM18BB750SN1D

12

C489

C489 SC47P50V2JN

SC47P50V2JN

DY

JVGA_HS_1

1 2

12

JVGA_VS_1

12

C475

C475 DUMMY-C2

DUMMY-C2

12

1 2

R322 33R2R322 33R2

1 2

R323 33R2R323 33R2

C474

C474 DUMMY-C2

DUMMY-C2

12

C478

C478 SC2P50V

SC2P50V

C479

C479 SC2P50V

SC2P50V

JVGA_HS

JVGA_VS

CRT_R

CRT_G

CRT_B

12

C480

C480 SC2P50V

SC2P50V

C

CRT_R

CRT_G

CRT_B

D

CRT CONN

200mA Rating/Spec 500mA

5V_S0

D15

2

3

1

BAV99-2

BAV99-2 D16

D16

2

3

1

BAV99-2

BAV99-2 D17

D17

2

3

1

BAV99-2

5V_S0

D18

RB751V-40-U

CRT_R

CRT_G

JVGA_HS CRT_B

JVGA_VS

SC100P50V2JN

5V_CRT_S0

R321

2K2R2

C469

SC100P50V2JN

12

R324

R324 2K2R2

2K2R2

12

SC10P50V2JN-1

C473

C470

1 2

CRT_DAT_DDC_354

CRT_CLK_DDC_354

F4

1 2

FUSE-1A6V

12

CRT_VCC

12

C472

C472 SC10P50V2JN-1

SC10P50V2JN-1

12

C471

C471 SCD01U50V2ZY

SCD01U50V2ZY

16

11

12

13

14

10 15

17

E

CRT1

6

1 7

2 8

3 9

4

5

VIDEO-15-34

By ME requset CRT1 P/N: Main 20.B0026.A15 Second 20.B0034.015

2 2

D21

C500

1 2

SC47P50V2JN

L17

C515

1 2

IND-1D2UH

12

C516

C516 SC100P50V2JN

SC100P50V2JN

L18

L18 IND-1D2UH

IND-1D2UH

1 2

12

C517

C517 SC100P50V2JN

SC100P50V2JN

1 2

L16

1 2

IND-1D2UH

12

TVLUMA54

TVCOMP54

1 1

TVCRMA54

SC100P50V2JN

A

TV_LUMA

12

COMP_B

12

C498

C498 SC47P50V2JN

SC47P50V2JN

TV_CRMA

12

B

C499

C499 SC270P50V

SC270P50V

C501

C501 SC270P50V

SC270P50V

C497

C497 SC270P50V

SC270P50V

MH1

8 3 1

5 7

6 2 4 9

TV1

MINDIN7-8

D21

3

BAV99-2

DY

3D3V_S0

2

1

By ME requset TV1 P/N: Main 22.10021.A91 Second 22.10021.B01

D20

2

3

BAV99-2

DY

3D3V_S0

1

C

COMP_B

TV CONN

D22

2

3

BAV99-2

DY

3D3V_S0

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

D

Date: Sheet of

CRT / TV

SNIPE

SA

of

16 56Thursday, November 18, 2004

E

SA

A

B

C

D

E

INVERTER/LED

4 4

Q6

OUT

GND

OUT

GND

OUT

80211_LED#

GND

CHARGE_LED#

STDBY_LED#

80211_LED# 35

CHARGE_LED#

NUM_LED#34 CAP_LED#34

FPBACK34

FPBACK FPBACK_INV

BRIGHTNESS34

NUM_LED# CAP_LED#

1 2

R355

R355 10KR3

10KR3

12

C512

C512 SCD1U

SCD1U

MEDIA_LED#

12

C507

C507 SC100P50V2JN

SC100P50V2JN

12

C511

C511 SC100P50V2JN

SC100P50V2JN

CHARGE_LED34

3 3

STDBY_LED34,35

WLAN_LED34

2 2

2

IN

2

IN

2

IN

R2

DTC114EUA-U1

Q7

R1

R2

DTC114EUA-U1

Q19

R1

R2

DTC114EUA-U1

1

3

1

3

1

3

R1

Layout trace 20 mil

5V_S5

12

C506

C506 SCD1U

SCD1U

12

C509

C509 SC100P50V2JN

SC100P50V2JN

12

C510

C510 SC100P50V2JN

SC100P50V2JN

By ME requset INV1 P/N: Main 20.F0322.030 Second 20.D0144.215

2

4 6

8 10 12 14 16 18 20 22 24 26 28

C508

30

SC100P50V2JN

ETY-CONN30D-U

20.F0322.030

INV1

DCBATOUT

31

1

3 5 7 9 11 13 15 17

PWRLED#

19 21 23

(LED USE)

25 27 29

32

12

3

2

12

3D3V_S3

C484

C484 SCD1U16V

SCD1U16V

12

C487

C487 SCD1U16V

SCD1U16V

Q20

Q20 PDTC144EU

PDTC144EU

1

C496

C496 SC10U35V0ZY-U

SC10U35V0ZY-U

STDBY_LED#

3D3V_S0

HDD_LED#_525

CDROM_LED#_525

5V_S0

12

C483

C483 SC1U10V3KX

SC1U10V3KX

80211_LED#

12

C485

C485 SC100P50V2JN

SC100P50V2JN

TOP VIEW

1

12

C486

C486 SC100P50V2JN

SC100P50V2JN

INV CONN

D23

2

3

1

BAW56

29

302

MEDIA_LED#

TOP VIEW

240

LCD CONN

LCD1

42

1

PANEL_ID037 PANEL_ID137 PANEL_ID237 PANEL_ID337

1 1

3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

A

2

4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

41

SYN-CONN40A-U

20.F0312.040

LCDPOWER_S0

12

C513

C513 SC10U10V5ZY

SC10U10V5ZY

DY

LCD_TXBCLK+ 54 LCD_TXBCLK- 54 LCD_TXBOUT2+ 54 LCD_TXBOUT2- 54 LCD_TXBOUT1+ 54 LCD_TXBOUT1- 54 LCD_TXBOUT0+ 54 LCD_TXBOUT0- 54 LCD_TXACLK+ 54 LCD_TXACLK- 54 LCD_TXAOUT2+ 54 LCD_TXAOUT2- 54 LCD_TXAOUT1+ 54 LCD_TXAOUT1- 54 LCD_TXAOUT0+ 54 LCD_TXAOUT0- 54

12

LCD CONN

1

C514

C514 SCD1U

SCD1U

DY

B

12

C522

C522 SCD1U

SCD1U

39

EVEN CHANNEL

ODD CHANNEL

LCD POWER

LCD_VDD_ON54

1 2

C

R336

R336 1KR3

1KR3

Layout 40 mil

LCDVDD_ON_1

12

C491

C492

SC1U10V3KX

SCD1U

U49

1

OUT

2

GND ON/OFF#3IN

AAT4280IGU-3-T1

D

3D3V_S0LCDPOWER_S0

6

IN

5

GND

4

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

12

C523

C523 SC1U10V3KX

SC1U10V3KX

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

INV / LCD

A3

SNIPE

E

SA

of

17 56Thursday, November 18, 2004

SA

A

3D3V_S0

PCI_REQ#5 PCI_GNT#5

R202

1 2

1KR2

4 4

1D8V_S0

3 3

1D8V_S0 PCIE_VDDR

2 2

1 2

C896

1 2

SC22P50V2JN-1

L28

1 2

MLB-201209-11

L9

1 2

0R3-UL90R3-U

A_RST#

C897

C897 SC12P50V2JN-1

SC12P50V2JN-1

2 3

DY

1 2

SCD1U16V

SCD1U16V C272

C272

DY

X7

X7 XTAL-32D768K-4P

XTAL-32D768K-4P

41

12

C866

SC10U10V5ZY

12

C373

SC22U10V6ZY-U

DY

1 2

NB_EEPROM_WP

12

R706

20MR3

12

U31

A B GND3Y

NC7SZ32-U

5 6 7 8

12

R707

20MR3

PCIE_PVDD

12

C869

C869 SC1U10V3KX

SC1U10V3KX

12

C343

C343 SCD1U16V

SCD1U16V

INT_PIRQA# INT_PIRQB#

INT_PIRQH#

3D3V_S0

5

VCC

4

U32

4

SDA SCL WP VCC

AT24C04N-10SI

DY

32K_X1

32K_X2

GND

3

A2

2

A1

1

A0

SBSRC_CLK3 SBSRC_CLK#3

PCIE_RX0P_SB12 PCIE_RX0N_SB12 PCIE_RX1P_SB12 PCIE_RX1N_SB12

PCIE_TX0P_SB12 PCIE_TX0N_SB12 PCIE_TX1P_SB12 PCIE_TX1N_SB12

MAIN SOURCE: 82.30001.031 EPSON 2ND SOURCE: 82.30001.341 KDS

PCIE_VDDR

C868

C868 SCD1U16V

SCD1U16V

12

C342

C342 SCD1U16V

SCD1U16V

5V_S0

RSTDRV#_R

12

C371

C371 SCD1U16V

SCD1U16V

DY

RP1

1 2 3 4 5 6

SRP10K

C372

C372 SCD1U16V

SCD1U16V

R204

R204 33R2

33R2

1 2

12

10 9 8 7

C322

C322 SCD1U16V

SCD1U16V

DY

INT_PIRQG# INT_PIRQD#INT_PIRQC# INT_PIRQE# INT_PIRQF#

PCIRST# 3V to 5V level shift for HDD & CDROM

3D3V_S0

U74D

147

A_RST#

1 1

12

R595

R595 8K2R2

8K2R2

PCIRST#

12

13

1

2

3D3V_S0

147

TSLCX08-U

U74A

TSLCX08-U

A

3

SB400 asserts PLTRST# to reset devices on the platform.

R596

PLT_RST#_R

11

PCI_RST#

Secondary PCI Bus reset signal.

R596

1 2

33R2

R594

1 2

33R2

LPC_RST# 13,37

PCIRST_BUF# 22,27,28,29,31,34

ALLOW_LDTSTOP13 SB_CPUPWRGD6

BMREQ#13 LDT_RST#6,13

B

A_RST#

C857

1 2

C341

C341 SCD1U16V

SCD1U16V

TP106TP106 TP105TP105

C857

C864

SCD1U10V2MX

12

TP31TP31 TP29TP29 TP26TP26 TP27TP27

TP114TP114 TP117TP117 TP116TP116 TP118TP118

TP115TP115

TP39TP39

TP38TP38

TP37

TP37 TPAD30

TPAD30

C856 SCD1U10V2MXC856 SCD1U10V2MX

C865

R269 150R2FR269 150R2F

1 2

R256 150R2FR256 150R2F

1 2

R255 4K12R2FR255 4K12R2F

1 2

A11, A12 4K53 1% A21, A22 5K5 1% A23 4K12 1% PA_IXP400AC10.PDF

12

LDT_STP#6,13

C353

C353 SCD1U16V

SCD1U16V

DY

3D3V_S0

INT_PIRQE#27 INT_PIRQF#27,31 INT_PIRQG#27 INT_PIRQH#29

RSTDRV#_5 25

B

12

1 2

PCIE_CALRP PCIE_CALRN

PCIE_CALI

PCIE_PVDD

C352

C352 SCD1U16V

SCD1U16V

TP113TP113

12

R206

R206 8K2R2

8K2R2

SCD1U10V2MX

TX0P

TX0N

TX1P

TX1N

SCD1U10V2MX

SB_CPUSTP#

SB_PCISTP# INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

INT_PIRQE#

INT_PIRQF#

INT_PIRQG#

INT_PIRQH#

32K_X1

32K_X2

SB_C29 SB_A28 H_NMI FWH_INIT# SB_D29

SB_B30

H_A20M# H_FERR#

H_DPRSLP#

U84A

AH8

A_RST#

L27

PCIE_RCLKP

M27

PCIE_RCLKN

M30

PCIE_TX0P

N30

PCIE_TX0N

K30

PCIE_TX1P

L30

PCIE_TX1N

H30

PCIE_TX2P

J30

PCIE_TX2N

F30

PCIE_TX3P

G30

PCIE_TX3N

M29

PCIE_RX0P

N29

PCIE_RX0N

M28

PCIE_RX1P

N28

PCIE_RX1N

J29

PCIE_RX2P

K29

PCIE_RX2N

J28

PCIE_RX3P

K28

PCIE_RX3N

G27

PCIE_CALRP

H27

PCIE_CALRN

G28

PCIE_CALI

R30

PCIE_PVDD

F26

PCIE_VDDR_1

R29

PCIE_VDDR_2

G26

PCIE_VDDR_3

P26

PCIE_VDDR_4

K26

PCIE_VDDR_5

L26

PCIE_VDDR_6

P28

PCIE_VDDR_7

N26

PCIE_VDDR_8

P27

PCIE_VDDR_9

H28

PCIE_VSS_1

F29

PCIE_VSS_2

H29

PCIE_VSS_3

H26

PCIE_VSS_4

F27

PCIE_VSS_5

G29

PCIE_VSS_6

L29

PCIE_VSS_7

J26

PCIE_VSS_8

L28

PCIE_VSS_9

J27

PCIE_VSS_10

N27

PCIE_VSS_11

M26

PCIE_VSS_12

K27

PCIE_VSS_13

P29

PCIE_VSS_14

P30

PCIE_VSS_15

AJ8

CPU_STP#/DPSLP#

AK7

PCI_STP#

AG5

INTA#

AH5

INTB#

AJ5

INTC#

AH6

INTD#

AJ6

INTE#/GPIO33

AK6

INTF#/GPIO34

AG7

INTG#/GPIO35

AH7

INTH#/GPIO36

B2

X1

B1

X2

C29

CPU_PG

A28

INTR/LINT0

C28

NMI/LINT1

B29

INIT#

D29

SMI#

E4

SLP#/LDT_STP#

B30

IGNNE#

F28

A20M#

E28

FERR#

E29

STPCLK#/ALLOW_LDTSTP

D25

LDT_PG/SSMUXSEL/GPIO0

E27

DPRSLPVR

D27

BMREQ#

D28

LDT_RST#

CHS-215SB400

C

SB400 SB

Part 1 of 4

PCI CLKS

AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11

AD8/ROMA9

AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7

PCI EXPRESS INTERFACE

CBE0#/ROMA10

CBE1#/ROMA1

CBE2#/ROMWE#

DEVSEL#/ROMA0

TRDY#/ROMOE#

PCI INTERFACE

REQ4#/PLL_BP33/PDMA_REQ1#

GNT3#/PLL_BP66/PDMA_GNT0# GNT4#/PLL_BP50/PDMA_GNT1#

LPC

CPU XTAL

RTC

C

PAR/ROMA19

REQ3#/PDMA_REQ0#

REQ5#/GPIO13 REQ6#/GPIO31

GNT5#/GPIO14 GNT6#/GPIO32

RTC_IRQ#/ACPWR_STRAP

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK9

PCICLK_FB

PCIRST#

AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE3#

FRAME#

IRDY#

STOP# PERR# SERR#

REQ0#

REQ1#

REQ2#

GNT0#

GNT1#

GNT2#

CLKRUN#

LOCK#

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0# LDRQ1#

SERIRQ

RTCCLK

VBAT

RTC_GND

L4 L3 L2 L1 M4 M3 M2 M1 N4 N3 N2

AJ7 W3 Y2 W4 Y3 V1 Y4 V2 W2 AA4 V4 AA3 U1 AA2 U2 AA1 U3 T4 AC1 R2 AD4 R3 AD3 R4 AD2 P2 AE3 P3 AE2 P4 AF2 N1 AF1 V3 AB4 AC2 AE4 T3 AC4 AC3 T2 U4 T1 AB2 AB3 AF4 AF3 AG2 AG3 AH1 AH2 AH3 AJ2 AK2 AJ3 AK3 AG4 AH4 AJ4 AG1 AB1

AG25 AH25 AJ25 AH24 AG24 AH26 AG26

AK27

C2 F3

A2 A1

PCI_CLK1_R PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R PCI_CLK6_R PCI_CLK7_R PCI_CLK8_R PCI_CLK9_R PCI_CLK9_FB

PCIRST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PCI_REQ#4

PCI_REQ#5 PCI_REQ#6

PCI_GNT#3 PCI_GNT#4 PCI_GNT#5 PCI_GNT#6

PCI_LOCK#

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LPC_LDRQ1#

12

C239

SCD1U16V

D

R680 22R2R680 22R2

1 2

R666 22R2R666 22R2

1 2

R667 22R2R667 22R2

1 2

R678 22R2R678 22R2

1 2

R654 22R2R654 22R2

1 2

R640 22R2R640 22R2

1 2

R653 22R2R653 22R2

1 2

R641 22R2R641 22R2

1 2

R633 22R2R633 22R2

PCI_AD[31..0] 22,27,28,29,31,34

SRN8K2-1

PCI_REQ#3

TP104TP104 TP28TP28 TP25TP25 TP103TP103

LPC_LAD[0..3] 34,37

P_SERIRQ 27,34,37

RTC_AUX_S5

12

C238

C238 SC1U10V3KX

SC1U10V3KX

R150

1 2

1KR2

D

32K suspend clock output

PM_SLP_S3#21,34,38,39,43,44,55

RTC_CLK22

CLK33_CBUS CLK33_LAN CLK33_MINI CLK33_KBC CLK33_SIO CLK33_LPCROM

C851

1 2

DY

12

C360

RN22

678

4 5

BAT

123

RTC1

CON3-4

123

C360

RN12

678

3D3V_S0

123

LPC_LFRAME# 34,37 LPC_LDRQ0# 37

RTC_CLK 22

AUTO_ON# 22

E

5V_S5

U72D

147

10

9

DUMMY-C2

RN24

678

12

4 5

CLK33_CBUS CLK33_LAN CLK33_MINI CLK33_KBC CLK33_SIO CLK33_LPCROM

DUMMY-C2

C359

12

SRN8K2-1

R6278K2R2 R6278K2R2

123

12

RN14

678

PCI_CLK7 22 PCI_CLK8 22

SC100P50V2JN

12

DUMMY-C2

C348

SRN8K2-1

4 5

123

PM_CLKRUN# 27,29,31,34,37

Pull up 100k to 3D3V_S0

P_SERIRQ

R604 10KR2R604 10KR2

LPC_LDRQ1#

R209 10KR2R209 10KR2

LPC_LDRQ0#

R208 10KR2R208 10KR2

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet

SB400 PCI/CPU/LPC/RTC (1 of 5)

SNIPE

R588

8

1 2

10R3

TSAHCT08-U

63.10034.151

CLK33_CBUS 27 CLK33_LAN 22,29 CLK33_MINI 22,31 CLK33_KBC 22,34 CLK33_SIO 22,37 CLK33_LPCROM 22

12

DUMMY-C2

C383

SRN8K2-1

4 5

LPC_LAD0 LPC_LAD3 LPC_LAD1 LPC_LAD2

PCI_GNT#5 PCI_REQ#5 PCI_GNT#6 PCI_REQ#6

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12

DUMMY-C2

C332

RN9

1 2 3 4 5

SRN100K

PCI_CBE#0 27,29,31 PCI_CBE#1 27,29,31 PCI_CBE#2 27,29,31 PCI_CBE#3 27,29,31 PCI_FRAME# 27,29,31 PCI_DEVSEL# 27,29,31 PCI_IRDY# 27,29,31 PCI_TRDY# 27,29,31 PCI_PAR 27,29,31 PCI_STOP# 27,29,31 PCI_PERR# 27,29,31 PCI_SERR# 27,29,31

PCI_REQ#0 31 PCI_REQ#1 27 PCI_REQ#2 29

PCI_GNT#0 31 PCI_GNT#1 27 PCI_GNT#2 29

RN8

6 7 8

SRN10K-2

3D3V_S0

DY

18 56Thursday, November 18, 2004

E

CLK32_G791 23

DUMMY-C2

C333

3D3V_S0

8 7 6

45 3 2 1

of

SA

A

U84B

4 4

3 3

12

R207

0R2-0

2 2

1 1

A

AK22

AJ22

AK21

AJ21

AK19

AJ19

AK18

AJ18

AK14

AJ14

AK13

AJ13

AK11

AJ11

AK10

AJ10

AJ15

AJ16

AK16

AK8

AH15

AH16

AG10 AG14 AH12 AG12 AG18 AG21 AH18 AG20

AG9 AF10 AF11 AF12 AF13 AF14 AF15 AF16 AF17 AF18 AF19 AF20 AF21 AF22

AH9

AG11 AG15 AG17 AG19 AG22 AG23

AF9 AH17 AH23 AH13 AH20

AK9

AJ12 AK17 AK23 AH10

AJ23

U84B

SATA_TX0+ SATA_TX0-

SATA_RX0SATA_RX0+

SATA_TX1+ SATA_TX1-

SATA_RX1SATA_RX1+

SATA_TX2+ SATA_TX2-

SATA_RX2SATA_RX2+

SATA_TX3+ SATA_TX3-

SATA_RX3SATA_RX3+

SATA_CAL

SATA_X1

SATA_X2

SATA_ACT#

PLLVDD_SATA

XTLVDD_SATA

AVDD_SATA_1 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_4 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7 AVDD_SATA_8

AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20 AVSS_SATA_21 AVSS_SATA_22 AVSS_SATA_23 AVSS_SATA_24 AVSS_SATA_25 AVSS_SATA_26 AVSS_SATA_27 AVSS_SATA_28 AVSS_SATA_29 AVSS_SATA_30 AVSS_SATA_31 AVSS_SATA_32

CHS-215SB400

B

SB400 SB

Part 2 of 4

SERIAL ATA

SERIAL ATA POWER

B

PIDE_IRQ

PIDE_A0 PIDE_A1 PIDE_A2

PIDE_DRQ

PIDE_IOR#

PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8

PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15

SIDE_IRQ

SIDE_A0 SIDE_A1 SIDE_A2

SIDE_DRQ SIDE_IOR#

AD30 AE28 AD27 AC27 AD28 AD29 AE27 AE30 AE29 AC28 AC29

AF29 AF27 AG29 AH30 AH28 AK29 AK28 AH27 AG27 AJ28 AJ29 AH29 AG28 AG30 AF30 AF28

V29 T27 T28 U29 T29 V30 U28 W29 W30 R27 R28

V28 W28 Y30 AA30 Y28 AA28 AB28 AB27 AB29 AA27 Y27 AA29 W27 Y29 V27 U27

AG13 AH22 AK12 AH11 AJ17 AH14 AH19 AJ20 AH21 AJ9 AG16 AK15 AK20

PIDE_IORDY

PIDE_DACK#

PIDE_IOW#

PIDE_CS1# PIDE_CS3#

PRIMARY ATA 66/100

SIDE_IORDY

SIDE_DACK#

SIDE_IOW#

SIDE_CS1# SIDE_CS3#

SIDE_D0/GPIO15 SIDE_D1/GPIO16 SIDE_D2/GPIO17 SIDE_D3/GPIO18 SIDE_D4/GPIO19 SIDE_D5/GPIO20 SIDE_D6/GPIO21 SIDE_D7/GPIO22 SIDE_D8/GPIO23

SIDE_D9/GPIO24 SIDE_D10/GPIO25 SIDE_D11/GPIO26 SIDE_D12/GPIO27 SIDE_D13/GPIO28 SIDE_D14/GPIO29 SIDE_D15/GPIO30

SECONDARY ATA 66/100

AVSS_SATA_33 AVSS_SATA_34 AVSS_SATA_35 AVSS_SATA_36 AVSS_SATA_37 AVSS_SATA_38 AVSS_SATA_39 AVSS_SATA_40 AVSS_SATA_41 AVSS_SATA_42 AVSS_SATA_43 AVSS_SATA_44 AVSS_SATA_45

PDRDY IRQ14R PDA_0 PDA_1 PDA_2 PDACK# PDREQ PIOR# PIOW# PDCS0# PDCS1#

PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15

SDRDY IRQ15R SDA_0 SDA_1 SDA_2 SDACK# SDREQ SIOR# SIOW# SDCS#0 SDCS#1

SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15

C

PDACK# 22

C

D

PIDE_D[15..0] 25

SIDE_D[15..0] 25

RN77

PIOW#

PIOR#

PD14 PIDE_D14

PD13 PIDE_D13

PD11 PIDE_D11

PD10 PIDE_D10

PD12 PIDE_D12

PD15 PIDE_D15

PDREQ

IRQ14R

PDA_0 PDA_2 PDA_1

PDCS0#

PDRDY

PDCS1#

SD6 SIDE_D6

SD11 SIDE_D11

SD3 SIDE_D3 SD8 SIDE_D8

PDACK#

SD10 SIDE_D10

SD1 SIDE_D1

SD12 SIDE_D12

SD0 SIDE_D0

SD7 SIDE_D7 SD5 SIDE_D5 SD9 SIDE_D9 SD4 SIDE_D4

SIOR#

SIOW#

SD13 SIDE_D13

SD2 SIDE_D2

SDA_2 SDA_1

SDRDY

SDACK#

IRQ15R SDCS#1 SDCS#0

SD14 SIDE_D14

SDREQ

SD15 SIDE_D15

SDA_0

RN77

1 2 3

PD2 PIDE_D2

4 5

1

PD4 PIDE_D4

2

PD3 PIDE_D3

3 4 5

PD8 PIDE_D8

1 2

PD5 PIDE_D5

3

PD7 PIDE_D7

4 5

PD6 PIDE_D6

1

PD9

2 3

PD1 PIDE_D1

4 5

1 2 3

PD0 PIDE_D0

4 5

1 2 3 4 5

SRN0-1-U

RN78

SRN0-1-U

8 7 6

RN76

8 7 6

RN75

8 7 6

RN10

8

PIDE_D9

7 6

RN11

8 7 6

RN13

8 7 6

RN15

8 7 6

RN25

8 7 6

RN23

8 7 6

RN79

8 7 6

RN80

8 7 6

RN35

8 7 6

RN26

8 7 6

D

E

PIDE_IOW# 25 PIDE_IOR# 25

PIDE_DREQ 25 PIDE_IRQ14 25

PIDE_A0 25 PIDE_A2 25 PIDE_A1 25 PIDE_CS#0 25

PIDE_IORDY 25 PIDE_CS#1 25

PIDE_DACK# 25

SIDE_IOR# 25 SIDE_IOW# 25

SIDE_A2 25 SIDE_A1 25 SIDE_IORDY 25 SIDE_DACK# 25

SIDE_IRQ15 25 SIDE_CS#1 25 SIDE_CS#0 25

SIDE_DREQ 25

SIDE_A0 25

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

SB400 ACPI/GPIO/SATA/IDE (2 of 5)

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet

SNIPE

of

19 56Thursday, November 18, 2004

E

SA

A

B

C

D

E

1D8V_S0

12

DY

12

DY

C314

C314 SCD1U16V

SCD1U16V

C306

C306 SCD1U16V

SCD1U16V

12

C305

C305 SCD1U16V

SCD1U16V

12

C297

C297 SCD1U16V

SCD1U16V

12

C361

C361 SCD1U16V

SCD1U16V

12

C363

C363 SCD1U16V

SCD1U16V

A

12

DY

12

DY

C336

C336 SCD1U16V

SCD1U16V

DY

C338

C338 SCD1U16V

SCD1U16V

DY

C313

C313 SCD1U16V

SCD1U16V

C296

C296 SCD1U16V

SCD1U16V

C362

C362 SCD1U16V

SCD1U16V

C364

C364 SCD1U16V

SCD1U16V

12

C320

C320 SCD1U16V

SCD1U16V

C321

C321 SCD1U16V

SCD1U16V

C826

C826 SCD1U16V

SCD1U16V

C308

C308 SCD1U16V

SCD1U16V

C384

C384 SCD1U16V

SCD1U16V

12

C367

C367 SCD1U16V

SCD1U16V

12

4 4

DY

12

DY

3D3V_SB_S0

3 3

DY

3D3V_SB_S5

DY

2 2

1D8V_S5 1D8V_S5

DY

1 1

C299

SC22U10V6ZY-U

C340

C340 SCD1U16V

SCD1U16V

12

C827

SC22U10V6ZY-U

12

C295

C295 SCD1U16V

SCD1U16V

12

C908

SC22U10V6ZY-U

12

C370

SC10U10V5ZY

C351

12

DY

12

DY

SC22U10V6ZY-U

C339

C339 SCD1U16V

SCD1U16V

C300

C300 SCD1U16V

SCD1U16V

C277

C277 SCD1U16V

SCD1U16V

C898

C898 SCD1U16V

SCD1U16V

C368

C368 SCD1U16V

SCD1U16V

DY

12

DY

12

DY

12

C335

C335 SCD1U16V

SCD1U16V

DY

12

C307

C307 SCD1U16V

SCD1U16V

DY

C334

C334 SCD1U16V

SCD1U16V

DY

C316

C316 SCD1U16V

SCD1U16V

R724

0R5J-1

C899

C899 SCD1U16V

SCD1U16V

C366

C366 SCD1U16V

SCD1U16V

C337

C337 SCD1U16V

SCD1U16V

C315

C315 SCD1U16V

SCD1U16V

R597

12

0R5J-1

C350

C350 SCD1U16V

SCD1U16V

12

C887

C887 SCD1U16V

SCD1U16V

12

C365

C365 SCD1U16V

SCD1U16V

3D3V_S5

12

3D3V_S0

12

C349

C349 SCD1U16V

SCD1U16V

12

C369

C369 SCD1U16V

SCD1U16V

12

C387

C387 SCD1U16V

SCD1U16V

DY

B

12

C298

C298 SCD1U16V

SCD1U16V

3D3V_S0

12

C849

C849 SCD1U16V

SCD1U16V

5V_S0

1 2

1D8V_S0

MLB-201209-11

R203 1KR2R203 1KR2

1 2

D6

RB751V-40-U

L34

1 2

12

C914

SC10U10V5ZY

DY

12

C276

C276 SC1U10V3KX

SC1U10V3KX

1D2V_S0

1D8VAVDDCK_S0

12

C913

C913 SC1U10V3KX

SC1U10V3KX

V5_VREF

12

C273

C273 SCD1U16V

SCD1U16V

3D3V_SB_S0

1D8V_S0

3D3V_SB_S5

1D8V_S5

R694 0R2-0R694 0R2-0

1 2

12

C901

C901 SCD1U16V

SCD1U16V

C

CPU_1D2V

V5_VREF

12

C883

C883 SCD1U16V

SCD1U16V

AA5

AA26

AB5

AC30

AD5

AD26

AE1 AE5

AE26

AF24 AF25

AK1

AK4 AK26 AK30

M12

M13

M18

M19

W12

W13

W18

W19

AG6

A30 D30 E24 E25

U26 U30

V26

Y26

AF6 AF7

N12 N13 N18 N19 V12 V13 V18 V19

E10 E20 E21

E13 E14 E16 E17

C30

A24 B24

A29 B28

E11 E12 E15 E18

J5 K1 K5 N5 P5 R1 U5

V5

Y1

A3 A7 E6 E7 E1 F5

E9

A4 A8

C1 E5 E8

U84C

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23 VDDQ_24 VDDQ_25 VDDQ_26 VDDQ_27 VDDQ_28 VDDQ_29 VDDQ_30 VDDQ_31 VDDQ_32 VDDQ_33 VDDQ_34

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6

S5_1.8V_1 S5_1.8V_2 S5_1.8V_3 S5_1.8V_4

USB_PHY_1.8V_1 USB_PHY_1.8V_2 USB_PHY_1.8V_3 USB_PHY_1.8V_4

CPU_PWR

V5_VREF

AVDDCK AVSSCK

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11

CHS-215SB400

SB400 SB

Part 3 of 4

POWER

VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

E19 E22 E23 E26 E30 F1 F4 G5 H5 J1 J4 K4 L5 M5 P1 R5 R26 T5 T26 T30 W1 W5 W26 Y5 AB26 AB30 AC5 AC26 AD1 AF5 AF8 AF23 AF26 AG8 AJ1 AJ24 AJ30 AK5 AK25 M14 M15 M16 M17 N14 N15 N16 N17 P12 P13 P14 P15 P16 P17 P18 P19 R12 R13 R14 R15 R16 R17 R18 R19 T12 T13 T14 T15 T16 T17 T18 T19 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 W14 W15 W16 W17

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

SB400 POWER/DECOUPLING

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet

D

Date: Sheet

SNIPE

of

20 56Thursday, November 18, 2004

of

20 56Thursday, November 18, 2004

of

20 56Thursday, November 18, 2004

E

SA

A

B

C

D

E

123

KA20GATE34

R286 0R2-0R286 0R2-0 R268 0R2-0R268 0R2-0

ECSWI#

R294 0R2-0R294 0R2-0 R288

X1_CLK_SB14_1

XO_CLK_SB14_1

R718

R718 4K7R2

4K7R2

678

SRN10K-2

SRN10K-2 RN46

RN46

4 5

GPIO3 GPIO1 GPIO6

1 2

1 2 1 2 1 2

DYR288

DY

R681 33R2R681 33R2 R692 33R2R692 33R2

R682 33R2R682 33R2

PM_THRM#

GPM6#

RI#

SB_PWRGD PM_SUS_STAT#PM_SUS_STAT#

R690 10KR2R690 10KR2

1 2

R693 10KR2R693 10KR2

1 2

THERMTRIP#_1

ECSCI# ECSMI# S3_STATE

0R2-0

SYS_REST PCIE_WAKE#

SIO_CLK_SB

TP107TP107

PCB_VER0 PCB_VER1

SMBC_SB SMBD_SB DDC1_SCL DDC1_SDA DDC2_SCL DDC2_SDA

1 2 1 2

1 2

AC_BITCLK AC_SDOUT

AC97_DIN2 AC_SYNC

GPIO1 GPIO6

GPIO3

U84D

SB400 SB

C6

TALERT#/TEMP_ALERT#/GPIO10

D5

BLINK/GPM6#

C4

PCI_PME#/GEVENT4#

D3

RI#/EXTEVNT0#

B4

SLP_S3#

E3

SLP_S5#

B3

PWR_BTN#

C3

PWR_GOOD

D4

SUS_STAT#

F2

TEST1

E2

TEST0

AJ26

GA20IN

AJ27

KBRST#

D6

SMBALERT#/THRMTRIP#/GEVENT2#

C5

LPC_PME#/GEVENT3#

A25

LPC_SMI#/EXTEVNT1#

D8

VOLT_ALERT#/S3_STATE/GEVENT5#

D7

SYS_RESET#/GPM7#

D2

WAKE#/GEVENT8#

D1

RSMRST#

A23

14M_X1/OSC

B23

14M_X2

AK24

SIO_CLK

B25

ROM_CS#/GPIO1

C25

GHI#/GPIO6

C23

VGATE/GPIO7

D24

AGP_STP#/GPIO4

D23

AGP_BUSY#/GPIO5

A27

FANOUT0/GPIO3

C24

SPKR/GPIO2

A26

SCL0/GPOC0#

B26

SDA0/GPOC1#

B27

DDC1_SCL/GPIO9

C26

DDC1_SDA/GPIO8

C27

DDC2_SCL/GPIO11

D26

DDC2_SDA/GPIO12

J2

NC1

K3

NC4

J3

NC3

K2

NC2

G1

AC_BITCLK

G2

AC_SDOUT

H4

AC_SDIN0

G3

AC_SDIN1

G4

AC_SDIN2

H1

AC_SYNC

H3

AC_RST#

H2

SPDIF_OUT

CHS-215SB400

SB400 SB

Part 4 of 4

USB_OC2#/FANOUT1/GPM2#

USB_OC6#/FAN_ALERT#/GEVENT6#

USB_OC7#/CASE_ALERT#/GEVENT7#

ACPI / WAKE UP EVENTS

USB INTERFACE

CLK / RST

GPIOAC97 (NOT USED)

USB INTERFACE

48M_X1/USBCLK

USB_VREFOUT

USB_OC0#/GPM0# USB_OC1#/GPM1#

USB_OC3#/GPM3# USB_OC4#/GPM4# USB_OC5#/GPM5#

AVSS_USB_10 AVSS_USB_11

USB PWR

AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24

48M_X2

USB_RCOMP

USB_ATEST1 USB_ATEST0

USB_HSDP7+

USB_HSDM7-

USB_HSDP6+

USB_HSDM6-

USB_HSDP5+

USB_HSDM5-

USB_HSDP4+

USB_HSDM4-

USB_HSDP3+

USB_HSDM3-

USB_HSDP2+

USB_HSDM2-

USB_HSDP1+

USB_HSDM1-

USB_HSDP0+

USB_HSDM0-

AVDDTX_0 AVDDTX_1 AVDDTX_2

AVDDTX_3 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3

AVDDC

AVSSC

AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9

A15 B15 C15 D16 C16 D15 B8 C8 C7 B7 B6 A6 B5 A5

A11 B11

A10 B10

A14 B14

A13 B13

A18 B18

A17 B17

A21 B21

A20 B20

C21 C18 D13 D10 D20 D17 C14 C11

A16

B16

A9 A12 A19 A22 B9 B12 B19 B22 C9 C10 C12 C13 C17 C19 C20 C22 D9 D11 D12 D14 D18 D19 D21 D22

USB_PCOMP USB_VREFOUT USB_TE1 USB_TE0 USB_OC#0 USB_OC#1

USB_OC#2

USB_OC#3

USB_OC#4

BT_EN USB_OC#6 USB_OC#7

USB_PP7 USB_PN7

USB_PP6 USB_PN6

USB_PP5 USB_PN5

USB_PP4 USB_PN4

1 2

R714

1 2

0R2-0

DY

1 2

TP36TP36 TP42TP42 TP35TP35

TP45TP45

1 2

R313

0R2-0

1 2

R711 15KR2R711 15KR2

1 2

R710 15KR2R710 15KR2

1 2

R709 15KR2R709 15KR2

1 2

R708 15KR2R708 15KR2

1 2

R713 15KR2R713 15KR2

1 2

R712 15KR2R712 15KR2

USB_PP4 24 USB_PN4 24

USB_PP3 24 USB_PN3 24

USB_PP2 24 USB_PN2 24

USB_PP1 24 USB_PN1 24

USB_PP0 24 USB_PN0 24

AVDD_USB

3D3V_AVDDC

CLK48_USB 3

R275

R275 0R2-0

0R2-0

DY

R290

11K8R3F

RP2

1 2 3 4 5 6

SRP10K

10 9

USB_OC#7USB_OC#2

8

USB_OC#4

7

USB_OC#6

ECSWI#

3D3V_S5

USB_OC#0 USB_OC#1

USB_OC#3

Check if it is necessary Yuhina issue, but ATI confirms that it's ok do need pull low

3D3V_S5

L10

1 2

0R3-U

L33

1 2

MLB-201209-11

12

C433

C426

SC10U10V5ZY

SC1U10V3KX

DY

12

C432

C425

SC10U10V5ZY

SC1U10V3KX

DY

3D3V_AVDDC

12

C910

C909

SC10U10V5ZY

SC1U10V3KX

DY

12

C403

C403 SCD1U16V

SCD1U16V

12

C402

C402 SCD1U16V

SCD1U16V

C900

C900 SCD1U16V

SCD1U16V

3D3V_S5

BT_EN

AVDD_USB

C386

C386 SCD1U16V

SCD1U16V

C385

C385 SCD1U16V

SCD1U16V

12

C405

C405 SCD1U16V

SCD1U16V

C404

C404 SCD1U16V

SCD1U16V

3D3V_S5

RN55

SRN4K7

4 4

Use CLK GEN REF

14.318M CLK to SB OSCIN DUMMY IT

3 3

678

RN45

SRN4K7

123

4 5

123

4 5

PM_SLP_S5# PCIE_WAKE# PME#_SB PM_SLP_S3# GPM6# SYS_REST PM_PWRBTN# PM_THRM#

SB_OSC_CLK3 SB_OSC_INT13

C911 SC33P50V2JN

1 2

C912

1 2

R276 0R2-0R276 0R2-0

X8

DY

X-14D318MHZ-1-U1

1 2

DY

SC33P50V2JN

DY

1 2

XI_CLK_SB14

XO_CLK_SB14

R267

R267 10KR2

10KR2

12

R285

10KR2

R287 10KR2R287 10KR2

THERMTRIP#_1

ECSCI#_KBC34 ECSMI#_KBC34 ECSWI#34

1 2

R291 0R2-0

DY

12

DY

R725

R725 1MR2

1MR2

DY

3D3V_S0

DY

12

R289

10KR2

RI#

R715

R715 0R2-0

0R2-0

R716

R716 0R2-0

0R2-0

S3_STATE

12

PM_THRM#23

PME#_SB29,34

PM_SLP_S3#18,34,38,39,43,44,55 PM_SLP_S5#34,38,44 PM_PWRBTN#34 SB_PWRGD39 PM_SUS_STAT#34

CPU_THERMTRIP#6,23

KBRCIN#34

RSMRST#_KBC34

VRM_PWRGD39,41

SPKR_SB32

Snipe Board Version Setting

12

R296

10KR2

12

R293

R293 10KR2

10KR2

DY

R292

10KR2

AC97_BITCLK_SB32 AC97_DOUT22,24,32 AC97_DIN032 AC97_DIN124

AC97_SYNC24,32 AC97_RST#24,32 SPDIF_OUT_STRAP22

R717

4K7R2

PCB_VER0 PCB_VER1

3D3V_S0

12

10KR2

0 1 1

12

R253

12

10KR2

R297

10KR2

PCB_VER1

AC97_BITCLK_SB

AC97_DIN0

AC97_DIN1

AC97_DIN2

12

R252

00 1SB

1

R254

R254 10KR2

10KR2

DY

R295

R295 10KR2

10KR2

3D3V_S5

12

R246

10KR2

AC97_RST#

PCB_VER0

Ver. SA

SC 0

1

2 2

12

R677

10KR2

3D3V_S0

R278

12

R277

R270

R270 10KR2

10KR2

1 1

DDC1_SCL DDC1_SDA

DDC2_SCL DDC2_SDA

SMBC_SB3,8

SMBD_SB3,8

A

SMBC_SB

SMBD_SB

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet

B

C

D

Date: Sheet

SB400 AC97/USB

SNIPE

E

SA

of

21 56Thursday, November 18, 2004

SA

A

3D3V_S5 3D3V_S0 3D3V_S5 3D3V_S03D3V_S03D3V_S03D3V_S03D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0

B

12

R266

R266 1KR2

1KR2

12

R689

R689 10KR2

10KR2

12

R701

R701 10KR2

10KR2

12

R675

R675 10KR2

10KR2

C

12

R662

R662 10KR2

10KR2

12

R663

R663 10KR2

10KR2

12

R676

R676 10KR2

10KR2

12

R649

R649 10KR2

10KR2

D

12

R636

R636 10KR2

10KR2

12

R650

R650 10KR2

10KR2

12

R637

R637 10KR2

10KR2

E

AUTO_ON#18 AC97_DOUT21,24,32 RTC_CLK18

4 4

REQUIRED SYSTEM STRAPS

3 3

2 2

SPDIF_OUT_STRAP21 CLK33_LAN18,29 CLK33_MINI18,31 CLK33_KBC18,34 CLK33_SIO18,37 CLK33_LPCROM18 PCI_CLK718 PCI_CLK818

12

DY

ACPWRON PCI_CLK5SPDIF_OUT

STRAP HIGH

STRAP LOW

PDACK#19 PCI_AD3118,27,29,31 PCI_AD3018,27,29,31 PCI_AD2918,27,28,29,31,34 PCI_AD2818,27,29,31 PCI_AD2718,27,29,31 PCI_AD2618,27,29,31 PCI_AD2518,27,29,31 PCI_AD2418,27,29,31 PCI_AD2318,27,29,31

MANUAL PWR ON

DEFAULT

AUTO PWR ON

3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S03D3V_S03D3V_S03D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0

12

R623

R623 10KR2

10KR2

DY

R251

R251 10KR2

10KR2

12

R691

R691 10KR2

10KR2

AC_SDOUT RTC_CLK

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

12

R613

R613 10KR2

10KR2

12

DY

INTERNAL RTC

DEFAULT

EXTENNAL RTC (NOT SUPPORTED W/IT8712)

12

R632

R632 10KR2

10KR2

R700

R700 10KR2

10KR2

DY

SIO 24MHz

SIO 48MHz

DEFAULT

12

R611

10KR2

12

DY

12

R665

R665 10KR2

10KR2

DY

PCI_CLK3

USB PHY PWRDOWN DISABLE

DEFAULT

USB PHY PWRDOWN ENABLE

R619

R619 10KR2

10KR2

12

R679

R679 10KR2

10KR2

12

R664

R664 10KR2

10KR2

DY

PCI_CLK2

48MHZClock Input Buffer

DEFAULT

48MHZ

-Crytsal Pad

12

R239

R239 10KR2

10KR2

DY

12

DY

PCI_CLK6

CPU I/F=K8

DEFAULT

CPU I/F=P4

R630

R630 10KR2

10KR2

R639

R639 10KR2

10KR2

12

DY

ROM TYPE

H,H=PCI (X Bus) ROM

H,L=LPC ROM I

L,H=LPC ROM II

L,L=Firmware Hub ROM

12

R628

R628 10KR2

10KR2

DY

R651

R651 10KR2

10KR2

PCI_CLK7

12

R674

R674 10KR2

10KR2

12

R652

R652 10KR2

10KR2

DY

PCI_CLK4

USB INT PLL48

DEFAULT

USB EXT. 48MHZ

12

R232

R232 10KR2

10KR2

DY

14MHZ OSC MODE

DEFAULT

14MHZ XTAL MODE

12

R220

R220 10KR2

10KR2

DY

12

PCI_CLK8

R638

R638 10KR2

10KR2

12

R622

R622 1KR2

1KR2

DEBUG STRAPS

DY

PCI_AD31 PCI_AD30

STRAP

1 1

HIGH

STRAP LOW

USE LONG RESET

DEFAULT

USE SHORT RESET

RESERVED

RESERVED RESERVED RESERVED

DY

PCI_AD29

12

R614

R614 10KR2

10KR2

12

DY

PCI_AD28

R631

R631 10KR2

10KR2

12

R610

R610 10KR2

10KR2

DY

PCI_AD27

BYPASS PCI PLL

USE PCI PLL

DEFAULT DEFAULT

12

R238

R238 10KR2

10KR2

DY

PCI_AD26

PCI_AD25 PCI_AD24PDACK#

BYPASS ACPI BCLK

USE ACPI BCLK

DEFAULT

12

R618

R618 10KR2

10KR2

BYPASS IDE PLL

USE IDE PLL

12

EEPROM PCIE STRAPS

USE DEFAULT PCIE STRAPS

DEFAULT

R231

R231 10KR2

10KR2

12

PCI_AD23

RESERVEDUSE

R218

R218 10KR2

10KR2

12

R629

R629 10KR2

10KR2

12

R621

R621 10KR2

10KR2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

SB400 STRAPPING PIN

A3

SNIPE

SA

of

22 56Thursday, November 18, 2004

*Layout* 15 mil

12

C250

C247

SCD1U

SC10U10V5ZY

*Layout* 15 mil

12

C279

C274

SCD1U

SC10U10V5ZY

VGA

5V_S0

Do not stuff when using UMA

R73

1 2

200R3

12

C594

C594 SCD1U

SCD1U

Setting T8 as 100 Degree

V_DEGREE =(((Degree-72)*0.02)+0.34)*VCC

HW thermal shut down tempature setting 95 degree . Put Near CPU .

DCBATOUT

12

R280

R280 100KR3F

100KR3F

QUICK_SDN# MAX807_VDD

R279

R279 51K1R3F

51K1R3F

MAX807_VSS

12

DY

U40

1

OUT

2

VDD

3

VSS

S-80840CNMC

DY

FAN1_VCC

FAN2_VCC

12

R55

R55 4K99R3F

4K99R3F

CLK32_G79118

V_DEGREE

12

R72

R72 49K9R3F

49K9R3F

NC

D5

S1N4148-U

1 2

D7

S1N4148-U

1 2

*Layout* 30 mil

VGA

5V_G791_S0

C554

C554 SC4D7U10V5ZY

SC4D7U10V5ZY

RUNPWROK39

5

4

BL3#

VGA

12

5V_S0

C242

C242 SC2200P50V2KX

SC2200P50V2KX

C278

C278 SC2200P50V2KX

SC2200P50V2KX

12

C48

C48 SCD1U

SCD1U

SMBD_G791 SMBC_G791 CLK32_G791

12

5V_s0

C66

C66 SCD1U

SCD1U

1 2

R439

R439 10KR3

10KR3

G791 Thermal sensor & Fan controller

5V_S0

12

R71

R71 4K7R3

4K7R3

ALERT#

R32

R32 10KR3

10KR3

DY

12

6

20

4

PR_HW_SDN# ALERT#

G791_RST#

17

13 15 16 18 14

3 2

DXP1:108 Degree DXP2:H/W Setting DXP3:88 Degree

R37

1 2

0R3-U

DY

R426

R426 10KR3

10KR3

C583

C583 SC1000P50V2KX

SC1000P50V2KX

U10

VCC DVCC

FG1 FG2

THERM# ALERT# SDA SCL CLK THERM_SET RESET#

G791SFX

5V_S0

12

R413

R413 10KR3

10KR3

12

VGA

C555

C555 SC1000P50V2KX

SC1000P50V2KX

VGA

FAN1 FAN2

DXP1 DXP2 DXP3

SGND1 SGND2 SGND3

DGND

PM_THRM# 21

*Layout* 15 mil

FAN1_VCC

FAN1_FB

FAN2_FB

FAN2_VCC

*Layout* 15 mil

1 19

7

THERMDP2

9

THERMDP3

11

8

THERMDN2

10

THERMDN3

12

5

G3

1 2

GAP-CLOSE

1 2

GAP-CLOSE

G15

12

C42

C42 SC2200P50V2KX

SC2200P50V2KX

C53

C53 SC2200P50V2KX

SC2200P50V2KX

Dummy when G791 enhanced T8 function

T8_RSET:27K SET TO 80°C T8_RSET:20K SET TO 90°C T8_RSET:15K SET TO 100°C

U61

5V_AUX_S5

12

R469

R469 470KR2

470KR2

T8_SET

12

R470

R470 20KR3F

20KR3F

U61

1

SET

2

GND OUT#3HYST

G709T1U

FAN1

1 2 3

Do not stuff when using UMA

CON3-4

20.D0012.103

FAN2

6

4 3 2 1

5

MOLEX-CON4

20.D0012.104

VGA

FAN2 IS THE SECOUND FAN

12

C80

C80 SC2200P50V2KX

SC2200P50V2KX

Change to 0R2-0 when using UMA

1 2

R39 0R2-0

1 2

R38 0R2-0

1 2

R40 0R2-0R40 0R2-0

1 2

R42 0R2-0R42 0R2-0

5V_AUX_S5

12

5

VCC

4

SMBC_KBC34

DY

R465

R465 150R2

150R2

12

C601

C601 SC4D7U10V5ZY

SC4D7U10V5ZY

SMBD_KBC34

THERM_SYS_DP

THERM_SYS_DN

THERMDP 6

THERMDN 6

VGA_THERM_DP 54

VGA_THERM_DN 54

Do not stuff when using UMA

THERM_SYS_DP

THERM_SYS_DN

By Sourcer requset: Main souce 74.00709.07F Second souce

74.00710.03P

74.06509.07F

74.06510.A7P

5

6

DY

1 2

R47 0R2-0

1 2

R48 0R2-0

1 2

R74 0R2-0R74 0R2-0

1 2

R75 0R2-0R75 0R2-0

DY

34

2

1

R31

1 2

R30

1 2

DY

12

5V_S0

12

R36

R36 10KR2

10KR2

U6

U6 2N7002DW

2N7002DW

0R2-0

0R2-0 0R2-0

0R2-0

THERM_SYS_DP

THERM_SYS_DN

1

C617

C617 SC470P50V2KX

SC470P50V2KX

MMBT3904-U1

5V_S0

2

14

RN2

SRN10KJ

3

VGA_REMOTE_DP 54

VGA_REMOTE_DN 54

3

Q28

2

SMBD_G791

SMBC_G791

3D3V_AUX_S5

12

R257

R257 10KR2

10KR2

Put under CPU Socket

3

2

1

D12

D10

BAT54-1

1

2

12

C388

C388 SCD1U16V

SCD1U16V

DY

CPU_THERMTRIP#6,21

D11

D11 S1N4148-U

S1N4148-U

12

D12 BAW56

BAW56

3

RSMRST#

S5_ENABLE34

PURE_THRM_SDN#

RSMRST# 34

U42

1

A

2

B

GND3Y

NC7S08-U

VCC

5

4

3D3V_AUX_S5

S5PWR_ENABLE 43,44

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

SNIPE

G791

of

23 56Thursday, November 18, 2004

SA

100 mil

5V_S0

100 mil

5V_S0

AC97_DOUT21,22,32

AC97_SYNC21,32

AC97_RST#21,32

AC97_DIN121

1 2

F2

F2 MINISMDC150

MINISMDC150

1 2

F3

F3 MINISMDC150

MINISMDC150

100 mil

5V_USB1_S0

TC1

TC1 SE100U10VM

SE100U10VM

12

C11

C11 SCD1U

SCD1U

12

C12

C12 SC1000P50V2KX

SC1000P50V2KX

12

100 mil

5V_USB0_S0

12

TC2

TC2 SE100U10VM

SE100U10VM

12

C13

C13 SCD1U

SCD1U

12

C14

C14 SC1000P50V2KX

SC1000P50V2KX

BLUETOOTH MODULE CONNECTOR

5V_S0

CN8

MOLEX-CON8-2

10

8 7 6 5 4 3 2 1

9

BT_AUX BT_GPIO2 BT_GPIO1 BT_LINK_LED

USB_PN4 USB_PP4

TP101

TP102

TPAD30

USB_PN4 21 USB_PP4 21

R179 0R2-0

1 2

R180 0R2-0

1 2

DY

DY DY

DY

MDC 1.5 CONNECTOR

CN10

R488 33R3R488 33R3

12

C660

C660 SC22P50V2JN-1

SC22P50V2JN-1

AC97_DIN1_MDC

12

13

MH1

1

3 5 7 9

11

MH2 17

16

AMP-CONN12A

15 14 2

4 6 8 10 12

18

R487

100KR3

TP78

TP79

12

TPAD30

12

C119

C119 SC4D7U10V5ZY

SC4D7U10V5ZY

3D3V_LAN_S5

USB PORT

USB_PN021

USB_PP021

USB_PN121

USB_PP121

BT_COEX2 31 BT_COEX1 31

USB_PN221

USB_PP221

AC97_BITCLK 32

USB_PN321

USB_PP321

R347

1 2

0R3-U

1

2

TR4 L-63UH

L-63UH

68.03216.20B

4

3

68

R348

1 2

0R3-U

R345

1 2

0R3-U

1

2

TR3

TR3 L-63UH

L-63UH

68.03216.20B

4

3

R346

1 2

0R3-U

678

RN54

SRN15K-1

123

4 5

DY

R343

1 2

0R3-U

1

2

TR2

TR2 L-63UH

L-63UH

68.03216.20B

4

3

R344

1 2

0R3-U

R341

1 2

0R3-U

1

2

DY

TR1

TR1 L-63UH

L-63UH

68.03216.20B

4

3

R342

1 2

678

RN53

0R3-U

SRN15K-1

123

4 5

DY

USB_0-

DYTR4

DY

USB_0+

USB_1-

DY

USB_1+

USB_2-

DY

USB_2+

By Sourcer requset change P/N: From 22.10218.701 To 22.10218.F51

USB_3-

By ME requset P/N: Main 22.10218.F51 Second 22.10218.F41

USB_3+

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet of

Date: Sheet

5V_USB0_S0

USB_0-

USB_0+

5V_USB0_S0

USB_1-

USB_1+

5V_USB1_S0

USB_2-

USB_2+

5V_USB1_S0

USB_3-

USB_3+

USB and MDC

SNIPE

CN4

5 1

2

7

3

4 6

SKT-USB-82-U2

CN3

5 1

2

7

3

4 6

SKT-USB-82-U2

CN2

5 1

2

7

3

4 6

SKT-USB-82-U2

CN1

5 1

2

7

3

4 6

SKT-USB-82-U2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

24 56Thursday, November 18, 2004

SA

A

B

C

D

E

4 4

CDROM

HDD

IDE1

HDD1

PIDE_D[15..0]19

RSTDRV#_518

3 3

PIDE_DREQ19 PIDE_IOW#19 PIDE_IOR#19 PIDE_IORDY19 PIDE_DACK#19 PIDE_IRQ1419 PIDE_A119 PIDE_A019 PIDE_CS#019

HDD_LED#_517

DASP#

5V_S0

R616

R616 4K7R3

4K7R3

1 2

PIDE_D6 PIDE_D5 PIDE_D4 PIDE_D3 PIDE_D2 PIDE_D1 PIDE_D0

12

C830

C830 SC10U10V5ZY

SC10U10V5ZY

12

C828

C828 SCD1U

SCD1U

44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10

8 6 4

2

By ME requset change P/N:

2 2

from 20.F0385.044 to 20.F0385.A44

47 45

43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3

1

46 48

SPD-CONN44D-10-U

PIDE_D8PIDE_D7 PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15

PIDE_A2 19 PIDE_CS#1 19

12

C829

C829 SCD1U

SCD1U

TC22

TC22 ST47U6D3V-U1

ST47U6D3V-U1

PWR TRACE 100mil

PIDE_IORDY

21

5V_S0

12

D31

B240LA

R615

R615 4K7R3

4K7R3

5V_S0

SIDE_D[15..0]19

CD_AUDR32

SIDE_D8 SIDE_D9

SIDE_D11 SIDE_D12 SIDE_D13 SIDE_D14

SIDE_DREQ19 SIDE_IOR#19

SIDE_DACK#19

SIDE_A219 SIDE_CS#119

5V_S0

12

SIDE_D15

TP109 TPAD30TP109 TPAD30 TP108 TPAD30TP108 TPAD30

12

C846

C846 SC10U10V5ZY

SC10U10V5ZY

C836

C836 SCD1U

SCD1U

BAY_ID0 BAY_ID1

12

IDE1

51

2 4

6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50

C838

52

SCD1U

SPD-CONN50-4R4U2

20.80163.050

PIN 49,50 DON'T USE

1 3

RSTDRV#_5

5

SIDE_D7

7

SIDE_D6SIDE_D10

9

SIDE_D5

11

SIDE_D4

13

SIDE_D3

15

SIDE_D2

17

SIDE_D1

19

SIDE_D0

21 23 25 27 29 31 33 35 37 39 41 43 45

CSEL

47 49

1 2

CD_AUDL 32 CD_AGND 32

SIDE_IOW# 19 SIDE_IORDY 19 SIDE_IRQ15 19 SIDE_A1 19 SIDE_A0 19 SIDE_CS#0 19

R624

R624 4K7R3

4K7R3

CDROM_LED#_5 17

5V_S0

SIDE_IORDY

5V_S0

12

R625

R625 4K7R3

4K7R3

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD / CDROM

Size Document Number Rev

A3

Date: Sheet

A

B

C

D

Date: Sheet

SNIPE

of

25 56Thursday, November 18, 2004

E

SA

A

B

C

A_CAD[31..0] 28 A_CC/BE#[3..0] 28

D

B_CAD[31..0] 28 B_CC/BE#[3..0] 28

E

U66B

VCCA

4 4

A_CAD15/A_IOWR#

U1-2

3 3

CARDBUS A

A_CC/BE3#/A_REG#

A_CC/BE0#/A_CE1#

A_CFRAME#/A_A23

A_CSERR#/A_WAIT#

A_CREQ#/A_INPACK#

A_CSTSCHG/A_BVD1(STSCHG#/RI#)

2 2

1 1

3D3V_S0

M10 M12

G13

H10 H11 H12

K12

H13

K10 K11

L10 L11 L12

H8 H9

J8

M7

J12

M9

K8

N7

G7 G8

J9 J10 J11

K9

L8

L9

M8

A

U66D

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

PCI7421GHK

VR_PORT VR_PORT

VR_EN#

U1-4

VR_PORT1

M19

VR_PORT2

H1

VR_EN#

H2

POWER TERMINALS

3D3V_S0

12

C695

C695 SCD1U

SCD1U

12

C694

C694 SCD1U

SCD1U

12

Place it near to chip

B

R121

R121 0R3-U

0R3-U

DY

from spec : this pin is active low

R120

R120 0R3-U

0R3-U

A_CCLKRUN/A_WP(IOIS16#)

A_CINT#/A_READY(IREQ#)

A_CRST#/A_RESET

A_CAUDIO/A_BVD2(SPKR#)

PCI7421GHK

VCCA

A_CAD31/A_D10

A_CAD30/A_D9 A_CAD29/A_D1 A_CAD28/A_D8 A_CAD27/A_D0 A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6

A_CAD19/A_A25

A_CAD18/A_A7 A_CAD17/A_A24 A_CAD16/A_A17

A_CAD14/A_A9

A_CAD13/A_IORD#

A_CAD12/A_A11

A_CAD11/A_OE#

A_CAD10/A_CE2#

A_CAD9/A_A10

A_CAD8/A_D15

A_CAD7/A_D7

A_CAD6/A_D13

A_CAD5/A_D6

A_CAD4/A_D12

A_CAD3/A_D5

A_CAD2/A_D11

A_CAD1/A_D4 A_CAD0/A_D3

A_CC/BE2#/A_A12

A_CC/BE1#/A_A8

A_CPAR/A_A13

A_CTRDY#/A_A22

A_CIRDY#/A_A15

A_CSTOP#/A_A20 A_CDEVSL#/A_A21 A_CBLOCK#/A_A19

A_CPERR#/A_A14

A_CGNT#/A_WE#

A_CCLK/A_A16

A_CCD1#/A_CD1#

A_CCD2#/A_CD2#

A_CVS1/A_VS1# A_CVS2/A_VS2#

A_RSVD/A_D14

A_RSVD/A_D2

A_RSVD/A_A18

C

VCC_ASKT_S0 VCC_BSKT_S0

C638

1 2

SCD01U50V3KX

A5 A11

D1 C1 D3 C2 B1 B4 A4 E6 B5 C6 B6 G9 C7 B7 A7 A10 E11 G11 C11 B11 C12 B12 A12 E12 C13 F12 A13 C14 E13 A14 B14 E14

C5 F9 B10 G12

G10

C8 A8 B8 A9 C9 E10

F10 B3

E7 B9

B2 C3 E9

C4 A6

A2

C15 E5 A3 E8

B13 D2 C10

A_CAD31 A_CAD30 A_CAD29 A_CAD28 A_CAD27 A_CAD26 A_CAD25 A_CAD24 A_CAD23 A_CAD22 A_CAD21 A_CAD20 A_CAD19 A_CAD18 A_CAD17 A_CAD16 A_CAD15 A_CAD14 A_CAD13 A_CAD12 A_CAD11 A_CAD10 A_CAD9 A_CAD8 A_CAD7 A_CAD6 A_CAD5 A_CAD4 A_CAD3 A_CAD2 A_CAD1 A_CAD0

A_CC/BE#3 A_CC/BE#2 A_CC/BE#1 A_CC/BE#0

SCD01U50V3KX

A_CPAR 28

A_CFRAME# 28 A_CTRDY# 28 A_CIRDY# 28 A_CSTOP# 28 A_CDEVSEL# 28 A_CBLOCK# 28

A_CPERR# 28 A_CSERR# 28

A_CREQ# 28 A_CGNT# 28

A_CSTSCHG 28 A_CCLKRUN# 28 A_CCLK 28

A_CINT# 28 A_CRST# 28

A_CAUDIO 28

A_CCD1# 28 A_CCD2# 28 A_CVS1 28 A_CVS2 28

A_RSVD_D14 28 A_RSVD_D2 28 A_RSVD_A18 28

B_CSTSCHG/B__BVD1(STSCHG#/RI#)

U66C

U1-3

CARDBUS B

B_CC/BE3#/B_REG#

B_CREQ#/B_INPACK#

B_CCLKRUN#/B_WP(IOIS16

B_CINT#/B_READY(IREQ#)

B_CAUDIO/B_BVD2(SPKR#)

PCI7421GHK

D

VCCB VCCB

B_CAD31/B_D10

B_CAD30/B_D9 B_CAD29/B_D1 B_CAD28/B_D8 B_CAD27/B_D0 B_CAD26/B_A0 B_CAD25/B_A1 B_CAD24/B_A2 B_CAD23/B_A3 B_CAD22/B_A4 B_CAD21/B_A5 B_CAD20/B_A6

B_CAD19/B_A25

B_CAD18/B_A7 B_CAD17/B_A24 B_CAD16/B_A17

B_CAD15/B_IOWR#

B_CAD14/B_A9

B_CAD13/B_IORD#

B_CAD12/B_A11

B_CAD11/B_OE#

B_CAD10/B_CE2

B_CAD9/B_A10

B_CAD8/B_D15

B_CAD7/B_D7

B_CAD6/B_D13

B_CAD5/B_D6

B_CAD4/B_D12

B_CAD3/B_D5

B_CAD2/B_D11

B_CAD1/B_D4 B_CAD0/B_D3

B_CC/BE2#/B_A12

B_CC/BE1#/B_A8

B_CC/BE0#/B_CE1#

B_CPAR/B_A13

B_CFRAME#/B_A23

B_CTRDY#/B_A22

B_CIRDY#/B_A15

B_CSTOP#/B_A20 B_CDEVSL#/B_A21 B_CBLOCK#/B_A19

B_CPERR#/B_A14

B_CSERR#/B_WAIT

B_CGNT#/B_WE#

B_CCLK/B_A16

B_CRST#/B_RESET

B_CCD1#/B_CD1# B_CCD2#/B_CD2#

B_CVS1/B_VS1# V_CVS2/B_VS2#

B_RSVD/B_D14

B_RSVD/B_D2

B_RSVD/B_A18

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

1 2

D19 K19

B_CAD31

B15

B_CAD30

A16

B_CAD29

B16

B_CAD28

A17

B_CAD27

C16

B_CAD26

D17

B_CAD25

C19

B_CAD24

D18

B_CAD23

E17

B_CAD22

E19

B_CAD21

G15

B_CAD20

F18

B_CAD19

H14

B_CAD18

H15

B_CAD17

G17

B_CAD16

K17

B_CAD15

L13

B_CAD14

K18

B_CAD13

L15

B_CAD12

L17

B_CAD11

L18

B_CAD10

L19

B_CAD9

M17

B_CAD8

M14

B_CAD7

M15

B_CAD6

N19

B_CAD5

N18

B_CAD4

N15

B_CAD3

M13

B_CAD2

P18

B_CAD1

P17

B_CAD0

P19

B_CC/BE#3

F15

B_CC/BE#2

G18

B_CC/BE#1

K14

B_CC/BE#0

M18

K13

G19 H17 J13 J17 H19 J19

J18 B18

E18 J15

F14 A18 H18

B19 F17 C17

N13 B17 C18 F19

N17 A15 K15

TI_PCI7421(1 of 2)

C684

C684 SCD01U50V3KX

SCD01U50V3KX

B_CPAR 28

B_CFRAME# 28 B_CTRDY# 28 B_CIRDY# 28 B_CSTOP# 28 B_CDEVSEL# 28 B_CBLOCK# 28

B_CPERR# 28 B_CSERR# 28

B_CREQ# 28 B_CGNT# 28

B_CSTSCHG 28 B_CCLKRUN# 28 B_CCLK 28

B_CINT# 28 B_CRST# 28 B_CAUDIO 28

B_CCD1# 28 B_CCD2# 28 B_CVS1 28 B_CVS2 28

B_RSVD_D14 28 B_RSVD_D2 28 B_RSVD_A18 28

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SNIPE

E

SA

of

26 56Thursday, November 18, 2004

SA

A

1 2

TP13

R129

1 2

10KR3

R125

R125 47KR3

47KR3

TPAD30

TPAD30 TPAD30

TPAD30

3D3V_S0

R555

R555 100R3

100R3

CBUS_PME#

TPAD30

1 2 1 2

CBUS_TP1

CBUS_TP2 CBUS_TP3

CBUS_TP4

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3

7411_IDSELPCI_AD22

7420_suspend#

12

W10

W12

W13

W11

W17

V10 U10 R10 N10 V11 U11 R11

V12 U12 N11

T19 P12

W3

U2 V1 V2 U3

W2

V3 U4 V4 V5 U5 R6 P6

W6

V6 U6 R7 V9 U9 R9 N9

W9 W7 W4

P9 V7 R8 U7

W8

N8

W5

V8 U8 U1 T2 P5 R3 T1 T3

R2

N1 L6 N2 L7

E1 E2

M2 M3

L5 L2 K5 K3 K7 L1 L3

4 4

PCI_AD[31..0]18,22,28,29,31,34

3 3

PCI_CBE#[3..0]18,29,31

PCI_PAR18,29,31

PCI_FRAME#18,29,31

PCI_TRDY#18,29,31

PCI_IRDY#18,29,31

PCI_STOP#18,29,31

PCI_DEVSEL#18,29,31

PCI_PERR#18,29,31 PCI_SERR#18,29,31

PCI_REQ#118 PCI_GNT#118

CLK33_CBUS18

3D3V_S0

A

PCIRST_BUF#18,22,28,29,31,34

3D3V_S0

CB_DATA28

CB_CLOCK28

CB_LATCH28

CB_SPKR32

R117 10KR2R117 10KR2 R116 10KR2R116 10KR2

TP10

TP12

TP12 TP11

TP11

TP14

2 2

1 1

B

U66A

VCCP VCCP

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

C/BE0# C/BE1# C/BE2# C/BE3#

PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT# PCLK PRST# GRST# RI_OUT#/PME#

SUSPEND#

DATA CLOCK LATCH SPKROUT

B_USB_EN A_USB_EN

SDA SCL

NC RSVD TEST0

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

PCI7421GHK

B

U1-1

U1-7

CARD BUS

1394

U1-8

MS_CLK/SD_CLK/SM_EL_WP#

U1-10

U1-5

U1-6

U1-9

UNUSED TERMINALS

MS_BS/SD_CMD/SM_WE#

SD/SDIO

MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1

MS_SDIO(DATA0)/SD_DAT0/SM_D0

SD_CLK/SM_RE#/SC_GPIO1

SD_CMD/SM_ALE/SC_GPIO2

SD_DAT0/SM_D4/SC_GPIO6 SD_DAT1/SM_D5/SC_GPIO5 SD_DAT2/SM_D6/SC_GPIO4 SD_DAT3/SM_D7/SC_GPIO3

SM_PHYS_WP#/SC_FCB

MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6

CLK_48

AVDD AVDD AVDD

VDPLL_33

VSPLL_33

VDPLL_15

VSPLL_15

TPBIAS0

TPA0P TPA0N

TPB0P TPB0N

PHY_TEST_MA

CPS CNA

PC0(TEST1) PC1(TEST2) PC2(TEST3)

AGND AGND AGND

TPBIAS1

TPA1P TPA1N

TPB1P TPB1N

MC_PWR_CTRL_0 MC_PWR_CTRL_1

SD_CD# MS_CD# SM_CD#

SD_WP/SM_CE

SM_CLE/SC_GPIO0

SM_R#/B#/SC_RFU

C

N3

INTA#

M5

INTB#

P1

INTC#

P2 P3

INTD#

CB_MFUNC5

N5 R1

M1

R13 R14 V17

VDPLL

V19 P14

7420_FILTER0

T18

7420_FILTER1

T17

1394_R0

R543 6K34R3

U18

R0

U19

R1

U15

V15 W15

V14 W14

R17 M11 P15

R19

XO

R18

XI

R12 U13 V13

N12 U14 U16

U17

V18 W18

V16 W16

F1 F2

E3 F5 F6 G5 F3

H5 G3 G2

G1 J5 J3

H3 J6 J1 J2

H7 J7 K1 K2

R543 6K34R3

1394_R1

1394_PHYTEST

1394_CNA

1394_XO 1394_XI

1394_TPBIAS1

C

R133

1 2

4K7R3

CLK48_CARDBUS 3

R544

R544 0R2-0

0R2-0

1 2

C762

1 2

SCD1U

1 2

<1394>

R554 4K7R3

1 2

<1394>

R524 4K7R3

1 2

<1394>

12

C771

C771 SCD1U

SCD1U

<1394>

1 2

<1394>

X6

X6 X-24D576M-2

X-24D576M-2

82.30023.181

3D3V_PLL_S0

1 2

INT_PIRQE# 18 INT_PIRQF# 18,31 INT_PIRQG# 18 P_SERIRQ 18,34,37

3D3V_S0

PM_CLKRUN# 18,29,31,34,37

1394_TPBIAS0 28

1394_TPA0P 28 1394_TPA0N 28

1394_TPB0P 28 1394_TPB0N 28

3D3V_S0

C724

C724 SC22P50V2JN-1

SC22P50V2JN-1

C749

C749 SC22P50V2JN-1

SC22P50V2JN-1

D

INTA# CARBUS 1 INTB# CARBUS 2 INTC# 1394 INTD# NO USE

D

E

Bypass/Decupoling Capacitors

Should be places as close to

PCI7421 as possible

3D3V_S0

12

C130

C130 SC1000P50V2KX

SC1000P50V2KX

3D3V_S0

12

C773

C773 SC1000P50V2KX

SC1000P50V2KX

R553

R553 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

Title

TI_PCI7421(2 of 2)

Size Document Number Rev

A3

Date: Sheet

12

C776

C776 SC10U10V5ZY

SC10U10V5ZY

SNIPE

C136

C136 SCD1U

SCD1U

C772

C772 SCD1U

SCD1U

12

C147

C147 SCD1U

SCD1U

12

C137

C137 SCD1U

SCD1U

3D3V_PLL_S03D3V_S0

12

C770

C770 SC1000P50V2KX

SC1000P50V2KX

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

12

C775

C775 SC1U10V3KX

SC1U10V3KX

of

27 56Thursday, November 18, 2004

SA

A

B

C

D

E

176

UPPER LOWER

SIGNAL A SIGNAL B

1394 Connector

SIGNAL B SIGNAL A

UPPERLOWER

4 4

75 150

A_CAD[31..0] 26 A_CC/BE#[3..0] 26 B_CAD[31..0] 26 B_CC/BE#[3..0] 26

B_CCD2#26

B_CCLKRUN#26

B_RSVD_D226

B_CSTSCHG26

3 3

2 2

1 1

B_CAUDIO26

B_CREQ#26

B_CSERR#26

B_CRST#26

B_CVS226

B_CFRAME#26

B_CIRDY#26

B_CTRDY#26

B_CCLK26

VPP_BSKT_S0 VPP_ASKT_S0

VCC_BSKT_S0

B_CINT#26

B_CDEVSEL#26

B_CGNT#26

B_CSTOP#26

B_CPERR#26

B_CBLOCK#26

B_CPAR26

B_RSVD_A1826

B_CVS126

B_RSVD_D1426

B_CCD1#26

A

SIGNALB SIGNALA

1

2 3

B_CAD31

B_CAD30 B_CAD29

B_CAD28 B_CAD27

B_CAD26

B_CAD25 B_CC/BE#3

B_CAD24

B_CAD23

B_CAD22

B_CAD21

B_CAD20 B_CAD19 B_CAD18 B_CAD17 B_CC/BE#2

B_CC/BE#1 B_CAD16

B_CAD14 B_CAD15 B_CAD12 B_CAD13 B_CAD11

B_CAD9

B_CAD10 B_CC/BE#0 B_CAD8 B_CAD7

B_CAD5 B_CAD6

B_CAD3 B_CAD4 B_CAD1 B_CAD2 B_CAD0

4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

152 151

SKT1

MH1 76

77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 MH2

FOX-CONN150-1

20.F0349.150

Upper = Slot0 / Signal A = Conn B Lower = Slot1 / Signal B = Conn A

A_CCD2# 26

A_CAD31

A_CAD30 A_CAD29

A_CAD28 A_CAD27

A_CAD26

A_CAD25 A_CC/BE#3

A_CAD24

A_CAD23

A_CAD22

A_CAD21

A_CAD20 A_CAD19 A_CAD18 A_CAD17 A_CC/BE#2

A_CC/BE#1 A_CAD16

A_CAD14 A_CAD15 A_CAD12 A_CAD13 A_CAD11

A_CAD9

A_CAD10 A_CC/BE#0 A_CAD8 A_CAD7

A_CAD5 A_CAD6

A_CAD3 A_CAD4 A_CAD1 A_CAD2 A_CAD0

B

A_CCLKRUN# 26

A_RSVD_D2 26

A_CSTSCHG 26

A_CAUDIO 26

A_CREQ# 26

A_CSERR# 26

A_CRST# 26

A_CVS2 26

A_CFRAME# 26

A_CIRDY# 26 A_CTRDY# 26 A_CCLK 26

VCC_ASKT_S0

A_CINT# 26 A_CDEVSEL# 26 A_CGNT# 26

A_CSTOP# 26 A_CPERR# 26 A_CBLOCK# 26 A_CPAR 26 A_RSVD_A18 26

A_CVS1 26

A_RSVD_D14 26

A_CCD1# 26

AUD_AGND

STK1

21

4

3

CARDBUS-SKT28-U2

21.I0027.001

1394_TPA0P27

1394_TPA0N27

1394_TPB0P27

1394_TPB0N27

1394_TPBIAS027

Power switch

3D3V_S0

12

C40

C40 SCD1U

SCD1U

C

12

<1394>

R568

R568 56R3F

56R3F

12

<1394>

12

R567

R567 56R3F

56R3F

C795

C795 SC1U10V3KX

SC1U10V3KX

<1394>

12

R570

R570 56R3F

56R3F

1394_TPBIBS

12

C796

C796 SC220P50V2KX-U

SC220P50V2KX-U

12

<1394>

56R3F

R571

R571 4K99R3F

4K99R3F

64.49915.651

Close to the cardbus Controller.

CB_DATA27

CB_CLOCK27

CB_LATCH27

PCIRST_BUF#18,22,27,29,31,34

C19

C19 SCD1U

SCD1U

12

C20

C20 SCD1U

SCD1U

D

1 2

12

C17

C17 SC1U10V3KX

SC1U10V3KX

12

DY

12

C37

C37 SC10U10V5ZY

SC10U10V5ZY

5V_S0

C41

C41 SC4D7U10V5ZY

SC4D7U10V5ZY

12

C36

C36 SCD1U

SCD1U

5V_S0

12

VPP_BSKT_S0VCC_BSKT_S0

TR5

TR5 ACM2012-900-2P-T

ACM2012-900-2P-T

R569

1

2 1

2

ACM2012-900-2P-T

ACM2012-900-2P-T TR6

TR6

4

3 4

3

TPA0+ TPA0TPB0+ TPB0-

4 3 2 1

By ME requset SKT2 P/N: Main 20.90036.001 Second 22.10245.141

U4

3

DATA

4

CLOCK

5

LATCH

12

R19

R19 10KR3

10KR3

RESET#

21

SHDN#

13

3.3V

14

3.3V

1

5V

2

5V

24

5V

7

12V+

20

12V+

11

GND

25

GND

TPS2224APWP

Title

PCMCA SLOT_1394 CONN

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

SNIPE

VCC_ASKT_S0

9

AVCC

10

AVCC

17

BVCC

18

BVCC

8

AVPP

19

BVPP

15

OC#

23

NC

22

NC

16

NC

6

NC

12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12

C39

C39 SC10U10V5ZY

SC10U10V5ZY

E

VPP_ASKT_S0 VPP_BSKT_S0

C35

C35 SCD1U

SCD1U

28 56Thursday, November 18, 2004

SKT2

AMP-CONN4A

VCC_BSKT_S0

VPP_ASKT_S0VCC_ASKT_S0

12

of

6

5

C34

C34 SCD1U

SCD1U

SA

A

B

C

D

E

12

R58

R58 49D9R3F

49D9R3F

C97

C97 SCD01U50V3KX

SCD01U50V3KX

TGP0 TGN0 LAVDDL

TGP1 TGN1 LAVDDL CTRL25

LAVDDH

LV_12P

TGP2 TGN2 LAVDDL

TGP3 TGN3 LAVDDL

ISOLATE# LDVDD INT_PIRQH#

CLK33_LAN PCI_GNT#2 PCI_REQ#2 PME#_LAN LDVDD PCI_AD31 PCI_AD30

PCI_AD29 PCI_AD28

LAN_IDSELPCI_AD23

R442

R442 100R3

100R3

TGP1

12

R61

R61 49D9R3F

49D9R3F

MID1XMID0X MID2X MID3X

12

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

3D3V_LAN_S5

TGP0

TGN0 TGN1

12

R59

R59 49D9R3F

49D9R3F

4 4

12

3 3

TGP030

TGN030

TGP130

TGN130

Do not stuff when using GLAN

LDVDD

1 2

R411 0R2-0

LAN

TGP230

TGN230

1 2

INT_PIRQH#18

3D3V_LAN_S5

PCIRST_BUF#18,27,28,31,59

CLK33_LAN18,22

PCI_GNT#218

PCI_REQ#218

CLK33_LAN

TGP330

TGN330

R53

R53 1KR3

1KR3 R52

R52 15KR3

15KR3

1 2

R45

R45 0R2-0

0R2-0

12

1 2

A

C563

C563 SC10P50V2JN-1

SC10P50V2JN-1

2 2

3D3V_S0

PME#_SB21,59

1 1

12

R60

R60 49D9R3F

49D9R3F

C98

C98 SCD01U50V3KX

SCD01U50V3KX

LAVDDH

LAN_X1

LAN_X2

CTRL18

LDVDD_A

1 2

RSET

MDI0+ MDI0AVDDL VSS MDI1+ MDI1AVDDL CTRL25 VSS AVDDH HSDAC+ HSDACVSS MDI2+ MDI2AVDDL VSS MDI3+ MDI3AVDDL VSSPST GND ISOLATE# VDD18 INTA# VDD33 PCIRST# PCICLK GNT# REQ# PME# VDD18 PCIAD31 PCIAD30 GND PCIAD29 PCIAD28 VSSPST

TGP2

TGN2

R430

R430 2D49KR3

2D49KR3

128

127

VSS

PCI_AD27 PCI_AD26

PCI_AD25 PCI_AD24 PCI_CBE#3 LDVDD LAN_IDSEL

PCI_AD23 PCI_AD22 PCI_AD21

12

RSET

TGP3

TGN3

12

R62

R63

49D9R3F

12

C85

C85 SCD01U50V3KX

SCD01U50V3KX

126

125

124

VSS

CTRL18

AVDD18

PCIAD2739PCIAD2640VDD3341PCIAD2542PCIAD2443CBEB344VDD1845IDSEL46PCIAD2347GND48PCIAD2249PCIAD2150VSSPST51GND52PCIAD2053VDD1854PCIAD1955VDD3356PCIAD1857PCIAD1758PCIAD1659CBEB260FRAME#61GND62IRDY#63VDD18

B

12

123

VSS

CLOSE TO LAN CHIP

12

R65

R65 49D9R3F

49D9R3F

12

C99

C99 SCD01U50V3KX

SCD01U50V3KX

122

121

XTAL2

R64

R64 49D9R3F

49D9R3F

XTAL1

120

AVDDH

119

118

GND

VSSPST

PCI_CBE#[3..0]18,27,31

PCI_AD[31..0]18,22,27,31

RTL_LED1#

RTL_LED2#

ACT_LED# LDVDD RTL_LED1# RTL_LED2# 1G_LED# LAN_EESK LDVDD LAN_EEDI LAN_EEDO 3D3V_LAN_S5 LAN_EECS_3

PCI_AD0 PCI_AD1

116

112

111

110

109

107

106

105

104

117

115

114

113

GND

LED0

LED1

LED2

LED3

EESK

VDD18

64

108

EEDI

EEDO

VDD33

LDVDD PCI_IRDY# PCI_FRAME# PCI_CBE#2 PCI_AD16 PCI_AD17 PCI_AD18

PCI_AD19 LDVDD PCI_AD20

103

EECS

PCIAD0

PCIAD1

LANWAKE

PCIAD2

VSSPST

GND

VDD18 PCIAD3 PCIAD4 PCIAD5 PCIAD6

VDD33 PCIAD7

CBEB0

VSSPST

PCIAD8 PCIAD9

M66EN PCIAD10 PCIAD11 PCIAD12

VDD33 PCIAD13 PCIAD14

VSSPST

GND

PCIAD15

VDD18

CBEB1

PAR

SERR#

NC#74

GND

NC#72

VDD33

PERR#

STOP#

DEVSEL#

TRDY#

VSSPST

CLKRUN#

D2

1

2

3 4

RB731UD2RB731U

ACT_LED# 30

U60

U60 RTL8110SBL

RTL8110SBL

PCI_AD2

102 101 100

LDVDD

99

PCI_AD3

98

PCI_AD4

97

PCI_AD5

96

PCI_AD6

95 94

PCI_AD7

93

PCI_CBE#0

92 91

PCI_AD8

90

PCI_AD9

89 88

PCI_AD10

87

PCI_AD11

86

PCI_AD12

85 84

PCI_AD13

83

PCI_AD14

82 81 80

PCI_AD15

79

LDVDD

78

PCI_CBE#1

77

PCI_PAR

76

PCI_SERR#

75 74 73 72 71

PCI_PERR#

70

PCI_STOP#

69

PCI_DEVSEL#

68

PCI_TRDY#

67 66

PM_CLKRUN#

65

GIGALAN: RTL8110SBL 10/100 LAN:RTL8100C

PCI_IRDY# 18,27,31 PCI_FRAME# 18,27,31

3D3V_LAN_S5

C

100M_LED#

6

1G_LED#

5

10M_LED#

3D3V_LAN_S5

3

Do not stuff when using 10/100

PCI_PAR 18,27,31 PCI_SERR# 18,27,31

PCI_PERR# 18,27,31 PCI_STOP# 18,27,31 PCI_DEVSEL# 18,27,31 PCI_TRDY# 18,27,31

PM_CLKRUN# 18,27,31,36,59

G85

3D3V_S5

1 2

GAP-CLOSE-PWR

100M_LED# 30

U59

BAT54C-L

1 2

10M_LED# 30

R471

R471 3K6R3D

3K6R3D

12

C613

SCD1U

12

Q30

C656

SCD1U

1 2

R90

1 2

10KR2

12

SCD1U

3

1

2

LAN

12

C602

SCD1U

C562

12

SCD1U

3D3V_LAN_S5

C683

SC10U10V5ZY

3

Q29

Q29 BCP69T1-U

BCP69T1-U

2

12

C654

SCD1U

12

C622

SCD1U

BCP69T1-U

C655

12

3D3V_LAN_S5 3D3V_LAN_S5

CTRL18 CTRL25

1

GLAN

Do not stuff when using 10/100

Title

3D3V_LAN_S5

D

Title

Size Document Number Rev

A3

Date: Sheet

LAN_X2

X2

X2 X-25MHZ-11-U

X-25MHZ-11-U

LAN_X1

LAN_EECS_3 LAN_EESK LAN_EEDI LAN_EEDO

12

C659

SCD1U

C657

C657 SCD1U

SCD1U

1 2

1 2 3 4

45 Ohm, 600mA

L3

1 2

0R3-UL30R3-U

1 2

U62

CS SK DI DO

M93C46-W-3

Do not stuff when using GLAN

LDVDD

12

C588

SCD1U

3D3V_LAN_S5

3

BCP69T1-U

1

Q27

2

GLAN

12

C50

SC10U10V5ZY

SNIPE

12

C623

SCD1U

Do not stuff when using GLAN

LAN

12

C560

SCD1U

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12

C561

C574

SCD1U

CTRL25

LAN_RTL8110SBL/RTL8100C

C73

C73 SC27P50V2JN

SC27P50V2JN

C84

C84 SC27P50V2JN

SC27P50V2JN

VCC

ORG GND

LAVDDH

45 Ohm, 600mA

L5

1 2

0R3-UL50R3-U

C658

C658 SCD1U

SCD1U

12

R44

R44 0R3-U

0R3-U

12

C559

SCD1U

E

3D3V_LAN_S5

8

12

7

DC

6 5

12

C60

SCD1U

LAVDDL

12

C57

SCD1U

29 56Thursday, November 18, 2004

12

C597

SCD1U

LDVDD_A

12

C58

SCD1U

of

C612

C612 SCD1U

SCD1U

12

C587

C587 SCD1U

SCD1U

C59

C59 SCD1U

SCD1U

SA

A

Green - 10Mbps/802.11b

Link: YellowActivity:

Orange - 100Mbps/802.11a Yellow - 1Gbps

JK1

A5

A4

RJ45+RJ11-1-U

34

JK1

CN9

CN9 MLXCON2

MLXCON2

1 2

B1 B2

A1 A3

A2

ACT_LED# CONN_PWR_B2

10M_LED# CONN_PWR

100M_LED#

1 2 1 2

TGP0 TGN0

V_DAC MCT3 MCT4 V_DAC

ACT_LED# 29

10M_LED# 29

100M_LED# 29

TIPTIP_MDC

L1

L1 BLM18HG601SN1D

BLM18HG601SN1D

RINGRING_MDC

L2

L2 BLM18HG601SN1D

BLM18HG601SN1D

7 8

6 14 11

3

U53

TD+ TD-

CT CT CT CT

XFORM-112

1 2

MH1

TIP

TIP RING RING

4 4

TDP_RJ45-1 TDN_RJ45-2 RDP_RJ45-3 RJ45-4 RJ45-5 RDN_RJ45-6 RJ45-7 RJ45-8

3 3

RJ11_1

RJ11_2 RJ11_3 RJ11_4

MH2

RJ45_1 RJ45_2 RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8

MH3

B

R326

3D3V_S3

470R3

R5

3D3V_S3

470R3R5470R3

Do not stuff when using GLAN

TDP_RJ45-1

10

TX+

RD+

RD-

RX+

TX-

RX-

9

1 2

16 15

TDN_RJ45-2

TGP1 TGN1

RDP_RJ45-3 RDN_RJ45-6

By ME requset for 10/100 LAN change P/N: From 22.10177.621 To 22.10177.731 By ME requset for GigaLAN JK1 P/N: Main 22.10177.601 Second 22.10245.771 By ME requset change P/N: From 20.D0121.102 To 21.D0010.102

C

D

E

10/100M Lan Transformer

By Sourcer requset change P/N: From 68.H0013.301 To 68.0H80P.301

2 2

LAVDDL

1 1

SCD01U50V3KX

For 10/100 Cap. change to SCD1U

Do not stuff when using 10/100

GIGA Lan Transformer

TGP329 TGN329

TGP229 TGN229

TGP129 TGN129

TGP029 TGN029

R396

1 2

0R2-0

12

GLAN

C550

SCD01U50V3KX

C549

12

A

By Sourcer requset change P/N: From 68.H5015.301 To 68.02402.30A

U54

TGP3 TGN3

TGP2 TGN2

TGP1 TGN1

TGP0 TGN0 TDN_RJ45-2

V_DAC

12

C547

12

SCD01U50V3KX

C548

C548 SCD01U50V3KX

SCD01U50V3KX

2 3

5 6

8 9

11 12

1 4 7

10

U54

TD1+ TD1-

TD2+ TD2-

TD3+ TD3-

TD4+ TD4-

TCT1 TCT2 TCT3 TCT4

XFORM-114

68.H5015.301

23

MX1+

22

MX1-

20

MX2+

19

MX2-

17

MX3+

16

MX3-

14

MX4+

13

MX4-

24

MCT1

21

MCT2

18

MCT3

15

MCT4

LAN_TC_GND MCT1 MCT2

C482

12

SC1KP2KV

C2

DY

1 2

SC1000P50V2KX

RJ45-7 RJ45-8

RJ45-4 RJ45-5

RDP_RJ45-3 RDN_RJ45-6

TDP_RJ45-1

MCT1 MCT2 MCT3 MCT4

RN1

SRN75J

B

123

1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.

3.No vias, No 90 degree bends.

4.pairs must be equal lengths.

5.6mil trace width,12mil separation.

6.36mil between pairs and any other trace.

7.Must not cross ground moat,except RJ-45 moat.

RJ45-7 RJ45-8 RJ45-4 RJ45-5

LAN

123

678

4 5

678

4 5

RN57

SRN0-1-U

Stuff for RTL8100C

Do not stuff when using GLAN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN_CONN 10/100/1000

Size Document Number Rev

A3

Date: Sheet of

C

D

Date: Sheet

SNIPE

of

30 56Thursday, November 18, 2004

E

SA

A

B

C

D

E

MINI-PCI

4 4

3D3V_S0

PCI_AD[31..0]18,22,27,28,29,34

PCI_CBE#[3..0]18,27,29

CN11

125

1

2

3

4

5

6

7

8

9

H=Enable L=Disable

3 3

BT_COEX224

3D3V_S0

12

R91

R91 10KR3

10KR3

PCI_PERR#18,27,29

2 2

1 1

WIRELESS_EN34

TP98 TPAD30TP98 TPAD30

3D3V_S0

CLK33_MINI18,22

PCI_REQ#018

PCI_IRDY#18,27,29

PM_CLKRUN#18,27,29,34,37

PCI_SERR#18,27,29

5V_S0

80211_ACTIVE WIRELESS_EN

MINI_P_IRQF#

PCI_AD31 PCI_AD29

PCI_AD27 PCI_AD25

PCI_CBE#3 PCI_AD24 PCI_AD23

PCI_AD21

PCI_AD17 PCI_CBE#2

PCI_CBE#1 PCI_AD14

PCI_AD12 PCI_AD10

PCI_AD8 PCI_AD7

PCI_AD5

PCI_AD3

PCI_AD1

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121 123

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124

126

SPD-CONN124A-U

RINGTIP

(VCC)

(M66EN)

12

DY

5V_S0

MINI_P_IRQF#

PME#_MINI BT_COEX1 PCI_AD30

PCI_AD28 PCI_AD26

MINI_IDSEL

PCI_AD22 PCI_AD20PCI_AD19

PCI_AD18 PCI_AD16

PCI_AD15 PCI_AD13 PCI_AD11

PCI_AD9 PCI_CBE#0

PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0

C128

C128 SC4D7U10V5ZY

SC4D7U10V5ZY

12

C61

C61 SC4D7U10V5ZY

SC4D7U10V5ZY

DY

R126

R126 0R2-0

0R2-0

1 2

12

C138

C138 SCD1U

SCD1U

TP88 TPAD30TP88 TPAD30

1 2

12

INT_PIRQF# 18,27

PCIRST_BUF# 18,22,27,28,29,34

PCI_GNT#0 18

BT_COEX1 24

R103

R103 100R3

100R3

PCI_PAR 18,27,29

PCI_FRAME# 18,27,29 PCI_TRDY# 18,27,29 PCI_STOP# 18,27,29

PCI_DEVSEL# 18,27,29

C126

C126 SCD1U

SCD1U

PCI_AD21

12

C110

C110 SCD1U

SCD1U

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI-PCI

Size Document Number Rev

A3

Date: Sheet

A

B

C

D

Date: Sheet

SNIPE

of

31 56Thursday, November 18, 2004

E

SA

5

AC97_BITCLK_ALL

R455

AC97_BITCLK_SB21

D D

AC97_BITCLK24

C C

AUD_LINL

AUD_LINR

AUD_LOL

AUD_LOR

AUD_MICIN33

B B

1 2

47R3

63.47034.151

R454

1 2

47R3

63.47034.151

12

C31

SCD1U

DY

12

SC1000P50V2KX

1 2

C33

C33 SC1000P50V2KX

SC1000P50V2KX

AUD_AGND AUD_AGND

C558 SC1U10V3ZYC558 SC1U10V3ZY

3D3V_S0

12

R453

R453 10KR3

10KR3

C533

5

VCC

4

Y

U58

U58 NC7SZ08-U

NC7SZ08-U

12

C532

SC1000P50V2KX

SCD1U

DY

C546

C546 SC1U10V3KX

SC1U10V3KX

1 2

12

C32

C32 SC1000P50V2KX

SC1000P50V2KX

AUD_MICIN1

12

1 2

A

B

GND

12

C45

C44

SC1U10V3KX

AUDLINL AUDLINR

C545

C545 SC1U10V3KX

SC1U10V3KX

R456

R456 DUMMY-R3

DUMMY-R3

1

2

3

12

SCD1U

DY

BITCLK_BUFF

AC97_RST#

12

C49

SC10U10V5ZY

14 15

16 17

39 41

23 24

35 36

21 22

CODECVREF

C43

VREFOUT2

ADAF2 ADAF1

VREFOUT1

U56

AUX-L AUX-R

JD2 JD1/GPIO1

SURR-OUT-L SURR-OUT-R

LINE-L LINE-R

FRONT-OUT-L FRONT-OUT-R

MIC1 MIC2

ALC655-U

4

30

AFILT129AFILT2

CD-L18CD-R

20

19

5V_S0 5V_AUDIO_S0

U1

1

SHDN#

2

GND

3

C15

C15 SC1U10V3KX

SC1U10V3KX

5V_AUDIO_S0

12

AUD_AGND

28

34

27

VREF

VREFOUT

FRONT-MIC

CEN-OUT43LFE-OUT

44

IN

G913C-UU1G913C-U

C46

33

NC#33

PC-BEEP12PHONE

13

SCD1U

40

12

NC#40

C38

SCD1U

38

AVDD25AVDD

AGND26AGND

42

VRDA31VRAD

CD-GND

12

AUD_AGND

32

MONO-OUT-R

37

SET

OUT

3D3V_S0

9

5V_AUDIO_S0

5VA_SET

5

4

12

C55

DY

VDD1VDD

XTL-IN

XTL-OUT

SPDIFO

SPDIFI/EAPD

SDIN

SDOUT

JD0/GPIO0

XTLSEL

BITCLK

SYNC

RESET#

GND4GND

7

12

SCD1U

C8

C8 SC10U10V5ZY

SC10U10V5ZY

C596

SCD1U

C596

SCD1U

2 3

48 47

8 5

45 46

6 10

11

3

12

AC97_CBITCLK BITCLK_BUFF

R11

R11 28K7R3F

28K7R3F

C7

C7 SC22P50V2JN-1

SC22P50V2JN-1

12

R10

R10 10KR3F

10KR3F

AUD_AGND

C56

SCD1U

XTALIN_CODEC XTALOUT_CODEC

SPDIF_OUT

AC97_DATIN

R56 22R3R56 22R3

R432 33R3R432 33R3

R57

R433 0R2-0R433 0R2-0

X5

X5 X-24D576MHZ-13

X-24D576MHZ-13

1 2

DY

1 2

R395 0R3-U

12

1 2

R43 0R2-0R43 0R2-0

12

1 2

10KR3DY

1 2

DY

1 2

DY

XTSEL HI: USE 24.576M XTAL XTSEL LOW: USE 14.318M CLK FROM CLK GEN

2

CLK14_AUDIO 3

C586

C586 SC22P50V2JN-1

SC22P50V2JN-1

C585

C585 SC22P50V2JN-1

SC22P50V2JN-1

SPDIF 33 EAPD 33

AC97_DIN0 21 AC97_DOUT 21,22,24

AC97_SYNC 21,24 AC97_RST# 21,24

G11

1 2

GAP-CLOSE

G84

1 2

GAP-CLOSE

1

G12

1 2

GAP-CLOSE

AUD_AGND AUD_AGND

G1

1 2

GAP-CLOSE

AUD_AGNDAUD_AGND

R410

R410 100KR3

100KR3

12

CDAUDL

CDAGND

CDAUDR

R409

R409 100KR3

100KR3

AUD_AGND

1 2

12

R417

R417 100KR3

100KR3

R429

CD_AUDL25

CD_AGND25

CD_AUDR25

A A

1 2

75R3F

R416 GAP-CLOSE-PWRR416 GAP-CLOSE-PWR

1 2

R394

1 2

75R3F

12

5

CDAUD_L

C573

C573 SC1U10V3KX

SC1U10V3KX

CDAUD_GND

C572

C572 SC1U10V3KX

SC1U10V3KX

CDAUD_R

C557

C557 SC1U10V3KX

SC1U10V3KX

AUD_SYS_BEEP

AUD_AGND

AUD_PC_BEEP AUD_BEEP AUD_SYS_BEEP

C69 SCD1UC69 SCD1U

R78

12

0R3-U

SC4D7U10V5ZY

R76

12

SC4D7U10V5ZY

0R3-U

R77

12

0R3-U

SC4D7U10V5ZY

4

C96

C94

C95

12

CB_SPKR 27

SPKR_SB 21

KBC_BEEP 34

3

12

AUD_AGND

12

R49

R49 2K2R3

2K2R3

C54

C54 SC2200P50V2KX

SC2200P50V2KX

12

R51 4K7R3R51 4K7R3

G8

G13

1 2

GAP-CLOSE

AUD_AGND AUD_AGND

G4

1 2

GAP-CLOSE

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO (1/2) -- CODEC ALC655

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet

SNIPE

G8

1 2

GAP-CLOSE

G2

1 2

GAP-CLOSE

AUD_AGNDAUD_AGND

SA

of

32 56Thursday, November 18, 2004

1

SA

A

CSOUTL1

C538

1 2

SC10U10V5ZY

C537

1 2

SC10U10V5ZY

HP_L L_BYPASS

AMP_SHUTDOWN

HP_IN_1

AUD_AGND

R_BYPASS HP_R

C495

1 2

SC10U10V5ZY

C505

1 2

SC10U10V5ZY

HP_IN_1 HP_IN

12

R17

GAP-CLOSE

AUD_AGND

5V_AUDIO_S0

RB29_2

12

C1

C1 SC4D7U10V5ZY

SC4D7U10V5ZY

AUD_AGND

12

C528

C528 SC4D7U10V5ZY

SC4D7U10V5ZY

AUD_AGNDAUD_AGND

C47

C47 SC4D7U10V5ZY

SC4D7U10V5ZY

1 2

CSOUTL2

1 2

C531

C531 SCD1U

SCD1U

By GMT suggest. Change from

74.01421.01G to 74.01421.A1G

CSOUTR1

1 2

CSOUTR2

1 2

4 4

AUD_LOL32

5VA_OP_S0

R38310KR2 R38310KR2

12

R_BYPASS

L_BYPASS

12

G5

12

C530

C530 SC1U10V3KX

SC1U10V3KX

AUD_AGND

AMP_SHUTDOWN

C529

C529 SC4D7U10V5ZY

SC4D7U10V5ZY

12

AUD_AGND

A

12

C30

C30 SC10U10V5ZY

SC10U10V5ZY

3 3

AUD_AGND

AUD_LOR32

2 2

5V_S0 5VA_OP_S0

1 2

GAP-CLOSE-PWR

1 1

GAP-CLOSE-PWR

R24

R24 15KR3F

15KR3F

R12

R12 15KR3F

15KR3F

R15

R15 10KR3

10KR3

HP_L

R35

R35 10KR3

10KR3

L_LINE_IN

R_LINE_IN

HP_R

1 2

12

R4 1KR3R41KR3

12

R3 2K2R3R32K2R3

AUD_MICIN

12

C481

C481 SC3300P50V2KX

SC3300P50V2KX

U2

4

LLINEIN

5

LHPIN

6

LBYPASS

7

LVDD

8

SHUTDOWN

2

TJ

17

HP-IN

23

VOL

18

RVDD

19

RBYPASS

20

RHPIN

21

RLINEIN

G1421BF3U

R16

R16 DUMMY-R3

DUMMY-R3

B

KBC_MUTE34 EAPD32

B

1 2

MUTEOUT

GND

25

1 2

AUD_MICIN 32

C29

C29 SC220P50V2KX-U

SC220P50V2KX-U

R27

R27 10KR3

10KR3

C28

C28 SC220P50V2KX-U

SC220P50V2KX-U

R26

R26 18KR3

18KR3

LOUT+

LOUT-

SE/BTL#

HP/LINE#

MUTEIN

GND/HS GND/HS GND/HS GND/HS

ROUT-

ROUT+

R13

R13 18KR3

18KR3

C9

C9 SC220P50V2KX-U

SC220P50V2KX-U

R14

R14 10KR3

10KR3

C10

C10 SC220P50V2KX-U

SC220P50V2KX-U

R29

R29 10KR2

10KR2

3 10

14 16 11 9 1 12 13 24

15 22

AUD_AGND

12

AUD_AGND

SPKR_L+ SPKR_L-

HP_IN

AUD_MUTE

SPKR_RSPKR_R+

1 2

U3

A

VCC B GND3Y

NC7SZ32-U

5

4

C

5V_AUDIO_S0

AUD_MUTE

C

5VA_OP_S0

2

E

C

3

HP_IN

12

AUD_AGND

AUD_LINR32

AUD_LINL32

5VA_OP_S0

Q4

Q4 PDTA124EU

PDTA124EU

B

SE#_BTL

1

R363

R363 100KR3

100KR3

AUD_AGND

LINE OUT

TC8

TC8 ST100U6D3VDM-5

ST100U6D3VDM-5

SPKR_R+

1 2

TC7

TC7 ST100U6D3VDM-5

ST100U6D3VDM-5

80.10715.591

12

R28

R28 10KR3

10KR3

D

Q25

1

2N7002

G

S

2 3

LINE IN

R329

R327

12

R1

R2

10KR3R110KR3

10KR3R210KR3

HP_IN

12

D

ENAUDIO# 37

1 2

AUD_MICIN

If R->L noise 1000P -> 100P

AUD_AGND

SPKR_L+2SPKR_L+

SPKR_R+2

R8 1KR3R81KR3

AUD_LINE_R

1KR3

AUD_LINE_L

1KR3

R328

GAP-CLOSE

避免

U48

2

GND

3

NC

4

ON/OFF#

AAT4250-U

DY

1 2

12

R6 1KR3R61KR3

AUD_AGND AUD_AGNDAUD_AGND AUD_AGND

D

SPKR_L-

SPKR_L+

SPKR_R+

SPKR_R-

12

R9 22R3R922R3 R7 22R3R722R3

E

SPK1

6

4 3 2 1

12

C915

C915 SC680P50V2KX

SC680P50V2KX

12

C902

C902 SC680P50V2KX

SC680P50V2KX

12

C888

C888 SC680P50V2KX

SC680P50V2KX

12

C903

C903 SC680P50V2KX

SC680P50V2KX

5

MOLEX-CON4

20.D0012.104

By ME requset SPK1 P/N: Main 20.D0012.104 Second 20.D0152.104

5VA_OP_S0

12

R330

R330 1KR3

1KR3

MICJK_PWR

C467

SC100P50V2JN

AUD_AGND

MIC_JKIN

12

R331

R331 10KR3

10KR3

AUD_AGND

12

C468

C468 SC100P50V2JN

SC100P50V2JN

AUD_AGNDAUD_AGND

By ME requset LIN1 P/N:

AUD_AGND

MIC_JKIN 37

LIN1

5

4

3

6

2

1

SKT-JACK-22-U

Main 22.10271.031 Second 22.10088.381

By ME requset LOUT1 P/N: Main 22.10147.031 Second 22.10251.031

3D3V_S0

5

IN

OUT

12

C5

C5 SC680P50V2KX

SC680P50V2KX

AUD_AGND

SPDIF_PWR

1

SPDIF32

AUD_AGND

SE#_BTL

SPKR_L_A1

SPKR_R_A1

12

C4

C4 SC680P50V2KX

SC680P50V2KX

AUD_AGND

Title

AUDIO (2/2)

Size Document Number Rev

A3

Date: Sheet

SNIPE

LOUT1

9

GND

8

VCC

7

VIN

16

6 5 4 2 3 1

MINDIN10-1-U2

For support S/PDIF, P/N: 22.10257.001 FOXCONN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

33 56Thursday, November 18, 2004

E

SA

of

SA

TDATA_5

9

TCLK_5

S5_ENABLE

RSMRST#_KBC

PM_PWRBTN#

AG_RST#

AD_IA

RN83

SRN10K-2

R659

R659 10KR2

10KR2

12

C318

C318 SCD1U16V

SCD1U16V

1 2 3 45

DY

12

5

TP32TPAD28 TP32TPAD28

R658

R658 10KR2

10KR2

R645

DUMMY-R2

12

C871

C871 SCD1U16V

SCD1U16V

LPC_LAD[0..3]18,37

KBCBIOS_RD#36 KBCBIOS_WE#36 KBCBIOS_CS#36

KBC_D[0..7]36

12

R634

R634 10KR2

10KR2

R646

12

DY

CLK33_KBC18,22

PS2_DAT2 PS2_CLK2 PS2_DAT1 PS2_CLK1

DY

DUMMY-R2

12

C877

C877 SCD1U16V

SCD1U16V

LPC_LFRAME#18,37

P_SERIRQ18,27,37

TDATA_535 TCLK_535

12

R656

R656 DUMMY-R2

DUMMY-R2

12

R669

R669 0R2-0

0R2-0

12

C921

C921 SCD1U16V

SCD1U16V

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

KBCBIOS_RD# KBCBIOS_WE# KBCBIOS_CS#

KBC_D0 KBC_D1 KBC_D2 KBC_D3 KBC_D4 KBC_D5 KBC_D6 KBC_D7

A036 A136 A236 A336 A436 A536 A636 A736 A836 A936 A1036 A1136 A1236 A1336 A1436 A1536 A1636 A1736

3D3V_AUX_S5

12

R683

R683 DUMMY-R2

DUMMY-R2

DY

ECSWI#21

12

PM_SLP_S3#18,21,38,39,43,44,55 KBC_PWRBTN#35

R670

AC_IN#47

0R2-0

KBC_LID#35 BRIGHTNESS17

3D3V_AUX_S5

12

C859

L31

L31 BLM11P600S

BLM11P600S

1 2

SCD1U16V

15

LAD0

14

LAD1

13

LAD2

10

LAD3

9

LFRAME#

18

LCLK

7

SERIRQ

150

RD#

151

WR#

173

MEMCS#

152

IOCS#

138

D0

139

D1

140

D2

141

D3

144

D4

145

D5

146

D6

147

D7

124

A0

125

A1

126

A2

127

A3

128

A4

131

A5

132

A6

133

A7

143

A8

142

A9

135

A10

134

A11

130

A12

129

A13

121

A14

120

A15

113

A16

112

A17

104

A18

103

A19

117

PSDAT3

116

PSCLK3

115

PSDAT2

114

PSCLK2

111

PSDAT1

110

PSCLK1

KBC_BEEP32

3D3V_AUX_S5

12

D D

5V_S0

R671 10KR2R671 10KR2 R684 10KR2R684 10KR2

C C

S5_ENABLE3

AG_RST#

3D3V_AUX_S5

B B

A1 A4 A5 FAN3PWM FAN3FB

A A

A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable A4 for DMRP==>High=Disable,Low=Enable

A5 for EMWB==>High=Enable,Low=Disable

GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) GPIO06 for DPLL test mode==> High=Test Mode,Low=Normal operation(Recommended)

C904

C904 SCD1U16V

SCD1U16V

1 2 1 2

RSMRST#_KBC21

PM_PWRBTN#21

AD_IA47

12

R721

R721 10KR2

10KR2

E51CS#

12

C464

C464 SCD1U16V

SCD1U16V

8 7 6

12

R660

R660 DUMMY-R2

DUMMY-R2

DY

12

C905

4

12

123

VCC16VCC34VCC45VCC

LPC

X-bus ROM

PS/2

PWM743PWM640PWM539PWM438PWM337PWM236PWM133PWM0

ECSWI#

PM_PWRBTN#

RSMRST#_KBC

S5_ENABLE

KBC_BEEP

TP46

TPAD28

BRIGHTNESS AG_RST#

4

95

136

157

166

VCC

VCCA

32

DY

1 2

R720 0R2-0

KCOL1

KCOL2

161

KSO049KSO1

VCCBAT

GPWU02GPWU126GPWU229GPWU330GPWU444GPWU576GPWU6

KBC_PME#

KCOL3

KCOL4

KCOL5

KCOL6

KCOL7

KCOL8

KCOL9

KCOL10

KCOL11

KCOL12

KCOL13

KCOL14

53

KSO556KSO657KSO758KSO859KSO9

60

KSO1061KSO1164KSO1265KSO1366KSO1467KSO1568KSO16

50

KSO251KSO352KSO4

KB Matrix

KB3910

DA099DA1

DA2

DA3

100

GMODULE_RST#

DA41DA542DA647DA7

101

102

TP49

TP49 TPAD28

TPAD28

GPWU7

172

176

KCOL[1..16] 35 KROW[8..1] 35

KCOL15

KCOL16

153

154

KSO17

AD081AD182AD283AD384AD487AD588AD689AD7

174

AC_VOL_SENSE

BT_SENSE

AC_VOL_SENSE BT_SENSE

3

KROW1

KROW2

KROW3

KROW4

KROW5

KROW6

KROW7

KSI071KSI172KSI273KSI374KSI477KSI578KSI679KSI7

90

KBC_BB_ENABLE#

AD_IA

AD+ BT+

12

R317

R317 47KR2F

47KR2F

12

3

KROW8

80

ECRST#19ECSCI#

31

EC_RST#

ECSCI#_KBC

R316

R316 10KR2F-U

10KR2F-U

BT_SCL_5

BT_SDA_5

KBC_SCL2

KBC_SDA2

164

170

163

169

SCL1

SCL2

SDA1

SDA2

AGND96BATGND

159

KBC_BB_ENABLE# 36

12

R318

R318 560KR2F

560KR2F

12

R319

R319 100KR2F

100KR2F

158

160

XCLKI

XCLKO

GND17GND35GND46GND

122

ECSCI#_KBC 21

1 4

137

GND

32

GND

167

C317

1 2

SC10P50V2JN-1

X4

X4 X-32D768KHZ-12-U

X-32D768KHZ-12-U

C309

1 2

SC10P50V2JN-1

U41

155

GPIO29

149

GPIO28

148

GPIO27

119

GPIO26

118

GPIO25

109

GPIO24

108

GPIO23

107

GPIO22

106

GPIO21

105

GPIO20

86

GPIO19

85

GPIO18

75

GPIO17

70

GPIO16

69

GPIO15

63

GPIO14

62

GPIO13

55

GPIO12

54

GPIO11

48

GPIO10

22

GPIO09

21

GPIO08

20

GPIO07

12

GPIO06

11

GPIO05

8

GPIO04

6

GPIO03

5

GPIO02

4

GPIO01

3

GPIO00

41

GPIO0F

28

GPIO0E

27

GPIO0D

25

GPIO0C

24

GPIO0B

23

GPIO0A

98

GPIO1F

97

GPIO1E

94

GPIO1D

93

GPIO1C

92

GPIO1B

91

GPIO1A

168

GPIOI2D

175

GPIO2F

171

GPIO2E

165

GPIO2C

162

GPIO2B

156

GPIO2A

KB3910SF

3D3V_AUX_S5

C884

12

SC10U10V5ZY

CHG_ON# AD_OFF A20 E51TXD E51RXD E51CS# STDBY_LED

FnLock# CAP_LED#

KBC_MUTE

FAN3FB FAN3PWM

KBCRST# KA20GATE

BATA_IN#

ECSMI#_KBC WIRELESS_EN

NUM_LED#

BT_LED

MAIL_LED CHARGE_LED

VCC3VSB

KBC_PCIRST# BL_ON

12

R697

R697 10KR2

10KR2

CH3906

2

3

2

R657 0R2-0R657 0R2-0

R643 0R2-0R643 0R2-0

Q41

1

2

MATRIXID2# 35 MATRIXID1# 35

BT_BTN# 35 CHG_ON# 47 AD_OFF 48

TP44 TPAD28TP44 TPAD28 TP48 TPAD28TP48 TPAD28 TP47 TPAD28TP47 TPAD28

STDBY_LED 17,35

INTERNET# 35

MAIL# 35

PM_SLP_S5# 21,38,44

PM_SUS_STAT# 21

CAP_LED# 17

WLAN_LED 17

KBC_MUTE 33

KEY5# 35

WIRELESS_BTN# 35

1 2

KA20GATE 21

KEY4# 35

BT_TH 47,48

ECSMI#_KBC 21

WIRELESS_EN 31 PM_CLKRUN# 18,27,29,31,37

FPBACK 17

NUM_LED# 17

BT_LED 35

MAIL_LED 35 CHARGE_LED 17

1 2

BL_ON 13,449

CHK_PW# 36

12

R66810KR2 R66810KR2

RSMRST# 23

1

3D3V_AUX_S5

3

RN81

RN81 SRN10KJ

SRN10KJ

2

1 4

KBC_SCL2

KBC_SDA2

TP50 TPAD28TP50 TPAD28

TP43 TPAD28TP43 TPAD28

KBRCIN# 21

3D3V_S5

12

R642

R642 100KR2

100KR2

12

C852

C852 SC1U10V3ZY

SC1U10V3ZY

TP34 TPAD28TP34 TPAD28

PCIRST_BUF# 18,22,27,28,29,31

KBC_PME#

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet

5V_S0

1

Q38

G

2N7002

23

S

D

S

D

BT_SCL_548 BT_SDA_548

3D3V_AUX_S55V_S0

12

R696

R696 10KR2

10KR2

DUMMY

1

Q39

2N7002

D

KBC_PWRBTN#

AC_IN#

BT_TH

KBC_LID#

MATRIXID1#

MATRIXID2#

3D3V_S5

12

R702

R702 10KR2

10KR2

1

Q42

G

2N7002

23

R695

S

D

S

D

1 2

0R2-0

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

KBC 3910

SNIPE

1

G

23

S

34 56Thursday, November 18, 2004

SMBC_KBC 23

SMBD_KBC 23

3D3V_AUX_S5

RN82

RN82 SRN4D7KJ

SRN4D7KJ

2 1 4

1 2

DUMMY

R703 10KR2

1 2

DY

DUMMY

R719 10KR2

1 2

DY

DUMMY

R655 10KR2

1 2

DY

DUMMY

R315 10KR2

DY

1 2

DUMMY

R230 10KR2

1 2

DY

DUMMY

R644 10KR2

DY

PME#_SB 21,29

of

3

SA

A

3D3V_S0

12

C178

16

15 14

4 4

3 3

13 12 11 10 9 8 7 6 5 4 3 2 1

17

CN7

CN7 MOLEX-CON15

MOLEX-CON15

20.D0012.115

5V_AUX_S5

POWER BUTTON

C178 SCD1U

SCD1U

DY

MAIL_LED# 80211_LED# BT_LED# WIRELESS_BTN# BT_BTN# MAIL# KEY4# KEY5# INTERNET#

PWRBTN#_CN

3D3V_S0

12

C167

C167 SCD1U

SCD1U

DY

12

R134

R134 10KR3

10KR3

R138

1 2

DUMMY-R3

DY

1 2

STDBY_LED#2S_LED

STDBY_LED#2

MAIL_LED#

BT_LED#

R135

R135 470R3

470R3

12

C161

C161 SCD1U

SCD1U

78.10492.4B1

80211_LED# 17

WIRELESS_BTN# 34 BT_BTN# 34 MAIL# 34 KEY4# 34 KEY5# 34 INTERNET# 34

OUT

3

GND

1

R2

DTC114EUA-U1

DY

OUT

3

GND

1

R2

DTC114EUA-U1

OUT

3

GND

1

DTC114EUA-U1

KBC_PWRBTN# 34

Q9

R1

Q8

R1

R2

Q32

R1

B

INTERNET# KEY5# KEY4# MAIL#

BT_BTN# WIRELESS_BTN# 80211_LED# MAIL_LED#

BT_LED#

PWRBTN#_CN

2

IN

2

IN

2

IN

STDBY_LED 17,34

MAIL_LED 34

BT_LED 34

3D3V_S3

WIRELESS_BTN# BT_BTN#PWRBTN#_CN

10

9 8 7

RP3

RP3 SRP10K

SRP10K

Launch Board CONN

RC1

1 2 3 4 5

SRC100P50V-U

RC2

1 2 3 4 5

SRC100P50V-U

1 2

1 2 3 4 56

C

8 7 6

C790

C790 SC1000P50V2KX

SC1000P50V2KX

C168

C168 SC1000P50V2KX

SC1000P50V2KX

MAIL# KEY4# KEY5# INTERNET#

3D3V_S3

D

3D3V_S3

12

R340

R340 47KR3

47KR3

CN6

LID#

KBC_LID#34

1 2

12

C504

C504 SC1000P50V2KX

SC1000P50V2KX

R353

R353 100R3

100R3

LID_SW

CN6

1 2

CON2-10-U

20.D0012.102

E

Cover Up Switch

5V_S0

12

C820

C820 SC1U10V3KX

SC1U10V3KX

12

C821

C821 SC47P50V2JN

SC47P50V2JN

5V_S0

TPAD1

1 2 3 4 5 6

ETY-CON6-2

20.K0108.006

2

14

RN74

12

C267

SRN10KJ

3

R606

TDATA_534

TCLK_534

1 2 1 2

R605

R605 100R3

100R3

C267 SCD1U

SCD1U

TP_DATA TP_CLK

12

C822

C822 SC47P50V2JN

SC47P50V2JN

TOUCH PAD

KROW[8..1] 34

1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

KCOL[1..16] 34

KROW8

KROW7 KROW6 KROW5 KROW4 KROW3 KROW2 KROW1 KCOL16 KCOL15 KCOL14 KCOL13 KCOL12 KCOL11 KCOL10 KCOL9 KCOL8 KCOL7 KCOL6 KCOL5 KCOL4 KCOL3 KCOL2 KCOL1

MATRIXID2# MATRIXID1#

KCOL9 KCOL10 KCOL11 KCOL12

KCOL6 KCOL7 KCOL8

KCOL1 KCOL2 KCOL3 KCOL4

C

2 2

1 1

Internal KeyBoard CONN

MATRIXID1#34 MATRIXID2#34

Keyboard matrix ( from vendor )

Low Bit

High Bit

MATRIXID1#

MATRIXID2#

1

A

MATRIXID1# MATRIXID2#

JapUS

100

01

10

30 1

RN73

2 1 4

SRN10KJ

OtherEur

K/B

3D3V_S0

3

KB1

KROW8

KROW7 KROW6 KROW5 KROW4 KROW3 KROW2 KROW1 KCOL16 KCOL15 KCOL14 KCOL13 KCOL12 KCOL11 KCOL10 KCOL9 KCOL8 KCOL7 KCOL6 KCOL5 KCOL4 KCOL3 KCOL2 KCOL1

MATRIXID2# MATRIXID1#

B

KB1

56

55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29

ETY-CON28

20.K0108.028

EMI Bypass cap.

RC5

1

8

2

7

3

6

4 5

SRC100P50V-U

RC4

1

8

2

7

3

6

4 5

SRC100P50V-U

RC3

1

8

2

7

3

6

4 5

SRC100P50V-U

D

RC8

KROW5 KROW6 KROW7 KROW8

KROW1KCOL5 KROW2 KROW3 KROW4

KCOL13 KCOL14 KCOL15 KCOL16

Title

LAUNCH / TOUCHPAD / KB CONN

Size Document Number Rev

A3

Date: Sheet

RC8

1 2 3 4 5

SRC100P50V-U

RC7

1 2 3 4 5

SRC100P50V-U

RC6

1 2 3 4 5

SRC100P50V-U

SNIPE

8 7 6

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

35 56Thursday, November 18, 2004

E

SA

5

4

3

2

1

KBC_D[0..7] 34

12

C878

SCD1U16V

D D

KBC_D034 KBC_D134 KBC_D234 KBC_D334 KBC_D434 KBC_D534 KBC_D634 KBC_D734

C C

KBCBIOS_CS#34 KBCBIOS_RD#34 KBCBIOS_WE#34

SCD1U16V

13 14 15 17 18 19 20 21

3D3V_AUX_S5

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

7

32

VDD

VSS16CE#22OE#24WE#

U90

27

A012A111A210A39A48A5

1

31

U90

A75A8

6

A6

26

A9

23

A10

25

A11

4

A12

28

A13

29

A14

A153A162A1730A18

39SF040-70

ROM SIZE MAX. 512KBYTE

A5 34 A4 34 A3 34 A2 34 A1 34 A0 34 A8 34 A7 34

A6 34 A9 34 A10 34 A11 34 A12 34 A13 34 A14 34

A15 34 A16 34 A17 34 A17 34

PLCC32 Socket P/N: SSKT3262.10002.032

3D3V_S0

SSKT32 62.10005.032

2

14

RN56

B B

KBC_BB_ENABLE#34

CHK_PW#34

A A

5

RN56

SRN10KJ

3

KBC_BB_ENABLE#

CHK_PW#

SW1

1

2

3

4

SW-2184LPSTR

8

7

6

5

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet

4

3

2

Date: Sheet

BIOS ROM

SNIPE

SA

of

36 56Thursday, November 18, 2004

of

36 56Thursday, November 18, 2004

of

36 56Thursday, November 18, 2004

1

SA

DY

1 2

3D3V_S0

12

C265

C265 SCD1U16V

SCD1U16V

12

C271

C271 SC4D7U10V5ZY

SC4D7U10V5ZY

12

R185

R185 10KR2

10KR2

12

C264

C264 SCD1U16V

SCD1U16V

PM_CLKRUN#18,27,29,31,34

BADRR_STRAP

C270

C270 SCD1U16V

SCD1U16V

12

ENAUDIO#33 PANEL_ID017 PANEL_ID117 PANEL_ID217 PANEL_ID317 MIC_JKIN33

LPC_LFRAME#18,34

P_SERIRQ18,27,34

LPC_RST#13,18

LPC_LDRQ0#18

LPC_LAD[0..3]18,34

C255

C255 SCD1U16V

SCD1U16V

VCORF

U30

1

CTS1#

44

DCD1#

45

DSR1#

3

RI1#

46

SIN1

19

CLKRUN#/GPIO22

10

VCORF

2

DTR1#_BOUT1/BADDR

47

RTS1#/TRIS#

48

SOUT1/TEST#

RB1

1 2

33R2

8

VDD

GPIO0011GPIO0112GPIO0213GPIO0314GPIO04

3D3V_S0

12

C926

C926 SC1U10V3KX

SC1U10V3KX

PCIRST_BUF#_SIO

24

35

VDD

15

LPC_LAD0

LPC_LAD1

LPC_LAD2

32

36

38

LAD0

LAD1

GPIO20

GPIO21/LPCPD#21GPIO23

17

22

12

LPC_LAD3

16

27

28

40

LAD2

LAD3

LRESET#

LDRQ#/XOR_OUT

IRRX15IRTX6IRRX2_IRSL0/GPIO17

7

C919

C919 SC4D7U10V5ZY

SC4D7U10V5ZY

CLK33_SIO_T

R201

12

10R2

DY

30

42

43

25

NC

LCLK

CLKIN

SERIRQ

LFRAME#

RESERVED/GPO24

VSS

9

23

34

IRTX_3 IRSL0_3 IRRX_3

PC87381-U

33

NC

37

NC

39

NC

41

NC

4

NC

18

NC

26

NC

29

NC

31

NC

20

Infineon FIR Module

40mil

10mil 10mil 10mil

1 2

IRTX_3 IRRX_3 IRSL0_3

IRMODE

R723

R723 10KR3

10KR3

DY

C809SC10P50V2JN-1 C809SC10P50V2JN-1

12

C266

12

SC10P50V2JN-1

DY

IR1

1

VCC2/IRED_ANODE

2

IRED_CATHODE

3

TXD

4

RXD

5

SD

6

VCC1

7

MODE

8

GND

FIR-TFDU6102

CLK14_SIO 3

CLK33_SIO 18,22

PANEL ID DEFINE

PANEL_ID3

0

PANEL_ID2

PANEL_ID1

0 0 15" SXGA+0

PANEL_ID0 VENDORS

0

1 0 15" WIDE0

1

0

1 1 AU (14")0

01 1 AU (14")**

0

Note : AU ( ),CMO( ),** : With Digitizer

友達奇美

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

SUPER IO NC87381

Size Document Number Rev

A3

Date: Sheet

SNIPE

Hydis (14")SPWG010

Hitachi (15")

AU (15")

CMO(15")

CMO(14")001

No Panel111

SA

of

37 56Thursday, November 18, 2004

A

Q16

12

C431

C431 SC1U10V3KX

SC1U10V3KX

Q16 TP0610T

TP0610T

3

12

D

1

G

S

2 3

Q21

Q21 TP0610T

TP0610T

3

12

DY

Q22_D

DY

D

1

G

S

2 3

DY

DCBATOUT

PM_RUNCTL

R250

1 2

10KR3

PM_RUNCTL_G

R265

1 2

330KR3

4 4

PM_SLP_S3#

3 3

PM_SLP_S3#18,21,34,39,43,44,55

1 2

R302

DCBATOUT

1 2

0R3-U

63.R0004.151

R380

R380 10KR3

10KR3

DY

R379

R379 330KR3

330KR3

DY

PM_SLP_S3#

PM_RUNCTL_2

PM_RUNCTL_G2

12

R264

R264 1KR3

1KR3

Q22_D

Q18

Q18 2N7002

2N7002

12

R381

R381 1KR3

1KR3

Q23

Q23 2N7002

2N7002

12VGATE_S041

12

R263

R263 47KR3

47KR3

DY

D

1

G

S

2 3

DY

RUNGATE_S0

D

Q22

1

2N7002

G

S

2 3

DY

12

330KR3

C358

C358 SCD22U25V5ZY

SCD22U25V5ZY

Q17

Q17 2N7002

2N7002

12

C502

C502 SCD22U25V5ZY

SCD22U25V5ZY

DY

R245

B

12

DY

21

D9

D9 MMGZ5242B

MMGZ5242B

R349

R349 330KR3

330KR3

1 2

21

D24

MMGZ5242B

DY

1

C920

C920 DUMMY-C2

DUMMY-C2

3D3V_S0

C331

C331 DUMMY-C2

DUMMY-C2

2D5V_S0

12

C503

C503 DUMMY-C2

DUMMY-C2

1 2

2 3 4 5

U96

U96 AO4422

AO4422

1 2 3 4 5

U83

U83 AO4422

AO4422

1

S

2

S

3

S

4 5

GD

U50

U50 AO4422

AO4422

R262

R262 0R3-U

0R3-U

R728

0R2-0

1 2

5V_S0_EN

12

R237

3D3V_S0_EN

1 2

0R2-0

R350

0R2-0

12VGATE_S0 RUNGATE_S0

12

RUNGATE_S0_R

C

S

S S

S GD

GD

S

S S

S GD

GD

D

D D

D

D D

D

D D

D

8 7 6

5V_S55V_S0

8 7 6

3D3V_S5

8 7 6

2D5V_S3

PM_SLP_S5#21,34,44

DCBATOUT

1 2

PM_SUSCTL

R222

R222 10KR3

10KR3

PM_SUSCTL_G

R223

R223 330KR3

330KR3

PM_SLP_S5#

D

E

Suspend Power

Q15

Q15 TP0610T

TP0610T

PM_SUSPWR_CTL

12

3

12

Q34_D

D

1

G

S

2 3

R224

R224 1KR3

1KR3

Q14

Q14 2N7002

2N7002

12

C848

C848 SCD1U50V3ZY

SCD1U50V3ZY

3D3V_S3

12

DY

12

R221

R221 1MR3F

1MR3F

R626

R626 330KR3

330KR3

21

D32

MMGZ5242B

1

S

2

S

3

S

4 5

GD

U80

U80 AO4422

AO4422

3D3V_S53D3V_S3

8

D

7

D

6

D

Run Power

12VGATE_S0 1D8V_EN_S0

2 2

1 1

DCBATOUT

PM_RUNCTL_3 1D8V_EN_S0

R598

1 2

10KR3

DY

PM_RUNCTL_G3

R593

1 2

330KR3

DY

PM_SLP_S3#18,21,34,39,43,44,55

A

PM_SLP_S3#

Q37

Q37 TP0610T

TP0610T

12

3

12

R592

DY

1KR3

DY

D

Q24

1

2N7002

G

S

2 3

DY

12

DY

12

C819

C819 SCD22U25V5ZY

SCD22U25V5ZY

DY

B

R590

R590 330KR3

330KR3

1 2

21

D8

MMGZ5242B

DY

R583

R583 0R3-U

0R3-U

R589

1 2

0R2-0

1D8V_EN_S0_R

12

C816

C816 DUMMY-C2

DUMMY-C2

1D8V_S0

1

S

2

S

3

S

4 5

GD

U75

U75 AO4422

AO4422

C

R350 & R589 WILL BE REMOVED ON VER SB

1D8V_S5

8

D

7

D

6

D

Power On Logic

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PWR CTL LOGIC / PWR PLANE

Size Document Number Rev

A3

Date: Sheet of

D

Date: Sheet

SNIPE

of

38 56Thursday, November 18, 2004

E

SA

A

B

C

D

E

1

2

5V_S5

4

5

1D25V_S3_PG#

12

C259

C259 SCD1U

SCD1U

1D25V_S35V_S5

12

C261

C261 SC1U10V3KX

SC1U10V3KX

5V_S5

147

1

3

73.07408.0JB

U29B

6

TSAHCT08-U

73.07408.0JB

5V_S5

12

G

2 3

U29A

1D2V_S0_EN

TSAHCT08-U

VDDA_2D5_PG

R186

R186 10KR3

10KR3

1D25V_S3_PG

D

Q10

Q10 2N7002

2N7002

S

1D8V_S0_PG

ALL_PWROK13

10

12

C258

C258 SC1U10V3KX

SC1U10V3KX

1D2V_S0_EN 44

5V_S5

9

D

147

U29D

8

TSAHCT08-U

73.07408.0JB

9

10

5V_S5

U29C

VTT_VDDA_PG

PM_SLP_S3#

3D3V_S0

U74C

147

8

TSLCX08-U

Title

Size Document Number Rev

Custom

Date: Sheet

147

13

12

11

TSAHCT08-U

73.07408.0JB

NB_PWRGD 13

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

POWERGOOD&ENABLES

SNIPE

VCORE_EN 41

39 56Thursday, November 18, 2004

E

SA

of

3D3V_S03D3V_S0

2D5V_S32D5V_S0

12

5V_S5

1 2

12

C260

C260 SCD1U

SCD1U

1 2

ALL_PWROK 13

PM_SLP_S3#

VRM_PWRGD

R174

R174 10KR3

10KR3

2D5V_S3_PG

2D5V_S0_PG

C257

C257 SCD1U

SCD1U

R175

R175 4K7R3

4K7R3

R176

R176 1MR3F

1MR3F

U73B

U73A

147

NB_PWRGD NB_PWRGD_N

4 4

3 3

2 2

1 1

1 2

VTT_VDDA_PG

TSLCX14MTC-L-U

SB_PWRGD IS 35MS AFTER NB_PWRGD

1 2

A

R165

R165 47KR3

47KR3

1

2

VRM_PWRGD21,41

1 2

1D8V_PG_SET

12

R164

R164 10KR3

10KR3

5V_S5

147

R591

270KR3

220KR2J

3

73.07408.0JB

R587

5V_S5

12

1 2

U72A

VTT_1D2V_PG

TSAHCT08-U

VRM_PWRGD

12

R178

R178 4K7R3

4K7R3

R177

R177 1MR3F

1MR3F

12

C817

C817 SCD47U16V3ZY

SCD47U16V3ZY

1D8V_S0_PG#

1D8V_S0

12

1D8V_S0_FB

R187

R187 0R2-0

0R2-0

4

5

ALL_PWROK13

12

5V_S5

147

3 4

C262

C262 SCD1U

SCD1U

73.07408.0JB

147

1

G

6

RUNPWROK23

U73B

TSLCX14MTC-L-U

3D3V_S5

12

1D8V_S0_PG

D

S

2 3

U72B

VTT_VRM_PG

TSAHCT08-U

B

R188

R188 10KR3

10KR3

Q11

Q11 2N7002

2N7002

4

5

1D8V_S0_PG

1 2 3 4

5V_S5

147

13

12

3D3V_S0

147

U27

1OUT 1IN1IN+ GND

U74B

TSLCX08-U

LM393ADR

5V_S5

1 2

U72C

11

TSAHCT08-U

6

VCC

2OUT

2IN-

2IN+

ALL_PWROK

PM_SLP_S3#18,21,34,38,43,44,55

8 7 6 5

R163

R163 470KR3

470KR3

1D25V_PG_SET

12

R156

R156 100KR3F

100KR3F

SB_PWRGD 21

12

R197

R197 10KR3

10KR3

12

C256

C256 SCD1U

SCD1U

C

A

CPU_CORE Intersil 6559CR + ISL6207CB*3 (Dummy *1)

H_VID0

H_VID1

4 4

H_VID2

H_VID3

H_VID4

VCORE_EN

COREFB

COREFB#

3 3

DCBATOUT

5V_S0

3D3V_S0

VID Setting Output Signal

VID0(I / 3.3V)

PGOOD(OD / 3.3V)

VID1(I / 3.3V)

VID2(I / 3.3V)

VID3(I / 3.3V)

VID4(I / 3.3V)

Output Power

VCC_CORE_PWR(O)

Input Signal

EN (I / 3.3V)

Voltage Sense

VSEN(I / Vcore)

RGND(I / Vcore)

Input Power

VCC(I)

Max1999

2 2

Input Signal

ON3

SHUTDOWN_S5

DCBATOUT

PM_SLP_S3#

ON5

SHDN#

SKIP#

Input Power

DCBATOUT

1 1

V+

A

5V/3D3V

Output Signal

PGOOD(OD / 5V)

Output Power

5V(O)

3D3V(O)

LDO5(O)

LDO3 (O) MAX1999_LDO3 (30mA)

B

VRM_PG

VCC_CORE_S0(Imax=53A)

PM_SLP_S5#

1D2V_S0_EN

S5PWR_ENABLE

GND

DCBATOUT_5130

DCBATOUT

5V_S5

5V_AUX_S5

5V_S0

MAX1999_PGDSHUTDOWN_S5

5V_S5 (6A)

3D3V_S5 (4A)

MAX1999_LDO5 (30mA)

B

C

TI TPS5130 2D5V/1D2V/1D8V

Input Signal

FOR

SS_STBY1(I / 5V)

SS_STBY2(I / 5V)

SS_STBY3(I / 5V)

2.5V

FOR

1.2V

FOR

1.8V

STBY_LDO(I / 5V)

STBY_VREF5(I / 28V)

STBY_VREF3.3(I / 28V)

Input Power 1D8V (5A)

VIN (I / 28V)

REG5V_IN(I / 5V)

5V_AUX_S5

For PGOUT

Output Signal

PGOUT(OD / 5V)

Output Power

2D5(O)

1D2V(O)

1D8V(O)

LDO(O)

Pull High (5V)

2D5V (9A)

1D2V (5A)

Charger_Max1909

CHARGE_OFF

BT_TH

BAT+SENSE

BT_SCL_5

BT_SDA_5

FLASH_GPIO1

FLASH_GPIO2

AC_IN

AD+

Input Signal Output Signal

CLS (I / 3.3V)

THM (I / 3.3V)

LDO (O / 5.4V)

XTAL2/PB4 (O/5V)

BATT (I / 3.3V)

SCL (IO / 5V)

SDA (IO / 5V)

RESET#/PB5 (I/5V)

PB0/MOSI/AIN0

Output Power

VCC (O)

PB0/MOSI/AIN0

Input Power

DCIN (I)

C

AD_IN

CHARGE_LED#

BL2#XTAL1/PB3 (O/5V)

DCBATOUT

BT+

D

APL5331_1D25V_VREF

5V_S0

DCBATOUT

PM_SLP_S3#

AD_OFF

AD_JK

5V_AUX_S5

D

E

5V_AUX_S5

DCBATOUT

AUX_SD

2D5V_S3

5V_S5

INPUT

SD

LP2951ACM

1D25V_S3

VIN

VCNTL

VREF

APL5331KAC

OUT

VOUT

5V_AUX_S5

1D25V_S0

FAN5234_VGA_Core 1D15V or 1D20V

Input Power

VCC

VIN

Input Signal

EN

Output Signal

PG

Output Power

1D15V (O) or 1D20V (O)

1D15V (5.2A) or 1D20V (9A)

Adapter

Input Signal

(I)

Input Power

VCC(I)

Title

Size Document Number Rev

A3

Date: Sheet

Output Signal

(O)

Output Power

VCC(O)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Power Block Diagram

SNIPE

E

of

40 56Thursday, November 18, 2004

of

40 56Thursday, November 18, 2004

of

40 56Thursday, November 18, 2004

AD_IN

AD+

SA

A

R173

Vcore_CPU=1.500V Iomax=52.9A Vcore_CPU=1.400V Iomax=42.7A

Vdrop is over spec under max loading

R value large, then offset small. => 3K or 4.99K?

4 4

Now=>Offset value is over 0.05V If without offset =>R158=0ohm

R585

DUMMY-R3

PLACE IN THE BACK OF CPU

3 3

2 2

1 1

C813

DUMMY-C3

ISL6559_FB_1

12

1 2

R584

1 2

1KR3F

ISL6559_VDIFF

DCBATOUT

Follow MOSFET rise time spec. => Mount 0ohm first.

ISL6559_PWM1

12

SB Version: Change U4 from ISL6209CB (74.06209.071) to ISL6207CB-U (74.06207.071)

BOOT_1

R41

R41 499KR3F

499KR3F

1 2

SC4700P50V3KX

Gain value large, then bandwidth large! => 2.74K or 3.65K

R33

2D2R3

U5

1

UGATE

2

BOOT

3

PWM

4

GND

ISL6207CB-U

74.06207.071

5V_S0

12

1 2

ISEN242VID[4..0]6

ISL6559_FB

C815

1 2

G32

G31

1 2

GAP-OPEN-PWR

G30

1 2

GAP-OPEN-PWR

G29

1 2

GAP-OPEN-PWR

G86

1 2

GAP-OPEN-PWR

G87

1 2

GAP-OPEN-PWR

G88

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

BOOT_1#

A

R173

DUMMY-R3

1 2

R561

R561 10R3

10R3

C802

C802 SC1U10V3KX

SC1U10V3KX

R183

4K99R3F

FB/COMP

1 2

SCD22U16V3KX-1

PHASE

VCC

LGATE

C27

ISL6559_OVP

5V_ISL6559_S0

ISL6559_OFS ISL6559_VDIFF

VID0_PWM VID1_PWM VID2_PWM VID3_PWM VID4_PWM

ISEN1 ISEN2 ISEN3

C814

ISL6559_COMP

1 2

SC56P

R586

1 2

3K65R3F

VCORE_EN_1

Panasonic 25V / E1 Cap.

8.5*6.5mm / SMD ESR=0.26ohm, Iripple=0.3A FX Serial

12

5V_S0

8

ISL6207_EN1

7

EN

6 5

12

R25

R25 0R3-U

0R3-U

12

C16

C16 SC1U10V3KX

SC1U10V3KX

R578

DUMMY-R3

1 2

Dummy-80.6kDummy-10k

U71

15

VCC

29

OVP

5

OFS

3

VID0

2

VID1

1

VID2

32

VID3

30

VID4

22

ISEN1

18

ISEN2

17

ISEN3

23

ISEN4

6

COMP

27

EN

ISL6559CR

74.06559.073

TC4

TC4 SE100U25VM-1-U

SE100U25VM-1-U

79.10712.6I1

12

C68

SCD1U50V3ZY

DY

ISL6559_UG1 ISL6559_PHASE_1

12

C18

C18 SCD01U50V3KX

SCD01U50V3KX

DCBATOUT_ISL

ISL6559_FB

7

FB

9

IDROOP

10

VDIFF

V_RMSEN+

11

VSEN

12

RGND

ISL6559_PWM1

21

PWM1

ISL6559_PWM2

20

PWM2

ISL6559_PWM3_1

16

PWM3

24

PWM4

ISL6559_DIS

26

FS/DIS

25

PGOOD

13

NC4NC8NC

1 2

R577

R577 0R2-0

0R2-0

SCD1U50V3ZY

ISL6559_LG_1

12

31

12

R34

R34 DUMMY-R3

DUMMY-R3

GND GND GND GND GND

VRM_PWRGD21,39

DCBATOUT_ISL

C582

3D3V_S0

14 19 28 33

VCORE_EN 39

TABLE 1. VOLTAGE IDENTIFICATION CODES VID4 VID3 VID2 VID1 VID0 DAC 0 0 0 0 0 1.550 0 0 0 0 1 1.525 0 0 0 1 0 1.500 0 0 0 1 1 1.475 0 0 1 0 0 1.450 0 0 1 0 1 1.425 0 0 1 1 0 1.400 0 0 1 1 1 1.375 0 1 0 0 0 1.350 0 1 0 0 1 1.325 0 1 0 1 0 1.300 0 1 0 1 1 1.275 0 1 1 0 0 1.250 0 1 1 0 1 1.225 0 1 1 1 0 1.200 0 1 1 1 1 1.175 1 0 0 0 0 1.150 1 0 0 0 1 1.125 1 0 0 1 0 1.100 1 0 0 1 1 1.075 1 0 1 0 0 1.050 1 0 1 0 1 1.025 1 0 1 1 0 1.000 1 0 1 1 1 0.975 1 1 0 0 0 0.950 1 1 0 0 1 0.925 1 1 0 1 0 0.900 1 1 0 1 1 0.875 1 1 1 0 0 0.850 1 1 1 0 1 0.825 1 1 1 1 0 0.800 1 1 1 1 1 Shutdown

567

8

DDD

D

U12

SI7392DP

84.07392.037

SSS

G

SSS

G

123

4

567

8

DDD

D

U9

SI7636DP

84.07636.037

SSS

G

SSS

G

123

4

COREFB#6

Remote Sense Tie to CPU

12

R574

R574 10KR3

10KR3

12

C246

C246 SC1U10V3KX

SC1U10V3KX

B

COREFB6

1 2

5V_S0

12

R575

R575 107KR3F

107KR3F

567

8

DDD

D

U57

U57 SI7392DP

SI7392DP

84.07392.037

Power-PAK

SSS

G

SSS

G

Id=7A

123

4

Qg=10~15nC Rdson=13~16.5mohm

567

8

DDD

D

U55

SI7636DP

84.07636.037

SSS

G

SSS

G

123

4

Power-PAK Id=13A Qg=32~50nC Rdson=4~4.8mohm

B

R580

51R3

12

1 2

VCC_CORE_S0

V_RMSEN-

R572

R572 51R3

51R3

1 2

R576

DUMMY-R3

R581

DUMMY-R3

C611 SC10U35V0ZY-U

DY

C595 SC10U35V0ZY-UC595 SC10U35V0ZY-U

C610 SC10U35V0ZY-UC610 SC10U35V0ZY-U

C620

DUMMY-C3

D26

D26 SSM54-U

SSM54-U

DY

2 1

83.5R004.A8M

BOOT_2

1 2

DY

63.2R234.151

ISL6559_PWM3

12

R507

R507 499KR3F

499KR3F

DY

DCR=1.3mohm+-10% / Imax=40A / Panasonic / ETQP2H0R7BF / 0.48uH /

13.4*13.3*4.9

NC1

NC2

L4

R565

R565 2KR3F

2KR3F

ISEN1

VCC_CORE_S0

2

1

L-D48UH-UL4L-D48UH-U

12

C

Rt=10^[11.09-1.13log(fs)] Rt=107K,=>fs=230KHz But real freq.=270KHz

Follow MOSFET rise time spec.

BOOT_2#

R520

R520 2D2R3

2D2R3

1 2

U65

1

UGATE

2

BOOT

3

PWM

4

GND

ISL6207CB-U

74.06207.071

DY

C

5V_S0

12

ISL6559_UG2 ISL6559_PHASE_2

ISL6559_LG_2

12

C732

SCD01U50V3KX

78.10324.2B1

78.10324.2B1 DY

DY

1 2

ISL6559_PWM3_1

ISL6559_PWM2

PHASE

LGATE

VCC

EN

5V_S0

8 7 6 5

G90

G33

1 2

GAP-OPEN-PWR

G28

1 2

GAP-OPEN-PWR

G27

1 2

GAP-OPEN-PWR

G89

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

12

ISL6207_EN2

R536

R536 0R3-U

0R3-U

DY

C733

C733 SC1U10V3KX

SC1U10V3KX

C708

C708 SCD22U16V3KX-1

SCD22U16V3KX-1

DY

DCBATOUT DCBATOUT_ISL

R573

R573 0R3-U

0R3-U

R562

DUMMY-R3

ISL6559_PWM2 42

C125

C125 SCD1U50V3ZY

SCD1U50V3ZY

12

R535

R535 DUMMY-R3

DUMMY-R3

D

SB

ISL6559_PWM3

12

C637

C637 SCD1U50V3ZY

SCD1U50V3ZY

78.10494.4B1

78.10494.4B1 DY

DY

D

53A*1.5=79.5A (OCP),=>79.5A/2Phase=39.75A/Phase 90uA*Rsense=39.75A*(6.5m/2)*1.4 =>Rsense=2.0K

DCBATOUT_ISL

U15

U15 SI7392DP

SI7392DP

84.07392.037

84.07392.037 DY

DY

U18

U18 SI7636DP

SI7636DP

84.07636.037

84.07636.037 DY

DY

80.3371V.191

ST330U2D5VDM-3

D

Q34

Q34 2N7002

2N7002

D

Q35

Q35 2N7002

2N7002

D

Q36

Q36 2N7002

2N7002

D

Q33

Q33 2N7002

2N7002

D

Q12

Q12 2N7002

2N7002

8

G

4

8

G

4

12

TC18

80.3371V.191

ST330U2D5VDM-3

VID0

VID1

VID2

VID3

VID4

567

8

DDD

D

SSS

G

SSS

G

123

4

567

8

DDD

D

SSS

G

SSS

G

123

4

VCC_CORE_S0

12

TC13

TC15

80.3371V.191

ST330U2D5VDM-3

Main Source: KEMET 2D5V/ 330uF / ESR=9mohm / Iripple=3.7A / ST330U2D5VDM-3

80.3371V.191/ 7.3*4.3*1.9 / NT$:9.5 2'nd Source: Panasonic 2V/ 330uF / ESR=9mohm / Iripple=3.0A/ SE330U2VDM-2

79.33719.20A/ 7.3*4.3*1.9 / NT$:10.0

S

VID0_PWM

2 3

G

1

S

VID1_PWM

2 3

G

1

S

VID2_PWM

2 3

G

1

S

VID3_PWM

2 3

G

1

S

VID4_PWM

2 3

G

1

1 2

DY

78.10699.4A1

1 2

567

DDD

D

U63

U63 SI7392DP

SI7392DP

DY

Power-PAK

SSS

Id=7A

123

Qg=10~15nC Rdson=13~16.5mohm

567

DDD

D

U64

U64 SI7636DP

SI7636DP

DY

SSS

Power-PAK

123

Id=13A Qg=32~50nC Rdson=4~4.8mohm

12

TC11

TC12

80.3371V.191

ST330U2D5VDM-3

C237

C237 SC10U35V0ZY-U

SC10U35V0ZY-U

C102

C102 SC10U35V0ZY-U

SC10U35V0ZY-U

C619

C619 SC10U35V0ZY-U

SC10U35V0ZY-U

C621

DUMMY-C3

D3

83.5R004.A8M

SSM54-U

DY

2 1

BSC059N03S-U (84.59N03.037) BSC042N03S-U (84.42N03.037)

2'nd Source: H/S:SI7392DP (84.07392.037) L/S:SI7636DP (84.07636.037)

12

TC10

TC16

80.3371V.191

ST330U2D5VDM-3

DY

12VGATE_S0 38

VID0_PWM

1 2

VID1_PWM

1 2

VID2_PWM

1 2

VID3_PWM

1 2

VID4_PWM

1 2

Title

Size Document Number Rev

A2

Date: Sheet

E

C216/C201/C140 Can not stuff!

DCR=1.3mohm+-10% / Imax=40A / Panasonic / ETQP2H0R7BF / 0.48uH /

13.4*13.3*4.9

NC1

L6

1

L-D48UH-UL6L-D48UH-U

12

TC19

80.3371V.191

ST330U2D5VDM-3

DY

R194

DUMMY-R3

R195

DUMMY-R3

R196

DUMMY-R3

R184

DUMMY-R3

R582

DUMMY-R3

VCC_CORE_S0

NC2

2

R563

R563 2KR3F

2KR3F

64.20015.651

64.20015.651 DY

DY

ISEN3

12

TC14

80.3371V.191

ST330U2D5VDM-3

DY

VID0

VID1

VID2

VID3

VID4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU Vcore Power_1

SNIPE

E

TC17

80.3371V.191

ST330U2D5VDM-3

SA

of

41 56Thursday, November 18, 2004

A

4 4

SB Version: Change U68 from ISL6209CB (74.06209.071) to ISL6207CB-U (74.06207.071)

Follow MOSFET rise time spec.

R566

BOOT_3#BOOT_3

1 2

2D2R3

U70

1

UGATE

2

ISL6559_PWM241

3 3

ISL6559_PWM2

12

R579

R579 499KR3F

499KR3F

BOOT

3

PWM

4

GND

ISL6207CB-U

74.06207.071

1 2

SCD22U16V3KX-1

C788

PHASE

VCC

LGATE

B

DCBATOUT_ISL

567

8

DDD

D

12

5V_S0

8 7

EN

6 5

12

ISL6207_EN3

R560

R560 0R3-U

0R3-U

C236

C236 SC1U10V3KX

SC1U10V3KX

SCD1U50V3ZY

ISL6559_UG3 ISL6559_PHASE_3

12

C785

SCD01U50V3KX

C166

DY

SCD1U50V3ZY

ISL6559_LG_3

12

R556

R556 DUMMY-R3

DUMMY-R3

12

C761

D

SSS

G

SSS

G

123

4

567

8

DDD

D

SSS

G

SSS

G

123

4

U24

SI7392DP

84.07392.037

U67

SI7636DP

84.07636.037

C

C789

1 2

SC10U35V0ZY-U

DY

C229

1 2

567

8

DDD

D

U69

U69 SI7392DP

SI7392DP

84.07392.037

Power-PAK

SSS

G

SSS

G

Id=7A

123

4

Qg=10~15nC Rdson=13~16.5mohm

567

8

DDD

D

U22

SI7636DP

84.07636.037

SSS

G

SSS

G

Power-PAK

123

4

Id=13A Qg=32~50nC Rdson=4~4.8mohm

DUMMY-C3

2 1

DCR=1.3mohm+-10% / Imax=40A / Panasonic / ETQP2H0R7BF / 0.48uH / 13.4*13.3*4.9

NC1

NC2

L7

1

2

L-D48UH-U

12

R564

D29

D29 SSM54-U

SSM54-U

DY

R564 2KR3F

2KR3F

ISEN2

D

VCC_CORE_S0

ISEN2 41

E

2 2

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

A

B

C

D

Date: Sheet

CPU Vcore Power_2

SNIPE

42 56Thursday, November 18, 2004

E

SA

of

SA

A

SYSTEM DC/DC

G104

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

12

TC24

ST150U6D3VDM-9

80.15715.191

12

R271

R271 100KR3

100KR3

MAX1999_SKIP

G104

G111

G113

G112

G115

G114

12

A

3D3V_S5

DCBATOUT_MAX1999

12

C855

SCD1U50V5ZYDY

C854

C854 SC10U35V0ZY-U

SC10U35V0ZY-U

C347

C347 SC100P50V2JN

SC100P50V2JN

12

R242

R242 6K65R3F

6K65R3F

12

R236

R236 10K2R3F

10K2R3F

SCD1U50V5ZYDY

SSS

123

L27

1 2

IND-6D8UH-14

68.6R810.10A

Imax=6.0A, DCR=25mohm 12*12*3.9

678

DDD

GD

4 5

12

Ton = VCC : 200KHz/300KHz Ton = GND : 400KHz/500KHz (5V/3D3V)

MAX1999_VCCMAX1999_VCC

U93

2N7002DW

1

2

3 4

6

5

PM_SLP_S3# 18,21,34,38,39,44,55

DCBATOUT_MAX1999

678

SSS

123

U82

U82 AO4422

AO4422

84.04422.037

NC,SO-8 Id=9.3A Rdson=19.6~24mohm

C392

C392 SC47P50V2JN

SC47P50V2JN

MAX1999_LX3_1

R261

R261 2MR3

2MR3

DY

MAX1999_REF

12

R281

R281 100KR3

100KR3

3D3V_S5/5V_S5

4 4

3D3V_DC_S5

3 3

Iomax=4.0A OCP:8A~9.5A

3D3V_DC_S5

12

C876

DUMMY-C3

KEMET, NT=6.6 ST150U6D3VDM-9

80.15715.191 ESR=40mohm Iripple=1.7A

2 2

1 1

7.3/4.3/1.9

B

DCBATOUT DCBATOUT_MAX1999

R249

1 2

4D7R5

DDD

U88

U88 AO4422

AO4422

84.04422.037

NC,SO-8

GD

Id=9.3A Rdson=19.6~24mohm

4 5

300KR3

MAX1999_DH3

MAX1999_LX3

MAX1999_DL3

MAX1999_FB3

MAX1999_VCC

12

C881

SCD22U16V3ZY

MAX1999_ON5

MAX1999_SD_3

12

B

G70

G67

1 2

GAP-OPEN-PWR

G65

1 2

GAP-OPEN-PWR

G66

1 2

GAP-OPEN-PWR

G60

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

DCBATOUT_MAX1999_1

SC1U25V5ZY

12

R672

R284

1 2

DUMMY-R3

12

R687

R687 DUMMY-R3

DUMMY-R3

MAX1999_ILIM5_3

R241

1 2

0R3-U

0R3-U R240

R240

1 2

0R3-U

C346

C346 SC4D7U10V5ZY

SC4D7U10V5ZY

DY

12

C400

MAX1999_BST3

12

C874

R661

SCD1U

GAP-CLOSE-PWR

1 2

MAX1999_BST3_1 MAX1999_BST5_1

MAX1999_SD_3

MAX1999_ON5

MAX1999_SHDN#

R283

1 2

MAX1999_SKIP#

MAX1999_LDO5

MAX1999_TON

10KR3

12

R647

R647 100KR3

100KR3

Q32_DMAX1999_SKIP#

Q40

D

1

G

S

2 3

2N7002

C393

SCD1U

28

26

27

24

22

7

3 4

6

13

8

12

BST3

DH3

LX3

DL3

OUT3

FB3

ON3 ON5

SHDN#

TON

REF

SKIP#

TP112

TPAD30

R648

R648 100KR3

100KR3

C

MAX1999_LDO5 MAX1999_VCC

R688

1 2

10R3

3

D38

D38 BAW56

BAW56

2

1

U39

20

V+

PGOOD

LDO3

MAX1999EEI

25

LDO5

18

OCP Setting

12

C357

SC1U25V5ZY

S5PWR_ENABLE 23,44

12

C401

SC1U25V5ZY

C

C882

1 2

SC1U10V3KX

MAX1999_BST5

1 2

12

R273

1 2

100KR3

12

R274

20KR3F

MAX1999_ILIM5_3

SC: 3.3V R186=>20KR3F OCP: Main Source Adapter=10.6A Battery=10.4A Second Source Adapter=9.4A Battery=9.2A

MAX1999_ILIM3

R244

R244 10KR3F

10KR3F

R699

17

GAP-CLOSE-PWR

VCC

14

BST5

16

DH5

15

LX5

19

DL5

21

OUT5

9

FB5

10

PRO#

1

NC

11

ILIM5

5

ILIM3

2

23

GND

30mA MAX.30mA MAX.

MAX1999_ILIM5

12

R282

R282 10KR3F

10KR3F

MAX1999_DH5

MAX1999_LX5

MAX1999_DL5

MAX1999_FB5

MAX1999_PRO#

MAX1999_ILIM5

MAX1999_ILIM3

MAX1999_PGD

R243

8K66R3F

MAX1999_LDO53D3V_AUX_S5

Adjust 3V/5V current limit

C892

C892 SCD1U

SCD1U

DY R673

DY

R673

1 2

10KR3

GAP-CLOSE-PWR

D

678

SC4D7U25V6KX

DDD

SSS

GD

SSS

GD

123

4 5

NC,SO-8 Id=9.3A Rdson=19.6~24mohm

678

DDD

SSS

GD

SSS

GD

123

4 5

NC,SO-8 Id=9.6A Rdson=13.5~16.5mohm

MAX1999_LDO5

Open Drian

R272

1 2

SC: 5V R214=>40K2R3F OCP: Main Source Adapter=12.6A Battery=11.6A Second Source Adapter=16.4A Battery=14.4A

D

78.47522.521

C893

DY

U89

U89 AO4422

AO4422

84.04422.037

U95

U95 AO4406

AO4406

84.04406.037

MAX1999_VCC

E

G116

G117

1 2

GAP-OPEN-PWR

G119

1 2

GAP-OPEN-PWR

G118

1 2

GAP-OPEN-PWR

G120

1 2

GAP-OPEN-PWR

G75

1 2

GAP-OPEN-PWR

G76

DCBATOUT_MAX1999

12

C894

C894 SC10U35V0ZY-U

SC10U35V0ZY-U

C895

C895 SCD1U

SCD1U

1 2

GAP-OPEN-PWR

G71

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

Iomax=6A

Imax=6.0A,

L30

1 2

IND-6D8UH-14

68.6R810.10A

12

C391

C391 SC47P50V2JN

SC47P50V2JN

MAX1999_LX5_1

12

R260

R260 2MR3

2MR3

DY

Title

Size Document Number Rev

A3

Date: Sheet

DCR=25mohm 12*12*3.9

12

R300

15KR3F

MAX1999_FB5

12

R301

R301 9K76R3F

9K76R3F

5V_UP_S5/3D3V_S5/5V_S5

SNIPE

OCP:12~14A

5V_DC_S5

E

C382

SCD1U

12

43 56Thursday, November 18, 2004

TC26

TC26 ST220U6D3VDM-4

ST220U6D3VDM-4

80.22715.191

KEMET, NT:8.5 ESR=25mohm Iripple=2.2A

7.3/4.3/1.9

12

of

12

C875

C875 DUMMY-C3

DUMMY-C3

C424

C424 SC100P50V2JN

SC100P50V2JN

MAX1999_SHDN#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12

R248

100KR3

5V_S55V_DC_S5

SA

5

A

,

For 1.8V SETTING=1.8275V

R304

1 2

10KR2F-U

D D

63.20234.151

SC3900P50V3KX

For 2.5V SETTING=2.516V

R314

1 2

10KR2F-U

63.20234.151

SC3900P50V3KX

C923

C930

R727

2KR3

R734

2KR3

12

R726

1 2

680R3F

5130_INV3

5130_FB3

R735

1 2

330R2F

5130_INV1

5130_FB1

1 2

SC5600P50V3KX

R303

1 2

11K5R3F

close to IC

1 2

SC5600P50V3KX

R312

1 2

19K6R3F

close to IC

C906

78.56224.2B1

C931

78.56224.2B1

1D8V_PWR

2D5V_PWR

C C

T(soft)=1.736ms

U45

12

C465

C465 SC4700P50V3KX

SC4700P50V3KX

U44

3 4

2

1

2N7002DW

84.27002.03F

5

6

2N7002DW

84.27002.03F

5

6

1 2

63.R0034.1D1

DY

R306

R306 0R2-0

0R2-0

PM_SLP_S5#

34,38

R309

100KR2

1D2V_S0_EN39

S5PWR_ENABLE23,43

B B

5V_AUX_S5

R320

1 2

100KR2

PM_SLP_S3#,34,38,39,43,55

TPS5130_1D5V_EN#

12

PM_SLP_S3#

5130_SS_STBY2

1D2V_S0_EN

S5PWR_ENABLE

SC4700P50V3KX

5130_SS_STBY1

34

1D2V_S0_EN

2

1

PM_SLP_S3# 5130_PWMSEL

5130_SS_STBY3

12

C922

C922 SC4700P50V3KX

SC4700P50V3KX

78.47224.2B1

5130_STBY_LDO

12

R305

R305 0R2-0

0R2-0

4

TI TPS5130 for 2.5V, 1.2V, 1.8V

Vo=(R1*0.85)/R2+0.85

(2D5V=>CH1 , 1D2V=>CH2 , 1D8V =>CH3)

For 1.2V

SC3900P50V3KX

C466

1 2

R308

1 2

DUMMY-R2

ZZ.DUMMY.X02

DCBATOUT_5130

S5PWR_ENABLE

SETTING=1.2172V

R311

1 2

10KR2F-U

63.20234.151

12

R732

2KR3

12

C928

5130_3D3V_LDO

12

R307

R307 100KR2

100KR2

R731

1 2

100KR2

12

1 2

5130_INV2

5130_FB2

5130_FLT

C916

C916 SCD01U16V2KX

SCD01U16V2KX

5130_FB1 5130_SS_STBY1 5130_INV2 5130_FB2 5130_SS_STBY2

5130_CT

5130_REF

STBY_REF 5130_STBY_LDO

5130_CT

12

SC47P50V2JN

78.47034.1F1

5130_REF

12

C927

C927 SCD1U

SCD1U

R733

330R2F

C924

1 2

SC5600P50V3KX

78.56224.2B1

R310

1 2

4K32R3F

close to IC

C929

5130_FLT 5130_INV1

1

FB1

2

SS_STBY1

3

INV2

4

FB2

5

SS_STBY2

6

PWM_SEL

7

CT

8

GND

9

REF

10

STBY_VREF5

11

STBY_VREF3.3

12

STBY_LDO

5130_SS_STBY3 5130_FB3 5130_INV3

5V_S0

12

R298

R298 10KR2

10KR2

1 2

3

1D2V_PWR

5130_5V_LDO

1

2

D39

D39 BAT54-1

BAT54-1

83.00054.L03

3

5130_LH1

SCD1U50V3KX

48

46

47

44

45

LL1

FLT

LH1

INV1

OUT1_U

TPS5130

FB3

INV3

SS_STBY3

PGOUT16PG_DELAY

14

15

13

17

R299

R299 0R2-0

0R2-0

5130_PG_DELAY

12

C907

1 2

18

5130_LL1

5130_OUT1U 5130_OUT1D

5130_TRIP1

5130_TRIP2

5130_OUT2D

38

40

37

39

TRIP141TRIP2

OUT1_D43OUT2_D

OUTGND142OUTGND2

VIN_SENSE12

LH3

LL3

OUT3_D

OUT3_U

VIN_SENSE3

20

22

23

21

24

19

5130_LH3

3

D37

BAT54-1

83.00054.L03

5130_TRIP3

C428

DUMMY-C3

ZZ.DUMMY.XC3

OUTGND3

5130_OUT3D 5130_LL3 5130_OUT3U

TRIP3

5130_LL1 45

5130_OUT1U 45 5130_OUT1D 45

DCBATOUT_5130

U94

36

LL2

35

OUT2_U

34

LH2

33

VIN

32

VREF3.3

31

VREF5

30

REG5V_IN

29

LDO_IN

28

LDO_CUR

LDO_OUT

INV_LDO

1

2

27 26 25

TPS5130PT-U

5130_5V_LDO

DCBATOUT_5130

LDO_GATE

1 2

C885 SCD1U50V3KXC885 SCD1U50V3KX

5130_5V_LDO

1

2

D36

D36 BAT54-1

BAT54-1

83.00054.L03

3

5130_OUT2D 45

5130_LH2

5130_OUT2U

5130_REGIN

R685 0R5J-1R685 0R5J-1

LDO SETTING

5130_OUT3D 45

5130_OUT3U 45

5130_LL3 45

C879

1 2

SCD1U50V3KX

close to IC

1 2

2

5130_TRIP1

5130_TRIP2

5130_TRIP3

5130_LL2

DCBATOUT_5130

5130_OUT2U 45

5130_3D3V_LDO

1

2D5V_OCP

R705

1 2

C890

28K7R3F

1 2

SCD1U

close to IC

1D2V_OCP

R698

1 2

C886

22K1R3F

1 2

SCD1U

close to IC

1D8V_OCP

R704

1 2

C889

22K1R3F

1 2

SCD1U

close to IC

5130_LL2 45

C395

1 2

SCD1U50V3KX

5V_S5

DCBATOUT_5130

OCP 12A=>R225=18K 18A=>R225=28K

DCBATOUT_5130

OCP

8.4A=>R226=13K 10A=>R226=22K

DCBATOUT_5130

OCP

8.4A=>R229=12.65K 10A=>R229=22K

5130_5V_LDO

12

C394

C394 SC4D7U10V5ZY

SC4D7U10V5ZY

78.47593.411

Condition Voltage

PWM_SEL

H : Auto PWM/SKIP 2.2V(Min)~

*

L : PWM fixed (300KHz) ~0.3V(Max)

Title

TI TPS5130 2D5V/1D2V/1D8V (1/2)

Size Document Number Rev

A3

Date: Sheet

DCBATOUT DCBATOUT_5130

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

5130_3D3V_LDO

12

C406

C406 SC4D7U10V5ZY

SC4D7U10V5ZY

78.47593.411

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SNIPE

G57

G56

G61

G62

G69

G68

G121

GAP-CLOSE

ZZ.CON2C.XX1

44 56Thursday, November 18, 2004

SA

of

A

5

A

4

3

2

1

TI TPS5130 for 2D5V, 1D2V, 1D8V

(2D5V=>CH1 , 1D2V=>CH2 , 1D8V =>CH3)

DCBATOUT_5130

D D

678

DDD

U43

AO4422

Imax=9.3A

SSS

GD

SSS

GD

Rdson=19.6~24mohm

123

5130_OUT1U44 5130_LL144

C C

5130_OUT1D44

5130_OUT2U44 5130_LL244

5130_OUT1U 5130_LL1

5130_OUT1D

5130_OUT2U

5130_LL2

B B

5130_OUT2D44

5130_OUT3U44 5130_LL344

5130_OUT3D44

5130_OUT2D

5130_OUT3U

5130_LL3

5130_OUT3D

4 5

U46

AO4406

GD

4 5

U86

AO4422

GD

4 5

U81

AO4422

GD

4 5

U37

AO4422

GD

4 5

U36

AO4422

GD

4 5

678

DDD

Imax=9.6A

SSS

Rdson=13.5~16.5mohm

123

678

DDD

Imax=9.3A

SSS

Rdson=19.6~24mohm

123

678

DDD

Imax=9.3A Rdson=19.6~24mohm

SSS

123

678

DDD

Imax=9.3A

SSS

Rdson=19.6~24mohm

123

678

DDD

Imax=9.3A

SSS

Rdson=19.6~24mohm

123

12

C429

C429 SCD1U

SCD1U

L32

1 2

IND-2D2UH-16

Imax=9A DCR=12mOhm 12*12*4.0

12

C853

C853 SCD1U

SCD1U

L26

1 2

IND-3D3UH-18

Imax=6A DCR=13mOhm 10*10*4.0

12

C374

C374 SCD1U

SCD1U

L25

1 2

IND-4D7UH-25

Imax=6A DCR=25mOhm 10*10*4.0

12

TC25

TC25 ST220U4VDM-L3

ST220U4VDM-L3

KEMET, NTD:6.5 (Q1) ESR=40mohm Iripple=1.7A

7.3*4.3*1.2

12

2D5V_PWR

12

DCBATOUT_5130

12

1D2V_PWR

12

DCBATOUT_5130

12

1D8V_PWR

12

C396

C396 SC10U35V0ZY-U

SC10U35V0ZY-U

2D5V Iomax=9A OCP>18A

TC29

TC29 ST330U6D3VDM-7

ST330U6D3VDM-7

KEMET, NTD:10.5 (Q1) ESR=25mohm Iripple=2.2A

7.3*4.3*1.9

C860

C860 SC10U35V0ZY-U

SC10U35V0ZY-U

1D2V Iomax=5A OCP>10A

TC5

TC5 ST220U4VDM-10

ST220U4VDM-10

KEMET, NTD:7.8 (Q1) ESR=25mohm Iripple=2.2A

7.3*4.3*1.9

C354

C354 SC10U35V0ZY-U

SC10U35V0ZY-U

1D8V Iomax=5A OCP>10A

TC23

TC23 ST220U4VDM-10

ST220U4VDM-10

KEMET, NTD:7.8 (Q1) ESR=25mohm Iripple=2.2A

7.3*4.3*1.9

2D5V_PWR 2D5V_S3

1D2V_PWR 1D2V_S0

G72

1 2

GAP-OPEN-PWR

G73

1 2

GAP-OPEN-PWR

G74

1 2

GAP-OPEN-PWR

G77

1 2

GAP-OPEN-PWR

G78

1 2

GAP-OPEN-PWR

G81

1 2

GAP-OPEN-PWR

G80

1 2

GAP-OPEN-PWR

G79

G83

1 2

GAP-OPEN-PWR

G82

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

G42

1 2

GAP-OPEN-PWR

G43

1 2

GAP-OPEN-PWR

G53

1 2

GAP-OPEN-PWR

G52

G51

1 2

GAP-OPEN-PWR

G55

1 2

GAP-OPEN-PWR

G54

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

G44

1 2

GAP-OPEN-PWR

G45

1 2

GAP-OPEN-PWR

G46

1 2

GAP-OPEN-PWR

G47

1 2

GAP-OPEN-PWR

G48

1 2

GAP-OPEN-PWR

G49

1 2

GAP-OPEN-PWR

G50

1 2

GAP-OPEN-PWR

1D8V_S51D8V_PWR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

TI TPS5130 2D5V/1D2V/1D8V (2/2)

A3

SNIPE

of

45 56Thursday, November 18, 2004

SA

A

B

C

D

E

5V_AUX_S5

1 2

U35

12

C858

C867

C867 SCD1U

4 4

3 3

SCD1U

C858 SC10U10V5ZY

SC10U10V5ZY

DY

U35

1

OUT

2

SENSE

3

SD

4

GND

LP2951ACM

5/17 power team change

C870

C870 SC330P50V2KX

SC330P50V2KX

INPUT

5V/TAP

100mA

ERROR

LP2951ACM_FB

8 7

FB

6 5

DCBATOUT

12

C427

C427 SC1U50V5ZY

SC1U50V5ZY

78.10594.411

78.10594.411 DY

DY

2D5V_S3

G63

GAP-OPEN-PWR

12

C344

C344 SC22U10V6ZY-U

SC22U10V6ZY-U

78.22693.421

G63

1 2

G58

1 2

G59

1 2

G64

1 2

1D25V_S31D25V_LDO

Trace Length=1cm (500mils) Trace Width=8mils Trace Resistance>25mohm

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

1D2V_LDO/5V_AUX

Size Document Number Rev

A3

Date: Sheet of

C

D

Date: Sheet

SNIPE

of

46 56Thursday, November 18, 2004

E

SA

12

C398

C398 SC10U10V5ZY

SC10U10V5ZY

78.10693.411

2 2

1 1

A

12

C397

C397 SC10U10V5ZY

SC10U10V5ZY

78.10693.411

78.10693.411 DY

DY

2D5V_S3

12

R259

R259 1KR3F

1KR3F

APL5331_1D25V_VREF

12

R258

R258 1KR3F

1KR3F

5V_S5

NC NC

B

1D25V_S3 Iomax=1.5A

Vo(cal.)=1.250V

4

8 7 5

12

TC6

TC6 ST100U4VBM-1

ST100U4VBM-1

KEMET 100uF / 4V / B2 Size / NTD:5.615 Iripple=1.1A / ESR=70mohm

12

C375

C375 SCD1U

SCD1U

U38

VIN1VOUT

3

VREF

12

C389

C389 SCD1U

SCD1U

VCNTL6NC

2

GND

9

GND

APL5331KAC-TR

SO-8-P

AD+

12

DY

AC_IN Threshold 2.089V Max. AC_IN > 2.089V --> AC DETECT

ACOK is 17.8V

3D3V_AUX_S5

12

R205

R205 100KR3

100KR3

CHG_ON#34

From KBC

AD_IA34

1 2

12

C845

C844

SC1000P50V2KX

DY

AD+

D

Q13

1

2N7002

G

S

2 3

G99

GAP-CLOSE-PWR

R599

R599 10KR3F

10KR3F

MAX1909_REF

12

R612

R612 100KR3F

100KR3F

MAX1909_ACIN

12

R617

R617 13K3R3F

13K3R3F

D33

21

CH521S-30

12

C840

C840 SCD1U25V3KX

SCD1U25V3KX

MAX1909_LDO

12

R600

R600 46K4R3F

46K4R3F

R601

R601 42K2R3F

42K2R3F

Icharge=2.794A

CELL is 4 Cell

From Battery Connector

12

R603

R603 10KR3

10KR3

12

C823

12

C825

SCD1U16V3KX

AC_IN#34

C825

SCD1U16V3KX

MAX1909_ACOK

12

C289

C289 SC1U10V3KX

SC1U10V3KX

U79

D

8

D

7

D

6

AO4407

R609

R609 100KR3

100KR3

12

C824

SCD01U50V3KX

MAX1909_LDO

12

S

1

S

2

S

3

GD

45

R602

R602 100KR3

100KR3

MAX1909_CCV

MAX1909_CCI

MAX1909_CCS

12

C831

SCD01U50V3KX

R210

R210 31K6R3F

31K6R3F

R211

R211 49K9R3F

49K9R3F

12

Close to MAX1909 pin 24

MAX1909_PDS AD+_TO_SYS MAX1909_DC_IN

MAX1909_VCTL MAX1909_ICTL MAX1909_MODE

MAX1909_IINP

MAX1909_CLS

MAX1909_ACOK

PKPRES#

AD+_TO_SYS

C850

C850 SC1U50V5ZY

SC1U50V5ZY

GAP-CLOSE-PWR

12

C841

C841 SCD1U

SCD1U

U77

27

PDS

24

SRC

1

DCIN

11

VCTL

10

ICTL

7

MODE

3

ACIN

8

IINP

9

CLS

6

ACOK

5

PKPRES

13

CCV

12

CCI

14

CCS

MAX1909ETI

1 2

D01R2512F-1

G102

1 2

26

CSSP

MAX1909_REF

12

C832

C832 SC1U10V3KX

SC1U10V3KX

R635

G103

GAP-CLOSE-PWR

1 2

25

CSSN

DHIV

DLOV

PGND

CSIP

CSIN

BATT

PDL LDO

DLO

GND

DHI

AD+_TO_SYS

22 28 2

MAX1909_DLOV

21

MAX1909_DHI

23

MAX1909_DLO

20

19

29

18

17 16 15

12

C842

C842 SCD1U

SCD1U

REF

4

V_REF :4.2235V (<500uA)

12

R608

R608 41K2R3F

41K2R3F

MAX1909_CLS

12

R607

R607 95K3R3F

95K3R3F

ISOURCE_MAX = (0.075/R557)*(VCLS/VREF) TOTAL_POWER : Adapter=135W,Total_Power=105W, R572=196K Adapter=90W, Total_Power=80W, R572=46.4K

12

C843

C843 SCD1U25V3KX

SCD1U25V3KX

MAX1909_DHIV

DCBATOUT

For EMI

MAX1909_LDO

G41

1 2

GAP-CLOSE-PWR

12

Near MAX1909 Pin 2

C839

1 2

SC1U10V3KX

12

R620

R620 33R3

33R3

Near MAX1909 Pin 21

12

C837

C837 SC1U10V3KX

SC1U10V3KX

BAT+SENSE 48

C873

C873 SCD1U25V3KX

SCD1U25V3KX

DY

From Battery Connector

MAX1909_PDL

R247

1 2

DUMMY-R3

45

DDDS

678

DDD

GD

4 5

12

R686

R686 DUMMY-R3

DUMMY-R3

123

SSGD

U87

U87 SI4431BDY

SI4431BDY

84.04431.C37

PC Id=4.6A Rdson=36~50mohm

CHG_PWR-2

U85

U85 SI4800BDY

SI4800BDY

84.04800.B37

SSS

123

NC Id=5.0A Rdson=23~30mohm

BT_TH34,48

12

C861

C861 SCD1U

SCD1U

L29

1 2

IND-15UH-19

68.1501T.101

Id=4.0A DCR=40mohm

12.8*12.8*4.0

D35

D35 B220LFA

B220LFA

DY

2 1

U92

S

D

S

1 2 3 4 5

D D

D

D D

D

12

C863

C863 SC10U25V0KX

SC10U25V0KX

CHG_PWR-3

GAP-CLOSE-PWR

12

R226

R226 100KR2

100KR2

8 7 6

D015R2512F-3

1 2

S

S S

S GD

GD

AO4407

AO4407 U91

U91

S

S S

S GD

GD

AO4407

BT+

12

C462

C462 SCD1U

SCD1U

DCBATOUT

12

C862

C862 SC10U25V0KX

SC10U25V0KX

R722

1 2

G101

1 2

GAP-CLOSE-PWR

MAX1909_LDO

12

R219

R219 100KR2

100KR2

PKPRES#

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Date: Sheet

C933

G100

SC10U25V0KX

1 2

U33

5

6

2N7002DW

CHARGER MAX1909

SNIPE

BT+

C932

C891

C891 SC10U25V0KX

SC10U25V0KX

1 2

SC10U25V0KX

DY

3D3V_AUX

12

R225

R225 100KR2

100KR2

34

2

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

47 56Thursday, November 18, 2004

of

SA

A

Adaptor in to generate DCBATOUT

DCIN1

1

4 4

DC-JACK81

3 3

2

3

4

MH1

12

AD_OFF34

AD_JK

C3

C3 SCD1U50V3ZY

SCD1U50V3ZY

12

C6

C6 SCD1U50V3ZY

SCD1U50V3ZY

12

R18

R18 1KR3

1KR3

B

12

R354

100KR3

2

E

B

AD_OFF#_JK

D

Q5

1

2N7002

G

S

2 3

B

1

Q3

PDTA124EU

C

3

12

C521

C521 SCD1U50V3ZY

SCD1U50V3ZY

C

D25

2

1

PZM24NB1

DY

U52

S

D

S

D

S

S S

S GD

GD

AO4407

8

D

7

D

6

ID = -10A/70deg Rds(ON) = 24mohm SO-8

12

C526

C526 SCD1U50V5ZY

SCD1U50V5ZY

12

AD+_2

R362

R362 56KR3F

56KR3F

3

1 2 3 4 5

D

AD+

12

5V_AUX_S5

C527

C527 SCD1U50V5ZY

SCD1U50V5ZY

E

BATTERY CONNECTOR

1

27R3F

2

D14

3

BAV99-2

83.00099.L01

12

DY

1 2

R729

BT_TH

C918

C918 SC1000P50V2KX

SC1000P50V2KX

27R3F

BTSMCLK BTSMDATA

12

C934

C934 SC1000P50V2KX

SC1000P50V2KX

BT+

BAT1

2 4 6

8 10 12 14 16

SPD-CONN16D-7

20.D0091.208

1 3 5 7 9 11 13 15

1

2

DY

D13

3

BAV99-2

83.00099.L01

BT_SCL_534 BT_SDA_534

BT+

2 2

BT_TH34,47

BAT+SENSE47

BT_SCL_5 BT_SDA_5

12

C463

C463 SCD1U50V3ZY

SCD1U50V3ZY

DY

1 2

R730

12

C461

C461 SCD1U50V3ZY

SCD1U50V3ZY

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DC/DC (1/2) -- 5V / 3.3V / 2.5V

Size Document Number Rev

A3

Date: Sheet of

A

B

C

D

Date: Sheet

SNIPE

of

48 56Thursday, November 18, 2004

E

SA

5

U11

12

U11

1

XIN/CLKIN

2

XOUT

3

PD#

4

LF

P2779A-08ST

71.02779.00A

C62

C62 SC270P50V

SC270P50V

ORIGNAL P2779A-08TT USE W180-01 GEOMETRY

VDD REF

MODOUT

VSS

8 7 6 5

XTALIN_M24

12

R46

X1

1MR2

C52

D D

C52 SC6P50V3DN

SC6P50V3DN

12

C51

C51 SC6P50V3DN

SC6P50V3DN

12

C70

C70 SCD01U16V2KX

SCD01U16V2KX

X-27MHZ-7-U

1 2

R50

R50 620R2F

620R2F

adjust SWING at 1.2v

PEG_TXP0

PEG_TXN0

PEG_TXP1

PEG_TXN1

PEG_TXP2

PEG_TXN2

PEG_TXP3

C C

3D3V_S0

12

R132

R132 10KR2

B B

A A

10KR2

STERE0SYNC PWRGD_MASK

12

R131

R131 DUMMY-R2

DUMMY-R2

12

R136

R136 DUMMY-R2

DUMMY-R2

R137

R137 0R2-0

0R2-0

1 2

The PERSTB must deplay 4ms from M24 bug.

ATI_TV_LUMA54 ATI_TV_CRMA54 ATI_TV_COMP54

Place them near to chip

5

PEG_TXN3

PEG_TXP4

PEG_TXN4

PEG_TXP5

PEG_TXN5

PEG_TXP6

PEG_TXN6

PEG_TXP7

PEG_TXN7

PEG_TXP8

PEG_TXN8

PEG_TXP9

PEG_TXN9

PEG_TXP10

PEG_TXN10

PEG_TXP11

PEG_TXN11

PEG_TXP12

PEG_TXN12

PEG_TXP13

PEG_TXN13

PEG_TXP14

PEG_TXN14

PEG_TXP15

PEG_TXN15

12

R111

R111 75R2F

75R2F

C182 SCD1U16VC182 SCD1U16V C183 SCD1U16VC183 SCD1U16V C209 SCD1U16VC209 SCD1U16V C210 SCD1U16VC210 SCD1U16V C184 SCD1U16VC184 SCD1U16V C185 SCD1U16VC185 SCD1U16V C211 SCD1U16VC211 SCD1U16V C212 SCD1U16VC212 SCD1U16V C186 SCD1U16VC186 SCD1U16V C187 SCD1U16VC187 SCD1U16V C213 SCD1U16VC213 SCD1U16V C214 SCD1U16VC214 SCD1U16V C188 SCD1U16VC188 SCD1U16V C189 SCD1U16VC189 SCD1U16V C215 SCD1U16VC215 SCD1U16V C216 SCD1U16VC216 SCD1U16V C190 SCD1U16VC190 SCD1U16V C191 SCD1U16VC191 SCD1U16V C217 SCD1U16VC217 SCD1U16V C218 SCD1U16VC218 SCD1U16V C192 SCD1U16VC192 SCD1U16V C193 SCD1U16VC193 SCD1U16V C219 SCD1U16VC219 SCD1U16V C220 SCD1U16VC220 SCD1U16V C194 SCD1U16VC194 SCD1U16V C195 SCD1U16VC195 SCD1U16V C196 SCD1U16VC196 SCD1U16V C197 SCD1U16VC197 SCD1U16V C198 SCD1U16VC198 SCD1U16V C199 SCD1U16VC199 SCD1U16V C200 SCD1U16VC200 SCD1U16V C201 SCD1U16VC201 SCD1U16V

1D2V_VGA_S0

12

R118

R118 75R2F

75R2F

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

R140 100R2R140 100R2

R539 10KR2R539 10KR2

R110

R110 75R2F

75R2F

3D3V_SS_S0

VGA_GPIO16

1 2 1 2 1 2

1 2

AG_RST#13,34

1 2

VGA_SMB_CLK13,54 VGA_SMB_DAT13,54

1 2 1 2

1 2 1 2 1 2

4

3D3V_S0

GFX_CLK3 GFX_CLK#3

R541

R541 150R2F

150R2F R540

R540 10KR2F-U

10KR2F-U

R521

R521 715R3

715R3

R119

R119 10KR2

10KR2

R525

R525 10KR2

10KR2

R538

R538 1KR2

1KR2

R483

R483 1KR2

1KR2

R474

R474 1KR2

1KR2

4

U17A

PEG_RXP0

PEG_RXN0

PEG_RXP1

PEG_RXN1

PEG_RXP2

PEG_RXN2

PEG_RXP3

R54

R54 0R5J-1

0R5J-1

1 2

12

C74

C74 SCD1U

SCD1U

12

R67

R67 140R3F

140R3F

12

R66

R66 105R3F

105R3F

TP15

TP15 TPAD30

TPAD30

TP97

TP97 TPAD30

TPAD30

PEG_RXN3

PEG_RXP4

PEG_RXN4

PEG_RXP5

PEG_RXN5

PEG_RXP6

PEG_RXN6

PEG_RXP7

PEG_RXN7

PEG_RXP8

PEG_RXN8

PEG_RXP9

PEG_RXN9

PEG_RXP10

PEG_RXN10

PEG_RXP11

PEG_RXN11

PEG_RXP12

PEG_RXN12

PEG_RXP13

PEG_RXN13

PEG_RXP14

PEG_RXN14

PEG_RXP15

PEG_RXN15

PEG_TXP0_VGA

PEG_TXN0_VGA

PEG_TXP1_VGA

PEG_TXN1_VGA

PEG_TXP2_VGA

PEG_TXN2_VGA

PEG_TXP3_VGA

PEG_TXN3_VGA

PEG_TXP4_VGA

PEG_TXN4_VGA

PEG_TXP5_VGA

PEG_TXN5_VGA

PEG_TXP6_VGA

PEG_TXN6_VGA

PEG_TXP7_VGA

PEG_TXN7_VGA

PEG_TXP8_VGA

PEG_TXN8_VGA

PEG_TXP9_VGA

PEG_TXN9_VGA

PEG_TXP10_VGA

PEG_TXN10_VGA

PEG_TXP11_VGA

PEG_TXN11_VGA

PEG_TXP12_VGA

PEG_TXN12_VGA

PEG_TXP13_VGA

PEG_TXN13_VGA

PEG_TXP14_VGA

PEG_TXN14_VGA

PEG_TXP15_VGA

PEG_TXN15_VGA

PCIE_CALP_VGA PCIE_CALN_VGA PCIE_CALI_VGA

PCIE_TESTIN

PWRGD_MASK

VGA_SMB_CLK VGA_SMB_DAT

VGA_SSIN VGA_SSOUT

XTALIN_M24

TESTEN

STERE0SYNC

AH30 AG30 AG29

AF29 AE29 AE30 AD30 AD29 AC29 AB29 AB30 AA30 AA29

Y29 W29 W30

V30

V29

U29

T29

T30

R30

R29

P29

N29

N30

M30 M29

K29

K30

AF26 AE26 AC25 AB25 AC27 AB27 AC26 AB26

Y25

W25

Y27

W27

Y26

W26

U25 T25 U27 T27 U26 T26 P25 N25 P27 N27 P26 N26

K25

K27

K26

AF27 AE27

AC23 AB24 AB23

AE25

AD25 AD24

AH21

AK21

AJ22

AK22

AJ24

AK24

AG22 AG23

AJ23 AH24

AH28

AJ29

AH27

AF25

AH25

L29

J30

L25

L27

L26

E8 B6

U17A

PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N PCIE_RX4P PCIE_RX4N PCIE_RX5P PCIE_RX5N PCIE_RX6P PCIE_RX6N PCIE_RX7P PCIE_RX7N PCIE_RX8P PCIE_RX8N PCIE_RX9P PCIE_RX9N PCIE_RX10P PCIE_RX10N PCIE_RX11P PCIE_RX11N PCIE_RX12P PCIE_RX12N PCIE_RX13P PCIE_RX13N PCIE_RX14P PCIE_RX14N PCIE_RX15P PCIE_RX15N

PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N PCIE_TX4P PCIE_TX4N PCIE_TX5P PCIE_TX5N PCIE_TX6P PCIE_TX6N PCIE_TX7P PCIE_TX7N PCIE_TX8P PCIE_TX8N PCIE_TX9P PCIE_TX9N PCIE_TX10P PCIE_TX10N PCIE_TX11P PCIE_TX11N PCIE_TX12P PCIE_TX12N PCIE_TX13P PCIE_TX13N PCIE_TX14P PCIE_TX14N PCIE_TX15P PCIE_TX15N

PCIE_REFCLKP PCIE_REFCLKN

PCIE_CALRP PCIE_CALRN PCIE_CALI

PCIE_TESTIN

PERSTb PERSTb_MASK

R2SET

Y_G C_R_PR COMP_B_PB

H2SYNC V2SYNC

DDC3CLK DDC3DATA

SSIN SSOUT

XTALIN

XTALOUT

TESTEN TEST_YCLK TEST_MCLK PLLTEST

STEREOSYNC

M26-P-1

3

GPIO0

Part 1 of 6

GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14

GPIO_PWRCNTL

GPIO_MEMSSIN

DVOMODE

DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8

DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13

DVO / EXT TMDS / GPIOTMDSDAC1

DVPDATA_14 DPVDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23

PCI EXPRESS

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2

DVPCNTL_3

VREFG

TXOUT_L0N

TXOUT_L0P

TXOUT_L1N

TXOUT_L1P

TXOUT_L2N

TXOUT_L2P

TXOUT_L3N

TXOUT_L3P

TXCLK_LN TXCLK_LP

TXOUT_U0N

TXOUT_U0P

TXOUT_U1N

TXOUT_U1P

LVDS

TXOUT_U2N

TXOUT_U2P

TXOUT_U3N

TXOUT_U3P

TXCLK_UN TXCLK_UP

DIGON

BLON

TX0M

TX0P

TX1M

TX1P

TX2M

TX2P TXCM TXCP

DDC2CLK

DDC2DATA

HPD1

DAC2

HSYNC VSYNC

RSET

DDC1DATA

DDC1CLK

GPIO_AUXWIN

DPLUS

DMINUS

THERM

3

SS

CLK

R

G

B

AJ5 AH5 AJ4 AK4 AH4 AF4 AJ3 AK3 AH3 AJ2 AH2 AH1 AG3 AG1 AG2 AF3 AF2

AE10

AH6 AJ6 AK6 AH7 AK7 AJ7 AH8 AJ8 AH9 AJ9 AK9 AH10 AE6 AG6 AF6 AE7 AF7 AE8 AG8 AF8 AE9 AF9 AG10 AF10

DVPCNTL0_VGA

AJ10

DVPCNTL1_VGA

AK10

DVPCNTL2_VGA

AJ11

DVPCNTL3_VGA

AH11

AG4

AH15 AH16 AJ16 AJ17 AJ18 AK18 AJ20 AJ21 AK19 AJ19 AG16 AG17 AF16 AF17 AE18 AE19 AF19 AF20 AG19 AG20

AE12 AG12

AK13 AJ13 AJ14 AJ15 AK15 AK16 AJ12 AK12

AE13 AE14

AF12

AK27 AJ27 AJ26

AJ25 AK25

AH26

AG25 AF24

AG24

AF11 AE11

VGA_GPIO0 VGA_GPIO1 VGA_GPIO2 VGA_GPIO3 VGA_GPIO4

VGA_GPIO5 VGA_GPIO6 VGA_GPIO7 VGA_GPIO8 VGA_GPIO9

VGA_GPIO10

VGA_GPIO11

VGA_GPIO12

VGA_GPIO13

VGA_GPIO14

VGA_GPIO15 VGA_GPIO16

VGA_DVOMODE

R737 DUMMY-R2R737 DUMMY-R2

R736 DUMMY-R2R736 DUMMY-R2

R738 DUMMY-R2R738 DUMMY-R2

ATI_TXAOUT3ATI_TXAOUT3+

ATI_TXBOUT3ATI_TXBOUT3+

TMDS_TX0TMDS_TX0+ TMDS_TX1TMDS_TX1+ TMDS_TX2TMDS_TX2+ TMDS_TXCTMDS_TXC+

1 2

DVPDATA_0, 1, 2 0 0 0 64MB Hynix 0 0 1 64MB Samsung 0 1 0 64MB X brand 0 1 1 64MB Y brand 1 0 0 128MB Hynix 1 0 1 128MB Samsung 1 1 0 128MB X brand 1 1 1 128MB Y brand

R96 0R2-0R96 0R2-0

1 2

R97 0R2-0R97 0R2-0

1 2

R99 0R2-0R99 0R2-0

1 2

R100 0R2-0R100 0R2-0

1 2

VGA_VREFG

TP5

TP5 TP4

TP4

TPAD30

TPAD30 TPAD30

TPAD30

1 2

AUXWIN 51

VGA_LOCAL_DP VGA_LOCAL_DN

2

TP3

TP3 TPAD30

TPAD30

MUST TO CHECK

DVOMODE=VSS 3.3V MODE

TP2

TP2 TPAD30

TPAD30

DVOMODE=VDDC to 1.8V 1.8V MODE

DVOMODE=GND NO USE DVPDATA

TP64

TP64 TP1

TP1

TPAD30

TPAD30 TPAD30

TPAD30

R482

R482 0R2-0

0R2-0

1D8V_S0

3D3V_S0

C86

C86 SCD1U16V

SCD1U16V

12

R83

R83 100R3

100R3

12

R79

R79 100R3

100R3

VGA_GPIO0

VGA_GPIO4

VGA_GPIO2

VGA_GPIO3

VGA_GPIO5

R537

12

75R2F

R530

12

75R2F

R529

R529 75R2F

75R2F

Title

Size Document Number Rev

A3

Date: Sheet

1D8V_S0

ATI_TXAOUT0- 54 ATI_TXAOUT0+ 54 ATI_TXAOUT1- 54 ATI_TXAOUT1+ 54 ATI_TXAOUT2- 54 ATI_TXAOUT2+ 54

ATI_TXACLK- 54 ATI_TXACLK+ 54 ATI_TXBOUT0- 54 ATI_TXBOUT0+ 54 ATI_TXBOUT1- 54 ATI_TXBOUT1+ 54 ATI_TXBOUT2- 54

TP89

ATI_TXBOUT2+ 54

TP92

ATI_TXBCLK- 54

TPAD30

ATI_TXBCLK+ 54

TPAD30

ATI_LCDVDD_ON 54 BL_ON 13,34

TMDS_TX0- 15 TMDS_TX0+ 15 TMDS_TX1- 15 TMDS_TX1+ 15 TMDS_TX2- 15 TMDS_TX2+ 15 TMDS_TXC- 15 TMDS_TXC+ 15

DVI_SCL 15 DVI_SDA 15

DVI_HPD 15

ATI_HSYNC 54 ATI_VSYNC 54

R531

R531 499R2F

499R2F

ATI_DDCDATA 54 ATI_DDCCLK 54

R526

R526 10KR2

10KR2

VGA_LOCAL_DP 54 VGA_LOCAL_DN 54

2

12

3D3V_S0

PEG_TXP[15..0]12

PEG_TXN[15..0]12

PEG_RXP[15..0]12

PEG_RXN[15..0]12

STRAPS

PLL_CAL_FORCE_EN

PCIE_MODE(1:0)

CAL_OFF

BYPASS_PLL

ICOMP

DEBUG_ACCESS

ROMIDCFG(3:0)

MULTIFUNC(1:0)

VIP_DEVICE

DWNGR0

ATI Ref. Datasheets(page 3-32) DOC.NO.:CHS-216M24-03

GPIO[0..13] are internal pull-down.

TMDS_TX0- TMDS_TX0+

TMDS_TX1-

TMDS_TX2-

TMDS_TXC-

1 2

ATI_RED 54 ATI_GREEN 54 ATI_BLUE 54

VGA M26 (1/2) PCIE LVDS

SNIPE

GPIO(9,13:11)

LCDDATA(17:16)

LCDDATA(20)

LCDDATA(21)

1 2

R93

R93 10KR2

10KR2 R434

R434 10KR2

10KR2

R92

R92 DUMMY-R2

DUMMY-R2 R84

R84 DUMMY-R2

DUMMY-R2 R435

R435 DUMMY-R2

DUMMY-R2

VGA_GPIO15 VGA_GPIO14 VGA_GPIO11 VGA_GPIO10

VGA_GPIO9 VGA_GPIO6 VGA_GPIO7

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

DEFAULTPIN

GPIO0CAL_BG_BACKUP

GPIO1

GPIO(3:2)

GPIO4

GPIO5

GPIO6

GPIO8

0000

00

(internal pull-down)

R491

R491 330R2

330R2

TMDS_TX1+

R489

R489 330R2

330R2

TMDS_TX2+

R490

R490 330R2

330R2

TMDS_TXC+

R472

R472 330R2

330R2

3D3V_S0

RN69

1 2 3 4 5

SRN10K-2

RN68

1 2 3 4 5

SRN10K-2

of

49 56Thursday, November 18, 2004

1

0

00

0

8 7 6

SA

A

VGA_MEM_S0

12

C629

C676

SCD01U16V2KX

12

C666

C666 SCD01U16V2KX

SCD01U16V2KX

12

C627

C627 SCD01U16V2KX

SCD01U16V2KX

12

C628

C628 SCD01U16V2KX

SCD01U16V2KX

12

C714

C714 SCD01U16V2KX

SCD01U16V2KX

C630

C630 SCD01U16V2KX

SCD01U16V2KX

4 4

VGA_MEM_S0

12

C766

C766 SC1U10V3KX

SC1U10V3KX

12

C713

C713 SC1U10V3KX

SC1U10V3KX

12

C591

C591 SC1U10V3KX

SC1U10V3KX

VGA_MEM_S0

12

C690

C690 SC10U10V5ZY

SC10U10V5ZY

MVDDQ=

1.8v/ 2.5v

C590

C590 SC10U10V5ZY

SC10U10V5ZY

3 3

2D5V_S0

1D8V_LVDDR_S1

12

C149

C149 SC1U10V3KX

SC1U10V3KX

12

C734

C734 SC1U10V3KX

SC1U10V3KX

12

C673

C673 SCD1U16V

SCD1U16V

12

C120

C120 SC1U10V3KX

SC1U10V3KX

VGA_MEM_S0

1D8V_S0

R130

R130 0R3-U

0R3-U

C696

C696 SC100P50V2JN

SC100P50V2JN

C672

C672 SC100P50V2JN

SC100P50V2JN

1 2

1D8V_S0

Delete SC10U6D3V5MX*1

1D8V_S0

1 2

Delete SC1U10V3ZY*2

R108

R108 0R3-U

0R3-U

1D8V_S0

1D8V_TVDD_S0

1 2

R104

R104 0R3-U

0R3-U

2 2

2D5V_S0

12

C72

C65

SC1U10V3KX

SC10U10V5ZY

1D8V_S0

12

C148

C148 SC10U10V5ZY

SC10U10V5ZY

1D8V_S0

12

C139

1 1

C139 SC10U10V5ZY

SC10U10V5ZY

12

C689

C689 SCD01U16V2KX

SCD01U16V2KX

B

1D8V_DDQ

K23 K24

H10 H13 H15 H17

AA1 AA4 AA7 AA8

A15 A21 A28

B30 D26 D23 D20 D17 D14 D11

E27

G10 G13 G15 G19 G22 G27 H22 H19

AD4

AE16 AE17

AF15

AE15

AH19 AH13

AF13 AF14

AF21

AE20

AF23

AH23

AE23 AE22

AK28

T7 R4 R1 N8 N7

M4

L8

N4

J8 J7 J4 J1

T8 V4 V7 V8

A3 A9

B1

D8 D5

F4

G7

L23

F18

N6

A7

U17D

VDDR1#T7 VDDR1#R4 VDDR1#R1 VDDR1#N8 VDDR1#N7 VDDR1#M4 VDDR1#L8 VDDR1#K23 VDDR1#K24 VDDR1#N4 VDDR1#J8 VDDR1#J7 VDDR1#J4 VDDR1#J1 VDDR1#H10 VDDR1#H13 VDDR1#H15 VDDR1#H17 VDDR1#T8 VDDR1#V4 VDDR1#V7 VDDR1#V8 VDDR1#AA1 VDDR1#AA4 VDDR1#AA7 VDDR1#AA8 VDDR1#A3 VDDR1#A9 VDDR1#A15 VDDR1#A21 VDDR1#A28 VDDR1#B1 VDDR1#B30 VDDR1#D26 VDDR1#D23 VDDR1#D20 VDDR1#D17 VDDR1#D14 VDDR1#D11 VDDR1#D8 VDDR1#D5 VDDR1#E27 VDDR1#F4 VDDR1#G7 VDDR1#G10 VDDR1#G13 VDDR1#G15 VDDR1#G19 VDDR1#G22 VDDR1#G27 VDDR1#H22 VDDR1#H19 VDDR1#AD4 VDDR1#L23

LVDDR_25#AE16 LVDDR_25#AE17 LVDDR_18#AF15 LVDDR_18#AE15

LPVDD TPVDD

TXVDDR#AF13 TXVDDR#AF14

VDDRH0 VDDRH1

A2VDD#AF21 A2VDD#AE20

A2VDDQ

AVDD

VDD1DI VDD2DI

PVDD

MPVDD

M26-P-1

Part 4 of 6

VDD15#AC11 VDD15#AC20

VDDR3#AD19 VDDR3#AD21 VDDR3#AC22

VDDR3#AC21 VDDR3#AC19

VDDR4#AC10 VDDR4#AD10

PCIE_VDDR_12#AG26 PCIE_VDDR_12#AK29

PCIE_VDDR_12#AJ30 PCIE_VDDR_12#AG29 PCIE_VDDR_12#AH29

PCIE_PVDD_12#N24 PCIE_PVDD_12#N23 PCIE_PVDD_12#P23

PCIE_PVDD_18#U23 PCIE_PVDD_18#T23 PCIE_PVDD_18#V23

PCIE_PVDD_18#W23

LVSSR#AH17 LVSSR#AG15 LVSSR#AG18

TXVSSR#AH12 TXVSSR#AG13 TXVSSR#AG14

A2VSSN#AH20

A2VSSN#AG21

I/O POWER

VDDC#AC13 VDDC#AD13 VDDC#AD15 VDDC#AC15 VDDC#AC17

VDD15#P8 VDD15#Y8

VDD15#H20 VDD15#H11 VDD15#M23

VDD15#Y23

VDDR3#AD7

VDDR3#AC8

VDDR4#AG7

VDDR4#AD9 VDDR4#AC9

NC#D9 NC#D13 NC#D19 NC#D25

NC#E4

NC#T4 NC#AB4

AVSSQ

LVSSR#AF18

LPVSS

TPVSS

VSSRH0 VSSRH1

A2VSSQ

AVSSN

VSS1DI VSS2DI

PVSS

MPVSS

AC13 AD13 AD15 AC15 AC17

P8 Y8 AC11 AC20 H20 H11 M23 Y23

AD7 AD19 AD21 AC22 AC8 AC21 AC19

AG7 AD9 AC9 AC10 AD10

AG26 AK29 AJ30 AG28 AG27

N24 N23 P23

U23 T23 V23 W23

D9 D13 D19 D25 E4 T4 AB4

AD22

AF18 AH17 AG15 AG18

AH18 AH12

AH14 AG13 AG14

F19 M6

AH20 AG21

AF22

AH22

AE24 AE21

AJ28

A6

C

C230

C230 SC10U10V5ZY

SC10U10V5ZY

D30

SSM5818SL

2 1

12

C697

C697 SC1U10V3KX

SC1U10V3KX

12

PVDD_12V

PVDD_18V

12

C688

C688 SCD01U16V2KX

SCD01U16V2KX

1D5V_VGA_S0

1 2

C625

C625 SC1U10V3KX

SC1U10V3KX

12

C639

C639 SC10U10V5ZY

SC10U10V5ZY

VDDR_12V

R139

1 2

0R3-U

R522

1 2

0R3-U

R508

R508 0R3-U

0R3-U

C624

C624 SC1U10V3KX

SC1U10V3KX

12

3D3V_S0

3D3V_VDDR3

12

3D3V_VDDR4

1D2V_VGA_S0 1D2V_VGA_VDDR

1D8V_DDQ

D

VGA_CORE_S0

12

C699

C699 SCD01U16V2KX

SCD01U16V2KX

3D3V_S0

12

1 2

C709

C709 SC10U10V5ZY

SC10U10V5ZY

C700

C700 SC330P50V2KX

SC330P50V2KX

1D8V_VGA_PVDD

C698

C698 SC330P50V2KX

SC330P50V2KX

12

ADD ASIC DECOUPLING FOR ALL POWER AS REQUIRED

WITH AS MANY AS POSSIBLE PLACED UNDER THE ASIC

C674

C661

SCD01U16V2KX

12

3D3V_S0

R492

R492 0R3-U

0R3-U

1D2V_VGA_S0 1D2V_VGA_VDDR

12

C181

C181 SC1U10V3KX

SC1U10V3KX

12

C750

C750 SC10U10V5ZY

SC10U10V5ZY

C640

C641

SCD01U16V2KX

1D5V_VGA_S0

R144

1 2

0R3-U

12

C712

C712 SCD01U16V2KX

SCD01U16V2KX

12

C710

SCD01U16V2KX

12

C675

C675 SCD01U16V2KX

SCD01U16V2KX

12

C643

C701

SC1U10V3KX

C231

C231 SC330P50V2KX

SC330P50V2KX

12

C765

C764

SCD01U16V2KX

12

C736

C736 SCD01U16V2KX

SCD01U16V2KX

C711

C711 SCD01U16V2KX

SCD01U16V2KX

C664

C664 SCD01U16V2KX

SCD01U16V2KX

VDDR_12V

12

C763

C763 SCD01U16V2KX

SCD01U16V2KX

PLACED CLOSE TO THE POWER/GND PINS

PVDD_12V

Title

PVDD_18V

Size Document Number Rev

A3

Date: Sheet

12

C662

C662 SCD01U16V2KX

SCD01U16V2KX

12

C626

C626 SC1U10V3KX

SC1U10V3KX

C735

C735 SCD01U16V2KX

SCD01U16V2KX

PCIE_VDDR_12

PCIE_PVDD_12

PCIE_PVDD_18

E

DIODE SUPPLIES POWER TO VDDC RAIL WHILE VDDC REGULATOR STABALIZES DURING POWER ON

3D3V_S0

12

C644

C644 SC1U10V3KX

SC1U10V3KX

12

C687

C685

SCD01U16V2KX

D4

SSM5818SL

2 1

12

C665

C665 SCD01U16V2KX

SCD01U16V2KX

VGA_CORE_S0

DIODE SUPPLIES POWER TO VDDC RAIL WHILE VDDC REGULATOR STABALIZES DURING POWER ON

M22 Power UP Squence

3D3_VDDR3

3D3_VDDR4

2D5_VDDR1

1D2_VDDC

VDD_15

ATI(2/3)

T1 < 1mS

T2 < 1mS

T3 < 1uS

T4 < 100nS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SNIPE

VGA_CORE_S0

12

C663

C663 SC1U10V3KX

SC1U10V3KX

T5 < 100nS

T6 < 1uS

T7 < 100nS

50 56Thursday, November 18, 2004

12

C686

C686 SC1U10V3KX

SC1U10V3KX

of

SA

A

MDA[63..0]52

4 4

3 3

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

2 2

U17B

H28

G26 G30

G29 G28

G25

H29

H25 H26

D29 D28 E28 E29

F28

F26 E26 F25 E24 F23 E23 D22 B29 C29 C25 C27 B28 B25 C26 B26 F17 E17 D16 F16 E15 F14 E14 F13 C17 B18 B17 B15 C13 B14 C14 C16 A13 A12 C12 B12 C10

B10 E13 E12 E10 F12 F11

DQA0 DQA1

J28

DQA2

J29

DQA3

J26

DQA4 DQA5 DQA6 DQA7 DQA8 DQA9 DQA10 DQA11 DQA12 DQA13 DQA14 DQA15 DQA16 DQA17 DQA18 DQA19 DQA20 DQA21 DQA22 DQA23 DQA24 DQA25 DQA26 DQA27 DQA28 DQA29 DQA30 DQA31 DQA32 DQA33 DQA34 DQA35 DQA36 DQA37 DQA38 DQA39 DQA40 DQA41 DQA42 DQA43 DQA44 DQA45 DQA46 DQA47 DQA48 DQA49 DQA50 DQA51 DQA52

C9

DQA53

B9

DQA54 DQA55 DQA56 DQA57 DQA58 DQA59 DQA60

E9

DQA61

F9

DQA62

F8

DQA63

M26-P-1

Part 2 of 6

MEMORY INTERFACE A

MEMORY CHANNEL A

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12 MAA13 MAA14

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0

QSA1

QSA2

QSA3

QSA4

QSA5

QSA6

QSA7

RASA#

CASA#

WEA#

CSA0#

CSA1#

CKEA

CLKA0

CLKA0#

CLKA1

CLKA1#

MVREFD

MVREFS

DIMA_0 DIMA_1

M22,24,26P :Not connected

E22 B22 B23 B24 C23 C22 F22 F21 C21 A24 C24 A25 E21 B20 C19

J25 F29 E25 A27 F15 C15 C11 E11

J27 F30 F24 B27 E16 B16 B11 F10

A19

E18

E19

E20

F20

B19

B21 C20

C18 A18

B7

B8

D30 B13

B

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

CSA#1

ATI_MVREFD

ATI_MVREFS

DIMA_0 DIMA_1

RASA# 52

CASA# 52

WEA# 52

CSA#0 52

CSA#1 52

CKEA 52

CLKA0 52 CLKA#0 52

CLKA1 52 CLKA#1 52

TP20

TP20 TPAD30

TPAD30TP6

TP6 TPAD30

TPAD30

12

R475

R475 100R2

100R2

12

MAA[13..0] 52

DQMA#[7..0] 52

QSA[7..0] 52

VGA_MEM_S0

12

R459

R459 100R2

100R2

12

C631

C631 SCD1U16V

SCD1U16V

CKEA

CKEB

R457

R457 100R2

100R2

C614

C614 SCD1U16V

SCD1U16V

MDB[63..0]53

1 2

VGA_MEM_S0

12

As close to CHIP as possible

R509

R509 10KR2

10KR2

R443

R443 10KR2

10KR2

R466

R466 100R2

100R2

C

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

U17C

D7

AD6 AD5

AC2 AC3 AD3

AA2 AA6 AA5 AB6 AB5

AE5 AE4 AB2 AB3

AE1 AE2 AE3

DQB0

F7

DQB1

E7

DQB2

G6

DQB3

G5

DQB4

F5

DQB5

E5

DQB6

C4

DQB7

B5

DQB8

C5

DQB9

A4

DQB10

B4

DQB11

C2

DQB12

D3

DQB13

D1

DQB14

D2

DQB15

G4

DQB16

H6

DQB17

H5

DQB18

J6

DQB19

K5

DQB20

K4

DQB21

L6

DQB22

L5

DQB23

G2

DQB24

F3

DQB25

H2

DQB26

E2

DQB27

F2

DQB28

J3

DQB29

F1

DQB30

H3

DQB31

U6

DQB32

U5

DQB33

U3

DQB34

V6

DQB35

W5

DQB36

W4

DQB37

Y6

DQB38

Y5

DQB39

U2

DQB40

V2

DQB41

V1

DQB42

V3

DQB43

W3

DQB44

Y2

DQB45

Y3

DQB46 DQB47 DQB48 DQB49 DQB50 DQB51 DQB52 DQB53 DQB54 DQB55 DQB56 DQB57 DQB58 DQB59 DQB60 DQB61 DQB62 DQB63

M26-P-1

Part 3 of 6

MEMORY INTERFACE B

MEMVMODE_0 MEMVMODE_1

MEMORY CHANNEL B

When select M24 use 45ohm 1% When select M26 use 240ohm 1%

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8

MAB9 MAB10 MAB11 MAB12 MAB13 MAB14

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0

QSB1

QSB2

QSB3

QSB4

QSB5

QSB6

QSB7

RASB#

CASB#

WEB#

CSB0#

CSB1#

CKEB

CLKB0

CLKB0#

CLKB1

CLKB1#

DIMB_0 DIMB_1

ROMCS#

MEMTEST

R473

47R2

N5 M1 M3 L3 L2 M2 M5 P6 N3 K2 K3 J2 P5 P3 P2

E6 B2 J5 G3 W6 W2 AC6 AD2

F6 B3 K6 G1 V5 W1 AC5 AD1

R2

T5

T6

R5

R6

R3

N1 N2

T2 T3

E3 AA3

AF5

C6 C7

C8

12

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

CSB#1

D

RASB# 53

CASB# 53

WEB# 53

CSB#0 53

CSB#1 53

CKEB 53

CLKB0 53 CLKB#0 53

CLKB1 53 CLKB#1 53

TP61

TP61 TPAD30

TPAD30

TP65

TP65 TPAD30

TPAD30

TP67

TP67 TPAD30

TPAD30

R458

R458 0R2-0

0R2-0

1 2

12

DQMB#[7..0] 53

QSB[7..0] 53

R445

R445 10KR2

10KR2

MAB[13..0] 53

VGA_CORE_S0

U17F

P17

VDDC#P17

P18

VDDC#P18

P19

VDDC#P19

U12

VDDC#U12

U13

VDDC#U13

U14

VDDC#U14

U17

VDDC#U17

U18

VDDC#U18

U19

VDDC#U19

V19

VDDC#V19

V18

VDDC#V18

V17

VDDC#V17

V14

VDDC#V14

V13

VDDC#V13

V12

VDDC#V12

N18

VDDC#N18

N17

VDDC#N17

N14

VDDC#N14

W17

VDDC#W17

W18

VDDC#W18

W12

VDDC#W12

W13

VDDC#W13

W14

VDDC#W14

N13

VDDC#N13

N19

VDDC#N19

M19

VDDC#M19

M18

VDDC#M18

M12

VDDC#M12

N12

VDDC#N12

M13

VDDC#M13

M14

VDDC#M14

P12

VDDC#P12

P13

VDDC#P13

P14

VDDC#P14

M17

VDDC#M17

W19

VDDC#W19

M26-P-1

VGA_CORE_S0 VGA_CORE_VDDCI

M22,24,26P :Not connected

1 2

12

R437

R437 DUMMY-R2

DUMMY-R2

R501

1 2

0R3-U

R436

R436 4K7R2

4K7R2

R444

R444 DUMMY-R2

DUMMY-R2

M26-P-1

12

1D8V_S0

When use M26P, pls remove this.

E

VSS#M16

Part 6 of 6

VSS#W15

CENTER ARRAY

VDDC1#W16

VDDC1#M15 VDDC1#R19

VDDC1#T12

C642

C642 SC330P50V2KX

SC330P50V2KX

When use M22/24P

PIN C6 C7

1.8V =

2.5V =

VSS#N16 VSS#N15 VSS#P15 VSS#P16 VSS#R18 VSS#R17 VSS#R16 VSS#R15 VSS#R14 VSS#R13 VSS#R12 VSS#T13 VSS#T14 VSS#T15

VSS#V16 VSS#V15 VSS#U15 VSS#U16 VSS#T19 VSS#T18 VSS#T17 VSS#T16

M16 N16 N15 P15 P16 R18 R17 R16 R15 R14 R13 R12 T13 T14 T15 W15 V16 V15 U15 U16 T19 T18 T17 T16

W16 M15 R19 T12

PD PU

PU PD

AUXWIN

+VDDC_CTGND

GND+VDDC_CT

+VDDC_CT +VDDC_CT

U17E

U8

VSS#U4U4VSS#U8

VSS#W7W7VSS#W8

Part 5 of 6

AUXWIN449

L28

Y4

AC4

AC12

AC14

AB8

AB7

AB1

AD16

W8

K28

AC16

AC18

AD18

AJ1

AK2

M27

M26

M24

M25

M28

P28

N28

R25

R23

R24

R26

R27

R28

T28

T24

V24

V26

V27

U28

AA26

AA27

AA23

AA24

AA25

AA28

AB28

AE28

AF28

AD26

AD27

AC28

AD28

V25

V28

Y28

W24

W28

AH29

MVDDQ=

VDDR1 MEMVMODE_0 MEMVMODE_1

1.8v/ 2.5v

VSS#Y4

VSS#AB8

VSS#AB7

VSS#AB1

VSS#AC4

VSS#AC12

VSS#AJ1

VSS#AK2

VSS#AC14

VSS#AC16

VSS#AC18

VSS#AD18

VSS#AD16

PCIE_VSS#L28

PCIE_VSS#K28

PCIE_VSS#M27

PCIE_VSS#M26

PCIE_VSS#P28

PCIE_VSS#N28

PCIE_VSS#R25

PCIE_VSS#M24

CORE GND

PCIE_VSS#R23

PCIE_VSS#M25

PCIE_VSS#M28

PCIE_VSS#T28

PCIE_VSS#T24

PCIE_VSS#V24

PCIE_VSS#V26

PCIE_VSS#V27

PCIE_VSS#V25

PCIE_VSS#V28

PCIE_VSS#R24

PCIE_VSS#R26

PCIE_VSS#R27

PCIE_VSS#R28

PCIE_VSS#U28

PCIE_VSS#Y28

PCIE_VSS#W23

PCIE_VSS#W28

PCIE_VSS#AA26

PCIE_VSS#AA27

PCIE_VSS#AA23

PCIE_VSS#AA24

PCIE_VSS#AA25

PCIE_VSS#AA28

PCIE_VSS#AF28

PCIE_VSS#AB28

PCIE_VSS#AE28

PCIE_VSS#AD26

PCIE_VSS#AD27

PCIE_VSS#AC28

PCIE_VSS#AD28

PCIE_VSS#AH29

1.8V

2.5V

2.8V

1 1

VSS#A2A2VSS#A10

VSS#A16

VSS#A22

VSS#A29

VSS#C1C1VSS#C3C3VSS#C28

VSS#C30

VSS#D27

VSS#D24

VSS#D21

VSS#D18

VSS#D15

VSS#D12

VSS#D10

VSS#D6D6VSS#D4D4VSS#F27

A10

A16

A22

A29

C28

C30

D27

D24

D21

D18

D15

D12

D10

VSS#G9G9VSS#G12

VSS#G16

VSS#G18

VSS#G21

VSS#G24

VSS#H27

VSS#H23

VSS#H21

VSS#H18

VSS#H16

VSS#H14

VSS#H12

VSS#H9H9VSS#H8H8VSS#H4

F27

G12

G16

G18

G21

G24

H27

H23

H21

H18

H16

H14

H12

VSS#AD12

VSS#AG5

VSS#AG9

VSS#J24

VSS#J23

H4

J24

J23

VSS#AG11

R7

AG5

AG9

AD12

AG11

VSS#K8K8VSS#K7K7VSS#K1K1VSS#L4L4VSS#M8M8VSS#M7M7VSS#P4P4VSS#R7

VSS#R8R8VSS#T1

T1

Title

Size Document Number Rev

A3

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ATI(3 of 3)

SNIPE

SA

of

51 56Thursday, November 18, 2004

5

All dampings in this page must near the VRAM.

12

D D

12

C C

CLKA0

CLKA#0

12

C152

C152 SCD1U16V

SCD1U16V

12

C71

C71 SC330P50V2KX

SC330P50V2KX

R512 0R3-UR512 0R3-U

12

R511 0R3-UR511 0R3-U

R510

60D4R3F

CLOSE TO MEM !!

B B

A A

C752

C752 SCD1U16V

SCD1U16V

C603

C603 SC330P50V2KX

SC330P50V2KX

RASA#51 CASA#51

WEA#51 CSA#051 CSA#151

CKEA51

VDDRA_CLK0+

12

VDDRA_CLK0-

1 2

BC751_1BC751_1

12

C691

C691 SCD1U16V

SCD1U16V

5

12

C740

C740 SCD1U16V

SCD1U16V

12

C648

C648 SC330P50V2KX

SC330P50V2KX

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11

MAA12 MAA13

R513

R513 60D4R3F

60D4R3F

12

U23A

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1

M10

NC#M10

N12

CKE

M11

CLK

M12

CLK#

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL

M13

MCL/DSF

HY5DS573222F-U

12

C753

C753 SCD1U16V

SCD1U16V

C647

C647 SC330P50V2KX

SC330P50V2KX

NC#H4H4NC#H11

NC#L12

L12

L13

H11

12

C633

C633 SC330P50V2KX

SC330P50V2KX

NC#L13

NC#M3

NC#N3

N3

M3

C726

C726 SCD1U16V

SCD1U16V

12

C616

C616 SC330P50V2KX

SC330P50V2KX

NC#C4C4NC#C11

C11

CLOSE TO MEM

Layout trace 20 mil

C738

C738 SCD1U16V

SCD1U16V

1 of 5

VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VREF

12

C632

C632 SC330P50V2KX

SC330P50V2KX

D7 D8 E4 E11 L4 L7 L8 L11

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

E5 E7 E8 E10 K6 K7 K8 K9 L5 L10

N13

VDDR_VREF1

4

C751

C751 SCD1U16V

SCD1U16V

VGA_MEM_S0

12

C153

C153 SCD1U16V

SCD1U16V

12

C140

C140 SCD1U16V

SCD1U16V

4

12

C741

C741 SCD1U16V

SCD1U16V

12

C646

C646 SC330P50V2KX

SC330P50V2KX

C737

SC22U10V6ZY-U

VGA_MEM_S0

12

C780

SC22U10V6ZY-U

VGA_MEM_S0

12

MDA[63..0]51

12

C739

C739 SCD01U16V2KX

SCD01U16V2KX

C615

C615 SCD01U16V2KX

SCD01U16V2KX

R127

R127 1KR3F

1KR3F

R128

R128 1KR3F

1KR3F

MEMA_DQS5 QSA5

MEMA_DM5 DQMA#5

MAA[13..0]51

DQMA#[7..0]51

QSA[7..0]51

U23B

MDA12

B5

MDA11 MDA9 MDA10 MDA13 MDA8 MDA15 MDA14

MEMA_DM1

MEMA_DQS1

MDA21 MDA18 MDA17 MDA22 MDA19 MDA23 MDA16 MDA20

MEMA_DM2

MEMA_DQS2

MDA6 MDA2 MDA0 MDA7 MDA1 MDA4 MDA5 MDA3

MEMA_DM0

MEMA_DQS0

MDA26 MDA31 MDA30 MDA24 MDA27 MDA25 MDA29 MDA28

MEMA_DM3

MEMA_DQS3

R494 15R2JR494 15R2J

R493 15R2JR493 15R2J

DQ3

C6

DQ1

B6

DQ2

B7

DQ0

D2

DQ6

D3

DQ5

C2

DQ4

E2

DQ7

B3

DM0

B2

DQS0

HY5DS573222F-U

U23C

K13

DQ8

G13

DQ12

G12

DQ13

J13

DQ10

F13

DQ14

K12

DQ9

F12

DQ15

J12

DQ11

H12

DM1

H13

DQS1

U23D

G3

DQ18

K3

DQ23

J3

DQ20

F3

DQ16

J2

DQ21

G2

DQ19

F2

DQ17

K2

DQ22

H3

DM2

H2

DQS2

D12

DQ26

D13

DQ25

E13

DQ24

C9

DQ30

B10

DQ28

B8

DQ31

C13

DQ27

B9

DQ29

B12

DM3

B13

DQS3

DQMA#2 MEMA_DM2

QSA2 MEMA_DQS2

12

U23E

HY5DS573222F-U

1 2 1 2

3

2 of 5

MEMA_DM5

MEMA_DQS5

3 of 5

MEMA_DM6 MEMA_DQS6

HY5DS573222F-U

4 of 5

MEMA_DM4

MEMA_DQS4

HY5DS573222F-U

5 of 5

R53415R2J R53415R2J R52715R2J R52715R2J

DQMA#3 MEMA_DM3

QSA3 MEMA_DQS3

3

MDA45 MDA46 MDA43 MDA44 MDA42 MDA40 MDA47 MDA41

MDA49 MDA53 MDA54 MDA50 MDA52 MDA48 MDA55 MDA51

MDA37 MDA35 MDA34 MDA39 MDA33 MDA36 MDA38 MDA32

MDA58 MDA63 MDA61 MDA56 MDA59 MDA57 MDA62 MDA60

MEMA_DM7 MEMA_DQS7

U14B

B5 C6 B6 B7 D2 D3 C2 E2

B3 B2

U14C

K13 G13 G12

J13

F13

K12

F12

J12

H12 H13

U14D

G3

K3

J3

F3

J2

G2

F2 K2

H3 H2

D12 D13 E13

C9

B10

B8

C13

B9

B12 B13

1 2

12

C64

C64 SCD1U16V

SCD1U16V

12

C155

C155 SC330P50V2KX

SC330P50V2KX

2 of 5

DQ3 DQ1 DQ2 DQ0 DQ6 DQ5 DQ4 DQ7

DM0 DQS0

HY5DS573222F-U

3 of 5

DQ8 DQ12 DQ13 DQ10 DQ14 DQ9 DQ15 DQ11

DM1 DQS1

HY5DS573222F-U

4 of 5

DQ18 DQ23 DQ20 DQ16 DQ21 DQ19 DQ17 DQ22

DM2 DQS2

HY5DS573222F-U

U14E

5 of 5

DQ26 DQ25 DQ24 DQ30 DQ28 DQ31 DQ27 DQ29

DM3 DQS3

HY5DS573222F-U

R53215R2J R53215R2J R53315R2J R53315R2J

12

C677

C677 SCD1U16V

SCD1U16V

12

C154

C154 SCD01U16V2KX

SCD01U16V2KX

CLKA151

CLKA#151

2

VGA_MEM_S0

RASA# CASA# WEA# CSA#0 CSA#1

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11

MAA12 MAA13

CKEA51

VDDRA_CLK1+

12

R447 0R3-UR447 0R3-U R448 0R3-UR448 0R3-U

CLOSE TO MEM !!

MEMA_DM4 MEMA_DM6 MEMA_DM7

MEMA_DQS4 MEMA_DQS6 MEMA_DQS7

QSA1 MEMA_DQS1

DQMA#1 MEMA_DM1

DQMA#0 MEMA_DM0

QSA0 MEMA_DQS0

VDDRA_CLK1-

12

R449

60D4R3F

1 2

BC752_1

12

C598

C598 SCD1U16V

SCD1U16V

R484 15R2JR484 15R2J R462 15R2JR462 15R2J R461 15R2JR461 15R2J

R495 15R2JR495 15R2J R463 15R2JR463 15R2J R460 15R2JR460 15R2J

1 2

2

R446

R446 60D4R3F

60D4R3F

R54515R2J R54515R2J

R54615R2J R54615R2J

R54715R2J R54715R2J

R54815R2J R54815R2J

1

1 of 5

NC#L12

NC#L13

L12

L13

NC#M3

NC#N3

N3

M3

SNIPE

1 of 5

D7

VDD

D8

VDD

E4

VDD

E11

VDD

L4

VDD

L7

VDD

L8

VDD

L11

VDD

C3

VDDQ

C5

VDDQ

C7

VDDQ

C8

VDDQ

C10

VDDQ

C12

VDDQ

E3

VDDQ

E12

VDDQ

F4

VDDQ

F11

VDDQ

G4

VDDQ

G11

VDDQ

J4

VDDQ

J11

VDDQ

K4

VDDQ

K11

VDDQ

B4

VSSQ

B11

VSSQ

D4

VSSQ

D5

VSSQ

D6

VSSQ

D9

VSSQ

D10

VSSQ

D11

VSSQ

E6

VSSQ

E9

VSSQ

F5

VSSQ

F10

VSSQ

G5

VSSQ

G10

VSSQ

H5

VSSQ

H10

VSSQ

J5

VSSQ

J10

VSSQ

K5

VSSQ

K10

VSSQ

E5

VSS

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

N13

VREF

VDDR_VREF2

Layout trace 20 mil

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

U14A

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1

M10

NC#M10

N12

CKE

M11

CLK

M12

CLK#

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL

M13

MCL/DSF

NC#C4C4NC#C11

HY5DS573222F-U

DQMA#4

12

DQMA#6

12

DQMA#7

12

12 12 12

QSA4 QSA6 QSA7

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

NC#H4H4NC#H11

C11

H11

VGA VRAM (DDR) (1/2)

VGA_MEM_S0

12

C78

C78 SCD1U16V

SCD1U16V

12

C79

C79 SCD1U16V

SCD1U16V

52 56Thursday, November 18, 2004

C645

SC22U10V6ZY-U

12

C593

SC22U10V6ZY-U

VGA_MEM_S0

of

12

R68

R68 1KR3F

1KR3F

12

R69

R69 1KR3F

1KR3F

SA

5

All dampings in this page must near the VRAM.

12

D D

12

C C

CLKB0

CLKB#0

B B

A A

12

C553

C553 SCD1U16V

SCD1U16V

12

C566

C566 SC330P50V2KX

SC330P50V2KX

R403 0R3-UR403 0R3-U

12

R402 0R3-UR402 0R3-U

R391

60D4R3F

CLOSE TO MEM !!

C568

C568 SCD1U16V

SCD1U16V

C565

C565 SC330P50V2KX

SC330P50V2KX

MAB13

CKEB

VDDRC_CLK0+

12

VDDRC_CLK0-

1 2

BC753_1

12

C567

C567 SCD1U16V

SCD1U16V

5

12

C578

C578 SCD1U16V

SCD1U16V

12

C552

C552 SC330P50V2KX

SC330P50V2KX

RASB# CASB# WEB# CSB#0 CSB#1

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11

MAB12

R412

R412 60D4R3F

60D4R3F

12

M2

L2 L3 N2

M4

N5 N6

M6

N7 N8

M9

N9 N10 N11

M8

L6

M7

L9

N4

M5

M10

N12 M11 M12

F6

F7

F8

F9

G6 G7 G8 G9

H6

H7

H8

H9

J6 J7 J8 J9

M13

HY5DS573222F-U

C569

C569 SCD1U16V

SCD1U16V

C564

C564 SC330P50V2KX

SC330P50V2KX

U8A

RAS# CAS# WE# CS# NC#M4

A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10 A11 NC#L9

BA0 BA1 NC#M10

CKE CLK CLK#

VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL VSS_THERMAL

MCL/DSF

12

C570

C570 SCD1U16V

SCD1U16V

C539

C539 SC330P50V2KX

SC330P50V2KX

NC#C4C4NC#C11

C11

12

C541

C541 SCD1U16V

SCD1U16V

12

C540

C540 SC330P50V2KX

SC330P50V2KX

1 of 5

VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VREF

NC#H4H4NC#H11

NC#L12

NC#L13

NC#M3

NC#N3

N3

M3

L12

L13

H11

CLOSE TO MEM

Layout trace 20 mil

12

C575

C575 SC330P50V2KX

SC330P50V2KX

D7 D8 E4 E11 L4 L7 L8 L11

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

E5 E7 E8 E10 K6 K7 K8 K9 L5 L10

N13

VDDR_VREF3

4

C579

C579 SCD1U16V

SCD1U16V

VGA_MEM_S0

12

C25

C25 SCD1U16V

SCD1U16V

12

C24

C24 SCD1U16V

SCD1U16V

4

12

C542

C542 SCD1U16V

SCD1U16V

12

C576

C576 SC330P50V2KX

SC330P50V2KX

C580

SC22U10V6ZY-U

VGA_MEM_S0

12

C592

SC22U10V6ZY-U

VGA_MEM_S0

12

C26

C26 SCD01U16V2KX

SCD01U16V2KX

C21

C21 SCD01U16V2KX

SCD01U16V2KX

MEMB_DM0 MEMB_DQS0

MEMB_DM3 MEMB_DQS3

MEMB_DM1 MEMB_DQS1

R23

R23 1KR3F

1KR3F

R22

R22 1KR3F

1KR3F

MEMB_DM2 MEMB_DQS2

MDB7 MDB6 MDB5 MDB4 MDB1 MDB0 MDB2 MDB3

MDB28 MDB29 MDB31 MDB25 MDB26 MDB27 MDB24 MDB30

MDB14 MDB9 MDB11 MDB13 MDB10 MDB15 MDB12 MDB8

MDB20 MDB23 MDB22 MDB16 MDB19 MDB17 MDB21 MDB18

K13 G13 G12

F13 K12 F12

H12 H13

U8B

B5 C6 B6 B7 D2 D3 C2 E2

B3 B2

U8C

J13

J12

U8D

G3

K3

J3

F3

J2

G2

F2 K2

H3 H2

D12 D13 E13

C9

B10

B8

C13

B9

B12 B13

12

C75

C75 SCD1U16V

SCD1U16V

12

C77

C77 SC330P50V2KX

SC330P50V2KX

2 of 5

DQ3 DQ1 DQ2 DQ0 DQ6 DQ5 DQ4 DQ7

DM0 DQS0

HY5DS573222F-U

3 of 5

DQ8 DQ12 DQ13 DQ10 DQ14 DQ9 DQ15 DQ11

DM1 DQS1

HY5DS573222F-U

4 of 5

DQ18 DQ23 DQ20 DQ16 DQ21 DQ19 DQ17 DQ22

DM2 DQS2

HY5DS573222F-U

U8E

5 of 5

DQ26 DQ25 DQ24 DQ30 DQ28 DQ31 DQ27 DQ29

DM3 DQS3

HY5DS573222F-U

3

12

C76

C76 SCD1U16V

SCD1U16V

12

C63

C63 SCD01U16V2KX

SCD01U16V2KX

MEMB_DM4 MEMB_DQS4

MEMB_DM7 MEMB_DQS7

MEMB_DM5 MEMB_DQS5

MEMB_DM6 MEMB_DQS6

3

VGA_MEM_S0

MDB32 MDB33 MDB34 MDB35 MDB36 MDB38 MDB37 MDB39

MDB63 MDB59 MDB58 MDB60 MDB56 MDB62 MDB57 MDB61

MDB43 MDB47 MDB45 MDB42 MDB44 MDB40 MDB41 MDB46

MDB53 MDB54 MDB52 MDB51 MDB50 MDB49 MDB55 MDB48

K13 G13 G12

K12

H12 H13

U7B

B5 C6 B6 B7 D2 D3 C2 E2

B3 B2

U7C

J13 F13

F12 J12

U7D

G3

K3

J3

F3

J2

G2

F2 K2

H3 H2

D12 D13 E13

C9

B10

B8

C13

B9

B12 B13

MDB[63..0]51

MAB[13..0]51

DQMB#[7..0]51

QSB[7..0]51

2 of 5

DQ3 DQ1 DQ2 DQ0 DQ6 DQ5 DQ4 DQ7

DM0 DQS0

HY5DS573222F-U

3 of 5

DQ8 DQ12 DQ13 DQ10 DQ14 DQ9 DQ15 DQ11

DM1 DQS1

HY5DS573222F-U

4 of 5

DQ18 DQ23 DQ20 DQ16 DQ21 DQ19 DQ17 DQ22

DM2 DQS2

HY5DS573222F-U

U7E

5 of 5

DQ26 DQ25 DQ24 DQ30 DQ28 DQ31 DQ27 DQ29

DM3 DQS3

HY5DS573222F-U

2

RASB#51 CASB#51

WEB#51 CSB#051 CSB#151

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11

MAB12 MAB13

CKEB51

VDDRC_CLK1+

CLKB151

CLKB#151

MEMB_DM0 DQMB#0 MEMB_DM3 MEMB_DM1 MEMB_DM2

MEMB_DQS0 MEMB_DQS3 MEMB_DQS1 MEMB_DQS2

12

R390 0R3-UR390 0R3-U

12

R386 0R3-UR386 0R3-U

R387

60D4R3F

1 2

BC754_1

CLOSE TO MEM !!

12

R424 15R2JR424 15R2J R404 15R2JR404 15R2J R407 15R2JR407 15R2J R423 15R2JR423 15R2J

R425 15R2JR425 15R2J

R405 15R2JR405 15R2J R406 15R2JR406 15R2J R422 15R2JR422 15R2J

12 12 12 12

VDDRC_CLK1-

R397

R397 60D4R3F

60D4R3F

C551

C551 SCD1U16V

SCD1U16V

DQMB#3 DQMB#1 DQMB#2

2

U7A

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1

M10

NC#M10

N12

CKE

M11

CLK

M12

CLK#

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL

M13

MCL/DSF

NC#C4C4NC#C11

HY5DS573222F-U

MEMB_DM4 MEMB_DM7 MEMB_DM5 MEMB_DM6

MEMB_DQS4 QSB4 MEMB_DQS7 MEMB_DQS5 MEMB_DQS6

QSB0 QSB3 QSB1 QSB2

Title

Size Document Number Rev

A3

Date: Sheet

NC#H4H4NC#H11

C11

R420 15R2JR420 15R2J R398 15R2JR398 15R2J R400 15R2JR400 15R2J R418 15R2JR418 15R2J

R421 15R2JR421 15R2J R399 15R2JR399 15R2J R401 15R2JR401 15R2J

R419 15R2JR419 15R2J

1 of 5

D7

VDD

D8

VDD

E4

VDD

E11

VDD

L4

VDD

L7

VDD

L8

VDD

L11

VDD

C3

VDDQ

C5

VDDQ

C7

VDDQ

C8

VDDQ

C10

VDDQ

C12

VDDQ

E3

VDDQ

E12

VDDQ

F4

VDDQ

F11

VDDQ

G4

VDDQ

G11

VDDQ

J4

VDDQ

J11

VDDQ

K4

VDDQ

K11

VDDQ

B4

VSSQ

B11

VSSQ

D4

VSSQ

D5

VSSQ

D6

VSSQ

D9

VSSQ

D10

VSSQ

D11

VSSQ

E6

VSSQ

E9

VSSQ

F5

VSSQ

F10

VSSQ

G5

VSSQ

G10

VSSQ

H5

VSSQ

H10

VSSQ

J5

VSSQ

J10

VSSQ

K5

VSSQ

K10

VSSQ

E5

VSS

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

N13

VREF

NC#L12

NC#L13

NC#M3

NC#N3

N3

M3

L12

L13

H11

CLOSE TO MEM

Layout trace 20 mil

DQMB#4

12

DQMB#7

12

DQMB#5

12

DQMB#6

12

12 12 12 12

QSB7 QSB5 QSB6

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

VGA VRAM (DDR) (2/2)

SNIPE

1

VGA_MEM_S0

12

C22

C22 SCD1U16V

SCD1U16V

VDDR_VREF4

12

C23

C23 SCD1U16V

SCD1U16V

53 56Thursday, November 18, 2004

1

C577

SC22U10V6ZY-U

12

C589

SC22U10V6ZY-U

VGA_MEM_S0

of

12

R20

R20 1KR3F

1KR3F

12

R21

R21 1KR3F

1KR3F

SA

5

G16

VGA_MEM_S0 2D5V_S01D8V_S0

D D

C C

1 2

GAP-OPEN-PWR

G20

1 2

GAP-OPEN-PWR

G17

1 2

GAP-OPEN-PWR

G19

G14

1 2

GAP-OPEN-PWR

G10

1 2

GAP-OPEN-PWR

G6

1 2

GAP-OPEN-PWR

G9

4

RN58

ATI_TXBCLK+449 ATI_TXBCLK-449 ATI_TXBOUT2+449 ATI_TXBOUT2-449

ATI_TXBOUT1+449 ATI_TXBOUT1-449 ATI_TXBOUT0+449 ATI_TXBOUT0-449

ATI_TXACLK+449 ATI_TXACLK-449 ATI_TXAOUT2+449 ATI_TXAOUT2-449

ATI_TXAOUT1+449 ATI_TXAOUT1-449 ATI_TXAOUT0+449 ATI_TXAOUT0-449

1 2 3 4 5

SRN0-1-U

SRN0-1-U RN59

RN59

1 2 3 4 5

SRN0-1-U

SRN0-1-U RN60

RN60

1 2 3 4 5

SRN0-1-U

SRN0-1-U RN61

RN61

1 2 3 4 5

SRN0-1-U

3

8 7 6

LCD_TXBCLK+ 17 LCD_TXBCLK- 17 LCD_TXBOUT2+ 17 LCD_TXBOUT2- 17

LCD_TXBOUT1+ 17 LCD_TXBOUT1- 17 LCD_TXBOUT0+ 17 LCD_TXBOUT0- 17

LCD_TXACLK+ 17 LCD_TXACLK- 17 LCD_TXAOUT2+ 17 LCD_TXAOUT2- 17

LCD_TXAOUT1+ 17 LCD_TXAOUT1- 17 LCD_TXAOUT0+ 17 LCD_TXAOUT0- 17

2

RN64

1

LCD_TXACLK+17 LCD_TXACLK-17 LCD_TXAOUT2+17 LCD_TXAOUT2-17

LCD_TXAOUT1+17 LCD_TXAOUT1-17 LCD_TXAOUT0+17 LCD_TXAOUT0-17

LCD_TXBOUT1+17 LCD_TXBOUT1-17 LCD_TXBOUT0+17 LCD_TXBOUT0-17

LCD_TXBCLK+17 LCD_TXBCLK-17 LCD_TXBOUT2+17 LCD_TXBOUT2-17

2 3 4 5

SRN0-1-U

SRN0-1-U RN65

RN65

1 2 3 4 5

SRN0-1-U

SRN0-1-U RN63

RN63

1 2 3 4 5

SRN0-1-U

SRN0-1-U RN62

RN62

1 2 3 4 5

SRN0-1-U

8 7 6

1

TXACLK+ 13 TXACLK- 13 TXAOUT2+ 13 TXAOUT2- 13

TXAOUT1+ 13 TXAOUT1- 13 TXAOUT0+ 13 TXAOUT0- 13

TXBOUT1+ 13 TXBOUT1- 13 TXBOUT0+ 13 TXBOUT0- 13

TXBCLK+ 13 TXBCLK- 13 TXBOUT2+ 13 TXBOUT2- 13

1 2

GAP-OPEN-PWR

G18

1 2

GAP-OPEN-PWR

B B

A A

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

5

G26

G25

1D2V_VGA_S01D2V_S0

1 2

GAP-OPEN-PWR

G7

1 2

GAP-OPEN-PWR

G23

1 2

G24

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

VGA_CORE_S0

VGA_THERM_DP23

VGA_THERM_DN23

R372 0R2-0R372 0R2-0

ATI_LCDVDD_ON449 ATI_TV_COMP449 ATI_TV_LUMA449 ATI_TV_CRMA449

ATI_RED449 ATI_GREEN449 ATI_BLUE449

ATI_HSYNC449 ATI_VSYNC449 ATI_DDCDATA449 ATI_DDCCLK449

VGA_LOCAL_DP449

VGA_LOCAL_DN449

R143

1 2

0R2-0

0R2-0 R142

R142

1 2

0R2-0

4

1 2

R377 0R2-0R377 0R2-0

1 2

R375 0R2-0R375 0R2-0

1 2

R373 0R2-0R373 0R2-0

1 2

R332 0R2-0R332 0R2-0

1 2

R333 0R2-0R333 0R2-0

1 2

R334 0R2-0R334 0R2-0

1 2

R369 0R2-0R369 0R2-0

1 2

R368 0R2-0R368 0R2-0

1 2

R367 0R2-0R367 0R2-0

1 2

R356 0R2-0R356 0R2-0

1 2

VGA_LOCAL_DP

12

C179

C179 SC2200P50V2KX

SC2200P50V2KX

VGA_LOCAL_DN

VGA_REMOTE_DN23

3

LCD_VDD_ON 17 TVCOMP 16 TVLUMA 16 TVCRMA 16

CRT_RED 16 CRT_GREEN 16 CRT_BLUE 16

CRT_HSYNC 16 CRT_VSYNC 16 CRT_DAT_DDC_3 16 CRT_CLK_DDC_3 16

3D3V_S0

VGA_REMOTE_DP23

CRT_VSYNC16 CRT_HSYNC16 CRT_BLUE16 CRT_GREEN16

CRT_RED16 TVLUMA16 TVCRMA16 TVCOMP16

LCD_VDD_ON17

CRT_DAT_DDC_316 CRT_CLK_DDC_316

U25

1

VCC

2

DXP

3

DXN

4

12

C180

C180 SCD1U

SCD1U

THERM#

G781

SMBCLK

SMBDATA

ALERT#

GND

8 7 6 5

VGA_ALERT#

1 2

R141 2K2R2R141 2K2R2

place near GPU

2

C725

C725 SC470P50V2KX

SC470P50V2KX

31

Q31

Q31 S2N3904-U2

S2N3904-U2

2

12

R371 0R2-0R371 0R2-0

1 2

R370 0R2-0R370 0R2-0

1 2

R366 0R2-0R366 0R2-0

1 2

R365 0R2-0R365 0R2-0

1 2

R364 0R2-0R364 0R2-0

1 2

R376 0R2-0R376 0R2-0

1 2

R374 0R2-0R374 0R2-0

1 2

R378 0R2-0R378 0R2-0

1 2

RN71

1

8

2

7

3

6

4 5

SRN0-1-U

VGA_SMB_CLK 13,449 VGA_SMB_DAT 13,449

3D3V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA SELECTOR

Size Document Number Rev

A3

SNIPE

Date: Sheet of

Date: Sheet

MAIN_JVGA_VS 13 MAIN_JVGA_HS 13 MAIN_CRT_B 13 MAIN_CRT_G 13

MAIN_CRT_R 13 RS480_TV_LUMA 13 RS480_TV_CRMA 13 RS480_TV_COMP 13

LCDVDD_ON 13

VGA_DAT_DDC_3 13 VGA_CLK_DDC_3 13

54 56Thursday, November 18, 2004

1

SA

of

A

FAN5234 FOR VGA_Core

4 4

5V_S0

12

R216

R216 DUMMY-R2

3 3

R215

PM_SLP_S3#18,21,34,38,39,43,44

DCBATOUT_5234

1 2

10KR2

R217

1 2

10R5

DUMMY-R2

5234_VIN

12

C294

C294 SCD01U16V2KX

SCD01U16V2KX

5234_SS

5234_ILIM

5234_EN

12

R214

R214 40K2R3F

40K2R3F

5V_S0

12

5234_VSEN

12

B

C847

C847 SC4D7U10V5ZY

SC4D7U10V5ZY

D34

2 1

SSM5818SL

U34

16

FPWM

15

BOOT

7

SS

4

ILIM

3

EN

6

VSEN

5

VOUT

1

VIN

11

VCC

FAN5234MTCX

C287

C287 SCD1U25V3KX

SCD1U25V3KX

DCBATOUT DCBATOUT_5234

G105

1 2

GAP-OPEN-PWR

G106

1 2

GAP-OPEN-PWR

G109

1 2

GAP-OPEN-PWR

G108

1 2

GAP-OPEN-PWR

G107

1 2

GAP-OPEN-PWR

G110

C312

1 2

SCD1U25V3KX

TP30

TPAD30

1 2

GAP-OPEN-PWR

R227

R227 1K2R3F

1K2R3F

1 2

12

C311

C311 SCD1U16V

SCD1U16V

5234_BOOT

9

PGND

8

AGND

5234_ISEN

12

ISNS

5234_SW

13

SW

5234_HDRV

14

HDRV

LDRV

PGOOD

PWM Mode: FPWM (High)=>Fixed PWM Mode. FPWM (Low)=>Hysteretic Mode.

10

2

5234_LDRV

C

1

G

1

G

DCBATOUT_5234

D

U78

U78 APM3023NUCTR

APM3023NUCTR

Id=30A,Qg=15~20nC Rdson=22~28mohm

3 2

USD:0.12

S

L61

1 2

DY

IND-2D2UH-18

1 2

D

23

U76

U76 APM3011NU

APM3011NU

Id=60A,Qg=22~28nC Rdson=14~18mohm USD:0.15

S

12

C834

C834 SC10U25V6MX

SC10U25V6MX

L45

L45 IND-2D2UH-4

IND-2D2UH-4

D

12

C835

SCD1U

Vishay IHCP-5050 Imax=16A, DCR=8mohm

12.9*13.58*3.5, NTD:11.05

5V_S0

300KHz

12

R228

R228 10KR3

10KR3

R229

R229 DUMMY-R3

DUMMY-R3

12

C833

C833 SC10U25V6MX

SC10U25V6MX

12

C286

C286 SCD01U16V2KX

SCD01U16V2KX

12

R213

R213 698R3F

698R3F

R212

R212 2KR2F

2KR2F

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

12

C818

C818 SCD1U

SCD1U

NEC B2 Size 220uF 2.5V ESR=35mohm Iripple=1.558A NTD:6.37

12

TC20

TC20 ST220U2D5VBM

ST220U2D5VBM

77.C2271.031

VGA_CORE_PWR VGA_CORE_S0VGA_CORE_S0

G96

G98

G92

G35

G34

G95

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

12

TC21

TC21 ST330U3VDM

ST330U3VDM

KEMET V Size 330uF 3V ESR=15mohm, Iripple=2.9A NTD:9.5

E

G38

G91

G39

G36

G94

G37

G97

G40

G93

1D2V or 1D15V Iomax=11 or 5.2A OCP>20A

VGA_CORE_PWR

2 2

Rilim=(11.2/Iilim)*((100+Rsense)/Rdson)

3D3V_S0

12

C778

C778 SC10U10V5ZY

SC10U10V5ZY

1 1

A

12

C777

C777 SC10U10V5ZY

SC10U10V5ZY

1

4

2

3

FB

BS

VIN

VOUT

NC#88NC#77GND6NC#55GND

APL5332KAC

APL5332KAC U26

U26

9

C779

C779 SCD1U

SCD1U

12

R557

R557 8K66R3F

8K66R3F

12

R558

R558 10KR3F

10KR3F

12

B

TC3

TC3 ST100U6D3VBM

ST100U6D3VBM

G21

1 2

G22

GAP-OPEN-PWR

1 2

GAP-OPEN-PWR

1D5V_VGA_S0EPCI_PWR

C

Vo=1.20V, R1775=0.698Kohm(R3F) =>Vo(cal.)=1.2141V for M26 & M22

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

FAN5234_VGA_CORE_1D20V or 1D15V

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet

SNIPE

of

55 56Thursday, November 18, 2004

E

SA

5

A

3D3V_S0 3D3V_S3

4

HOLE2

HOLE2 HOLE

HOLE

HOLE8

HOLE8 HOLE

HOLE

3

HOLE5

HOLE5 HOLE

HOLE

HOLE6

HOLE6 HOLE

HOLE

HOLE13

HOLE13 HOLE

HOLE

HOLE14

HOLE14 HOLE

HOLE

2

HOLE12

HOLE12 HOLE

HOLE

HOLE15

HOLE15 HOLE

HOLE

HOLE17

HOLE17 HOLE

HOLE

HOLE19

HOLE19 HOLE

HOLE

1

EC11

EC11 SCD1U

SCD1U

12

EC18

EC18 SCD1U

SCD1U

12

EC8

EC8 SCD1U

SCD1U

12

EC1

EC1 SCD1U

SCD1U

12

D D

5V_S0

EC12

EC12 SCD1U

SCD1U

EC19

EC19 SCD1U

SCD1U

EC10

EC10 SCD1U

SCD1U

EC9

EC9 SCD1U

SCD1U

12

5V_S5

12

2D5V_S0

C C

12

2D5V_S3

12

3D3V_S5

EC4

EC4 SCD1U

SCD1U

12

EC20

EC20 SCD1U

SCD1U

12

EC3

EC3 SCD1U

SCD1U

12

1D8V_S0

12

EC13

EC13 SCD1U

SCD1U

1D8V_S5

12

DVI_VCC

12

VPP_ASKT_S0 VPP_BSKT_S0

12

EC16

EC16 SCD1U

SCD1U

EC14

EC14 SCD1U

SCD1U

EC15

EC15 SCD1U

SCD1U

EC7

EC7 SCD1U

SCD1U

EC5

EC5 SCD1U

SCD1U

12

HOLE27HOLE27

EC2

EC2 SCD1U

SCD1U

EC6

EC6 SCD1U

SCD1U

HOLE28HOLE28

HOLE7HOLE7

1

HOLE21

HOLE21 HOLE

HOLE

1

5V_S0 5V_S0

14

10

9 8

7

HOLE3HOLE3

HOLE9HOLE9

U47C

TSAHCT125

1

HOLE22

HOLE22 HOLE

HOLE

1

HOLE18HOLE18

1

HOLE23

HOLE23 HOLE

HOLE

1

14

13

12 11

7

HOLE11HOLE11

1

HOLE24

HOLE24 HOLE

HOLE

1

U47D

TSAHCT125

HOLE16HOLE161HOLE25HOLE25

HOLE1

HOLE1 HOLE

HOLE

1

HOLE30

HOLE30 HOLE

HOLE

1

U73C

TSLCX14MTC-L-U

1

HOLE10

HOLE10 HOLE

HOLE

1

3D3V_S0

147

11 10

HOLE29

HOLE29 HOLE

HOLE

3D3V_S0

147

5 6

1

HOLE20HOLE20

HOLE4

HOLE4 HOLE

HOLE

1

HOLE26

HOLE26 HOLE

HOLE

1

3D3V_S0

147

9 8

U73E

TSLCX14MTC-L-U

U73D

TSLCX14MTC-L-U

3D3V_S0

147

13 12

U73F

TSLCX14MTC-L-U

12

EC17

GND18

GND18 GNDPAD

GNDPAD

1

DY

EC17 SCD1U

SCD1U

1

GND2DYGND2

DY

1

GND19DYGND19

DY

GND20

GND20 GNDPAD

GNDPAD

1

DY

1

GND1

GND1 SPRING-1

SPRING-1

DY

1

GND4

GND4 SPRING-1

SPRING-1

DY

1

DY

B B

GND8

GND8 GNDPAD

GNDPAD

1

SPRING-1

DY

GND3

1

GND10

GND10 GNDPAD

GNDPAD

DY

1

DY

1

DY

GND7

GND7 SPRING-24

SPRING-24

GND12

GND12 GNDPAD

GNDPAD

1

GND11

GND11 GNDPAD

GNDPAD

DY

1

GND5

GND5 GNDPAD

GNDPAD

DY

1

DY

GND14

GND14 GNDPAD

GNDPAD

1

GND9DYGND9

DY

1

GND6

GND6 GNDPAD

GNDPAD

DY

1

GND13DYGND13

DY

1

DY

GND15DYGND15

1

GND16

1

SPRING-23

DY

GND21

GND21 GNDPAD

GNDPAD

1

DY

1

GND22

GND22 GNDPAD

GNDPAD

1

DY

GND24

GND24 GNDPAD

GNDPAD

1

DY

GND25

GND25 GNDPAD

GNDPAD

1

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

EMI COMPONENTS

Size Document Number Rev

A3

SNIPE

Date: Sheet

of

56 56Thursday, November 18, 2004

SA

A

Acer Aspire 3010, Aspire 5010 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual