5
-9%ORFN'LDJUDP
D D
C C
LINE IN
29
Int MIC
18
MIC In
29
INT.SPKR
1.5W
B B
29
LINE OUT
29
RJ11
CLK GEN.
ICS9LPRS365B
800/1066 MHz
800/1066 MHz
Codec
ALC888S
OP AMP
MAX9789A
MODEM
MDC Card
3
DDR3
16,17
DDR3
16,17
27
30
30
AZALIA
HDD SATA
ODD SATA
4
Mobile CPU
Penryn
HOST BUS 667/800/1066MHz@1.05V
Cantiga
AGTL+ CPU I/F
DDR Memory I/F
INTEGRATED GRAHPICS
LVDS, CRT I/F
ICH9M
6 PCIe ports
PCI/PCI BRIDGE
ACPI 2.0
4 SATA
12 USB 2.0/1.1 ports
High Definition Audio
LPC I/F
Serial Peripheral I/F
Mini USB
Blue Tooth
Finger
Printer
6,7,8,9,10,11
C-Link0
12,13,14,15
23
37
SATA
SATA
21
22
X4 DMI
400MHz
ETHERNET (10/100/1000MbE)
Matrix Storage Technology(DO)
Active Managemnet Technology(DO)
4, 5
USB
Camera
PCIex16
USB
PCIe
LPC BUS
USB
4 Port
SMSC
EMC2102
24
3
34
VRAM
64MbX16X4 512M
VGA
N10M-GE-1
CardBus
RTS5159
LAN
Giga LAN
BCM5764
New Card
Touch
Pad
KBC
Winbond
WPCE773
37 35
52~57
INT.
KB
MS/MS Pro/xD
SPI
PWR SW
TPS2231
BIOS
(2MB)
MEDIA
KEY
/MMC/SD
36
38
31
25
32 32
Mini 1 Card
Wire LAN
Mini 2 Card
3G card
35
33
33
TXFM RJ45
26 26
LPC
DEBUG
36
CONN.
2
Project code: 91.4CG01.001
PCB P/N : 48.4CG01.0SA
REVISION : 08245-SA
TOP
GND
GND
HDMI
LCD
CRT
20
18
19
BOTTOM
S
S
PCB STACKUP
1
SYSTEM DC/DC
ISL62392
INPUTS
DCBATOUT
SYSTEM DC/DC
L1
TPS51124
L2
INPUTS OUTPUTS
L3
DCBATOUT
L4
L5
RT9026
L6
1D5V_S3
RT9018
1D5V_S3 1D1V_S0(2A)
TPS51117
DCBATOUT FBVDD(4A)
CHARGER
ISL88731A
CPU DC/DC
ISL6266A
INPUTS
DCBATOUT
VGA_CORE
RT8202A
INPUTS
DCBATOUT
GFXCORE
ISL6263A
INPUTS
DCBATOUT
OUTPUTS
5V_S5(6A)
3D3V_S5(7A)
5V_AUX_S5
3D3V_AUX_S5
1D05V_S0(9A)
1D5V_S3(12A)
DDR_VREF_S3
(1.2A)
OUTPUTS INPUTS
BT+ DCBATOUT
OUTPUTS
VCC_CORE
38A
OUTPUTS
VGA_CORE
13A
OUTPUTS
VCC_GFXCORE
(7A)
42
43
44
44
45
47
41
47
46
A A
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Title
Title
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
Date: Sheet of
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
JV50
JV50
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1
SB
SB
SB
16 0 Thursday, January 08, 2009
16 0 Thursday, January 08, 2009
16 0 Thursday, January 08, 2009
of
of
ICH9M Functional Strap Definitions
Signal
HDA_SDOUT
HDA_SYNC
4 4
GNT2#/
GPIO53
GPIO20
GNT1#/
GPIO51
GNT3#/
GPIO55
GNT0#:
SPI_CS1#/
GPIO58
SPI_MOSI
3 3
GPIO49
SATALED#
SPKR
TP3
GPIO33/
HDA_DOCK
_EN#
Usage/When Sampled
XOR Chain Entrance/
PCIE Port Config1 bit1,
Rising Edge of PWROK
PCIE config1 bit0,
Rising Edge of PWROK.
PCIE config2 bit2,
Rising Edge of PWROK.
Reserved
ESI Strap (Server Only)
Rising Edge of PWROK
Top-Block
Swap Override.
Rising Edge of PWROK.
Boot BIOS Destination
Selection 0:1.
Rising Edge of PWROK.
Integrated TPM Enable,
Rising Edge of CLPWROK
DMI Termination Voltage,
Rising Edge of PWROK.
PCI Express Lane
Reversal. Rising Edge
of PWROK.
No Reboot.
Rising Edge of PWROK.
XOR Chain Entrance.
Rising Edge of PWROK.
Flash Descriptor
Security Override Strap
Rising Edge of PWROK
ICH9 EDS 642879 Rev.1.5
Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h). This signal has weak internal pull-down
This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
This signal has a weak internal pull-up.
Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.
ESI compatible mode is for server platforms only.
This signal should not be pulled low for desttop
and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
Sample low: the Integrated TPM will be disabled.
Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.
The signal is required to be low for desktop
applications and required to be high for
mobile applications.
Signal has weak internal pull-up. Sets bit 27
of MPC.LR(Device 28:Function 0:Offset D8)
If sampled high, the system is strapped to the
"No Reboot" mode(ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.
This signal should not be pull low unless using
XOR Chain testing.
Sampled low:the Flash Descriptor Security will be
overridden. If high,the security measures will be
in effect.This should only be enabled in manufacturing
environments using an external pull-up resister.
2 2
A
Comment
B
ICH9M Integrated Pull-up
page 92
and Pull-down Resistors
SIGNAL Resistor Type/Value
CL_CLK[1:0]
CL_DATA[1:0]
CL_RST0#
DPRSLPVR/GPIO16
ENERGY_DETECT
HDA_BIT_CLK
HDA_DOCK_EN#/GPIO33
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GLAN_DOCK#
GNT[3:0]#/GPIO[55,53,51]
GPIO[20]
GPIO[49]
LDA[3:0]#/FHW[3:0]#
LAN_RXD[2:0]
LDRQ[0]
LDRQ[1]/GPIO23
PME#
PWRBTN#
SATALED#
SPI_CS1#/GPIO58/CLGPIO6
SPI_MOSI
SPI_MISO
SPKR
TACH_[3:0]
TP[3]
USB[11:0][P,N]
C
Cantiga chipset and ICH9M I/O controller
Hub strapping configuration
ICH9 EDS 642879 Rev.1.5
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
The pull-up or pull-down active when configured for native
GLAN_DOCK# functionality and determined by LAN controller
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 15K
D
E
Montevina Platform Design guide 22339 0.5
CFG20
Strap Description
FSB Frequency
Select
Reserved
DMI x2 Select
iTPM Host
Interface
Intel Management
engine Crypto strap
PCIE Graphics Lane
XOR/ALL
FSB Dynamic ODT
DMI Lane Reversal
Digital Display Port
(SDVO/DP/iHDMI)
Concurrent with PCIe
SDVO Present
Local Flat Panel
(LFP) Present
Pin Name
CFG[2:0]
CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]
CFG5
CFG6
CFG7
CFG9
CFG10 PCIE Loopback enable
CFG[13:12]
CFG16
CFG19
SDVO_CTRLDATA
L_DDC_DATA
NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
Flash-decriptor section of the Firmware. This 'Soft-Strap' is
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.
Configuration
000 = FSB1067
011 = FSB667
010 = FSB800
others = Reserved
0 = DMI x2
1 = DMI x4
0= The iTPM Host Interface is enabled(Note2)
1=The iTPM Host Interface is disalbed(default)
0 = Transport Layer Security (TLS) cipher
suite with no confidentiality
1 = TLS cipher suite with
confidentiality (default)
1 = Reverse Lanes
DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
DMI x2 mode[MCH -> ICH]:(3->0,2->1)
0 = Only Digital Display Port
or PCIE is operational (Default)
1 =Digital display Port and PCIe are
operting simulataneously via the PEG port
(Default)
0 = Reverse Lanes,15->0,14->1 ect..
1= Normal operation(Default):Lane
Numbered in order
0 = Enable (Note 3)
1= Disabled (default)
00 = Reserve
10 = XOR mode Enabled
01 = ALLZ mode Enabled (Note 3)
11 = Disabled (default)
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled
0 = Normal operation(Default):
Lane Numbered in Order
0 =No SDVO Card Present (Default)
1 = SDVO Card Present
0 = LFP Disabled (Default)
1= LFP Card Present; PCIE disabled
page 218
(Default)
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A
B
C
D
JV50
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Reference
Reference
Reference
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
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of
of
26 0 Thursday, January 08, 2009
26 0 Thursday, January 08, 2009
26 0 Thursday, January 08, 2009
E
SB
SB
SB
3D3V_S0
SB 1202
R554
R554
1 2
0R0603-PAD
0R0603-PAD
A
3D3V_VDD48_S0
1 2
C456
C456
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
B
1D05V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C455
C455
C457
C457
SC1U16V3ZY-GP
SC1U16V3ZY-GP
DY
DY
DY
DY
SB 1202 SB 1202 SB 1202 SB 1202
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
1 2
C417
C417
C450
C450
DY
DY
1 2
C435
C435
C444
C444
C
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C416
C416
C436
C436
DY
DY
D
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C419
C419
C430
C430
DY
DY
SCD1U16V2ZY-2GP
1 2
1 2
C445
C445
1 2
C448
C448
C454
C454
E
3D3V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C418
C418
DY
DY
4 4
3D3V_S0
1 2
R260
R260
10KR2J-3-GP
10KR2J-3-GP
DIS
DIS
PCLKCLK4
1 2
R254
R254
10KR2J-3-GP
10KR2J-3-GP
UMA
UMA
3D3V_S0
RN48
RN48
PCLKCLK2
3 3
CPU_SEL2 4,7
CLK_ICH14 13
CLK48_ICH 13
PCLK_KBC 35
PCLK_ICH 13
2 2
ICS9LPRS365YGLFT setting table
PIN NAME DESCRIPTION
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
1 1
PCI4/27M_SEL
PCI_F5/ITP_EN
SRCT3/CR#_C
4 5
CPU_SEL2_R
3
6
2
7
PCLKCLK5
1
8
SRN10KJ-6-GP
SRN10KJ-6-GP
RN46
RN46
CPU_SEL2_R
1
8
CLK48
2
7
PCLKCLK4
3
6
PCLKCLK5
4 5
SRN33J-7-GP
SRN33J-7-GP
-1
CLK_ICH14
1 2
EC25 SC33P50V2JN-3GP EC25 SC33P50V2JN-3GP
PCLK_FWH
1 2
EC24 SC33P50V2JN-3GP EC24 SC33P50V2JN-3GP
PCLK_ICH
1 2
EC23 SC33P50V2JN-3GP EC23 SC33P50V2JN-3GP
PCLK_KBC
1 2
EC39 SC33P50V2JN-3GP EC39 SC33P50V2JN-3GP
CLK48_ICH
1 2
EC48 SC33P50V2JN-3GP EC48 SC33P50V2JN-3GP
EMI capacitor for Antenna team suggestion
Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair
0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#
1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#
0 =SRC8/SRC8#
1 = ITP/ITP#
Byte 5, bit 3
0 = SRC3 enabled (default)
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair
Byte 5, bit 2
0 = CR#_C controls SRC0 pair (default),
1= CR#_C controls SRC2 pair
A
CL=20pF±0.2pF
C453
CPU_SEL0 4,7
CLK48_5158E 31
modify by RF
PCLK_FWH 36,51
C453
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1 2
1 2
C452
C452
SC33P50V2JN-3GP
SC33P50V2JN-3GP
C451
C451
DY
DY
1 2
SC47P50V2JN-3GP
SC47P50V2JN-3GP
GEN_XTAL_OUT
X5
X5
X-14D31818M-35GP
X-14D31818M-35GP
82.30005.891
82.30005.891
1 2
GEN_XTAL_IN
R251 2K2R2J-2-GP R251 2K2R2J-2-GP
1 2
R253 33R2J-2-GP R253 33R2J-2-GP
1 2
PM_STPPCI# 13
PM_STPCPU# 13
SMBC_ICH 15,16,17
SMBD_ICH 15,16,17
3D3V_S0
CLK_PWRGD 13
R249 10KR2J-3-GPDYR249 10KR2J-3-GP
R255 33R2J-2-GP R255 33R2J-2-GP
-1
DY
1 2
TP158 TPAD14-GP TP158 TPAD14-G P
CPU_SEL1 4,7
1 2
PCLKCLK0
PCLKCLK1
PCLKCLK2
PCLKCLK3
1
PCLKCLK4
PCLKCLK5
CPU_SEL2_R
CLK48
CLK48
3
2
17
45
44
7
6
63
8
10
11
12
13
14
64
5
55
SB 1202
PIN NAME DESCRIPTION
SRCC3/CR#_D
SRCC7/CR#_E
SRCT7/CR#_F
SRCC11/CR#_G
http://laptop-motherboard-schematic.blogspot.com/
B
SRCT11/CR#_H
SB 1202
3D3V_S0 1D05V_S0
3D3V_VDD48_S0
U24
U24
4
16
VDD48
VDDREF
X1
X2
USB_48MHZ/FSLA
PCI_STOP#
CPU_STOP#
SCLK
SDATA
CK_PWRGD/PD#
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN
FSLB/TEST_MODE
REF0/FSLC/TEST_SEL
NC#55
GNDPCI
GND48
15
18
Byte 5, bit 1
0 = SRC3 enabled (default)
1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
Byte 5, bit 0
0 = CR#_D controls SRC1 pair (default)
1= CR#_D controls SRC4 pair
Byte 6, bit 7
0 = SRC7# enabled (default)
1= CR#_F controls SRC6
Byte 6, bit 6
0 = SRC7 enabled (default)
1= CR#_F controls SRC8
Byte 6, bit 5
0 = SRC11# enabled (default)
1= CR#_G controls SRC9
Byte 6, bit 4
0 = SRC11 enabled (default)
1= CR#_H controls SRC10
C
27
9
19
33
43
52
VDD96_IO
GNDSRC
GNDSRC
GNDSRC
GNDCPU
30
36
49
59
56
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDPLL3_IO
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
SRCT11/CR#_H
SRCC11/CR#_G
27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2
SRCT0/DOTT_96
SRCC0/DOTC_96
GND
GND
ICS9LPRS365BKLFT-GP-U
ICS9LPRS365BKLFT-GP-U
26
65
71.09365.A03
71.09365.A03
1
2
3
4 5
CPUT0
CPUC0
CPUT1_F
CPUC1_F
SRCT7/CR#_F
SRCC7/CR#_E
SRCT6
SRCC6
SRCT10
SRCC10
SRCT9
SRCC9
SRCT4
SRCC4
SRCT3/CR#_C
SRCC3/CR#_D
SRCT2/SATAT
SRCC2/SATAC
RN45
RN45
DY
DY
SRN470J-3-GP
SRN470J-3-GP
8
7
6
61
60
58
57
54
53
51
50
48
47
41
42
40
39
37
38
34
35
31
32
28
29
24
25
20
21
PCLKCLK0
PCLKCLK1
CR#_H
CR#_G
CR#_H
CR#_G
DREFSSCLK_1
DREFSSCLK_1#
DREFCLK_1
DREFCLK_1#
3D3V_S0
D
23
46
62
VDDPCI
VDDSRC
VDDCPU
VDDPLL3
GNDREF
GND
1
22
SATACLKREQ# 13
CLK_MCH_OE# 7
LAN_CLKREQ# 25
WLAN_CLKR E Q# 33
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_PCIE_ICH 13
CLK_PCIE_ICH# 13
CLK_PCIE_NEW 32
CLK_PCIE_NEW# 32
CLK_PCIE_PEG 52
CLK_PCIE_PEG# 52
CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25
CLK_ PCIE_M INI1 33
CLK_ PCIE_M INI1# 33
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_ PCIE_M INI2 33
CLK_ PCIE_M INI2# 33
CLK_PCIE_SATA 12
DIS
DIS
-1
123
4 5
RN47
RN47
SRN10KJ-6-GP
SRN10KJ-6-GP
DY
DY
678
RN42
RN42
1
4
SRN33J-5-GP-U
SRN33J-5-GP-U
2 3
RN44
RN44
1
4
SRN0J-6-GP
SRN0J-6-GP
2 3
UMA
UMA
RN76
RN76
1
4
SRN0J-6-GP
SRN0J-6-GP
2 3
UMA
UMA
SEL2
FSC
1
0
01
0
00 0
JV50
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Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CLK_PCIE_SATA# 12
VGA_XIN1 52
OSC_SPREAD 52
DREFCLK 7
DREFCLK# 7
DREFSSCLK 7
DREFSSCLK# 7
-1
VGA_XIN1
EC68 SC33P50V2JN-3GP
EC68 SC33P50V2JN-3GP
OSC_SPREAD
EC69 SC33P50V2JN-3GP
EC69 SC33P50V2JN-3GP
SEL1
SEL0
FSB
FSA
01
01
1
0 1
Clock Generator
Clock Generator
Clock Generator
JV50
JV50
JV50
CPU
NB
SB DMI
NEWCARD
GPU
LAN
WLAN
NB CLK
3G
SB SATA
GPU
NB
NB
1 2
DY
DY
1 2
DY
DY
CPU
FSB
100M
133M
166M
200M
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
E
X
533M
667M
800M
1067M 266M
of
36 0 Thursday, January 08, 2009
of
36 0 Thursday, January 08, 2009
of
36 0 Thursday, January 08, 2009
SB
SB
SB
A
B
C
D
E
H_A#[35..3] 6
4 4
H_ADSTB#0 6
H_REQ#[4..0] 6
3 3
H_ADSTB#1 6
H_A20M# 12
H_FERR# 12
H_IGNNE# 12
H_STPCLK# 12
2 2
1 1
H_A#[35..3]
1 OF 4
1 OF 4
CPU1A
CPU1A
H_A#3
J4
A3#
H_A#4
L5
A4#
H_A#5
L4
H_A#6
K5
H_A#7
M3
H_A#8
N2
H_A#9
J1
H_A#10
N3
H_A#11
P5
H_A#12
P2
H_A#13
L2
H_A#14
P4
H_A#15
P1
H_A#16
R1
M1
H_REQ#0
K3
H_REQ#1
H2
H_REQ#2
K2
H_REQ#3
J3
H_REQ#4
L1
H_A#17
Y2
H_A#18
U5
H_A#19
R3
H_A#20
W6
H_A#21
U4
H_A#22
Y5
H_A#23
U1
H_A#24
R4
H_A#25
T5
H_A#26
T3
H_A#27
W2
H_A#28
W5
H_A#29
Y4
H_A#30
U2
H_A#31
V4
H_A#32
W3
H_A#33
AA4
H_A#34
AB2
H_A#35
AA3
V1
A6
A5
C4
D5
H_INTR 12
H_NMI 12
H_SMI# 12
TP97 TPAD14-GP TP97 TPAD14-GP
1
A
C6
B4
A3
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
B1
BGA479-SKT6-GPU7
BGA479-SKT6-GPU7
62.10079.001
62.10079.001
2nd = 62.10053.401
2nd = 62.10053.401
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6
KEY_NC
ADDR GROUP 0
ADDR GROUP 0
ADDR GROUP 1
ADDR GROUP 1
ICH
ICH
RESERVED
RESERVED
H1
ADS#
E2
BNR#
G5
BPRI#
H5
DEFER#
F21
DRDY#
E1
DBSY#
F1
BR0#
D20
IERR#
B3
INIT#
H4
LOCK#
C1
RESET#
F3
RS0#
F4
RS1#
G3
RS2#
G2
TRDY#
G6
HIT#
E4
HITM#
AD4
BPM0#
AD3
BPM1#
AD1
BPM2#
AC4
BPM3#
AC2
PRDY#
AC1
PREQ#
AC5
TCK
AA6
TDI
AB3
TDO
AB5
TMS
AB6
TRST#
C20
DBR#
XDP/ITP SIGNALS CONTROL
XDP/ITP SIGNALS CONTROL
THERMAL
THERMAL
D21
PROCHOT#
A24
THRMDA
B25
THRMDC
C7
THERMTRIP#
A22
HCLK
HCLK
BCLK0
A21
BCLK1
http://laptop-motherboard-schematic.blogspot.com/
TP74 TPAD14-GP TP74 TPAD14-GP
1
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BREQ#0 6
H_IERR#
H_INIT # 12
H_LOCK# 6
H_CPURST# 6,51
H_RS#0
H_RS#1
H_RS#2
H_TRDY# 6
H_HIT# 6
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
H _HITM# 6
TP28 TPAD14-GP TP28 TPAD14-GP
1
TP27 TPAD14-GP TP27 TPAD14-GP
1
TP26 TPAD14-GP TP26 TPAD14-GP
1
TP32 TPAD14-GP TP32 TPAD14-GP
1
TP29 TPAD14-GP TP29 TPAD14-GP
1
TP30 TPAD14-GP TP30 TPAD14-GP
1
TP34 TPAD14-GP TP34 TPAD14-GP
1
TP50 TPAD14-GP TP50 TPAD14-GP
1
TP31 TPAD14-GP TP31 TPAD14-GP
1
TP49 TPAD14-GP TP49 TPAD14-GP
1
TP33 TPAD14-GP TP33 TPAD14-GP
1
TP88 TPAD14-GP TP88 TPAD14-GP
1
XDP_TMS
R54 54D9R2F-L1-GP R54 54D9R2F-L1-GP
XDP_TDI
R55 54D9R2F-L1-GP R55 54D9R2F-L1-GP
XDP_BPM#5
R46 54D9R2F-L1-GP R46 54D9R2F-L1-GP
XDP_TDO
R47 54D9R2F-L1-GP
R47 54D9R2F-L1-GP
H_CPURST#
R113 51R2F-2-GP
R113 51R2F-2-GP
XDP_DBRESET#
R105 1KR2J-1-GP
R105 1KR2J-1-GP
XDP_TCK
R32 54D9R2F-L1-GP R32 54D9R2F-L1-GP
XDP_TRST#
R33 54D9R2F-L1-GP R33 54D9R2F-L1-GP
All place within 2" to CPU
B
H_RS#[2..0] 6
CPU_PROCHOT#_1
H_THERMDA 34
H_THERMDC 34
PM_THRMTRIP-A# 7,12,39
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
1 2
1 2
1 2
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
1 2
1D05V_S0
1 2
R88
R88
56R2J-4-GP
56R2J-4-GP
Place testpoint on
H_IERR# with a GND
0.1" away
C104
C104
1 2
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1D05V_S0
1 2
R89
R89
68R2-GP
68R2-GP
R97
R97
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
C90 SC47P50V2JN-3GP
C90 SC47P50V2JN-3GP
1 2
DY
DY
PH @ page48
Layout Note:
"CPU_GTLREF0"
0.5" max length.
1D05V_S0
3D3V_S0
DY
DY
modify by RF
H_THERMDA
H_THERMDC
Close to NB
CPU_PROCHOT#_R 41
should connect to PM_THRMTRIP#
without T-ing ICH9 and MCH
1D05V_S0
R309
R309
2KR2F-3-GP
2KR2F-3-GP
1 2
DY
DY
R119 1KR2J-1-GP
R119 1KR2J-1-GP
1 2
DY
DY
R114 1KR2J-1-GP
R114 1KR2J-1-GP
DY
DY
C
1 2
C116
C116
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
DY
DY
modify by RF
1KR2F-3-GP
1KR2F-3-GP
R312
R312
1 2
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
TEST1
TEST2
C525
C525
TEST4
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_DSTBN#0 6
H_DSTBP#0 6
H_DINV#0 6
H_DSTBN#1 6
H_DSTBP#1 6
H_DINV#1 6
CPU_GTLREF0
1 2
DY
DY
C526
C526
CPU_SEL0 3,7
CPU_SEL1 3,7
CPU_SEL2 3,7
Net "TEST4" as short as possible,
make sure "TEST4" routing is
reference to GND and away other
noisy signals
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
TEST1
TEST2
RSVD_CPU_12
TP87 TPAD14-GP TP87 TPAD14-GP
1
TEST4
RSVD_CPU_13
TP25 TPAD14-GP TP25 TPAD14-GP
1
RSVD_CPU_14 RSVD_CPU_11
TP180 TPAD14-GP TP180 TPAD14-GP
1
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGD
H_CPUSLP#
H_INIT #
H_CPURST#
Place these TP on button-side,
easy to measure.
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
CPU1B
CPU1B
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
AD26
C23
D25
C24
AF26
AF1
A26
B22
B23
C21
BGA479-SKT6-GPU7
BGA479-SKT6-GPU7
1
1
1
1
1
1
1
2 OF 4
2 OF 4
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
BSEL0
BSEL1
BSEL2
TP76 TPAD14-GP TP76 TPAD14-GP
TP95 TPAD14-GP TP95 TPAD14-GP
TP114 TPAD14-GP TP114 TPAD14-GP
TP81 TPAD14-GP TP81 TPAD14-GP
TP78 TPAD14-GP TP78 TPAD14-GP
TP92 TPAD14-GP TP92 TPAD14-GP
TP86 TPAD14-GP TP86 TPAD14-GP
D
DATA GRP0 DATA GRP1
DATA GRP0 DATA GRP1
MISC
MISC
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]
H_D#32
Y22
D32#
H_D#33
AB24
D33#
H_D#34
V24
D34#
H_D#35
V26
D35#
H_D#36
V23
D36#
H_D#37
T22
D37#
H_D#38
U25
D38#
H_D#39
U23
D39#
H_D#40
Y25
D40#
H_D#41
W22
D41#
H_D#42
Y23
D42#
H_D#43
W24
DATA GRP2 DATA GRP3
DATA GRP2 DATA GRP3
D43#
H_D#44
W25
D44#
H_D#45
AA23
D45#
H_D#46
AA24
D46#
H_D#47
AB25
D47#
Y26
DSTBN2#
AA26
DSTBP2#
U22
DINV2#
DSTBN3#
DSTBP3#
DINV3#
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
H_D#48
AE24
D48#
H_D#49
AD24
D49#
H_D#50
AA21
D50#
H_D#51
AB22
D51#
H_D#52
AB21
D52#
H_D#53
AC26
D53#
H_D#54
AD20
D54#
H_D#55
AE22
D55#
H_D#56
AF23
D56#
H_D#57
AC25
D57#
H_D#58
AE21
D58#
H_D#59
AD21
D59#
H_D#60
AC22
D60#
H_D#61
AD23
D61#
H_D#62
AF22
D62#
H_D#63
AC23
D63#
AE25
AF24
AC20
COMP0
R26
COMP1
U26
COMP2
AA1
COMP3
Y1
E5
B5
D24
D6
D7
SLP#
AE6
PSI#
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
JV50
JV50
JV50
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
H_D#[63..0] 6
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
R71 27D4R2F-L1-GP R71 27D4R2F-L1-GP
1 2
R67 54D9R2F-L1-GP R67 54D9R2F-L1-GP
1 2
R57 27D4R2F-L1-GP R57 27D4R2F-L1-GP
1 2
R60 54D9R2F-L1-GP R60 54D9R2F-L1-GP
1 2
H_DPRSTP# 7,12,41
H_DPSLP# 12
H_DPWR# 6
H_CPUSLP# 6
H_PSI# 41
Layout Note:
CPU (1 of 2)
CPU (1 of 2)
CPU (1 of 2)
JV50
JV50
JV50
1 2
C102
C102
DY
DY
SC100P50V2JN-3 GP
SC100P50V2JN-3GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
E
H_PWRGD 12,39,51
of
46 0 Thursday, January 08, 2009
of
46 0 Thursday, January 08, 2009
of
46 0 Thursday, January 08, 2009
SB
SB
SB
A
VCC_CORE
1 2
C86
C86
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
1D05V_S0_CPU
C57
C57
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
DY
G2
G2
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
C58
C58
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
H_VID[6..0] 41
VCC_CORE
1 2
1 2
VCC_CORE
4 4
3 3
2 2
1 1
CPU1C
CPU1C
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
BGA479-SKT6-GPU7
BGA479-SKT6-GPU7
3 OF 4
3 OF 4
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCSENSE
VCC
VCC
VCC
VSSSENSE
A
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCA
VCCA
VCC_CORE
AB20
VCC
AB7
VCC
AC7
VCC
AC9
VCC
AC12
VCC
AC13
VCC
AC15
VCC
AC17
VCC
AC18
VCC
AD7
VCC
AD9
VCC
AD10
VCC
AD12
VCC
AD14
VCC
AD15
VCC
AD17
VCC
AD18
VCC
AE9
VCC
AE10
VCC
AE12
VCC
AE13
VCC
AE15
VCC
AE17
VCC
AE18
VCC
AE20
VCC
AF9
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF15
VCC
AF17
VCC
AF18
VCC
AF20
VCC
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
H_VID0
AD6
VID0
H_VID1
AF5
VID1
H_VID2
AE5
VID2
H_VID3
AF4
VID3
H_VID4
AE3
VID4
H_VID5
AF3
VID5
H_VID6
AE2
VID6
AF7
AE7
B
VCC_CORE
1 2
1 2
1 2
C85
C85
C56
C56
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
DY
DY
DY
DY
1D05V_S0
layout note: "1D5V_VCCA_S0"
as short as possible
1D5V_VCCA_S0
R25
R25
100R2F-L1- GP-U
100R2F-L1-GP-U
R24
R24
http://laptop-motherboard-schematic.blogspot.com/
Layout Note:
100R2F-L1- GP-U
100R2F-L1-GP-U
B
1 2
1 2
C87
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C603
C603
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C87
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
FCM1608KF-1-GP
FCM1608KF-1-GP
1 2
L18
L18
1 2
C606
C606
2nd = 68.00248.061
2nd = 68.00248.061
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
VCC_SENSE 41
VSS_SENSE 41
C55
C55
VCCSENSE and VSSSENSE lines
should be of equal length.
Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
1 2
1 2
C88
C88
C89
C89
C53
C53
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1D5V_S0
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
C50
C50
1D05V_S0
C
D
SB 1209
1 2
1 2
1 2
C52
C52
C553
C553
C51
C51
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
1 2
1 2
1 2
C539
C539
C538
C538
C552
C552
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
1 2
1 2
C548
C548
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
C536
C536
C547
C547
C537
C537
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
TP23 TPAD14-GP TP23 TPAD14-GP
1
SB 1208
1 2
1 2
1 2
C67
C67
C79
C79
C75
C75
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C
1 2
1 2
1 2
C84
C84
C80
C80
C83
C83
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
DY
DY
D
E
4 OF 4
4 OF 4
CPU1D
CPU1D
A4
VSS
A8
VSS
A11
VSS
A14
VSS
A16
VSS
A19
VSS
A23
VSS
TP_AF2_CPU
AF2
VSS
B6
VSS
B8
VSS
B11
VSS
B13
VSS
B16
VSS
B19
VSS
B21
VSS
B24
VSS
C5
VSS
C8
VSS
C11
VSS
C14
VSS
C16
VSS
C19
VSS
C2
VSS
C22
VSS
C25
VSS
D1
VSS
D4
VSS
D8
VSS
D11
VSS
D13
VSS
D16
VSS
D19
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E11
VSS
E14
VSS
E16
VSS
E19
VSS
E21
VSS
E24
VSS
F5
VSS
F8
VSS
F11
VSS
F13
VSS
F16
VSS
F19
VSS
F2
VSS
F22
VSS
F25
VSS
G4
VSS
G1
VSS
G23
VSS
G26
VSS
H3
VSS
H6
VSS
H21
VSS
H24
VSS
J2
VSS
J5
VSS
J22
VSS
J25
VSS
K1
VSS
K4
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L21
VSS
L24
VSS
M2
VSS
M5
VSS
M22
VSS
M25
VSS
N1
VSS
N4
VSS
N23
VSS
N26
VSS
P3
VSS
BGA479-SKT6-GPU7
BGA479-SKT6-GPU7
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
P6
VSS
P21
VSS
P24
VSS
R2
VSS
R5
VSS
R22
VSS
R25
VSS
T1
VSS
T4
VSS
T23
VSS
T26
VSS
U3
VSS
U6
VSS
U21
VSS
U24
VSS
V2
VSS
V5
VSS
V22
VSS
V25
VSS
W1
VSS
W4
VSS
W23
VSS
W26
VSS
Y3
VSS
Y6
VSS
Y21
VSS
Y24
VSS
AA2
VSS
AA5
VSS
AA8
VSS
AA11
VSS
AA14
VSS
AA16
VSS
AA19
VSS
AA22
VSS
AA25
VSS
AB1
VSS
AB4
VSS
AB8
VSS
AB11
VSS
AB13
VSS
AB16
VSS
AB19
VSS
AB23
VSS
AB26
VSS
AC3
VSS
AC6
VSS
AC8
VSS
AC11
VSS
AC14
VSS
AC16
VSS
AC19
VSS
AC21
VSS
AC24
VSS
AD2
VSS
AD5
VSS
AD8
VSS
AD11
VSS
AD13
VSS
AD16
VSS
AD19
VSS
AD22
VSS
AD25
VSS
AE1
VSS
AE4
VSS
AE8
VSS
AE11
VSS
AE14
VSS
AE16
VSS
AE19
VSS
AE23
VSS
TP_AE26_CPU
AE26
VSS
TP_A2_CPU
A2
VSS
AF6
VSS
AF8
VSS
AF11
VSS
AF13
VSS
AF16
VSS
AF19
VSS
AF21
VSS
TP_A25_CPU
A25
VSS
AF25
VSS
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
CPU (2 of 2)
CPU (2 of 2)
CPU (2 of 2)
JV50
JV50
JV50
56 0 Thursday, January 08, 2009
56 0 Thursday, January 08, 2009
56 0 Thursday, January 08, 2009
E
1
1
1
of
of
of
TP174 TPAD14-GP TP174 TPAD14-GP
TP98 TPAD14-GP TP98 TPAD14-GP
TP181 TPAD14-GP TP181 TPAD14-GP
SB
SB
SB
5
H_SWING
1 2
C619
C619
H_RCOMP
24D9R2F-L-GP
24D9R2F-L-GP
1D05V_S0
1 2
R381
R381
221R2F-2-GP
221R2F-2-GP
1 2
R382
R382
100R2F-L1-GP-U
100R2F-L1-GP-U
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D D
H_SWING routing Trace width and
Spacing use 10 / 20 mil
H_SWING Resistors and
Capacitors close MCH
500 mil ( MAX )
C C
H_RCOMP routing Trace width and
Spacing use 10 / 20 mil
1 2
R380
R380
Place them near to the chip ( < 0.5")
B B
1D05V_S0
R370
R370
1KR2F-3-GP
1KR2F-3-GP
1 2
1 2
R389
R389
2KR2F-3-GP
2KR2F-3-GP
4
H_AVREF
H_D#[63..0]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_CPURST# 4,51
H_CPUSLP# 4
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C614
C614
H_D#[63..0] 4
NB1A
NB1A
F2
H_D#_0
G8
H_D#_1
F8
H_D#_2
E6
H_D#_3
G2
H_D#_4
H6
H_D#_5
H2
H_D#_6
F6
H_D#_7
D4
H_D#_8
H3
H_D#_9
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
AD14
H_D#_33
Y6
H_D#_34
Y10
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
AA8
H_D#_40
Y9
H_D#_41
AA13
H_D#_42
AA9
H_D#_43
AA11
H_D#_44
AD11
H_D#_45
AD10
H_D#_46
AD13
H_D#_47
AE12
H_D#_48
AE9
H_D#_49
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
H_D#_53
AD7
H_D#_54
AE14
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
AE11
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
C5
H_SWING
E3
H_RCOMP
C12
H_CPURST#
E11
H_CPUSLP#
A11
H_AVREF
B11
H_DVREF
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
3
1 OF 10
1 OF 10
A14
H_A#_3
C15
H_A#_4
F16
H_A#_5
H13
H_A#_6
C18
H_A#_7
M16
H_A#_8
J13
H_A#_9
P16
H_A#_10
R16
H_A#_11
N17
H_A#_12
M13
H_A#_13
E17
H_A#_14
P17
H_A#_15
F17
H_A#_16
G20
H_A#_17
B19
H_A#_18
J16
H_A#_19
E20
H_A#_20
H16
H_A#_21
J20
H_A#_22
L17
H_A#_23
A17
H_A#_24
B17
H_A#_25
L16
H_A#_26
C21
H_A#_27
J17
H_A#_28
H20
H_A#_29
B18
H_A#_30
K17
H_A#_31
B20
H_A#_32
F21
H_A#_33
K21
H_A#_34
L20
H_A#_35
H12
H_ADS#
B16
H_ADSTB#_0
G17
H_ADSTB#_1
A9
H_BNR#
F11
H_BPRI#
G12
H_BREQ#
E9
H_DEFER#
B10
H_DBSY#
AH7
HPLL_CLK
AH6
HPLL_CLK#
J11
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
F9
H9
E12
H11
C9
J8
L3
Y13
Y1
L10
M7
AA5
AE6
L9
M8
AA6
AE5
B15
K13
F13
B13
B14
B6
F12
C8
HOST
HOST
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
2
H_A#[35..3]
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BREQ#0 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPWR# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
1
H_A#[35..3] 4
H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_REQ#[4..0] 4
H_RS#[2..0] 4
A A
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
JV50
JV50
JV50
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
Cantiga (1 of 6)
Cantiga (1 of 6)
Cantiga (1 of 6)
JV50
JV50
JV50
66 0 Thursday, January 08, 2009
66 0 Thursday, January 08, 2009
66 0 Thursday, January 08, 2009
1
of
of
of
SB
SB
SB
5
D D
CPU_SEL0 3,4
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SB 1202
R192
R192
1 2
0R0402-PAD
0R0402-PAD
R195
R195
1 2
0R0402-PAD
0R0402-PAD
R203 100R2J-2-GP R203 100R2J-2-GP
C324
C324
DY
DY
1 2
12
PM_DPRSLPVR_MCH
LCTLA_CLK
LCTLB_DATA
PM_EXTTS#0
PM_EXTTS#1
CPU_SEL1 3,4
CPU_SEL2 3,4
PM_EXTTS#0
PM_EXTTS#1
RSTIN#
NB_THERMTRIP#
PM_DPRSLPVR_MCH
C C
1D5V_S3
1 2
R443
3D3V_S0
R193 4K02R2F-GP
R193 4K02R2F-GP
1 2
DY
DY
R385 2K21R2F-GP
R385 2K21R2F-GP
1 2
DY
DY
R556 2K21R2F-GP
R556 2K21R2F-GP
1 2
DY
DY
SB 1202
B B
A A
R443
80D6R2F-L-GP
80D6R2F-L-GP
M_RCOMPP
5
1 2
80D6R2F-L-GP
80D6R2F-L-GP
M_RCOMPN
R442
R442
PM_SYNC# 13
H_DPRSTP# 4,12,41
PM_EXTTS#0 16,17
PWROK 13,34
PLT_RST1# 13,25,31,32,33,35,36,51,52
PM_THRMTRIP-A# 4,12,39
PM_DPRSLPVR 13,41
CFG20
CFG9
CFG16
4
2 OF 10
NB1B
NB1B
M36
RESERVED#M36
N36
RESERVED#N36
R33
RESERVED#R33
T33
RESERVED#T33
AH9
RESERVED#AH9
AH10
RESERVED#AH10
AH12
RESERVED#AH12
AH13
RESERVED#AH13
K12
RESERVED#K12
AL34
RESERVED#AL34
AK34
RESERVED#AK34
AN35
RESERVED#AN35
AM35
RESERVED#AM35
T24
RESERVED#T24
B31
RESERVED#B31
B2
RESERVED#B2
M1
RESERVED#M1
AY21
RESERVED#AY21
BG23
RESERVED#BG23
BF23
RESERVED#BF23
BH18
RESERVED#BH18
BF18
RESERVED#BF18
T25
CFG_0
R25
CFG_1
P25
CFG_2
P20
CFG_3
P24
CFG_4
C25
CFG_5
N24
CFG_6
M24
CFG_7
E21
CFG_8
CFG9
C23
CFG_9
C24
CFG_10
N21
CFG_11
P21
CFG_12
T21
CFG_13
R20
CFG_14
M20
CFG_15
CFG16
L21
CFG_16
H21
CFG_17
P29
CFG_18
R28
CFG_19
CFG20
T28
CFG_20
R29
PM_SYNC#
B7
PM_DPRSTP#
N33
PM_EXT_TS#_0
P32
PM_EXT_TS#_1
AT40
PWROK
AT11
RSTIN#
T20
THERMTRIP#
R32
DPRSLPVR
BG48
NC#BG48
BF48
NC#BF48
BD48
NC#BD48
BC48
NC#BC48
BH47
NC#BH47
BG47
NC#BG47
BE47
NC#BE47
BH46
NC#BH46
BF46
NC#BF46
BG45
NC#BG45
BH44
NC#BH44
BH43
NC#BH43
BH6
NC#BH6
BH5
NC#BH5
BG4
NC#BG4
BH3
NC#BH3
BF3
NC#BF3
BH2
NC#BH2
BG2
NC#BG2
BE2
NC#BE2
BG1
NC#BG1
BF1
NC#BF1
BD1
NC#BD1
BC1
NC#BC1
F1
NC#F1
A47
NC#A47
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
MCH_TSATN#
GFXVR_EN
3D3V_S0
RN34
RN34
UMA
UMA
12 34
SRN10KJ-5-GP
SRN10KJ-5-GP
RN35
RN35
12 34
http://laptop-motherboard-schematic.blogspot.com/
SRN10KJ-5-GP
SRN10KJ-5-GP
4
2 OF 10
AP24
GFXVR_EN 46
AT21
AV24
AU20
AR24
AR21
AU24
AV20
BC28
AY28
AY36
BB36
BA17
AY16
AV16
AR13
BD17
AY17
BF15
AY13
M_RCOMPP
BG22
M_RCOMPN
BH21
SM_RCOMP_VOH
BF28
SM_RCOMP_VOL
BH28
AV42
DDR2 : connect to GND
AR36
SM_REXT
BF17
DDR3_DRAMRST#
BC36
B38
A38
E41
F41
F43
E43
AE41
AE37
AE47
AH39
AE40
AE38
AE48
AH40
AE35
AE43
AE46
AH42
AD35
AE44
AF46
AH43
B33
B32
G33
F33
E33
GFXVR_EN
C34
AH37
AH36
AN36
AJ35
MCH_CLVREF
AH34
for HDMI port C
N28
M28
G36
E36
CLK_MCH_OE#
K36
H36
MCH_TSATN#
B12
HDA_BCLK
B28
HDA_RST#
B30
HDA_SDI
B29
HDA_SDO
C29
HDA_SYNC
A28
M_CLK_DDR0 16
M_CLK_DDR1 16
M_CLK_DDR2 17
M_CLK_DDR3 17
M_CLK_DDR#0 16
M_CLK_DDR#1 16
M_CLK_DDR#2 17
M_CLK_DDR#3 17
M_CKE0 16
M_CKE1 16
M_CKE2 17
M_CKE3 17
M_CS0# 16
M_CS1# 16
M_CS2# 17
M_CS3# 17
M_ODT0 16
M_ODT1 16
M_ODT2 17
M_ODT3 17
R444 499R2F-2-GP R444 499R2F-2-GP
1 2
CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3
DMI_TXN0 13
DMI_TXN1 13
DMI_TXN2 13
DMI_TXN3 13
DMI_TXP0 13
DMI_TXP1 13
DMI_TXP2 13
DMI_TXP3 13
DMI_RXN0 13
DMI_RXN1 13
DMI_RXN2 13
DMI_RXN3 13
DMI_RXP0 13
DMI_RXP1 13
DMI_RXP2 13
DMI_RXP3 13
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
HDA_SYNC
HDA_RST#
HDA_SDO
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
SA_CKE_0
SA_CKE_1
SB_CKE_0
RSVD
RSVD
SB_CKE_1
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
DDR CLK/ CONTROL/COMPENSATION
DDR CLK/ CONTROL/COMPENSATION
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
CLK
CLK
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
CFG
CFG
DMI_TXN_3
DMI
DMI
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
PM
PM
GFX_VR_EN
GRAPHICS VID
GRAPHICS VID
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
ME HDA
ME HDA
CL_VREF
DDPC_CTRLCLK
DDPC_CTRLDATA
NC
NC
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
MISC
MISC
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
1D05V_S0
1 2
R387
R387
56R2J-4-GP
56R2J-4-GP
R178
R178
100KR2F-L1-GP
100KR2F-L1-GP
DY
DY
1 2
DDR3_D RAMRST# 16,17
DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3
PWROK 13,34
CL_RST#0 13
GMCH_HDMI_CLK 20
GMCH_HDMI_DATA 20
CLK_MCH_OE# 3
MCH_ICH_SYNC# 13
R419
R419
1 2
33R2J-2-GP
33R2J-2-GP
RN36
RN36
1
2
3
4 5
UMA
UMA
SRN33J-4-GP
SRN33J-4-GP
R445 1KR2F-3-GP R445 1KR2F-3-GP
1 2
R441
R441
3K01R2F-3-GP
3K01R2F-3-GP
R446
R446
1KR2F-3-GP
1KR2F-3-GP
1 2
GFX_VID[4 ..0] 46
CL_CLK0 13
CL_DATA0 13
ACZ_SDIN 3
UMA
UMA
ACZ_BIT_CLK HDA_BCLK
8
ACZ_SYNC_R
7
ACZ_RST#_R
6
ACZ_SDAT AOUT_ R
1 2
3
SM_PWROK 39
DDR_VREF_S3_1
0.75V
12
C335
C335
1D05V_S0
R201
R201
1KR2F-3-GP
1KR2F-3-GP
1 2
1 2
12
R200
R200
C288
C288
499R2F-2-GP
499R2F-2-GP
FOR Cantiga:500 ohm
Teenah: 392 ohm
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_S3
12
C756
C756
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
12
C757
C757
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
3
GMCH_LCDVDD_ON 18
0R0402-PAD
0R0402-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GMCH_BLUE 19
GMCH_GREEN 19
GMCH_RED 19
GMCH_DDCCLK 19
GMCH_DDCDATA 19
GMCH_HSYNC 19
GMCH_VSYNC 19
ACZ_SDIN 3 12
ACZ_BIT_CLK 12
ACZ_SYNC_R 12
ACZ_RST#_R 12
ACZ_SDAT AOUT_ R 12
SM_RCOMP_VOH
12
C759
C759
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SM_RCOMP_VOL
12
C760
C760
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
layout take note
L_BKLTCTL 18
GMCH_BL_ON 35
CLK_DDC_EDID 18
DAT_DDC_EDID 18
TP189 TPAD14-GP TP189 TPAD14-GP
R183
R183
1 2
GMCH_TXACLK- 18
GMCH_TXACLK+ 18
GMCH_TXBCLK- 18
GMCH_TXBCLK+ 18
GMCH_TXAOUT0- 18
GMCH_TXAOUT1- 18
GMCH_TXAOUT2- 18
GMCH_TXAOUT0+ 18
GMCH_TXAOUT1+ 18
GMCH_TXAOUT2+ 18
GMCH_TXBOUT0- 18
GMCH_TXBOUT1- 18
GMCH_TXBOUT2- 18
GMCH_TXBOUT0+ 18
GMCH_TXBOUT1+ 18
GMCH_TXBOUT2+ 18
GMCH_DDCCLK
GMCH_DDCDATA
R189
R189
1 2
0R0402-PAD
0R0402-PAD
R188
R188
1 2
0R0402-PAD
0R0402-PAD
1 2
UMA
UMA
R161 1K02R2F-1-GP
R161 1K02R2F-1-GP
FOR Cantiga: 1.02k_1% ohm
Teenah: 1.3k ohm
CRT_IREF routing Trace
width use 20 mil
LCTLA_CLK
LCTLB_DATA
CLK_DDC_EDID
DAT_DDC_EDID
GMCH_LCDVDD_ON
LIBG
L_LVBG
1
LVDS_VREF
TV_DACA
TV_DACB
TV_DACC
GMCH_BLUE
GMCH_GREEN
GMCH_RED
GMCH_HS
GMCH_VS
CRT_IREF
2
NB1C
NB1C
L32
L_BKLT_CTRL
G32
L_BKLT_EN
M32
L_CTRL_CLK
M33
L_CTRL_DATA
K33
L_DDC_CLK
J33
L_DDC_DATA
M29
L_VDD_EN
C44
LVDS_IBG
B43
LVDS_VBG
E37
LVDS_VREFH
E38
LVDS_VREFL
C41
LVDSA_CLK#
C40
LVDSA_CLK
B37
LVDSB_CLK#
A37
LVDSB_CLK
H47
LVDSA_DATA#_0
E46
LVDSA_DATA#_1
G40
LVDSA_DATA#_2
A40
LVDSA_DATA#_3
H48
LVDSA_DATA_0
D45
LVDSA_DATA_1
F40
LVDSA_DATA_2
B40
LVDSA_DATA_3
A41
LVDSB_DATA#_0
H38
LVDSB_DATA#_1
G37
LVDSB_DATA#_2
J37
LVDSB_DATA#_3
B42
LVDSB_DATA_0
G38
LVDSB_DATA_1
F37
LVDSB_DATA_2
K37
LVDSB_DATA_3
F25
TVA_DAC
H25
TVB_DAC
K25
TVC_DAC
H24
TV_RTN
C31
TV_DCONSEL_0
E32
TV_DCONSEL_1
E28
CRT_BLUE
G28
CRT_GREEN
J28
CRT_RED
G29
CRT_IRTN
H32
CRT_DDC_CLK
J32
CRT_DDC_DATA
J29
CRT_HSYNC
E29
CRT_TVO_IREF
L29
CRT_VSYNC
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
HDA_BCLK
1 2
EC21 SC12P50V2JN-3GP
EC21 SC12P50V2JN-3GP
DY
DY
2
LVDS
LVDS
TV VGA
TV VGA
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
SB 1202
PEG_TXN0_L
PEG_TXP0_L
PEG_TXN1_L
PEG_TXP1_L
PEG_TXN2_L
PEG_TXP2_L
PEG_TXN3_L
PEG_TXP3_L
PEG_RXP3 HDMI_DETECT#_L
GMCH_RED
GMCH_GREEN
GMCH_BLUE
FOR Discrete change RN to 0 ohm
(66.R0036.A8L)
FOR Discrete,change to 0 ohm
(66.R0036.A8L)
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
1 2
RN31
RN31
7
8
SRN75J-1-GP
SRN75J-1-GP
3 OF 10
3 OF 10
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R555
R555
0R2J-2-GP
0R2J-2-GP
1
2
3
4 5
RN30
RN30
SRN150F-1-GP
SRN150F-1-GP
UMA/DIS
UMA/DIS
34 56
2
1
UMA/DIS
UMA/DIS
PEG_CMP
T37
T36
PEG_RXN0
H44
PEG_RXN1
J46
PEG_RXN2
L44
PEG_RXN3
L40
PEG_RXN4
N41
PEG_RXN5
P48
PEG_RXN6
N44
PEG_RXN7
T43
PEG_RXN8
U43
PEG_RXN9
Y43
PEG_RXN10
Y48
PEG_RXN11
Y36
PEG_RXN12
AA43
PEG_RXN13
AD37
PEG_RXN14
AC47
PEG_RXN15
AD39
PEG_RXP0
H43
PEG_RXP1
J44
PEG_RXP2
L43
PEG_RXP3
L41
PEG_RXP4
N40
PEG_RXP5
P47
PEG_RXP6
N43
PEG_RXP7
T42
PEG_RXP8
U42
PEG_RXP9
Y42
PEG_RXP10
W47
PEG_RXP11
Y37
PEG_RXP12
AA42
PEG_RXP13
AD36
PEG_RXP14
AC48
PEG_RXP15
AD40
PEG_TXN0_L
J41
PEG_TXN1_L
M46
PEG_TXN2_L
M47
PEG_TXN3_L
M40
PEG_TXN4_L
M42
PEG_TXN5_L
R48
PEG_TXN6_L
N38
PEG_TXN7_L
T40
PEG_TXN8_L
U37
PEG_TXN9_L
U40
PEG_TXN10_L
Y40
PEG_TXN11_L
AA46
PEG_TXN12_L
AA37
PEG_TXN13_L
AA40
PEG_TXN14_L
AD43
PEG_TXN15_L
AC46
PEG_TXP0_L
J42
PEG_TXP1_L
L46
PEG_TXP2_L
M48
PEG_TXP3_L
M39
PEG_TXP4_L
M43
PEG_TXP5_L
R47
PEG_TXP6_L
N37
PEG_TXP7_L
T39
PEG_TXP8_L
U36
PEG_TXP9_L
U39
PEG_TXP10_L
Y39
PEG_TXP11_L
Y46
PEG_TXP12_L
AA36
PEG_TXP13_L
AA39
PEG_TXP14_L
AD42
PEG_TXP15_L
AD46
C600 SCD1U10V2KX-5GP
C600 SCD1U10V2KX-5GP
C605 SCD1U10V2KX-5GP
C605 SCD1U10V2KX-5GP
C596 SCD1U10V2KX-5GP
C596 SCD1U10V2KX-5GP
C598 SCD1U10V2KX-5GP
C598 SCD1U10V2KX-5GP
C589 SCD1U10V2KX-5GP
C589 SCD1U10V2KX-5GP
C592 SCD1U10V2KX-5GP
C592 SCD1U10V2KX-5GP
C568 SCD1U10V2KX-5GP
C568 SCD1U10V2KX-5GP
C561 SCD1U10V2KX-5GP
C561 SCD1U10V2KX-5GP
UMA
UMA
8
7
6
TV_DACC
TV_DACB
TV_DACA
1D05V_S0
1 2
R196 49D9R2F-GP R196 49D9R2F-GP
C270 SC47P50V2JN-3GP
C270 SC47P50V2JN-3GP
12
DY
DY
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
PEG_TXN0_L_1
PEG_TXP0_L_1
PEG_TXN1_L_1
PEG_TXP1_L_1
PEG_TXN2_L_1
PEG_TXP2_L_1
PEG_TXN3_L_1
PEG_TXP3_L_1
R61
R61
1 2
0R2J-2-GP
0R2J-2-GP
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Close to GMCH as 500 mils.
modify by RF
PEG_RXN[15..0] 52
PEG_RXP[15..0] 52
1
2 3
1
2 3
1
2 3
2 3
1
HDMI_DETECT# 20
GMCH_BL_ON
GMCH_LCDVDD_ON
LIBG
CRT_IREF
GMCH_VS
GMCH_HS
Cantiga (2 of 6)
Cantiga (2 of 6)
Cantiga (2 of 6)
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
RN82
RN82
4
SRN0J-10-GP-U
SRN0J-10-GP-U
RN83
RN83
4
SRN0J-10-GP-U
SRN0J-10-GP-U
RN84
RN84
4
SRN0J-10-GP-U
SRN0J-10-GP-U
RN85
RN85
SRN0J-10-GP-U
SRN0J-10-GP-U
4
RN32
RN32
2 3
1
SRN100KJ-6-GP
SRN100KJ-6-GP
UMA
UMA
1 2
R384 2K37R2F-GP
R384 2K37R2F-GP
DIS
DIS
1 2
R162 0R2J-2-GP
R162 0R2J-2-GP
RN33
RN33
2 3
1
SRN0J-10-GP-U
SRN0J-10-GP-U
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
JV50
JV50
JV50
1
C220 SCD1U10V2KX-5GP
C220 SCD1U10V2KX-5GP
C648 SCD1U10V2KX-5GP
C648 SCD1U10V2KX-5GP
C654 SCD1U10V2KX-5GP
C654 SCD1U10V2KX-5GP
C228 SCD1U10V2KX-5GP
C228 SCD1U10V2KX-5GP
C233 SCD1U10V2KX-5GP
C233 SCD1U10V2KX-5GP
C658 SCD1U10V2KX-5GP
C658 SCD1U10V2KX-5GP
C237 SCD1U10V2KX-5GP
C237 SCD1U10V2KX-5GP
C239 SCD1U10V2KX-5GP
C239 SCD1U10V2KX-5GP
C265 SCD1U10V2KX-5GP
C265 SCD1U10V2KX-5GP
C264 SCD1U10V2KX-5GP
C264 SCD1U10V2KX-5GP
C269 SCD1U10V2KX-5GP
C269 SCD1U10V2KX-5GP
C660 SCD1U10V2KX-5GP
C660 SCD1U10V2KX-5GP
C671 SCD1U10V2KX-5GP
C671 SCD1U10V2KX-5GP
C666 SCD1U10V2KX-5GP
C666 SCD1U10V2KX-5GP
C680 SCD1U10V2KX-5GP
C680 SCD1U10V2KX-5GP
C679 SCD1U10V2KX-5GP
C679 SCD1U10V2KX-5GP
C213 SCD1U10V2KX-5GP
C213 SCD1U10V2KX-5GP
C647 SCD1U10V2KX-5GP
C647 SCD1U10V2KX-5GP
C651 SCD1U10V2KX-5GP
C651 SCD1U10V2KX-5GP
C222 SCD1U10V2KX-5GP
C222 SCD1U10V2KX-5GP
C229 SCD1U10V2KX-5GP
C229 SCD1U10V2KX-5GP
C663 SCD1U10V2KX-5GP
C663 SCD1U10V2KX-5GP
C234 SCD1U10V2KX-5GP
C234 SCD1U10V2KX-5GP
C245 SCD1U10V2KX-5GP
C245 SCD1U10V2KX-5GP
C259 SCD1U10V2KX-5GP
C259 SCD1U10V2KX-5GP
C253 SCD1U10V2KX-5GP
C253 SCD1U10V2KX-5GP
C266 SCD1U10V2KX-5GP
C266 SCD1U10V2KX-5GP
C657 SCD1U10V2KX-5GP
C657 SCD1U10V2KX-5GP
C667 SCD1U10V2KX-5GP
C667 SCD1U10V2KX-5GP
C664 SCD1U10V2KX-5GP
C664 SCD1U10V2KX-5GP
C672 SCD1U10V2KX-5GP
C672 SCD1U10V2KX-5GP
C686 SCD1U10V2KX-5GP
C686 SCD1U10V2KX-5GP
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
4
UMA
UMA
4
DIS
DIS
76 0 Thursday, January 08, 2009
76 0 Thursday, January 08, 2009
76 0 Thursday, January 08, 2009
PEG_TXN[15..0] 52
PEG_TXP[15..0] 52
HDMI_DATA2- 20,55
HDMI_DATA2+ 20,55
HDMI_DATA1- 20,55
HDMI_DATA1+ 20,55
HDMI_DATA0- 20,55
HDMI_DATA0+ 20,55
HDMI_CLK- 20,55
HDMI_CLK+ 20,55
SB
SB
SB
5
NB1D
M_A_DQ[63..0] 16
D D
C C
B B
M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
NB1D
AJ38
SA_DQ_0
AJ41
SA_DQ_1
AN38
SA_DQ_2
AM38
SA_DQ_3
AJ36
SA_DQ_4
AJ40
SA_DQ_5
AM44
SA_DQ_6
AM42
SA_DQ_7
AN43
SA_DQ_8
AN44
SA_DQ_9
AU40
SA_DQ_10
AT38
SA_DQ_11
AN41
SA_DQ_12
AN39
SA_DQ_13
AU44
SA_DQ_14
AU42
SA_DQ_15
AV39
SA_DQ_16
AY44
SA_DQ_17
BA40
SA_DQ_18
BD43
SA_DQ_19
AV41
SA_DQ_20
AY43
SA_DQ_21
BB41
SA_DQ_22
BC40
SA_DQ_23
AY37
SA_DQ_24
BD38
SA_DQ_25
AV37
SA_DQ_26
AT36
SA_DQ_27
AY38
SA_DQ_28
BB38
SA_DQ_29
AV36
SA_DQ_30
AW36
SA_DQ_31
BD13
SA_DQ_32
AU11
SA_DQ_33
BC11
SA_DQ_34
BA12
SA_DQ_35
AU13
SA_DQ_36
AV13
SA_DQ_37
BD12
SA_DQ_38
BC12
SA_DQ_39
BB9
SA_DQ_40
BA9
SA_DQ_41
AU10
SA_DQ_42
AV9
SA_DQ_43
BA11
SA_DQ_44
BD9
SA_DQ_45
AY8
SA_DQ_46
BA6
SA_DQ_47
AV5
SA_DQ_48
AV7
SA_DQ_49
AT9
SA_DQ_50
AN8
SA_DQ_51
AU5
SA_DQ_52
AU6
SA_DQ_53
AT5
SA_DQ_54
AN10
SA_DQ_55
AM11
SA_DQ_56
AM5
SA_DQ_57
AJ9
SA_DQ_58
AJ8
SA_DQ_59
AN12
SA_DQ_60
AM13
SA_DQ_61
AJ11
SA_DQ_62
AJ12
SA_DQ_63
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4 OF 10
4 OF 10
SA_BS_0
SA_BS_1
SA_BS_2
SA_RAS#
SA_CAS#
SA_WE#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
4
BD21
BG18
AT25
BB20
BD20
AY20
AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_DM[7..0]
M_A_DQS[7..0]
M_A_DQS#[7..0]
M_A_A[14..0]
M_A_BS#0 16
M_A_BS#1 16
M_A_BS#2 16
M_A_RAS# 16
M_A_CAS# 16
M_A_WE# 16
M_A_DM[7..0] 16
M_A_DQS[7..0] 16
M_A_DQS#[7..0] 16
M_A_A[14..0] 16
3
M_B_DQ[63..0] 17
M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AM48
AK47
AH46
AP47
AP46
AJ46
AJ48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
NB1E
NB1E
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
2
5 OF 10
5 OF 10
BC16
SB_BS_0
BB17
SB_BS_1
BB33
SB_BS_2
AU17
SB_RAS#
BG16
SB_CAS#
BF14
SB_WE#
M_B_DM0
AM47
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
AY47
BD40
BF35
BG11
BA3
AP1
AK2
AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_DM[7..0]
M_B_DQS[7..0]
M_B_DQS#[7..0]
M_B_A[14..0]
M_B_RAS# 17
M_B_CAS# 17
M_B_WE# 17
1
M_B_BS#0 17
M_B_BS#1 17
M_B_BS#2 17
M_B_DM[7..0] 17
M_B_DQS[7..0] 17
M_B_DQS#[7..0] 17
M_B_A[14..0] 17
A A
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
Cantiga (3 of 6)
Cantiga (3 of 6)
Cantiga (3 of 6)
JV50
JV50
JV50
86 0 Thursday, January 08, 2009
86 0 Thursday, January 08, 2009
86 0 Thursday, January 08, 2009
1
SB
SB
SB
of
of
of
5
7 OF 10
POWER
POWER
VCC SM VCC GFX
VCC SM VCC GFX
7 OF 10
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC SM LF
VCC SM LF
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
AV44
BA37
AM40
AV21
AY5
AM10
BB13
SM_LF1_GMCH
SM_LF2_GMCH
SM_LF3_GMCH
SM_LF4_GMCH
SM_LF5_GMCH
SM_LF6_GMCH
SM_LF7_GMCH
1D5V_S3
D D
C C
B B
VCC_AXG_SENSE
VCC_AXG_SENSE 46
VSS_AXG_SENSE
VSS_AXG_SENSE 46
U60(ISL6263ACRZ-T-GP) place near Cantiga
VCC_GFXCORE
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
BA36
BB24
BD16
BB21
AW16
AW13
AT13
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
AJ14
AH14
NB1G
NB1G
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG_SENSE
VSS_AXG_SENSE
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
4
VCC_GFXCORE
DIS
DIS
1 2
R438 0R5J-1-GP
R438 0R5J-1-GP
DIS
DIS
1 2
R439 0R5J-1-GP
R439 0R5J-1-GP
VCC_GFXCORE
-1
12
TC18
TC18
ST220U2D5VBM-2GP
ST220U2D5VBM-2GP
DY
DY
UMA
UMA
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C292
C292
12
C277
C277
UMA
UMA
-1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C273
C273
UMA
UMA
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C276
C276
DY
DY
12
C282
C282
Place on the Edge Coupling CAP
C361
C361
12
DY
DY
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
12
12
C350
C350
SCD1U10V2K X-4GP
SCD1U10V2K X-4GP
12
C347
C347
C290
C290
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C329
C329
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
12
12
C298
C298
C320
C320
C340
C340
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
place near Cantiga
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C302
C302
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C367
C367
12
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C285
C285
UMA
UMA
FOR VCC SM
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C359
C359
12
80.3371V.12L
80.3371V.12L
SB 1202
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C275
C275
DY
DY
12
TC22
TC22
DY
DY
Place on the Edge
ST330U2D5VBM-GP
ST330U2D5VBM-GP
SB 1202
1
1
2
2
UMA
UMA
12
C349
C349
DY
DY
C286
C286
UMA
UMA
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C323
C323
3
12
C271
C271
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
UMA
UMA
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C308
C308
12
C279
C279
12
C348
C348
12
C278
C278
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
UMA
UMA
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1D5V_S3
1D05V_S0
FOR VCC CORE
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
12
12
12
C287
C287
C291
C291
C274
C274
C249
C249
DY
DY
DY
DY
Coupling CAP 370 mils from the Edge
12
C612
C612
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C281
C281
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
12
C289
C289
DY
DY
Coupling CAP
12
C280
C280
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C284
C284
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33
AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
T32
NB1F
NB1F
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
VCC CORE
VCC CORE
POWER
POWER
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC NCTF
VCC NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
6 OF 10
6 OF 10
1
1D05V_S0
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
A A
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (4 of 6)
Cantiga (4 of 6)
Cantiga (4 of 6)
JV50
JV50
JV50
1
SB
SB
SB
of
96 0 Thursday, January 08, 2009
96 0 Thursday, January 08, 2009
96 0 Thursday, January 08, 2009
5
5V_S0
SC1U16V3ZY-GP
SC1U16V3ZY-GP
D D
1D05V_S0
C C
2nd = 68.00248.061
2nd = 68.00248.061
B B
A A
Imax = 300 mA
UMA
UMA
U13
U13
1
VIN
2
GND
EN3NC#4
1 2
G9091-330T11U-GP
G9091-330T11U-GP
BC2
BC2
74.09091.J3F
74.09091.J3F
UMA
UMA
65mA
R371
R371
1 2
0R0603-PAD
0R0603-PAD
65mA
R399
R399
1 2
0R0603-PAD
0R0603-PAD
1D05V_S0
1 2
R430
R430
0R0603-PAD
0R0603-PAD
1D05V_SUS_MCH_PLL2
FCM1608KF-1-GP
FCM1608KF-1-GP
1 2
L22
L22
2nd = 68.00248.061
2nd = 68.00248.061
FCM1608KF-1-GP
FCM1608KF-1-GP
1 2
L21
L21
120ohm 100MHz
1D05V_S0
L20
L20
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
68.00217.521
68.00217.521
220ohm 100MHz
1D5V_S0
R156
R156
1 2
0R0603-PAD
0R0603-PAD
SB 1202
L6
L6
UMA
UMA
1 2
PBY160808T-181Y-GP
PBY160808T-181Y-GP
68.00206.041
68.00206.041
180ohm 100MHz
VOUT
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
UMA
UMA
5
5
4
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C622
C622
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C642
C642
DY
DY
M_VCCA_HPLL
1 2
C687
C687
M_VCCA_MPLL
1 2
C694
C694
DY
DY
1 2
1D5VRUN_TVDAC
1 2
C243
C243
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
DY
DY
1D5VRUN_QDAC
1 2
C247
C247
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
3D3V_S0_DAC
1 2
BC1
BC1
SC1U16V3ZY-GP
SC1U16V3ZY-GP
UMA
UMA
1 2
M_VCCA_DPLLA
1 2
1 2
C624
C624
R390
R390
0R2J-2-GP
0R2J-2-GP
DY
DY
DY
DY
M_VCCA_DPLLB
1 2
1 2
C644
C644
R400
R400
0R2J-2-GP
0R2J-2-GP
DY
DY
UMA
UMA
24mA
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C692
C692
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
C697
C697
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D05V_RUN_PEGPLL
C691
C691
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C188
C188
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
UMA
UMA
C141
C141
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1D05V_S0
139.2mA
58.7mA
1 2
C174
C174
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
R159
R159
0R2J-2 - GP
0R2J-2-GP
DIS
DIS
3D3V_S0_DAC
1 2
R447
R447
0R0603-PAD
0R0603-PAD
480mA
1D05V_S0
1D5V_S0
R374
R374
0R0603-PAD
0R0603-PAD
1 2
24mA
R375
R375
1 2
0R0603-PAD
0R0603-PAD
1D05V_SUS_MCH_PLL2
C715
C715
4
3D3V_S0_DAC
C625
C625
UMA
UMA
1D5V_S0
1 2
C755
C755
DY
DY
R202
R202
0R0603-PAD
0R0603-PAD
UMA
UMA
1 2
1D8V_NB_S0
60.3mA
http://laptop-motherboard-schematic.blogspot.com/
R378
R378
0R0603-PAD
0R0603-PAD
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C205
C205
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2 KX-4GP
SCD1U10V2KX-4GP
1 2
5mA
C207
C207
1 2
UMA
UMA
SB 1208
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C753
C753
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C294
C294
DY
DY
1 2
R153
R153
1 2
0R0603-PAD
0R0603-PAD
4
73mA
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C617
C617
C206
C206
1 2
UMA
UMA
UMA
UMA
1 2
1 2
R168
R168
0R2J-2-GP
0R2J-2-GP
DY
DY
SCD1U10V 2KX-4GP
SCD1U10V2KX-4GP
1D8V_TXLVDS_S0
C636
C636
R421
R421
0R0603-PAD
0R0603-PAD
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C752
C752
C754
C754
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C295
C295
C313
C313
DY
DY
DY
DY
3D3V_S0_DAC
0R2J-2-GP
0R2J-2-GP
1 2
R383
R383
0R2J-2 - GP
0R2J-2-GP
DY
DY
1D8V_SUS_DLVDS
1 2
C235
C235
1 2
1 2
VCCA_PEG_BG
1 2
C704
C704
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C306
C306
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
DY
DY
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
R377
R377
1 2
0R0603-PAD
0R0603-PAD
R386
R386
C690
C690
50mA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
UMA
UMA
UMA
UMA
3D3V_CRTDAC_S0
SCD1U10 V2KX-4GP
SCD1U10V2KX-4GP
1 2
M_VCCA_DAC_BG
13.2mA
1D05V_RUN_PEGPLL
C309
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
DY
1D05V_SM_CK
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C293
C293
1 2
DY
DY
1D5VRUN_TVDAC
1D5VRUN_QDAC
1D05V_RUN_PEGPLL
1 2
1 2
C175
C175
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
R379
R379
0R2J-2-GP
0R2J-2-GP
DY
DY
M_VCCA_DPLLA
M_VCCA_DPLLB
M_VCCA_HPLL
M_VCCA_MPLL
1D05V_SM
1D05V_SM
SC1U10V3KX-3GPDYC309
SC1U10V3KX-3GP
C305
C305
1 2
3D3V_S0_DAC_1
VCC_HDA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C186
C186
UMA
UMA
50mA
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SB 1202
1 2
R167
R167
0R2J-2-GP
0R2J-2-GP
DY
DY
NB1H
NB1H
B27
VCCA_CRT_DAC
A26
VCCA_CRT_DAC
A25
VCCA_DAC_BG
B25
VSSA_DAC_BG
F47
VCCA_DPLLA
L48
VCCA_DPLLB
AD1
VCCA_HPLL
AE1
VCCA_MPLL
J48
VCCA_LVDS
J47
VSSA_LVDS
AD48
VCCA_PEG_BG
AA48
VCCA_PEG_PLL
AR20
VCCA_SM
AP20
VCCA_SM
AN20
VCCA_SM
AR17
VCCA_SM
AP17
VCCA_SM
AN17
VCCA_SM
AT16
VCCA_SM
AR16
VCCA_SM
AP16
VCCA_SM
AP28
VCCA_SM_CK
AN28
VCCA_SM_CK
AP25
VCCA_SM_CK
AN25
VCCA_SM_CK
AN24
VCCA_SM_CK
AM28
VCCA_SM_CK_NCTF
AM26
VCCA_SM_CK_NCTF
AM25
VCCA_SM_CK_NCTF
AL25
VCCA_SM_CK_NCTF
AM24
VCCA_SM_CK_NCTF
AL24
VCCA_SM_CK_NCTF
AM23
VCCA_SM_CK_NCTF
AL23
VCCA_SM_CK_NCTF
B24
VCCA_TV_DAC
A24
VCCA_TV_DAC
A32
VCC_HDA
M25
VCCD_TVDAC
L28
VCCD_QDAC
AF1
VCCD_HPLL
AA47
VCCD_PEG_PLL
M38
VCCD_LVDS
L37
VCCD_LVDS
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
3
8 OF 10
8 OF 10
U13
VTT
T13
VTT
U12
VTT
T12
VTT
U11
VTT
T11
VTT
U10
VTT
T10
VTT
U9
VTT
VTT
VTT
T9
VTT
U8
VTT
T8
VTT
U7
VTT
T7
VTT
U6
VTT
T6
VTT
U5
VTT
T5
VTT
V3
VTT
U3
VTT
V2
VTT
U2
VTT
T2
VTT
V1
VTT
U1
VTT
CRT PLL A PEG A SM
CRT PLL A PEG A SM
A LVDS
A LVDS
2
1 2
1 2
1 2
C662
C662
C267
C267
C250
C250
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
322mA
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
1 2
C616
C616
C251
C251
POWER
POWER
B22
VCC_AXF
B21
VCC_AXF
A21
VCC_AXF
AXF
AXF
BF21
VCC_SM_CK
BH20
VCC_SM_CK
A CK
A CK
TV
TV
HDA
HDA
D TV/CRT
D TV/CRT
DMI
DMI
LVDS
LVDS
3
VCC_SM_CK
VCC_SM_CK
SM CK
SM CK
VCC_TX_LVDS
VCC_HV
VCC_HV
VCC_HV
HV
HV
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
PEG
PEG
VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
BG20
1D8V_TXLVDS_S0
BF20
106mA
VTTLF1
VTTLF2
VTTLF3
1
1
2
2
3D3V_HV_S0
C676
C676
K47
C35
B35
A35
V48
U48
V47
U47
U46
AH48
AF48
AH47
AG47
A8
L1
AB2
1
1
2
2
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
2
200mA
1782mA
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C283
C283
456mA 157.2mA
1
1
C650
C650
2
2
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C750
C750
1 2
DY
DY
C620
C620
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
1
1D05V_S0
1 2
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1D05V_S0
1D05V_S0
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1D5V_SUS_SM_CK
1 2
C751
C751
C635
SC1KP50V2KX-1GP
C635
SC1KP50V2KX-1GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
C739
C739
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C712
C712
852mA
1 2
1
1
C670
C670
C268
C268
C263
C263
2
2
DY
DY
SCD1U10V2KX-4GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
D5
D5
1
2
BAT54-5-GP
BAT54-5-GP
83.BAT54.D81
83.BAT54.D81
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
R448
R448
0R0603-PAD
0R0603-PAD
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C758
C758
DY
DY
C634
C634
UMA
UMA
1D05V_S0
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
C675
C675
DY
DY
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
C732
C732
DY
DY
SCD1U10V2KX-4GP
1D05V_HV_S0
3
1 2
SB 1202
119mA
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
1 2
DY
DY
U12
U12
G1117-18T63UF-GP
G1117-18T63UF-GP
74.G1117.B3C
74.G1117.B3C
UMA
UMA
1D5V_S3
UMA
UMA
C678
C678
3D3V_S0 3D3V_HV_S0
1 2
1 2
R106
R106
1 0R2J-2-GP
10R2J-2-GP
I=1A
3
VIN
2
VOUT
1
GND
UMA
UMA
1D8V_NB_S0
R396
R396
1 2
0R0603-PAD
0R0603-PAD
1 2
R398
R398
0R2J-2-GP
0R2J-2-GP
DY
DY
SB 1202
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D05V_S0
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
C722
C722
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Cantiga (5 of 6)
Cantiga (5 of 6)
Cantiga (5 of 6)
JV50
JV50
JV50
1
R376
R376
0R0603-PAD
0R0603-PAD
C119
C119
SC1U10V2ZY-GP
SC1U10V2ZY-GP
1 2
10 60 Thursday, January 08, 2009
10 60 Thursday, January 08, 2009
10 60 Thursday, January 08, 2009
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C272
C272
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
UMA
UMA
C100
C100
1 2
of
of
of
1 2
3D3V_S0
1D8V_NB_S0
SC1U10V2ZY-GP
SC1U10V2ZY-GP
C621
C621
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SB
SB
SB
5
NB1I
NB1I
AU48
VSS
AR48
VSS
AL48
VSS
BB47
VSS
AW47
VSS
AN47
VSS
AJ47
VSS
AF47
VSS
AD47
VSS
AB47
VSS
D D
C C
B B
A A
5
Y47
VSS
T47
VSS
N47
VSS
L47
VSS
G47
VSS
BD46
VSS
BA46
VSS
AY46
VSS
AV46
VSS
AR46
VSS
AM46
VSS
V46
VSS
R46
VSS
P46
VSS
H46
VSS
F46
VSS
BF44
VSS
AH44
VSS
AD44
VSS
AA44
VSS
Y44
VSS
U44
VSS
T44
VSS
M44
VSS
F44
VSS
BC43
VSS
AV43
VSS
AU43
VSS
AM43
VSS
J43
VSS
C43
VSS
BG42
VSS
AY42
VSS
AT42
VSS
AN42
VSS
AJ42
VSS
AE42
VSS
N42
VSS
L42
VSS
BD41
VSS
AU41
VSS
AM41
VSS
AH41
VSS
AD41
VSS
AA41
VSS
Y41
VSS
U41
VSS
T41
VSS
M41
VSS
G41
VSS
B41
VSS
BG40
VSS
BB40
VSS
AV40
VSS
AN40
VSS
H40
VSS
E40
VSS
AT39
VSS
AM39
VSS
AJ39
VSS
AE39
VSS
N39
VSS
L39
VSS
B39
VSS
BH38
VSS
BC38
VSS
BA38
VSS
AU38
VSS
AH38
VSS
AD38
VSS
AA38
VSS
Y38
VSS
U38
VSS
T38
VSS
J38
VSS
F38
VSS
C38
VSS
BF37
VSS
BB37
VSS
AW37
VSS
AT37
VSS
AN37
VSS
AJ37
VSS
H37
VSS
C37
VSS
BG36
VSS
BD36
VSS
AK15
VSS
AU36
VSS
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
VSS
VSS
4
9 OF 10
9 OF 10
AM36
VSS
AE36
VSS
P36
VSS
L36
VSS
J36
VSS
F36
VSS
B36
VSS
AH35
VSS
AA35
VSS
Y35
VSS
U35
VSS
T35
VSS
BF34
VSS
AM34
VSS
AJ34
VSS
AF34
VSS
AE34
VSS
W34
VSS
B34
VSS
A34
VSS
BG33
VSS
BC33
VSS
BA33
VSS
AV33
VSS
AR33
VSS
AL33
VSS
AH33
VSS
AB33
VSS
P33
VSS
L33
VSS
H33
VSS
N32
VSS
K32
VSS
F32
VSS
C32
VSS
A31
VSS
AN29
VSS
T29
VSS
N29
VSS
K29
VSS
H29
VSS
F29
VSS
A29
VSS
BG28
VSS
BD28
VSS
BA28
VSS
AV28
VSS
AT28
VSS
AR28
VSS
AJ28
VSS
AG28
VSS
AE28
VSS
AB28
VSS
Y28
VSS
P28
VSS
K28
VSS
H28
VSS
F28
VSS
C28
VSS
BF26
VSS
AH26
VSS
AF26
VSS
AB26
VSS
AA26
VSS
C26
VSS
B26
VSS
BH25
VSS
BD25
VSS
BB25
VSS
AV25
VSS
AR25
VSS
AJ25
VSS
AC25
VSS
Y25
VSS
N25
VSS
L25
VSS
J25
VSS
G25
VSS
E25
VSS
BF24
VSS
AD12
VSS
AY24
VSS
AT24
VSS
AJ24
VSS
AH24
VSS
AF24
VSS
AB24
VSS
R24
VSS
L24
VSS
K24
VSS
J24
VSS
G24
VSS
F24
VSS
E24
VSS
BH23
VSS
AG23
VSS
Y23
VSS
B23
VSS
A23
VSS
AJ6
VSS
http://laptop-motherboard-schematic.blogspot.com/
4
3
NB1J
NB1J
BG21
VSS
L12
VSS
AW21
VSS
AU21
VSS
AP21
VSS
AN21
VSS
AH21
VSS
AF21
VSS
AB21
VSS
R21
VSS
M21
VSS
J21
VSS
G21
VSS
BC20
VSS
BA20
VSS
AW20
VSS
AT20
VSS
AJ20
VSS
AG20
VSS
Y20
VSS
N20
VSS
K20
VSS
F20
VSS
C20
VSS
A20
VSS
BG19
VSS
A18
VSS
BG17
VSS
BC17
VSS
AW17
VSS
AT17
VSS
R17
VSS
VSS
VSS
M17
VSS
H17
VSS
C17
VSS
BA16
VSS
AU16
VSS
AN16
VSS
N16
VSS
K16
VSS
G16
VSS
E16
VSS
BG15
VSS
AC15
VSS
W15
VSS
A15
VSS
BG14
VSS
AA14
VSS
C14
VSS
BG13
VSS
BC13
VSS
BA13
VSS
AN13
VSS
AJ13
VSS
AE13
VSS
N13
VSS
L13
VSS
G13
VSS
E13
VSS
BF12
VSS
AV12
VSS
AT12
VSS
AM12
VSS
AA12
VSS
J12
VSS
A12
VSS
BD11
VSS
BB11
VSS
AY11
VSS
AN11
VSS
AH11
VSS
Y11
VSS
N11
VSS
G11
VSS
C11
VSS
BG10
VSS
AV10
VSS
AT10
VSS
AJ10
VSS
AE10
VSS
AA10
VSS
M10
VSS
BF9
VSS
BC9
VSS
AN9
VSS
AM9
VSS
AD9
VSS
G9
VSS
B9
VSS
BH8
VSS
BB8
VSS
AV8
VSS
AT8
VSS
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
3
NCTF_VSS_SCB#BH48
NCTF_VSS_SCB#BH1
NCTF_VSS_SCB#A48
NCTF_VSS_SCB#C1
NCTF_VSS_SCB#A3
NCTF TEST PIN:
A3,C1,A48,BH1,BH48
NCTF TEST PIN:
A3,C1,A48,BH1,BH48
VSS SCB
VSS SCB
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS NCTF
VSS NCTF
VSS_NCTF
VSS_NCTF
NC
NC
10 OF 10
10 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC#E1
NC#D2
NC#C3
NC#B4
NC#A5
NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46
NC#F48
NC#E48
NC#C48
NC#B48
2
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
U24
U28
U25
U29
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
NCTF_VSS_SCB#BH48
BH48
NCTF_VSS_SCB#BH1
BH1
NCTF_VSS_SCB#A48
A48
NCTF_VSS_SCB#C1
C1
NCTF_VSS_SCB#A3
A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
2
1
TP201 TPAD14-GP TP201 TPAD14-GP
1
TP202 TPAD14-GP TP202 TPAD14-GP
1
TP188 TPAD14-GP TP188 TPAD14-GP
1
TP190 TPAD14-GP TP190 TPAD14-GP
1
TP187 TPAD14-GP TP187 TPAD14-GP
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
Cantiga (6 of 6)
Cantiga (6 of 6)
Cantiga (6 of 6)
JV50
JV50
JV50
11 60 Thursday, January 08, 2009
11 60 Thursday, January 08, 2009
11 60 Thursday, January 08, 2009
1
SB
SB
SB
of
of
of
5
3D3V_AUX_S5
D12
D12
2
D D
RTC1
RTC1
RTC_BAT
1 2
1
PWR
GND
NP1
NP2
BAT-CON2-1-G P-U
BAT-CON2-1-G P-U
62.70001.011
62.70001.011
C C
3D3V_S5
1 2
R218
R218
10KR2J-3-GP
10KR2J-3-GP
B B
1 2
R217
R217
10KR2J-3-GP
10KR2J-3-GP
DY
DY
3D3V_S0
RTC_AUX_S5
1 2
R229
R229
330KR2F-L-GP
330KR2F-L-GP
A A
INTVR MEN
2
NP1
NP2
HDMI_EN
1 2
R414
R414
10KR2J-3-GP
10KR2J-3-GP
R228 1KR2J-1-GP R228 1KR2J-1- GP
MEDIA_LED#
5
1
BAS40CW-GP
BAS40CW-GP
RTC_BAT_R
2 1
modify by RF
SC47P50V2JN-3GP
SC47P50V2JN-3GP
integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN
integrated VccLan1_05VccCL1_05
LAN100_SLP
RTC_AUX_S5
SC1U16V3ZY-GP
SC1U16V3ZY-GP
3
1 2
RN39
RN39
SRN20KJ-GP-U
SRN20KJ-GP-U
2 3
1
1 2
G17
G17
R230
R230
1MR2J-1-GP
1MR2J-1-GP
GAP-OPEN
GAP-OPEN
1D5V_S0
1 2
C381
C381
DY
DY
High=Enable Low=Disable
High=Enable Low=Disable
4
C386
X4
X4
X-32D768KHZ-40GPU
X-32D768KHZ-40GPU
82.30001.841
82.30001.841
1 2
C396
C396
SC1U16V3ZY-GP
SC1U16V3ZY-GP
MEDIA_LED# 38
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
4
C386
1 2
SC7P50V2DN-2GP
SC7P50V2DN-2GP
2 3
C385
C385
1 2
SC7P50V2DN-2GP
SC7P50V2DN-2GP
GLAN_COMP place
within 500 mil of ICH9M
TP197 TPAD14-GP TP197 TPAD14-GP
HDD
ODD
ACZ_BTCLK_MDC
ACZ_BITCLK_AUDIO
ACZ_BITCLK_GPU
4
1
TP204 TPAD14-GP TP204 TPAD14-GP
1 2
R213
R213
SATA_RXN0 21
SATA_RXP0 21
SATA_TXN0 21
SATA_TXP0 21
SATA_RXN1 22
SATA_RXP1 22
SATA_TXN1 22
SATA_TXP1 22
RTC_X1
1 2
R215
R215
10MR2J-L-GP
10MR2J-L-GP
RTC_X2
RTC_RST#
SRTC_RST#
INTRUDER#
INTVR MEN
TP_LAN_RSTSYNC
1
HDMI_EN
GLAN_COMP
24D9R2F-L-GP
24D9R2F-L-GP
ACZ_BIT_CLK
ACZ_SYNC_R
ACZ_RST#_R
ACZ_SDATAIN0
ACZ_SDATAIN1
ACZ_SDIN2
ACZ_SDIN3
ACZ_SDATAOUT_R
HDA_DOCK_RST#
1
ACZ_BTCLK_MDC 30
ACZ_SYNC_MDC 30
ACZ_RST#_MDC 30
ACZ_SDATAOUT_MDC 30
ACZ_BITCLK_AUDIO 27
ACZ_SYNC_AUDIO 27
ACZ_RST#_AUDIO 27
ACZ_SDATAOUT_AUDIO 27
ACZ_BITCLK_GPU 52
ACZ_SYNC_GPU 52
ACZ_RST#_GPU 52
ACZ_SDATAOUT_GPU 52
SB 1202
C402
C402
SB 1202
4
1 2
C397
C397
SC1U16V3ZY-GP
SC1U16V3ZY-GP
close to SB1
ACZ_BIT_CLK 7
ACZ_SYNC_R 7
ACZ_RST#_R 7
ACZ_SDATAIN0 27
ACZ_SDATAIN1 30
ACZ_SDIN2 52
ACZ_SDIN3 7
ACZ_SDATAOUT_R 7
EC22 SC12P50V2JN-3GP
EC22 SC12P50V2JN-3GP
EC45 SC22P50V3JN-GP
EC45 SC22P50V3JN-GP
EC46 SC22P50V3JN-GP
EC46 SC22P50V3JN-GP
http://laptop-motherboard-schematic.blogspot.com/
SB1A
SB1A
C23
RTCX1
C24
RTCX2
A25
RTCRST#
F20
SRTCRST#
C22
INTRUDER#
B22
INTVRMEN
A22
LAN100_SLP
E25
GLAN_CLK
C13
LAN_RSTSYNC
F14
LAN_RXD0
G13
LAN_RXD1
D14
LAN_RXD2
D13
LAN_TXD0
D12
LAN_TXD1
E13
LAN_TXD2
B10
GLAN_DOCK#/GPIO56
B28
GLAN_COMPI
B27
GLAN_COMPO
AF6
HDA_BIT_CLK
AH4
HDA_SYNC
AE7
HDA_RST#
AF4
HDA_SDIN0
AG4
HDA_SDIN1
AH3
HDA_SDIN2
AE5
HDA_SDIN3
AG5
HDA_SDOUT
AG7
HDA_DOCK_EN#/GPIO33
AE8
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
AJ16
SATA0RXN
AH16
SATA0RXP
AF17
SATA0TXN
AG17
SATA0TXP
AH13
SATA1RXN
AJ13
SATA1RXP
AG14
SATA1TXN
AF14
SATA1TXP
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
3
RN37
RN37
1
2
3
4 5
SRN33J-4-GP
SRN33J-4-GP
RN68
RN68
1
2
3
4 5
SRN33J-4-GP
SRN33J-4-GP
RN69
RN69
1
2
3
4 5
DIS
DIS
SRN33J-4-GP
SRN33J-4-GP
3
RTC LAN / GLAN
RTC LAN / GLAN
IHDA
IHDA
SATA
SATA
ACZ_BIT_CLK
8
ACZ_SYNC_R
7
ACZ_RST#_R
6
ACZ_SDATAOUT_R
ACZ_BIT_CLK
8
ACZ_SYNC_R
7
ACZ_RST#_R
6
ACZ_SDATAOUT_R
ACZ_BIT_CLK
8
ACZ_SYNC_R
7
ACZ_RST#_R
6
ACZ_SDATAOUT_R
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LPC CPU
LPC CPU
LDRQ1#/GPIO23
CPUPWRGD
THRMTRIP#
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
1 OF 6
1 OF 6
LDRQ0#
A20GATE
A20M#
DPRSTP#
DPSLP#
FERR#
IGNNE#
INIT#
INTR
RCIN#
SMI#
STPCLK#
PECI
K5
K4
L6
K2
K3
J3
J1
N7
AJ27
AJ25
AE23
AJ26
AD22
AF25
AE22
AG25
L3
AF23
NMI
AF24
AH27
AG26
AG27
AH11
AJ11
AG12
AF12
AH9
AJ9
AE10
AF10
AH18
AJ18
AJ7
AH7
2
LPC_LAD0 35,36,51
LPC_LAD1 35,36,51
LPC_LAD2 35,36,51
LPC_LAD3 35,36,51
LDRQ0#
3D3V_LDRQ1_S0
H_PWRGD
SATARBIAS
LPC_ L FRAME# 35,36,51
1
1
KA20GATE 35
H_A20M# 4
H_DPRSTP#
H_FERR#_R
H_PWRGD 4,39,51
H_IGNNE# 4
H_INIT # 4
H_INTR 4
KBRCIN# 35
H_STPCLK# 4
ICH_TP8
TP195 TPAD14-GP TP195 TPAD14-GP
1
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
24D9R2F-L-GP
24D9R2F-L-GP
Place within 500 mils of
ICH9 ball
2
TP200 TPAD14-GP TP200 TPAD14-GP
TP144 TPAD14-GP TP144 TPAD14-GP
H_DPRSTP# 4,7,41
H_DPSLP# 4
H_NMI 4
H_SMI# 4
H_THERMTRIP_R
DY
DY
modify by RF
1 2
R194
R194
H_INIT # FWH _INIT #
1
1D05V_S0 1D05V_S0
1 2
1 2
R413
R413
56R2J-4-GP
56R2J-4-GP
DY
1D05V_S0
RN71
RN71
1
2 3
SRN56J-4-GP
SRN56J-4-GP
H_DPRSTP#
H_PWRGD
4
H_FERR# 4
DY
1 2
1 2
C683
C683
SC47P50V2JN-3GP
SC47P50V2JN-3GP
DY
DY
modify by RF
1D05V_S0
R411
R411
1 2
56R2J-4-GP
56R2J-4-GP
1 2
R410 54D9R2F-L1-GP
R410 54D9R2F-L1-GP
DY
DY
1 2
C673
C673
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1D05V_S0 3D3V_S0
1
2 3
DY
DY
RN70
RN70
SRN10KJ-5-GP
SRN10KJ-5-GP
H_INIT #_G
DY
DY
Q14
Q14
MMBT3904-4-GP
MMBT3904-4-GP
84.T3904.C11
84.T3904.C11
JV50
JV50
JV50
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
4
1
CBE
PM_THRMTRIP-A# 4,7,39
Layout note: R373 needs to placed
within 2" of ICH9, R379 must be
placed within 2" of R373 w/o stub
TP116 TPAD14-GP TP116 TPAD14-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
ICH9-M (1 of 4)
ICH9-M (1 of 4)
ICH9-M (1 of 4)
JV50
JV50
JV50
1
of
12 60 Thursday, January 08, 2009
of
12 60 Thursday, January 08, 2009
of
12 60 Thursday, January 08, 2009
R424
R424
56R2J-4-GP
56R2J-4-GP
DY
DY
C706
C706
SC47P50V2JN-3GP
SC47P50V2JN-3GP
DY
DY
SB
SB
SB
5
SB1B
SB1B
D11
AD0
C8
AD1
D9
AD2
E12
AD3
E9
AD4
C9
AD5
E10
AD6
B7
AD7
C7
AD8
C5
PCI_GNT#0 and SPI_CS1#
D D
have weak internal Pull up
INT_PIRQA# INT_PIRQE#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
C C
PCIE_RXN1 25
PCIE_RXP1 25
PCIE_TXN1 25
PCIE_TXP1 25
LAN
PCIE_RXN2 33
PCIE_RXP2 33
PCIE_TXN2 33
PCIE_TXP2 33
MINICARD1
PCIE_RXN3 33
B B
A A
PCIE_RXP3 33
PCIE_TXN3 33
PCIE_TXP3 33
MINICARD2
PCIE_RXN5 32
PCIE_RXP5 32
PCIE_TXN5 32
PCIE_TXP5 32
NEW CARD
These R need close SB
within 600 mils
USB_OC#0 24
USB_OC#1 24,51
AD9
G11
AD10
F8
AD11
F11
AD12
E7
AD13
A3
AD14
D2
AD15
F10
AD16
D5
AD17
D10
AD18
B3
AD19
F7
AD20
C3
AD21
F3
AD22
F4
AD23
C1
AD24
G7
AD25
H7
AD26
D1
AD27
G5
AD28
H6
AD29
G1
AD30
H3
AD31
J5
PIRQA#
E1
PIRQB#
J6
PIRQC#
PIRQD#C4PIRQH#/GPIO5
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
C363 SCD1U10V2KX- 5GP C363 SCD1U10V2KX- 5GP
C360 SCD1U10V2KX- 5GP C360 SCD1U10V2KX- 5GP
C369 SCD1U10V2KX- 5GP C369 SCD1U10V2KX- 5GP
C365 SCD1U10V2KX- 5GP C365 SCD1U10V2KX- 5GP
C377 SCD1U10V2KX- 5GP C377 SCD1U10V2KX- 5GP
C375 SCD1U10V2KX- 5GP C375 SCD1U10V2KX- 5GP
C378 SCD1U10V2KX- 5GP
C378 SCD1U10V2KX- 5GP
C380 SCD1U10V2KX- 5GP
C380 SCD1U10V2KX- 5GP
R415 22D6R2F- L1-GP R415 22D6R2F -L1-GP
5
Interrupt I/F
Interrupt I/F
1 2
PCI
PCI
12
1 2
12
1 2
12
1 2
1 2
NEW
NEW
1 2
NEW
NEW
SPI_ICH_CS1#
USB_OC#0
USB_OC#1
USB_OC#3
USB_RBIAS_PN
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
N29
N28
TXN1
P27
TXP1
P26
L29
L28
TXN2
M27
TXP2
M26
J29
J28
TXN3
K27
TXP3
K26
G29
G28
H27
H26
E29
E28
TXN5
F27
TXP5
F26
C29
C28
D27
D26
D23
D24
F23
D25
E23
AG2
AG1
2 OF 6
2 OF 6
PCI_REQ#0
F1
G4
PCI_REQ#1
B6
A7
PCI_REQ#2
F13
F12
PCI_REQ#3
E6
F6
D8
B4
D6
A5
D3
E3
PAR
R1
C6
E4
C2
J4
A4
F5
D7
C14
D4
R2
PME#
H4
K6
F2
G2
SB1D
SB1D
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
SPI_CLK
SPI_CS0#
SPI_CS1#/GPIO58/CLGPIO6
SPI_MOSI
SPI_MISO
N4
OC0#/GPIO59
N5
OC1#/GPIO40
N6
OC2#/GPIO41
P6
OC3#/GPIO42
M1
OC4#/GPIO43
N2
OC5#/GPIO29
M4
OC6#/GPIO30
M3
OC7#/GPIO31
N3
OC8#/GPIO44
N1
OC9#/GPIO45
P5
OC10#/GPIO46
P3
OC11#/GPIO47
USBRBIAS
USBRBIAS#
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
PCI_IRDY#
PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLT_RST#_R
4
1 2
R216
R216
0R0402-PAD
0R0402-PAD
C388 SC100P50V2JN-3GP
C388 SC100P50V2JN-3GP
SB 1202
PCLK_ICH 3
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
4 OF 6
4 OF 6
V27
DMI0RXN
V26
DMI0RXP
U29
DMI0TXN
U28
DMI0TXP
Y27
DMI1RXN
Y26
DMI1RXP
W29
DMI1TXN
W28
DMI1TXP
AB27
DMI2RXN
AB26
DMI2RXP
AA29
DMI2TXN
AA28
DMI2TXP
AD27
DMI3RXN
AD26
DMI3RXP
AC29
DMI3TXN
AC28
DMI3TXP
T26
DMI_CLKN
T25
PCI-Express
PCI-Express
DMI_CLKP
Direct Media Interface
Direct Media Interface
AF29
DMI_ZCOMP
AF28
DMI_IRCOMP
AC5
USBP0N
AC4
USBP0P
AD3
USBP1N
AD2
USBP1P
AC1
USBP2N
AC2
USBP2P
AA5
USBP3N
AA4
USBP3P
AB2
USBP4N
AB3
USBP4P
AA1
USBP5N
AA2
SPI
SPI
USBP5P
W5
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2
4
USB
USB
PLT_RST1# 7,25,31,32,33,35,36,51,52
1 2
DY
DY
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
DMI_IRCOMP_R
USBPN0 24
USBPP0 24
USBPN1 24 ,51
USBPP1 24,51
USBPN2 24 ,51
USBPP2 24,51
USBPN3 33
USBPP3 33
USBPN4 18
USBPP4 18
USBPN5 32
USBPP5 32
USBPN6 37
USBPP6 37
USBPN7 23 ,51
USBPP7 23,51
USBPN9 24
USBPP9 24
USBPN10 33
USBPP10 33
USBPN11 31
USBPP11 31
SMB_CLK 15,25,32,33
SMB_DATA 15,25,32,33
3D3V_S0
10KR2J-3-GP
10KR2J-3-GP
1 2
R404
R404
GAP-OPEN
GAP-OPEN
2 1
G78
G78
GPIO49 should be pulled down to
GND only when using Teenah. When
using Cantiga, this ball should
be left as No Connect.
1D5V_S0
1 2
R417
R417
24D9R2F-L- GP
24D9R2F-L- GP
USB
Pair
Device
USB2
0
USB3
1
USB4
2
MINI1
3
CCD
4
5
New Card
6
Finger Print
Blue Tooth
7
NC
8
9 USB1
MINIC2
10
Cardreader
11
3
TP199 TPAD14 -GP TP199 TPAD14-GP
PM_SYNC# 7
PM_STPPCI# 3
PM_STPCPU# 3
PM_CLKRUN# 35
PCIE_WAKE# 25,32
INT_SERIRQ 35
THRM# 34
VGATE_PWRGD 34,41
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
R221
R221
TP193 TPAD14 -GP TP193 TPAD14-GP
EC_TMR 35
ECSCI#_1 35
ECSWI# 35
TP196 TPAD14 -GP TP196 TPAD14-GP
TP122 TPAD14 -GP TP122 TPAD14-GP
SATACLKREQ# 3
TP198 TPAD14 -GP TP198 TPAD14-GP
TP194 TPAD14 -GP TP194 TPAD14-GP
ACZ_SPKR 27
MCH_ICH_SYNC# 7
TP205 TPAD14 -GP TP205 TPAD14-GP
No Reboot Strap
SPKR LOW = Defaule
MIC_SEL_1
R405 10KR2J-3-GP R405 10KR2J-3-GP
ACZ_SPKR
R434 1 KR2J-1-GP
R434 1 KR2J-1-GP
NO_iTPM
PWROK
3
G16
A13
SMB_LINK_ALERT#
E17
C17
B18
PM_RI#
F19
PM_SUS_STAT#
1
DBRESET#
G19
SMB_ALERT#
A17
A14
E19
E20
AJ23
D21
ICH_TP7
A20
FP_ID
1
AG19
AH21
AG21
A21
C12
C21
PSW_CLR#
AE18
ICH9_GPIO20
AF8
1
CLK_SEL1
AJ22
1
D19
SATACLKREQ#
PCB_VER0_SB
1
AE19
PCB_VER1_SB
AG22
1
MIC_SEL_1
AF21
AH24
NO_iTPM
AJ24
ICH_TP3
B21
1
AH20
AJ20
AJ21
High=No Reboot
1 2
1 2
DY
DY
RN38
RN38
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
SB1C
SB1C
SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1
RI#
R4
SUS_STAT#/LPCPD#
SYS_RESET#
M6
PMSYNC#/GPIO0
SMBALERT#/GPIO11
STP_PCI#
STP_CPU#
L4
CLKRUN#
WAKE#
M5
SERIRQ
THRM#
VRMPWRGD
SST
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
ENERGY_DETECT/GPIO13
TACH0/GPIO17
K1
GPIO18
GPIO20
SCLOCK/GPIO22
A9
GPIO27
GPIO28
L1
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/ GPIO39
SDATAOUT1/ GPIO48
GPIO49
A8
GPIO57/CLGPIO5
M7
SPKR
MCH_SYNC#
TP3
PWM0
PWM1
PWM2
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
PM_RI#
PM_BATLOW#_R
ECSWI#
PCIE_WAKE#
3D3V_S5
PCI_TRDY#
INT_PIRQG#
PCI_REQ#0
INT_PIRQH#
3D3V_S0
INT_PIRQD#
PCI_LOCK#
PCI_FRAME#
3D3V_S0
INT_PIRQC#
INT_PIRQF#
PM_CLKRUN#
3D3V_S0
BOOT BIOS Strap
3D3V_S0
A16 swap override strap
PCI_GNT#3
4
2
SATA
GPIO
SATA
GPIO
SMB
SMB
Clocks
Clocks
S4_STATE#/GPIO 26
DPRSLPVR/GPIO16
SYS GPIO
SYS GPIO
Power MGT Controller Link
Power MGT Controller Link
GPIO
GPIO
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
MISC
MISC
RP1
RP1
1
10
2
3
4
5 6
SRN10KJ-L3-G P
SRN10KJ-L3-G P
RP3
RP3
1
2
3
4
5 6
SRN8K2J-2-GP -U
SRN8K2J-2-GP -U
RP4
RP4
1
2
3
4
5 6
SRN8K2J-2-GP -U
SRN8K2J-2-GP -U
RP2
RP2
1
2
3
4
5 6
SRN8K2J-2-GP -U
SRN8K2J-2-GP -U
0 1 SPI
SPI_ICH_CS1#
DBRESET#
9
SMB_LINK_ALERT#
8
SUSPWRACK
7
SMB_ALERT#
10
INT_PIRQB#
9
PCI_PERR#
8
PCI_REQ#3
7
PCI_IRDY#
10
PCI_REQ#2
9
PCI_DEVSEL#
8
PCI_REQ#1
7
PCI_STOP#
10
PCI_SERR#
9
INT_PIRQA# INT_SERIRQ
8
INT_PIRQE#
7
ECSCI#_1
SPI_CS#1 BOOT BIOS Location PCI_GNT#0
0 1
1 1
low = A16 swap override enable
high = default
DY
DY
1 2
R225 1KR2J-1-GP
R225 1KR2J-1-GP
2
3 OF 6
3 OF 6
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
CL_RST0#
CL_RST1#
GPIO24/MEM_LED
GPIO9/WOL_EN
3D3V_S5
3D3V_S0
3D3V_S0
3D3V_S0
PCI
LPC(Default)
1 2
1 2
DY
DY
100KR2J-1-GP
100KR2J-1-GP
D8
D8
BAS16-1-GP
BAS16-1-GP
1
3
83.00016.B11
83.00016.B11
2
USB_OC#0
USB_OC#1
USB_OC#3
DY
DY
R222
R222
1 2
0R2J-2-GP
0R2J-2-GP
D11
D11
3
BAT54-5-GP
BAT54-5-GP
83.BAT54.D81
83.BAT54.D81
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsi n Tai Wu Rd., Hsichih ,
21F, 88, Sec.1, Hsi n Tai Wu Rd., Hsichih ,
21F, 88, Sec.1, Hsi n Tai Wu Rd., Hsichih ,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ICH9-M (2 of 4)
ICH9-M (2 of 4)
ICH9-M (2 of 4)
JV50
JV50
JV50
1
8
7
6
3D3V_S5
1
2
1
RN73
RN73
SRN10KJ-6-GP
SRN10KJ-6-GP
SATA0GP
AH23
SATA1GP
AF19
ICH_GPIO36
AE21
ICH_GPIO37
AD20
H1
AF3
P1
C16
E16
G17
C10
G20
M2
B13
R3
D20
D22
R5
R6
B16
F24
B19
F22
C19
C25
A19
F21
D18
A16
C18
C11
C20
3D3V_S5
PM_SLP_S5#
S4_STATE#
PM_DPRSLPVR_1
PM_BATLOW#_R
PWRBTN#_ICH
RSMRST#_SB
PM_SLP_M#
ICH_GPIO24
SUSPWRACK
AC_PRESENT
ICH_GPIO9
1 2
R220
R220
CLK_ICH14 3
CLK48_ICH 3
PM_SUS_CLK 34
PM_SLP_S3# 32,34,35,39,43,46
PM_SLP_S4# 32,35,39,43,44
1
TP203 TPAD14-GP TP203 TPAD14-GP
1
TP207 TPAD14-GP TP207 TPAD14-GP
PWROK 7,34
R211 100R2J-2-GP R211 100R2J-2-GP
R212
R212
CLK_PWRGD 3
PWROK 7,34
TP148 TPAD14-GP TP148 TPAD14-GP
1
CL_CLK0 7
CL_DATA0 7
CL_VREF0_ICH
CL_RST#0 7
TP153 TPAD14-GP TP153 TPAD14-GP
1
TP206 TPAD14-GP TP206 TPAD14-GP
1
100KR2J-1-GP
100KR2J-1-GP
RSMRST#_KBC 35
JV50
JV50
JV50
Title
Title
Title
Size Document N um ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet
Date: Sheet
Date: Sheet
RN72
RN72
6
7
8
SRN10KJ-6-GP
SRN10KJ-6-GP
PM_DPRSLPVR 7,41
PM_PWRBTN# 35,51
R226
R226
3K24R2F-GP
3K24R2F-GP
1 2
1
4
1 2
13 60 Thursday, January 08, 2009
13 60 Thursday, January 08, 2009
13 60 Thursday, January 08, 2009
4 5
3
2
1
3D3V_S0
1 2
1 2
C409
C409
SCD1U10V2KX-4 GP
SCD1U10V2KX-4 GP
3D3V_S5
1
2
3
4 5
2 3
RN40
RN40
SRN10KJ-5-GP
SRN10KJ-5-GP
AC_PRESENT
RSMRST#_SB
R224
R224
100KR2J-1-GP
100KR2J-1-GP
of
of
of
R227
R227
453R2F-1-GP
453R2F-1-GP
SB
SB
SB
http://laptop-motherboard-schematic.blogspot.com/
5
D D
C737
C737
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
*Within a given well, 5VREF needs to be up before the
corresponding 3.3V rail
2mA
V5REF_S0
C C
Layout Note:
Place near ICH9
2mA
V5REF_S5
B B
3D3V_S0
A A
1 2
1 2
C742
C742
DY
DY
D10
D10
RB751V-40-2-GP
RB751V-40-2-GP
83.R2004.B8F
83.R2004.B8F
K A
1 2
C387
C387
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D7
D7
RB751V-40-2-GP
RB751V-40-2-GP
83.R2004.B8F
83.R2004.B8F
K A
1 2
C699
C699
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
19mA in S0;78mA in S3/S4/S5
C389
C389
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
5
1 2
C252
C252
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
DY
DY
5V_S0
1 2
R223
R223
100R2J-2-GP
100R2J-2-GP
5V_S5 3D3V_S5
1 2
R423
R423
100R2J-2-GP
100R2J-2-GP
1 2
1D5V_S0
1 2
1D5V_S0
80mA
C719
C719
1 2
1D5V_S0
C382
C382
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
R219
R219
0R0603-PAD
0R0603-PAD
1 2
C718
C718
DY
DY
1 2
C724
C724
L8
L8
1 2
IND-1D2UH-10-GP
IND-1D2UH-10-GP
68.1R220.10D
68.1R220.10D
1D5V_S0
1D5V_S0
C720
C720
23mA
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RTC_AUX_S5
1 2
SCD 1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C394
C394
SC1U16V3ZY-GP
SC1U16V3ZY-GP
4
6uA in G3
1 2
DY
DY
SB 1202
C733
C733
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
C241
C241
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
646mA
1 2
V5REF_S0
V5REF_S5
1 2
C261
C261
SC1U16V3ZY-GP
SC1U16V3ZY-GP
C412
C412
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C703
C703
DY
DY
SB 1202 SB 1202
47mA
1 2
C413
C413
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD 1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_APLL_S0 1D5V_S0 3D3V_S0
1 2
C242
C242
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1.64A
1 2
1 2
DY
DY
C693
C693
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
C681
C681
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
USBPLL=11mA
1 2
C682
C682
C700
C700
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 2
C393
C393
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
http://laptop-motherboard-schematic.blogspot.com/
SB 1202
C674
C674
SC1U16V3ZY-GP
SC1U16V3ZY-GP
DY
DY
C705
C705
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C390
C390
1 2
C392
C392
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
4
1 2
1 2
C689
C689
C383
C383
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
1 2
DY
DY
VCCLAN_1D05V_INT_ICH
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5VGLANPLL_ICH
3D3V_S0
1mA
A23
A6
AE1
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25
AJ19
AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15
AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10
AC9
AC18
AC19
AC21
G10
G9
AC12
AC13
AC14
AJ5
AA7
AB6
AB7
AC6
AC7
A10
A11
A12
B12
A27
D28
D29
E26
E27
A26
SB1F
SB1F
VCCRTC
V5REF
V5REF_SUS
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCCSATAPLL
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCCUSBPLL
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCCLAN1_05
VCCLAN1_05
VCCLAN3_3
VCCLAN3_3
VCCGLANPLL
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN3_3
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
CORE
CORE
VCCA3GP ATX ARX USB CORE
VCCA3GP ATX ARX USB CORE
VCCP_CORE
VCCP_CORE
PCI
PCI
VCCPSUS VCCPUSB
VCCPSUS VCCPUSB
GLAN POWER
GLAN POWER
3
6 OF 6
6 OF 6
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCCDMIPLL
VCCDMI
VCCDMI
V_CPU_IO
V_CPU_IO
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCHDA
VCCSUSHDA
VCCSUS1_05
VCCSUS1_05
VCCSUS1_5
VCCSUS1_5
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCCL1_05
VCCCL1_5
VCCCL3_3
VCCCL3_3
3
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
R29
W23
Y23
AB23
AC23
AG29
AJ6
AC10
AD19
AF20
AG24
AC20
B9
F9
G3
G6
J2
J7
K7
AJ4
AJ3
TP_VCCSUS1D05V_ICH_1
AC8
F17
VCCSUS1D5V_INT_ICH
AD8
F18
A18
D16
D17
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
E22
AF1
T1
T2
T3
T4
T5
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7
G22
G23
A24
B24
Place near ICH9M Layout Note:
1.16A
1 2
C736
C736
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_DMIPLL_ICH_S0
SCD01U16V2KX-3G P
SCD01U16V2KX-3GP
1D05V_DMI_ICH_S0
1 2
1 2
C677
C677
SCD1U10V 2KX-4GP
SCD1U10V 2KX-4GP
VCC3_3=308mA
3D3V_S0
1 2
1 2
C395
C395
C721
C721
SCD 1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SB 1202
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C743
C743
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C730
C730
VCCCL1D05V_INT_ICH
VCCCL1D5V_INT_ICH
19mA
1 2
C744
C744
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
C723
C723
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C731
C731
DY
DY
C688
C688
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C374
C374
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCCHDA_ICH
VCCSUSHDA_ICH
1 2
C407
C407
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C734
C734
DY
DY
1 2
C398
C398
3D3V_S0
1 2
C735
C735
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C256
C256
3D3V_S0
1 2
1 2
212mA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
1D05V_S0
1 2
C384
C384
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C713
C713
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C728
C728
C729
C729
3D3V_S0
1 2
C698
C698
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C408
C408
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S5
C726
C726
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S5
C327
C327
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C404
C404
C405
C405
DY
DY
DY
DY
2
R433
R433
0R0603-PAD
0R0603-PAD
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
C661
C661
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C745
C745
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
32mA
32mA
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1 2
1 2
C746
C746
C391
C391
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
23mA
1D5V_S0
L9
L9
1 2
IND-1D2UH-10-GP
1 2
C707
C707
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
DY
DY
SB 1202
1D05V_S0
IND-1D2UH-10-GP
68.1R220.10D
68.1R220.10D
41mA
1D05V_S0
2mA
1 2
1 2
C716
C716
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 2
1 2
C406
C406
DY
DY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C669
C669
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C717
C717
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C738
C738
SC4 D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DIS
DIS
R403 0R2J-2-GP
R403 0R2J-2-GP
1 2
R402 0R2J-2-GP
R402 0R2J-2-GP
1 2
UMA
UMA
DIS
DIS
R408 0R2J-2-GP
R408 0R2J-2-GP
1 2
R409 0R2J-2-GP
R409 0R2J-2-GP
1 2
UMA
UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
ICH9-M (3 of 4)
ICH9-M (3 of 4)
ICH9-M (3 of 4)
JV50
JV50
JV50
3D3V_S0
1D5V_S0
3D3V_S5
1D5V_S5
14 60 Thursday, January 08, 2009
14 60 Thursday, January 08, 2009
14 60 Thursday, January 08, 2009
1
SB
SB
SB
of
of
of
A
SB1E
SB1E
AA26
VSS
AA27
VSS
AA3
VSS
AA6
VSS
AB1
VSS
AA23
VSS
AB28
VSS
AB29
VSS
AB4
VSS
AB5
VSS
AC17
VSS
4 4
3 3
2 2
1 1
AC26
VSS
AC27
VSS
AC3
VSS
AD1
VSS
AD10
VSS
AD12
VSS
AD13
VSS
AD14
VSS
AD17
VSS
AD18
VSS
AD21
VSS
AD28
VSS
AD29
VSS
AD4
VSS
AD5
VSS
AD6
VSS
AD7
VSS
AD9
VSS
AE12
VSS
AE13
VSS
AE14
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE3
VSS
AE4
VSS
AE6
VSS
AE9
VSS
AF13
VSS
AF16
VSS
AF18
VSS
AF22
VSS
AH26
VSS
AF26
VSS
AF27
VSS
AF5
VSS
AF7
VSS
AF9
VSS
AG13
VSS
AG16
VSS
AG18
VSS
AG20
VSS
AG23
VSS
AG3
VSS
AG6
VSS
AG9
VSS
AH12
VSS
AH14
VSS
AH17
VSS
AH19
VSS
AH2
VSS
AH22
VSS
AH25
VSS
AH28
VSS
AH5
VSS
AH8
VSS
AJ12
VSS
AJ14
VSS
AJ17
VSS
AJ8
VSS
B11
VSS
B14
VSS
B17
VSS
B2
VSS
B20
VSS
B23
VSS
B5
VSS
B8
VSS
C26
VSS
C27
VSS
E11
VSS
E14
VSS
E18
VSS
E2
VSS
E21
VSS
E24
VSS
E5
VSS
E8
VSS
F16
VSS
F28
VSS
F29
VSS
G12
VSS
G14
VSS
G18
VSS
G21
VSS
G24
VSS
G26
VSS
G27
VSS
G8
VSS
H2
VSS
H23
VSS
H28
VSS
H29
VSS
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
A
5 OF 6
5 OF 6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTF_VSS#A1
NCTF_VSS#A2
NCTF_VSS#B1
NCTF_VSS#A29
NCTF_VSS#A28
NCTF_VSS#B29
NCTF_VSS#AJ1
NCTF_VSS#AJ2
NCTF_VSS#AH1
NCTF_VSS#AJ28
NCTF TEST PIN:
NCTF TEST PIN:
NCTF_VSS#AJ29
A1,A2,B1,A28,A29,B29
AH1,AJ1,AJ2,AH29,AJ28,AJ29
A1,A2,B1,A28,A29,B29
AH1,AJ1,AJ2,AH29,AJ28,AJ29
NCTF_VSS#AH29
B
H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25
TP_A1
A1
TP_A2
A2
TP_B1
B1
TP_A29
A29
TP_A28
A28
TP_B29
B29
TP_AJ1
AJ1
TP_AJ2
AJ2
TP_AH1
AH1
TP_AJ28
AJ28
TP_AJ29
AJ29
TP_AH29
AH29
http://laptop-motherboard-schematic.blogspot.com/
TP152 TPAD14-GP TP152 TPAD14-GP
1
TP151 TPAD14-GP TP151 TPAD14-GP
1
TP147 TPAD14-GP TP147 TPAD14-GP
1
TP149 TPAD14-GP TP149 TPAD14-GP
1
TP150 TPAD14-GP TP150 TPAD14-GP
1
TP146 TPAD14-GP TP146 TPAD14-GP
1
TP120 TPAD14-GP TP120 TPAD14-GP
1
TP121 TPAD14-GP TP121 TPAD14-GP
1
TP130 TPAD14-GP TP130 TPAD14-GP
1
TP119 TPAD14-GP TP119 TPAD14-GP
1
TP118 TPAD14-GP TP118 TPAD14-GP
1
TP129 TPAD14-GP TP129 TPAD14-GP
1
B
C
SMB_CLK 13,25,32,33
SMB_DATA 13,25,32,33
D
3D3V_S5 3D3V_S0
SRN4K7J-10-GP
SRN4K7J-10-GP
678
RN41
RN41
123
4 5
3D3V_S0
Q15
Q15
3 4
2
5
1
6
2nd = 84.27002.C3F
2nd = 84.27002.C3F
SMBUS
C
D
E
SMBC_ICH 3,16,17
2N7002DW-1-G P
2N7002DW-1-G P
SMBD_ICH 3,16,17
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
ICH9-M (4 of 4)
ICH9-M (4 of 4)
ICH9-M (4 of 4)
JV50
JV50
JV50
E
15 60 Thursday, January 08, 2009
15 60 Thursday, January 08, 2009
15 60 Thursday, January 08, 2009
SB
SB
SB
of
of
of
A
B
C
D
E
DDR3 SOCKET_1
4 4
DM1
M_A_A[14..0] 8
TP154 TPAD14-GP TP154 TPAD 14-GP
M_A_BS#2 8
M_A_BS#0 8
M_A_BS#1 8
M_A_DQ[63..0] 8
3 3
2 2
1 1
Layout Note
DDR_VREF_S3_1
C460
C460
Layout Note
DDR_VREF_S3_1
C468
C468
A
ΚΚΚΚ
Near Pin 126
1 2
1 2
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
ΚΚΚΚ
Near Pin 1
1 2
1 2
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
C462
C462
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C461
C461
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
http://laptop-motherboard-schematic.blogspot.com/
M_A_DQS#[7..0] 8
M_A_DQS[7..0] 8
M_ODT0 7
M_ODT1 7
DDR_VREF_S3_1
DDR_VREF_S3_1
DDR3_DRAMRST# 7,17
DDR_VREF_S3
1 2
1 2
C459
C459
C438
C438
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
B
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
1
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-8-GP
DDR3-204P-8-GP
62.10017.G21
62.10017.G21
High 9.2mm
NP1
NP1
NP2
NP2
110
RAS#
113
WE#
115
CAS#
114
CS0#
121
CS1#
73
CKE0
74
CKE1
101
CK0
103
CK0#
102
CK1
104
CK1#
M_A_DM0
11
DM0
M_A_DM1 M_A_DM1
28
DM1
M_A_DM2 M_A_DM2
46
DM2
M_A_DM3 M_A_DM3
63
DM3
M_A_DM4 M_A_DM4
136
DM4
M_A_DM5 M_A_DM5
153
DM5
M_A_DM6 M_A_DM6
170
DM6
M_A_DM7 M_A_DM7
187
DM7
SMBD_ICH
200
SDA
SMBC_ICH
202
SCL
198
EVENT#
199
VDDSPD
NC#/TEST
NORMAL TYPE
NC#1
NC#2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
DDRA_SA0
197
SA0
DDRA_SA1
201
SA1
77
122
1D5V_S3
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
C
M_A_RAS# 8
M_A_WE# 8
M_A_CAS# 8
M_CS0# 7
M_CS1# 7
M_CKE0 7
M_CKE1 7
M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7
M_A_DM[7..0] 8
SMBD_ICH 3,15,17
SMBC_ICH 3,15,17
PM_EXTTS#0 7,17
R 451 10KR2J-3-GP R451 10KR2J-3-GP
1 2
1 2
R450 10KR2J-3-GP R450 10KR2J-3-GP
1D5V_S3
SB 1209
1 2
C441
C441
3D3V_S0
1 2
1 2
C434
C434
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
C433
C433
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1 2
C442
C442
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C437
C437
C463
C463
C440
C440
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C458
C458
C439
C439
D
1 2
1 2
1 2
1 2
C465
C465
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C466
C466
DY
DY
1 2
C464
C464
TC8
TC8
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
ST330U6VDM-2-GP
ST330U6VDM-2-GP
DY
DY
2nd = 77.23371.12L
2nd = 77.23371.12L
DDR3 Socket
DDR3 Socket
DDR3 Socket
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
JV50
JV50
JV50
E
SB
SB
SB
of
16 60 Thursday, January 08, 2009
of
16 60 Thursday, January 08, 2009
of
16 60 Thursday, January 08, 2009
A
B
C
D
E
DDR3 SOCKET_2
DM2
4 4
3 3
Layout Note
2 2
Layout Note
1 1
DDR_VREF_S3_1
C770
C770
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
DDR_VREF_S3_1
C423
C423
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
ΚΚΚΚ
Near Pin 126
1 2
1 2
C771
C771
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
ΚΚΚΚ
Near Pin 1
1 2
1 2
C424
C424
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M_B_A[14..0] 8
M_B_A15
TP157 TPAD14-GP TP157 TPAD14-GP
1
M_B_BS#2 8
M_B_BS#0 8
M_B_BS#1 8
M_B_DQ[63..0] 8
M_B_DQS#[7..0] 8
http://laptop-motherboard-schematic.blogspot.com/
M_B_DQS[7..0] 8
M_ODT2 7
M_ODT3 7
DDR_VREF_S3_1
DDR_VREF_S3_1
DDR3_DRAMRST# 7,16
DDR_VREF_S3
1 2
1 2
C420
C420
C425
C425
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-9-GP
DDR3-204P-9-GP
62.10017.G11
62.10017.G11
High 5.2 mm
NP1
NP1
NP2
NP2
110
RAS#
113
WE#
115
CAS#
114
CS0#
121
CS1#
73
CKE0
74
CKE1
101
CK0
103
CK0#
102
CK1
104
CK1#
M_B_DM0
11
DM0
M_B_DM1
28
DM1
M_B_DM2
46
DM2
M_B_DM3
63
DM3
M_B_DM4
136
DM4
M_B_DM5
153
DM5
M_B_DM6
170
DM6
M_B_DM7
187
DM7
200
SDA
202
SCL
198
EVENT#
199
VDDSPD
DDRB_SA0
197
SA0
DDRB_SA1
201
SA1
77
NC#1
122
NC#2
125
NC#/TEST
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
NORMAL TYPE
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
1D5V_S3
10KR2J-3-GP
10KR2J-3-GP
R242
R242
R241
R241
10KR2J-3-GP
10KR2J-3-GP
M_B_RAS# 8
M_B_WE# 8
M_B_CAS# 8
M_CS2# 7
M_CS3# 7
M_CKE2 7
M_CKE3 7
M_CLK_DDR2 7
M_CLK_DDR#2 7
M_CLK_DDR3 7
M_CLK_DDR#3 7
M_B_DM[7..0] 8
SMBD_ICH 3,15,16
SMBC_ICH 3,15,16
PM_EXTTS#0 7,16
1 2
1 2
3D3V_S0
1 2
-1
1 2
C399
C399
C400
C400
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
DY
DY
1D5V_S3
1 2
1 2
C766
C766
C763
C763
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C768
C768
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
C769
C769
1 2
C767
C767
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SB 1202 1209
1 2
1 2
C426
C426
C428
C428
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C421
C421
1 2
1 2
C429
C429
TC10
TC10
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C422
C422
DY
DY
ST330U6VDM-2-GP
ST330U6VDM-2-GP
DY
DY
2nd = 77.23371.12L
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2nd = 77.23371.12L
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
DDR3 Socket2
DDR3 Socket2
DDR3 Socket2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
JV50
JV50
JV50
E
SB
SB
SB
of
17 60 Thursday, January 08, 2009
17 60 Thursday, January 08, 2009
17 60 Thursday, January 08, 2009
USBPN4
USBPP4
LCD: DCBATOUT 2 pins
LED: DCBATOUT 3 pins
1 2
SC 22P50V2JN-4GP
SC 22P50V2JN-4GP
1 2
SC22P50V2JN-4GP
SC22P50V2JN-4GP
EC27
EC27
EC26
EC26
Internal Mic
INT_M IC1 27,51
DY
DY
DY
DY
DCBATOUT
LCD/INVERTER/CCD CONN
SB 1202
LCD1
LCD1
41
40
39422
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
ACES-CONN40C-2-GP
ACES-CONN40C-2-GP
20.F1230.040
20.F1230.040
3D3V_S0
SB 1208
F1
F1
1 2
POLYSW-1D1A24V-GP
POLYSW-1D1A24V-GP
69.50007.A31
69.50007.A31
-1
C2
SC10U35V0ZY-GPC2SC10U35V0ZY-GP
LCD_CB_SEL 35
USBPP4 13
USBPN4 13
DBC_EN 35
LCD_EDID_CLK
LCD_EDID_DAT
BRIGHTNESS_CN
BLON_OUT_1
DCBATOUT_LCD1
1 2
LCDVDD
SCD1U16V2ZY-2GPC1SCD1U16V2ZY-2GP
1 2
C1
1
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
CCD_PWR
LCD_TXBCLK+
LCD_TXBCLKLCD_TXBOUT2+
LCD_TXBOUT2LCD_TXBOUT1+
LCD_TXBOUT1LCD_TXBOUT0+
LCD_TXBOUT0LCD_TXACLK+
LCD_TXACLKLCD_TXAOUT2+
LCD_TXAOUT2LCD_TXAOUT1+
LCD_TXAOUT1LCD_TXAOUT0+
LCD_TXAOUT0-
-1
SB 1202
UMA
UMA
1 2
DIS
BRIGHTNESS_CN
BLON_OUT_1
GMCH_LCDVDD_ON 7
LCDVDD_ON 56
SC100P50V2JN-3GPC6SC100P50V2JN-3GP
1 2
C6
UMA
UMA
1 2
R6 0R2J-2-GP
R6 0R2J-2-GP
R5
R5
10KR2J-3-GP
10KR2J-3-GP
SC100P50V2JN-3GPC4SC100P50V2JN-3GP
1 2
DIS
DIS
DIS
1 2
1 2
1KR2F-3-GPR41KR2F-3-GP
1 2
LCDVDD
R2
10KR2J-3-GPR210KR2J-3-GP
R4
C4
Layout 40 mil
1 2
1 2
1 2
C7
C7
C3
SC4 D7U6D3V3KX-GPC3SC4D7U6D3V3KX-GP
SC D1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
SB 1202
AMIC1
AMIC1
3
1
2
4
PTWO-CON2-3-GP
PTWO-CON2-3-GP
20.F1214.002
20.F1214.002
SB 1202
CCD_PWR
1 2
C498
C498
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
CCD_PWR
1 2
C499
C499
DY
DY
SB 1202
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
F2
F2
1 2
FUSE-1A6V-2-GP
FUSE-1A6V-2-GP
69.50007.721
69.50007.721
2nd = 69.50007.981
2nd = 69.50007.981
http://laptop-motherboard-schematic.blogspot.com/
R3
R3
33R2J-2-GP
33R2J-2-GP
R1
R1
33R2J-2-GP
33R2J-2-GP
U1
U1
1
EN
2
GND
OUT3IN#4
G5285T11U-GP
G5285T11U-GP
74.05285.07F
74.05285.07F
3D3V_S0
L_BKLTCTL 7
BRIGHTNESS 35
BLON_OUT 35
5
IN#5
4
3D3V_S0
RN61
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
LCD_TXBCLK+
LCD_TXBCLK-
LCD_TXACLK+
LCD_TXACLK-
modify by RF
LCD_EDID_CLK 56
LCD_EDID_DAT 56
CLK_DDC_EDID 7
DAT_DDC_EDID 7
RN61
1
8
2
7
3
6
4 5
SRN0J-7-GP
SRN0J-7-GP
RN60
RN60
1
8
2
7
3
6
4 5
SRN0J-7-GP
SRN0J-7-GP
RN18
RN18
1
8
2
7
3
6
4 5
SRN0J-7-GP
SRN0J-7-GP
RN15
RN15
1
8
2
7
3
6
4 5
SRN0J-7-GP
SRN0J-7-GP
RN24
RN24
1
8
2
7
3
6
4 5
SRN0J-7-GP
SRN0J-7-GP
RN22
RN22
1
8
2
7
3
6
4 5
SRN0J-7-GP
SRN0J-7-GP
RN59
RN59
1
8
2
7
3
6
4 5
SRN0J-7-GP
SRN0J-7-GP
RN58
RN58
1
8
2
7
3
6
4 5
SRN0J-7-GP
SRN0J-7-GP
1 2
C601 SC5D6P50V2CN-1G P
C601 SC5D6P50V2CN-1G P
DY
DY
1 2
C599 SC5D6P50V2CN-1G P
C599 SC5D6P50V2CN-1G P
DY
DY
1 2
C607 SC 5D6P50V2CN-1G P
C607 SC 5D6P50V2CN-1G P
DY
DY
1 2
C608 SC5D6P50V2CN-1G P
C608 SC5D6P50V2CN-1G P
DY
DY
GMCH_TXACLK- 7
GMCH_TXACLK+ 7
GMCH_TXAOUT2- 7
GMCH_TXAOUT2+ 7
GMCH_TXAOUT1+ 7
GMCH_TXAOUT1- 7
GMCH_TXAOUT0- 7
GMCH_TXAOUT0+ 7
GMCH_TXBOUT2- 7
GMCH_TXBOUT2+ 7
GMCH_TXBCLK- 7
GMCH_TXBCLK+ 7
GMCH_TXBOUT0- 7
GMCH_TXBOUT0+ 7
GMCH_TXBOUT1- 7
GMCH_TXBOUT1+ 7
GPU_TXACLK- 55
GPU_TXACLK+ 55
GPU_TXAOUT2- 55
GPU_TXAOUT2+ 55
GPU_TXAOUT1+ 55
GPU_TXAOUT1- 55
GPU_TXAOUT0- 55
GPU_TXAOUT0+ 55
GPU_TXBOUT2- 55
GPU_TXBOUT2+ 55
GPU_TXBCLK- 55
GPU_TXBCLK+ 55
GPU_TXBOUT0- 55
GPU_TXBOUT0+ 55
GPU_TXBOUT1- 55
GPU_TXBOUT1+ 55
3D3V_S0
1
2 3
RN2
RN2
SRN2K2J-1-GP
SRN2K2J-1-GP
4
LCD_EDID_CLK
UMA
UMA
RN1
RN1
2 3
1
4
SRN0J-10-GP-U
SRN0J-10-GP-U
JV50
JV50
JV50
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
LCD CONN
LCD CONN
LCD CONN
LCD_EDID_DAT
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
JV50
JV50
JV50
of
18 60 Thursday, January 08, 2009
18 60 Thursday, January 08, 2009
18 60 Thursday, January 08, 2009
SB
SB
SB
LCD_TXACLKLCD_TXACLK+
LCD_TXAOUT2LCD_TXAOUT2+
LCD_TXAOUT1+
LCD_TXAOUT1LCD_TXAOUT0LCD_TXAOUT0+
LCD_TXBOUT2LCD_TXBOUT2+
LCD_TXBCLKLCD_TXBCLK+
LCD_TXBOUT0LCD_TXBOUT0+
LCD_TXBOUT1LCD_TXBOUT1+
LCD_TXACLKLCD_TXACLK+
LCD_TXAOUT2LCD_TXAOUT2+
LCD_TXAOUT1+
LCD_TXAOUT1LCD_TXAOUT0LCD_TXAOUT0+
LCD_TXBOUT2LCD_TXBOUT2+
LCD_TXBCLKLCD_TXBCLK+
LCD_TXBOUT0LCD_TXBOUT0+
LCD_TXBOUT1LCD_TXBOUT1+
1 2
C5
SC4 D7U6D3V3KX-GPC5SC4D7U6D3V3KX-GP
123
A
RN26
RN26
UMA
UMA
Close to MXM card
1
8
2
7
GMCH_BLUE 7
6
GMCH_GREEN 7
GMCH_RED 7
1 2
1 2
C158
C158
C137
C137
DY
DY
DY
DY
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
678
4 5
RN25
RN25
SRN150F-1-GP
SRN150F-1-GP
3
4 5
SRN0J-7-GP
SRN0J-7-GP
Layout Note:
Place these resistors
close to the CRT-out
connector
CRT_RED 54
4 4
CRT_GREEN 54
CRT_BLUE 54
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
3 3
B
Ferrite bead impedance: 10 ohm@100MHz
L5
L5
1 2
FCB1608CF-GP
FCB1608CF-GP
68.00230.021
68.00230.021
L4
L4
1 2
FCB1608CF-GP
FCB1608CF-GP
68.00230.021
68.00230.021
L3
L3
1 2
FCB1608CF-GP
FCB1608CF-GP
1 2
C109
C109
68.00230.021
68.00230.021
DY
DY
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
C
CRT_R
CRT_G
DIS
1 2
C165
C165
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
CRT_B
1 2
1 2
C108
C108
C151
C151
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
CRT_HSYNC 54
CRT_VSYNC 54
GMCH_HSYNC 7
GMCH_VSYNC 7
DIS
2 3
1
RN63
RN63
SRN0J-10-GP-U
SRN0J-10-GP-U
UMA
UMA
1
2 3
RN62
RN62
SRN0J-10-GP-U
SRN0J-10-GP-U
4
4
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1 2
C632
C632
DY
DY
D
Hsync & Vsync level shift
HSYNC_1
VSYNC_1
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1 2
C633
C633
DY
DY
14
4
5 6
U18B
U18B
7
TSAHCT125PW -GP
TSAHCT125PW -GP
5V_S0
2 3
1 2
14
1
U18A
U18A
7
TSAHCT125PW -GP
TSAHCT125PW -GP
C107
C107
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5V_S0 5V_S0
14
10
9 8
U18C
U18C
7
TSAHCT125PW -GP
TSAHCT125PW -GP
E
SB
CRT_HSYNC1
CRT_VSYNC1
14
13
12 11
U18D
U18D
7
TSAHCT125PW -GP
TSAHCT125PW -GP
DDC_CLK & DATA level shift
FUSE-1D1A6V-4GP- U
FUSE-1D1A6V-4GP- U
69.50007.691
69.50007.691
U42
U42
6
2N7002EDW-G P
2N7002EDW-G P
84.27002.F3F
84.27002.F3F
23 45
1
5V_CRT_S0
F3
F3
1 2
5V_CRT_DDC
5V_S0
D4
D4
CH551H-30PT-GP
CH551H-30PT-GP
83.R5003.C8F
83.R5003.C8F
2 1
678
123
500mA
RN20
RN20
SRN10KJ-6-GP
SRN10KJ-6-GP
4 5
3D3V_S0
CRT_IN#_R
DAT_DDC1_5
CLK_DDC1_5
5V_S0 5V_S0 5V_S0
D24
D24
CRT_R CRT_G CRT_B
3
DY
DY
BAV99PT-GP-U
BAV99PT-GP-U
CRT I/F & CONNECTOR
2 2
1 2
C128 SC 100P50V2JN-3GPDYC128 SC 100P50V2JN-3GP
DY
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
1 2
C115
C115
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C105
C105
DAT_DDC1_5
CRT_HSYNC1
CRT_VSYNC1
CLK_DDC1_5
1 2
C93
C93
DY
DY
CRT_R
CRT_G
CRT_B
CRT_IN#_R
CRT1
CRT1
16
1
2
3
4
5
17
VIDEO-15-42-GP-U
VIDEO-15-42-GP-U
20.20378.015
20.20378.015
D23
D23
1
2
6
11
7
12
8
13
9
14
10
15
3
DY
DY
BAV99PT-GP-U
BAV99PT-GP-U
DAT_DDC1_5
CRT_HSYNC1
CRT_VSYNC1
CLK_DDC1_5
1
2
5V_CRT_S0
D22
D22
3
DY
DY
BAV99PT-GP-U
BAV99PT-GP-U
C602
C602
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1
2
DIS
DIS
CRT_DDCDATA 54
CRT_DDCCLK 54
GMCH_DDCDATA 7
GMCH_DDCCLK 7
2 3
1
RN57
RN57
SRN0J-10-GP-U
SRN0J-10-GP-U
UMA
UMA
1
2 3
RN53
RN53
SRN0J-10-GP-U
SRN0J-10-GP-U
SRN2K2J-1-GP
SRN2K2J-1-GP
4
4
RN66
RN66
3D3V_S0
4
1
2 3
DAT_DDC1_5_Q
CLK_DDC1_5_Q
6
1
1 1
7
2
8
3
9
4
10
5
CRT_DEC# 35
A
R93
R93
470R2J-2-GP
470R2J-2-GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
CRT_IN#_R
1 2
1 2
C98
C98
CRT_IN#_R
http://laptop-motherboard-schematic.blogspot.com/
B
D21
D21
3
DY
DY
BAV99PT-GP-U
BAV99PT-GP-U
5V_S0
1
2
C
D
JV50
JV50
JV50
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
CRT CONN
CRT CONN
CRT CONN
JV50
JV50
JV50
of
19 60 Thursday, January 08, 2009
19 60 Thursday, January 08, 2009
19 60 Thursday, January 08, 2009
E
SB
SB
SB