5
4
3
2
1
PCB Layer Stackup
L1: Component
Ferrari 7 GT Block Diagram
2008/09/01
L2: GND
L3: Signal
Project code:91.4BA01.001
D D
DIMM1
DDR2 SODIMM
DDR2 SODIMM
DIMM2
Power Switch
G577BR91U
New card
DDR II 667/800
DDR II 667/800
PCI-E x 1
AMD
Giffin
S1g2 Socket
16x16
OUT
HyperTransport
IN
PCB P/N :08225
Port Replicator
USB
RJ45/CRT//DVI-D/SPDIF/MIC
in/Line in/Line out/AC Jack
L4: VCC
L5: GND
L6: Signal
L7: GND
L8: Component
CPU V_CORE
ISL6265HR
INPUT
DCBATOUT
37
OUTPUT
VCC_CORE_S0
Mini Card
802.11a/b/g/n
C C
RJ45
XFORM
LAN
Broadcom
5764M
25MHz
INT. MIC Array
Line In
Codec
ALC268
B B
MIC In
AMP
G1431
INT.SPKR
AMP
G1412
Line Out
(No-SPDIF)
MODEM
RJ11
A A
MDC Card
HDD
CDROM
5
PCI-E x 1
PCI-E x 1
G792
AZALIA
AZALIA
SATA
SATA
AMD
RS780M
A-Link
AMD
SB700
USB x 3
USB
3 Port
4
PCI-E x 4
16/17/18/19/20
USB
MINI USB
BlueTooth
LVDS
USB
PCI BUS
24.576MHz
25MHz
32.768KHz
USB
CCD
3
CRT
12.1" LCD
LPC BUS
USB
Finger print
RTL5158
JMicron
JMB380
USB
CLK GEN.
ICS 9LPRS480BKLTF
MS/MS Pro/xD/
MMC/SD
32.768KHz
KBC
Winbond
WPC775F
Touch
Pad
INT.
KB
SPI
MX25L1605DM2I
2
5 in 1
1394
CONN
BIOS
SYSTEM DC/DC
TPS51124
INPUT
DCBATOUT
14.318MHz
TPS51120
INPUT
DCBATOUT
TPS51117
INPUT
DCBATOUT
SYSTEM LDO
G2997
INPUT
1D8V_S3
G9161
INPUT
3D3V_S5
G9166
INPUT
3D3V_S0 2D5V_S0
G957
INPUT
3D3V_S0 1D5V_S0
Battery Charger
MAX8371
FIR
SB
SB
SB
Title
Title
Title
Interactive Circuit Map
Interactive Circuit Map
Interactive Circuit Map
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
F7-GT
F7-GT
Date: Sheet of
Date: Sheet of
Date: Sheet of
F7-GT
INPUTS
AD+
BAT+
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
14 7 Monday, September 01, 2008
14 7 Monday, September 01, 2008
14 7 Monday, September 01, 2008
1
OUTPUT
1D2V_S0
1D1V_S0
OUTPUT
5V_S5
3D3V_S5
OUTPUT
1D8V_S3
OUTPUT
0D9V_S3
OUTPUT
1D2V_S5
OUTPUT
OUTPUT
OUTPUTS
DCBATOUT
38
40
39
41
43
SB
SB
SB
5
4
3
2
1
3D3V_S0 3D3V_CLK_VDD
Do Not Stuff
Do Not Stuff
1 2
R180
R180
D D
3D3V_S0
R179
R179
R367
R367
1 2
Do Not Stuff
Do Not Stuff
DY
DY
1 2
0R3-0-U-GP
0R3-0-U-GP
1 2
C274
C274
1D2V_S0
1 2
C276
C276
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C275
C275
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1D1V_CLK_VDDIO
1 2
1 2
C280
C280
C537
C537
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C551
C551
1 2
1 2
C559
C559
C557
C557
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C540
C540
C560
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C560
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
20080724
3D3V_CLK_VDD
Do Not Stuff
Do Not Stuff
C C
CLK_PCIE_SB 15
CLK_PCIE_SB# 15
CLK_PCIE_LAN 22
CLK_PCIE_LAN# 22
CLK_NB_GPPSB 11
CLK_NB_GPPSB# 11
CLK_PCIE_MINI1 27
CLK_PCIE_MINI1# 27
CLK_PCIE_NEW 27
CLK_PCIE_NEW# 27
CLK_PCIE_1394 24
CLK_PCIE_1394# 24
B B
1 2
R357
R357
SC1U10V2KX-1GP
SC1U10V2KX-1GP
CLK_NBHT_CLK 11
CLK_NBHT_CLK# 11
C550
C550
1 2
TP106 Do Not Stuff TP106 Do Not Stuff
TP208 Do Not Stuff TP208 Do Not Stuff
1 2
1 2
C535
C535
C283
C283
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C558
C558
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D1V_CLK_VDDIO
CLK_SRC7T_LPRS
1
CLK_SRC7C_LPRS
1
1 2
C536
C536
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_CLK_VDD
VDD_REF
3D3V_48MPWR_S0
1 2
C554
C554
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
U29
U29
26
VDDATIG
25
VDDATIG_IO
48
VDDCPU
47
VDDCPU_IO
16
VDDSRC
17
VDDSRC_IO
11
VDDSRC_IO
35
VDDSB_SRC
34
VDDSB_SRC_IO
40
VDDSATA
4
VDD
55
VDDHTT
56
VDDREF
63
VDD48
PD#
51
PD#
22
SRC0T_LPRS
21
SRC0C_LPRS
20
SRC1T_LPRS
19
SRC1C_LPRS
15
SRC2T_LPRS
14
SRC2C_LPRS
13
SRC3T_LPRS
12
SRC3C_LPRS
9
SRC4T_LPRS
8
SRC4C_LPRS
SRC6T/SATAT_LPRS42GNDSATA
41
SRC6C/SATAC_LPRS
6
SRC7T_LPRS/27MHZ_SS
5
SRC7C_LPRS/27MHZ_NS
37
SB_SRC0T_LPRS
36
SB_SRC0C_LPRS
32
SB_SRC1T_LPRS
31
SB_SRC1C_LPRS
54
HTT0T_LPRS/66M
53
HTT0C_LPRS/66M
ICS9LPRS480BKLFT-GP
ICS9LPRS480BKLFT-GP
71.09480.A03
71.09480.A03
SMBCLK
SMBDAT
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#
CPUKG0T_LPRS
CPUKG0C_LPRS
48MHZ_0
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
GNDATIG
GND
GNDHTT
GNDREF
GNDCPU
GND48
GNDSRC
GNDSRC
GNDSB_SRC
GND
61
X1
62
X2
2
3
30
29
28
27
23
45
44
39
38
50
49
64
59
58
57
43
24
7
52
60
46
1
10
18
33
65
Olan -1 change to 71.09480.A03
3D3V_S0
R364 10KR2J-3-GP R364 10KR2J-3-GP
3D3V_S0
PD#
R366
1 2
Do Not Stuff
Do Not Stuff
DY
DY
R366
1 2
SB_PWRGD 16,33
20080716
3D3V_S0
GEN_XTAL_IN
GEN_XTAL_OUT
CLK_SMBCLK
CLK_SMBDAT
CLK_VGA
CLK_VGA#
CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#
CLK_48
REF0
REF1
REF2
R349
R349
1 2
2R3J-GP
2R3J-GP
3000mA.80ohm
R176
R176
Do Not Stuff
Do Not Stuff
2ND = 82.30005.951
2ND = 82.30005.951
DY
DY
1 2
CL=20pF±0.2pF
G34
G34
G33
G33
1 2
1 2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP110 Do Not Stuff TP110 Do Not Stuff
1
TP116 Do Not Stuff TP116 Do Not Stuff
1
TP118 Do Not Stuff TP118 Do Not Stuff
1
TP115 Do Not Stuff TP115 Do Not Stuff
1
TP117 Do Not Stuff TP117 Do Not Stuff
1
R342 33R2J-2-GP R342 33R2J-2-GP
1 2
DY
DY
Do Not Stuff
Do Not Stuff
EC128
EC128
REF0
1
1
1 2
3D3V_48MPWR_S0
1 2
1 2
X-14D31818M-35GP
X-14D31818M-35GP
82.30005.891
82.30005.891
C539
C539
C267
C267
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
Do Not Stuff
Do Not Stuff
SMBC0_SB 7,8,16
SMBD0_SB 7,8,16
TP113 Do Not Stuff TP113 Do Not Stuff
TP114 Do Not Stuff TP114 Do Not Stuff
CLK_NB_GFX# 11
C272
C272
1 2
X2
X2
1 2
C271 SC33P50V2JN-3GP C271 SC33P50V2JN-3GP
1 2
CLK_NB_GFX 11
CLKREQ# Internal
pull high
CPU_CLK 5
CPU_CLK# 5
CLK48_USB 16
R351 150R2F-1-GP R351 150R2F-1-GP
1 2
R356 75R2F-2-GP R356 75R2F-2-GP
1 2
OSC_14M_NB
1.1V 158R/90.9R RS780M
SC33P50V2JN-3GP
SC33P50V2JN-3GP
REF1
CLK_NB_14M 11
Due to PLL issue on current clock chip, the SBlink clock
need to come from SRC clocks for RS740 and RS780.
Future clock chip revision will fix this.
Clock chip has internal serial terminations
for differencial pairs, external resistors are
reserved for debug purpose.
SB_20080825
DY
DY
R453
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
NB CLOCKS
HT_REFCLKP
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK
GPP_REFCLK
GPPSB_REFCLK 100M DIFF 100M DIFF
* RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.
R453
1 2
DY
DY
R454
R454
1 2
NB CLOCK INPUT TABLE
RS740 RX780 RS780
66M SE(SINGLE END)
NC
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
NC NC vref
100M DIFF
NC
100M DIFF
CLK_SB_25M 15
100M DIFF
100M DIFF
100M DIFF
100M DIFF
100M DIFF
100M DIFF
100M DIFF(IN/OUT)*
NC or 100M DIFF OUTPUT
R361
R361
10KR2J-3-GP
A A
10KR2J-3-GP
DY
DY
R360
R360
Do Not Stuff
Do Not Stuff
1 2
1 2
TP217 Do Not Stuff TP217 Do Not Stuff
TP109 Do Not Stuff TP109 Do Not Stuff
REF0
1
REF1
1
REF2 REF2 REF2 REF2 REF2 REF2 REF2 REF2 REF2 REF2 REF2 REF2 REF2 REF2
SEL_SATA
REF1
SEL_HTT66
REF0
5
1
100 MHz non-spreading differential SRC clock
*0
100 MHz spreading differential SRC clock
1
66 MHz 3.3V single ended HTT clock
0 * 100 MHz differential HTT clock
* default
CPU_CLK(200MHz)
4
SB
SB
SB
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet
CLKGEN_ICS9LPRS480
CLKGEN_ICS9LPRS480
CLKGEN_ICS9LPRS480
F7-GT
F7-GT
F7-GT
24 7 Friday, August 29, 2008
24 7 Friday, August 29, 2008
24 7 Friday, August 29, 2008
1
SB
SB
of
SB
5
D D
4
3
2
1
SB_20080826
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C C
B B
1D2V_S0
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C652
C652
2008/07/23
Place close to socket
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
1 2
C126
C126
SCD22U6D3V2KX-1GP
1 2
C253
C253
HT_NB_CPU_CAD_H0 10
HT_NB_CPU_CAD_L0 10
HT_NB_CPU_CAD_H1 10
HT_NB_CPU_CAD_L1 10
HT_NB_CPU_CAD_H2 10
HT_NB_CPU_CAD_L2 10
HT_NB_CPU_CAD_H3 10
HT_NB_CPU_CAD_L3 10
HT_NB_CPU_CAD_H4 10
HT_NB_CPU_CAD_L4 10
HT_NB_CPU_CAD_H5 10
HT_NB_CPU_CAD_L5 10
HT_NB_CPU_CAD_H6 10
HT_NB_CPU_CAD_L6 10
HT_NB_CPU_CAD_H7 10
HT_NB_CPU_CAD_L7 10
HT_NB_CPU_CAD_H8 10
HT_NB_CPU_CAD_L8 10
HT_NB_CPU_CAD_H9 10
HT_NB_CPU_CAD_L9 10
HT_NB_CPU_CAD_H10 10
HT_NB_CPU_CAD_L10 10
HT_NB_CPU_CAD_H11 10
HT_NB_CPU_CAD_L11 10
HT_NB_CPU_CAD_H12 10
HT_NB_CPU_CAD_L12 10
HT_NB_CPU_CAD_H13 10
HT_NB_CPU_CAD_L13 10
HT_NB_CPU_CAD_H14 10
HT_NB_CPU_CAD_L14 10
HT_NB_CPU_CAD_H15 10
HT_NB_CPU_CAD_L15 10
HT_NB_CPU_CLK_H0 10
HT_NB_CPU_CLK_L0 10
HT_NB_CPU_CLK_H1 10
HT_NB_CPU_CLK_L1 10
HT_NB_CPU_CTL_H0 10
HT_NB_CPU_CTL_L0 10
HT_NB_CPU_CTL_H1 10
HT_NB_CPU_CTL_L1 10
1 2
1 2
C526
C526
C467
C467
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
1 2
C127
C127
1 2
C251
C251
U62A
U62A
D1
D2
D3
D4
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
J3
J2
J5
K5
N1
P1
P3
P4
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
62.10055.111
62.10055.111
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
1.5Amp
HT LINK
HT LINK
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
AE2
VLDT_B0
AE3
VLDT_B1
AE4
VLDT_B2
AE5
VLDT_B3
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
2ND = 62.10055.251
2ND = 62.10055.251
HT_CPU_NB_CAD_H0 10
HT_CPU_NB_CAD_L0 10
HT_CPU_NB_CAD_H1 10
HT_CPU_NB_CAD_L1 10
HT_CPU_NB_CAD_H2 10
HT_CPU_NB_CAD_L2 10
HT_CPU_NB_CAD_H3 10
HT_CPU_NB_CAD_L3 10
HT_CPU_NB_CAD_H4 10
HT_CPU_NB_CAD_L4 10
HT_CPU_NB_CAD_H5 10
HT_CPU_NB_CAD_L5 10
HT_CPU_NB_CAD_H6 10
HT_CPU_NB_CAD_L6 10
HT_CPU_NB_CAD_H7 10
HT_CPU_NB_CAD_L7 10
HT_CPU_NB_CAD_H8 10
HT_CPU_NB_CAD_L8 10
HT_CPU_NB_CAD_H9 10
HT_CPU_NB_CAD_L9 10
HT_CPU_NB_CAD_H10 10
HT_CPU_NB_CAD_L10 10
HT_CPU_NB_CAD_H11 10
HT_CPU_NB_CAD_L11 10
HT_CPU_NB_CAD_H12 10
HT_CPU_NB_CAD_L12 10
HT_CPU_NB_CAD_H13 10
HT_CPU_NB_CAD_L13 10
HT_CPU_NB_CAD_H14 10
HT_CPU_NB_CAD_L14 10
HT_CPU_NB_CAD_H15 10
HT_CPU_NB_CAD_L15 10
HT_CPU_NB_CLK_H0 10
HT_CPU_NB_CLK_L0 10
HT_CPU_NB_CLK_H1 10
HT_CPU_NB_CLK_L1 10
HT_CPU_NB_CTL_H0 10
HT_CPU_NB_CTL_L0 10
HT_CPU_NB_CTL_H1 10
HT_CPU_NB_CTL_L1 10
SKT-BGA638H176
A A
5
4
3
2
SB
SB
SB
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
CPU_HT_LINK I/F_(1/4)
CPU_HT_LINK I/F_(1/4)
CPU_HT_LINK I/F_(1/4)
F7-GT
F7-GT
F7-GT
34 7 Friday, August 29, 2008
34 7 Friday, August 29, 2008
34 7 Friday, August 29, 2008
1
of
SB
SB
SB
5
Place near to CPU2008/07/23
D D
1D8V_S3
C C
B B
A A
4.7u x 4 0.22u X 2 180P x 6
Do Not Stuff
Do Not Stuff
MEM_MA0_ODT0 7,9
MEM_MA0_ODT1 7,9
MEM_MA0_CS#0 7,9
MEM_MA0_CS#1 7,9
MEM_MA_CKE0 7,9
MEM_MA_CKE1 7,9
MEM_MA_CLK0_P 7
MEM_MA_CLK0_N 7
MEM_MA_CLK1_P 7
MEM_MA_CLK1_N 7
MEM_MA_ADD0 7,9
MEM_MA_ADD1 7,9
MEM_MA_ADD2 7,9
MEM_MA_ADD3 7,9
MEM_MA_ADD4 7,9
MEM_MA_ADD5 7,9
MEM_MA_ADD6 7,9
MEM_MA_ADD7 7,9
MEM_MA_ADD8 7,9
MEM_MA_ADD9 7,9
MEM_MA_ADD10 7,9
MEM_MA_ADD11 7,9
MEM_MA_ADD12 7,9
MEM_MA_ADD13 7,9
MEM_MA_ADD14 7,9
MEM_MA_ADD15 7,9
MEM_MA_BANK0 7,9
MEM_MA_BANK1 7,9
MEM_MA_BANK2 7,9
MEM_MA_RAS# 7,9
MEM_MA_CAS# 7,9
MEM_MA_WE# 7,9
1 2
C480
C480
DY
DY
R129
R129
39D2R2F-L-GP
39D2R2F-L-GP
R128
R128
39D2R2F-L-GP
39D2R2F-L-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C264
C264
1 2
1 2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SC4D7U6D3V3KX-GP
TP87
TP87
1 2
C230
C230
DY
DY
SC4D7U6D3V3KX-GP
1 2
C475
C475
MEMZP
MEMZN
MEM_RSVD_M1
1
0D9V_S3
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
1 2
1 2
C484
C484
C255
C255
U62B
U62B
D10
C10
B10
AD10
AF10
AE10
H16
T19
V22
U21
V19
T20
U19
U20
V20
J22
J20
N19
N20
E16
F16
Y16
AA16
P19
P20
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
R20
R23
J21
R19
T22
T24
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
62.10055.111
62.10055.111
2ND = 62.10055.251
2ND = 62.10055.251
C131
C131
VTT1
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT2
VTT3
VTT4
MEMZP
MEMZN
RSVD_M1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
1 2
C128
C128
Do Not Stuff
Do Not Stuff
DY
DY
5
1 2
Do Not Stuff
Do Not Stuff
DY
DY
VTT5
VTT6
VTT7
VTT8
VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
C252
C252
4
1 2
1 2
C256
C256
C260
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C260
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
1 2
1 2
C141
C141
SC180P50V2JN-1GP
SC180P50V2JN-1GP
CLOSE TO CPU
W10
AC10
AB10
AA10
A10
VTT_SENSE
Y10
W17
MEM_RSVD_M2
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
4
MEM_MB0_ODT0 8,9
MEM_MB0_ODT1 8,9
MEM_MB0_CS#0 8,9
MEM_MB0_CS#1 8,9
MEM_MB_CKE0 8,9
MEM_MB_CKE1 8,9
MEM_MB_CLK0_P 8
MEM_MB_CLK0_N 8
MEM_MB_CLK1_P 8
MEM_MB_CLK1_N 8
MEM_MB_ADD0 8,9
MEM_MB_ADD1 8,9
MEM_MB_ADD2 8,9
MEM_MB_ADD3 8,9
MEM_MB_ADD4 8,9
MEM_MB_ADD5 8,9
MEM_MB_ADD6 8,9
MEM_MB_ADD7 8,9
MEM_MB_ADD8 8,9
MEM_MB_ADD9 8,9
MEM_MB_ADD10 8,9
MEM_MB_ADD11 8,9
MEM_MB_ADD12 8,9
MEM_MB_ADD13 8,9
MEM_MB_ADD14 8,9
MEM_MB_ADD15 8,9
MEM_MB_BANK0 8,9
MEM_MB_BANK1 8,9
MEM_MB_BANK2 8,9
MEM_MB_RAS# 8,9
MEM_MB_CAS# 8,9
MEM_MB_WE# 8,9
TP59Do Not Stuff TP59Do Not Stuff
1
TP96 Do Not Stuff TP96 Do Not Stuff
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VREF_DDR_CLAW
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
C150
C150
C160
C160
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C151
C151
1 2
3
3
1D8V_S3
RN16
RN16
1
2 3
SRN1KJ-7-GP
SRN1KJ-7-GP
2
U62C
U62C
MEM_MA_DATA0 7
MEM_MA_DATA1 7
MEM_MA_DATA2 7
MEM_MA_DATA3 7
MEM_MA_DATA4 7
MEM_MA_DATA5 7
MEM_MA_DATA6 7
MEM_MA_DATA7 7
MEM_MA_DATA8 7
MEM_MA_DATA9 7
MEM_MA_DATA10 7
MEM_MA_DATA11 7
MEM_MA_DATA12 7
MEM_MA_DATA13 7
MEM_MA_DATA14 7
MEM_MA_DATA15 7
MEM_MA_DATA16 7
MEM_MA_DATA17 7
MEM_MA_DATA18 7
MEM_MA_DATA19 7
MEM_MA_DATA20 7
MEM_MA_DATA21 7
MEM_MA_DATA22 7
MEM_MA_DATA23 7
MEM_MA_DATA24 7
MEM_MA_DATA25 7
MEM_MA_DATA26 7
MEM_MA_DATA27 7
MEM_MA_DATA28 7
MEM_MA_DATA29 7
MEM_MA_DATA30 7
MEM_MA_DATA31 7
MEM_MA_DATA32 7
MEM_MA_DATA33 7
MEM_MA_DATA34 7
MEM_MA_DATA35 7
MEM_MA_DATA36 7
MEM_MA_DATA37 7
MEM_MA_DATA38 7
MEM_MA_DATA39 7
MEM_MA_DATA40 7
4
MEM_MA_DATA41 7
MEM_MA_DATA42 7
MEM_MA_DATA43 7
MEM_MA_DATA44 7
MEM_MA_DATA45 7
MEM_MA_DATA46 7
MEM_MA_DATA47 7
MEM_MA_DATA48 7
MEM_MA_DATA49 7
MEM_MA_DATA50 7
MEM_MA_DATA51 7
MEM_MA_DATA52 7
MEM_MA_DATA53 7
MEM_MA_DATA54 7
MEM_MA_DATA55 7
MEM_MA_DATA56 7
MEM_MA_DATA57 7
MEM_MA_DATA58 7
MEM_MA_DATA59 7
MEM_MA_DATA60 7
MEM_MA_DATA61 7
MEM_MA_DATA62 7
MEM_MA_DATA63 7
MEM_MA_DM0 7
MEM_MA_DM1 7
MEM_MA_DM2 7
MEM_MA_DM3 7
MEM_MA_DM4 7
MEM_MA_DM5 7
MEM_MA_DM6 7
MEM_MA_DM7 7
MEM_MA_DQS0_P 7
MEM_MA_DQS0_N 7
MEM_MA_DQS1_P 7
MEM_MA_DQS1_N 7
MEM_MA_DQS2_P 7
MEM_MA_DQS2_N 7
MEM_MA_DQS3_P 7
MEM_MA_DQS3_N 7
MEM_MA_DQS4_P 7
MEM_MA_DQS4_N 7
MEM_MA_DQS5_P 7
MEM_MA_DQS5_N 7
MEM_MA_DQS6_P 7
MEM_MA_DQS6_N 7
MEM_MA_DQS7_P 7
MEM_MA_DQS7_N 7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
62.10055.111
62.10055.111
2ND = 62.10055.251
2ND = 62.10055.251
2
MEM:DATA
MEM:DATA
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
SB
SB
SB
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
A12
MB_DM0
B16
MB_DM1
A22
MB_DM2
E25
MB_DM3
AB26
MB_DM4
AE22
MB_DM5
AC16
MB_DM6
AD12
MB_DM7
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
CPU_DDR_(2/4)
CPU_DDR_(2/4)
CPU_DDR_(2/4)
F7-GT
F7-GT
F7-GT
1
MEM_MB_DATA0 8
MEM_MB_DATA1 8
MEM_MB_DATA2 8
MEM_MB_DATA3 8
MEM_MB_DATA4 8
MEM_MB_DATA5 8
MEM_MB_DATA6 8
MEM_MB_DATA7 8
MEM_MB_DATA8 8
MEM_MB_DATA9 8
MEM_MB_DATA10 8
MEM_MB_DATA11 8
MEM_MB_DATA12 8
MEM_MB_DATA13 8
MEM_MB_DATA14 8
MEM_MB_DATA15 8
MEM_MB_DATA16 8
MEM_MB_DATA17 8
MEM_MB_DATA18 8
MEM_MB_DATA19 8
MEM_MB_DATA20 8
MEM_MB_DATA21 8
MEM_MB_DATA22 8
MEM_MB_DATA23 8
MEM_MB_DATA24 8
MEM_MB_DATA25 8
MEM_MB_DATA26 8
MEM_MB_DATA27 8
MEM_MB_DATA28 8
MEM_MB_DATA29 8
MEM_MB_DATA30 8
MEM_MB_DATA31 8
MEM_MB_DATA32 8
MEM_MB_DATA33 8
MEM_MB_DATA34 8
MEM_MB_DATA35 8
MEM_MB_DATA36 8
MEM_MB_DATA37 8
MEM_MB_DATA38 8
MEM_MB_DATA39 8
MEM_MB_DATA40 8
MEM_MB_DATA41 8
MEM_MB_DATA42 8
MEM_MB_DATA43 8
MEM_MB_DATA44 8
MEM_MB_DATA45 8
MEM_MB_DATA46 8
MEM_MB_DATA47 8
MEM_MB_DATA48 8
MEM_MB_DATA49 8
MEM_MB_DATA50 8
MEM_MB_DATA51 8
MEM_MB_DATA52 8
MEM_MB_DATA53 8
MEM_MB_DATA54 8
MEM_MB_DATA55 8
MEM_MB_DATA56 8
MEM_MB_DATA57 8
MEM_MB_DATA58 8
MEM_MB_DATA59 8
MEM_MB_DATA60 8
MEM_MB_DATA61 8
MEM_MB_DATA62 8
MEM_MB_DATA63 8
MEM_MB_DM0 8
MEM_MB_DM1 8
MEM_MB_DM2 8
MEM_MB_DM3 8
MEM_MB_DM4 8
MEM_MB_DM5 8
MEM_MB_DM6 8
MEM_MB_DM7 8
MEM_MB_DQS0_P 8
MEM_MB_DQS0_N 8
MEM_MB_DQS1_P 8
MEM_MB_DQS1_N 8
MEM_MB_DQS2_P 8
MEM_MB_DQS2_N 8
MEM_MB_DQS3_P 8
MEM_MB_DQS3_N 8
MEM_MB_DQS4_P 8
MEM_MB_DQS4_N 8
MEM_MB_DQS5_P 8
MEM_MB_DQS5_N 8
MEM_MB_DQS6_P 8
MEM_MB_DQS6_N 8
MEM_MB_DQS7_P 8
MEM_MB_DQS7_N 8
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
44 7 Friday, August 29, 2008
44 7 Friday, August 29, 2008
44 7 Friday, August 29, 2008
1
SB
SB
SB
5
4
3
2
1
1D8V_S0
R352
R352
300R2J-4-GP
300R2J-4-GP
D D
C C
B B
CPU_LDT_RST# 15
CPU_PWRGD 15
CPU_LDT_STOP# 15
ALLOW_LDTSTOP 11,15
R174
R174
10KR2J-3-GP
10KR2J-3-GP
CPU_PWRGD_SVID_REG 37
84.T3904.C11
84.T3904.C11
2ND = 84.03904.L06
2ND = 84.03904.L06
678
1 2
123
1D8V_S3
3D3V_S0
1 2
Q10
Q10
CBE
MMBT3904-4-GP
MMBT3904-4-GP
RN42
RN42
SRN300J-1-GP
SRN300J-1-GP
4 5
1 2
R346 33R2J-2-GP R346 33R2J-2-GP
1 2
R345 Do Not Stuff R345 Do Not Stuff
1 2
R344 Do Not Stuff R344 Do Not Stuff
1 2
R347 Do Not Stuff R347 Do Not Stuff
1 2
R175
R175
2K2R2J-2-GP
2K2R2J-2-GP
LDT_PWROK_G
Do Not Stuff
Do Not Stuff
LDT_PWROK
C262
C262
LDT_RST#_CPU 11
LDT_PWROK
LDT_STP#_CPU 11
CPU_LDT_REQ#_CPU
20080721
R133
R133
1 2
300R2J-4-GP
300R2J-4-GP
1 2
DY
DY
R168
R168
IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491
R173
R173
1 2
Do Not Stuff
Do Not Stuff
Cloce To CPU
1 2
C542 SC3900P50V2KX-2GP C542 SC3900P50V2KX-2GP
1 2
C543 SC3900P50V2KX-2GP C543 SC3900P50V2KX-2GP
1 2
R123
R123
Do Not Stuff
Do Not Stuff
1D2V_S0
R130
R130
1 2
1 2
1D8V_S3
R159
R159
300R2J-4-GP
300R2J-4-GP
CPU_CLK 2
CPU_CLK# 2
LDT_RST#_CPU LDT_RST#_CPU
HDT_RST#
For HDT DBG
1 2
300R2J-4-GP
300R2J-4-GP
R139
R139
1 2
300R2J-4-GP
300R2J-4-GP
2D5V_VDDA_S0 2D5V_S0
1 2
1 2
C243
C243
C268
C268
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
1 2
R341 169R2F-GP R341 169R2F-GP
LDT_PWROK
LDT_STP#_CPU
CPU_LDT_REQ#_CPU
1 2
R143 44D2R2F-GP R143 44D2R2F-GP
1 2
R141 44D2R2F-GP R141 44D2R2F-GP
CPU_VDD0_RUN_FB_H 37
CPU_VDD0_RUN_FB_L 37
CPU_VDD1_RUN_FB_H 37
CPU_VDD1_RUN_FB_L 37
TP86 TP86
TP89 TP89
R132
R132
1 2
300R2J-4-GP
300R2J-4-GP
300R2J-4-GP
300R2J-4-GP
LYAOUT:ROUTE VDDA TRACE APPROX.
50mils WIDE(USE 2X25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
1 2
1 2
C261
C261
C269
C269
SC3300P50V2KX-1GP
SC3300P50V2KX-1GP
TP45 TP45
TP47 TP47
TP51 TP51
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
1
1
CPU_TEST25_H
CPU_TEST25_L
TP50 TP50
TP54 TP54
TP46 TP46
R169
R169
1 2
Do Not Stuff
Do Not Stuff
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
CLKCPU_IN
CLKCPU#_IN
CPU_SIC
1
CPU_SID
1
CPU_ALERT#
1
CPU_HTREF0
CPU_HTREF1
CPU_TEST23
CPU_TEST18
CPU_TEST19
CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
1
CPU_TEST12
1
CPU_TEST27
1
CPU_TEST9
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
U62D
U62D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
62.10055.111
62.10055.111
2ND = 62.10055.251
2ND = 62.10055.251
KEY1
KEY2
SVC
SVD
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TDO
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
1D8V_S3
4
RN40
RN40
SRN1KJ-7-GP
M11
W18
A6
A4
THERMTRIP#
AF6
PROCHOT#
AC7
CPU_MEMHOT#
AA8
internal pull high 300 ohm
W7
W8
1 2
DY
DY
C155
C155
Do Not Stuff
Do Not Stuff
CPU_VDDIO_SUS_FB_H
W9
CPU_VDDIO_SUS_FB_L
Y9
H6
G6
CPU_DBREQ#
E10
CPU_TDO
AE9
CPU_TEST28_H
J7
CPU_TEST28_L
H8
CPU_TEST17
D7
CPU_TEST16
E7
CPU_TEST15
F7
CPU_TEST14
C7
C3
K8
C4
CPU_TEST29H
C9
CPU_TEST29L
C8
H18
H19
AA7
D5
C5
SRN1KJ-7-GP
1
2 3
CPU_SVC 37
CPU_SVD 37
H_THERMDC 34
H_THERMDA 34
1
1
CPU_VDDNB_RUN_FB_H 37
CPU_VDDNB_RUN_FB_L 37
1
1
1
1
1
1
1
1
1D8V_S3
678
RN11
RN11
SRN300J-1-GP
SRN300J-1-GP
123
4 5
CPU_DBREQ#
20080723
R127
R127
1 2
Do Not Stuff
Do Not Stuff
TP63 TP63
TP60 TP60
LAYOUT: Route FBCLKOUT_H/L
differentially impedance 80
TP83 TP83
TP85 TP85
TP92 TP92
TP91 TP91
TP90 TP90
TP95 TP95
TP93 TP93
TP94 TP94
HDT Connectors
Near CPU PIN
LDT_PWROK
1 2
R172
R172
2K2R2J-2-GP
2K2R2J-2-GP
C254
C254
1 2
1D8V_SUS_Q2
B
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Q9
A A
THERMTRIP#
CPU exceeds to 125
5
4
Q9
E
MMBT3904-4-GP
MMBT3904-4-GP
℃
2ND = 84.03904.L06
2ND = 84.03904.L06
C
84.T3904.C11
84.T3904.C11
KBC_THERMTRIP# 30,34
3
SB
SB
SB
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
2
Date: Sheet
1D8V_S3
CPU_Control&Debug_(3/4)
CPU_Control&Debug_(3/4)
CPU_Control&Debug_(3/4)
F7-GT
F7-GT
F7-GT
The Processor has
reached a preset
maximum operating
temperature. 100
I=Active HTC
O=FAN
PROCHOT#_SB 15
HDT1
HDT1
1
2
DY
DY
3
4
5
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
Do Not Stuff
HDT_RST#
Do Not Stuff
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
26
of
54 7 Friday, August 29, 2008
54 7 Friday, August 29, 2008
54 7 Friday, August 29, 2008
℃
SB
SB
SB
5
4
3
2
1
D D
C C
B B
U62F
U62F
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
62.10055.111
62.10055.111
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
20080723
VCC_CORE_S0_0
Bottom Side Decoupling Bottom Side Decoupling
C226
C226
C211
C211
C228
C212
C212
1 2
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
VDDNB
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C213
C213
1D8V_S3
Bottom Side Decoupling
C225
C225
1 2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C228
1 2
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
3A for VDDNB
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C201
C201
C235
C235
1 2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C224
C224
C227
C227
1 2
1 2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C200
C200
C233
C233
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
36A for VDD0&VDD1
U62E
U62E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
C210
C210
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
VDD0_5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
62.10055.111
62.10055.111
2ND = 62.10055.251
2ND = 62.10055.251
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C202
C202
1 2
C177
C177
C205
C205
C168
C168
1 2
1 2
1 2
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC22U6D3V5MX-2GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC22U6D3V5MX-2GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
Place near to CPU
C159
C159
1 2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
C166
C166
1 2
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C176
C176
1 2
VCC_CORE_S0_1
C199
C199
C184
C184
1 2
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C234
C234
C221
C221
1 2
1 2
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
C185
C185
1 2
20080723
2A for VDDIO
C207
C207
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1D8V_S3
C149
C149
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C188
C188
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SB
SB
A A
5
4
3
2
SB
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU_Power_(4/4)
CPU_Power_(4/4)
CPU_Power_(4/4)
F7-GT
F7-GT
F7-GT
64 7 Wednesday, August 20, 2008
64 7 Wednesday, August 20, 2008
64 7 Wednesday, August 20, 2008
1
SB
SB
SB
5
D D
MEM_MA_DATA0 4
MEM_MA_DATA1 4
MEM_MA_DATA2 4
MEM_MA_DATA3 4
MEM_MA_DATA4 4
MEM_MA_DATA5 4
MEM_MA_DATA6 4
MEM_MA_DATA7 4
MEM_MA_DATA8 4
MEM_MA_DATA9 4
MEM_MA_DATA10 4
MEM_MA_DATA11 4
MEM_MA_DATA12 4
MEM_MA_DATA13 4
MEM_MA_DATA14 4
MEM_MA_DATA15 4
MEM_MA_DATA16 4
MEM_MA_DATA17 4
MEM_MA_DATA18 4
MEM_MA_DATA19 4
MEM_MA_DATA20 4
MEM_MA_DATA21 4
C C
B B
A A
VREF_DDR_MEM
MEM_MA_DATA22 4
MEM_MA_DATA23 4
MEM_MA_DATA24 4
MEM_MA_DATA25 4
MEM_MA_DATA26 4
MEM_MA_DATA27 4
MEM_MA_DATA28 4
MEM_MA_DATA29 4
MEM_MA_DATA30 4
MEM_MA_DATA31 4
MEM_MA_DATA32 4
MEM_MA_DATA33 4
MEM_MA_DATA34 4
MEM_MA_DATA35 4
MEM_MA_DATA36 4
MEM_MA_DATA37 4
MEM_MA_DATA38 4
MEM_MA_DATA39 4
MEM_MA_DATA40 4
MEM_MA_DATA41 4
MEM_MA_DATA42 4
MEM_MA_DATA43 4
MEM_MA_DATA44 4
MEM_MA_DATA45 4
MEM_MA_DATA46 4
MEM_MA_DATA47 4
MEM_MA_DATA48 4
MEM_MA_DATA49 4
MEM_MA_DATA50 4
MEM_MA_DATA51 4
MEM_MA_DATA52 4
MEM_MA_DATA53 4
MEM_MA_DATA54 4
MEM_MA_DATA55 4
MEM_MA_DATA56 4
MEM_MA_DATA57 4
MEM_MA_DATA58 4
MEM_MA_DATA59 4
MEM_MA_DATA60 4
MEM_MA_DATA61 4
MEM_MA_DATA62 4
MEM_MA_DATA63 4
MEM_MA_DQS0_N 4
MEM_MA_DQS1_N 4
MEM_MA_DQS2_N 4
MEM_MA_DQS3_N 4
MEM_MA_DQS4_N 4
MEM_MA_DQS5_N 4
MEM_MA_DQS6_N 4
MEM_MA_DQS7_N 4
MEM_MA_DQS0_P 4
MEM_MA_DQS1_P 4
MEM_MA_DQS2_P 4
MEM_MA_DQS3_P 4
MEM_MA_DQS4_P 4
MEM_MA_DQS5_P 4
MEM_MA_DQS6_P 4
MEM_MA_DQS7_P 4
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
5
4
MEM_MA_ADD0 4,9
MEM_MA_ADD1 4,9
MEM_MA_ADD2 4,9
MEM_MA_ADD3 4,9
MEM_MA_ADD4 4,9
MEM_MA_ADD5 4,9
MEM_MA_ADD6 4,9
MEM_MA_ADD7 4,9
MEM_MA_ADD8 4,9
MEM_MA_ADD9 4,9
MEM_MA_ADD10 4,9
MEM_MA_ADD11 4,9
MEM_MA_ADD12 4,9
MEM_MA_ADD13 4,9
MEM_MA_ADD14 4,9
MEM_MA_ADD15 4,9
MEM_MA_BANK2 4,9
MEM_MA_BANK0 4,9
MEM_MA_BANK1 4,9
MEM_MA0_ODT0 4,9
MEM_MA0_ODT1 4,9
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C279
C279
1 2
C564
C564
4
1 2
Place C2.2uF and 0.1uF <
500mils from DDR connector
DM2
DM2
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
DQS0#
29
DQS1#
49
DQS2#
68
DQS3#
129
DQS4#
146
DQS5#
167
DQS6#
186
DQS7#
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
OTD0
119
OTD1
1
VREF
2
VSS
202
GND
MH1
MH1
SKT-SODIMM200-37GP
SKT-SODIMM200-37GP
HI 9.2mm
62.10017.E21
62.10017.E21
2ND = 62.10017.A51
2ND = 62.10017.A51
3
108
RAS#
109
WE#
113
CAS#
110
CS0#
115
CS1#
79
CKE0
80
CKE1
30
CK0
32
CK0#
164
CK1
166
CK1#
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
195
SDA
197
SCL
199
VDDSPD
198
SA0
200
SA1
50
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NORMAL TYPE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
MH2
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201
MH2
(A0)
1D8V_S3
3
MEM_MA_RAS# 4,9
MEM_MA_WE# 4,9
MEM_MA_CAS# 4,9
MEM_MA0_CS#0 4,9
MEM_MA0_CS#1 4,9
MEM_MA_CKE0 4,9
MEM_MA_CKE1 4,9
MEM_MA_CLK0_P 4
MEM_MA_CLK0_N 4
MEM_MA_CLK1_P 4
MEM_MA_CLK1_N 4
MEM_MA_DM0 4
MEM_MA_DM1 4
MEM_MA_DM2 4
MEM_MA_DM3 4
MEM_MA_DM4 4
MEM_MA_DM5 4
MEM_MA_DM6 4
MEM_MA_DM7 4
SMBD0_SB 2,8,16
SMBC0_SB 2,8,16
Do Not Stuff
Do Not Stuff
SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
1D8V_S3
C121
C121
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
1 2
1 2
DDR_VREF
RN44
RN44
1
2 3
SRN1KJ-7-GP
SRN1KJ-7-GP
LAYOUT: Locate close to DIMM
3D3V_S0
1 2
1 2
DY
DY
MEM_MA_CLK0_P
C244
C244
MEM_MA_CLK0_N
MEM_MA_CLK1_P
C142
C142
MEM_MA_CLK1_N
SCD1U10V2K X - 4GP
SCD1U10V2K X - 4GP
4
C113
C113
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VREF_DDR_MEM
1 2
C561
C561
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C281
C281
C562
C562
2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
SB
SB
SB
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
DDR_SO-DIMM SKT_1
DDR_SO-DIMM SKT_1
DDR_SO-DIMM SKT_1
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
F7-GT
F7-GT
F7-GT
1
SB
SB
SB
of
of
of
74 7 Wednesday, September 03, 2008
74 7 Wednesday, September 03, 2008
74 7 Wednesday, September 03, 2008
5
MEM_MB_ADD10 4,9
MEM_MB_ADD11 4,9
D D
C C
B B
A A
VREF_DDR_MEM
MEM_MB_ADD12 4,9
MEM_MB_ADD13 4,9
MEM_MB_ADD14 4,9
MEM_MB_ADD15 4,9
MEM_MB_BANK2 4,9
MEM_MB_BANK0 4,9
MEM_MB_BANK1 4,9
MEM_MB_DATA0 4
MEM_MB_DATA1 4
MEM_MB_DATA2 4
MEM_MB_DATA3 4
MEM_MB_DATA4 4
MEM_MB_DATA5 4
MEM_MB_DATA6 4
MEM_MB_DATA7 4
MEM_MB_DATA8 4
MEM_MB_DATA9 4
MEM_MB_DATA10 4
MEM_MB_DATA11 4
MEM_MB_DATA12 4
MEM_MB_DATA13 4
MEM_MB_DATA14 4
MEM_MB_DATA15 4
MEM_MB_DATA16 4
MEM_MB_DATA17 4
MEM_MB_DATA18 4
MEM_MB_DATA19 4
MEM_MB_DATA20 4
MEM_MB_DATA21 4
MEM_MB_DATA22 4
MEM_MB_DATA23 4
MEM_MB_DATA24 4
MEM_MB_DATA25 4
MEM_MB_DATA26 4
MEM_MB_DATA27 4
MEM_MB_DATA28 4
MEM_MB_DATA29 4
MEM_MB_DATA30 4
MEM_MB_DATA31 4
MEM_MB_DATA32 4
MEM_MB_DATA33 4
MEM_MB_DATA34 4
MEM_MB_DATA35 4
MEM_MB_DATA36 4
MEM_MB_DATA37 4
MEM_MB_DATA38 4
MEM_MB_DATA39 4
MEM_MB_DATA40 4
MEM_MB_DATA41 4
MEM_MB_DATA42 4
MEM_MB_DATA43 4
MEM_MB_DATA44 4
MEM_MB_DATA45 4
MEM_MB_DATA46 4
MEM_MB_DATA47 4
MEM_MB_DATA48 4
MEM_MB_DATA49 4
MEM_MB_DATA50 4
MEM_MB_DATA51 4
MEM_MB_DATA52 4
MEM_MB_DATA53 4
MEM_MB_DATA54 4
MEM_MB_DATA55 4
MEM_MB_DATA56 4
MEM_MB_DATA57 4
MEM_MB_DATA58 4
MEM_MB_DATA59 4
MEM_MB_DATA60 4
MEM_MB_DATA61 4
MEM_MB_DATA62 4
MEM_MB_DATA63 4
MEM_MB_DQS0_N 4
MEM_MB_DQS1_N 4
MEM_MB_DQS2_N 4
MEM_MB_DQS3_N 4
MEM_MB_DQS4_N 4
MEM_MB_DQS5_N 4
MEM_MB_DQS6_N 4
MEM_MB_DQS7_N 4
MEM_MB_DQS0_P 4
MEM_MB_DQS1_P 4
MEM_MB_DQS2_P 4
MEM_MB_DQS3_P 4
MEM_MB_DQS4_P 4
MEM_MB_DQS5_P 4
MEM_MB_DQS6_P 4
MEM_MB_DQS7_P 4
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
5
4
MEM_MB_ADD0 4,9
MEM_MB_ADD1 4,9
MEM_MB_ADD2 4,9
MEM_MB_ADD3 4,9
MEM_MB_ADD4 4,9
MEM_MB_ADD5 4,9
MEM_MB_ADD6 4,9
MEM_MB_ADD7 4,9
MEM_MB_ADD8 4,9
MEM_MB_ADD9 4,9
MEM_MB0_ODT0 4,9
MEM_MB0_ODT1 4,9
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C565
C565
C563
C563
Place C2.2uF and 0.1uF <
500mils from DDR connector
4
DM1
DM1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
DQS0#
29
DQS1#
49
DQS2#
68
DQS3#
129
DQS4#
146
DQS5#
167
DQS6#
186
DQS7#
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
OTD0
119
OTD1
1
VREF
2
VSS
202
GND
MH1
MH1
SKT-SODIMM20020U3GP
SKT-SODIMM20020U3GP
62.10017.661
62.10017.661
2ND = 62.10017.A41
2ND = 62.10017.A41
LOW 5.2 mm
3
108
RAS#
109
WE#
113
CAS#
110
CS0#
115
CS1#
79
CKE0
80
CKE1
30
CK0
32
CK0#
164
CK1
166
CK1#
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
195
SDA
197
SCL
199
VDDSPD
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
REVERSE TYPE
GND
MH2
SA0
SA1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
198
200
50
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201
MH2
DIMM2_SA1
R125 10KR2J-3-GP R125 10KR2J-3-GP
1D8V_S3
3
1 2
(A2)
SB
MEM_MB_RAS# 4,9
MEM_MB_WE# 4,9
MEM_MB_CAS# 4,9
MEM_MB0_CS#0 4,9
MEM_MB0_CS#1 4,9
MEM_MB_CKE0 4,9
MEM_MB_CKE1 4,9
MEM_MB_CLK0_P 4
MEM_MB_CLK0_N 4
MEM_MB_CLK1_P 4
MEM_MB_CLK1_N 4
MEM_MB_DM0 4
MEM_MB_DM1 4
MEM_MB_DM2 4
MEM_MB_DM3 4
MEM_MB_DM4 4
MEM_MB_DM5 4
MEM_MB_DM6 4
MEM_MB_DM7 4
SMBD0_SB 2,7,16
SMBC0_SB 2,7,16
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
Do Not Stuff
Do Not Stuff
MEM_MB_CLK0_P
1 2
C265
C265
SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
MEM_MB_CLK0_N
MEM_MB_CLK1_P
1 2
C124
C124
SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
MEM_MB_CLK1_N
3D3V_S0
1 2
C117
C117
DY
DY
2
1 2
C118
C118
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
1
SB
SB
SB
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR_SO-DIMM SKT_2
DDR_SO-DIMM SKT_2
DDR_SO-DIMM SKT_2
Taipei Hsien 221, Taiwan, R.O.C.
F7-GT
F7-GT
F7-GT
of
of
of
84 7 Friday, August 29, 2008
84 7 Friday, August 29, 2008
84 7 Friday, August 29, 2008
1
SB
SB
SB
5
4
3
2
1
Decoupling Capacitor
0D9V_S3
1 2
C148
C148
SCD1U16V2ZY-2GP
D D
PARALLEL TERMINATION
SCD1U16V2ZY-2GP
Put decap near power(0.9V) and pull-up resistor
1 2
1 2
C219
C219
C165
C165
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
1 2
C181
C181
C146
C146
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C173
C173
1 2
C157
C157
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C196
C196
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
C144
C144
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
C220
C220
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
C147
C147
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
1 2
C172
C172
C197
C197
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
Put decap near power(0.9V) and pull-up resistor
0D9V_S3 0D9V_S3
RN21
RN13
RN13
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
C C
B B
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
SRN47J-4-GP
SRN47J-4-GP
RN22
RN22
SRN47J-4-GP
SRN47J-4-GP
RN19
RN19
SRN47J-4-GP
SRN47J-4-GP
RN28
RN28
SRN47J-4-GP
SRN47J-4-GP
RN18
RN18
SRN47J-4-GP
SRN47J-4-GP
RN25
RN25
SRN47J-4-GP
SRN47J-4-GP
RN14
RN14
SRN47J-4-GP
SRN47J-4-GP
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
MEM_MA0_ODT1 4,7
MEM_MA0_CS#1 4,7
MEM_MA_WE# 4,7
MEM_MA_CAS# 4,7
MEM_MA_ADD5 4,7
MEM_MA_ADD6 4,7
MEM_MA_ADD8 4,7
MEM_MA_CKE1 4,7
MEM_MA_ADD2 4,7
MEM_MA_ADD4 4,7
MEM_MA_BANK1 4,7
MEM_MA_ADD0 4,7
MEM_MA_ADD12 4,7
MEM_MA_ADD9 4,7
MEM_MA_BANK2 4,7
MEM_MA_CKE0 4,7
MEM_MA_BANK0 4,7
MEM_MA_ADD10 4,7
MEM_MA_ADD3 4,7
MEM_MA_ADD1 4,7
MEM_MA_ADD15 4,7
MEM_MA_ADD14 4,7
MEM_MA_ADD7 4,7
MEM_MA_ADD11 4,7
MEM_MA_RAS# 4,7
MEM_MA0_CS#0 4,7
MEM_MA_ADD13 4,7
MEM_MA0_ODT0 4,7
RN21
1
2
3
4 5
SRN47J-4-GP
SRN47J-4-GP
RN17
RN17
1
2
3
4 5
SRN47J-4-GP
SRN47J-4-GP
RN12
RN12
1
2
3
4 5
SRN47J-4-GP
SRN47J-4-GP
RN26
RN26
1
2
3
4 5
SRN47J-4-GP
SRN47J-4-GP
RN27
RN27
1
2
3
4 5
SRN47J-4-GP
SRN47J-4-GP
RN20
RN20
1
2
3
4 5
SRN47J-4-GP
SRN47J-4-GP
RN15
RN15
1
2
3
4 5
SRN47J-4-GP
SRN47J-4-GP
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
MEM_MB_ADD11 4,8
MEM_MB_ADD8 4,8
MEM_MB_ADD5 4,8
MEM_MB_ADD4 4,8
MEM_MB_ADD6 4,8
MEM_MB_ADD2 4,8
MEM_MB_ADD0 4,8
MEM_MB_BANK1 4,8
MEM_MB_RAS# 4,8
MEM_MB0_CS#0 4,8
MEM_MB0_ODT0 4,8
MEM_MB_ADD13 4,8
MEM_MB_ADD9 4,8
MEM_MB_ADD12 4,8
MEM_MB_CKE0 4,8
MEM_MB_BANK2 4,8
MEM_MB_CKE1 4,8
MEM_MB_ADD15 4,8
MEM_MB_ADD14 4,8
MEM_MB_ADD7 4,8
MEM_MB_BANK0 4,8
MEM_MB_ADD10 4,8
MEM_MB_ADD1 4,8
MEM_MB_ADD3 4,8
MEM_MB0_ODT1 4,8
MEM_MB0_CS#1 4,8
MEM_MB_CAS# 4,8
MEM_MB_WE# 4,8
20080723
20080723
Place these Caps near DM1
1D8V_S3
1 2
1 2
1 2
Place these Caps near DM2
1 2
Place these Caps near PARALLEL TERMINATION
0D9V_S3
1 2
C218
C218
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C231
C231
C175
C175
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
1D8V_S3
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
1 2
C204
C204
C505
C505
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
1 2
C209
C209
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
1 2
C186
C186
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C494
C494
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
1 2
C495
C495
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
1 2
C214
C214
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C138
C138
C192
C192
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C506
C506
C491
C491
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1 2
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C145
C145
C135
C135
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C498
C498
C501
C501
C156
C156
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1 2
C170
C170
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to 0D9V_S3
1 2
C499
C499
C500
C500
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to 0D9V_S3
1D8V_S3
1 2
1 2
C189
C189
C198
C198
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Do not share the Term resistor between
the DDR addess and Control Signals.
1 2
1 2
A A
C136
C136
C137
C137
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C217
C217
1 2
C140
C140
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
5
4
3
C139
C139
1 2
C167
C167
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1 2
1 2
C152
C152
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C223
C223
C222
C222
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SB
SB
SB
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
DDR_DAMPING & TERMINATION
DDR_DAMPING & TERMINATION
DDR_DAMPING & TERMINATION
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
F7-GT
F7-GT
F7-GT
94 7 Friday, August 29, 2008
94 7 Friday, August 29, 2008
94 7 Friday, August 29, 2008
1
SB
SB
of
of
of
SB
5
HT_CPU_NB_CAD_H0 3
HT_CPU_NB_CAD_L0 3
HT_CPU_NB_CAD_H1 3
HT_CPU_NB_CAD_L1 3
HT_CPU_NB_CAD_H2 3
HT_CPU_NB_CAD_L2 3
HT_CPU_NB_CAD_H3 3
HT_CPU_NB_CAD_L3 3
HT_CPU_NB_CAD_H4 3
HT_CPU_NB_CAD_L4 3
HT_CPU_NB_CAD_H5 3
D D
C C
B B
MINICARD
NEW CARD
A A
A-LINK
HT_CPU_NB_CAD_L5 3
HT_CPU_NB_CAD_H6 3
HT_CPU_NB_CAD_L6 3
HT_CPU_NB_CAD_H7 3
HT_CPU_NB_CAD_L7 3
HT_CPU_NB_CAD_H8 3
HT_CPU_NB_CAD_L8 3
HT_CPU_NB_CAD_H9 3
HT_CPU_NB_CAD_L9 3
HT_CPU_NB_CAD_H10 3
HT_CPU_NB_CAD_L10 3
HT_CPU_NB_CAD_H11 3
HT_CPU_NB_CAD_L11 3
HT_CPU_NB_CAD_H12 3
HT_CPU_NB_CAD_L12 3
HT_CPU_NB_CAD_H13 3
HT_CPU_NB_CAD_L13 3
HT_CPU_NB_CAD_H14 3
HT_CPU_NB_CAD_L14 3
HT_CPU_NB_CAD_H15 3
HT_CPU_NB_CAD_L15 3
HT_CPU_NB_CLK_H0 3
HT_CPU_NB_CLK_L0 3
HT_CPU_NB_CLK_H1 3
HT_CPU_NB_CLK_L1 3
HT_CPU_NB_CTL_H0 3
HT_CPU_NB_CTL_L0 3
HT_CPU_NB_CTL_H1 3
HT_CPU_NB_CTL_L1 3
1 2
Place < 100mils from pin C23 and A24
LAN
1394 1394
ALINK_NBRX_SBTX_P0 15
ALINK_NBRX_SBTX_N0 15
ALINK_NBRX_SBTX_P1 15
ALINK_NBRX_SBTX_N1 15
ALINK_NBRX_SBTX_P2 15
ALINK_NBRX_SBTX_N2 15
ALINK_NBRX_SBTX_P3 15
ALINK_NBRX_SBTX_N3 15
R335
R335
301R2F-GP
301R2F-GP
PCIE_RXP1 22
PCIE_RXN1 22
PCIE_RXP2 27
PCIE_RXN2 27
PCIE_RXP5 27
PCIE_RXN5 27
PCIE_RXP4 24
PCIE_RXN4 24 PCIE_TXN4 24
1
TP66 TP66
1
TP67 TP67
5
4
U61A
U61A
Y25
HT_RXCAD0P
Y24
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
HT_RXCAD2P
V24
HT_RXCAD2N
U24
HT_RXCAD3P
U25
HT_RXCAD3N
T25
HT_RXCAD4P
T24
HT_RXCAD4N
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
HT_RXCAD6P
P24
HT_RXCAD6N
N24
HT_RXCAD7P
N25
HT_RXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y22
HT_RXCAD11P
Y23
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCALP HT_TXCALP
HT_RXCALN
GPP_RX5P
GPP_RX5N
HT_RXCTL1N
C23
HT_RXCALP
A24
HT_RXCALN
RS780M-GP-U2
RS780M-GP-U2
U61B
U61B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS780M-GP-U2
RS780M-GP-U2
4
PART 1 OF 6
PART 1 OF 6
PART 2 OF 6
PART 2 OF 6
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
PCE_CALRP
PCE_CALRN
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
B25
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
AC8
AB8
3
HT_TXCALN
Place < 100mils from pin B25 and B24
Placement: close RS780
GTXP0
GTXN0
GTXP1
GTXN1
GTXP2
GTXN2
GTXP3
GTXN3
TXP1
TXN1
TXP2
TXN2
TXP5
TXN5
TXP4
TXN4
GPP_TX5P
GPP_TX5N
ALINK_NBTX_SBRX_P0
ALINK_NBTX_SBRX_N0
ALINK_NBTX_SBRX_P1
ALINK_NBTX_SBRX_N1
ALINK_NBTX_SBRX_P2
ALINK_NBTX_SBRX_N2
ALINK_NBTX_SBRX_P3
ALINK_NBTX_SBRX_N3
PCE_PCAL
PCE_NCAL
Place < 100mils from pin AC8 and AB8
3
2
HT_NB_CPU_CAD_H0 3
HT_NB_CPU_CAD_L0 3
HT_NB_CPU_CAD_H1 3
HT_NB_CPU_CAD_L1 3
HT_NB_CPU_CAD_H2 3
HT_NB_CPU_CAD_L2 3
HT_NB_CPU_CAD_H3 3
HT_NB_CPU_CAD_L3 3
HT_NB_CPU_CAD_H4 3
HT_NB_CPU_CAD_L4 3
HT_NB_CPU_CAD_H5 3
HT_NB_CPU_CAD_L5 3
HT_NB_CPU_CAD_H6 3
HT_NB_CPU_CAD_L6 3
HT_NB_CPU_CAD_H7 3
HT_NB_CPU_CAD_L7 3
HT_NB_CPU_CAD_H8 3
HT_NB_CPU_CAD_L8 3
HT_NB_CPU_CAD_H9 3
HT_NB_CPU_CAD_L9 3
HT_NB_CPU_CAD_H10 3
HT_NB_CPU_CAD_L10 3
HT_NB_CPU_CAD_H11 3
HT_NB_CPU_CAD_L11 3
HT_NB_CPU_CAD_H12 3
HT_NB_CPU_CAD_L12 3
HT_NB_CPU_CAD_H13 3
HT_NB_CPU_CAD_L13 3
HT_NB_CPU_CAD_H14 3
HT_NB_CPU_CAD_L14 3
HT_NB_CPU_CAD_H15 3
HT_NB_CPU_CAD_L15 3
HT_NB_CPU_CLK_H0 3
HT_NB_CPU_CLK_L0 3
HT_NB_CPU_CLK_H1 3
HT_NB_CPU_CLK_L1 3
HT_NB_CPU_CTL_H0 3
HT_NB_CPU_CTL_L0 3
HT_NB_CPU_CTL_H1 3
HT_NB_CPU_CTL_L1 3
1 2
GTXP0
GTXN0
GTXP1
GTXN1
GTXP2
GTXN2
GTXP3
GTXN3
R330
R330
301R2F-GP
301R2F-GP
C522 SCD1U10V2KX-4GP C522 SCD1U10V2KX-4GP
1 2
C523 SCD1U10V2KX-4GP C523 SCD1U10V2KX-4GP
1 2
C515 SCD1U10V2KX-4GP C515 SCD1U10V2KX-4GP
1 2
C516 SCD1U10V2KX-4GP C516 SCD1U10V2KX-4GP
1 2
C525 SCD1U10V2KX-4GP C525 SCD1U10V2KX-4GP
1 2
C524 SCD1U10V2KX-4GP C524 SCD1U10V2KX-4GP
1 2
C514 SCD1U10V2KX-4GP C514 SCD1U10V2KX-4GP
1 2
C513 SCD1U10V2KX-4GP C513 SCD1U10V2KX-4GP
1 2
RS780M Display Port Support(muxed on GFX)
DP0
GFX_TX0,TX1,TX2,TX3,AUX0,HPD0
GFX_TX4,TX5,TX6,TX7,AUX1,HPD1 DP1
C130 SCD1U10V2KX-4GP C130 SCD1U10V2KX-4GP
1 2
C133 SCD1U10V2KX-4GP C133 SCD1U10V2KX-4GP
1 2
C493 SCD1U10V2KX-4GP C493 SCD1U10V2KX-4GP
1 2
C492 SCD1U10V2KX-4GP C492 SCD1U10V2KX-4GP
1 2
C163 SCD1U10V2KX-4GP C163 SCD1U10V2KX-4GP
1 2
C164 SCD1U10V2KX-4GP C164 SCD1U10V2KX-4GP
1 2
C180 SCD1U10V2KX-4GP C180 SCD1U10V2KX-4GP
1 2
C187 SCD1U1 0V2KX-4GP C187 SCD1U1 0V2KX-4GP
1 2
C479 SCD1U10V2KX-4GP C479 SCD1U10V2KX-4GP
1 2
C482 SCD1U10V2KX-4GP C482 SCD1U10V2KX-4GP
1 2
C485 SCD1U10V2KX-4GP C485 SCD1U10V2KX-4GP
1 2
C483 SCD1U10V2KX-4GP C483 SCD1U10V2KX-4GP
1 2
C487 SCD1U10V2KX-4GP C487 SCD1U10V2KX-4GP
1 2
C486 SCD1U10V2KX-4GP C486 SCD1U10V2KX-4GP
1 2
C489 SCD1U10V2KX-4GP C489 SCD1U10V2KX-4GP
1 2
C488 SCD1U10V2KX-4GP C488 SCD1U10V2KX-4GP
1 2
1 2
R138 1K27R2F-L-GP R138 1K27R2F-L-GP
1 2
R136 2KR2F-3-GP R136 2KR2F-3-GP
TP195 TP195
1
TP197 TP197
1
1D1V_S0
PCIE_TXP1 22
PCIE_TXN1 22
PCIE_TXP2 27
PCIE_TXN2 27
PCIE_TXP5 27
PCIE_TXN5 27
PCIE_TXP4 24
ALINK_NBTX_C_SBRX_P0 15
ALINK_NBTX_C_SBRX_N0 15
ALINK_NBTX_C_SBRX_P1 15
ALINK_NBTX_C_SBRX_N1 15
ALINK_NBTX_C_SBRX_P2 15
ALINK_NBTX_C_SBRX_N2 15
ALINK_NBTX_C_SBRX_P3 15
ALINK_NBTX_C_SBRX_N3 15
2
TMDS_UMA_TX2+ 25
TMDS_UMA_TX2- 25
TMDS_UMA_TX1+ 25
TMDS_UMA_TX1- 25
TMDS_UMA_TX0+ 25
TMDS_UMA_TX0- 25
TMDS_UMA_TXC+ 25
TMDS_UMA_TXC- 25
LAN
MINICARD
NEW CARD
SB
SB
SB
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ATi-RS780M_HT LINK&PCIe(1/3)
ATi-RS780M_HT LINK&PCIe(1/3)
ATi-RS780M_HT LINK&PCIe(1/3)
F7-GT
F7-GT
F7-GT
10 47 Friday, August 29, 2008
10 47 Friday, August 29, 2008
10 47 Friday, August 29, 2008
1
SB
SB
of
of
SB
5
1 2
DY
LDT_RST#_CPU 5
PLT_RST1# 15
D D
LDT_STP#_CPU 5
ALLOW_LDTSTOP 5,15
DY
R154 Do Not Stuff
R154 Do Not Stuff
1 2
R150 Do Not Stuff R150 Do Not Stuff
C232
SC330P50V2KX-3GP
SC330P50V2KX-3GP
1 2
R151 Do Not Stuff R151 Do Not Stuff
R156
R156
1 2
Do Not Stuff
Do Not Stuff
C232
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
SYSREST#
1 2
Close to NB ball
C C
C259
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C259
1D1V_S0
1D8V_S0
1 2
L27
L27
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
SC1U10V2KX-1GP
SC1U10V2KX-1GP
L29
L29
1 2
63.2R003.15L
63.2R003.15L
2R3J-GP
2R3J-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
ENABLE External CLK GEN
1D8V_S0
L25
L25
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
B B
220ohm 200mA
1D8V_S0
L2
L2
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
VDDA18HTPLL
C512
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C512
VDDA18PCIEPLL
C651
C651
1 2
1 2
1 2
C519
C519
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C215
C215
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
STRP_DATA
VCC_NB
GPIO MODE
0
1.0V 1.1V
4
3D3V_S0
1D8V_S0
R166
R166
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
SC1U10V2KX-1GP
SC1U10V2KX-1GP
GMCH_RED 26
GMCH_GREEN 26
GMCH_BLUE 26
1D1V_S0_PLLVDD
1D1V_S0_PLLVDD
1 2
NB_HDMI_DATA 25
NB_HDMI_CLK 25
1 2
1 2
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C531
C531
1D1V_S0
C511
C511
C528
C528
CLK_DDC_EDID 13
DAT_DDC_EDID 13
1
*
L4
L4
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1D8V_S0
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C518
C518
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RN24
RN24
1
2 3
SRN1KJ-7-GP
SRN1KJ-7-GP
1 2
Do Not Stuff
Do Not Stuff
C242
C242
GMCH_DDCCLK 14
GMCH_DDCDATA 14
C240
C240
R165
R165
C249
C249
1 2
GMCH_HSYNC 14
GMCH_VSYNC 14
4
TP205 TP205
TP204 TP204
1 2
1 2
1 2
1 2
C250
C250
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R146 133R2F-GP R146 133R2F-GP
R148 150R2F-1 -GP R148 150R2F-1-GP
R149 150R2F-1 -GP R149 150R2F-1-GP
NB_PWRGD 16,33
CLK_NBHT_CLK 2
CLK_NBHT_CLK# 2
CLK_NB_14M 2
TP198 TP198
TP199 TP199
1
1
1 2
R152
R152
150R2F-1-GP
150R2F-1-GP
3D3V_S0_AVDD
1 2
C248
C248
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D8V_S0_AVDDDI
C241
C241
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D8V_S0_AVDDQ
1 2
1 2
1 2
R145
R145
1 2
715R2F-GP
715R2F-GP
1D8V_S0_PLVDD18
VDDA18HTPLL
VDDA18PCIEPLL
SYSREST#
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
NB_REFCLK_N
CLK_NB_GFX 2
CLK_NB_GFX#2
CLK_NBGPP_CLK
1
CLK_NBGPP_CLK#
1
CLK_NB_GPPSB 2
CLK_NB_GPPSB# 2
RS780_AUX_CAL
DAC_RSET
NB_DVI_CLK
NB_DVI_DATA
STRP_DATA
3
U61C
U61C
F12
AVDD1
E12
AVDD2
F14
AVDDDI
G15
AVSSDI
H15
AVDDQ
H14
AVSSQ
E17
C_Pr
F17
Y
F15
COMP_Pb
G18
RED
G17
REDb
E18
GREEN
F18
GREENb
E19
BLUE
F19
BLUEb
A11
DAC_HSYNC
B11
DAC_VSYNC
F8
DAC_SCL
E8
DAC_SDA
G14
DAC_RSET
A12
PLLVDD
D14
PLLVDD18
B12
PLLVSS
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESET#
A10
POWERGOOD
C10
LDTSTOP#
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN
F11
REFCLK_N
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP
V3
GPPSB_REFCLKN
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_CLK0/AUX0P
A8
DDC_DATA0/AUX0N
B7
DDC_CLK1/AUX1P
A7
DDC_DATA1/AUX1N
B10
STRP_DATA
G11
RESERVED
C8
AUX_CAL
RS780M-GP-U2
RS780M-GP-U2
3D3V_S0
123
678
RN31
RN31
SRN3K3J-1-GP
SRN3K3J-1-GP
4 5
GMCH_HSYNC
GMCH_VSYNC
PART 3 OF 6
PART 3 OF 6
DDC_DATA0/AUX0N
DDC_CLK0/AUX0P
CRT/TVOUT
CRT/TVOUT
LVTM
LVTM
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
2
1
STRAP_DEBUG_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#)
1 :Disable 0 : Enable
*
RS780: Enables Side port memory ( RS780 use HSYNC#)
1 :Disable 0 : Enable
*
SUS_STAT#
Selects Loading of STRAPS From EEPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
*
0 : I2C Master can load strap values from EEPROM if connected,
or use default values if not connected
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
VDDLTP18
VSSLTP18
VDDLT18_1
VDDLT18_2
VDDLT33_1
VDDLT33_2
VSSLT1
VSSLT2
VSSLT3
VSSLT4
VSSLT5
VSSLT6
VSSLT7
LVDS_DIGON
LVDS_BLON
LVDS_ENA_BL
TMDS_HPD
HPD
SUS_STAT#
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
GMCH_BL_ON
F7
LVDS_ENA_BL
G12
D9
D10
D12
AE8
AD8
TESTMODE_NB
D13
GMCH_TXAOUT0+ 13
GMCH_TXAOUT0- 13
GMCH_TXAOUT1+ 13
GMCH_TXAOUT1- 13
GMCH_TXAOUT2+ 13
GMCH_TXAOUT2- 13
Single channel
GMCH_TXACLK+ 13
GMCH_TXACLK- 13
1D8V_S0_VDDLP18
C510
C510
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1D8V_S0_VDDLT18
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
NB_DVI_HPD
SUS_STAT#
R142 Do Not Stuff
R142 Do Not Stuff
1
1 2
1 2
1 2
C517
C517
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C520
C520
RN23
RN23
2 3
1
SRN4K7J-8-GP
SRN4K7J-8-GP
1 2
DY
DY
NB_HDMI_HPD 25
TP82 TP82
1 2
R163
R163
10KR2J-3-GP
10KR2J-3-GP
R153
R153
1K8R2F-GP
1K8R2F-GP
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
C509
C509
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D8V_S0
L26
L26
1 2
L28
L28
1 2
PBY201209T-221Y-N-GP
PBY201209T-221Y-N-GP
GMCH_LCDVDD_ON 13
GMCH_BL_ON 30
1
TP77 TP77
4
3D3V_S0
1D8V_S0
1 2
TC6
TC6
ST100U6D3VBM-5GP
A A
ST100U6D3VBM-5GP
77.C1071.081
77.C1071.081
20080722
Near NB
5
3D3V_S0
1 2
R334
R334
Do Not Stuff
Do Not Stuff
DY
DY
STRP_DATA
4
SB
SB
SB
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATi-RS780M_LVDS&CRT_(2/4)
ATi-RS780M_LVDS&CRT_(2/4)
ATi-RS780M_LVDS&CRT_(2/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
3
2
Date: Sheet of
F7-GT
F7-GT
F7-GT
of
11 47 Tuesday, September 02, 2008
11 47 Tuesday, September 02, 2008
11 47 Tuesday, September 02, 2008
1
SB
SB
SB
5
1D1V_S0
L23
L23
1 2
PBY201209T-221Y-N-GP
PBY201209T-221Y-N-GP
220 ohm @ 100MHz,2A
D D
1D1V_S0
1 2
PBY201209T-221Y-N-GP
PBY201209T-221Y-N-GP
220 ohm @ 100MHz,2A
1D2V_S0
L24
L24
1 2
PBY201209T-221Y-N-GP
PBY201209T-221Y-N-GP
220 ohm @ 100MHz,2A
C C
220 ohm @ 100MHz,2A
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1D8V_S0
L1
L1
1 2
PBY201209T-221Y-N-GP
PBY201209T-221Y-N-GP
1D8V_S0
1 2
C532
C532
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
L3
L3
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C481
C481
80mil Width
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C143
C143
0.6A per ANT Rev1.1, Page3
1 2
C478
C478
SCD1U10V2KX-4GP
C174
C174
1 2
C161
C161
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
+1.1V_RUN_VDDHT
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
0.45A per ANT Rev1.1, Page3
+1.1V_RUN_VDDHTRX
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C238
C238
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C162
C162
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C171
C171
1 2
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R135
R135
C208
C208
C229
C229
1 2
1 2
+1.2V_RUN_VDDHTTX
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C132
C132
C190
C190
1 2
1 2
+1.8V_RUN_VDDA18PCIE
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C178
C178
C158
C158
1 2
1 2
+1.8V_RUN_VDD18_MEM
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C477
C477
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C194
C194
1 2
C237
C237
1 2
C134
C134
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C129
C129
C153
C153
1 2
1 2
M16
R16
H18
G19
D22
AE25
AD24
AC23
AB22
AA21
W19
U17
R17
M17
M10
R10
AA9
AB9
AD9
AE9
U10
AE11
AD11
J17
K16
L16
P16
T16
F20
E21
B23
A23
Y20
V18
T17
P17
J10
P10
K10
L10
T10
W9
H9
Y9
F9
G9
4
U61E
U61E
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDD18_1
VDD18_2
VDD18_MEM1
VDD18_MEM2
RS780M-GP-U2
RS780M-GP-U2
PART 5/6
PART 5/6
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
POWER
POWER
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6
VDD33_1
VDD33_2
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
3
300mil Width
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C191
C191
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
C182
C182
C193
C193
7A per ANT Rev1.1, Page3
Per check list (Rev 0.02)
RS780M: 1V ~ 1.1V, check PWR team
SCD1U10V2KX-4GP
C247
C247
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C203
C203
1 2
1 2
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R134
R134
1 2
SCD1U10V2KX-4GP
C246
C246
C195
C195
1 2
1 2
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R161
R161
C154
C154
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C179
C179
1 2
VDD_MEM
+3.3V_RUN_VDD33
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D1V_S0
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C206
C206
C125
C125
1 2
3D3V_S0
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C169
C169
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
+NB_VCORE
1D1V_S0
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C183
C183
1 2
1 2
C473
C473
2
U61F
U61F
A25
VSSAHT1
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C476
C476
W22
W24
W25
Y21
AD25
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
L12
RS780M-GP-U2
RS780M-GP-U2
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
PART 6/6
PART 6/6
1
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
GROUND
GROUND
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
U61D
AB12
AE16
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
AD16
AE17
AD17
W12
AD18
AB13
AB18
W14
AE12
AD12
V11
Y14
Y12
V14
V15
U61D
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_BA0
MEM_BA1
MEM_BA2
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT
MEM_CKP
MEM_CKN
MEM_COMPP
MEM_COMPN
RS780M-GP-U2
RS780M-GP-U2
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC
MEM_DQ1/DVO_HSYNC
MEM_DQ2/DVO_DE
MEM_DQ3/DVO_D0
MEM_DQ4
MEM_DQ5/DVO_D1
MEM_DQ6/DVO_D2
MEM_DQ7/DVO_D4
MEM_DQ8/DVO_D3
MEM_DQ9/DVO_D5
MEM_DQ10/DVO_D6
MEM_DQ11/DVO_D7
MEM_DQ12
MEM_DQ13/DVO_D9
MEM_DQ14/DVO_D10
MEM_DQ15/DVO_D11
MEM_DQS0P/DVO_IDCKP
MEM_DQS0N/DVO_IDCKN
MEM_DQS1P
MEM_DQS1N
MEM_DM0
MEM_DM1/DVO_D8
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
4
IOPLLVDD18
IOPLLVDD
IOPLLVSS
MEM_VREF
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
MEM_COMP_P and MEM_COMP_N trace
width >=10mils and 10mils spacing from
other Signals in X,Y,Z directions
1D8V_S0
R319
R319
1 2
Do Not Stuff
Do Not Stuff
+1.8V_IOPLLVDD18
+1.1V_IOPLLVDD
1 2
Do Not Stuff
Do Not Stuff
R131
R131
1D1V_S0
3
SB
SB
SB
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATi-RS780M_Side Port&PWR&GND(3/3)
ATi-RS780M_Side Port&PWR&GND(3/3)
ATi-RS780M_Side Port&PWR&GND(3/3)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
F7-GT
F7-GT
F7-GT
12 47 Wednesday, August 20, 2008
12 47 Wednesday, August 20, 2008
12 47 Wednesday, August 20, 2008
1
SB
SB
SB
B B
A A
5
GMCH_LCDVDD_ON 11
2ND = 84.00143.D1K
2ND = 84.00143.D1K
FRONT_PWRLED 30
2ND = 84.00143.D1K
2ND = 84.00143.D1K
E-BUTTON_LED 30
IPEX-CON30-3-GP
IPEX-CON30-3-GP
CCD & MIC CONN.
84.00143.E1K
84.00143.E1K
84.00143.E1K
84.00143.E1K
32
31
LCD1
LCD1
20.F1312.030
20.F1312.030
DMIC_12 28
DMIC_CLK 28
R26 Do Not Stuff R26 Do Not Stuff
1 2
EBC
R2
R2
R1
R1
PDTC143ZU-GP-U
PDTC143ZU-GP-U
Q7
Q7
EBC
R2
R2
R1
R1
PDTC143ZU-GP-U
PDTC143ZU-GP-U
Q6
Q6
LCD CONN
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CLK_DDC_EDID
DAT_DDC_EDID
BLON_OUT_CN
BRIGHTNESS_CN
PBY201209T-121Y- N-GP
PBY201209T-121Y-N-GP
1 2
1 2
PBY201209T-121Y-N-GP
PBY201209T-121Y-N-GP
20080825
LCDVDD 3D3V_S0
LCDVDD_ON_1
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
1 2
C16
C16
C20
C20
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
E-BUTTON_LED_R#
LCDVDD
1 2
C18
C18
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
Single channel
2ND = 69.50007.A41
2ND = 69.50007.A41
POLYSW-1D1A24V-GP
POLYSW-1D1A24V-GP
1 2
1 2
EC10
EC10
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
3D3V_S0
GMCH_TXAOUT0- 11
GMCH_TXAOUT0+ 11
GMCH_TXAOUT1- 11
GMCH_TXAOUT1+ 11
GMCH_TXAOUT2- 11
GMCH_TXAOUT2+ 11
GMCH_TXACLK- 11
GMCH_TXACLK+ 11
1 2
C19
C19
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1
2
3
4
FRONT_PWRLED#_R
R13
R13
1 2
R12
R12
1 2
1 2
EC7
EC7
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
69.50007.A31
69.50007.A31
F3
F3
C25
C25
SC10U25V5KX-GP
SC10U25V5KX-GP
U3
U3
IN#1
OUT
EN
GND
G5281RC1U-GP
G5281RC1U-GP
LED-W-12-GP
LED-W-12-GP
LED-W-12-GP
LED-W-12-GP
1 2
20080825
USB_8+ 47
L32
L32
USB_8- 47
L33
L33
CCD_PWR
DMIC_12_R
DMIC_CLK_R
1 2
1 2
EC69
EC69
EC68
EC68
SC22P50V2JN- 4 GP
SC22P50V2JN-4GP
SC22P50V2JN- 4 GP
SC22P50V2JN-4GP
3D3V_S0
9
GND
8
IN#8
7
IN#7
6
IN#6
5
IN#5
1 2
83.00191.D70
83.00191.D70
2ND = 83.19217.F70
2ND = 83.19217.F70
LED2
LED2
68R2-GP
68R2-GP
LED1
LED1
68R2-GP
68R2-GP
83.00191.D70
83.00191.D70
2ND = 83.19217.F70
2ND = 83.19217.F70
R27
R27
R23
R23
1 2
R29
R29
1 2
R21
R21
1 2
A K
A K
68R2-GP
68R2-GP
68R2-GP
68R2-GP
68R2-GP
68R2-GP
68R2-GP
68R2-GP
LED-W-12-GP
LED-W-12-GP
LED-W-12-GP
LED-W-12-GP
LED-W-12-GP
LED-W-12-GP
LED-W-12-GP
LED-W-12-GP
5V_S0
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
C21
C21
83.00191.D70
83.00191.D70
2ND = 83.19217.F70
2ND = 83.19217.F70
LED5
LED5
A K
LED4
LED4
A K
LED6
LED6
A K
LED3
LED3
A K
83.00191.D70
83.00191.D70
2ND = 83.19217.F70
2ND = 83.19217.F70
83.00191.D70
83.00191.D70
2ND = 83.19217.F70
2ND = 83.19217.F70
83.00191.D70
83.00191.D70
2ND = 83.19217.F70
2ND = 83.19217.F70
20080731 change connect
DCBATOUT
1 2
EC9
EC9
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
CN1
CN1
1
GND
2
NC#2
3
UIM_DATA
4
UIM_VPP
5
UIM_RESET
6
UIM_CLK
7
NC#7
8
UIM_POWER
9
GND
10
GND
JST-CON8-11-GP
JST-CON8-11-GP
20.F0912.008
20.F0912.008
2ND = 20.F1375.008
2ND = 20.F1375.008
CCD
5V_S5
1 2
C14
C14
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
CCD_PWR
1 2
C390
C390
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
BRIGHTNESS_CN
BLON_OUT_CN
USB_8USB_8+
DY
DY
1 2
C17
C17
Do Not Stuff
Do Not Stuff
SRN0J-6-GP
SRN0J-6-GP
2 3
1
RN2
RN2
1 2
1 2
C15
C15
DY
DY
Do Not Stuff
Do Not Stuff
4
F2
F2
FUSE-1A6V-2-GP
FUSE-1A6V-2-GP
69.50007.721
69.50007.721
SRN33J-5-GP-U
SRN33J-5-GP-U
1
2 3
RN3
RN3
CLK_DDC_EDID 11
DAT_DDC_EDID 11
USBPN8 16
USBPP8 16
4
SRN2K2J-1-GP
SRN2K2J-1-GP
3D3V_S0
1 2
EC35
EC35
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RN4
RN4
10KR2J-3-GP
10KR2J-3-GP
3D3V_S0
2 3
BRIGHTNESS 30
BLON_OUT 30
1 2
R22
R22
1
4
SB
SB
SB
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
LCD CONN & LED
LCD CONN & LED
LCD CONN & LED
F7-GT
F7-GT
F7-GT
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
13 47 Tuesday, September 02, 2008
of
13 47 Tuesday, September 02, 2008
of
13 47 Tuesday, September 02, 2008
SB
SB
SB
A
CRT_R_SYS 26
CRT_G_SYS 26
4 4
3 3
2 2
CRT_B_SYS 26
Q3
Q3
2N7002E-1-GP
2N7002E-1-GP
R14
DOCK_ON_TV# DOCK_ON_3#
1 2
GMCH_HSYNC 11
GMCH_VSYNC 11
R14
10KR2J-3-GP
10KR2J-3-GP
2ND = 84.2N702.E31
2ND = 84.2N702.E31
5V_S0
R19
R19
100KR2J-1-GP
100KR2J-1-GP
1 2
D
.
.
.
.
.
.
.
.
.
.
S
G
84.2N702.D31
84.2N702.D31
R10 Do Not Stuff R10 Do Not Stuff
1 2
R8 Do Not Stuff R8 Do Not Stuff
1 2
1 2
R254
R254
SYS_HV_ON#
VSYNC_4
150R2F-1-GP
150R2F-1-GP
1 2
R252
R252
HSYNC_4
1 2
150R2F-1-GP
150R2F-1-GP
14
5 6
7
14
9 8
7
1 2
C387
C387
R253
R253
DY
DY
150R2F-1-GP
150R2F-1-GP
U1B
U1B
4
TSC125APW-GP
TSC125APW-GP
U1C
U1C
10
TSC125APW-GP
TSC125APW-GP
73.74125.DHB
73.74125.DHB
2ND = 73.74125.EHB
2ND = 73.74125.EHB
B
1 2
C388
C388
Do Not Stuff
Do Not Stuff
DY
DY
5V_S0
1 2
14
1
2 3
7
73.74125.DHB
73.74125.DHB
2ND = 73.74125.EHB
2ND = 73.74125.EHB
73.74125.DHB
73.74125.DHB
2ND = 73.74125.EHB
2ND = 73.74125.EHB
5V_S0
14
13
12 11
7
2ND = 73.74125.EHB
2ND = 73.74125.EHB
68.00230.021
68.00230.021
L11
L11
1 2
FCB1608CF-GP
FCB1608CF-GP
68.00230.021
68.00230.021
L10
L10
1 2
FCB1608CF-GP
FCB1608CF-GP
L12
L12
1 2
FCB1608CF-GP
FCB1608CF-GP
1 2
C389
C389
68.00230.021
68.00230.021
Do Not Stuff
Do Not Stuff
Do Not Stuff
C13
C13
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U1A
U1A
TSC125APW-GP
TSC125APW-GP
U1D
U1D
TSC125APW-GP
TSC125APW-GP
73.74125.DHB
73.74125.DHB
Do Not Stuff
DY
DY
Hsync & Vsync level shift
CRT_HSYNC1_1
1 2
R9 39R2J-L-GP R9 39R2J-L-GP
For System CRT
CRT_VSYNC1_1
CRT_HSYNC2
1 2
R7 39R2J-L-GP R7 39R2J-L-GP
DOCK_ON_TV# 26
1 2
For Dock CRT
CRT_VSYNC2
1 2
R20
R20
47R2J-2-GP
47R2J-2-GP
R11
R11
47R2J-2-GP
47R2J-2-GP
1 2
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
CRT_HSYNC1
CRT_VSYNC1
C384
C384
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
DOCK_HSYNC 26
DOCK_VSYNC 26
C
CRT_R
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DAT_DDC1_5
1 2
C383
C383
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
3D3V_S0
1 2
CRT_HSYNC1
1 2
C382
C382
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
R4
R4
10KR2J-3-GP
10KR2J-3-GP
R1
R1
470R2J-2-GP
470R2J-2-GP
CRT_VSYNC1
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
CRT_G
CRT_B
C386
C386
1 2
C385
C385
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
CRT_DEC# 30
GMCH_DDCDATA 11
GMCH_DDCCLK 11
1 2
CLK_DDC1_5
C380
C380
1 2
C7
C7
CRT_DEC_R
1 2
C6
C6
SC100P50V2JN-3GP
SC100P50V2JN-3GP
4 5
D
3D3V_S0
123
678
CRT1
CRT1
17
11
12
13
14
15
16
VIDEO-15-88-GP
VIDEO-15-88-GP
20.10205.015
20.10205.015
2ND = 20.20424.015
2ND = 20.20424.015
D1
D1
3
Do Not Stuff
Do Not Stuff
RN37
RN37
SRN2K2J-2-GP
SRN2K2J-2-GP
6
CRT_R
1
7
CRT_G
2
8
CRT_B
3
5V_CRT_S0
9
4
10
5
3D3V_S0
2
DY
DY
1
20080703
5V_CRT_S0
Q1
Q1
5
6
2ND = 84.27002.C3F
2ND = 84.27002.C3F
F1
F1
1 2
FUSE-1D1A6V-4GP-U
FUSE-1D1A6V-4GP-U
3 4
2
1
3D3V_S0
2N7002DW-1-GP
2N7002DW-1-GP
C381
C381
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
CRT_DEC_R 26
5V_S0
2ND = 83.R5003.C8F
2ND = 83.R5003.C8F
D2
D2
RB551V30-GP
RB551V30-GP
K A
678
RN1
RN1
SRN4K7J-12-GP
SRN4K7J-12-GP
123
4 5
E
83.R5003.H8H
83.R5003.H8H
DAT_DDC1_5 26
CLK_DDC1_5 26
1 1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CRT/TV Connector
CRT/TV Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
B
C
D
Date: Sheet of
Date: Sheet of
Date: Sheet of
CRT/TV Connector
F7-GT
F7-GT
F7-GT
14 47 Monday, September 01, 2008
14 47 Monday, September 01, 2008
14 47 Monday, September 01, 2008
E
SB
SB
SB
5
33R2J-2-GP
33R2J-2-GP
R379
R379
PLT_RST1# 11
ALINK_NBRX_SBTX_P0 10
ALINK_NBRX_SBTX_N0 10
ALINK_NBRX_SBTX_P1 10
ALINK_NBRX_SBTX_N1 10
ALINK_NBRX_SBTX_P2 10
ALINK_NBRX_SBTX_N2 10
ALINK_NBRX_SBTX_P3 10
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C616
C616
ALINK_NBRX_SBTX_N3 10
1
2
20mil Width
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C607
C607
3D3V_S5
14 7
3
73.07408.L16
73.07408.L16
2ND = 73.07408.02B
2ND = 73.07408.02B
U33A
U33A
TSLVC08APW-1-GP
TSLVC08APW-1-GP
D D
1D2V_S0 +1.2V_RUN_PCIE_PVDD PCIE_VDDR
L9
L9
1 2
PBY201209T-221Y-N-GP
PBY201209T-221Y-N-GP
220 ohm 2A
C C
PLT_RST1# 11
1 2
1 2
C609 SCD1U10V2KX-4GP C609 SCD1U10V2KX-4GP
1 2
C608 SCD1U10V2KX-4GP C608 SCD1U10V2KX-4GP
1 2
C610 SCD1U10V2KX-4GP C610 SCD1U10V2KX-4GP
1 2
C611
C611
1 2
C613
C613
1 2
C612 SCD1U10V2KX-4GP C612 SCD1U10V2KX-4GP
1 2
C615 SCD1U10V2KX-4GP C615 SCD1U10V2KX-4GP
1 2
C614 SCD1U10V2KX-4GP C614 SCD1U10V2KX-4GP
R232 562R2F-GP R232 562R2F-GP
R231 2K05R2F-GP R231 2K05R2F-GP
Place R <100mils form pins T25,T24
PLT_RST1#_B 22,24,27,30,32
NB_RST#
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
ALINK_NBTX_C_SBRX_P0 10
ALINK_NBTX_C_SBRX_N0 10
ALINK_NBTX_C_SBRX_P1 10
ALINK_NBTX_C_SBRX_N1 10
ALINK_NBTX_C_SBRX_P2 10
ALINK_NBTX_C_SBRX_N2 10
ALINK_NBTX_C_SBRX_P3 10
ALINK_NBTX_C_SBRX_N3 10
1 2
1 2
20080825
1 2
DY
DY
R374 Do Not Stuff
R374 Do Not Stuff
4
1
32K_X1
1 2
R382
R382
10MR2J-L-GP
10MR2J-L-GP
32K_X2
CLK_SB_25M 2
ALLOW_LDTSTOP 5,11
PROCHOT#_SB 5
CPU_LDT_STOP# 5
CPU_LDT_RST# 5
C567
C567
B B
A A
SC18P50V 2JN-1-GP
SC18P50V2JN-1-GP
2ND = 82.30001.691
2ND = 82.30001.691
1 2
X6
X6
X-32D768KHZ-46GP
X-32D768KHZ-46GP
82.30001.861
82.30001.861
2 3
1 2
C573
C573
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
4
ALINK_NBRX_C_SBTX_P0
ALINK_NBRX_C_SBTX_N0
ALINK_NBRX_C_SBTX_P1
ALINK_NBRX_C_SBTX_N1
ALINK_NBRX_C_SBTX_P2
ALINK_NBRX_C_SBTX_N2
ALINK_NBRX_C_SBTX_P3
ALINK_NBRX_C_SBTX_N3
PCIE_CALRP
PCIE_CALRN
CLK_PCIE_SB 2
CLK_PCIE_SB# 2
DY
DY
R455
R455
25M_X1
TP277 TP277
1 2
25M_X2
1
CPU_PWRGD 5
Do Not Stuff
Do Not Stuff
U64A
U64A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB700-1-GP-U1
SB700-1-GP-U1
71.SB700.M02
71.SB700.M02
SB700
SB700
Part 1 of 5
Part 1 of 5
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
LPC
CPU
CPU
LPC
RTC
RTC
RTC XTAL
RTC XTAL
3
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCI CLKS
PCI CLKS
PCIRST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
PCI INTERFACE
PCI INTERFACE
CLOCK GENERATOR
CLOCK GENERATOR
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
INTRUDER_ALERT#
VBAT
P4
P3
P1
P2
T4
T3
PCIRST#_SB
N1
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
PCI_REQ#0
AC3
PCI_REQ#1
AD4
PCI_REQ#2
AB7
PCI_REQ#3
AE6
PCI_REQ#4
AB6
PCI_GNT#0
AD2
PCI_GNT#1
AE4
PCI_GNT#2
AD5
PCI_GNT#3
AC6
PCI_GNT#4
AE5
AD6
V5
AD3
AC4
AE2
AE3
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
C3
INTRUDER#
C2
RTC_AUX_S5_R
B2
1
PCI_AD31
1
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_LOCK#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
LPCCLK0_R
R407 22R2J-2-GP R407 22R2J-2-GP
LPCCLK1_R
R408 22R2J-2-GP R408 22R2J-2-GP
LPC_LDRQ1#
1
PCI_REQ#5
INT_SERIRQ 30
RTC_CLK 1 9,34
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C571
C571
TP231 TP231
PCI_AD23 19
PCI_AD24 19
PCI_AD25 19
PCI_AD26 19
PCI_AD27 19
PCI_AD28 19
PCI_AD29 19
PCI_ AD30 19
TP227 TP227
TP226 TP226
1
TP148 TP148
1
TP150 TP150
1
TP225 TP225
1
TP144 TP144
1
TP130 TP130
1
TP249 TP249
1
TP138 TP138
1
TP251 TP251
1
TP135 TP135
1
TP237 TP237
1
TP253 TP253
1
TP248 TP248
1
TP132 TP132
1
TP252 TP252
1
TP133 TP133
1
TP236 TP236
1
TP250 TP250
1
TP235 TP235
1
TP234 TP234
1
1 2
1 2
LPC_LAD0 30,32
LPC_LAD1 30,32
LPC_LAD2 30,32
LPC_LAD3 30,32
LPC_LFRAME# 30,32
TP146 TP146
TP232 TP232
1
1 2
R378 1KR2J-1-GP R378 1KR2J-1-GP
1 2
C570
C570
TP137 TP137
1
TP131 TP131
1
TP141 TP141
1
TP140 TP140
1
TP149 TP149
1
TP129 TP129
1
TP147 TP147
1
1 2
R388 10KR2J-3-GP R388 10KR2J-3-GP
RTC_AUX_S5
Do Not Stuff
Do Not Stuff
EC145
EC145
EC144
EC144
2
R201
R201
DY
DY
TP169 TP169
1
3D3V_S0
1 2
1 2
DY
DY
1 2
DY
DY
PCI_CLK0
PCI_CLK1
PM_CLKRUN# 30
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
LPC_LDRQ0# 30
Do Not Stuff
Do Not Stuff
SB
SB
SB
PCLK_FWH 19,32
PCLK_KBC 19,30
C569
C569
DY
DY
TP134 TP134
1
TP224 TP224
1
PCI_CLK2 19
PCI_CLK3 19
LPC_LAD[0..3]
1 2
ACES-CON3-GP-U1
ACES-CON3-GP-U1
CLK_PCI4 19
CLK_PCI_LOM 19
RTC1
RTC1
1
2
3
20.F0714.003
20.F0714.003
2ND = 20.F1000.003
2ND = 20.F1000.003
1
LPC_LAD[0..3] 30,32
4
5
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATi-SB700_PCIE&PCI_(1/5)
ATi-SB700_PCIE&PCI_(1/5)
ATi-SB700_PCIE&PCI_(1/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
5
4
3
2
A3
Date: Sheet
Date: Sheet
Date: Sheet of
F7-GT
F7-GT
F7-GT
15 47 Friday, August 29, 2008
15 47 Friday, August 29, 2008
15 47 Friday, August 29, 2008
SB
SB
of
of
1
SB