AAEON COM-BT Manual

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COM Express Module
C O M - BT
COM-BT
Intel® Celeron® J1900, N2930, N2807
and Atom™ E3800 Series Processor
Gigabit Ethernet
2 SATA 3.0Gb/s
6 USB2.0, 1 USB3.0 (combine USB2.0)
3 PCI-E[x1]
COM Express Compact Module
September 11, 2014
COM-BT Manual Rev.A 1st Ed.
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Copyright Notice
This document is copyrighted, 2014. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice.
No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer. Information provided in this manual is intended to be accurate and reliable. However, the original manufacturer assumes no responsibility for its use, or for any in­fringements upon the rights of third parties that may result from its use.
The material in this document is for product information only and is subject to change without notice. While reasonable efforts have been made in the preparation of this document to assure its accuracy, AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein.
We reserve the right to make changes in the product design without notice to its users.
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Acknowledgments
All other products’ name or trademarks are properties of their respective owners.
AMI is a trademark of American Megatrends Inc.
Intel®, Atom are trademarks of Intel® Corporation.
Microsoft Windows® is a registered trademark of Microsoft Corp.
ITE is a trademark of Integrated Technology Express, Inc.
IBM, PC/AT, PS/2, and VGA are trademarks of International
Business Machines Corporation.
SoundBlaster is a trademark of Creative Labs, Inc.
All other product names or trademarks are properties of their respective owners.
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Packing List
Before you begin installing your card, please make sure that the following materials have been shipped:
4 M2.5 Screw
1 DVD-ROM for manual (in PDF format) and
drivers
1 COM-BT
If any of these items should be missing or damaged, please contact your distributor or sales representative immediately.
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Contents
Chapter 1 General Information
1.1 Introduction ................................................................ 1-2
1.2 Features .................................................................... 1-3
1.3 Specifications ............................................................ 1-4
Chapter 2 Quick Installation Guide
2.1 Safety Precautions .................................................... 2-2
2.2 Mechanical Drawing of Connectors and Switches .... 2-3
2.3 List of Switch and Connectors ................................... 2-4
2.4 Carrier Board DP/HDMI Function, LVDS Function, AT &
ATX Mode, RCT Rest Setting (SW1) .............................. 2-5
2.5 COM Express ROW A/B Connector (CN1) ............... 2-5
2.6 COM Express ROW C/D Connector (CN2)............... 2-14
2.7 eDP Connector (CN3) ............................................... 2-24
2.8 eDP Backlight (CN4) ................................................. 2-25
2.9 SPI Connector (CN5) ................................................ 2-25
2.10 LPC Connector (CN6) ............................................. 2-26
Chapter 3 AMI BIOS Setup
3.1 System Test and Initialization. .................................. 3-2
3.2 AMI BIOS Setup ........................................................ 3-3
Chapter 4 Driver Installation
4.1 Installation ................................................................. 4-3
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Appendix A Programming the Watchdog Timer
A.1 Watchdog Timer Initial Program ............................ A-2
Appendix B I/O Information
B.1 I/O Address Map .................................................... B-2
B.2 Memory Address Map ............................................ B-3
B.3 IRQ Mapping Chart ................................................ B-3
Appendix C Programming the Digital I/O
C.1 DIO Programming ................................................. C-2
C.2 Digital I/O Register ................................................ C-3
C.3 Digital I/O Sample Program .................................. C-4
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Chapter
1
General
Information
Chapter 1 General Information 1- 1
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1.1 Introduction
AAEON, a leading embedded board manufacturer, is pleased to
announce the debut of their new generation COM Express Module-
COM-BT. The COM-BT is a cutting-edge product that provides high
performance and low power consumption in the embedded market.
COM-BT adopts the latest Intel® Celeron® J1900, N2930, N2807 and
Atom™ E3800 Series product family. The system memory deploys
with one DDR3L 1066/1333 MHz SODIMM up to 8 GB (4GB max for
E3815/E3825/N2807). In addition, Intel® I211 supports Gigabit
Ethernet that allows faster network connections. This model applies
four PCI-Express[x1] (one shared with Gigabit LAN). Moreover, two
SATA 3.0Gb/s are configured on the COM-BT. COM-BT also equips
USB2.0 x6, USB3.0 x1(combine USB2.0 x1) for flexible I/O
expansions.
The display of COM-BT supports up to two independent displays
simultaneously. This brand new COM Express Module is developed to
cater to the requirements of Automation, Medical, ticket machine,
transportation, gaming, KIOSK, and POS/POI applications.
Chapter 1 General Information 1- 2
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1 - 3
1.2 Features
Onboard Intel® Celeron® J1900, N2930, N2807 and Atom™
E3800 Series
DDR3L 1066/1333 MHz SODIMM x 1, Up to 8 GB (4GB
max for E3815/E3825/N2807)
Intel® Gigabit Ethernet
CRT, Up to 24-bit Dual-channel LVDS LCD, DP/HDMI
High Definition Audio Interface
SATA 3.0Gb/s x 2,
USB2.0 x6, USB3.0 x1(combine USB2.0 x1)
PCI-Express [x1] x 3
COM Express Compact Module, Pin-out Type 6, COM.0
Rev. 2.1
Chapter 1 General Information
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Form Factor
COM Express Compact module, Pin-out Type 6, COM. 0 Rev. 2.1
Processor
Onboard Intel® Celeron® J1900 (2.0GHz), N2930 (1.83GHz), N2807(1.58GHz);
Intel® Atom™ Processor E3800 series:
Quad core: E3845 (1.91 GHz)
Dual core: E3827 (1.75 GHz)
Single core: E3815 (1.46 GHz)
System Memory
DDR3L 1066/ 1333 MHz SODIMM x 1, Max. 8GB (Max. 4GB for
E3815/E3825/N2807)
Chipset
Intel® Celeron® J1900, N2930, N2807 and Atom™ E3800 Series
I/O Chipset
Intel® Celeron® J1900, N2930, N2807 and Atom™ E3800 Series
Ethernet
Intel
®
I211, Gigabit Ethernet
TPM
v1.2 (Optional)
BIOS
AMI BIOS
SPI type, 8MB ROM
Wake On LAN
Yes
Watchdog Timer
ITE IT8528, 255 levels
H/W Status
Monitoring
Supports CPU Temperature Monitoring
Expansion Interface
PCI-Express [x1] x 4 (one shared with
Gigabit LAN)
Power Requirement
Nominal: +12V
Board Size
3.74" (L) x 3.74"(W) (95mm x 95mm)
Gross Weight
0.55 lb (0.25kg)
Operating
32°F ~ 140°F (0°C ~ 60°C)
1.3 Specifications
System
Chapter 1 General Information 1- 4
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1 - 5
Temperature
Storage Temperature
-40°F ~ 176°F (-40°C ~ 80°C)
Operating Humidity
0% ~ 90% relative humidity,
non-condensing
MTBF
81,000 hours
OS Support
Windows® 7, Windows® 8, Linux Fedora
Chipset
Intel® Celeron® J1900, N2930, N2807 and Atom™ E3800 Series
Memory
Shared system memory up to 512MB/
DVMT 5.0
Resolution
Up to 2560 x 1600 for HDMI, DisplayPort, VGA
LCD Interface
Up to18/24 bits dual-channel LVDS
Storage
SATA 3.0Gb/s x 2
Serial Port
2 (Tx/ Rx only)
USB
USB2.0 x6, USB3.0 x1(combine USB2.0 x1)
Audio
High definition audio
GPIO
Up to 4 in and 4 out
Display: Supports CRT/LVDS simultaneous/ dual view displays
I/O
Chapter 1 General Information
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Chapter
2
Quick
Installation
Guide
Chapter 2 Quick Installation Guide 2-1
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Always completely disconnect the power cord from your board whenever you are working on it. Do not make connections while the power is on, because a sudden rush of power can damage sensitive electronic components.
Always ground yourself to remove any static charge before touching the board. Modern electronic devices are very sensitive to static electric charges. Use a grounding wrist strap at all times. Place all electronic components on a static-dissipative surface or in a static-shielded bag when they are not in the chassis
2.1 Safety Precautions
Chapter 2 Quick Installation Guide 2 - 2
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2 - 3
Component Side
Solder Side
Solder Side
2.2 Mechanical Drawings of Connectors and Switches Component Side
Solder Side
Chapter 2 Quick Installation Guide
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Label
Function
SW1
1. Carrier Board DP/HDMI Function
2. LVDS Function
3. AT & ATX mode
4. RCT Rest setting
BAT1
RTC Battery
CN1
ROW A/B
CN2
ROW C/D
CN3
eDP Connector
CN4
eDP Backlight
CN5
SPI Connector
CN6
LPC Connector
DIMM1
DDR3L Socket
2.3 List of Switch and Connectors
There is a switch on the board that allows you to configure your
system to suit your application. The table below shows the function
of the switch and connectors:
Chapter 2 Quick Installation Guide 2 - 4
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OFF
ON
1
DP/HDMI[1](Default)
eDP on MB(Optional)
2
DP/HDMI[2](Optional)
LVDS(Default)
3
ATX (Default)
AT
4
Normal(Default)
Clear CMOS
Pin
COMe 2.1 SPEC Type 6
COM-BT Signal
A1
GND
GND
A2
GBE0_MDI3-
GBE0_MDI3-
A3
GBE0_MDI3+
GBE0_MDI3+
A4
GBE0_LNIK100#
GBE0_LNIK100#
A5
GBE0_LNIK1000#
GBE0_LNIK1000#
A6
GBE0_MDI2-
GBE0_MDI2-
A7
GBE0_MDI2+
GBE0_MDI2+
A8
GBE0_LINK#
GBE0_LINK#
A9
GBE0_MDI1-
GBE0_MDI1-
A10
GBE0_MDI1+
GBE0_MDI1+
A11
GND
GND
A12
GBE0_MDI0-
GBE0_MDI0-
2.4 Carrier Board DP/HDMI Function, LVDS Function, AT & ATX Mode, RCT Rest Setting (SW1)
2.5 COM Express ROW A/B Connector (CN1)
Row A
Chapter 2 Quick Installation Guide
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A13
GBE0_MDI0+
GBE0_MDI0+
A14
GBE0_CTREF
GBE0_CTREF
A15
SUS_S3#
SUS_S3#
A16
SATA0_TX+
SATA0_TX+
A17
SATA0_TX-
SATA0_TX-
A18
SUS_S4#
SUS_S4#
A19
SATA0_RX+
SATA0_RX+
A20
SATA0_RX-
SATA0_RX-
A21
GND
GND
A22
SATA2_TX+
NC
A23
SATA2_TX-
NC
A24
SUS_S5#
SUS_S5#
A25
SATA2_RX+
NC
A26
SATA2_RX-
NC
A27
BATLOW#
BATLOW#
A28
(S)ATA_ACT#
(S)ATA_ACT#
A29
AC/HDA_SYNC
AC/HDA_SYNC
A30
AC/HDA_RST#
AC/HDA_RST#
A31
GND
GND
A32
AC/HDA_BITCLK
AC/HDA_BITCLK
A33
AC/HDA_SDOUT
AC/HDA_SDOUT
A34
BIOS_DIS0#
BIOS_DIS0#
A35
THRMTRIP#
THRMTRIP#
A36
USB6-
USB6-
Chapter 2 Quick Installation Guide 2 - 6
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A37
USB6+
USB6+
A38
USB_6_7_OC#
USB_6_7_OC#
A39
USB4-
USB4-
A40
USB4+
USB4+
A41
GND
GND
A42
USB2-
USB2-
A43
USB2+
USB2+
A44
USB_2_3_OC#
USB_2_3_OC#
A45
USB0-
USB0-
A46
USB0+
USB0+
A47
VCC_RTC
VCC_RTC
A48
EXCD0_PERST#
EXCD0_PERST#
A49
EXCD0_CPPE#
EXCD0_CPPE#
A50
LPC_SERIRQ
LPC_SERIRQ
A51
GND
GND
A52
PCIE_TX5+
NC
A53
PCIE_TX5-
NC
A54
GPI0
GPI0
A55
PCIE_TX4+
NC
A56
PCIE_TX4-
NC
A57
GND
GND
A58
PCIE_TX3+
PCIE_TX3+
A59
PCIE_TX3-
PCIE_TX3-
A60
GND
GND
Chapter 2 Quick Installation Guide
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A61
PCIE_TX2+
PCIE_TX2+
A62
PCIE_TX2-
PCIE_TX2-
A63
GPI1
GPI1
A64
PCIE_TX1+
PCIE_TX1+
A65
PCIE_TX1-
PCIE_TX1-
A66
GND
GND
A67
GPI2
GPI2
A68
PCIE_TX0+
PCIE_TX0+
A69
PCIE_TX0-
PCIE_TX0-
A70
GND
GND
A71
LVDS_A0+
LVDS_A0+
A72
LVDS_A0-
LVDS_A0-
A73
LVDS_A1+
LVDS_A1+
A74
LVDS_A1-
LVDS_A1-
A75
LVDS_A2+
LVDS_A2+
A76
LVDS_A2-
LVDS_A2-
A77
LVDS_VDD_EN
LVDS_VDD_EN
A78
LVDS_A3+
LVDS_A3+
A79
LVDS_A3-
LVDS_A3-
A80
GND
GND
A81
LVDS_A_CK+
LVDS_A_CK+
A82
LVDS_A_CK-
LVDS_A_CK-
A83
LVDS_I2C_CK
LVDS_I2C_CK
A84
LVDS_I2C_DAT
LVDS_I2C_DAT
Chapter 2 Quick Installation Guide 2 - 8
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2 - 9
A85
GPI3
GPI3
A86
RSVD
NC
A87
RSVD
NC
A88
PCIE_CLK_REF+
PCIE_CLK_REF+
A89
PCIE_CLK_REF-
PCIE_CLK_REF-
A90
GND
GND
A91
SPI_POWER
SPI_POWER
A92
SPI_MISO
SPI_MISO
A93
GPO0
GPO0
A94
SPI_CLK
SPI_CLK
A95
SPI_MOSI
SPI_MOSI
A96
TPM_PP
TPM_PP
A97
TYPE10#
NC
A98
SER0_TX
SER0_TX
A99
SER0_RX
SER0_RX
A100
GND
GND
A101
SER1_TX
SER1_TX
A102
SER1_RX
SER1_RX
A103
LID#
LID#
A104
VCC_12V
VCC_12V
A105
VCC_12V
VCC_12V
A106
VCC_12V
VCC_12V
A107
VCC_12V
VCC_12V
A108
VCC_12V
VCC_12V
Chapter 2 Quick Installation Guide
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A109
VCC_12V
VCC_12V
A110
GND
GND
Pin
COMe 2.1 SPEC Type 6
COM-BT Signal
B1
GND
GND
B2
GBE0_ACT#
GBE0_ACT#
B3
LPC_FRAME#
LPC_FRAME#
B4
LPC_AD0
LPC_AD0
B5
LPC_AD1
LPC_AD1
B6
LPC_AD2
LPC_AD2
B7
LPC_AD3
LPC_AD3
B8
LPC_DRQ0#
NC
B9
LPC_DRQ1#
NC
B10
LPC_CLK
LPC_CLK
B11
GND
GND
B12
PWRBTN#
PWRBTN#
B13
SMB_CK
SMB_CK
B14
SMB_DAT
SMB_DAT
B15
SMB_ALERT#
SMB_ALERT#
B16
SATA1_TX+
SATA1_TX+
B17
SATA1_TX-
SATA1_TX-
B18
SUS_STAT#
SUS_STAT#
B19
SATA1_RX+
SATA1_RX+
B20
SATA1_RX-
SATA1_RX-
Row B
Chapter 2 Quick Installation Guide 2 - 10
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2 - 11
B21
GND
GND
B22
SATA3_TX+
NC
B23
SATA3_TX-
NC
B24
PWR_OK
PWR_OK
B25
SATA3_RX+
NC
B26
SATA3_RX-
NC
B27
WDT
WDT
B28
AC/HDA_SDIN2
AC/HDA_SDIN2
B29
AC/HDA_SDIN1
AC/HDA_SDIN1
B30
AC/HDA_SDIN0
AC/HDA_SDIN0
B31
GND
GND
B32
SPKR
SPKR
B33
I2C_CK
I2C_CK
B34
I2C_DAT
I2C_DAT
B35
THRM#
THRM#
B36
USB7-
NC
B37
USB7+
NC
B38
USB_4_5_OC#
USB_4_5_OC#
B39
USB5-
USB5-
B40
USB5+
USB5+
B41
GND
GND
B42
USB3-
USB3-
B43
USB3+
USB3+
B44
USB_0_1_OC#
USB_0_1_OC#
Chapter 2 Quick Installation Guide
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B45
USB1-
USB1-
B46
USB1+
USB1+
B47
EXCD1_PERST#
EXCD1_PERST#
B48
EXCD1_CPPE#
EXCD1_CPPE#
B49
SYS_RESET#
SYS_RESET#
B50
CB_RESET#
CB_RESET#
B51
GND
GND
B52
PCIE_RX5+
NC
B53
PCIE_RX5-
NC
B54
GPO1
GPO1
B55
PCIE_RX4+
NC
B56
PCIE_RX4-
NC
B57
GPO2
GPO2
B58
PCIE_RX3+
PCIE_RX3+
B59
PCIE_RX3-
PCIE_RX3-
B60
GND
GND
B61
PCIE_RX2+
PCIE_RX2+
B62
PCIE_RX2-
PCIE_RX2-
B63
GPO3
GPO3
B64
PCIE_RX1+
PCIE_RX1+
B65
PCIE_RX1-
PCIE_RX1-
B66
WAKE0#
WAKE0#
B67
WAKE1#
WAKE1#
B68
PCIE_RX0+
PCIE_RX0+
Chapter 2 Quick Installation Guide 2 - 12
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2 - 13
B69
PCIE_RX0-
PCIE_RX0-
B70
GND
GND
B71
LVDS_B0+
LVDS_B0+
B72
LVDS_B0-
LVDS_B0-
B73
LVDS_B1+
LVDS_B1+
B74
LVDS_B1-
LVDS_B1-
B75
LVDS_B2+
LVDS_B2+
B76
LVDS_B2-
LVDS_B2-
B77
LVDS_B3+
LVDS_B3+
B78
LVDS_B3-
LVDS_B3-
B79
LVDS_BKLT_EN
LVDS_BKLT_EN
B80
GND
GND
B81
LVDS_B_CK+
LVDS_B_CK+
B82
LVDS_B_CK-
LVDS_B_CK-
B83
LVDS_BKLT_CTRL
LVDS_BKLT_CTRL
B84
VCC_5V_SBY
VCC_5V_SBY
B85
VCC_5V_SBY
VCC_5V_SBY
B86
VCC_5V_SBY
VCC_5V_SBY
B87
VCC_5V_SBY
VCC_5V_SBY
B88
BIOS_DIS1#
BIOS_DIS1#
B89
VGA_RED
VGA_RED
B90
GND
GND
B91
VGA_GRN
VGA_GRN
B92
VGA_BLU
VGA_BLU
Chapter 2 Quick Installation Guide
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B93
VGA_HSYNC
VGA_HSYNC
B94
VGA_VSYNC
VGA_VSYNC
B95
VGA_I2C_CK
VGA_I2C_CK
B96
VGA_I2C_DAT
VGA_I2C_DAT
B97
SPI_CS#
SPI_CS#
B98
RSVD
SMI#
B99
RSVD
SCI#
B100
GND
GND
B101
FAN_PWMOUT
FAN_PWMOUT
B102
FAN_TACHIN
FAN_TACHIN
B103
SLEEP#
SLEEP#
B104
VCC_12V
VCC_12V
B105
VCC_12V
VCC_12V
B106
VCC_12V
VCC_12V
B107
VCC_12V
VCC_12V
B108
VCC_12V
VCC_12V
B109
VCC_12V
VCC_12V
B110
GND
GND
Pin
COMe 2.1 SPEC Type 6
COM-BT Signal
C1
GND
GND
C2
GND
GND
2.6 COM Express ROW C/D Connector (CN2) Row C
Chapter 2 Quick Installation Guide 2 - 14
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C3
USB_SSRX0-
USB_SSRX0-
C4
USB_SSRX0+
USB_SSRX0+
C5
GND
GND
C6
USB_SSRX1-
NC
C7
USB_SSRX1+
NC
C8
GND
GND
C9
USB_SSRX2-
NC
C10
USB_SSRX2+
NC
C11
GND
GND
C12
USB_SSRX3-
NC
C13
USB_SSRX3+
NC
C14
GND
GND
C15
DDI1_PAIR6+
NC
C16
DDI1_PAIR6-
NC
C17
RSVD
NC
C18
RSVD
NC
C19
PCIE_RX6+
NC
C20
PCIE_RX6-
NC
C21
GND
GND
C22
PCIE_RX7+
NC
C23
PCIE_RX7-
NC
C24
DDI1_HPD
DDI1_HPD
C25
DDI1_PAIR4+
NC
C26
DDI1_PAIR4-
NC
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C27
RSVD
NC
C28
RSVD
NC
C29
DDI1_PAIR5+
NC
C30
DDI1_PAIR5-
NC
C31
GND
GND
C32
DDI2_CTRLCLK_AUX+
DDI2_CTRLCLK_AUX+
C33
DDI2_CTRLDATA_AUX-
DDI2_CTRLDATA_AUX-
C34
DDI2_DDC_AUX_SEL
DDI2_DDC_AUX_SEL
C35
RSVD
NC
C36
DDI3_CTRLCLK_AUX+
NC
C37
DDI3_CTRLDATA_AUX-
NC
C38
DDI3_DDC_AUX_SEL
NC
C39
DDI3_PAIR0+
NC
C40
DDI3_PAIR0-
NC
C41
GND
GND
C42
DDI3_PAIR1+
NC
C43
DDI3_PAIR1-
NC
C44
DDI3_HPD
NC
C45
RSVD
NC
C46
DDI3_PAIR2+
NC
C47
DDI3_PAIR2-
NC
C48
RSVD
NC
C49
DDI3_PAIR3+
NC
C50
DDI3_PAIR3-
NC
Chapter 2 Quick Installation Guide 2 - 16
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C51
GND
GND
C52
PEG_RX0+
NC
C53
PEG_RX0-
NC
C54
TYPE0#
NC
C55
PEG_RX1+
NC
C56
PEG_RX1-
NC
C57
TYPE1#
NC
C58
PEG_RX2+
NC
C59
PEG_RX2-
NC
C60
GND
GND
C61
PEG_RX3+
NC
C62
PEG_RX3-
NC
C63
RSVD
NC
C64
RSVD
NC
C65
PEG_RX4+
NC
C66
PEG_RX4-
NC
C67
RSVD
NC
C68
PEG_RX5+
NC
C69
PEG_RX5-
NC
C70
GND
GND
C71
PEG_RX6+
NC
C72
PEG_RX6-
NC
C73
GND
GND
C74
PEG_RX7+
NC
Chapter 2 Quick Installation Guide
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COM Express Module
C O M - BT
C75
PEG_RX7-
NC
C76
GND
GND
C77
RSVD
NC
C78
PEG_RX8+
NC
C79
PEG_RX8-
NC
C80
GND
GND
C81
PEG_RX9+
NC
C82
PEG_RX9-
NC
C83
RSVD
NC
C84
GND
GND
C85
PEG_RX10+
NC
C86
PEG_RX10-
NC
C87
GND
GND
C88
PEG_RX11+
NC
C89
PEG_RX11-
NC
C90
GND
GND
C91
PEG_RX12+
NC
C92
PEG_RX12-
NC
C93
GND
GND
C94
PEG_RX13+
NC
C95
PEG_RX13-
NC
C96
GND
GND
C97
RSVD
NC
C98
PEG_RX14+
NC
Chapter 2 Quick Installation Guide 2 - 18
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2 - 19
C99
PEG_RX14-
NC
C100
GND
GND
C101
PEG_RX15+
NC
C102
PEG_RX15-
NC
C103
GND
GND
C104
VCC_12V
VCC_12V
C105
VCC_12V
VCC_12V
C106
VCC_12V
VCC_12V
C107
VCC_12V
VCC_12V
C108
VCC_12V
VCC_12V
C109
VCC_12V
VCC_12V
C110
GND
GND
Pin
COMe 2.1 SPEC Type 6
COM-BT Signal
D1
GND
GND
D2
GND
GND
D3
USB_SSTX0-
USB_SSTX0-
D4
USB_SSTX0+
USB_SSTX0+
D5
GND
GND
D6
USB_SSTX1-
NC
D7
USB_SSTX1+
NC
D8
GND
GND
D9
USB_SSTX2-
NC
D10
USB_SSTX2+
NC
Row D
Chapter 2 Quick Installation Guide
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D11
GND
GND
D12
USB_SSTX3-
NC
D13
USB_SSTX3+
NC
D14
GND
GND
D15
DDI1_CTRLCLK_AUX+
DDI1_CTRLCLK_AUX+
D16
DDI1_CTRLDATA_AUX-
DDI1_CTRLDATA_AUX-
D17
RSVD
NC
D18
RSVD
NC
D19
PCIE_TX6+
NC
D20
PCIE_TX6-
NC
D21
GND
GND
D22
PCIE_TX7+
NC
D23
PCIE_TX7-
NC
D24
RSVD
NC
D25
RSVD
NC
D26
DDI1_PAIR0+
DDI1_PAIR0+
D27
DDI1_PAIR0-
DDI1_PAIR0-
D28
RSVD
NC
D29
DDI1_PAIR1+
DDI1_PAIR1+
D30
DDI1_PAIR1-
DDI1_PAIR1-
D31
GND
GND
D32
DDI1_PAIR2+
DDI1_PAIR2+
D33
DDI1_PAIR2-
DDI1_PAIR2-
D34
DDI1_DDC_AUX_SEL
DDI1_DDC_AUX_SEL
Chapter 2 Quick Installation Guide 2 - 20
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2 - 21
D35
RSVD
NC
D36
DDI1_PAIR3+
DDI1_PAIR3+
D37
DDI1_PAIR3-
DDI1_PAIR3-
D38
RSVD
NC
D39
DDI2_PAIR0+
DDI2_PAIR0+
D40
DDI2_PAIR0-
DDI2_PAIR0-
D41
GND
GND
D42
DDI2_PAIR1+
DDI2_PAIR1+
D43
DDI2_PAIR1-
DDI2_PAIR1-
D44
DDI2_HPD
DDI2_HPD
D45
RSVD
NC
D46
DDI2_PAIR2+
DDI2_PAIR2+
D47
DDI2_PAIR2-
DDI2_PAIR2-
D48
RSVD
NC
D49
DDI2_PAIR3+
DDI2_PAIR3+
D50
DDI2_PAIR3-
DDI2_PAIR3-
D51
GND
GND
D52
PEG_TX0+
NC
D53
PEG_TX0-
NC
D54
PEG_LANE_RV#
NC
D55
PEG_TX1+
NC
D56
PEG_TX1-
NC
D57
TYPE2#
TYPE2#
D58
PEG_TX2+
NC
Chapter 2 Quick Installation Guide
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COM Express Module
C O M - BT
D59
PEG_TX2-
NC
D60
GND
GND
D61
PEG_TX3+
NC
D62
PEG_TX3-
NC
D63
RSVD
NC
D64
RSVD
NC
D65
PEG_TX4+
NC
D66
PEG_TX4-
NC
D67
GND
GND
D68
PEG_TX5+
NC
D69
PEG_TX5-
NC
D70
GND
GND
D71
PEG_TX6+
NC
D72
PEG_TX6-
NC
D73
GND
GND
D74
PEG_TX7+
NC
D75
PEG_TX7-
NC
D76
GND
GND
D77
RSVD
NC
D78
PEG_TX8+
NC
D79
PEG_TX8-
NC
D80
GND
GND
D81
PEG_TX9+
NC
D82
PEG_TX9-
NC
Chapter 2 Quick Installation Guide 2 - 22
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2 - 23
D83
RSVD
NC
D84
GND
GND
D85
PEG_TX10+
NC
D86
PEG_TX10-
NC
D87
GND
GND
D88
PEG_TX11+
NC
D89
PEG_TX11-
NC
D90
GND
GND
D91
PEG_TX12+
NC
D92
PEG_TX12-
NC
D93
GND
GND
D94
PEG_TX13+
NC
D95
PEG_TX13-
NC
D96
GND
GND
D97
RSVD
NC
D98
PEG_TX14+
NC
D99
PEG_TX14-
NC
D100
GND
GND
D101
PEG_TX15+
NC
D102
PEG_TX15-
NC
D103
GND
GND
D104
VCC_12V
VCC_12V
D105
VCC_12V
VCC_12V
D106
VCC_12V
VCC_12V
Chapter 2 Quick Installation Guide
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COM Express Module
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D107
VCC_12V
VCC_12V
D108
VCC_12V
VCC_12V
D109
VCC_12V
VCC_12V
D110
GND
GND
Pin
Signal
1
+VLCD
2
+VLCD
3
GND
4
GND
5
EDP_TX2_N
6
EDP_TX2_P
7
GND
8
EDP_TX1_N
9
EDP_TX1_P
10
GND
11
EDP_TX0_N
12
EDP_TX0_P
13
GND
14
EDP_TX3_N
15
EDP_TX3_P
16
GND
17
EDP_AUX_N
18
EDP_AUX_P
2.7 eDP Connector (CN3)
Chapter 2 Quick Installation Guide 2 - 24
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2 - 25
19
GND
20
BKLT_CTRL_3.3S
21
NC
22
BKLT_EN_3.3S
23
EDP_HPD
24
GND
25
GND
26
GND
27
+VLED
28
+VLED
29
+VLED
30
+VLED
Pin
Signal
1
+VLED
2
BKLT_CTRL_3.3S
3
GND
4
GND
5
BKLT_EN_3.3S
Pin
Signal
1
SPI_SO_F
2
GND
2.8 eDP Backlight (CN4)
2.9 SPI Connector (CN5)
Chapter 2 Quick Installation Guide
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COM Express Module
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3
SPI_CLK_F
4
+V3.3A_SPI
5
SPI_SI_F
6
SPI_CE0#_F
7
SPI_CE1#_F
Pin
Signal
1
LPC_AD0
2
LPC_AD1
3
LPC_AD2
4
LPC_AD3
5
+V3.3S
6
LPC_FRAME#
7
BUF_PLT_RST#
8
GND
9
PCI_CLK_SIO
10
NC
11
NC
12
INT_SERIRQ
2.10 LPC Connector (CN6)
Chapter 2 Quick Installation Guide 2 - 26
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2 - 27
部件名称
有毒有害物质或元素
(Pb)
(Hg) 镉 (Cd)
六价铬
(Cr(VI))
多溴联苯
(PBB)
多溴二苯醚
(PBDE)
印刷电路板
及其电子组件
× ○ ○ ○ ○
外部信号
连接器及线材
× ○ ○ ○ ○
O:表示该有毒有害物质在该部件所有均质材料中的含量均在
SJ/T 11363-2006 标准规定的限量要求以下。
X:表示该有毒有害物质至少在该部件的某一均质材料中的含量超出
SJ/T 11363-2006 标准规定的限量要求。
备注:此产品所标示之环保使用期限,系指在一般正常使用状况下。
Below Table for China RoHS Requirements
产品中有毒有害物质或元素名称及含量
AAEON Main Board/ Daughter Board/ Backplane
Chapter 2 Quick Installation Guide
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COM Express Module
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Chapter
3
AMI
BIOS Setup
Chapter 3 AMI BIOS Setup 3-1
Page 40
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3.1 System Test and Initialization
These routines test and initialize board hardware. If the routines
encounter an error during the tests, you will either hear a few short
beeps or see an error message on the screen. There are two kinds
of errors: fatal and non-fatal. The system can usually continue the
boot up sequence with non-fatal errors.
System configuration verification
These routines check the current system configuration stored in the
CMOS memory and BIOS NVRAM. If system configuration is not
found or system configuration data error is detected, system will
load optimized default and re-boot with this default system
configuration automatically.
There are four situations in which you will need to setup system
configuration:
1. You are starting your system for the first time
2. You have changed the hardware attached to your system
3. The system configuration is reset by Clear-CMOS jumper
4. The CMOS memory has lost power and the configuration
information has been erased.
The COM-BT CMOS memory has an integral lithium battery backup
for data retention. However, you will need to replace the complete
Chapter 3 AMI BIOS Setup 3-2
Page 41
COM Express Module
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unit when it finally runs down.
3.2 AMI BIOS Setup
AMI BIOS ROM has a built-in Setup program that allows users to
modify the basic system configuration. This type of information is
stored in battery-backed CMOS RAM and BIOS NVRAM so that it
retains the Setup information when the power is turned off.
Entering Setup
Power on the computer and press <Del>or <F2> immediately. This
will allow you to enter Setup.
Main
Set the date, use tab to switch between date elements.
Advanced
Enable disable boot option for legacy network devices.
Chipset
Host bridge parameters.
Boot
Enables/disable quiet boot option.
Security
Set setup administrator password.
Save & Exit
Exit system setup after saving the changes.
Chapter 3 AMI BIOS Setup 3-3
Page 42
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Setup Menu
Setup submenu: Main
Chapter 3 AMI BIOS Setup 3-4
Page 43
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Setup submenu: Advanced
Chapter 3 AMI BIOS Setup 3-5
Page 44
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Intel Virtualization Technology
Disabled
Enabled
Optimal Default, Failsafe Default
EIST Disabled
Enabled
Optimal Default, Failsafe Default
CPU Configuration
Options summary:
Chapter 3 AMI BIOS Setup 3-6
Page 45
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SATA Mode IDE Mode
AHCI Mode
Optimal Default, Failsafe Default
IDE Configuration (IDE)
Options summary:
Chapter 3 AMI BIOS Setup 3-7
Page 46
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Legacy USB Support
Enabled
Optimal Default, Failsafe Default
Disabled
Auto
Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected
Device Name (Emulation Type)
Auto
Optimal Default, Failsafe Default
Floppy
Forced FDD
Hard Disk
CDROM
If Auto. USB devices less than 530MB will be emulated as Floppy and remaining as Floppy and remaining as hard drive. Forced FDD option can be used to force a HDD formatted drive to boot as FDD(Ex. ZIP drive)
USB Port 0/1 function routing
FCH USB port 8/9
Optimal Default, Failsafe Default
FCH USB port 0/1
USB Configuration
Options summary:
Chapter 3 AMI BIOS Setup 3-8
Page 47
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CPU Smart Fan Mode Configuration
Disabled
Optimal Default, Failsafe Default
Enabled
Hardware Monitor
Options summary:
Chapter 3 AMI BIOS Setup 3-9
Page 48
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Power Mode ATX Type
Optimal Default, Failsafe Default
AT Type
Select power supply mode.
Restore on Power Loss
Last State
Optimal Default, Failsafe Default
Power On
Power Off
Select power state when power is re-applied after a power failure.
RTC wake system from S5 Disabled
Optimal Default, Failsafe Default
Fixed Time
Dynamic Time
Enable or disable System wake on alarm event. When enabled, System will wake on the hr::min::sec specified
Power Management
Options summary:
Chapter 3 AMI BIOS Setup 3-10
Page 49
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SIO Configuration
Chapter 3 AMI BIOS Setup 3-11
Page 50
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Use This Device
Disabled
Enabled
Optimal Default, Failsafe Default
En/Disable Serial Port (COM)
Possible:
Use Automatic Settings
Optimal Default, Failsafe Default
IO=2D8; IRQ=11;
IO=2C8; IRQ=11;
Select an optimal setting for IO device
Serial Port Configuration
Options summary:
Chapter 3 AMI BIOS Setup 3-12
Page 51
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Use This Device
Disabled
Enabled
Optimal Default, Failsafe Default
En/Disable Serial Port (COM)
Possible:
Use Automatic Settings
Optimal Default, Failsafe Default
IO=2D8; IRQ=11;
IO=2C8; IRQ=11;
Select an optimal setting for IO device
Serial Port Configuration
Options summary:
Chapter 3 AMI BIOS Setup 3-13
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Use This Device
Disabled
Enabled
Optimal Default, Failsafe Default
Possible:
Use Automatic Settings
Optimal Default, Failsafe Default
IO=60h; IO=64h; IRQ=1;
PS2 Keyboard
Options summary:
Chapter 3 AMI BIOS Setup 3-14
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Use This Device
Disabled
Enabled
Optimal Default, Failsafe Default
Possible:
Use Automatic Settings
Optimal Default, Failsafe Default
IRQ=12;
PS2 Mouse
Options summary:
Chapter 3 AMI BIOS Setup 3-15
Page 54
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Setup submenu: Chipset
Chapter 3 AMI BIOS Setup 3-16
Page 55
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North Bridge
Chapter 3 AMI BIOS Setup 3-17
Page 56
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DVMT Pre-Allocated
64M
Optimal Default, Failsafe Default
96M 128M
160M …
512M
DVMT Total Gfx Mem
128MB
256MB
Optimal Default, Failsafe Default
Max
Display Control Configuration
Options summary:
Chapter 3 AMI BIOS Setup 3-18
Page 57
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Primary IGFX Boot Display
VBIOS Default
Optimal Default, Failsafe Default
CRT LVDS
DP/HDMI
Select the Video Device which will be activated during POST. This has no effect if external graphics present. Secondary boot display selection will appear based on your selection. VGA modes will be supported only on primary display
Secondary IGFX Boot Display
Disabled
Optimal Default, Failsafe Default
CRT
LVDS
DP/HDMI
Select Secondary Display Device
LVDS Panel Type
640x480,18bit,60Hz
800x480,18bit,60Hz
800x600,18bit,60Hz
1024x600,18bit,60Hz
1024x768,18bit,60Hz
Optimal Default, Failsafe Default
1024x768,24bit,60Hz
1280x768,24bit,60Hz
1280x1024,48bit,60Hz
1366x768,24bit,60Hz
1440x900,48bit,60Hz
1600x1200,48bit,60Hz
1920x1080,48bit,60Hz
1920x1200,48bit,60Hz
Color Depth 24bit
Optimal Default, Failsafe Default
18bit
Panel Mode Single Channel
Dual Channel
Optimal Default, Failsafe Default
Data enable polarity Active Low
Optimal Default, Failsafe Default
Active High
Chapter 3 AMI BIOS Setup 3-19
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LVDS Backlight Type Normal
Optimal Default, Failsafe Default
Inverted
LVDS Backlight Level
100%
90%
80%
Optimal Default, Failsafe Default
70% 60% 50%
40% 30%
20% 10% 0%
Chapter 3 AMI BIOS Setup 3-20
Page 59
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Audio Controller Enabled
Optimal Default, Failsafe Default
Disabled
South Bridge
Options summary:
Chapter 3 AMI BIOS Setup 3-21
Page 60
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Security
Change User/Supervisor Password
You can install a Supervisor password, and if you install a supervisor password, you can then install a user password. A user password does not provide access to many of the features in the Setup utility.
If you highlight these items and press Enter, a dialog box appears which lets you enter a password. You can enter no more than six letters or numbers. Press Enter after you have typed in the password. A second dialog box asks you to retype the password for confirmation. Press Enter after you have retyped it correctly. The password is required at boot time, or when the user enters the Setup utility.
Removing the Password
Highlight this item and type in the current password. At the next dialog
box press Enter to disable password protection.
Chapter 3 AMI BIOS Setup 3-22
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Quiet Boot Disabled
Enabled
Default
En/Disable showing boot logo.
Option ROM Messages Force BIOS
Default
Keep Current
Set display mode for Option ROM
Launch PXE OpROM Disabled
Default
Enabled
En/Disable Legacy Boot Option
Setup submenu: Boot
Options summary:
Chapter 3 AMI BIOS Setup 3-23
Page 62
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BBS Priorities
Chapter 3 AMI BIOS Setup 3-24
Page 63
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Setup submenu: Exit
Chapter 3 AMI BIOS Setup 3-25
Page 64
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Chapter
4
0BDriver
Installation
.
Chapter 4 Driver Installation 4 -1
Page 65
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The COM-BT comes with an AutoRun DVD-ROM that contains all
drivers and utilities that can help you to install the driver
automatically.
Insert the driver DVD, the driver DVD-title will auto start and show
the installation guide. If not, please follow the sequence below to
install the drivers.
Follow the sequence below to install the drivers:
Step 1 – Install Chipset Driver
Step 2 – Install VGA Driver
Step 3 – Install LAN Driver
Step 4 – Install xHCI Driver
Step 5 – Install Intel Sideband Fabric Device Driver
Step 6 – Install TPM Driver
Please read instructions below for further detailed installations.
Chapter 4 Driver Installation 4 -2
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4.1 Installation:
Insert the COM-BT DVD-ROM into the DVD-ROM drive. And install
the drivers from Step 1 to Step 6 in order.
Step 1 – Install Chipset Driver
1. Click on the Step 1 - Chipset folder and double click on the SetupChipset.exe file
2. Follow the instructions that the window shows
3. The system will help you install the driver automatically
Step 2 – Install VGA Driver
1. Click on the Step 2 - Graphics folder and select the OS
folder your system is
2. Double click on the Setup.exe file located in each OS
folder
3. Follow the instructions that the window shows
4. The system will help you install the driver automatically
Step 3 –Install LAN Driver
1. Click on the Step 3 - Network folder and select the OS
folder your system is
2. Double click on the 19.1_20140410.exe file located in
each OS folder
3. Follow the instructions that the window shows
4. The system will help you install the driver automatically
Chapter 4 Driver Installation 4 -3
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Step 4 –Install xHCI Driver
1. Click on the Step 4 - xHCI folder and double click on the Setup.exe file
2. Follow the instructions that the window shows
3. The system will help you install the driver automatically
Step 5 –Install Intel Sideband Fabric Device Driver
1. Click on the Step 5 - Intel Sideband Fabric Device folder double click on the Setup.exe file
2. Follow the instructions that the window shows
3. The system will help you install the driver automatically
Step 6 – Install TPM Driver
1. Click on the Step 6 - TPM folder and double click on the Setup.exe file
2. Follow the instructions that the window shows
3. The system will help you install the driver automatically
Chapter 4 Driver Installation 4 -4
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Appendix
A
Programming the
Watchdog Timer
Appendix A Programming the Watchdog Timer A-1
Page 69
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Table 1 : Embedded BRAM relative register table
Default Value
Note
Index
0x284(Note1)
BRAM Index Register
Data
0x285(Note2)
BRAM Data Register
Logical Device Number
0xA8(Note3)
Watch dog Logical Device Number
Function and Device Number
0x00(Note4)
Watch dog Function/Device Number
Table 2 : Watchdog relative register table
Option
Register
BitNum
Value
Note
Timer Counter
0x00(Note5)
(Note10)
Time of watchdog timer (0~255)
Counting Unit
0x01(Note6)
0(Note7)
0(Note11)
Select time unit. 0: second 1: minute
Watchdog RST
pulse width
0x01(Note8)
[3:2](Note9)
0(Note12)
0: 20ms 1: 60ms 2: 100ms 3: 250ms
A.1 Watchdog Timer Initial Program
Appendix A Programming the Watchdog Timer A-2
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************************************************************************************
// Embedded BRAM relative definition (Please reference to Table 1)
#define byte EcBRAMIndex //This parameter is represented from Note1 #define byte EcBRAMData //This parameter is represented from Note2 #define byte BRAMLDNReg //This parameter is represented from Note3 #define byte BRAMFnDataReg //This parameter is represented from Note4 #define void EcBRAMWriteByte(byte Offset, byte Value); #define byte EcBRAMReadByte(byte Offset); #define void IOWriteByte(byte Offset, byte Value); #define byte IOReadByte(byte Offset);
// Watch Dog relative definition (Please reference to Table 2)
#define byte TimerReg //This parameter is represented from Note5 #define byte TimerVal // This parameter is represented from Note10 #define byte UnitReg //This parameter is represented from Note6 #define byte UnitBit //This parameter is represented from Note7 #define byte UnitVal //This parameter is represented from Note11 #define byte RSTReg //This parameter is represented from Note8 #define byte RSTBit //This parameter is represented from Note9 #define byte RSTVal //This parameter is represented from Note12
************************************************************************************
Appendix A Programming the Watchdog Timer A-3
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************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig
// (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute).
AaeonWDTConfig();
// Procedure : AaeonWDTEnable
// This procudure will enable the WDT counting.
AaeonWDTEnable(); }
************************************************************************************
Appendix A Programming the Watchdog Timer A-4
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************************************************************************************
// Procedure : AaeonWDTEnable
VOID AaeonWDTEnable (){
WDTEnableDisable(1); }
// Procedure : AaeonWDTConfig
VOID AaeonWDTConfig (){
// Disable WDT counting
WDTEnableDisable(0);
// WDT relative parameter setting
WDTParameterSetting();
}
VOID WDTEnableDisable(byte Value){ ECBRAMWriteByte(TimerReg , Value); }
VOID WDTParameterSetting(){ Byte TempByte;
// Watchdog Timer counter setting
ECBRAMWriteByte(TimerReg , TimerVal); // WDT counting unit setting
TempByte = ECBRAMReadByte(UnitReg);
TempByte |= (UnitVal << UnitBit);
ECBRAMWriteByte(UnitReg , TempByte);
// WDT RST pulse width setting
TempByte = ECBRAMReadByte(RSTReg);
TempByte |= (RSTVal << RSTBit);
ECBRAMWriteByte(RSTReg , TempByte); }
************************************************************************************
Appendix A Programming the Watchdog Timer A-5
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************************************************************************************
VOID ECBRAMWriteByte(byte OPReg, byte OPBit, byte Value){ IOWriteByte(EcBRAMIndex, 0x10);
IOWriteByte(EcBRAMData, BRAMLDNReg);
IOWriteByte(EcBRAMIndex, 0x11);
IOWriteByte(EcBRAMData, BRAMFnDataReg);
IOWriteByte(EcBRAMIndex, 0x13 + OPReg);
IOWriteByte(EcBRAMData, Value);
IOWriteByte(EcBRAMIndex, 0x12);
IOWriteByte(EcBRAMData, 0x30); //Write start }
Byte ECBRAMReadByte(byte OPReg){ IOWriteByte(EcBRAMIndex, 0x10);
IOWriteByte(EcBRAMData, BRAMLDNReg);
IOWriteByte(EcBRAMIndex, 0x11);
IOWriteByte(EcBRAMData, BRAMFnDataReg);
IOWriteByte(EcBRAMIndex, 0x12);
IOWriteByte(EcBRAMData, 0x10); //Read start
IOWriteByte(EcBRAMIndex, 0x13 + OPReg);
Return IOReadByte(EcBRAMData, Value); }
************************************************************************************
Appendix A Programming the Watchdog Timer A-6
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Appendix
B
I/O Information
Appendix B I/O Information B - 1
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B.1 I/O Address Map
Appendix B I/O Information B - 2
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B.2 Memory Address Map
B.3 IRQ Mapping Chart
Appendix B I/O Information B - 3
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Appendix B I/O Information B - 4
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Appendix B I/O Information B - 5
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Appendix B I/O Information B - 6
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Appendix B I/O Information B - 7
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Appendix B I/O Information B - 8
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Appendix B I/O Information B - 9
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Appendix
C
Programming
the Digital I/O
Appendix C Programming the Digital I/O C - 1
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C.1 DIO Programming
COM-BT utilizes ITE8518 chipset as its Digital I/O controller.
Below are the procedures to complete its configuration which you
can develop customized program to fit your application.
Appendix C Programming the Digital I/O C - 2
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Table 1 : Embedded BRAM relative register table
Default Value
Note
Index
0x284(Note1)
BRAM Index Register
Data
0x285(Note2)
BRAM Data Register
Logical Device Number
0xA2(Note3)
Watch dog Logical Device Number
Input/Output
Function and Device Number
0x00(Note4)
DIO Input/Output Function/Device Number
Output Data
Function and Device Number
0x01(Note5)
DIO Output Data Function/Device Number
Table 2 : Digital I/O relative register table
Register
Option Register
BitNum
Value
Note
GPI0 Pin Status
0x00(Note6)
0(Note7)
(Note15)
GPA2
GPI1 Pin Status
0x00(Note6)
1(Note8)
(Note16)
GPA3
GPI2 Pin Status
0x00(Note6)
2(Note9)
(Note17)
GPA4
GPI3 Pin Status
0x00(Note6)
3(Note10)
(Note18)
GPA5
GPO0 Pin Status
0x00(Note6)
4(Note11)
(Note19)
GPJ0
GPO1 Pin Status
0x00(Note6)
5(Note12)
(Note20)
GPJ1
GPO2 Pin Status
0x00(Note6)
6(Note13)
(Note21)
GPJ2
GPO3 Pin Status
0x00(Note6)
7(Note14)
(Note22)
GPJ3
D.2 Digital I/O Register
Appendix C Electrical Specification for I/O Ports C - 3
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D.3 Digital I/O Sample Program
************************************************************************************
// Embedded BRAM relative definition (Please reference to Table 1)
#define byte EcBRAMIndex //This parameter is represented from Note1 #define byte EcBRAMData //This parameter is represented from Note2 #define byte BRAMLDNReg //This parameter is represented from Note3 #define byte BRAMFnData0Reg //This parameter is represented from Note4 #define byte BRAMFnData1Reg //This parameter is represented from Note5 #define void EcBRAMWriteByte(byte Offset, byte Value); #define byte EcBRAMReadByte(byte Offset); #define void IOWriteByte(byte Offset, byte Value); #define byte IOReadByte(byte Offset);
// Digital Input Status relative definition (Please reference to Table 2)
#define byte DIO0ToDIO7Reg // This parameter is represented from Note6 #define byte DIO0Bit // This parameter is represented from Note7 #define byte DIO1Bit // This parameter is represented from Note8 #define byte DIO2Bit // This parameter is represented from Note9 #define byte DIO3Bit // This parameter is represented from Note10 #define byte DIO4Bit // This parameter is represented from Note11 #define byte DIO5Bit // This parameter is represented from Note12 #define byte DIO6Bit // This parameter is represented from Note13 #define byte DIO7Bit // This parameter is represented from Note14 #define byte DIO0Val // This parameter is represented from Note15 #define byte DIO1Val // This parameter is represented from Note16 #define byte DIO2Val // This parameter is represented from Note17 #define byte DIO3Val // This parameter is represented from Note18 #define byte DIO4Val // This parameter is represented from Note19 #define byte DIO5Val // This parameter is represented from Note20 #define byte DIO6Val // This parameter is represented from Note21 #define byte DIO7Val // This parameter is represented from Note22
************************************************************************************
Appendix C Programming the Digital I/O C - 4
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************************************************************************************
VOID Main(){ Boolean PinStatus ;
// Procedure : AaeonReadPinStatus
// Input : // Example, Read Digital I/O Pin 3 status
// Output :
// InputStatus :
// 0: Digital I/O Pin level is low
// 1: Digital I/O Pin level is High PinStatus = AaeonReadPinStatus(DIO0ToDIO7Reg, DIO3Bit);
// Procedure : AaeonSetOutputLevel
// Input : // Example, Set Digital I/O Pin 6 level
AaeonSetOutputLevel(DIO0ToDIO7Reg, DIO6Bit, DIO6Val); }
************************************************************************************
Appendix C Electrical Specification for I/O Ports C - 5
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************************************************************************************
Boolean AaeonReadPinStatus(byte OptionReg, byte BitNum){ Byte TempByte;
TempByte = ECBRAMReadByte(BRAMFnData1Reg, OptionReg); If (TempByte & BitNum == 0) Return 0; Return 1; } VOID AaeonSetOutputLevel(byte OptionReg, byte BitNum, byte Value){ Byte TempByte;
TempByte = ECBRAMReadByte(BRAMFnData1Reg, OptionReg); TempByte |= (Value << BitNum);
ECBRAMWriteByte(OptionReg, BitNum, Value); }
************************************************************************************
Appendix C Programming the Digital I/O C - 6
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************************************************************************************
VOID ECBRAMWriteByte(byte OPReg, byte OPBit, byte Value){ IOWriteByte(EcBRAMIndex, 0x10);
IOWriteByte(EcBRAMData, BRAMLDNReg);
IOWriteByte(EcBRAMIndex, 0x11);
IOWriteByte(EcBRAMData, BRAMFnDataReg);
IOWriteByte(EcBRAMIndex, 0x13 + OPReg);
IOWriteByte(EcBRAMData, Value);
IOWriteByte(EcBRAMIndex, 0x12);
IOWriteByte(EcBRAMData, 0x30); //Write start }
Byte ECBRAMReadByte(byte FnDataReg, byte OPReg){ IOWriteByte(EcBRAMIndex, 0x10);
IOWriteByte(EcBRAMData, BRAMLDNReg);
IOWriteByte(EcBRAMIndex, 0x11);
IOWriteByte(EcBRAMData, FnDataReg);
IOWriteByte(EcBRAMIndex, 0x12);
IOWriteByte(EcBRAMData, 0x10); //Read start
IOWriteByte(EcBRAMIndex, 0x13 + OPReg);
Return IOReadByte(EcBRAMData, Value); }
************************************************************************************
Appendix C Electrical Specification for I/O Ports C - 7
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