
GENERAL DESCRIPTION
C
USTOMER
P
ROCUREMENT SPECIFICATION
Z86E23
CMOS Z8® OTP
ICROCONTROLLER
M
CPS DC-4060-06
Z86E23
The Z86E23 microcontroller introduces the next level of
sophistication to single-chip architecture. The Z86E23 is
a member of the Z8 single-chip microcontroller family with
8 Kbytes of EPROM and 236 bytes of general-purpose
RAM.
The Z86E23 is a pin compatible, One-Time-Programmable
(OTP) version of the Z8614 and Z8602 Keyboard Controller (KBC).
Zilog’s CMOS microcontroller offers fast execution, efficient use of memory, sophisticated interrupts, input/output
bit manipulation capabilities, and easy hardware/software
system expansion along with low cost and low power
consumption.
The Z86E23 architecture is based on Zilog’s 8-bit
microcontroller core. The device offers a flexible I/O
scheme, an efficient register and address space structure,
and a number of ancillary features that are useful in many
industrial and advanced scientific applications.
There are two basic address spaces available to support
this wide range of configurations: program memory and
236 general-purpose registers.
To unburden the program from coping with real-time
problems such as counting/timing, the Z86E23 offers two
on-chip counter/timers with a large number of user selectable modes (Block Diagram).
Notes:
All Signals with a preceding front slash, “/”, are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection Circuit Device
Power V
Ground GND V
CC
V
DD
SS
DC-4060-06 (3-22-94)
1

GENERAL DESCRIPTION (Continued)
CPS DC-4060-06
Z86E23
Output Input
Port 3
Counter/
Timers (2)
Interrupt
Control
Vcc GND
ALU
FLAGS
Register
Pointer
Register File
256 x 8-Bit
/RESETXTAL
Machine Timing and
Instruction Control
Prg. Memory
8192 x 8-Bit
Program
Counter
Port 2
I/O
(Bit Programmable)
Port 0
44
I/O
(Nibble Programmable)
Output Open Drain
Functional Block Diagram
Port 1
8
I/O
(Byte Programmable)
Output Open Drain
2

CPS DC-4060-06
Z86E23
VCC
NC
XTAL1
NC
/CE
/RESE
R//W*
/DS*
VPP
NC
GND
EPM
A0
A1
A2
A3
A5
A6
A7
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
15
16
17
18
19
20
Z86E23
DIP
40
39
38
37
36
35
34
33
32
31
30
29
28
2714
26
25
24
23
22
21
NC
/OE
/PGM
NC
NC
A12
A11
A10
A9
A8
GND†
NC
D7
D6
D5
D4
D3
D2
D1
D0
40-Pin DIP Pin Assignments
3

PIN DESCRIPTIONS
/RESET
R//W*
/DS*
GND†
P35
GND
P32
P00
P01
P02
R/RL
NC
P30
P37
XTAL1
6543214443424140
7
8
9
10
11
12
13
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
VCC
XTAL2
Z86E23
PLCC
P36
P31
P27
P26
P25
39
38
37
36
35
34
33
32
31
30
29
CPS DC-4060-06
Z86E23
NC
P24
P23
P22
P21
P20
P33
P34
P17
P16
P15
P03
P04
P05
P06
P07
P10
P11
P12
P13
44-Pin PLCC Pin Assignments
P14
NC
4

ABSOLUTE MAXIMUM RATINGS
CPS DC-4060-06
Z86E23
Symbol Description Min Max Units
V
CC
T
STG
T
A
Notes:
* Voltages on all pins with respect to GND.
13.0 V Maximum on P33-P30.
† See Ordering Information
Supply Voltage* –0.3 +7.0 V
Storage Temp –65 +150 C
Oper Ambient Temp † C
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (Standard
Test Load).
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; operation of the device at
any condition above those indicated in the operational
sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for an extended period may affect device reliability.
+5V
1.0 kΩ
From Output
Under Test
150 pF
2.3 kΩ
Test Load Diagram
5

DC CHARACTERISTICS
VCC = 4.5 V to 5.5V @ 0°C to +70°C
Sym Parameter Min Max Typ* Unit Condition
CPS DC-4060-06
Z86E23
V
CH
V
CL
V
IH
V
IL
V
RH
V
RL
V
OH
Clock Input High Voltage 3.8 V
Clock Input Low Voltage –0.3 0.8 V Driven by External Clock Generator
Input High Voltage 2.0 V
Input Low Voltage –0.3 0.8 V
Reset Input High Voltage 3.8 V
Reset Input Low Voltage –0.3 0.8 V
Output High Voltage 2.0 V I
Output High Voltage 2.4 V I
V
OL
I
IL
I
OL
I
IR
I
CC
Notes:
* Typical @ 25°C
1. A combined total of six I/O pins from Ports 2 and 3 may be used to sink
10 mA each at 0.8V V
for LEDs or as general-purpose outputs requiring high sink current.
Output Low Voltage 0.8 V IOL= +4.0 mA (See Note (1) below.)
Input Leakage –10 10 µAV
Output Leakage –10 10 µAV
Reset Input Current –50 µAV
V
Supply Current 50 25 mA
CC
(max. three pins per port). These may be used
OL
CC
CC
CC
V Driven by External Clock Generator
V
V
= –250 µA (Port 2 only)
OH
= –250 µA (Port 3 only)
O H
= 0V, 5.5V
IN
= 0V, 5.5V
IN
= 0V, 5.5V
IN
© 1994 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
6
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agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
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Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056