ZETEX ZXRD1000 Technical data

查询ZXM64N02X供应商

HIGH EFFICIENCY SIMPLESYNC PWM DC-DC CONTROLLERS

DESCRIPTION

The ZXRD1000 series provides complete control and
protection functions for a high efficiency (> 95%) DC-DC
converter solution. The choice of external MOSFETs allow
the designer to size devices according to ap plication. The
ZXRD1000 series uses advanced DC-DC converter
techniques to provide synchronous drive capability, using
innovative circuits that allow easy and cost effective
implementation of shoot through protection. The

FEATURES

• > 95% Efficiency

• Fixed frequency (adjustable) PWM

• Voltage mode to ensure excellent stability &

transient response

• Low quiescent current in shutdown mode,15µA

• Low battery flag

• Output down to 2.0V

• Overload protection

• Demonstration boards available

• Synchronous or non-synchronous operation

• Cost effective solution

• N or P channel MOSFETs

• QSOP16 package

ZXRD1000 SERIES

ZXRD1000 series can be used with an all N channel
topology or a combination N & P channel topology.
Additional functionality includes shutdown control, a
user adjustable low battery flag and simple
adjustment of the fixed PWM switching frequency.
The controller is available with fixed outputs of 5V or

3.3V and an adjustable (2.0 to 12V) output.

• Fixed 3.3, 5V and adjustable outputs

• Programmable soft st art

APPLICATIONS

• High efficiency 5 to 3.3V converters up to 4A

• Sub-notebook comp ut er s

• Embedded proce s s or power supply

• Distributed power supply

• Portable in s t ruments

• Local on card conversion

• GPS systems

Very high efficiency SimpleSyncTM converter.

V

CC

4.5-10V

330pF

C3

IC1

13

V

IN

GNDG

V

DRIVE

Bootstrap

R

SENSE+

R

SENSE -

Comp

PWR

ND

34

2

1

7

C6
1µF

8

16

V

FB

15

CX1

R2

0.022µF

680R

C7

22µF

9

SHDN

C5

LB

SET

1µF

11

LBF

14

Delay

10

Decoup

6

V

INT

5

C

T

1µF
C4

R3
3k

Shut Down

Low input flag

68µF

R1
100k

C

IN

C2

C1

1µF

1µF

ISSUE 4 - OCTOBER 2000

D2
BAT54

ZXM64N02X

C11
1µF

N2

ZXM64N02X

N1

L1
15µH

Fx

C8

D1

2.2µF

ZHCS1000

R

0.01R

SENSE

R6

Cx2

10k

0.01µF

x2
680µF

R5
6k

C

OUT

120µF

V

3.3V 4A

OUT

C9
1µF

C10

1µF

RX
2k7

R4

D3

10k

BAT54

1

ZXRD1000 SERIES

ABSOLUTE MAXIMUM RATINGS

Input without bootstrap (P suffix) 20V
Input with bootstrap(N suffix) 10V
Bootstrap voltage 20V
Shutdown pin V
LB

pin V

SET

IN
IN

R

SENSE

+, R

SENSE -

V

IN

Power dissipation 610mW (Note 4)
Operating temperature -40 to +85°C
Storage temperature -55 to +125°C

ELECTRICAL CHARACTERISTICS
TEST CONDITIONS (Unless otherwise stated) T

Symbol Parameter Conditions Min Typ Max Unit

V

IN(min)

V

FB

(Note 1)

T

DRIVE

I

CC

f

osc

(Note 5)

f

osc(tol)

DC

MAX

V

RSENSE

V

CMRSENSE

LBF

SET

LBF

OUT

LBF

HYST

LBF

SINK

V

SHDN

I

SHDN

Min. Operating Voltage No Output Device 4.5 V
Feedback Voltage V

=5V,IFB=1mA 1.215 1.24 1.265 V

IN

4.5<V
50µA<I

Gate Output Drive Capability CG=2200pF(Note 2)

=1000pF

C

G

= 4.5V to maximim

V

IN

supply (Note 3)
Supply Current VIN=5V 1620mA
Shutdown Current V

SHDN

Operating frequency range
Frequency with timing capacitor C3=1300pF

=330pF

C

3

Oscillator Tol.
Max Duty Cycle N Channel

P Channel
R

voltage differentia l -40 to +85°C 50 mV

SENSE

Common mode range of V

RSENSE

-40 to +85°C 2 V
Low Battery Flag set voltage 1.5 V
Low Battery Flag output Active Low 0.2 0.4 V
Low Battery Fla g Hystere sis 10 20 50 mV
Low Battery Flag Sink Current -40 to +85°C 2 mA
Shutdown Threshold Voltage Low(off)

High(on) 1.5

Shutdown Pin Source Current 10

=25°C

amb

<18V 1.213 1.24 1.267 V

IN

<1mA,VIN=5V

FB

1.215 1.24 1.265 V
60

35

= 0V;VIN=5V 15 50

50

300 kHz
50
200

±25

15
0

94

100%%

IN
IN

0.25 V

ns
ns

µA

%

V
V

V
µA

Note 1. V

has a different function between fixed and adjustable controller options.

FB

Note 2. 2200pF is the maximum recommended gate capacitance.
Note 3. Maximum supply for P phase controllers is 18V,maximum supply for N phase controllers is 10V.
Note 4. See V

derating graph in Typical Characteristics.

IN

Note 5. The maximum frequency in this application is 300kHz. For higher frequency operation contact Zetex
Applications Department.

2

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

TYPICAL CHARACTERISTICS

202

201

200

(kHz)

199

OSC

F

198

197

4681012141618

VIN(V)

FOSC v VIN

1.244

1.242

(V)

1.24

FB

V

1.238

1.236

4681012141618

VIN (V)

VFB v VIN

C3=330pF

OUT

V

=3.3V

210

205

(kHz)

200

OSC

F

195

190

20

-40 -20 0 20 40 60 80 100

VIN=5V
C3=330pF

Temperature (°C)

FOSC v Temperature

1.25

VIN=5V

OUT

=3.3V

1.245

(V)

FB

V

1.235

20

V

1.24

1.23

-40 -20 0 20 40 60 80 100

Temperature (°C)

VFB v Temperature

1.02

SET

1.01

1.00

Normalised LB

0.99
4681012141618

Normalised LBSET v VIN

ISSUE 4 - OCTOBER 2000

VIN (V)

VIN=5V

1.005

SET

1.000

Normalised LB

0.995

20

-40 -20 0 20 40 60 80 100

Temperature (°C)

Normalised LBSET v Temperature

3

ZXRD1000 SERIES

TYPICAL CHARACTERISTICS

30

25

20

15

Supply Current (mA)

10

20

VIN(V)

Supply Current v V

IN

N Phase Device

300

200

(kHz)

OSC

F

100

0
100pF

1nF 10nF

Ti ming Capacitance

OSC

F

v Capacitance

Vin=5V

30

25

20

15

Supply Current (mA)

10

4 6 8 101214 1618

VIN(V)

Supply Current v V

P Phase Device

5

4

3

2

Current Lim i t (A )

1

0

0

VIN=5V

OUT=3.3V

V

10 20 30 40 50

RSENSE (m⍀)

Current Limit v R

204681012141618

IN

SENSE

20

15

(V)

IN

10

V

5

-40 -20 0 20 40 60 80 100

Temperature (°C)

VINDerating v Temperature

CG=2200pF

4

ISSUE 4 - OCTOBER 2000

DETAILED DESCRIPTION

The ZXRD1000 series can be configured to use either
N or P channel MOSFETs to suit most applications.
The most popular format, an all N channel
synchronous solution gives the optimum efficiency. A
feature of the ZXRD1000 series solution is the unique
method of ge nerating the synchronous driv e, called
SimpleSync . Most solutions use an additional
output from the controller, inverted and d elayed fr om
the main switch drive. The ZXRD1000 series solution
uses a simple overwindin g on the main ch oke (wound
on the same core at no real cost penalty) plus a small
ferrite bead . This means that the synchronous FET is
only enhanced when the main FET is turned off. This
reduces the ‘blanking period’ required for shoot­through protection, increasing efficiency and al lowing
smaller catch diodes to be used, making the controller
simpler and less costly by avoiding complex timing
circuitry. Included on chip are numerous f unctions that
allow flexibility to suit most applications. The nominal
switching frequency (200kHz) can be adjusted by a
simple timing capacitor, C3. A low battery detect circuit
is also provided. Off the shelf components are available
from major manufacturers such as Sumida to provide
either a single winding inductor for non-synchronous
applications or a coil with an over-winding for
synchronous applications. The combination of these
switching characteristics, innovative circuit design an d
excellent user flexibility, make the ZXRD1000 series
DC-DC solutions some of the smallest and most cost
effective and electrically efficient currently available.
Using Zetex’s HDMOS low R
for the main and synchronous switch, efficiency can
peak at upto 95% and remains high over a wide range
of operating currents. Programmabl e soft start can also be
adjusted via the capacitor, C7, in the compensation loop.

devices, ZXM64N02X

DS(on)

What is SimpleSyncTM?

Conventional Methods

In the conventional approach to the synchronous
DC-DC solution, much care has to be taken with the
timing constraints between the mai n and synchronous
switching devices. Not only is this dependent upon
individual MOSFET gate threshol ds (whic h vary from
device to device within data sheet limits and over
temperature), but it is also somewhat dependent upon
magnetics, layout and other parasitics. This normally
means that significant ‘dead time’ has to be factored
in to the design between the main and synchronous
devices being turned off and on respectively.
Incorrect application of dead time constraints can
potentially lead to catastrophic short circuit conditions
between V

and GND. For some battery operated

IN

ZXRD1000 SERIES

systems this can not only damage MOSFETs, but also
the battery itself. To realise correct ‘dead time’
implementation takes complex circuitry and hence
implies additional cost.

The ZETEX Meth od

Zetex has taken a different approach to solving these
problems. By looking at the basic architecture of a
synchronous converter, a nov el approach usin g the
main circuit inductor was developed. By taking the
inverse waveform found at the input to the main
inductor of a non-synchronous solution, a
synchronous drive waveform can be generated that is
always relative to the main drive waveform and
inverted with a small delay. This waveform can be
used to drive the synchronou s switch which means no
complex circuitry in the IC need be used to allow for
shoot-through protection.

Implementation

Implementation was very easy and low cost. It simply
meant peeling off a strand of the main inductor
winding and isolating it to form a coupled secondary
winding. These are available as standard items
referred to in the applications circuits parts list.The use
of a small, surface mount, inexpensive ’square loop’
ferrite bead provides an excellent method of
eliminating shoot-through due to variation in gate
thresholds. The bead essentially acts as a high
impedance for the few nano seconds that
shoot-through would normally occur. It saturates very
quickly as the MOSFETs attain steady state o peration,
reducing the bead impedance to virtually zero.

Benefits

The net result is an innovative solution that gives
additional benefits whilst lowering overall
implementation costs. It is also a technique that can
be simply omitted to make a non-synchronous
controller, saving further cost, at the expense of a few
efficiency points.

ISSUE 4 - OCTOBER 2000

5

ZXRD1000 SERIES

Functional Block Diagram

PIN DESCRIPTIONS ‡ See relevant Applications Section

Pin No. Name Description
1 Bootstrap Bootstrap circuit for generating gate drive
2V

DRIVE

3PWRG
4G
5C
6V
7R
8R
9

ND
T
INT
SENSE+
SENSE-

SHDN Shutdown control. Active low.
10 Dec o up Optional short circuit and overloa d decoupling capaci tor for increased accurac y
11
12 LB

13 V

LBF Low battery flag output. Active low, open collector output

SET

IN

14 Delay External R and C to set the desired cycle time for hiccup circuit. ‡
15 Comp Compensation pin to allow for stability components and soft start. ‡
16 V

FB

Output to the gate drive circuit for main N/P channel switches
Power ground

ND

Signal ground
Timing Capacitor sets oscillator frequency. ‡
Internal Bias Circuit. Decouple with 1µF ceramic capacitor
Higher potential input to the current sense for current limit circuit
Lower potential input to the current sense for current limit circuit

Low battery flag set. Can be connected to VIN if unused, or threshold set
via potential divider. ‡

Input Voltage

Feedback Voltage. This pin has a different function between fixe d and
adjustable controller options. The appropriate controller must be used for
the fixed or adjustable solution. Connect to V
potential divider for adjustable output. ‡

for fixed output, or to

OUT

6

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Applications

Note: Component names refer to designators shown
in the application circuit diagrams.

Output Capacitors

Output capacitors are a critical choice in the overall
performance of the solution. T hey are required to filter
the output and supply load transi ent curren t. They are
also affected by the switching frequency, ripple
current, di/dt and magnitude of transient load current.
ESR plays a key role in determining the value of
capacitor to be used. Combination of both high
frequency, low value ceramic capacitors and low ESR
bulk storage capacitors optimised for switching
applications provide the best response to load
transients and ripple requirements. Electrolytic
capacitors with low ESR are larger and more
expensive so the ultimate choice is always a
compromise between size, cost and performance.
Care must also be taken to ensure that for large
capacitors, the ESL of the leads does not become an
issue. Excellent low ESR tantalum or electrolytic
capacitors are available from Sanyo OS-CON, AVX,
Sprague and Nichicon.

The output capacitor will also affect loop stability,
transient performance. The capacitor ESR should
preferably be of a similar value to the sense resistor.
Parallel devices may be required.

I

RIPPLE(RMS)

=

0.29 V

OUT

L f V

(VIN−V

where L= output filter inductance
f= switching frequency

For output vol t a ge ripple it is neces s a ry to know the
peak ripple current which is given by:

V

( VIN− V

I

pk−pk

=

OUT

L f V

OUT)

IN

Voltage ripple is then:­V

= I

−

RIPPLE

∗ ESR

pk

pk

)

OUT

IN

Input Capacitors

The input capacitor is chosen for its RMS current and
voltage rating. The use of low ESR electrolytic or
tantalum capacitors is recommended. Tantalum
capacitors should have their voltage rating at 2V
(max), electrolytic at 1.4VIN(max). I

can be

RMS

approximated by:

I

RMS

= I

OUT

(V

OUT(VIN−VOUT

V

))

IN

√

Underspecification of this parameter can affect long
term reliability. An additonal ceramic capacitor should
be used to provide high frequency decoupling at V

IN.

Also note that the input capacitance ESR is effectively in
series with the input and hence contributes to efficiency
losses related to I

2

* ESR of the input capacitor.

RMS

MOSFET Selection

The ZXRD1000 family can be configured in circuits
where either N or P channel MOSFETs are employed
as the main switch. If an N channel device is used, the
corresponding N phase controller must be chosen.
Similarly, for P channel main switch a P phase
controller must be used. The ordering information has
a clear identifier to distinguish between N and P phase
controllers.

The MOSFET selection is subject to thermal and gate
drive considerations. Care also has to be taken to allow
for transition losses at high input voltages as well as
R

losses for the main MOSFET. It is

DS(ON)

recommended that a device with a drain source
breakdown of at least 1.2 times the maximum V
should be used.

For optimum efficiency , two N channel low R

DS(on)

devices are required. MOSFETs should be selected
with the lowest R

consistent with the output

DS(ON)

current required. As a guide, for 3-4A output, <50mΩ
devices would be optimum, provided the devices are
low gate threshold and low gate charge. Typically look
for devices that will be fully enhanced with 2.7V V

GS

for 4-5A capability.
Zetex offers a range of low R

logic level MOSFETs

DS(ON)

which are specifically designed with DC-DC power
conversion in mind. Packaging includes SOT23,
SOT23-6 and MSOP8 options. Ideal examples of
optimum devices would be Zetex ZXM64N03X and
ZXM64N02X (N channel). Contact your local Zetex office
or Zetex web pag e for further information.

IN

IN

ISSUE 4 - OCTOBER 2000

7

ZXRD1000 SERIES

Applications (continued)
Inductor Selection

The inductor is one of the most critical componen ts in
the DC-DC circuit.There are numerous types of devi ces
available from many suppliers. Zetex has opted to
specify off the shelf encapsulated surface mount
components, as these represent the best compromi se
in terms of cost, size, performance and shielding.

The SimpleSync
with an overwinding for the gate drive which is
available as a standard part. However, for engineers
who wish to design their own custom magnetics, this
is a relatively simple and low cost construction
technique. It is simply forme d by terminating on e of
the multiple strands of litz type wire separ ately. It is
still wound on the same core as the main winding and
only has to handle enough current to charge the gate
of the synchronous MOSFET. The major benefit is
circuit simplification and hence lower cost of the co ntrol
IC. For non-synchronous operation, the overwinding is
not required.

The choice of core type also plays a key role. For
optimum performance, a ’swinging choke’ is often
preferred. This is one which exhibits an increase in
inductance as load current decreases. This has the net
effect of reducing circulating current at lighter load
improving efficiency. There is normally a cost
premium for this added benefit. For this reason the
chokes specified are the more usual constant
inductance type.

Peak current of the inductor should be rated to
minimum 1.2I
winding resistance of the main inductor should be less
than the main switch output on resistance.

Schottky Diode

Selection depends on whether a synchronous or
non-synchronous approach is taken. For the
ZXRD1000, the unique approach to the synchronous
drive means minimal dead time and hence a small
SOT23 1A DC rated device will suffice, such as the
ZHCS1000 from Zetex. The device is o nly d esigned to
prevent the body diode of the synchronous MOSFET
from conducting dur i ng the initial swit c hing transient
until the MOSFET takes over. The device should be
connected as close as possible to the source terminals
of the main MOSFET.

For non-synchron ous applications , t he Schottky diode
must be selected to allow for the worst case

TM

technique uses a main inductor

(max) . To maximise efficiency, the

OUT

conditions, when V

is at its highest and V

IN

OUT

is
lowest (short circuit conditions for example). Under
these conditions the device must handle peak current
at close to 100% duty cycle.

Frequency Adjustment

The nominal runnin g frequency of th e controll er is set
to 200kHz in the applications shown. This can be
adjusted over the range 50kHz to 300kHz by changing
the value of capacitor on the C

pin. A low cost

T

ceramic capacitor can be used.
Frequency = 60000/C3 (pF)
Frequency v temperature is given in the typical
characteristics.

Output Voltage Adjustment

The ZXRD1000 is available as either a fixed 5V, 3.3V or
adjustable output. On fixed output versions, the V
should be connected to the o utput. Adjustable operation
requires a resistive divider connected as fo llows:

The value of the output voltage is determined by the
equation

R

V

OUT

= VFB (1 +

A

V

=1.24V

)

R

FB

B

Note: The adjustable circuit is shown in the following
transient optimisat ion sect ion. It is also used in t he
evaluation PCB. In both t hese circuit s R
the label R6 and R

the label R5.

B

A

Values of resist or should be between 1k and 20k to
guarantee operation. Output voltage can be adjusted in
the range 2V to 12V for non-synchronous ap plications.
For synchronous applications, the minimum V
by the V
MOSFET, as the swing in the gate using the
SimpleSync

threshold required for the synchronous

GS

TM

technique is approximately V

pin

FB

is assigned

is set

OUT

.

OUT

8

ISSUE 4 - OCTOBER 2000

Applications (continued)

ZXRD1000 SERIES

Low Battery Flag

The low battery flag threshold can be set by the user
to trip at a level determined by the equation:

R

V

LBSET

= 1.25

C

1 +

)

(

R

D

RD is recommended to be 10k where RC and RD are
connected as follows:

Hysteresis is typically 20mV at the LB

SET

pin.

Current Limit

A current limit is set by the low value resistor in the
output path, R
overload current limit, it does not need to be accurate
and can hence be a low cost device.

The value of the current limit is set by using the
equation:

I

LIM

(A) =

A graph of Current Limit v R
typical characteristics. This should assist in the
selection of R

If desired, R
When used on the input side R

with the upper output device (i.e. in series with the
drain or source in N and P channel solutions
respectively).Typically in this configuration R
be 20m⍀.

. Since the resistor is only used for

SENSE

50(mV)

R

(mΩ)

SENSE

is shown in the

SENSE

appropriate to application.

SENSE

can also be on the input supply side.

SENSE

should be in series

SENSE

SENSE

will

Hiccup Time Constant

The hiccup circuit (at the ’delay’ pin) provides overload
protection for the soluti on. The threshold of the hiccup
mode is determined by the value of R

SENSE,

When
>50mV is developed across the sense resistor, the
hiccup circuit is triggered, inhibiting the device.

It will stay in this state depending upon the time
constant of the resistor and capacitor connected at the
’delay’ pin. In order to keep the dissipation down
under overload conditions it is recommended the
circuit be off for approximately 100ms. If for other
application reasons this is too long an off period, this
can be reduced at least by 10:1, care needs to be taken
that any increased dissipation in the external MOSFET
is still acceptable. The resistor capacitor combination
R1,C1 recommended in the applications circuits
provides a delay of 100ms.

Soft Start & Loop Stability

Soft start is determined by the time constant of the
capacitor and resistor C7 and R3. Typically a good
starting point is C7 = 22µF and R3 = 24k for fixed
voltage variants. For fully adjustable variants see
Optimising for Transient Response later in the
applicati ons sec ti on . This net wor k al so he lps prov i de
good loop stability.

Low Quiescent Shutdown

Shutdown control is provided via the SHDN pin,
putting the device in to a low quiescent sleep mode.
In some circumstances where rapid sequencing of V
can occur (when VCC is turned off and back on) and V
has a very rapid rise time (100-200ms) timing conflicts
can occur.

CC
CC

ISSUE 4 - OCTOBER 2000

9