Yamaha YDA163C User Manual

YDA163C

D-515D

DIGITAL INPUT STEREO 20W DIGITAL AUDIO POWER AMPLIFIER

■ Overview

YDA163C(D-515D) is a high-performance digital audio amplifier IC that delivers up to 20W×2ch, which

*1)

has a digital audio interface, and is capable of operating at a supply voltage ranging from 5V

YDA163C, having Yamaha original “Pure Pulse Direct Speaker Drive Circuit,” allows a speaker to be

directly connected to the output. In addition, this amplifier is insusceptible to supply voltage fluctuation

because of a feedback-type digital amplifier, and have the feature with high power supply noise tolerance.

As a result, power supply can be simplified and allowing a simple amplifier system with less external

components to be configured. YDA163C has the following functions: power limit function, pop noise

reduction function, overcurrent protection function for speaker output pins, internal overtemperature

protection function, under voltage lockout, and DC detection function. And, YDA163C supports power

MUTEN

SLEEPN

PLIMIT

MONO

CKMOD

HOPP

MCK

SCLK

LRCLK

SDATA

=8Ω, Mode:7).

YDA163C

Digital Control DEM DAC

Control

I/F

Digital I/F

32kHz

44.1kHz 48kHz

VREF

DC Cut Filter

Power Limitter

3.3V

DVDD

10Hz

2.5W to 15W

8Levels

Volume

Over Sampling

x4 FS

+6dB

-6dB

0dB

3.4V Regulator

Lch.

Dynamic

Element

Matching

(16 Levels)

Rch.

AVSS DVSS

5V*1～ 18V

PVDDxx

Class-

Protection

OCP

OTP DCOP UVLO

Class-

PVSSx

REFA

Lch

4～Ω

PROTN

Rch

4～Ω

limit setting of 3W (R

GAIN[1:0]

(Note) *1: When operating at less than 8V (V

), an 8Ω or more load must be used.

DDP

to 18V.

YDA163C CATALOG

CATALOG No. LSI-4DA163C20

2011.1

■ Features YDA163C

■ Features

・Supply Voltage Range V

DDP

*1)

to 18V

3.0V to 3.6V

・Input Digital Audio Interface (Stereo)

Sampling Frequency: 32kHz, 44.1kHz, 48kHz

Left-justified, MSB first, 1-bit delay, Digital Audio Data 24-bits ・Max. Instantaneous Output 15W×2ch (V

10W×2ch (V

20W×2ch (V

*2)

・Max. Continuous Output 15W

×2ch (V

*2)

10W

×2ch (V

・Distortion Ratio (THD+N) 0.05% (V ・Residual Noise 50μVrms (V ・S/N Ratio 105dB (V ・Efficiency 92% (V ・Channel Separation 80 dB (V ・Power Limit Function (Supports power limit setting of 3W (R

=15V, RL=8Ω, THD+N=10%)

DDP

=12V, RL=8Ω, THD+N=10%)

DDP

=14V, RL=4Ω, THD+N=10%)

DDP

=15V, RL=8Ω, Ta=70 ºC, 4-layer Board)

DDP

=12V, RL=8Ω, Ta=70 ºC, 4-layer Board)

DDP

=12V, RL=8Ω, Po=4.5W, 1kHz)

DDP

=12V, RL=8Ω)

DDP

=12V, RL=8Ω)

DDP

=12V, RL=8Ω, Po=10W)

DDP

=12V, RL=8Ω, 1kHz)

DDP

=8Ω, Mode:7))

・Gain Setting Function (3steps: +6dB/0dB/-6dB) ・Stereo/Monaural Switching Function

・Output Mute Function (Quick Mute/Quick Start) ・Sleep Function ・Pop Noise Reduction Function ・Carrier Clock Frequency Hopping Function ・Overcurrent Protection Function (OCP) ・Over Temperature Protection Function (OTP) ・Under voltage lockout (UVLO) ・DC Detection Function (DCDET) ・Clock Detection Function (CKDET) ・Package Lead-free 48-pin Plastic SQFP (Stage die pad) : YDA163C-SZ

(Note) *1: When operating at less than 8V (V

), an 8Ω or more load must be used.

DDP

*2: These values are based on evaluations on a Yamaha's PCB board implementation.

Please refer to Power Dissipation (Note) *1 on page 6.

4DA163C20 2

■ Pin Assignments YDA163C

■ Pin Assignments

PVSSL

PVDDML

OUTML

PVSSL

OUTPL

PVDDPL

PVSSL

N.C.

MONO

N.C.

GAIN1

GAIN0

VREF

AVSS

CKMOD

REFA

MUTEN

PROTN

MCK

DVDD

SLEEPN

PLIMIT

SCLK

SDATA

HOPP

LRCLK

N.C.

DVSS

PVSSR

PVDDMR

OUTMR

PVSSR

OUTPR

PVDDPR

PVSSR

< 48 pin SQFP Top View >

4DA163C20 3

■ Pin Descriptions YDA163C

■ Pin Descriptions

No. Name I/O

1 N.C. － No Connection pin. This pin must be left open or connected to GND. 2 N.C. － No Connection pin. This pin must be left open or connected to GND. 3 AVSS GND Analog GND 4 VREF AO Analog Reference Voltage Output 5 REFA AO Internal Regulator Output 6 DVDD DVDD power Digital Power 7 MCK I Master Clock Input Pin 8 SDATA I Audio Data Input Pin

9 SCLK I Bit Clock Input Pin 10 LRCLK I Word Clock Input Pin 11 DVSS GND Digital GND 12 N.C. － No Connection pin. This pin must be left open or connected to GND. 13 PVSSR GND GND for the digital amplifier output (Rch) 14 PVDDPR PVDD power Power for the digital amplifier output (Rch+) 15 PVDDPR PVDD power Power for the digital amplifier output (Rch+) 16 OUTPR O Digital Amplifier Output (Rch+) 17 OUTPR O Digital Amplifier Output (Rch+) 18 PVSSR GND GND for the digital amplifier output (Rch) 19 PVSSR GND GND for the digital amplifier output (Rch) 20 OUTMR O Digital Amplifier Output (Rch-) 21 OUTMR O Digital Amplifier Output (Rch-) 22 PVDDMR PVDD power Power for the digital amplifier output (Rch-) 23 PVDDMR PVDD power Power for the digital amplifier output (Rch-) 24 PVSSR GND GND for the digital amplifier output (Rch) 25 N.C. － No Connection pin. This pin must be left open or connected to GND. 26 N.C. － No Connection pin. This pin must be left open or connected to GND. 27 HOPP I PWM Carrier Frequency Hopping setting pin 28 PLIMIT I Power Limit setting pin 29 SLEEPN I Sleep Reset pin 30 PROTN O/D Error Flag Output pin 31 MUTEN I Mute pin 32 CKMOD I Clock Mode setting pin 33 GAIN0 I Gain setting pin 0 34 GAIN1 I Gain setting pin 1 35 MONO I Stereo/Mono setting pin 36 N.C. － No Connection pin. This pin must be left open or connected to GND. 37 PVSSL GND GND for the digital amplifier output (Lch) 38 PVDDML PVDD power Power for the digital amplifier output (Lch-) 39 PVDDML PVDD power Power for the digital amplifier output (Lch-) 40 OUTML O Digital Amplifier Output (Lch-) 41 OUTML O Digital Amplifier Output (Lch-) 42 PVSSL GND GND for the digital amplifier output (Lch) 43 PVSSL GND GND for the digital amplifier output (Lch) 44 OUTPL O Digital Amplifier Output (Lch+) 45 OUTPL O Digital Amplifier Output (Lch+) 46 PVDDPL PVDD power Power for the digital amplifier output (Lch+) 47 PVDDPL PVDD power Power for the digital amplifier output (Lch+) 48 PVSSL GND GND for the digital amplifier output (Lch)

*1)

Function

*2)

(Note) *1: I: Input pin, O: Output pin, A: Analog pin, O/D: Open-Drain output pin

PVDD power pins should be connected each other on the board. Likewise, GND pins should be also connected each other on it.

*2: A voltage for supplying SLEEP pin with H level should be applied not from REFA pin output but

from an external power supply.

4DA163C20 4

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