Xoceco PH-42R6 Schematic

PDP TELEVISION
PH-42R6
Canada
CONTENTS
Safety precautions………………………………………………………………………..…
Working principle analysis of the unit……………………………….………….………….
Block diagram…………………………………..………………………………….…………
IC block diagram………………………………………………………………………..……
Wiring diagram ……………………………………………………………..……………...
Troubleshooting………………………………………………………………………..……
Schematic diagram …………………………………………………………………………
APPENDIX-A: Main assembly list
APPENDIX-B: Exploded view
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Note: This maintenance manual is intended only for the reference of the maintenance people. Please pay attention to the following points before carrying out the maintenance work.
Safety precautions
Please read the “Points for attention for the Maintenance & Repair of PDP” and “Criterion for Identifying the Defects on Screen” as below, before inspecting and adjusting the TV set.
1. “Points for attention for the Maintenance & Repair of PDP”
To avoid possible danger, damage or jeopardy to health and to prevent PDP screen from new damage, the maintenance people must read the following carefully. If they ignore the following warnings, there will be deathful risks:
1.1 Screens vary from one model to another and therefore not interchangeable. Be sure to use the same type of screen in the replacement.
1.2 The operation voltage is approximately 350V for PDP module (including screen, driving circuit, logic circuit and power module). If you want to conduct maintenance work on PDP module when the set is in normal operation or just after the power is off, you must take proper measures to avoid electric shock and never have direct contact or touch with the circuitry of the working module or metal parts. That’s because within a short time relatively high voltage still remains on the capacitor of the driving part even after the power is off. Make sure to begin relevant maintenance operation at least one minute after the power is off.
1.3 Don’t apply on the module any power supply that is higher than the specification. If the power supply used deviates from the value given in the specification, there might be a possibility of leading to fire or damage to the module.
1.4 Never have operation or mounting work under unsuitable environment such as areas in the vicinity of water – bathroom, laundry, water chute of kitchen – sources of fire, heat-radiation parts or direct exposure to sunlight. Otherwise there will be kickbacks.
1.5 In case foreign substances such as water, liquid, metal slices or others fall into the module carelessly power must be cut off immediately. Keep the module as it is and do not move anything on the module. Otherwise it might be possible to contact the high voltage or cause shock short circuit so that it may lead to fire or electric shock.
1.6 If there is smoke, abnormal smell or sound from the module, please cut the power off immediately. Likewise in case the screen doesn’t work when the power is on or during the operation, please also cut off the power at once. No more operation in this case.
1.7 Do not remove or plug its connection wire when the module is in operation or right after the power is off. That’s because there remains a relatively high voltage on the capacitor of the driving circuit. If there is a need to remove or plug in the connection wire, please wait at least one minute after the power is off.
1.8 Considering the module has a glass faceplate, please avoid extrusion by external force lest it should cause glass breakage that may get people injured. Two people are needed in cooperation to move this module lest contingency takes place.
1.9 The complete TV set is designed on the basis of full consideration of thermal dissipation by convection, with the round hole on the top for heat emission. To avoid overheat, please do not have any covering on the hole during normal operation and never put it in the place where the space is narrow and in bad ventilation.
1.10 There is quite a number of circuits in PDP that are integrated ones. Please be on guard against
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static electricity. During maintenance operation be sure to cover yourself with anti-static bag and before operation make sure to have it sufficiently grounded.
1.11 There are a big number of connection wires distributed around the screen. Please take care not to touch or scuff them during maintenance or removing the screen, because once they are damaged the screen will fail to work and it’s not possible to repair it.
1.12 Connector for the circuit board of the screen part is relatively fine and delicate. Please take care in the replacement operation lest it should get damaged.
1.13 Special care must be taken during transportation and handling because strenuous vibration could lead to screen glass breakage or damage on the driving circuitry. Be sure to use a strong outer case to pack it up before transportation or handling.
1.14 Please put it for storage in an environment in which the conditions are under control so as to prevent the temperature and humidity from exceeding the scope stipulated in the specification. For prolonged storage please cover it with anti-moisture bag and have them piled and stored in one place. The environmental conditions are tabulated as below:
Temperature Scope for operation 0~50centigrade
Scope for storage -15~60centigrade
Humidity Scope for operation 20%~80%
Scope for storage 20%~80%
1.15 If a fixed picture is displayed for a long time, difference in its brightness and color may occur compared with movable pictures. But it doesn’t show any problem and the reason is that there is reduced density of fluorescent powder in the former. On the other hand, even if changes take place in the picture, it can keep its brightness for a period of time (several minutes). It’s a feature inherent with plasma and it’s not abnormal. However please try as much as possible to avoid showing a still picture of high brightness for a long time during operation.
1.16 As a digitalized display devise, this module is provided with error diffusion technology and the gray scale and false enhancement of contour can be displayed by reusing of sub-field. As compared with cathode ray tube, it can be found in the moving picture that at the brim of the face of a person there are some wrong colors.
1.17 During the display of graph (indicating the gradual change in brightness horizontally or vertically) resulting from gray scale test it can be found that the brightness for the two adjacent levels is uneven. This is caused by the reuse of sub-field, the display of load rectification and the electrolysis.
1.18 The screen front plate is of glass. Please make sure that the screen has been put in place during erection. If it is not in place before the erection begins it may lead to screen crack or breakage.
1.19 Make sure the screw used in the mounting of the screen is of the original specs lest it should cause damage to the screen due to mismatch. Special care should be taken not to use too long or too big screw.
1.20 Care must be taken to guard against dust during assembling or dismantling, especially to avoid dirt from falling in between the screen and the glass lest it should harm the receiving and viewing effect.
1.21 There is piece of insulator stuck on the rear chassis corresponding to the power supply board. It is used to isolate the cool part from the hot part. Please take care to keep it intact lest it should
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become a potential safety trouble.
1.22 In addition to plasma screen, the glass is a part of high value. It has such functions as anti-radiation, adjustment of color temperature etc. Please handle it carefully.
Alignment instructions
1. Test equipment
VG-848 (Signal generator) CA100 (White balancer)
2. The alignment flow chart (see below figure)
Production of CPU board and analog board on the line.
Check DDC, HDCP KEY and FLASH
Check CPU board and analog board
Combined test for general assembly
Connect to central signal source; check if various
TV functions (station skipping, modulate quantity
control etc), check if the output of earphone and
speaker are normal.
Input AV/S signal and HDTV signal; check various
functions under AV/S terminal
Input VGA signal and check if display is normal in
the state of PC and various functions (analog
quantity control, line/field center etc.)
Input HDMI signal and check if display is normal in
the state of HDMI and various functions (sound
and analog quantity control).
Preset ex-factory
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Check accessories and then packing
Fig-1 adjustment flow-chart
3. The unit adjustment
Connect all the boards according the wiring diagram, turn on the power and check if the display is normal.
3.1 The method of entering factory menu
Enter factory menu method: press the INPUT→ 2→ 5→8→0 buttons one by one on the remote control to factory menu. Press the MENU button to select item. Press the DISPLAY button to exit the factory menu.
3.2 EEPROM initialization and back light adjustment
Enter the firs page of factory menu, adjust item OPTION-1 to 9, OPTION-2 to 5, select the EEPROM initial after, press the VOL+ button, then display the DOING, still the DOING disappear and turn off the unit. Note: option-1 and option-2 function as follows:
Option-1 Option-2
Bit6 0: normal TV mode
1: hotel TV mode
Bit5 0: TV/AV multi-system
1: TV/AV NTSC system
Bit4 0:fast search station
1:slow search station
Bit3 0: no memory function after power off for 10s
1: memory function after power off for 10s
Bit2,1 00: STANDBY
01: turn on
10: memory function of turn on
Bit0 0: without LOGO
1: With LOGO
3.3 HDMI channel adjustment
Input the VG-848 TIME854(800X600/60Hz) and PATTERN920 8-LEVEL gray signal, enter the factory menu2(white balance adjustment menu), adjust the second step and the seventh step. Adjust R-OFFSET, G-OFFSET and B-OFFSET item, still the second step color coordinate to (285,
293). Adjust R-GAIN, G-GAIN and B-GAIN item, still the seventh step color coordinate to (285, 293). Repeat adjustment R-OFFSET, G-OFFSET and B-OFFSET item and R-GAIN, G-GAIN and B-GAIN item, still two step gray to (285, 293). Note: R-OFFSET, G-OFFSET and B-OFFSET values must be an item value to 128 at least; R-GAIN, G-GAIN and B-GAIN values must be an item value to 255 at least.
3.4 VGA channel adjustment
3.4.1 mode pre-set Input the VGA signal of VG-848 (PATTERN 980:1 dot ON/OFF), select the TIME877 (720x400/70Hz)
0:close HDMI hot-plug function
1:open HDMI hot-plug function
0:only have the first two pages of factory menu
1:all pages of factory menu
0:have GAMMA correction
1:no GAMMA correction
0:no signal noise wave of TV
1:no signal blue screen of TV
00:complexion correction (OFF)
01: complexion correction (WEAK)
10: complexion correction (MIDDLE)
11: complexion correction (STRONG)
0: Video and Graphic channel white balance no share
1: Video and Graphic channel white balance share
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signal, press auto-adjust button to all screen or adjust PC settings menu to auto correction. Separate auto adjust for TIME885 (640x480/60Hz) and TIME854 (800x600/60Hz).
3.4.2 VGA channel auto color adjustment Input the VG-848 TIME854(800x600/60Hz) and PATTERN920(GRAY 8 STEP(H)), enter the factory menu1, select the AUTO COLOR after, press the VOL+ button to select AUTO COLOR.
3.5 HDTV channel adjustment
Input the VG-848 TIME972(1080i/60Hz) and PATTERN976(64 GRAY & Color), enter the factory menu1, select the AUTO COLOR after, press the VOL+ button to select AUTO COLOR.
4. Performance check
4.1 TV function Input center source signal to RF-TV terminal, check if the channel is leak for auto searching.
4.2 AV/S and HDTV terminal Input AV/S and HDTV signal, check if the signal is normal.
4.3 VGA terminal Input 640 x 480 @60Hz VGA format signal, check if the signal is normal.
4.4 HDMI terminal Separate input HDMI and DVI signal; check the picture and sound is normal, check if the HDCP function is normal.
4.5 check the sound channel Check the speaker and headphone of each channel.
4.6 ex-factory setting Enter the first page of factory menu, select the factory out after, press the VOL+ button to display “doing”, then “doing” disappear while it can auto ex-factory setting.
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Working principle analysis of the unit
The RF1 via integrative tuner TUNER1 after, the FBAS VIDEO1 and SIF1 is generated. Video signal of VIDEO1, AV1/S, AV2 sent to N7(TVP5160) as the main picture signal. The signal via N7 switch selection after, one way is AV OUT; another way sent 8-bit ITU-R656 format signal to N10 (FLI2310) non-interlaced processing, then sent 24bit YUV signal to main processing control chip N15 (GM1501/1601).
The RF2 via integrative tuner TUNER2 after, the FBAS VIDEO2 and SIF2 is generated. Video signal of VIDEO2,AV1/S,AV2 sent N8 (TVP5147) to decode as sub-picture signal. The signal via N8 decode after, it sent 8-bit ITU-R656 format signal to main processing control chip N15 (GM1501/1601).
Two ways YPBPR signal via HDTV switch N39(PI5V330) selection after, it sent to RGB switch device N4(PI5V330) switch selection with RGB signal from VGA interface, then it sent to GM1501/1601.
The HDMI via receiver N34(MST3383MB) processing after, it output RGB signal of 24bit to GM1501/1601.
They sent to GM1501/1601 picture processing, therein YPBPB or RGB to A/D conversion after, it and other three signal are switched selection and digital display processing, it include OSD, GAMMA correction, brightness and contrast processing, then LVDS conversion to PDP panel display.
The SIF1 of tuner1, SIF2 of tuner2 and audio signal of AV1/S, AV2 separate sent to audio processor NA3(MSP3420).
The HDMI via chip N34(MST3383MB) decode to digital audio, after N26(CS4334) D/A conversion, it audio and the audio signal of VGA/DVI sent to N44(HEF4052) switch selection, then sent to MSP3420.
The audio of two YPBPR and VGA via switch conversion N42(HEF4052) to MSP3420 too.
The stereo of the SIF1 and SIF2 with other four ways audio switch conversion selection to volume control and audio processing. One way output right/left channel audio of main-picture, the signal sent SRS processing NA5 (M62494) to SRS sound stereo processing. It via sound amplifier NA6(MP7722) to speaker; one way output right/left channel audio of sub-picture, it sent to earphone, another way is AV OUT R/L output.
The work of whole unit is controlled by MCU, which includes GM1501/1601.
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A
Block diagarm
B
C
D
1 2 3 4 5 6 78
L/R_VGA
L/R_YPbPr1
L/R_YPbPr2
N42
YUV_SW
TC4052
YUV/USB
L/R_USB
Audio Switch
N44
TC4052
L/R_HDMI
L/R_AV1
L/R_AV2
Audio Switch
VGA/HDMI_SW
SIF
ANA_IN1
SC2_L/R
SC1_L/R
ANA_IN2
Audio Processor
MSP3420G
SC3_L/R SC4_L/R
SC2_OUT
NA3
DACM_L/R
AUDIO OUT
HDMI
EDID
24C02
Tuner 1
Tuner 2
HDCP KEY
24C04
AV IN 1
AV IN 1
AV IN 2
AV IN 2
V OUT
MST3383
N34
HDMI RX
N39
YPbPr 2
CBT3257C
VGA
YPbPr 1
EDID
24C02
HDTV Switch
YUV_SW
OPTION
Media Player
N7
N10
TVP5160
FLI2310
Video Decoder
Deinterlacer
(USB)
Video Decoder
TVP5147
N8
SC1_OUT
CBT3257C
YUV/USB
YUV/VGA
HDTV Switch
Y Pb/Cb Pr/Cr
CBT3257C
RGB Switch
R G B
Hs Vs
SN74AHC14
N4
TDA7053AT
Head Phone
AMP
HP_SW
NA7
M62494FP
NA5SRS
Audio AMP
MP7722
NA5
NA6
N15
GM1601/GM1501
EEPROM
LCD TV Controller
Y Pb/Cb Pr/Cr
R G B
Hs Vs
Frash/ROM
Power_ON,IR,KeyA,KeyB,Led1,Led2
Mute,HP_SW,VGA_CAB,DVI_CAB
YUV/VGA,YUV_SW,YUV/USB
Frame Buffer
DDR
Title
SizeA3Date: 19-May-2006
File: G:\ \..\PH42R6BLOCK.Sch
Number
邱杰的文件 Drawn By:
PH42R6 BLOCK DIAGRAM
Power Supply
Power_ON,+5V_STB,VCC,VBL
PANEL
7654321
Sheet of
Revision
Ver 1.0
yyc
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IC block diagram
1.MSP3420
The MSP 34x0G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip. Figure 1–1 shows a simplified functional block diagram of the MSP 34x0G. This new generation of TV sound processing ICs now includes versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x0G has optimum stereo performance without any adjustments. All MSP 34xxG versions are pin compatible to the MSP 34xxD. Only minor modifications are necessary to adapt a MSP34xxD controlling software to the MSP 34xxG. The MSP 34x0G further simplifies controlling software. Standard selection requires a single I2C transmission only. The MSP 34x0G has built-in automatic functions: The IC is able to detect the actual sound standard automatically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between mono/ stereo/bilingual; no I2C interaction is necessary (Automatic Sound Selection). The MSP 34x0G can handle very high FM deviations even in conjunction with NICAM processing. This is especially important for the introduction of NICAM in China. The ICs are produced in submicron CMOS technology. The MSP 34x0G is available in the following packages: PLCC68 (not intended for new design), PSDIP64, PSDIP52, PQFP80, and PLQFP64.
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Fig. 1–1: Simplified functional block diagram of the MSP 34x0G
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2. TVP5160
The TVP5160 device is a high quality; digital video decoder that digitizes and decodes all popular baseband analog video formats into digital component video. The TVP5160 decoder supports the A/D conversion of component YPbPr and RGB (SCART) signals, as well as the A/D conversion and decoding of NTSC, PAL, and SECAM composite and S-Video into component YCbCr. Additionally, component progressive signals can be digitized. The chip includes two 11-bit, 60-MSPS, A/D converters (ADCs). Prior to each ADC, each analog channel contains an analog circuit, which clamps the input to a reference voltage and applies a programmable gain and offset. A total of 12 video input terminals can be configured to a combination of YPbPr, RGB, CVBS,and S-Video video inputs. Progressive component signals are sampled at 2x clock frequency (54 MHz) and are then decimated to the 1x rate. In SCART mode the component inputs and the CVBS inputs are sampled at 54 MHz alternately, then decimated to the 1x rate. Composite or S-Video signals are sampled at 4x the ITU-R BT.601 clock frequency (54 MHz), line-locked for correct pixel alignment, and are then decimated to the 1x rate. CVBS decoding utilizes advanced 3D Y/C filtering and 2-dimensional complementary 5-line adaptive comb filtering for both the luma and chroma data paths to reduce both cross-luma and cross-chroma artifacts. 3D Y/C color separation may be used on both PAL and NTSC video signals. A chroma trap filter is also available. On CVBS and Y/C inputs, the user can control video characteristics such as hue, contrast, brightness, and saturation via an I2C host port interface. Furthermore, luma peaking with programmable gain is included, as well as a patented color transient improvement (CTI) circuit. Attenuation at higher frequencies or asymmetrical color subcarrier sidebands are compensated using the IF compensation block. Frame adaptive noise reduction may be applied to reduce temporal noise on CVBS, S-Video, or component inputs. 3D noise reduction and 3D Y/C separation may be used at the same time or independently. The TVP5160 decoder utilizes Texas Instruments’ patented technology for locking to weak, noisy, or unstable signals and can auto-detect between broadcast quality and VCR-style (nonstandard) video sources. The TVP5160 decoder generates synchronization, blanking, field, active video window, horizontal and vertical syncs, clock, genlock (for downstream video encoder synchronization), host CPU interrupt and programmable logic I/O signals, in addition to digital video outputs. The TVP5160 decoder includes methods for advanced vertical blanking interval (VBI) data retrieval. The VBI data processor (VDP) slices and performs error checking on teletext, closed caption, and other VBI data. A built-in FIFO stores up to 11 lines of teletext data, and, with proper host port synchronization, full-screen teletext retrieval is possible. The TVP5160 decoder can pass through the output formatter 2x sampled raw Luma data for host-based VBI processing. Digital RGB overlay can be synchronously switched with any video input, with all signals being oversampled at 4x the pixel rate.
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INTERNAL BLOCK DIAGRAM:
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