XEMOD QPP-036 Datasheet
XEMOD RESERVES THE RIGHT TO MAKE CHANGES TO THIS SPECIFICATION WITHOUT FURTHER NOTICE. BEFORE THE
PRODUCT DESCRIBED HERE IS WRITTEN INTO SPECIFICATIONS OR USED IN CRITICAL APPLICATIONS, THE PERFORMANCE
CHARACTERISTICS SHOULD BE VERIFIED BY CONTACTING XEMOD.
Xemod QuikPAC Data www.xemod.com Rev. A (10-17-01) Page 1 of 1
QPP-036
QPP-036
Preliminary 200W, 851-866MHz
QuikPAC Module Data Class AB Power Stage
General description:
The QPP-035 QuikPAC™ RF power module is an impedancematched Class AB amplifier stage designed for use in the output
stage of linear RF power amplifiers for SMR base stations. The
power transistors are fabricated using Xemod’s advanced design
LDMOS process. This unit has a factory set, regulated and
temperature compensated gate bias, eliminating the need for the
user to provide adjustable gate bias voltage circuits and make
individual bias adjustments during stage alignment.
Features:
Single Polarity Operation
Matched for 50 Ω RF interfaces
XeMOS FET Technology
Stable Performance
QuikPAC System Compatible
QuikClip or Flange Mounting
Standard Operating Conditions
Parameter Symbol Min Nom Max Units
Frequency Range
F
851 866 MHz
Supply (Drain) Voltage
VD
26.0 28.0 32.0 VDC
Bias (Gate) Voltage
VG
11.0 12.0 13.0 VDC
Bias (Gate) Current, Average
IG
40 mA
RF Source & Load Impedance
Ω
50 Ohms
Load Impedance for Stable Operation (All Phases) VSWR 10:1
Operating Baseplate Temperature T
OP
-20 +90 ºC
Output Device Thermal Resistance, Channel to Baseplate
Θjc
0.4 ºC/W
Maximum Ratings
Parameter
Symbol Value Units
Supply (Drain) Voltage VD 35 VDC
Control (Gate) Voltage, VD = 0 VDC VG 15 VDC
Input RF Power PIN 20 W
Load Impedance for continuous operation without damage VSWR 3:1
Output Device Channel Temperature 200 ºC
Lead Temperature during reflow soldering +210 ºC
Storage Temperature T
STG
-65 to +150 ºC
Performance at 28VDC & 25ºC
Parameter Symbol Min Nom Max Units
Supply (Drain) Voltage
V
D1,2
27.8 28.0 28.2 VDC
Quiescent Current (total)
IDQ
1,800 2,000 2,200 mA
Peak Envelope Power at 1 dB Compression (two tone)
P-1
200 220 W
Gain at 40W PEP (two tone)
G
13.5 14.0 dB
Gain Variation over frequency at 40W PEP (two tone)
∆G
0.2 0.5 dB
Input Return Loss (50 Ω Ref) at 40W PEP (two tone)
IRL
12.0 15.0 dB
Drain Efficiency at 200W PEP (two tone)
η
32 36 %
3rd Order IMD Product (2 tone at 200W PEP;1 MHz spacing)
-30 -28 dBc
IMD Variation – 100 kHz to 25 MHz tone spacing
1.0 2.0 dB
2nd Harmonic at 200W P
out
(single tone)
dBc
3rd Harmonic at 200W P
out
(single tone)
dBc
Xemod QuikPAC Data www.xemod.com Rev. A (10-17-01) Page 2 of 2
QPP-036
Performance at 28VDC & 25ºC (continued)
Parameter Symbol Min Nom Max Units
Group (Signal) Delay
τd
4.7 4.9 ns
Transmission Phase Flatness
0.5 1.0 degrees
Performance at 28VDC Over Temperature
Parameter Symbol Min Nom Max Units
Peak Envelope Power at 1 dB Compression (two-tone)
P-1
200 W
Gain at 200W PEP (two tone)
G
Gain Variation over frequency at 40W Output (single tone)
∆G
dB
Input Return Loss (50 Ω Ref) at 40W PEP (two tone)
IRL
dB
Drain Efficiency at 200W PEP (two tone)
η
%
3rd Order IMD Product (2 tone at 200W PEP;1 MHz spacing)
-29 -27 dBc
Group (Signal) Delay
τd
4.65 4.95 ns
Transmission Phase Flatness
0.5 1.0 degrees
Notes:
The "Preliminary" designation on this data sheet indicates this product has not yet entered the volume production stage.
The data supplied here is derived from engineering development and pilot production testing and may change.
This GR-version QuikPAC module has an internally regulated gate voltage that is preset at the factory. A voltage of +12VDC
(±1V) should be applied to each gate lead (pins 1 and 5). No further adjustment is required. Although the module will
operate with lower voltages applied, the internal regulator is not functioning and the specified performance may not be
achieved.
The internal gate voltage is thermally compensated to maintain constant quiescent current over the temperature range listed
in the data sheet. No compensation is provided for gain changes with temperature. This can only be provided with AGC
external to the module
Gate voltage must be applied coincident with or after application of the drain voltage to prevent potentially destructive
oscillations. Bias voltages should never be applied to a module unless it is terminated on both input and output.
The quiescent current set during manufacture will be within the range specified in the Performance section (nominal ±10%)
and is selected to balance IMD, input return loss, and efficiency. This setting is suitable for most applications. Modules with
different optimization profiles are available by special order.
Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some
applications may require energy storage on the drain leads to accommodate time-varying waveforms.
The RF leads are internally protected against DC voltages up to 100V. Care should be taken to avoid video transients that
may damage the active devices.
Loading...