How it Works
XBOX
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One Fat
Schematic
72 pgs6.97 Mb0

XBOX One Fat Schematic

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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
PAGE
[1] COVER PAGE [2] SOC, PCIEX + CLOCKS + VIDEO [3] SOC POWER, MEM+CPUCORE+MEMCORE+NBCORE+MISC [4] SOC POWER, V_GFXCORE + VSS [5] SOC, MEMOERY PARTITION C + D [6] SOC, MEMORY PARTITION A + B [7] SOC, VSS + SPARE [8] SOC, DEBUG + SB SIGNALS
[9] SOC, DECOUPLING [10] SOC, DECOUPLING [11] SOC, DECOUPLING [12] MEMORY CHANNEL D [13] MEMORY CHANNEL D [14] MEMORY CHANNEL D, DECOUPLING [15] MEMORY CHANNEL C [16] MEMORY CHANNEL C [17] MEMORY CHANNEL C, DECOUPLING [18] MEMORY CHANNEL B [19] MEMORY CHANNEL B [20] MEMORY CHANNEL B, DECOUPLING [21] MEMORY CHANNEL A [22] MEMORY CHANNEL A [23] MEMORY CHANNEL A, DECOUPLING [24] KIC, USB [25] KIC, PCIEX + SATA + VIDEO [26] KIC, SMC [27] KIC, FACET [28] KIC, POWER [29] KIC, CLOCKS + STRAPPING + POR [30] KIC, POWER [31] KIC, DECOUPLING [32] CONTROLLER, ETHERNET [33] EMMC [34] CONN, RJ45 + TOSLINK [35] CONN, USB [36] CONN, USB [37] CONN, HDMI IN
RULES: (APPLIED WHEN POSSIBLE)
1.) MSB TO LSB IS TOP TO BOTTOM
2.) WHEN POSSIBLE: INPUTS ON LEFT, OUTPUTS ON RIGHT
3.) ORDER OF PAGES=CHIP INTERFACES, TERMINATION, POWER, DECOUPLING
4.) AVOID USING OFF PAGE CONNECTORS FOR ON PAGE CONNECTIONS
5.) LANED SIGNALS ARE GROUPED ON SYMBOLS
6.) TRANSIMITTER NAME USED AS PREFIX WITH RX AND TX CONNECTIONS
7.) SUFFIX V_ IS USED FOR VOLTAGE RAIL SIGNAL NAMES
8.) SUFFIX _DP AND _DN ARE USED FOR DIFFERIENTAL PAIRS
9.) UNNAMED NETS ARE NAMED WITH /2 TEXT SIZE
10.) SUFFIX _N FOR ACTIVE LOW OR N JUNCTION
12.) SUFFIX _P FOR P JUNCTION
13.) SUFFIX _EN FOR ENABLE
14.) 'CLK' FOR CLOCKS, 'RST' FOR RESETS
15.) PWRGD FOR POWER GOOD
16.) REV AND FAB ARE SET USING CUSTOM VARIABLES TOOLS>OPTIONS>VARIABLES
CONTENTS
[38] CONN, HDMI OUT [39] CONN, ODD + HDD [40] CONN, LITHIUM + FAN [41] CONN, PWR [42] VREGS, BLEEDERS [43] VREGS, INPUT + OUTPUT FILTERS [44] VREGS, CPUCORE [45] VREGS, GFXCORE [46] VREGS, GFXCORE OUTPUT PHASE 1 & 2 [47] VREGS, GFXCORE OUTPUT PHASE 3 & 4 [48] VREGS, CPUCORE OUTPUT PHASE [49] VREGS, VTT TERMINATION [50] VREGS, NBCORE [51] VREGS, MEMCORE [52] VREGS, MEMIOCD [53] VREGS, MEMIOAB [54] VREGS, V5P0 [55] VREGS, V5P0 DUAL [56] VREGS, V3P3 [57] VREGS, VSOCPHY [58] VREGS, VSOCPLL + VBURN + VFUSE + VBAT [59] VREGS, VSB2P5 [60] VREGS, VSB1P8PLL + VSB1P8IO + VSBCORE + VSB1P1PLL [61] VREGS, STANDBY SWITCHERS 3P3 [62] VREGS, STANDBY SWITCHERS 1P1 + 1P8 [63] IR BLASTER [64] I2C [65] FACET, FTDI [66] FACET, FTDI + MISC [67] CONN, SWITCHES [68] CONN, HDT [69] DEBUG, VR HEADERS AND TEST POINTS [70] DEBUG, CONNECTORS [71] DEBUG, ENET EEPROM + MISC [72] LABELS AND MOUNTING
GREYBULL
REV 1.0 FAB M RETAIL
[PAGE_TITLE=COVER PAGE]
Fri May 10 13:22:55 2013
DRAWING
GREYBULL_RETAIL
1/72
1/72 M 1.0
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
R5U6
0 OHM 5%
EMPTY
402
R5U7
0 OHM
5%
EMPTY
402
SOC,PCIEX + CLOCKS + VIDEO
U7E1
21
PCIE
1 of 17
21
PEX_SPARE_SOC_TP_C PEX_SPARE_SOC_TN_C
AR19 AR20
P_UMI_RX3_P P_UMI_RX3_N
IC
P_UMI_TX3_P P_UMI_TX3_N
P_UMI_TX2_P P_UMI_TX2_N
PEX_SOC_SPARE_TP
AP20
PEX_SOC_SPARE_TN
AP21
PEX_SOC_ENET_TP
AP23
PEX_SOC_ENET_TN
AP24
C7E6
0.1 UF
6.3 V X5R 402
21
10%
C7E8
0.1 UF
6.3 V
PEX_SOC_ENET_TP_C
21
PEX_SOC_ENET_TN_C
10%
X5R 402
OUT
OUT
32
32
R4R19
0 OHM
402
R4R20
0 OHM
402
21
5%
EMPTY
21
5%
EMPTY
29 29
29 29 29 29 29 29
IN IN
IN IN IN IN IN IN
32 32
25 25
25 25
SOC_NB_PEX_SS_100M_CLKP SOC_NB_PEX_SS_100M_CLKN
SOC_REF_NS_100M_CLKP SOC_REF_NS_100M_CLKN SOC_AV_NS_100M_CLKP SOC_AV_NS_100M_CLKN SOC_PEX_SS_100M_CLKP SOC_PEX_SS_100M_CLKN
PEX_ENET_SOC_TP_C
IN
PEX_ENET_SOC_TN_C
IN
PEX_L1_SB_SOC_TP_C
IN
PEX_L1_SB_SOC_TN_C
IN
PEX_L0_SB_SOC_TP_C
IN
PEX_L0_SB_SOC_TN_C
IN
AN21
P_UMI_RX2_P
AN22
P_UMI_RX2_N
AV22
P_UMI_RX1_P
AV23
P_UMI_RX1_N
AT24
P_UMI_RX0_P
AT25 AN18
P_UMI_TX1_P P_UMI_TX1_N
P_UMI_TX0_P P_UMI_TX0_N
P_RX_ZVDD_095 P_TX_ZVDD_095P_UMI_RX0_N
AU23 AU24
AV25 AV26
AN19
X862035-001 BGA1443
V_SOCPHY
EMPTY
U7E1
CLOCKS
AU26 AU27
AT21 AT22 AV19 AV20 AU20 AU21
AR22
CLKIN_NB_P CLKIN_NB_N
DISP_CLKIN_P DISP_CLKIN_N AV_CLKIN_P AV_CLKIN_N CLKIN_P CLKIN_N TEST25_P TEST25_N
2 of 17
X862035-001 BGA1443
PEX_L1_SOC_SB_TP PEX_L1_SOC_SB_TN
PEX_L0_SOC_SB_TP PEX_L0_SOC_SB_TN
RX_ZVDD_095
TX_ZVDD_095
R3T5
1
1.69 KOHM 1%
CH
2
402
1
2
IC
R3T6
1 KOHM 1%
CH 402
0.1 UF 10%
25
25
25
38
0.1 UF
C7E7
21
6.3 V X5R 402
DP_AUX_SB_SOC_TP_C
IN
DP_AUX_SB_SOC_TN_C
IN
DP1_HPD
OUT
DP0_HPD
IN
C7E5
6.3 V X5R 402
10%
0.1 UF
21
C7E3
6.3 V X5R 402
10%
21
C7E1
6.3 V X5R 402
C3R26
0.1 UF
6.3 V C3R25
0.1 UF
6.3 V
21
PEX_L1_SOC_SB_TP_C
10%0.1 UF
PEX_L1_SOC_SB_TN_C
PEX_L0_SOC_SB_TP_C
PEX_L0_SOC_SB_TN_C
21
X5R
10%
402
21
X5R
10%
402
38
38
25 25 38 38 38 38 25 25 38 38
38
38
34
BI
OUT BI
IN IN OUT OUT OUT OUT IN IN OUT OUT
OUT OUT
OUT
25
OUT
25
OUT
25
OUT
25
OUT
DP_CR_CLK
DP_L0_SB_SOC_TP_C DP_L0_SB_SOC_TN_C TMDS_TX_DP0 TMDS_TX_DN0 TMDS_TX_DP2 TMDS_TX_DN2 DP_L1_SB_SOC_TP_C DP_L1_SB_SOC_TN_C TMDS_TX_DP1 TMDS_TX_DN1
DP_AUX_SOC_SB_TP DP_AUX_SOC_SB_TN
HDMI_OUT_DDC_CLK HDMI_OUT_DDC_DATA TMDS_TX_CLKP TMDS_TX_CLKN
SPDIF_OUT
AP14
AU18 AU17 AU15 AU14 AV17 AV16 AT19 AT18 AT16 AT15
AT13 AT12
AR14 AR13AR23 AV14 AV13 AP15
AP12 AU12
U7E1
DP_CR_CLK
DP1_RX0_P DP1_RX0_N DP0_TX2_P DP0_TX2_N DP0_TX0_P DP0_TX0_N DP1_RX1_P DP1_RX1_N DP0_TX1_P DP0_TX1_N
DP1_AUX_P DP1_AUX_N
DP0_AUX_P DP0_AUX_N DP0_TX3_P DP0_TX3_N DP1_HPD
SPDIF_OUT DP0_HPD
VIDEO
3 of 17
IC
OUT OUT
TEST25_P TEST25_N
70 70
[PAGE_TITLE=SOC PAGE 1]
DVI PCB ROUTING
ORDERING TMDS CLOCK ­TMDS CLOCK + TMDS DATA0 ­TMDS DATA0 + TMDS DATA1 ­TMDS DATA1 + TMDS DATA2 ­TMDS DATA2 +
DP PCB ROUTING
ORDERING DP LANE 3 ­DP LANE 3 + DP LANE 2 ­DP LANE 2 + DP LANE 1 ­DP LANE 1 + DP LANE 0 ­DP LANE 0 +
R3R11
1
R7D10
1
100 KOHM PIN NAME DP0_TX3_N DP0_TX3_P DP0_TX2_N DP0_TX2_P DP0_TX1_N DP0_TX1_P DP0_TX0_N DP0_TX0_P
SOC DUMMY_BOMEMPTY EMPTYU7E1
TRUE
1%
CH
2
402
100 KOHM 1%
CH
2
402
R3R10 R3R7
1
150 OHMS 1%
CH
2
402
1
150 OHMS 1%
CH
2
402
DRAWING
Tue Jun 18 16:42:23 2013
DP_TX_CALR DP_AUX_CALR DP_RX_CALR
R3R9
1
2 KOHM 1%
CH
2
402
AM12
DP_TX_ZVSS
AR12
DP_AUX_ZVSS
AN13
DP_RX_ZVSS
X862035-001
GREYBULL_RETAIL
BGA1443
2/72 2/72 M 1.0
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
SOC POWER, MEM + CPUCORE + MEMCORE + NBCORE + MISC
V_NBCORE
EMPTY
V_MEMIOAB
EMPTY
AU31 AU35 AT30 AT34 AP29 AP33 AN28 AN32 AN37 AM36 AK33 AJ34 AJ37 AH29 AH36 AF29 AF33 AE34 AE37 AD29 AD36 AB29 AB33 AA34 AA37
Y29 Y36 V29 V33 U34 U37 T29 T36 P29 P33 N34 N37 M29 M36 K29 K33 J34 J37 H29 H36 F33 E32 E34
U7E1
VDD_MEM1[47] VDD_MEM1[46] VDD_MEM1[45] VDD_MEM1[44] VDD_MEM1[43] VDD_MEM1[42] VDD_MEM1[41] VDD_MEM1[40] VDD_MEM1[39] VDD_MEM1[38] VDD_MEM1[37] VDD_MEM1[36] VDD_MEM1[35] VDD_MEM1[34] VDD_MEM1[33] VDD_MEM1[32] VDD_MEM1[31] VDD_MEM1[30] VDD_MEM1[29] VDD_MEM1[28] VDD_MEM1[27] VDD_MEM1[26] VDD_MEM1[25] VDD_MEM1[24] VDD_MEM1[23] VDD_MEM1[22] VDD_MEM1[21] VDD_MEM1[20] VDD_MEM1[19] VDD_MEM1[18] VDD_MEM1[17] VDD_MEM1[16] VDD_MEM1[15] VDD_MEM1[14] VDD_MEM1[13] VDD_MEM1[12] VDD_MEM1[11] VDD_MEM1[10] VDD_MEM1[9] VDD_MEM1[8] VDD_MEM1[7] VDD_MEM1[6] VDD_MEM1[5] VDD_MEM1[4] VDD_MEM1[3] VDD_MEM1[2] VDD_MEM1[1] VDD_MEM1[0]
X862035-001
VDD MEM 9 of 17
IC
VDD_MEM0[47] VDD_MEM0[46] VDD_MEM0[45] VDD_MEM0[44] VDD_MEM0[43] VDD_MEM0[42] VDD_MEM0[41] VDD_MEM0[40] VDD_MEM0[39] VDD_MEM0[38] VDD_MEM0[37] VDD_MEM0[36] VDD_MEM0[35] VDD_MEM0[34] VDD_MEM0[33] VDD_MEM0[32] VDD_MEM0[31] VDD_MEM0[30] VDD_MEM0[29] VDD_MEM0[28] VDD_MEM0[27] VDD_MEM0[26] VDD_MEM0[25] VDD_MEM0[24] VDD_MEM0[23] VDD_MEM0[22] VDD_MEM0[21] VDD_MEM0[20] VDD_MEM0[19] VDD_MEM0[18] VDD_MEM0[17] VDD_MEM0[16] VDD_MEM0[15] VDD_MEM0[14] VDD_MEM0[13] VDD_MEM0[12] VDD_MEM0[11] VDD_MEM0[10]
VDD_MEM0[9] VDD_MEM0[8] VDD_MEM0[7] VDD_MEM0[6] VDD_MEM0[5] VDD_MEM0[4] VDD_MEM0[3] VDD_MEM0[2] VDD_MEM0[1] VDD_MEM0[0]
BGA1443
AU4 AU8 AT5 AT9 AP6 AP10 AN2 AN7 AN11 AM3 AK6 AJ2 AJ5 AH3 AH10 AF6 AF10 AE2 AE5 AD3 AD10 AB6 AB10 AA2 AA5 Y3 Y10 V6 V10 U2 U5 T3 T10 P6 P10 N2 N5 M3 M10 K6 K10 J2 J5 H3 H10 F6 E5 E7
V_MEMIOCD
EMPTY
V_CPUCORE
EMPTY
A31 A30 A29 A27 A25 B31 B30 B29 B27 B25 C30 C28 C26 D28 D26 E29 E27 E25 F29 F27 F25 G28 G26 H28 H26 J27 J25 K27 K25 L28 L26 M28 M26 N27 N25 P27 P25 R28 R26 T28 T26 U27 U25 V27 V25 W28 W26 Y28
Y26 AA27 AA25 AB27 AB25 AC28 AC26
U7E1
VDD_CORE
VDD_CORE[54] VDD_CORE[53] VDD_CORE[52] VDD_CORE[51] VDD_CORE[50] VDD_CORE[49] VDD_CORE[48] VDD_CORE[47] VDD_CORE[46] VDD_CORE[45] VDD_CORE[44] VDD_CORE[43] VDD_CORE[42] VDD_CORE[41] VDD_CORE[40] VDD_CORE[39] VDD_CORE[38] VDD_CORE[37] VDD_CORE[36] VDD_CORE[35] VDD_CORE[34] VDD_CORE[33] VDD_CORE[32] VDD_CORE[31] VDD_CORE[30] VDD_CORE[29] VDD_CORE[28] VDD_CORE[27] VDD_CORE[26] VDD_CORE[25] VDD_CORE[24] VDD_CORE[23] VDD_CORE[22] VDD_CORE[21] VDD_CORE[20] VDD_CORE[19] VDD_CORE[18] VDD_CORE[17] VDD_CORE[16] VDD_CORE[15] VDD_CORE[14] VDD_CORE[13] VDD_CORE[12] VDD_CORE[11] VDD_CORE[10] VDD_CORE[9] VDD_CORE[8] VDD_CORE[7] VDD_CORE[6] VDD_CORE[5] VDD_CORE[4] VDD_CORE[3] VDD_CORE[2] VDD_CORE[1] VDD_CORE[0]
10 of 17
X862035-001 BGA1443
IC
V_SOCPHY
EMPTY
V_3P3
EMPTY
1
C3T2 C3T7
1 UF 10%
6.3 V
2
X5R 402
1
1 UF 10%
6.3 V
2
X5R 402
V_SOC1P8VDD
C3R24
21
10%
1 UF
6.3 V X5R 402
U7E1
POWER
11 of 17
AJ18
VDD_095[4]
AH18
VDD_095[3]
AH17
VDD_095[2]
AG19
VDD_095[1]
AF18
VDD_095[0]
AG16
VDD_33[1]
AJ16
VDD_33[0]
AG15
VDD_18[3]
AH15
VDD_18[2]
AH14
VDD_18[1]
AJ14
21
FB 402
V_SOC1P8
1
2
EMPTY
FB6D1
120 OHM
1.3 A
0.09DCR
1
C7D3 C6D10
4.7 UF 10%
6.3 V
2
X5R 603
EMPTY
4.7 UF 10%
6.3 V X5R 603
IC
VDD_NB[14] VDD_NB[13] VDD_NB[12] VDD_NB[11] VDD_NB[10]
VDD_NB[9] VDD_NB[8] VDD_NB[7] VDD_NB[6] VDD_NB[5] VDD_NB[4] VDD_NB[3] VDD_NB[2] VDD_NB[1] VDD_NB[0]
VDD_085
VDDCR_MEM[9] VDDCR_MEM[8] VDDCR_MEM[7] VDDCR_MEM[6] VDDCR_MEM[5] VDDCR_MEM[4] VDDCR_MEM[3] VDDCR_MEM[2] VDDCR_MEM[1] VDDCR_MEM[0]
VDDBT_RTC_G
VBURN[1] VBURN[0]VDD_18[0]
BGA1443X862035-001
AJ23 AF24 AJ25 AD28 AD26 AH24 AE27 AE25 AF28 AF26 AG27 AG25 AH28 AH26 AJ27
AJ13
AE21 AJ19 AF22 AF20 AG23 AG21 AD24 AH22 AH20 AE23
AM25 AH12
AJ12
V_FUSE
EMPTY
1
C3R22
1 UF 10%
6.3 V
2
X5R 402
V_MEMCORE
EMPTY
V_BAT
EMPTY
1
C3T37
1 UF 10%
6.3 V
2
X5R 402
V_BURN
EMPTY
1
C3R21
1 UF 10%
6.3 V
2
X5R 402
[PAGE_TITLE=SOC PAGE 2]
Tue Jun 18 16:42:23 2013
DRAWING
GREYBULL_RETAIL
3/72 3/72 M 1.0
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REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_GFXCORE
EMPTY
U15 U13 U11 V23 V21 V19 V17 V15 V13 V11 W24 W22 W20 W18 W16 W14 W12 Y24 Y22 Y20 Y18 Y16 Y14
Y12 AA23 AA21 AA19 AA17 AA15 AA13 AA11 AB23 AB21 AB19 AB17 AB15 AB13 AB11 AC24 AC22 AC20 AC18 AC16 AC14 AC12 AD22 AD20 AD18 AD16 AD14 AD12 AE17 AE15 AE13 AE11 AF17 AF15 AF13 AF11 AG14 AG12
U7E1
VDD_GFX[60] VDD_GFX[59] VDD_GFX[58] VDD_GFX[57] VDD_GFX[56] VDD_GFX[55] VDD_GFX[54] VDD_GFX[53] VDD_GFX[52] VDD_GFX[51] VDD_GFX[50] VDD_GFX[49] VDD_GFX[48] VDD_GFX[47] VDD_GFX[46] VDD_GFX[45] VDD_GFX[44] VDD_GFX[43] VDD_GFX[42] VDD_GFX[41] VDD_GFX[40] VDD_GFX[39] VDD_GFX[38] VDD_GFX[37] VDD_GFX[36] VDD_GFX[35] VDD_GFX[34] VDD_GFX[33] VDD_GFX[32] VDD_GFX[31] VDD_GFX[30] VDD_GFX[29] VDD_GFX[28] VDD_GFX[27] VDD_GFX[26] VDD_GFX[25] VDD_GFX[24] VDD_GFX[23] VDD_GFX[22] VDD_GFX[21] VDD_GFX[20] VDD_GFX[19] VDD_GFX[18] VDD_GFX[17] VDD_GFX[16] VDD_GFX[15] VDD_GFX[14] VDD_GFX[13] VDD_GFX[12] VDD_GFX[11] VDD_GFX[10] VDD_GFX[9] VDD_GFX[8] VDD_GFX[7] VDD_GFX[6] VDD_GFX[5] VDD_GFX[4] VDD_GFX[3] VDD_GFX[2] VDD_GFX[1] VDD_GFX[0]
X862035-001
VDD_GFX
12 of 17
IC
VDD_GFX[120] VDD_GFX[119] VDD_GFX[118] VDD_GFX[117] VDD_GFX[116] VDD_GFX[115] VDD_GFX[114] VDD_GFX[113] VDD_GFX[112] VDD_GFX[111] VDD_GFX[110] VDD_GFX[109] VDD_GFX[108] VDD_GFX[107] VDD_GFX[106] VDD_GFX[105] VDD_GFX[104] VDD_GFX[103] VDD_GFX[102] VDD_GFX[101] VDD_GFX[100]
VDD_GFX[99] VDD_GFX[98] VDD_GFX[97] VDD_GFX[96] VDD_GFX[95] VDD_GFX[94] VDD_GFX[93] VDD_GFX[92] VDD_GFX[91] VDD_GFX[90] VDD_GFX[89] VDD_GFX[88] VDD_GFX[87] VDD_GFX[86] VDD_GFX[85] VDD_GFX[84] VDD_GFX[83] VDD_GFX[82] VDD_GFX[81] VDD_GFX[80] VDD_GFX[79] VDD_GFX[78] VDD_GFX[77] VDD_GFX[76] VDD_GFX[75] VDD_GFX[74] VDD_GFX[73] VDD_GFX[72] VDD_GFX[71] VDD_GFX[70] VDD_GFX[69] VDD_GFX[68] VDD_GFX[67] VDD_GFX[66] VDD_GFX[65] VDD_GFX[64] VDD_GFX[63] VDD_GFX[62] VDD_GFX[61]
BGA1443
V_GFXCORE
J23 J21 J19 J17 J15 J13 J11 K23 K21 K19 K17 K15 K13 K11 L24 L22 L20 L18 L16 L14 L12 M24 M22 M20 M18 M16 M14 M12 N23 N21 N19 N17 N15 N13 N11 P23 P21 P19 P17 P15 P13 P11 R24 R22 R20 R18 R16 R14 R12 T24 T22 T20 T18 T16 T14 T12 U23 U21 U19 U17
V_GFXCORE
EMPTY
EMPTY
A23 A21 A19 A17 A15 A13 A11 A10
A9 B23 B21 B19 B17 B15 B13 B11 B10 C24 C22 C20 C18 C16 C14 C12 C10 D24 D22 D20 D18 D16 D14 D12 D10 E23 E21 E19 E17 E15 E13 E11 F23 F21 F19 F17 F15 F13 F11 G24 G22 G20 G18 G16 G14 G12 H24 H22 H20 H18 H16 H14 H12
SOC POWER, V_GFXCORE + VSS
IC
VSS[120] VSS[119] VSS[118] VSS[117] VSS[116] VSS[115] VSS[114] VSS[113] VSS[112] VSS[111] VSS[110] VSS[109] VSS[108] VSS[107] VSS[106] VSS[105] VSS[104] VSS[103] VSS[102] VSS[101] VSS[100]
VSS[99] VSS[98] VSS[97] VSS[96] VSS[95] VSS[94] VSS[93] VSS[92] VSS[91] VSS[90] VSS[89] VSS[88] VSS[87] VSS[86] VSS[85] VSS[84] VSS[83] VSS[82] VSS[81] VSS[80] VSS[79] VSS[78] VSS[77] VSS[76] VSS[75] VSS[74] VSS[73] VSS[72] VSS[71] VSS[70] VSS[69] VSS[68] VSS[67] VSS[66] VSS[65] VSS[64] VSS[63] VSS[62] VSS[61]
U7E1
VDD_GFX
VDD_GFX[181] VDD_GFX[180] VDD_GFX[179] VDD_GFX[178] VDD_GFX[177] VDD_GFX[176] VDD_GFX[175] VDD_GFX[174] VDD_GFX[173] VDD_GFX[172] VDD_GFX[171] VDD_GFX[170] VDD_GFX[169] VDD_GFX[168] VDD_GFX[167] VDD_GFX[166] VDD_GFX[165] VDD_GFX[164] VDD_GFX[163] VDD_GFX[162] VDD_GFX[161] VDD_GFX[160] VDD_GFX[159] VDD_GFX[158] VDD_GFX[157] VDD_GFX[156] VDD_GFX[155] VDD_GFX[154] VDD_GFX[153] VDD_GFX[152] VDD_GFX[151] VDD_GFX[150] VDD_GFX[149] VDD_GFX[148] VDD_GFX[147] VDD_GFX[146] VDD_GFX[145] VDD_GFX[144] VDD_GFX[143] VDD_GFX[142] VDD_GFX[141] VDD_GFX[140] VDD_GFX[139] VDD_GFX[138] VDD_GFX[137] VDD_GFX[136] VDD_GFX[135] VDD_GFX[134] VDD_GFX[133] VDD_GFX[132] VDD_GFX[131] VDD_GFX[130] VDD_GFX[129] VDD_GFX[128] VDD_GFX[127] VDD_GFX[126] VDD_GFX[125] VDD_GFX[124] VDD_GFX[123] VDD_GFX[122] VDD_GFX[121]
13 of 17
X862035-001 BGA1443
IC
AN30 AN26 AN23 AN20 AN17 AN14 AN12
AN9
AN5 AP36 AP35 AP31 AP25 AP22 AP19 AP16 AP13
AP8
AP4
AP3 AR37 AR27 AR24 AR21 AR18 AR15
AR2 AT36 AT32 AT28 AT26 AT23 AT20 AT17 AT14 AT11
AT7
AT3 AU38 AU37 AU33 AU29 AU25 AU22 AU19 AU16 AU13 AU10
AU6
AU2
AU1 AV38 AV37 AV27 AV24 AV21 AV18 AV15 AV12
AV2
AV1
U7E1
VSS
14 of 17
VSS[60] VSS[59] VSS[58] VSS[57] VSS[56] VSS[55] VSS[54] VSS[53] VSS[52] VSS[51] VSS[50] VSS[49] VSS[48] VSS[47] VSS[46] VSS[45] VSS[44] VSS[43] VSS[42] VSS[41] VSS[40] VSS[39] VSS[38] VSS[37] VSS[36] VSS[35] VSS[34] VSS[33] VSS[32] VSS[31] VSS[30] VSS[29] VSS[28] VSS[27] VSS[26] VSS[25] VSS[24] VSS[23] VSS[22] VSS[21] VSS[20] VSS[19] VSS[18] VSS[17] VSS[16] VSS[15] VSS[14] VSS[13] VSS[12] VSS[11] VSS[10] VSS[9] VSS[8] VSS[7] VSS[6] VSS[5] VSS[4] VSS[3] VSS[2] VSS[1] VSS[0]
X862035-001 BGA1443
AF8 AF3 AG37 AG34 AG30 AG28 AG26 AG24 AG22 AG20 AG18 AG9 AG5 AG2 AH33 AH31 AH27 AH25 AH23 AH21 AH19 AH16 AH13 AH8 AH6 AJ30 AJ26 AJ24 AJ20 AJ17 AJ15 AJ9 AK36 AK31 AK29 AK23 AK10 AK8 AK3 AL37 AL34 AL30 AL28 AL25 AL22 AL19 AL16 AL12 AL9 AL5 AL2 AM33 AM27 AM24 AM21 AM18 AM15 AM13 AM6 AN34
AB31 AB28 AB26 AB24 AB22 AB20 AB18 AB16 AB14 AB12
AB8
AB3 AC37 AC34 AC30 AC27 AC23 AC21 AC19 AC17 AC15 AC13 AC11
AC9
AC5
AC2 AD33 AD31 AD27 AD25 AD23 AD21 AD19 AD17 AD15 AD13 AD11
AD8
AD6 AE30 AE28 AE26 AE24 AE22 AE20 AE18 AE16 AE14 AE12
AE9 AF36 AF31 AF27 AF25 AF23 AF21 AF19 AF16 AF14 AF12
U7E1
VSS[180] VSS[179] VSS[178] VSS[177] VSS[176] VSS[175] VSS[174] VSS[173] VSS[172] VSS[171] VSS[170] VSS[169] VSS[168] VSS[167] VSS[166] VSS[165] VSS[164] VSS[163] VSS[162] VSS[161] VSS[160] VSS[159] VSS[158] VSS[157] VSS[156] VSS[155] VSS[154] VSS[153] VSS[152] VSS[151] VSS[150] VSS[149] VSS[148] VSS[147] VSS[146] VSS[145] VSS[144] VSS[143] VSS[142] VSS[141] VSS[140] VSS[139] VSS[138] VSS[137] VSS[136] VSS[135] VSS[134] VSS[133] VSS[132] VSS[131] VSS[130] VSS[129] VSS[128] VSS[127] VSS[126] VSS[125] VSS[124] VSS[123] VSS[122] VSS[121]
X862035-001
VSS
15 of 17
IC
VSS[240] VSS[239] VSS[238] VSS[237] VSS[236] VSS[235] VSS[234] VSS[233] VSS[232] VSS[231] VSS[230] VSS[229] VSS[228] VSS[227] VSS[226] VSS[225] VSS[224] VSS[223] VSS[222] VSS[221] VSS[220] VSS[219] VSS[218] VSS[217] VSS[216] VSS[215] VSS[214] VSS[213] VSS[212] VSS[211] VSS[210] VSS[209] VSS[208] VSS[207] VSS[206] VSS[205] VSS[204] VSS[203] VSS[202] VSS[201] VSS[200] VSS[199] VSS[198] VSS[197] VSS[196] VSS[195] VSS[194] VSS[193] VSS[192] VSS[191] VSS[190] VSS[189] VSS[188] VSS[187] VSS[186] VSS[185] VSS[184] VSS[183] VSS[182] VSS[181]
BGA1443
U22 U20 U18 U16 U14 U12 U9 V36 V31 V28 V26 V24 V22 V20 V18 V16 V14 V12 V8 V3 W37 W34 W30 W27 W25 W23 W21 W19 W17 W15 W13 W11 W9 W5 W2 Y33 Y31 Y27 Y25 Y23 Y21 Y19 Y17 Y15 Y13 Y11 Y8 Y6 AA30 AA28 AA26 AA24 AA22 AA20 AA18 AA16 AA14 AA12 AA9 AB36
[PAGE_TITLE=SOC PAGE 3]
Tue Jun 18 16:42:24 2013
DRAWING
GREYBULL_RETAIL
4/72 4/72 M 1.0
Page 5
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
SOC, MEMORY PARTITION C + D
U7E1
13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 13 13 13 13 12 12 12 12 13 13 13 13 12 12 12 12 13 13 13 13
BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI
MD_DQ63 MD_DQ62 MD_DQ61 MD_DQ60 MD_DQ59 MD_DQ58 MD_DQ57 MD_DQ56 MD_DQ55 MD_DQ54 MD_DQ53 MD_DQ52 MD_DQ51 MD_DQ50 MD_DQ49 MD_DQ48 MD_DQ47 MD_DQ46 MD_DQ45 MD_DQ44 MD_DQ43 MD_DQ42 MD_DQ41 MD_DQ40 MD_DQ39 MD_DQ38 MD_DQ37 MD_DQ36 MD_DQ35 MD_DQ34 MD_DQ33 MD_DQ32 MD_DQ31 MD_DQ30 MD_DQ29 MD_DQ28 MD_DQ27 MD_DQ26 MD_DQ25 MD_DQ24 MD_DQ23 MD_DQ22 MD_DQ21 MD_DQ20 MD_DQ19 MD_DQ18 MD_DQ17 MD_DQ16 MD_DQ15 MD_DQ14 MD_DQ13 MD_DQ12 MD_DQ11 MD_DQ10 MD_DQ9 MD_DQ8 MD_DQ7 MD_DQ6 MD_DQ5 MD_DQ4 MD_DQ3 MD_DQ2 MD_DQ1 MD_DQ0 MD_DQSL_0_P MD_DQSL_0_N MD_DQSL_1_P MD_DQSL_1_N MD_DQSL_2_P MD_DQSL_2_N MD_DQSL_3_P MD_DQSL_3_N MD_DQSU_0_P MD_DQSU_0_N MD_DQSU_1_P MD_DQSU_1_N MD_DQSU_2_P MD_DQSU_2_N MD_DQSU_3_P MD_DQSU_3_N MD_DML_0 MD_DMU_0 MD_DML_1 MD_DMU_1 MD_DML_2 MD_DMU_2 MD_DML_3 MD_DMU_3
[PAGE_TITLE=SOC MEMORY PARTITION A & B]
P2
MD_DQ63
W1
MD_DQ62
N4
MD_DQ61
V2
MD_DQ60
N1
MD_DQ59
W3
MD_DQ58
P1
MD_DQ57
W4
MD_DQ56
Y2
MD_DQ55
M2
MD_DQ54
Y1
MD_DQ53
M1
MD_DQ52
T1
MD_DQ51
N3
MD_DQ50
U3
MD_DQ49
R4
MD_DQ48
M7
MD_DQ47
R6
MD_DQ46
M5
MD_DQ45
P7
MD_DQ44
M4
MD_DQ43
R8
MD_DQ42
N6
MD_DQ41
T4
MD_DQ40
L4
MD_DQ39
H1
MD_DQ38
L3
MD_DQ37
G4
MD_DQ36
L1
MD_DQ35
H2
MD_DQ34
K1
MD_DQ33
J1
MD_DQ32
H5
MD_DQ31
K5
MD_DQ30
H4
MD_DQ29
K4
MD_DQ28
G8
MD_DQ27
L6
MD_DQ26
H7
MD_DQ25
L8
MD_DQ24
G3
MD_DQ23
C1
MD_DQ22
G1
MD_DQ21
C3
MD_DQ20
F1
MD_DQ19
D2
MD_DQ18
E1
MD_DQ17
D1
MD_DQ16
C8
MD_DQ15
D5
MD_DQ14
E8
MD_DQ13
G6
MD_DQ12
D9
MD_DQ11
F5
MD_DQ10
B7
MD_DQ9
F4
MD_DQ8
A3
MD_DQ7
D6
MD_DQ6
B3
MD_DQ5
A7
MD_DQ4
D4
MD_DQ3
C6
MD_DQ2
C4
MD_DQ1
A6
MD_DQ0
B5
MD_DQSL_0_P
A5
MD_DQSL_0_N
E3
MD_DQSL_1_P
E4
MD_DQSL_1_N
J3
MD_DQSL_2_P
J4
MD_DQSL_2_N
R1
MD_DQSL_3_P
T2
MD_DQSL_3_N
E6
MD_DQSU_0_P
F7
MD_DQSU_0_N
J8
MD_DQSU_1_P
K7
MD_DQSU_1_N
P4
MD_DQSU_2_P
P5
MD_DQSU_2_N
U1
MD_DQSU_3_P
V1
MD_DQSU_3_N
A4
MD_DML_0
D7
MD_DMU_0
F2
MD_DML_1
J6
MD_DMU_1
K2
MD_DML_2
N8
MD_DMU_2
U4
MD_DML_3
R3
MD_DMU_3
X862035-001
MEM CHANNEL D
6 of 17
IC
MD_TEST
MD_CLK0_DP MD_CLK0_DN
MD_A15 MD_A14 MD_A13 MD_A12 MD_A11 MD_A10
MD_A9 MD_A8 MD_A7 MD_A6 MD_A5 MD_A4 MD_A3 MD_A2 MD_A1 MD_A0
MD_BA0 MD_BA1 MD_BA2
MD_CKE0 MD_CAS_N MD_RAS_N MD_CS0_N
MD_ODT0
MD_WE_N MD_RESET
MD_CKE1 MD_CS1_N
MD_ODT1
MD_VREFDQ MD_ZVDDIO
BGA1443
AG11
K9 J10
V7 W10 U10 W6 Y5 N10 V9 W7 U7 Y7 V4 R10 U8 Y4 W8 T9
T7 V5 U6
N7 L10 M9 R7 T5 P9 Y9 H9 F9 G10
G7 J7
MD_TEST
MD_CLK0_DP MD_CLK0_DN
MD_A<15> MD_A<14> MD_A<13> MD_A<12> MD_A<11> MD_A<10> MD_A<9> MD_A<8> MD_A<7> MD_A<6> MD_A<5> MD_A<4> MD_A<3> MD_A<2> MD_A<1> MD_A<0>
MD_BA<0> MD_BA<1> MD_BA<2>
MD_CKE0 MD_CAS_N MD_RAS_N MD_CS0_N MD_ODT0 MD_WE_N MD_RESET_N
MD_VREFDQ
402
R2R5
EMPTY
21
5%0 OHM
OUT OUT
BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI
BI BI BI
OUT OUT OUT OUT OUT OUT OUT
MD_VREFDQ_MM
MD_ZVDDIO
V_MEMIOCD
12 13 12 13
12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14 12 13 14
12 13 14 12 13 14 12 13 14
12 13 14
12 13 14 12 13 14 12 13 14 12 13
OUT
EMPTY
R3R14
1
40.2 OHM 1%
EMPTY
2
402
R3R13
1
40.2 OHM 1%
EMPTY
2
402
12 13 14
V_MEMIOCD
EMPTY
R2R6
1
16
40.2 OHM
16
1% CH
2
402
16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 16 16 16 16 15 15 15 15 16 16 16 16 15 15 15 15
16 16
BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI
MC_DQ63 MC_DQ62 MC_DQ61 MC_DQ60 MC_DQ59 MC_DQ58 MC_DQ57 MC_DQ56 MC_DQ55 MC_DQ54 MC_DQ53 MC_DQ52 MC_DQ51 MC_DQ50 MC_DQ49 MC_DQ48 MC_DQ47 MC_DQ46 MC_DQ45 MC_DQ44 MC_DQ43 MC_DQ42 MC_DQ41 MC_DQ40 MC_DQ39 MC_DQ38 MC_DQ37 MC_DQ36 MC_DQ35 MC_DQ34 MC_DQ33 MC_DQ32 MC_DQ31 MC_DQ30 MC_DQ29 MC_DQ28 MC_DQ27 MC_DQ26 MC_DQ25 MC_DQ24 MC_DQ23 MC_DQ22 MC_DQ21 MC_DQ20 MC_DQ19 MC_DQ18 MC_DQ17 MC_DQ16 MC_DQ15 MC_DQ14 MC_DQ13 MC_DQ12 MC_DQ11 MC_DQ10 MC_DQ9 MC_DQ8 MC_DQ7 MC_DQ6 MC_DQ5 MC_DQ4 MC_DQ3 MC_DQ2 MC_DQ1 MC_DQ0 MC_DQSL_0_P MC_DQSL_0_N MC_DQSL_1_P MC_DQSL_1_N MC_DQSL_2_P MC_DQSL_2_N MC_DQSL_3_P MC_DQSL_3_N MC_DQSU_0_P MC_DQSU_0_N MC_DQSU_1_P MC_DQSU_1_N MC_DQSU_2_P MC_DQSU_2_N MC_DQSU_3_P MC_DQSU_3_N MC_DML_0 MC_DMU_0 MC_DML_1 MC_DMU_1 MC_DML_2 MC_DMU_2 MC_DML_3 MC_DMU_3
AN8
AM11
AM8
AN10
AR7
AP11
AP9 AR11 AV11
AR8 AU11
AV7 AV10
AT8 AR10
AV8
AT2
AN6
AP2
AN4
AT1
AM7
AN3
AP7
AU7
AV3
AV6
AU3
AT6
AR4
AV5
AT4
AJ8
AL6
AH4
AL8
AH5
AM5
AJ6
AM4
AR1
AK1
AP1
AJ4
AN1
AK2
AM1
AL1
AC1
AG4
AB2
AG3
AB1
AH1
AC3
AH2
AJ3
AA3
AJ1
AA1
AE3
AA4
AE4
AD1
AD2
AE1
AL3
AL4
AV4
AU5
AU9
AV9
AF2
AG1
AK4
AK5
AP5
AR5
AM9 AM10
AF1
AC4
AM2
AK7
AR6
AR3 AT10
AR9
U7E1
MC_DQ63 MC_DQ62 MC_DQ61 MC_DQ60 MC_DQ59 MC_DQ58 MC_DQ57 MC_DQ56 MC_DQ55 MC_DQ54 MC_DQ53 MC_DQ52 MC_DQ51 MC_DQ50 MC_DQ49 MC_DQ48 MC_DQ47 MC_DQ46 MC_DQ45 MC_DQ44 MC_DQ43 MC_DQ42 MC_DQ41 MC_DQ40 MC_DQ39 MC_DQ38 MC_DQ37 MC_DQ36 MC_DQ35 MC_DQ34 MC_DQ33 MC_DQ32 MC_DQ31 MC_DQ30 MC_DQ29 MC_DQ28 MC_DQ27 MC_DQ26 MC_DQ25 MC_DQ24 MC_DQ23 MC_DQ22 MC_DQ21 MC_DQ20 MC_DQ19 MC_DQ18 MC_DQ17 MC_DQ16 MC_DQ15 MC_DQ14 MC_DQ13 MC_DQ12 MC_DQ11 MC_DQ10 MC_DQ9 MC_DQ8 MC_DQ7 MC_DQ6 MC_DQ5 MC_DQ4 MC_DQ3 MC_DQ2 MC_DQ1 MC_DQ0 MC_DQSL_0_P MC_DQSL_0_N MC_DQSL_1_P MC_DQSL_1_N MC_DQSL_2_P MC_DQSL_2_N MC_DQSL_3_P MC_DQSL_3_N MC_DQSU_0_P MC_DQSU_0_N MC_DQSU_1_P MC_DQSU_1_N MC_DQSU_2_P MC_DQSU_2_N MC_DQSU_3_P MC_DQSU_3_N MC_DML_0 MC_DMU_0 MC_DML_1 MC_DMU_1 MC_DML_2 MC_DMU_2 MC_DML_3 MC_DMU_3
MEM CHANNEL C
5 of 17
DRAWING
IC
MC_TEST
MC_CLK0_DP MC_CLK0_DN
MC_A15 MC_A14 MC_A13 MC_A12 MC_A11 MC_A10
MC_A9 MC_A8 MC_A7 MC_A6 MC_A5 MC_A4 MC_A3 MC_A2 MC_A1 MC_A0
MC_BA0 MC_BA1 MC_BA2
MC_CKE0 MC_CAS_N MC_RAS_N MC_CS0_N
MC_ODT0
MC_WE_N MC_RESET
MC_CKE1 MC_CS1_N
MC_ODT1
MC_VREFDQ MC_ZVDDIO
BGA1443X862035-001
AJ11
AK9 AJ10
AC8 AA7 AA10 AC6 AB4 AE10 AC7 AB9 AD9 AA8 AD5 AC10 AD7 AB5 AB7 AE7
AE8 AD4 AE6
AH9 AG10 AJ7 AF9 AF4 AG7 AA6 AH7 AF7 AG8
AL7 AL10
MC_TEST
MC_CLK0_DP MC_CLK0_DN
MC_A<15> MC_A<14> MC_A<13> MC_A<12> MC_A<11> MC_A<10> MC_A<9> MC_A<8> MC_A<7> MC_A<6> MC_A<5> MC_A<4> MC_A<3> MC_A<2> MC_A<1> MC_A<0>
MC_BA<0> MC_BA<1> MC_BA<2>
MC_CKE0 MC_CAS_N MC_RAS_N MC_CS0_N MC_ODT0 MC_WE_N MC_RESET_N
MC_VREFDQ
GREYBULL_RETAILTue Jun 18 16:42:18 2013
402
R3R4
EMPTY
21
5%0 OHM
MC_VREFDQ_MM
V_MEMIOCD
EMPTY
R3R16
1
40.2 OHM 1%
EMPTY
2
402
R3R15
1
15 16
OUT
15 16
OUT
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
15 16 17
BI
OUT
15 16 17
OUT
15 16 17
OUT
15 16 17
OUT
15 16 17
OUT
15 16 17
OUT
15 16
OUT
MC_ZVDDIO
5/72 5/72 M 1.0
40.2 OHM 1%
EMPTY
2
402
V_MEMIOCD
EMPTY
R3R5
1
40.2 OHM 1%
CH
2
402
OUT
Page 6
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 19 19 19 19 18 18 18 18 19 19 19 19 18 18 18 18 19 19 19 19
BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI
MB_DQ63 MB_DQ62 MB_DQ61 MB_DQ60 MB_DQ59 MB_DQ58 MB_DQ57 MB_DQ56 MB_DQ55 MB_DQ54 MB_DQ53 MB_DQ52 MB_DQ51 MB_DQ50 MB_DQ49 MB_DQ48 MB_DQ47 MB_DQ46 MB_DQ45 MB_DQ44 MB_DQ43 MB_DQ42 MB_DQ41 MB_DQ40 MB_DQ39 MB_DQ38 MB_DQ37 MB_DQ36 MB_DQ35 MB_DQ34 MB_DQ33 MB_DQ32 MB_DQ31 MB_DQ30 MB_DQ29 MB_DQ28 MB_DQ27 MB_DQ26 MB_DQ25 MB_DQ24 MB_DQ23 MB_DQ22 MB_DQ21 MB_DQ20 MB_DQ19 MB_DQ18 MB_DQ17 MB_DQ16 MB_DQ15 MB_DQ14 MB_DQ13 MB_DQ12 MB_DQ11 MB_DQ10 MB_DQ9 MB_DQ8 MB_DQ7 MB_DQ6 MB_DQ5 MB_DQ4 MB_DQ3 MB_DQ2 MB_DQ1 MB_DQ0 MB_DQSL_0_P MB_DQSL_0_N MB_DQSL_1_P MB_DQSL_1_N MB_DQSL_2_P MB_DQSL_2_N MB_DQSL_3_P MB_DQSL_3_N MB_DQSU_0_P MB_DQSU_0_N MB_DQSU_1_P MB_DQSU_1_N MB_DQSU_2_P MB_DQSU_2_N MB_DQSU_3_P MB_DQSU_3_N MB_DML_0 MB_DMU_0 MB_DML_1 MB_DMU_1 MB_DML_2 MB_DMU_2 MB_DML_3 MB_DMU_3
IC
MB_TEST
MB_CLK0_DP MB_CLK0_DN
MB_A15 MB_A14 MB_A13 MB_A12 MB_A11 MB_A10
MB_A9 MB_A8 MB_A7 MB_A6 MB_A5 MB_A4 MB_A3 MB_A2 MB_A1 MB_A0
MB_BA0 MB_BA1 MB_BA2
MB_CKE0 MB_CAS_N MB_RAS_N MB_CS0_N
MB_ODT0
MB_WE_N MB_RESET
MB_CKE1 MB_CS1_N
MB_ODT1
MB_VREFDQ MB_ZVDDIO
V37 N38 W38 P37 W36 N35 V38 N36 M37 Y38 M38 Y37 T38 W35 R35 U36 R33 M32 R31 N33 T35 M34 P32 M35 G35 L38 H37 L35 H38 L36 J35 K37 K34 H34 L33 H32 L31 H35 K35 G31 C36 G36 C38 G38 E35 F38 D38 E38 D34 C31 F34 B32 F35 E31 G33 D30 A32 B36 D33 A36 D35 A35 A33 C35 A34 B34 F37 E36 K38 J38 U38 T37 E33 D32 J31 J33 P35 P34 R38 P38 C33 F32 D37 K32 J36 N31 R36 U35
U7E1
MB_DQ63 MB_DQ62 MB_DQ61 MB_DQ60 MB_DQ59 MB_DQ58 MB_DQ57 MB_DQ56 MB_DQ55 MB_DQ54 MB_DQ53 MB_DQ52 MB_DQ51 MB_DQ50 MB_DQ49 MB_DQ48 MB_DQ47 MB_DQ46 MB_DQ45 MB_DQ44 MB_DQ43 MB_DQ42 MB_DQ41 MB_DQ40 MB_DQ39 MB_DQ38 MB_DQ37 MB_DQ36 MB_DQ35 MB_DQ34 MB_DQ33 MB_DQ32 MB_DQ31 MB_DQ30 MB_DQ29 MB_DQ28 MB_DQ27 MB_DQ26 MB_DQ25 MB_DQ24 MB_DQ23 MB_DQ22 MB_DQ21 MB_DQ20 MB_DQ19 MB_DQ18 MB_DQ17 MB_DQ16 MB_DQ15 MB_DQ14 MB_DQ13 MB_DQ12 MB_DQ11 MB_DQ10 MB_DQ9 MB_DQ8 MB_DQ7 MB_DQ6 MB_DQ5 MB_DQ4 MB_DQ3 MB_DQ2 MB_DQ1 MB_DQ0 MB_DQSL_0_P MB_DQSL_0_N MB_DQSL_1_P MB_DQSL_1_N MB_DQSL_2_P MB_DQSL_2_N MB_DQSL_3_P MB_DQSL_3_N MB_DQSU_0_P MB_DQSU_0_N MB_DQSU_1_P MB_DQSU_1_N MB_DQSU_2_P MB_DQSU_2_N MB_DQSU_3_P MB_DQSU_3_N MB_DML_0 MB_DMU_0 MB_DML_1 MB_DMU_1 MB_DML_2 MB_DMU_2 MB_DML_3 MB_DMU_3
MEM CHANNEL B
7 of 17
X862035-001 BGA1443
SOC, MEMORY PARTITION A + B
MA_DQ63 MA_DQ62 MA_DQ61 MA_DQ60 MA_DQ59 MA_DQ58 MA_DQ57 MA_DQ56 MA_DQ55 MA_DQ54 MA_DQ53 MA_DQ52 MA_DQ51 MA_DQ50 MA_DQ49 MA_DQ48 MA_DQ47 MA_DQ46 MA_DQ45 MA_DQ44 MA_DQ43 MA_DQ42 MA_DQ41 MA_DQ40 MA_DQ39 MA_DQ38 MA_DQ37 MA_DQ36 MA_DQ35 MA_DQ34 MA_DQ33 MA_DQ32 MA_DQ31 MA_DQ30 MA_DQ29 MA_DQ28 MA_DQ27 MA_DQ26 MA_DQ25 MA_DQ24 MA_DQ23 MA_DQ22 MA_DQ21 MA_DQ20 MA_DQ19 MA_DQ18 MA_DQ17 MA_DQ16 MA_DQ15 MA_DQ14 MA_DQ13 MA_DQ12 MA_DQ11 MA_DQ10 MA_DQ9 MA_DQ8 MA_DQ7 MA_DQ6 MA_DQ5 MA_DQ4 MA_DQ3 MA_DQ2 MA_DQ1 MA_DQ0 MA_DQSL_0_P MA_DQSL_0_N MA_DQSL_1_P MA_DQSL_1_N MA_DQSL_2_P MA_DQSL_2_N MA_DQSL_3_P MA_DQSL_3_N MA_DQSU_0_P MA_DQSU_0_N MA_DQSU_1_P MA_DQSU_1_N MA_DQSU_2_P MA_DQSU_2_N MA_DQSU_3_P MA_DQSU_3_N MA_DML_0 MA_DMU_0 MA_DML_1 MA_DMU_1 MA_DML_2 MA_DMU_2 MA_DML_3 MA_DMU_3
AJ28
K30 J29
V32 W29 U29 W33 Y34 N29 V30 W32 U32 Y32 V35 R29 U31 Y35 W31 T30
T32 V34 U33
N32 L29 M30 R32 T34 P30 Y30 H30 F30 G29
G32 J32
MB_TEST
MB_CLK0_DP MB_CLK0_DN
MB_A<15> MB_A<14> MB_A<13> MB_A<12> MB_A<11> MB_A<10> MB_A<9> MB_A<8> MB_A<7> MB_A<6> MB_A<5> MB_A<4> MB_A<3> MB_A<2> MB_A<1> MB_A<0>
MB_BA<0> MB_BA<1> MB_BA<2>
MB_CKE0 MB_CAS_N MB_RAS_N MB_CS0_N MB_ODT0 MB_WE_N MB_RESET_N
402
R2T2
EMPTY
21
5%0 OHM
OUT OUT
OUT OUT OUT OUT OUT OUT OUT
MB_VREFDQ_MMMB_VREFDQ
BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI
BI BI BI
18 19 18 19
18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20 18 19 20
18 19 20 18 19 20 18 19 20
20 19 18
18 19 20 18 19 20 18 19 20 18 19 20 18 19
MB_ZVDDIO
V_MEMIOAB
EMPTY
R3T10
1
40.2 OHM 1%
EMPTY
2
402
R3T13
1
40.2 OHM 1%
EMPTY
2
402
V_MEMIOAB
OUT
EMPTY
R2T1
1
40.2 OHM 1%
CH
2
402
22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 22 22 22 22 21 21 21 21 22 22 22 22 21 21 21 21 22 22 22 22
BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI
AM28 AN31 AP28 AM30 AR28 AM31 AN29 AR32 AV32 AU28 AR31 AV28 AT31 AV29 AR29 AT29 AN33 AT37 AM32 AR36 AP32 AP37 AR34 AT38 AU36 AV33 AV36 AU32 AR35 AT33 AV35 AR33 AL33 AJ31 AM34 AJ33 AM35 AH35 AL31 AH34 AJ35 AP38 AK38 AR38 AK37 AM37 AM38 AN38 AG36 AB37 AG35 AC38 AH38 AB38 AG38 AA35 AA38 AJ38 AA36 AJ36 AE38 AH37 AD37 AF38 AE35 AE36 AL35 AL36 AV34 AU34 AU30 AV30 AC35 AC36 AK34 AK35 AN35 AN36 AR30 AP30 AD38 AF37 AL38 AK32 AT35 AP34 AV31 AM29
U7E1
MA_DQ63 MA_DQ62 MA_DQ61 MA_DQ60 MA_DQ59 MA_DQ58 MA_DQ57 MA_DQ56 MA_DQ55 MA_DQ54 MA_DQ53 MA_DQ52 MA_DQ51 MA_DQ50 MA_DQ49 MA_DQ48 MA_DQ47 MA_DQ46 MA_DQ45 MA_DQ44 MA_DQ43 MA_DQ42 MA_DQ41 MA_DQ40 MA_DQ39 MA_DQ38 MA_DQ37 MA_DQ36 MA_DQ35 MA_DQ34 MA_DQ33 MA_DQ32 MA_DQ31 MA_DQ30 MA_DQ29 MA_DQ28 MA_DQ27 MA_DQ26 MA_DQ25 MA_DQ24 MA_DQ23 MA_DQ22 MA_DQ21 MA_DQ20 MA_DQ19 MA_DQ18 MA_DQ17 MA_DQ16 MA_DQ15 MA_DQ14 MA_DQ13 MA_DQ12 MA_DQ11 MA_DQ10 MA_DQ9 MA_DQ8 MA_DQ7 MA_DQ6 MA_DQ5 MA_DQ4 MA_DQ3 MA_DQ2 MA_DQ1 MA_DQ0 MA_DQSL_0_P MA_DQSL_0_N MA_DQSL_1_P MA_DQSL_1_N MA_DQSL_2_P MA_DQSL_2_N MA_DQSL_3_P MA_DQSL_3_N MA_DQSU_0_P MA_DQSU_0_N MA_DQSU_1_P MA_DQSU_1_N MA_DQSU_2_P MA_DQSU_2_N MA_DQSU_3_P MA_DQSU_3_N MA_DML_0 MA_DMU_0 MA_DML_1 MA_DMU_1 MA_DML_2 MA_DMU_2 MA_DML_3 MA_DMU_3
MEM CHANNEL A
8 of 17
IC
MA_TEST
MA_CLK0_DP MA_CLK0_DN
MA_A15 MA_A14 MA_A13 MA_A12 MA_A11 MA_A10
MA_A9 MA_A8 MA_A7 MA_A6 MA_A5 MA_A4 MA_A3 MA_A2 MA_A1 MA_A0
MA_BA0 MA_BA1 MA_BA2
MA_CKE0 MA_CAS_N MA_RAS_N MA_CS0_N
MA_ODT0
MA_WE_N MA_RESET
MA_CKE1 MA_CS1_N
MA_ODT1
MA_VREFDQ MA_ZVDDIO
AK28
AK30 AJ29
AC31 AA32 AA29 AC33 AB35 AE29 AC32 AB30 AD30 AA31 AD34 AC29 AD32 AB34 AB32 AE32
AE31 AD35 AE33
AH30 AG29 AJ32 AF30 AF35 AG32 AA33 AH32 AF32 AG31
AL32 AL29
MA_VREFDQ
BGA1443X862035-001
GREYBULL_RETAIL
MA_TEST
MA_CLK0_DP MA_CLK0_DN
MA_A<15> MA_A<14> MA_A<13> MA_A<12> MA_A<11> MA_A<10> MA_A<9> MA_A<8> MA_A<7> MA_A<6> MA_A<5> MA_A<4> MA_A<3> MA_A<2> MA_A<1> MA_A<0>
MA_BA<0> MA_BA<1> MA_BA<2>
MA_CKE0 MA_CAS_N MA_RAS_N MA_CS0_N MA_ODT0 MA_WE_N MA_RESET_N
R3T18
0 OHM 5%
402
V_MEMIOAB
EMPTY
R3T12
1
40.2 OHM 1%
EMPTY
2
402
R3T14
1
21 22
OUT
21 22
OUT
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
21 22 23
BI
23
23
21
22
OUT OUT OUT OUT OUT OUT OUT
MA_VREFDQ_MM
21
EMPTY
6/72 6/72 M 1.0
22
21 21 22 23 21 22 23 21 22 23 21 22 23 21 22
MA_ZVDDIO
40.2 OHM 1%
EMPTY
2
402
V_MEMIOAB
OUT
EMPTY
R3T17
1
40.2 OHM 1%
CH
2
402
Page 7
SOC VSS + SPARE
8 1234567
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B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
M13 M11
M8
M6 N30 N28 N26 N24 N22 N20 N18 N16 N14 N12
N9 P36 P31 P28 P26 P24 P22 P20 P18 P16 P14 P12
P8
P3 R37 R34 R30 R27 R25 R23 R21 R19 R17 R15 R13 R11
R9
R5
R2 T33 T31 T27 T25 T23 T21 T19 T17 T15 T13 T11
T8
T6 U30 U28 U26 U24
U7E1
VSS/SPARE
VSS[300] VSS[299] VSS[298] VSS[297] VSS[296] VSS[295] VSS[294] VSS[293] VSS[292] VSS[291] VSS[290] VSS[289] VSS[288] VSS[287] VSS[286] VSS[285] VSS[284] VSS[283] VSS[282] VSS[281] VSS[280] VSS[279] VSS[278] VSS[277] VSS[276] VSS[275] VSS[274] VSS[273] VSS[272] VSS[271] VSS[270] VSS[269] VSS[268] VSS[267] VSS[266] VSS[265] VSS[264] VSS[263] VSS[262] VSS[261] VSS[260] VSS[259] VSS[258] VSS[257] VSS[256] VSS[255] VSS[254] VSS[253] VSS[252] VSS[251] VSS[250] VSS[249] VSS[248] VSS[247] VSS[246] VSS[245] VSS[244] VSS[243] VSS[242] VSS[241]
16 of 17
VSS[360] VSS[359] VSS[358] VSS[357] VSS[356] VSS[355] VSS[354] VSS[353] VSS[352] VSS[351] VSS[350] VSS[349] VSS[348] VSS[347] VSS[346] VSS[345] VSS[344] VSS[343] VSS[342] VSS[341] VSS[340] VSS[339] VSS[338] VSS[337] VSS[336] VSS[335] VSS[334] VSS[333] VSS[332] VSS[331] VSS[330] VSS[329] VSS[328] VSS[327] VSS[326] VSS[325] VSS[324] VSS[323] VSS[322] VSS[321] VSS[320] VSS[319] VSS[318] VSS[317] VSS[316] VSS[315] VSS[314] VSS[313] VSS[312] VSS[311] VSS[310] VSS[309] VSS[308] VSS[307] VSS[306] VSS[305] VSS[304] VSS[303] VSS[302] VSS[301]
X862035-001 BGA1443
IC
SPARE4 SPARE3 SPARE2 SPARE1
H31 H27 H25 H23 H21 H19 H17 H15 H13 H11 H8 H6 J30 J28 J26 J24 J22 J20 J18 J16 J14 J12 J9 K36 K31 K28 K26 K24 K22 K20 K18 K16 K14 K12 K8 K3 L37 L34 L30 L27 L25 L23 L21 L19 L17 L15 L13 L11 L9 L5 L2 M33 M31 M27 M25 M23 M21 M19 M17 M15 L7 L32 AG33 AG6
SOC_SPARE4 SOC_SPARE3 SOC_SPARE2 SOC_SPARE1
EMPTY EMPTY
1 1
DB2R1 DB2T1
BI BI
E26 E24 E22 E20 E18 E16 E14 E12
E9
E2 F36 F31 F28 F26 F24 F22 F20 F18 F16 F14 F12
F8
F3 G37 G34 G30 G27 G25 G23 G21 G19 G17 G15 G13 G11
G9
G5
G2 H33
U7E1
VSS[399] VSS[398] VSS[397] VSS[396] VSS[395] VSS[394] VSS[393] VSS[392] VSS[391] VSS[390] VSS[389] VSS[388] VSS[387] VSS[386] VSS[385] VSS[384] VSS[383] VSS[382] VSS[381] VSS[380] VSS[379] VSS[378] VSS[377] VSS[376] VSS[375] VSS[374] VSS[373] VSS[372] VSS[371] VSS[370] VSS[369] VSS[368] VSS[367] VSS[366] VSS[365] VSS[364] VSS[363] VSS[362] VSS[361]
VSS
17 of 17
VSS[461] VSS[460] VSS[459] VSS[458] VSS[457] VSS[456] VSS[455] VSS[454] VSS[453] VSS[452] VSS[451] VSS[450] VSS[449] VSS[448] VSS[447] VSS[446] VSS[445] VSS[444] VSS[443] VSS[442] VSS[441] VSS[440] VSS[439] VSS[438] VSS[437] VSS[436] VSS[435] VSS[434] VSS[433] VSS[432] VSS[431] VSS[430] VSS[429] VSS[428] VSS[427] VSS[426] VSS[425] VSS[424] VSS[423] VSS[422] VSS[421] VSS[420] VSS[419] VSS[418] VSS[417] VSS[416] VSS[415] VSS[414] VSS[413] VSS[412] VSS[411] VSS[410] VSS[409] VSS[408] VSS[407] VSS[406] VSS[405] VSS[404] VSS[403] VSS[402] VSS[401] VSS[400]
X862035-001 BGA1443
IC
A38 A37 A28 A26 A24 A22 A20 A18 A16 A14 A12 A2 B38 B37 B35 B33 B28 B26 B24 B22 B20 B18 B16 B14 B12 B6 B4 B2 B1 C37 C34 C32 C29 C27 C25 C23 C21 C19 C17 C15 C13 C11 C7 C5 C2 D36 D31 D29 D27 D25 D23 D21 D19 D17 D15 D13 D11 D8 D3 E37 E30 E28
[PAGE_TITLE=SOC PAGE 4]
Tue Jun 18 16:42:24 2013
DRAWING
GREYBULL_RETAIL
7/72 7/72 M 1.0
Page 8
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
29
V_SOC1P8
0 OHM 5%
IN
BI
R4R22
1
10 KOHM 5%
CH
2
402
R3R18
1
10 KOHM 5%
EMPTY
2
402
R3T7
EMPTY
402
X32K_X1
V_SOC1P8
1
2
1
2
21
R3T21
10 KOHM 5%
EMPTY 402
R3T22
10 KOHM 5%
CH 402
1
2
R3T8
0 OHM 5%
CH 402
0 OHM
402
DB3T4
1
R3T9
EMPTY
5%
51
21
DB651
1
OUT
26
58
51
68 68 68 68 68 68 68
26 68 26
68 70 68 70
SOC DEBUG + SB SIGNALS
U7E1
JTAG/DEBUG
4 of 17
ATE_TSTCLK_EN
BI
A0_BYPASS SOC_THERMTRIP
OUT
X32K_X2 X32K_X1_R
GPIO_3P3_3
BI
GPIO_3P3_2
BI
GPIO_3P3_1
BI
VREG_BURN_EN
BI
VREG_MEMCORE_VID1 VREG_MEMCORE_VID0
OUT
GPIO_1P8_1 GPIO_1P8_0
BI
GPIO_POSTOUT_5
BI
GPIO_POSTOUT_4
BI
GPIO_POSTOUT_3
BI
GPIO_POSTOUT_2
BI
GPIO_POSTOUT_1
BI
GPIO_POSTOUT_0
BI
DBREQ_L
IN
DBRDY
OUT
TRST_L
IN
TMS
IN
TDO
OUT
TDI
IN
TCK
IN
SOC_RST_N
IN
SOC_PWR_OK
IN
SOC_TEST32_P
BI
SOC_TEST32_N SIC
BI
SOC_TEST30_P
BI
SOC_TEST30_N
BI
SOC_TEST28_P
BI
SOC_TEST28_N
BI
TEST19
IN
TEST18
IN
TEST17
OUT
TEST16
OUT
TEST15
OUT
TEST14
OUT
TEST10
IN
TEST9
IN
SOC_TEST6
BI
SOC_TEST5
BI
SOC_TEST4
BI
AK11 AL24
AK16 AN15 AM23
AN24
AK19 AN25 AK21 AK20 AL21 AL20 AM19 AM17 AM26 AR25 AP27 AP26 AR26 AT27
AK26 AL26 AN27 AK24 AK25 AK22 AL23
AR17 AR16
AL18 AK18 AK17 AL17 AL15 AK15 AJ21 AL27 AL11 AK13 AL14 AM16 AK12 AM14 AJ22 AK14 AL13
ATE_TSTCLK_EN DLY_PSP_RESET
A0_BYPASS THERMTRIP* X32K_X2
X32K_X1 NEW_GPIO13
NEW_GPIO12 NEW_GPIO11 NEW_GPIO10 NEW_GPIO9 NEW_GPIO8 NEW_GPIO7 NEW_GPIO6 NEW_GPIO5 NEW_GPIO4 NEW_GPIO3 NEW_GPIO2 NEW_GPIO1 NEW_GPIO0
DBREQ_N DBRDY TRST_N TMS TDO TDI TCK
RESET_N PWROK
TEST32_P TEST30_P
TEST30_N TEST28_P TEST28_N TEST19 TEST18 TEST17 TEST16 TEST15 TEST14 TEST10 TEST9 TEST6 TEST5 TEST4
VDDCR_MEM_SENSE
VDD_MEM0_SENSE VDD_MEM1_SENSE
VDD_CORE_SENSE
IC
TMON_CAL1 TMON_CAL0
PSEN
ALERT_N
SVT SVD SVC SID SICTEST32_N
RTCCLK M_VREF
VSS_GFX_SENSE VDD_GFX_SENSE
VDD_NB_SENSE
VDD_095_SENSE
TMON_CAL1
AM22
TMON_CAL0
AM20
AG13
SP_SMC_INT_N
AN16
SVT
E10
SVD
C9
SVC
F10
SID
AP18 AP17
RTCCLK
AK27
M_VREF
AH11
SOC_MEMCORE_S
AE19
SOC_MEMIOAB_S
AF5
SOC_MEMIOCD_S
AF34
SOC_GFXCPU_S_RTN
B8
SOC_GFXCORE_S
B9
SOC_NBCORE_S
AC25
SOC_CPUCORE_S
A8 AG17
V_SOC1P8
R5T13
1
10 KOHM 5%
CH
2
402
BI BI
OUT
IN
BI
OUT
BI
IN
BI BI
BI OUT OUT
BI OUT
26
44 44 44
8
8 44 8 45
8 44
R3T4
2 1
CH
R3T2
2 1
CH
V_SOCPHY
243 OHM1%
402
243 OHM1%
402
SB_SOC_DATA
SB_SOC_CLK
BI
IN
26
26
[PAGE_TITLE=SOC PAGE 4]
X862035-001
V_MEMIOCD
EMPTY
R3R3
1
1 KOHM 1%
CH
2
402 R3R2
1
1 KOHM 1%
CH
2
402
M_VREF
1
2
C3R20
1 UF 10%
6.3 V X5R 402
BGA1443
OUT
V_CPUCORE
EMPTY
V_GFXCORE
EMPTY
DB1T2 DB2R4 DB2R5
EMPTY EMPTY
1
EMPTY
1 1
EMPTY
8
8
8 8
SOC_CPUCORE_S
IN
SOC_GFXCORE_S
IN
SOC_GFXCPU_S_RTN
IN
EMPTY
1
EMPTY
1 1
DB2R6 DB2R2 DB2R3
Tue Jun 18 16:42:29 2013
DRAWING
GREYBULL_RETAIL
8/72 8/72 M 1.0
Page 9
SOC, DECOUPLING
8 1234567
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_GFXCORE
EMPTY
42 0805 22UF
C2T17
21
20%
22 UF
6.3 V X7R 805
C2T39
21
20%22 UF
6.3 V X7R 805
C2T32
21
22 UF 20%
6.3 V X7R 805
C2R33
21
22 UF 20%
6.3 V X7R 805
C2T10
21
22 UF 20%
6.3 V X7R 805
C2R23
21
22 UF 20%
6.3 V X7R 805
C2R9
21
22 UF 20%
6.3 V X7R 805
C2R13 C2T38
21 21
22 UF 20%
6.3 V X7R 805
C8D3
21
22 UF 20%
6.3 V X7R 805
C2R12
21
22 UF 20%
6.3 V X7R 805
22 UF
22 UF 20%
22 UF
22 UF 20%
22 UF
22 UF 20%
22 UF 20%
22 UF 20%
22 UF 20%
22 UF 20%
C8E3
6.3 V X7R 805
C2R34
6.3 V X7R 805
C2R38
6.3 V X7R 805
C2T11
6.3 V X7R 805
C2R16
6.3 V X7R 805
C8D5
6.3 V X7R 805
C2T13
6.3 V X7R 805
6.3 V X7R 805
C2R18
6.3 V X7R 805
C2R19
6.3 V X7R 805
20%
20%
20%
C3R19
10 UF 10%
6.3 V X5R 805
C2T4
10 UF 10%
6.3 V X5R 805
C2T3
10 UF
10%
6.3 V X5R 805
C2T2
10 UF
10%
6.3 V X5R 805
C2T1
10 UF
10%
6.3 V X5R 805
C3T3
10%
10 UF
6.3 V X5R 805
C3R18
10%10 UF
6.3 V X5R 805
C3R17
10%10 UF
6.3 V X5R 805
C2T41
10 UF 10%
6.3 V X5R 805
44 0805 10UF
21
21
21
21
21
21
21
21
21
C3R16
10 UF 10%
6.3 V X5R 805
C2T9
10 UF
10%
6.3 V X5R 805
C2T8
10 UF 10%
6.3 V X5R 805
C2T40
10 UF 10%
6.3 V X5R 805
C2T24
10 UF
10%
6.3 V X5R 805
C3T4
10 UF 10%
6.3 V X5R 805
C2R32
10 UF 10%
6.3 V X5R 805
C2R31
10 UF 10%
6.3 V X5R 805
C2R30
10 UF 10%
6.3 V X5R 805
C2R29
10 UF 10%
6.3 V X5R 805
21
21
21
21
21
21
C2R28
10 UF 10%
6.3 V X5R 805
C2R27
10 UF 10%
6.3 V X5R 805
C2R26
10 UF 10%
6.3 V X5R 805
C2R25
10 UF 10%
6.3 V X5R 805
C2R24
10 UF 10%
6.3 V X5R 805
C2T5
10 UF 10%
6.3 V X5R 805
21
21
21
21
21
21
C2T21
10 UF
10%
6.3 V X5R 805
C2T20
10 UF 10%
6.3 V X5R 805
C2T19
10 UF 10%
6.3 V X5R 805
C2T18
10 UF
10%
6.3 V X5R 805
C2T45
10 UF 10%
6.3 V X5R 805
C2T43
10 UF
10%
6.3 V X5R 805
21
21
21
21
21
21
C2T26
10%10 UF
6.3 V X5R 805
C2T25
10%
10 UF
6.3 V X5R 805
C2T44
10%10 UF
6.3 V X5R 805
C2T42
10 UF 10%
6.3 V X5R 805
C2T27
10 UF 10%
6.3 V X5R 805
21
21
21
21
21
21
21
21
21
C2T6
10 UF 10%
6.3 V X5R 805
C2T7
10 UF 10%
6.3 V X5R 805
C2T23
10 UF 10%
6.3 V X5R 805
C2T22
10 UF 10%
6.3 V X5R 805
21
21
21
21
C2T31
10 UF 10%
6.3 V X5R 805
C2T30
10 UF 10%
6.3 V X5R 805
C2T29
10 UF 10%
6.3 V X5R 805
C2T28
10 UF 10%
6.3 V X5R 805
21
21
21
21
V_GFXCORE
EMPTY
21
21
21
21
21
21
21
21
21
C2T36
22 UF 20%
6.3 V X7R 805
C2R10
22 UF
20%
6.3 V X7R 805
C2T14
22 UF 20%
6.3 V X7R 805
C2T34
22 UF
20%
6.3 V X7R 805
C2R35
22 UF 20%
6.3 V X7R 805
C2T12
22 UF 20%
6.3 V X7R 805
C2T37
22 UF 20%
6.3 V X7R 805
22 UF 20%
6.3 V X7R 805
C8D6
22 UF 20%
6.3 V X7R 805
C8E2
22 UF 20%
6.3 V X7R 805
C2R40
21
20%22 UF
6.3 V X7R 805
21
21
21
21
21
21
21
21
21
C2R20
22 UF 20%
6.3 V X7R 805
C2R21
22 UF
20%
6.3 V X7R 805
C2R39
22 UF 20%
6.3 V X7R 805
C2T33
22 UF
20%
6.3 V X7R 805
C2T15
22 UF
20%
6.3 V X7R 805
C2R37
22 UF 20%
6.3 V X7R 805
C2R36
22 UF 20%
6.3 V X7R 805
C2T35C2R22
22 UF 20%
6.3 V X7R 805
C2R11
22 UF 20%
6.3 V X7R 805
C2R17
22 UF 20%
6.3 V X7R 805
C2T16
22 UF 20%
6.3 V X7R 805
21
21
21
21
21
21
21
2121
21
21
21
[PAGE_TITLE=GCPU, DECOUPLING]
Tue Jun 18 16:42:26 2013
DRAWING
GREYBULL_RETAIL
9/72 9/72 M 1.0
Page 10
SOC, DECOUPLING
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
C3T33
2 1
10 UF10%
6.3 V X5R 805
C2T68
2 1
10%
10 UF
6.3 V X5R 805
V_CPUCORE
EMPTY
10 0805 22UF
13 0805 10UF
C2T61
21
10 UF 10%
6.3 V X5R 805
C2T60
21
10 UF 10%
6.3 V X5R 805
C2T59
21
10%10 UF
6.3 V X5R 805
C2T58
21
10%
10 UF
6.3 V X5R 805
C2T57
21
10%10 UF
6.3 V X5R 805
C2T56
21
10%10 UF
6.3 V X5R 805
C2T55
21
10%10 UF
6.3 V X5R 805
C2T54
21
10 UF
10%
6.3 V X5R 805
C2T53
21
10%10 UF
6.3 V X5R 805
C3T34
21
10 UF
10%
6.3 V X5R 805
I75
C2T66
22 UF 20%
6.3 V X7R 805
C2T67
22 UF 20%
6.3 V X7R 805
C2T51
22 UF 20%
6.3 V X7R 805
C2T62
20%
22 UF
6.3 V X7R 805
C2T49
22 UF 20%
6.3 V X7R 805
C2T63
22 UF 20%
6.3 V X7R 805
C2T64
22 UF 20%
6.3 V X7R 805
C2T65
22 UF
20%
6.3 V X7R 805
C2T52
22 UF
20%
6.3 V X7R 805
C2T50
22 UF
20%
6.3 V X7R 805
21
21
21
21
21
21
21
21
21
21
[PAGE_TITLE=GCPU, DECOUPLING]
I73
C8E7
20%
22 UF
6.3 V X7R 805
C8E9
22 UF 20%
6.3 V X7R 805
C2T80
20%
22 UF
6.3 V X7R 805
C8E4
20%22 UF
6.3 V X7R 805
C8E6
20%22 UF
6.3 V X7R 805
C2T47
20%22 UF
6.3 V X7R 805
C2T71
22 UF 20%
6.3 V X7R 805
C2T46
20%22 UF
6.3 V X7R 805
C2T72
22 UF
20%
6.3 V X7R 805
C2T48
20%22 UF
6.3 V X7R 805
C2T70
20%22 UF
6.3 V X7R 805
C2T73
20%22 UF
6.3 V X7R 805
V_SOCPHY
EMPTY
V_NBCORE
EMPTY
V_MEMCORE
EMPTY
C3T27
1 UF
10%
6.3 V X5R 402
C3T29
1 UF
10%
6.3 V X5R 402
C3T30
10%1 UF
6.3 V X5R 402
C3T28
1 UF
10%
6.3 V X5R 402
C3T25
1 UF 10%
6.3 V X5R 402
C3T26
1 UF
10%
6.3 V X5R 402
C3T36
10%
1 UF
6.3 V X5R 402
C3T24
10%
1 UF
6.3 V X5R 402
C3T35
10%
1 UF
6.3 V X5R 402
C3T31
10%1 UF
6.3 V X5R 402
C3T32
10 UF
6.3 V X5R 805
21
21
21
21
21
21
21
21
21
21
10%
C5U8
21
20%22 UF
6.3 V X7R 805
C4U6
21
20%22 UF
6.3 V X7R 805
C4U7
21
20%22 UF
6.3 V X7R 805
C5U7
21
22 UF 20%
6.3 V X7R 805
C4U8
21
20%22 UF
6.3 V X7R 805
C5F14
21
20%
22 UF
6.3 V
EMPTY
805
C5F13
21
20%22 UF
6.3 V
EMPTY
805
C6F10
21
22 UF
20%
6.3 V
EMPTY
805
C6F8
21
20%22 UF
6.3 V
EMPTY
805
C6F7
21
20%22 UF
6.3 V
EMPTY
805
21
C3T21
4.7 UF
6.3 V
C3T19
4.7 UF
6.3 V
C3T53
4.7 UF
6.3 V
C3T23
4.7 UF
6.3 V
C3T20
4.7 UF
6.3 V
C3T22
6.3 V
C3T5
22 UF
C3T1
22 UF
C3T56
22 UF
C3T57
22 UF
C3T6
X5R 402
X5R 402
X5R 402
X5R 402
X5R 402
X5R 402
4 V X5R 603
4 V X5R 603
4 V X5R 603
4 V X5R 603
4 V X5R 603
21
20%
21
20%
21
20%
21
20%
21
20%
21
20%4.7 UF
21
20%
21
20%
21
20%
21
20%
21
20%22 UF
C5T3
22 UF
6.3 V X7R 805
C5T2
6.3 V X7R 805
C5T1
22 UF
6.3 V X7R 805
C4T20
6.3 V X7R 805
C4T19
22 UF
6.3 V X7R 805
20%
20%22 UF
20%
20%22 UF
20%
21
21
21
21
21
GREYBULL_RETAIL
10/72 10/72 M 1.0
C3T8
21
1 UF
10%
6.3 V X5R 402
C3T15
21
1 UF 10%
6.3 V X5R 402
C3T16
21
21
21
21
21
21
21
21
21
21
10%
1 UF
6.3 V X5R 402
C3T12
1 UF 10%
6.3 V X5R 402
C3T11
1 UF 10%
6.3 V X5R 402
21
21
21
Page 11
SOC, DECOUPLING
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOCD
EMPTY
C3R7
10%0.22 UF
6.3 V X5R 402
C2R4
10%0.22 UF
6.3 V X5R 402
C3R10
6.3 V X5R 402
C3R9
6.3 V X5R 402
C3R8
6.3 V X5R 402
C3R11
6.3 V X5R 402
C3R12
6.3 V X5R 402
C2R3
6.3 V X5R 402
C2R5
6.3 V X5R 402
C2R6
6.3 V X5R 402
10%
10%
10%0.22 UF
0.22 UF
0.22 UF
0.22 UF 10%
0.22 UF 10%
0.22 UF 10%
0.22 UF 10%
0.22 UF 10%
V_MEMIOCD
EMPTY
C2R7
6.3 V X5R 402
C3R5
6.3 V X5R 402
6.3 V X5R 402
C3R6
6.3 V X5R 402
C2R8
6.3 V X5R 402
6.3 V X5R 402
C3R15
6.3 V X5R 402
C2R15
6.3 V X5R 402
C2R14
6.3 V X5R 402
6.3 V X5R 402
21
21
10%
21
21
10%
10%
21
V_MEMIOCD
21
10%
21
10%0.22 UF
10%0.22 UF
21
0.22 UF 10%
21
0.22 UF
21
0.22 UF 10%
21
0.22 UF 10%
21
0.22 UF
21
0.22 UF
21
0.22 UF 10%
21
0.22 UF
21
21
C3R3
10 UF 20%
6.3 V
C3R2
6.3 V
C2R1
10 UF 20%
6.3 V
C2R2
10 UF 20%
6.3 V
EMPTY
C2R42
1 UF 10%
6.3 V
C2R41
1 UF
6.3 V
C3R28
1 UF 10%
6.3 V
C3R27
1 UF 10%
6.3 V
X5R 805
X5R 805
X5R 805
X5R 805
X5R 402
X5R 402
X5R 402
X5R 402
21
21
20%10 UF
21
21
21
21
10%
21
21
V_MEMIOAB
EMPTY
C3T38
6.3 V X5R 402
C3T40
6.3 V X5R 402
C3T49C3R14
6.3 V X5R 402
C3T50
6.3 V X5R 402
C3T42
6.3 V X5R 402
C3T41C3R4
6.3 V X5R 402
C2T69
6.3 V X5R 402
C3T39
6.3 V X5R 402
C2T79
6.3 V X5R 402
C2T76C3R13
6.3 V X5R 402
10%
10%0.22 UF
10%
10%
10%0.22 UF
10%
10%0.22 UF
10%
10%0.22 UF
0.22 UF
0.22 UF
0.22 UF
0.22 UF 10%
0.22 UF
0.22 UF
21
21
2121
21
21
2121
21
21
21
2121
C2T74
0.22 UF 10%
6.3 V X5R 402
C2T77
0.22 UF 10%
6.3 V X5R 402
C3T46
0.22 UF 10%
6.3 V X5R 402
C3T45
10%0.22 UF
6.3 V X5R 402
C2T78
10%0.22 UF
6.3 V X5R 402
C3T48
6.3 V X5R 402
C3T44
6.3 V X5R 402
C2T75
6.3 V X5R 402
C3T47
6.3 V X5R 402
C3T43
6.3 V X5R 402
10%
10%0.22 UF
10%
0.22 UF
0.22 UF 10%
0.22 UF
0.22 UF 10%
21
21
21
21
21
21
21
21
21
21
V_MEMIOAB
EMPTY
V_MEMIOAB
EMPTY
1 UF
C2T81
10 UF 20%
6.3 V X5R 805
C2T82
10 UF 20%
6.3 V X5R 805
C3T52
10 UF 20%
6.3 V X5R 805
C3T51
10 UF 20%
6.3 V X5R 805
C3T54
21
10%1 UF
6.3 V X5R 402
C2T83
21
10%
6.3 V X5R 402
C2T84
21
10%1 UF
6.3 V X5R 402
C3T55
21
10%1 UF
6.3 V X5R 402
21
21
21
21
[PAGE_TITLE=GCPU, DECOUPLING]
GREYBULL_RETAIL
11/72 11/72 M 1.0
Page 12
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOCD
EMPTY
DDR3_4GBIT_X16
MEM
BYTE LANE 0 BYTE LANE 1
R9
VDD9
R1
VDD8
N9
VDD7
N1
VDD6
K8
VDD5
K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
VSS12 VSS11 VSS10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
BGA96X866978-001
U9C1,U8C5 EMPTY EMPTY MEMORY DUMMY_BOM
5
BI
5
BI
5
BI
5
BI
5
IN
5 5
IN
5 5
IN
5
IN
5
IN
5
IN
5
IN
5
IN
12
IN
12
IN
MD_DQSU_0_P MD_DQSU_0_N MD_DQSL_0_P
MD_DQSL_0_N MD_RESET_N MD_A<15..0> MD_A<15..0>
MD_BA<2..0> MD_BA<2..0>
MD_WE_N MD_CAS_N MD_RAS_N MD_DMU_0 MD_DML_0
MD_VREFCAA MD_VREFDQA
NC4 NC3 NC2 NC1
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
15 14 13
11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
TRUE
C7 B7 F3 G3 T2
M7 T7 T3 N7 R7 L7 R3 T8 R2 R8 P2 P8 N2 P3 P7 N3
M3 N8 M2
L3 K3 J3 D3 E7
M8 H1
U9C1
DQSU_P DQSU_N DQSL_P DQSL_N RESET_N
A15 A14 A13
A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
BA2 BA1 BA0
WE_N CAS_N RAS_N DMU DML
VREFCA VREFDQ
MEMORY CHANNEL D
DDR3_4GBIT_X16
BGA96X866978-001
36.5 OHM
MEM
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
V_MEMIOCD
V_MEMIOCD
R1P22
1% CH
402
MD_CLK0_DP
J7
MD_CLK0_DN
K7
MD_DQ15
A3
MD_DQ14
B8
MD_DQ13
A2
MD_DQ12
A7
MD_DQ11
C2
MD_DQ10
C8
MD_DQ9
C3
MD_DQ8
D7
H7 G2 H8 H3 F8 F2 F7 E3
K9 L2
K1 L8
EMPTY
R8C23
1
1 KOHM 1%
CH
2
402
MD_VREFCAA
R8C24
1
1 KOHM 1%
CH
2
402
EMPTY
R9C47
1
1 KOHM 1%
CH
2
402
MD_VREFDQA
R9C46
1
1 KOHM 1%
CH
2
402
MD_CLK_TERM_RC
1
2
R1P23
36.5 OHM 1%
CH
402
MD_DQ7 MD_DQ6 MD_DQ5 MD_DQ4 MD_DQ3 MD_DQ2 MD_DQ1 MD_DQ0
MD_CKE0 MD_CS0_N
MD_ODT0 MD_ZQ0
1
2
1
2
1
2
1
R8C29
243 OHM 1%
CH
2
402
C8C12
1 UF 10%
6.3 V X5R 402
C1P14
1 UF 10%
6.3 V X5R 402
1
C1P19
0.1 UF 10%
6.3 V
2
X5R 402
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
BYTE LANE 2 BYTE LANE 3
12
OUT
12
OUT OUT
5
BI
5
BI
12 12
5
BI
5
BI
5
IN IN
IN
5
IN
5
IN
5
IN
5
IN
5
IN IN
IN
5 5
5 5 5 5 5 5 5 5
5 5 5 5 5 5 5 5
5 5
5
V_MEMIOCD
EMPTY
R8C20
1
1 KOHM 1%
CH
2
402 R8C19
1
1 KOHM 1%
CH
2
402
V_MEMIOCD
EMPTY
R8C38
1
1 KOHM 1%
2
CH 402
R8C37
1
1 KOHM 1%
CH
2
402
MD_DQSU_1_P MD_DQSU_1_N MD_DQSL_1_P MD_DQSL_1_N
MD_RESET_N
MD_WE_N MD_CAS_N MD_RAS_N MD_DMU_1 MD_DML_1
MD_VREFCAB MD_VREFDQB
MD_VREFCAB
1
C8C11
1 UF 10%
6.3 V
2
X5R 402
MD_VREFDQB
1
C2P16
1 UF 10%
6.3 V
2
X5R 402
15 14 13
1212 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
OUT
U8C5
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001
V_MEMIOCD
EMPTY
12
12
DDR3_4GBIT_X16
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
MEM
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
BGA96
U8C5U9C1
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
MD_CLK0_DP
J7
MD_CLK0_DN
K7
A3
MD_DQ31
B8
MD_DQ30
A2
MD_DQ29
A7
MD_DQ28
C2
MD_DQ27 MD_DQ26
C8
MD_DQ25
C3
MD_DQ24
D7
MD_DQ23
H7
MD_DQ22
G2
MD_DQ21
H8
MD_DQ20
H3
MD_DQ19
F8
MD_DQ18
F2
MD_DQ17
F7
MD_DQ16
E3
MD_CKE0
K9
MD_CS0_N
L2 K1
MD_ODT0
L8
MD_ZQ1
MEM
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
BGA96X866978-001
1
2
NC4 NC3 NC2 NC1
R8C28
243 OHM 1%
CH 402
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
5 5
5 5 5 5 5 5 5 5
5 5 5 5 5 5 5 5
5 5
5
[PAGE_TITLE=MEMORY PARTITION A, LOW]
Tue Jun 18 16:42:22 2013
DRAWING
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12/72 12/72 M 1.0
Page 13
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOCD
EMPTY
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U8C4
MEM
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
X866978-001 BGA96
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
BYTE LANE 4
TRUE DUMMY_BOMMEMORYEMPTYEMPTYU8C4,U8C3
MEMORY CHANNEL D
BYTE LANE 6
V_MEMIOCD
EMPTY
R8C17
1
1 KOHM 1%
CH
2
402
R8C16
1
1 KOHM 1%
CH
2
402
V_MEMIOCD
EMPTY
R8C36
1
1 KOHM 1%
CH
2
402 R8C35
1
1 KOHM 1%
CH
2
402
MD_VREFCAC
1
C8C10
1 UF 10%
6.3 V
2
X5R 402
MD_VREFDQC
1
C2P15
1 UF 10%
6.3 V
2
X5R 402
OUT
OUT
13
13
BYTE LANE 7BYTE LANE 5
V_MEMIOCD
EMPTY
R7C5
1
1 KOHM 1%
CH
2
402
R7C4
1
1 KOHM 1%
CH
2
402
V_MEMIOCD
EMPTY
1
R8C34 1 KOHM 1%
2
CH 402
1
R8C33 1 KOHM 1%
CH
2
402
MD_VREFCAD
1
2
MD_VREFDQD
1
C2P14
1 UF 10%
6.3 V
2
X5R 402
C7C6
1 UF 10%
6.3 V X5R 402
OUT
OUT
13
13
V_MEMIOCD
EMPTY
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U8C3
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
X866978-001 BGA96
MEM
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
U8C4
MEM
DDR3_4GBIT_X16
5 5 5 5 5
5
IN IN
5 5
IN
5
IN
5
IN
5
IN
5
IN
5
IN
13
IN
13
IN
MD_DQSU_2_P
BI
MD_DQSU_2_N
BI
MD_DQSL_2_P MD_DQSL_3_P
BI
MD_DQSL_2_N
BI
MD_RESET_N
15 14 13
11 10 9 8 7 6 5 4 3 2 1
MD_BA<2..0> MD_BA<2..0>
MD_WE_N MD_CAS_N MD_RAS_N MD_DMU_2 MD_DML_2
MD_VREFCAC MD_VREFDQC
0 2
1 0
C7 B7 F3 G3 T2
M7 T7 T3 N7 R7 L7 R3 T8 R2 R8 P2 P8 N2 P3 P7 N3
M3 N8 M2
L3 K3 J3 D3 E7
M8 H1
DQSU_P DQSU_N DQSL_P DQSL_N RESET_N
A15 A14 A13
A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
BA2 BA1 BA0
WE_N CAS_N RAS_N DMU DML
VREFCA VREFDQ
BGA96X866978-001
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MD_CLK0_DP
J7
MD_CLK0_DN
K7
MD_DQ47
A3
MD_DQ46
B8
MD_DQ45
A2
MD_DQ44
A7
MD_DQ43
C2
MD_DQ42
C8
MD_DQ41
C3
MD_DQ40
D7
MD_DQ39
H7
MD_DQ38
G2
MD_DQ37
H8
MD_DQ36
H3
MD_DQ35
F8
MD_DQ34
F2
MD_DQ33
F7
MD_DQ32
E3
MD_CKE0
K9
MD_CS0_N
L2
MD_ODT0
K1
MD_ZQ2
L8
1
R8C27
243 OHM 1%
CH
2
402
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
5 5
5 5 5
5 5
5
5 5
5 5 5 5 5
5
5
5
5 5
5
13 13
U8C3
MEM
DDR3_4GBIT_X16
5
BI
5
BI BI
5
BI
5
IN
5 5
IN
IN
5
IN
5
IN
5
IN
5
IN
5
IN IN
IN
MD_DQSU_3_P MD_DQSU_3_N
MD_DQSL_3_N MD_RESET_N MD_A<15..0>MD_A<15..0>
MD_WE_N MD_CAS_N MD_RAS_N MD_DMU_3 MD_DML_3
MD_VREFCAD MD_VREFDQD
15 14 13
1212 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001 BGA96
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MD_CLK0_DP
J7
MD_CLK0_DN
K7
MD_DQ63
A3
MD_DQ62
B8
MD_DQ61
A2
MD_DQ60
A7
MD_DQ59
C2
MD_DQ58
C8
MD_DQ57
C3
MD_DQ56
D7
MD_DQ55
H7
MD_DQ54
G2
MD_DQ53
H8
MD_DQ52
H3
MD_DQ51
F8
MD_DQ50
F2
MD_DQ49
F7
MD_DQ48
E3
MD_CKE0
K9
MD_CS0_N
L2
MD_ODT0
K1
MD_ZQ3
L8
1
R7C7
243 OHM 1%
CH
2
402
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
IN IN
5 5
5 5 5 5 5 5 5 5
5 5 5 5 5 5 5 5
5 5
5
[PAGE_TITLE=MEMORY PARTITION A, HIGH]
DRAWING
GREYBULL_RETAILTue Jun 18 16:42:22 2013
13/72 13/72 M 1.0
Page 14
MEMORY CHANNEL D, DECOUPLING + TERMINATION
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOCD
PARTITION D DECOUPLING
V_VTTD
V_VTTD
5
MD_A<15..0>
IN
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R9C7
1%36.5 OHM CH
402
R1P4
36.5 OHM
36.5 OHM1%
402
402
402
R9C11
402
R9C15
402
402
402
R9C16
402
R8C26
402
402
R9C10
402
R9C25
402
402
402
R9C12
402
R1P5
R9C6
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
R1P6
1%36.5 OHM CH
R9C9
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
R1P7
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
R9C8
1%36.5 OHM CH
R9C5
1%36.5 OHM CH
1%36.5 OHM CH
1% CH
CH
21
21
21
21
21
21
21
21
21
21
21
21
21
5
IN
5
IN
21
21
21
5
IN
5
IN
5
IN
5
IN
5
IN
MD_BA<2..0>
MD_WE_N
MD_CAS_N
MD_RAS_N
MD_ODT0
MD_CKE0
MD_CS0_N
2
1
0
R1P14
36.5 OHM1% 402
R9C31
402
R1P16
36.5 OHM1% 402
R9C34
402
R1P15
402
R1P12
402
R1P13
402
R8C25
402
R9C27
402
21
CH
21
1%36.5 OHM CH
21
CH
21
1%36.5 OHM CH
21
1%36.5 OHM CH
21
1%36.5 OHM CH
V_VTTD
21
1%36.5 OHM CH
21
1%36.5 OHM CH
21
1%36.5 OHM CH
V_MEMIOCD
1
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOCD
1
C2P8
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOCD
1
C2P24
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOCD
1
1 UF 10%
6.3 V
2
X5R 402
1
22 UF 20%
6.3 V
2
X7R 805
1
2
C2P22 C2P11 C2P26 C2P4 C2P18 C2P20C2P9
1 UF 10%
6.3 V X5R 402
1
2
1
2
1
2
1
2
1
2
1
2
1
2
10%
6.3 V X5R 402
1 UF 10%
6.3 V X5R 402
C2P12C3P6
1 UF 10%
6.3 V X5R 402
1
2
22 UF 20%
6.3 V X7R
1
2
22 UF 20%
6.3 V X7R 805
MEMORY D, CHIP 0, DECOUPLING
C1P5C1P18C1P13
1 UF1 UF 10%
6.3 V X5R 402
1
2
C2P3
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
MEMORY D, CHIP 1 DECOUPLING
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
MEMORY D, CHIP 2, DECOUPLING
1
2
C2P10C2P5C2P7C2P25
1 UF 10%
6.3 V X5R 402
10%
6.3 V X5R 402
1
2
1 UF1 UF 10%
6.3 V X5R 402
MEMORY D, CHIP 3, DECOUPLING
1 UF 10%
6.3 V X5R 402
1
1 UF 10%
2
X5R 402
1
C3P13C2P21C2P23
1 UF 10%
6.3 V6.3 V
2
X5R 402
1
C8C9C9C22C7C4 C8C8
22 UF 20%
6.3 V
2
X7R 805805
1
C1P17 C1P16C1P12C1P11
1 UF 10%
6.3 V 6.3 V
2
X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
1
2
1 UF 10%
6.3 V X5R 402
1 UF 10%
6.3 V X5R 402
I499
1
2
1
2
1 UF 10%
6.3 V X5R 402
1 UF 10%
6.3 V X5R 402
1
2
1
2
1 UF 10%
6.3 V X5R 402
1 UF 10%
6.3 V X5R 402
1
2
1
2
1
2
1
2
1 UF 10%
X5R 402
1 UF 10%
6.3 V X5R 402
C2P17C2P13C2P19
1 UF 10%
6.3 V X5R 402
C3P1C2P6C3P15
1 UF 10%
6.3 V X5R 402
[PAGE_TITLE=MEMORY PARTITION A, DECOUPLING, TERMINATION]
Tue Jun 18 16:42:22 2013
DRAWING
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14/72 14/72 M 1.0
Page 15
MEMORY CHANNEL C
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
V_MEMIOCD
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U7C2
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
X866978-001
5
BI
5
BI BI
5
BI
5
IN
5
IN
5
IN
5
IN
5
IN
5
IN
5 5
IN
15
IN
15
IN
MEM
L9
NC4
L1
NC3
J9
NC2
J1
NC1
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
VSS12 VSS11 VSS10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
BGA96
MC_DQSU_0_P MC_DQSU_0_N
MC_DQSL_0_N MC_RESET_N MC_A<15..0>
MC_BA<2..0>
MC_WE_N MC_CAS_N MC_RAS_N MC_DMU_0 MC_DML_0
MC_VREFCAA MC_VREFDQA
BYTE LANE 0
TRUE DUMMY_BOMEMPTY MEMORYEMPTYU7C2,U7C1
U7C2
DDR3_4GBIT_X16
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
T7 T3 N7 R7 L7 R3 T8 R2 R8 P2 P8 N2 P3 P7 N3
M3 N8 M2
L3 K3 J3 D3 E7
M8 H1
A15 A14 A13
A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
BA2 BA1 BA0
WE_N CAS_N RAS_N DMU DML
VREFCA VREFDQ
V_MEMIOCD
V_MEMIOCD
36.5 OHM
MEM
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
BGA96X866978-001
R7C2
1
1 KOHM 1%
CH
2
402
MC_VREFCAA
R7C1
1
1 KOHM 1%
CH
2
402
R7C14
1
1 KOHM 1%
CH
2
402
MC_VREFDQA
R7C13
1
1 KOHM 1%
CH
2
402
R4R6
1
1% CH
2
402
MC_CLK0_DPMC_DQSL_0_P
J7
MC_CLK0_DN
K7
MC_DQ15
A3
MC_DQ14
B8
MC_DQ13
A2
MC_DQ12
A7
MC_DQ11
C2
MC_DQ10
C8
MC_DQ9
C3
MC_DQ8
D7
MC_DQ7
H7
MC_DQ6
G2
MC_DQ5
H8
MC_DQ4
H3
MC_DQ3
F8
MC_DQ2
F2
MC_DQ1
F7
MC_DQ0
E3
MC_CKE0
K9
MC_CS0_N
L2
MC_ODT0
K1
MC_ZQ0
L8
1
C7C5
1 UF 10%
6.3 V
2
X5R 402
1
C3P10
1 UF 10%
6.3 V
2
X5R 402
MC_CLK_TERM_RC
R4R7
1% CH
402
1
2
36.5 OHM
OUT
OUT
1
2
1
R7C8
243 OHM 1%
2
CH 402
15
15
C4R21
0.1 UF 10%
6.3 V X5R 402
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
BYTE LANE 2 BYTE LANE 3BYTE LANE 1
V_MEMIOCD
R6C6
1
1 KOHM 1%
CH
2
402
MC_VREFCAB
R6C5
1
1 KOHM 1%
CH
2
402
V_MEMIOCD
1
R7C11 1 KOHM 1%
CH
2
402
MC_VREFDQB
R7C10
1
1 KOHM 1%
CH
2
402
1
2
1
2
C6C3
1 UF 10%
6.3 V X5R 402
C3P9
1 UF 10%
6.3 V X5R 402
OUT
OUT
15
15
U7C1
V_MEMIOCD
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U7C1
MEM
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
X866978-001 BGA96
MEM
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
DDR3_4GBIT_X16
5
BI
5
BI
5 5 5
5 5 5 5 5 5 5 5
5 5 5 5 5 5 5 5
5 5
5
5
5 5 5
5
5 5 5 5 5
15 15
BI
BI IN IN
IN
IN IN IN ININ IN
IN IN
MC_DQSU_1_P MC_DQSU_1_N MC_DQSL_1_P
MC_DQSL_1_N MC_RESET_N MC_A<15..0>
MC_BA<2..0>
MC_WE_N MC_CAS_N MC_RAS_N MC_DMU_1 MC_DML_1
MC_VREFCAB MC_VREFDQB
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001 BGA96
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MC_CLK0_DP
J7
MC_CLK0_DN
K7
MC_DQ31
A3
MC_DQ30
B8
MC_DQ29
A2
MC_DQ28
A7
MC_DQ27
C2
MC_DQ26
C8
MC_DQ25
C3
MC_DQ24
D7
MC_DQ23
H7
MC_DQ22
G2
MC_DQ21
H8
MC_DQ20
H3
MC_DQ19
F8
MC_DQ18
F2
MC_DQ17
F7
MC_DQ16
E3
MC_CKE0
K9
MC_CS0_N
L2
MC_ODT0
K1
MC_ZQ1
L8
1
R6C12
243 OHM 1%
CH
2
402
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
5 5
5 5 5 5 5 5 5 5
5 5 5 5 5 5 5 5
5 5
5
[PAGE_TITLE=MEMORY PARTITION B, LOW]
Tue Jun 18 16:42:23 2013
DRAWING
GREYBULL_RETAIL
15/72 15/72 M 1.0
Page 16
MEMORY CHANNEL C
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
V_MEMIOCD
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U6D2
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
MEM
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
BGA96X866978-001
NC4 NC3 NC2 NC1
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
BYTE LANE 5
TRUE DUMMY_BOMMEMORYEMPTYEMPTYU6D2,U6D3
V_MEMIOCD
R6D13
1
1 KOHM 1%
CH
2
402
R6D14
1
1 KOHM 1%
CH
2
402
V_MEMIOCD
1
R6D5 1 KOHM 1%
2
CH 402
1
R6D6 1 KOHM 1%
CH
2
402
MC_VREFCAC
1
C6D8
1 UF 10%
6.3 V
2
X5R 402
MC_VREFDQC
1
C4R1
1 UF 10%
6.3 V
2
X5R 402
OUT
OUT
16
16
BYTE LANE 6BYTE LANE 4 BYTE LANE 7
V_MEMIOCD
R6D35
1
1 KOHM 1%
CH
2
402
R6D36
1
1 KOHM 1%
CH
2
402
V_MEMIOCD
1
R6D20 1 KOHM 1%
2
CH 402
1
R6D22 1 KOHM 1%
CH
2
402
MC_VREFCAD
1
C4R29
1 UF 10%
6.3 V
2
X5R 402
MC_VREFDQD
1
C4R14
1 UF 10%
6.3 V
2
X5R 402
OUT
OUT
16
16
V_MEMIOCD
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U6D3
MEM
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
X866978-001 BGA96
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
U6D2
MEM
DDR3_4GBIT_X16
5 5 5 5 5
IN
5 5
IN
5
IN
5
IN
5
IN
5
IN
5
IN
5
IN
16
IN
16
IN
MC_DQSU_2_P
BI
MC_DQSU_2_N
BI
MC_DQSL_2_P
BI
MC_DQSL_2_N MC_RESET_N MC_A<15..0> MC_A<15..0>
MC_BA<2..0>
MC_WE_N MC_CAS_N MC_RAS_N MC_DMU_2 MC_DML_2
MC_VREFCAC MC_VREFDQC
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001 BGA96
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MC_CLK0_DP
J7
MC_CLK0_DN
K7
MC_DQ47
A3
MC_DQ46
B8
MC_DQ45
A2
MC_DQ44
A7
MC_DQ43
C2
MC_DQ42
C8
MC_DQ41
C3
MC_DQ40
D7
MC_DQ39
H7
MC_DQ38
G2
MC_DQ37
H8
MC_DQ36
H3
MC_DQ35
F8
MC_DQ34
F2
MC_DQ33
F7
MC_DQ32
E3
MC_CKE0
K9
MC_CS0_N
L2
MC_ODT0
K1
MC_ZQ2
L8
1
R6D17
243 OHM 1%
CH
2
402
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
5 5
5 5 5 5 5 5 5 5
5 5 5 5 5 5 5 5
5 5
5
16 16
U6D3
MEM
DDR3_4GBIT_X16
BI BI BI BI
MC_DQSU_3_P MC_DQSU_3_N MC_DQSL_3_P MC_DQSL_3_N
MC_RESET_N
MC_BA<2..0>
MC_WE_N MC_CAS_N MC_RAS_N MC_DMU_3 MC_DML_3
MC_VREFCAD
MC_VREFDQD
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
5 5 5 5 5
IN IN
5
IN
5
IN
5
IN
5
IN
5
IN
5
IN IN
IN
C7 B7 F3 G3 T2
M7 T7 T3 N7 R7 L7 R3 T8 R2 R8 P2 P8 N2 P3 P7 N3
M3 N8 M2
L3 K3 J3 D3 E7
M8 H1
DQSU_P DQSU_N DQSL_P DQSL_N RESET_N
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
BA2 BA1 BA0
WE_N CAS_N RAS_N DMU DML
VREFCA VREFDQ
BGA96X866978-001
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MC_CLK0_DP
J7
MC_CLK0_DN
K7
MC_DQ63
A3
MC_DQ62
B8
MC_DQ61
A2
MC_DQ60
A7
MC_DQ59
C2
MC_DQ58
C8
MC_DQ57
C3
MC_DQ56
D7
MC_DQ55
H7
MC_DQ54
G2
MC_DQ53
H8
MC_DQ52
H3
MC_DQ51
F8
MC_DQ50
F2
MC_DQ49
F7
MC_DQ48
E3
MC_CKE0
K9
MC_CS0_N
L2
MC_ODT0
K1
MC_ZQ3
L8
1
R6D37
243 OHM 1%
CH
2
402
IN INBI
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
5 5
5 5 5 5 5 5 5 5
5 5 5 5 5 5 5 5
5 5
5
[PAGE_TITLE=MEMORY PARTITION B, HIGH]
Tue Jun 18 16:42:23 2013
DRAWING
GREYBULL_RETAIL
16/72 16/72 M 1.0
Page 17
MEMORY CHANNEL C, DECOUPLING + TERMINATION
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_VTTC
PARTITION C DECOUPLING
V_MEMIOCD
V_VTTC
5
IN
IN
MC_A<15..0>
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R4R13
36.5 OHM 402
R4R8
402
R4R9
36.5 OHMCH1% 402
R6D28
36.5 OHM1%
36.5 OHM1%
CH
402
R4R10
36.5 OHM1% 402
R6D27
CH
402
R6D24
36.5 OHM1% 402
R6D31
36.5 OHM1% 402
R6D23
36.5 OHM1% 402
R6D32
36.5 OHM1% 402
R6D21
36.5 OHM1% 402
R6D30
36.5 OHM1% 402
R4R11
402
R6D25
36.5 OHM1% 402
R6D29
36.5 OHM1% 402
R6D26
36.5 OHM1% 402
21
1% CH
21
1%36.5 OHM CH
21
21
21
CH
21
21
CH
CH
CH
CH
CH
CH
1%36.5 OHM CH
CH
CH
CH
21
21
21
21
21
21
21
21
21
5
IN
5
IN
5
IN
5
IN
5
IN
5
IN
MC_BA<2..0>
5
MC_WE_N
MC_CAS_N
MC_RAS_N
MC_ODT0
MC_CKE0
MC_CS0_N
2
1
0
R4R15
402
R4R17
402
R4R18
402
R6D16
402
R4R16
402
R4R12
402
1% CH
CH
1% CH
CH
CH
CH
36.5 OHM
36.5 OHM1%
36.5 OHM
36.5 OHM1%
36.5 OHM1%
36.5 OHM1%
R4R14
402
R6D33
36.5 OHM1% 402
R6D19
36.5 OHM 402
21
21
21
21
21
21
V_VTTC
21
1%36.5 OHM CH
21
CH
21
1% CH
V_MEMIOCD
1
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOCD
1
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOCD
1
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOCD
1
2
1
2
1
C3P3C4P2
1 UF 10%
6.3 V
2
X5R 402
C4R10
1 UF 10%
6.3 V X5R 402
C3P12C3P8
1 UF 10%
6.3 V X5R 402
1
2
22 UF 20%
6.3 V X7R 805
1
2
C6D7C7C3
22 UF 20%
6.3 V X7R 805
1
2
C7C2
22 UF 20%
6.3 V X7R 805
MEMORY C, CHIP 0 DECOUPLING
1
2
C3P2
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
C3P14C3P17
1 UF 10%
6.3 V X5R 402
1
2
MEMORY C, CHIP 1, DECOUPLING
1
1 UF 10%
2
X5R 402
1
C3P7C4P5
1 UF 10%
6.3 V6.3 V
2
X5R 402
1
2
C3P11
1 UF 10%
6.3 V X5R 402
MEMORY C, CHIP 2, DECOUPLING
1
2
1 UF 10%
6.3 V X5R 402
1
2
C4R3C4R7C4R8
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
MEMORY C, CHIP 3, DECOUPLING
1
2
1
2
1 UF 10%
6.3 V X5R 402
1 UF 10%
6.3 V X5R 402
1
2
C4R30
22 UF 20%
6.3 V X7R 805
1
2
C4R4C4R5C4R11
1 UF 10%
6.3 V X5R 402
C3P19C3P5
1 UF 10%
6.3 V X5R 402
1
2
1
2
C3P18C4P4
1 UF 10%
6.3 V X5R 402
C4R2
1 UF 10%
6.3 V X5R 402
1
2
1
2
C3P4
1 UF 10%
6.3 V X5R 402
C3P16
1 UF 10%
6.3 V X5R 402
[PAGE_TITLE=MEMORY PARTITION B, DECOUPLING, TERMINATION]
1
2
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
C4R16C4R17C4R23
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
DRAWING
Tue Jun 18 16:42:23 2013
1
2
1 UF 10%
6.3 V X5R 402
1
1 UF 10%
6.3 V
2
X5R 402
GREYBULL_RETAIL
1
2
1 UF 10%
6.3 V X5R 402
1
2
C4R24C4R27 C4R19C4R18C4R25
1 UF 10%
6.3 V X5R 402
17/72 17/72 M 1.0
Page 18
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOAB
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U9F5
MEM
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
X866978-001 BGA96
6
BI
6
BI
6
BI
6
BI
6
IN
6
IN
6
IN IN
6
IN
6
IN
6 6
IN
6
IN
18
IN
18
IN
I37
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
MB_DQSU_0_P MB_DQSU_0_N MB_DQSL_0_P
MB_DQSL_0_N MB_RESET_N MB_A<15..0>
MB_BA<2..0>
MB_WE_N MB_CAS_N MB_RAS_N MB_DMU_0 MB_DML_0
MB_VREFCAA
MB_VREFDQA
[PAGE_TITLE=MEMORY PARTITION C, LOW]
15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
MEMORY CHANNEL B
BYTE LANE 0 BYTE LANE 1
TRUE DUMMY_BOMMEMORYEMPTYEMPTYU9F5,U8F3
U9F5
DDR3_4GBIT_X16
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001
36.5 OHM
MEM
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
BGA96
V_MEMIOAB
R9F21
1
1 KOHM 1%
CH
2
402
R9F20
1
1 KOHM 1%
CH
2
402
V_MEMIOAB
1
R8F6 1 KOHM 1%
2
CH 402
1
R8F7 1 KOHM 1%
CH
2
402
R1U8
I11
MB_CLK_TERM_RC
1
1% CH
2
402
MB_CLK0_DP
J7
MB_CLK0_DN
K7
MB_DQ15
A3
MB_DQ14
B8
MB_DQ13
A2
MB_DQ12
A7
MB_DQ11
C2
MB_DQ10
C8
MB_DQ9
C3
MB_DQ8
D7
MB_DQ7
H7
MB_DQ6
G2
MB_DQ5
H8
MB_DQ4
H3
MB_DQ3
F8
MB_DQ2
F2
MB_DQ1
F7
MB_DQ0
E3
MB_CKE0
K9
MB_CS0_N
L2
MB_ODT0
K1
MB_ZQ0
L8
MB_VREFCAA
1
C9F15
1 UF 10%
6.3 V
2
X5R 402
MB_VREFDQA
1
C2U13
1 UF 10%
6.3 V
2
X5R 402
R1U9
1% CH
402
1
2
1
2
36.5 OHM
1
2
R9F19
243 OHM 1%
CH 402
C1U4
0.1 UF 10%
6.3 V X5R 402
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
ININ IN
IN
OUT
OUT
6 6
6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6
6 6
6
18
18
BYTE LANE 2 BYTE LANE 3
6 6 6 6 6
18 18
6
6
6 6 6 6 6
V_MEMIOAB
V_MEMIOAB
BI BI BI
BI IN IN
IN IN IN IN IN
IN IN
1
R8F20 1 KOHM 1%
CH
2
402
MB_VREFCAB
R8F21
1
1 KOHM 1%
CH
2
402
1
R8F3 1 KOHM 1%
2
CH 402
MB_VREFDQB
1
R8F4 1 KOHM 1%
CH
2
402
MB_DQSU_1_P MB_DQSU_1_N MB_DQSL_1_P
MB_DQSL_1_N MB_RESET_N MB_A<15..0>
MB_BA<2..0>
MB_WE_N MB_CAS_N MB_RAS_N MB_DMU_1 MB_DML_1
MB_VREFCAB MB_VREFDQB
1
2
1
2
C8F4
1 UF 10%
6.3 V X5R 402
C2U12
1 UF 10%
6.3 V X5R 402
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
OUT
OUT
C7 B7 F3 G3 T2
M7 T7 T3 N7 R7 L7 R3 T8 R2 R8 P2 P8 N2 P3 P7 N3
M3 N8 M2
L3 K3 J3 D3 E7
M8 H1
18
18
U8F3
DDR3_4GBIT_X16
DQSU_P DQSU_N DQSL_P DQSL_N RESET_N
A15 A14 A13
A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
BA2 BA1 BA0
WE_N CAS_N RAS_N DMU DML
VREFCA VREFDQ
V_MEMIOAB
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
MEM
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
BGA96X866978-001
U8F3
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
X866978-001 BGA96
I82
MB_CLK0_DP
J7
MB_CLK0_DN
K7
MB_DQ31
A3
MB_DQ30
B8
MB_DQ29
A2
MB_DQ28
A7
MB_DQ27
C2
MB_DQ26
C8
MB_DQ25
C3
MB_DQ24
D7
MB_DQ23
H7
MB_DQ22
G2
MB_DQ21
H8
MB_DQ20
H3
MB_DQ19
F8
MB_DQ18
F2
MB_DQ17
F7
MB_DQ16
E3
MB_CKE0
K9
MB_CS0_N
L2
MB_ODT0
K1
MB_ZQ1
L8
ZQ
MEM
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
1
R8F12
243 OHM 1%
CH
2
402
I111
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN IN
IN
6 6
6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6
6 6
6
GREYBULL_RETAIL
18/72 18/72 M 1.0
Page 19
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOAB
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U8F2
MEM
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
X866978-001 BGA96
I37
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
MEMORY CHANNEL B
BYTE LANE 5
V_MEMIOAB
R8F17
1
1 KOHM 1%
CH
2
402
R8F18
1
1 KOHM 1%
CH
2
402
V_MEMIOAB
R8F1
1
1 KOHM 1%
CH
2
402 R8F2
1
1 KOHM 1%
CH
2
402
MB_VREFCAC
1
C8F3
1 UF 10%
6.3 V
2
X5R 402
MB_VREFDQC
1
C2U11
1 UF 10%
6.3 V
2
X5R 402
OUT
OUT
19
19
BYTE LANE 6BYTE LANE 4 BYTE LANE 7
V_MEMIOAB
R8F14
1
1 KOHM 1%
CH
2
402
R8F15
1
1 KOHM 1%
CH
2
402
V_MEMIOAB
R7F7
1
1 KOHM 1%
CH
2
402 R7F8
1
1 KOHM 1%
CH
2
402
MB_VREFCAD
1
C8F2
1 UF 10%
6.3 V
2
X5R 402
MB_VREFDQD
1
C3U11
1 UF 10%
6.3 V
2
X5R 402
OUT
OUT
19
19
V_MEMIOAB
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U8F1
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
X866978-001
MEM
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
BGA96
I109
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
U8F2
I11
MEM
MEMORYEMPTYEMPTYU8F2,U8F1
DDR3_4GBIT_X16
BI BI BI BI
MB_DQSU_2_P MB_DQSU_2_N MB_DQSL_2_P MB_DQSL_2_N MB_RESET_N
MB_WE_N MB_CAS_N MB_RAS_N MB_DMU_2 MB_DML_2
MB_VREFCAC MB_VREFDQC
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
6 6 6 6
6
IN IN
IN IN
6
IN
6
IN
6
IN
6
IN
6
IN
19
IN
19
IN
C7 B7 F3 G3 T2
M7 T7 T3 N7 R7 L7 R3 T8 R2 R8 P2 P8 N2 P3 P7 N3
M3 N8 M2
L3 K3 J3 D3 E7
M8 H1
DQSU_P DQSU_N DQSL_P DQSL_N RESET_N
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
BA2 BA1 BA0
WE_N CAS_N RAS_N DMU DML
VREFCA VREFDQ
BGA96X866978-001
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MB_CLK0_DP
J7
MB_CLK0_DN
K7
MB_DQ47
A3
MB_DQ46
B8
MB_DQ45
A2
MB_DQ44
A7
MB_DQ43
C2
MB_DQ42
C8
MB_DQ41
C3
MB_DQ40
D7
MB_DQ39
H7
MB_DQ38
G2
MB_DQ37
H8
MB_DQ36
H3
MB_DQ35
F8
MB_DQ34
F2
MB_DQ33
F7
MB_DQ32
E3
MB_CKE0
K9
MB_CS0_N
L2
MB_ODT0
K1
MB_ZQ2
L8
1
R8F11
243 OHM 1%
CH
2
402
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN IN
IN
6
6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6
6 6
6
[PAGE_TITLE=MEMORY PARTITION C, HIGH]
19 19
6 6 6 6 6 6 6
6 6
6 6 6 6 6
TRUE DUMMY_BOM
BI BI BI
BI IN IN
IN IN IN IN IN
IN IN
MB_DQSU_3_P MB_DQSU_3_N MB_DQSL_3_P
MB_DQSL_3_N MB_RESET_N MB_A<15..0>MB_A<15..0>
MB_BA<2..0>MB_BA<2..0>
MB_WE_N MB_CAS_N MB_RAS_N MB_DMU_3 MB_DML_3
MB_VREFCAD MB_VREFDQD
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
U8F1
DDR3_4GBIT_X16
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001 BGA96
MEM
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
I166
MB_CLK0_DP
J7
MB_CLK0_DN
K7
A3
MB_DQ63
B8
MB_DQ62
A2
MB_DQ61
A7
MB_DQ60
C2
MB_DQ59 MB_DQ58
C8
MB_DQ57
C3
MB_DQ56
D7
MB_DQ55
H7
MB_DQ54
G2
MB_DQ53
H8
MB_DQ52
H3
MB_DQ51
F8
MB_DQ50
F2
MB_DQ49
F7
MB_DQ48
E3
MB_CKE0
K9
MB_CS0_N
L2 K1
MB_ODT0 MB_ZQ3
L8
1
R8F10
243 OHM 1%
CH
2
402
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
6 6 6
6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6
6 6
6
GREYBULL_RETAIL
19/72 19/72 M 1.0
Page 20
MEMORY CHANNEL B, DECOUPLING + TERMINATION
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOAB
PARTITION B DECOUPLING
R1U13
1%36.5 OHM CH
R1U11
1%36.5 OHM CH
R1U10
1%36.5 OHM CH
R8F22
1%36.5 OHM CH
R1U12
1%36.5 OHM CH
R8F23
1%36.5 OHM CH
R1U15
CH
R9F23
1%36.5 OHM CH
R8F24
1%36.5 OHM CH
V_VTTB
21
21
21
21
21
21
V_VTTB
21
21
21
V_MEMIOAB
I140
1
C2U16 C3U17C3U13C3U2
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOAB
I136
1
C2U2
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOAB
I144
1
1 UF
6.3 V
2
X5R 402
V_MEMIOAB
I148
1
1 UF 10%
6.3 V
2
X5R 402
1
2
C8F6
22 UF 20%
6.3 V X7R 805
1
2
C9F9
22 UF 20%
6.3 V X7R 805
1
C7F5 C8F5
22 UF 20%
6.3 V
2
X7R 805
1
2
22 UF 20%
6.3 V X7R 805
MEMORY B, CHIP 0 DECOUPLING
I137
1
C3U5 C2U5
1 UF 10%
6.3 V
2
X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
I138
1 UF 10%
6.3 V X5R 402
1
2
I139
1 UF 10%
6.3 V X5R 402
1
C2U8 C2U23
1 UF 10%
6.3 V
2
X5R 402
MEMORY B, CHIP 1, DECOUPLING
I141
1
C2U3 C2U17C2U6
1 UF 10%
6.3 V
2
X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
MEMORY B, CHIP 2, DECOUPLING
I145
1
C2U4 C2U10
1 UF 10%
6.3 V
2
X5R 402
1
2
1 UF 10%10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
C2U7
1 UF 10%
6.3 V X5R 402
1
2
I146
1 UF 10%
6.3 V X5R 402
MEMORY B, CHIP 3, DECOUPLING
1
2
I149
1 UF 10%
6.3 V X5R 402
1
C1U9 C1U10
1 UF 10%
6.3 V
2
X5R 402
1
2
C1U6
1 UF 10%
6.3 V X5R 402
1
2
I150
C1U7C1U8C1U5
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
1
2
1
2
1
2
1 UF 10%
6.3 V X5R 402
C2U19
1 UF 10%
6.3 V X5R 402
I147
C2U20C2U18C2U15C2U1
1 UF 10%
6.3 V X5R 402
C1U11
1 UF 10%
6.3 V X5R 402
1
2
1
2
1
2
1
2
1 UF 10%
6.3 V X5R 402
I143I142
C2U21C2U9C2U14
1 UF 10%
6.3 V X5R 402
C2U22
1 UF 10%
6.3 V X5R 402
C1U12
1 UF 10%
6.3 V X5R 402
V_VTTB
6
MB_A<15..0>
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R1U14
402
R1U18
36.5 OHM1% 402
R1U21
36.5 OHM1% 402
R9F29
36.5 OHMCH1% 402
R9F31
36.5 OHM1%
36.5 OHMCH1%
36.5 OHM1%
402
R9F28
402
R9F25
402
R1U19
402
R9F24
402
R1U20
402
R1U17
402
R1U16
402
R8F25
402
R9F26
402
R9F30
402
R9F27
402
CH
1%36.5 OHM CH
1%36.5 OHM CH
CH
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
1%36.5 OHM CH
CH
CH 21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
6
IN
6
6
6
6
6
6
MB_BA<2..0>
ININ
IN
IN
IN
IN
IN
MB_WE_N
MB_CAS_N
MB_RAS_N
MB_ODT0
MB_CKE0
MB_CS0_N
2
1
0
402
402
402
402
402
402
36.5 OHM1% 402
402
402
[PAGE_TITLE=MEMORY PARTITION C, DECOUPLING, TERMINATION]
GREYBULL_RETAIL
20/72 20/72 M 1.0
Page 21
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOAB
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U7F2
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
X866978-001
6 6 6 6 6 6
6
6 6 6 6 6
21 21
MEMORY CHANNEL A
I58
BYTE LANE 0
V_MEMIOAB
MEM
R7F16
1
1 KOHM 1%
CH
2 NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
402
R7F17
1
1 KOHM 1%
CH
2
402
V_MEMIOAB
1
R7F5 1 KOHM 1%
CH
2
402
1
R7F6 1 KOHM 1%
CH
2
402
MA_VREFCAA
1
C7F2
1 UF 10%
6.3 V
2
X5R 402
MA_VREFDQA
1
C3U10
1 UF 10%
6.3 V
2
X5R 402
OUT
OUT
21
21
BGA96
MA_CLK_TERM_RC
R4T12
36.5 OHM I36
U7F2
MEM
DDR3_4GBIT_X16
BI BI BI
BI IN IN
IN IN
IN IN IN IN IN
IN IN
MA_DQSU_0_P MA_DQSU_0_N MA_DQSL_0_P
MA_DQSL_0_N MA_RESET_N MA_A<15..0>
MA_BA<2..0>
MA_WE_N MA_CAS_N MA_RAS_N MA_DMU_0 MA_DML_0
MA_VREFCAA MA_VREFDQA
15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
C7 B7 F3 G3 T2
M7 T7 T3 N7 R7 L7 R3 T8 R2 R8 P2 P8 N2 P3 P7 N3
M3 N8 M2
L3 K3 J3 D3 E7
M8 H1
DQSU_P DQSU_N DQSL_P DQSL_N RESET_N
A15 A14 A13
A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
BA2 BA1 BA0
WE_N CAS_N RAS_N DMU DML
VREFCA VREFDQ
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
X866978-001 BGA96
1
1% CH
2
402
36.5 OHM
MA_CLK0_DP
J7
MA_CLK0_DN
K7
A3
MA_DQ15
B8
MA_DQ14
A2
MA_DQ13
A7
MA_DQ12
C2
MA_DQ11 MA_DQ10
C8
MA_DQ9
C3
MA_DQ8
D7
MA_DQ7
H7
MA_DQ6
G2
MA_DQ5
H8
MA_DQ4
H3
MA_DQ3
F8
MA_DQ2
F2
MA_DQ1
F7
MA_DQ0
E3
MA_CKE0
K9
MA_CS0_N
L2 K1
MA_ODT0
L8
MA_ZQ0
R4T10
1% CH
402
1
2
1
R7F11
243 OHM 1%
2
CH 402
1
2
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
C4T6
0.1 UF 10%
6.3 V X5R 402
IN IN
IN IN
IN
6 6
6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6
6 6
6
[PAGE_TITLE=MEMORY PARTITION D, LOW]
BYTE LANE 2 BYTE LANE 3BYTE LANE 1
21 21
MEMORY DUMMY_BOMEMPTYEMPTYU7F2,U7F1
6 6 6 6
6
IN
6
IN
6
6
IN
6
IN
6
IN
6
IN
6
IN IN
IN
V_MEMIOAB
1
2
1
2
V_MEMIOAB
1
2
1
2
BI BI BI BI
MA_RESET_N MA_A<15..0>
MA_BA<2..0>
MA_WE_N MA_CAS_N MA_RAS_N MA_DMU_1 MA_DML_1
MA_VREFCAB MA_VREFDQB
R7F13 1 KOHM 1%
CH 402
MA_VREFCAB
R7F14 1 KOHM 1%
CH 402
R6F7 1 KOHM 1%
CH 402
R6F8 1 KOHM 1%
CH 402
MA_DQSU_1_P MA_DQSU_1_N MA_DQSL_1_P MA_DQSL_1_N
1
2
MA_VREFDQB
1
2
TRUE
C7F1
1 UF 10%
6.3 V X5R 402
C4U10
1 UF 10%
6.3 V X5R 402
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
OUT
OUT
21
21
U7F1
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001
V_MEMIOAB
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
DDR3_4GBIT_X16
BGA96
U7F1
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
I82
MEM
MA_CLK0_DP
J7
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MA_CLK0_DN
K7
MA_DQ31
A3
MA_DQ30
B8
MA_DQ29
A2
MA_DQ28
A7
MA_DQ27
C2
MA_DQ26
C8
MA_DQ25
C3
MA_DQ24
D7
MA_DQ23
H7
MA_DQ22
G2
MA_DQ21
H8
MA_DQ20
H3
MA_DQ19
F8
MA_DQ18
F2
MA_DQ17
F7
MA_DQ16
E3
MA_CKE0
K9
MA_CS0_N
L2
MA_ODT0
K1
MA_ZQ1
L8
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
BGA96X866978-001
MEM
NC4 NC3 NC2 NC1
I111
1
R7F10
243 OHM 1%
2
CH 402
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
6 6
6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6
6 6
6
GREYBULL_RETAIL
21/72 21/72 M 1.0
Page 22
MEMORY CHANNEL A
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_MEMIOAB
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
U6E5
DDR3_4GBIT_X16
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
BGA96X866978-001
MEM
NC4 NC3 NC2 NC1
I37
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
BYTE LANE 5
V_MEMIOAB
R6F1
1
1 KOHM 1%
CH
2
402
R6F2
1
1 KOHM 1%
CH
2
402
V_MEMIOAB
1
R6E25 1 KOHM 1%
CH
2
402
1
R6E26 1 KOHM 1%
CH
2
402
1
C6F3
1 UF 10%
6.3 V
2
X5R 402
MA_VREFDQC
1
C4T11
1 UF 10%
6.3 V
2
X5R 402
22
BYTE LANE 6BYTE LANE 4 BYTE LANE 7
V_MEMIOAB
R6E27
1
1 KOHM 1%
CH
2
402
R6E24
1
1 KOHM 1%
CH
2
402
V_MEMIOAB
1
R6E9 1 KOHM 1%
2
CH 402
1
R6E8 1 KOHM 1%
CH
2
402
MA_VREFCADMA_VREFCAC
1
C6E14
1 UF 10%
6.3 V
2
X5R 402
MA_VREFDQD
1
C4T1
1 UF 10%
6.3 V
2
X5R 402
MEM
NC4 NC3 NC2 NC1
VSS12 VSS11 VSS10
VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
BGA96
I109
L9 L1 J9 J1
T9 T1 P9 P1 M9 M1 J8 J2 G8 E1 B3 A9
G9 G1 F9 E8 E2 D8 D1 B9 B1
V_MEMIOAB
U6E3
DDR3_4GBIT_X16
22 22
OUTOUT
22
OUTOUT
R9 R1 N9 N1 K8 K2 G7 D9 B2
H9 H2 F1 E9 D2 C9 C1 A8 A1
VDD9 VDD8 VDD7 VDD6 VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
X866978-001
U6E5
I11
MEM
U6E5,U6E3 EMPTY EMPTY MEMORY DUMMY_BOM
DDR3_4GBIT_X16
6 6 6 6
6
IN IN
6 6
IN
6
IN
6
IN
6
IN
6
IN
6
IN
22
IN
22
IN
MA_DQSU_2_P
BI
MA_DQSU_2_N
BI
MA_DQSL_2_P
BI
MA_DQSL_2_N
BI
MA_RESET_N
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1
MA_BA<2..0> MA_BA<2..0>
MA_WE_N MA_CAS_N MA_RAS_N MA_DMU_2 MA_DML_2
MA_VREFCAC
MA_VREFDQC
0 2
1 0
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001 BGA96
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MA_CLK0_DP
J7
MA_CLK0_DN
K7
MA_DQ47
A3
MA_DQ46
B8
MA_DQ45
A2
MA_DQ44
A7
MA_DQ43
C2
MA_DQ42
C8
MA_DQ41
C3
MA_DQ40
D7
MA_DQ39
H7
MA_DQ38
G2
MA_DQ37
H8
MA_DQ36
H3
MA_DQ35
F8
MA_DQ34
F2
MA_DQ33
F7
MA_DQ32
E3
MA_CKE0
K9
MA_CS0_N
L2
MA_ODT0
K1
MA_ZQ2
L8
1
R6F3
243 OHM 1%
2
CH 402
IN IN
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN
6 6
6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6
6 6
6
[PAGE_TITLE=MEMORY PARTITION D, HIGH]
22 22
TRUE
U6E3
I78
MEM
DDR3_4GBIT_X16
6
BI
6
BI BI
6
BI
6
IN
6 6
IN
IN
6
IN
6
IN
6
IN
6
IN
6
IN IN
IN
MA_DQSU_3_P MA_DQSU_3_N
MA_DQSL_3_N MA_RESET_N MA_A<15..0>MA_A<15..0>
MA_WE_N MA_CAS_N MA_RAS_N MA_DMU_3 MA_DML_3
MA_VREFCAD MA_VREFDQD
15 14 13
12 11 10 9 8 7 6 5 4 3 2 1 0
2 1 0
C7
DQSU_P
B7
DQSU_N
F3
DQSL_P
G3
DQSL_N
T2
RESET_N
M7
A15
T7
A14
T3
A13
N7
A12
R7
A11
L7
A10
R3
A9
T8
A8
R2
A7
R8
A6
P2
A5
P8
A4
N2
A3
P3
A2
P7
A1
N3
A0
M3
BA2
N8
BA1
M2
BA0
L3
WE_N
K3
CAS_N
J3
RAS_N
D3
DMU
E7
DML
M8
VREFCA
H1
VREFDQ
X866978-001 BGA96
CK_P CK_N
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
CKE
CS_N
ODT
ZQ
MA_CLK0_DPMA_DQSL_3_P
J7
MA_CLK0_DN
K7
MA_DQ63
A3
MA_DQ62
B8
MA_DQ61
A2
MA_DQ60
A7
MA_DQ59
C2
MA_DQ58
C8
MA_DQ57
C3
MA_DQ56
D7
MA_DQ55
H7
MA_DQ54
G2
MA_DQ53
H8
MA_DQ52
H3
MA_DQ51
F8
MA_DQ50
F2
MA_DQ49
F7
MA_DQ48
E3
MA_CKE0
K9
MA_CS0_N
L2
MA_ODT0
K1
MA_ZQ3
L8
1
R6E22
243 OHM 1%
2
CH 402
BI BI BI BI BI BI BI BI
BI BI BI BI BI BI BI BI
IN IN
IN IN
IN
6 6 6
6 6 6 6 6 6 6 6
6 6 6 6 6 6 6 6
6 6
6
GREYBULL_RETAIL
22/72 22/72 M 1.0
Page 23
MEMORY CHANNEL A, DECOUPLING + TERMINATION
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
PARTITION A DECOUPLING
V_MEMIOAB
R4T6
1%36.5 OHM CH
R6E5
CH
R4T7
1% CH
R6E6
CH
R4T8
1% CH
R4T4
1% CH
R4T5
CH
R6E21
1%36.5 OHM CH
R6E4
CH
V_VTTA
21
21
21
21
21
21
V_VTTA
21
21
21
V_MEMIOAB
I136
1
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOAB
1
C4U9
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOAB
1
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOAB
1
1 UF 10%
6.3 V
2
X5R 402
1
2
1
2
1
2
1
2
I137
1 UF 10%
6.3 V X5R 402
I139
1 UF 10%
6.3 V X5R 402
I142
1 UF 10%
6.3 V X5R 402
C4T2
1 UF 10%
6.3 V X5R 402
1
2
C6E3
22 UF 20%
6.3 V X7R 805
1
2
22 UF 20%
6.3 V X7R 805
1
2
C7F4 C7F3C6E18
22 UF 20%
6.3 V X7R 805
MEMORY A, CHIP 0 DECOUPLING
I138
1
C3U15C3U9C3U7 C3U4 C3U1
1 UF 10%
6.3 V
2
X5R 402
1
1 UF 10% 10%
6.3 V
2
X5R 402
1
2
1 UF
6.3 V X5R 402
MEMORY A, CHIP 1, DECOUPLING
I140
1
2
1 UF 10%
6.3 V X5R 402
1
C3U8 C4U12
1 UF 10%
6.3 V 6.3 V
2
X5R 402
1
2
C3U6
1 UF 10%
6.3 V X5R 402
MEMORY A, CHIP 2, DECOUPLING
1
2
1 UF 10%
6.3 V X5R 402
1
2
I143
1 UF 10%
6.3 V X5R 402
1
2
C4T16C4T18C4U3
1 UF 10%
6.3 V X5R 402
1
2
MEMORY A, CHIP 3, DECOUPLING
1
2
C4T9
1 UF 10%
6.3 V X5R 402
1
2
I146I145
1 UF 10%
6.3 V X5R 402
1
2
1 UF 10%
6.3 V X5R 402
1
2
1
C3U12
1 UF 10%
6.3 V
2
X5R 402
1
2
I144
C4T15C4T17C4T12
1 UF 10%
6.3 V X5R 402
1
2
22 UF 20%
6.3 V X7R 805
I141
C3U14C4U11C3U3
1 UF 10%
6.3 V X5R 402
I147
1 UF 10%
6.3 V X5R 402
1
2
1
2
1
2
C4T14
1 UF 10%
6.3 V X5R 402
1
2
C3U16
1 UF 10%
6.3 V X5R 402
C3U18
1 UF 10%
6.3 V X5R 402
1
2
I148
C4T4C4T5C4T8C4T10
1 UF 10%
6.3 V X5R 402
1
2
C4T13
1 UF 10%
6.3 V X5R 402
1
C4T3C4T7
1 UF 10%
6.3 V
2
X5R 402
C3U19
1 UF 10%
6.3 V X5R 402
1
1 UF 10%
2
X5R 402
V_VTTA
6
MA_A<15..0>
IN
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R6E12
36.5 OHM 402
R4T11
36.5 OHM1% 402
R4T9
36.5 OHM 402
R6E14
36.5 OHM1%
36.5 OHM1%
36.5 OHM1%
36.5 OHM1%
36.5 OHM
36.5 OHM1%
36.5 OHM1%
36.5 OHM1%
36.5 OHM1%
36.5 OHM1%
36.5 OHM1%
36.5 OHM1%
402
R6E16
402
R6E13
402
R4T2
402
R6E18
402
R6E2
402
R6E20
402
R4T3
402
R6E17
402
R6E3
402
R6E1
402
R6E15
402
R6E10
402
CH
CH
CH
CH
1% CH
CH
CH
CH
1%36.5 OHM CH
CH
CH
CH
CH
1% CH
CH
1% CH
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
6
IN
6
IN
6
IN
6
IN
6
IN
6
IN
6
IN
MA_BA<2..0>
MA_WE_N
MA_CAS_N
MA_RAS_N
MA_ODT0
MA_CKE0
MA_CS0_N
2
1
0
402
36.5 OHM1% 402
36.5 OHM 402
36.5 OHM1% 402
36.5 OHM 402
36.5 OHM 402
36.5 OHM1% 402
402
36.5 OHM1% 402
[PAGE_TITLE=MEMORY PARTITION D, DECOUPLING, TERMINATION]
GREYBULL_RETAIL
23/72 23/72 M 1.0
Page 24
KIC, USB
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
U4D2
KIC
6 of 11
IC
I84
USBD_D0_DP USBD_D0_DN
AF8 AE8
USB2_WIFI_DP
USB2_WIFI_DN
BI BI
36
36
36
36
35
35
35
35
35
35
IN IN
IN IN
IN IN
IN IN
USB3_AUX_RP USB3_AUX_RN
USB3_BP_P1_RP USB3_BP_P1_RN
USB3_BP_P0_RP
USB3_BP_P0_RN
USB3_FP_P0_RP
USB3_FP_P0_RN
Y1 Y2
V1 V2
T1 T2
AA8 AA7
USBC_D1_RXP USBC_D1_RXN
USBB_D2_RXN
USBB_D3_RXP USBB_D3_RXN
USBA_D2_RXN
USBC_D0_DP USBC_D0_DN
USBC_D1_TXP USBC_D1_TXN
USBB_D2_TXPUSBB_D2_RXP USBB_D2_TXN
USBB_D0_DP USBB_D0_DN
USBB_D1_DP USBB_D1_DN
USBB_D3_TXP USBB_D3_TXN
USBA_D2_TXPUSBA_D2_RXP USBA_D2_TXN
USBA_D0_DP USBA_D0_DN
AC4 AC3
W3
USB3_AUX_TP_C
W4
USB3_AUX_TN_C
U3
USB3_BP_P1_TP_C
U4
USB3_BP_P1_TN_C
AE4 AE3
AD2 AD1
R3
USB3_BP_P0_TP_C
R4
USB3_BP_P0_TN_C
AB10
USB3_FP_P0_TP_C
AB9
USB3_FP_P0_TN_C
AC7 AC8
0.1 UF
6.3 V
C7B10
0.1 UF
6.3 V
C7B12
0.1 UF
6.3 V
0.1 UF
6.3 V
C6B9
10%
C3F4
10%
21
10%
10%
21
21
21
X5R 402
X5R 402
0.1 UF
X5R 402
X5R 402
C6B8
0.1 UF
6.3 V
C7B9
10%
6.3 V
C7B11
0.1 UF
6.3 V
C3F5
0.1 UF
6.3 V
21
10%
10%
10%
21
X5R 402
21
21
X5R 402
X5R 402
402 X5R
USB2_AUX_DP
USB2_AUX_DN
USB3_AUX_TP
USB3_AUX_TN
USB3_BP_P1_TP
USB3_BP_P1_TN
USB2_BP_P1_DP
USB2_BP_P1_DN
USB2_BP_P0_DP
USB2_BP_P0_DN
USB3_BP_P0_TP
USB3_BP_P0_TN
USB3_FP_P0_TP
USB3_FP_P0_TN
USB2_FP_P0_DP
USB2_FP_P0_DN
BI BI
OUT
OUT
OUT
OUT
BI BI
BI BI
OUT
OUT
OUT
OUT
BI BI
36
36
36
36
35
35
35
35
35
35
35
35
35
35
35
35
DB4B3 DB4B2
1
USB3_TP_P1_RP
1
USB3_TP_P1_RN
USBA_D1_TXRTUNE
1
R6R19
174 OHM 1%
2
CH 402
AB1
USBA_D3_RXP USBA_D3_TXP
AB2
AB11
USBA_D1_TXRTUNE
X861949-001
USBA_D1_DP USBA_D1_DN
USBA_D3_TXNUSBA_D3_RXN
USBA_D2_AMOUT USBA_D1_AMOUT USBA_D0_AMOUT
USBB_D2_AMOUT USBB_D1_AMOUT USBB_D0_AMOUT
USBC_D1_AMOUT USBC_D0_AMOUT
USBD_D0_AMOUT
AF6 AF5
AA3 AA4
AA5 AE6 AC11
R5 AD5 AF4
W5 AC5
AE9
BGA515
USB3_TP_P1_TP_C
USB3_TP_P1_TN_C
USBA_D2_AMOUNT USBA_D1_AMOUNT USBA_D0_AMOUNT
USBB_D2_AMOUNT USBB_D1_AMOUNT USBB_D0_AMOUNT
USBC_D1_AMOUNT USBC_D0_AMOUNT
USBD_D0_AMOUNT
1 1 1
1 1 1
1 1
1
C4B8
0.1 UF
6.3 V
DB6P4 DB4C2 DB4D4
DB6P7 DB4C3 DB4D1
DB6P5 DB6P6
DB3D8
10%
USB2_ACC_DP
USB2_ACC_DN
21
X5R 402
C4B7
0.1 UF
6.3 V
21
10%
USB3_TP_P1_TP
USB3_TP_P1_TN
402 X5R
1
1
BI BI
DB4B5
DB4B4
36
36
GREYBULL_RETAIL
24/72 24/72 M 1.0
Page 25
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
39 39 39
KIC, PCIEX + SATA + VIDEO
C4D2
21
I5
U4D2
KIC
IC
6.3 V
3 of 11
2 2 2 2
PEX_L0_SOC_SB_TP_C
IN
PEX_L0_SOC_SB_TN_C
IN
PEX_L1_SOC_SB_TP_C
IN
PEX_L1_SOC_SB_TN_C
IN
SATA1_HDD_RP
IN
SATA1_HDD_RN
IN
SATA0_ODD_RP
IN
SATA0_ODD_RN
D26 E26 A23 B23
B6 A6 B4 A4
PEX_RX0_DP PEX_RX0_DN PEX_RX1_DP PEX_RX1_DN
SATA1_RX_DP SATA1_RX_DN SATA0_RX_DP
PEX_TX0_DP PEX_TX0_DN PEX_TX1_DP PEX_TX1_DN
SATA1_TX_DP SATA1_TX_DN SATA0_TX_DP SATA0_TX_DNSATA0_RX_DN
SATA_AMOUT
PEX_AMOUT
C24
PEX_L0_SB_SOC_TP PEX_L0_SB_SOC_TN
D24 C22
PEX_L1_SB_SOC_TP
D22
PEX_L1_SB_SOC_TN
D5
SATA1_HDD_TP
C5
SATA1_HDD_TN SATA0_ODD_TP
D3
SATA0_ODD_TN
C3
SATA_AMOUT
C1
PEX_AMOUT
B25
0.1 UF
39 39
OUT
39
OUT
39
OUT
39
OUTIN
1
DB5C1
1
DB6R1
10%0.1 UF
C5D9
6.3 V
X5R 402
10%
C4D1
10%
0.1 UF
X5R 402
6.3 V
C5D12
0.1 UF
6.3 V
21
21
10%
21
X5R 402
X5R 402
PEX_L0_SB_SOC_TP_C
PEX_L0_SB_SOC_TN_C
PEX_L1_SB_SOC_TP_C
PEX_L1_SB_SOC_TN_C
OUT
OUT
OUT
OUT
2
2
2
2
V_SB1P1
R5R15
1
300 OHM 1%
CH
2
402
V_3P3STBY
D4C2
37 38
IN
X861949-001 BGA515
2
NC
SOT23-3
BAS40LT
3 1
HDMI_RX_CEC_3P3
R4C3
1
27 KOHM 5%
CH
2
402
DB6P3
37 37
37 37
37 37
37 37
DB6P1 DB6P2
SP1_TM1
1
IN IN
IN IN
IN IN
IN IN
1 1
2
IN
HDMI_RX_REXT TMDS_RX_DP2
TMDS_RX_DN2 TMDS_RX_DP1
TMDS_RX_DN1 TMDS_RX_DP0
TMDS_RX_DN0 TMDS_RX_CLKP
TMDS_RX_CLKN HMDI_RX_TESTP
HDMI_RX_TESTN
R4C5
HDMI_RX_CEC_RHDMI_RX_CEC
402
21
CH
330 OHM 1%
DP1_HPD
R3T20
1
100 KOHM 1%
CH
2
402
V_3P3
R6P8
1
2 KOHM 1%
CH
2
402
DDA_LFCSENSE DDA_LFC
1
C6R35
0.1 UF 10%
6.3 V
2
X5R 402
U4D2
KIC
7 of 11
N3
TMDS_RX_REXT
M1
TMDS_RX_DP2
M2
TMDS_RX_DN2
L2
TMDS_RX_DP1
L3
TMDS_RX_DN1
K1
TMDS_RX_DP0
K2
TMDS_RX_DN0 DP_TX_LANE0_N
J3
TMDS_RX_CLK_P
J2
TMDS_RX_CLK_N
K4
TMDS_RX_TESTP
J4
TMDS_RX_TESTN
HDMI_RX_CEC
D12
DP_TM1
B8
DP_TX_HPD
F11
DDA_LFCSENSE
F10
DDA_LFC
PLACE AS CLOSE AS POSSIBLE TO U4D2 PINS F10-F11
DP_TX_LANE1_P DP_TX_LANE1_N
DP_TX_LANE0_P
DP_TX_AUX_P DP_TX_AUX_N
HDMI_RX_HPD
DP_ATB
I24
IC
BGA515X861949-001
DP_L1_SB_SOC_TP
B10
DP_L1_SB_SOC_TN
C10
DP_L0_SB_SOC_TP
A9
DP_L0_SB_SOC_TN
B9
DP_AUX_SB_SOC_TP
A11
DP_AUX_SB_SOC_TN
B11
HDMI_RX_HPD
P1P2
DP_ATB
C12
C5D5
0.1 UF 10%
6.3 V
C5D3
0.1 UF
6.3 V
C5D7
0.1 UF
6.3 V
1
C5D6
10%0.1 UF
6.3 V
21
X5R 402
C5D4
0.1 UF 10%
6.3 V
21
X5R
10%
402
C5D8
0.1 UF
6.3 V
21
X5R
10%
402
OUT
DB5R1
21
10%
21
37
X5R 402
21
DP_L1_SB_SOC_TP_C
DP_L1_SB_SOC_TN_C
DP_L0_SB_SOC_TP_C
X5R 402
DP_L0_SB_SOC_TN_C
DP_AUX_SB_SOC_TP_C
X5R 402
DP_AUX_SB_SOC_TN_C
R5R2
1
100 KOHM 1%
CH
2
402
R5R1
1
100 KOHM 1%
CH
2
402
OUT
OUT
OUT
OUT
OUT
OUT
2
2
2
2
2
2
V_3P3
EMPTYU4D2 KIC DUMMY_BOMEMPTY
TRUE
GREYBULL_RETAIL
25/72 25/72 M 1.0
Page 26
8 1234567
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
63
50 51 57
69 50 51 57 58
52 53 56
69 52 53 56
8
8
FT6R6
40 44 50 52 53 54 64 65 66
44 65 40 50 52 53 54 64 66
38
38
37
37
40
IR_BLAST_SMC_OUT
OUT
V_5P0
1
R6R22 R6R23
10 KOHM 5%
CH
2
IN
402
OUT IN OUT
1
R4D26
1.27 KOHM 1%
2
CH 402
BI
OUT
FTP
BI
SB_SOC_DATA
SB_SOC_CLK
1
SMBUS_DATA
SMBUS_CLK
HDMI_TX_DDC_DATA
BI
HDMI_TX_DDC_CLK
OUT
HDMI_RX_DDC_DATA
BI
HDMI_RX_DDC_CLK
OUT
IR_DATA
IN
V_5P0
1
2
V_3P3STBY
10 KOHM 5%
CH 402
1
R4D27
1.27 KOHM 1%
2
CH 402
1
R5E10
21
5%0 OHM CH
402
R6R6 R6R7
1
10 KOHM
2
FTP
5% CH
402
FT6R7
V_SOC1P8
1
2 KOHM 1%
2
CH 402
0 OHM
0 OHM
49.9 OHM
49.9 OHM
49.9 OHMCH1%
10 OHM 1%
R4D38
402
R4D39
402
R5D2
402
R5D1
402
R5C28
402
R5C27
402
FT5N1
FT5N2
1
2
21
5% CH
21
5% CH
21
1% CH
21
1% CH
21
21
CH
FTP
FTP
R5T9R5T11
2 KOHM 1%
CH 402
243 OHM
402
55
61
32
1
1
69 54
1
10 KOHM 5%
CH
2
402
R4D31
1% CH
243 OHM 1%
29 65
40 67
40 67
40
40
32
36
54
70
70
21
402
FT6R21
SMC_RST_N
IN
PWRSW_N
IN
EJECTSW_N
IN
BINDSW_N
IN
INT_N
IN
VREG_V5P0_DUAL_SEL0
OUT
VREG_3P3STBY_IN_SEL
OUT
ENET_RST_N
OUT
ENET_WAKE_N
IN
SMC_P3_GPIO7
USB_AUX_OCP_FLT_N
IN
VREG_V5P0_PWRGD
IN
VREG_V5P0_EN
OUT
VREG_PWRGPB_PWRGD VREG_PWRGPB_EN VREG_PWRGPA_PWRGD VREG_PWRGPA_EN
FT6R11
SMC_RXD
IN
FT6R12
SMC_CTS
IN
SB_SOC_DATA_R
R4D33
21
SB_SOC_CLK_R
CH
SMBUS_DATA_R SMBUS_CLK_R
HDMI_TX_DDC_DATA_SB HDMI_TX_DDC_CLK_SB
HDMI_RX_DDC_DATA_SB HDMI_RX_DDC_CLK_SB
FTP
FTP
FTP
1
1
DIO
V_3P3STBY
1
6
1
1
V_5P0STBY
D5C1
R4D28
4.7 KOHM 5%
EMPTY 402
AF23
FT6R19
FTP
AE21 AD21
FT6R20
FTP
AE20 AF20
AC14
2
1
3
KIC, SMC
U4D2
4 of 11
SMC_RST_N_IN
V23
SMC_P4_GPIO7
V22
SMC_P4_GPIO6
T23
SMC_P4_GPIO5
U23
SMC_P4_GPIO4
U22
SMC_P4_GPIO3
U21
SMC_P4_GPIO2
T21
SMC_P4_GPIO1
R23
SMC_P4_GPIO0
I21
L21
SMC_P3_GPIO7
M22
SMC_P3_GPIO6
N22
SMC_P3_GPIO5
N21
SMC_P3_GPIO4
P21
SMC_P3_GPIO3
R21
SMC_P3_GPIO2
R22
SMC_P3_GPIO1
P23
SMC_P3_GPIO0
V25
SMC_UART1_RXD
V26
SMC_UART1_CTS
SMBUS3_SDA SMBUS3_SCK
SMBUS2_SDA SMBUS2_SCK
H6
SMBUS1_SDA
G6
SMBUS1_SCK
G5
SMBUS0_SDA
F5
SMBUS0_SCK SECURITY_BYPASS
N26
SMC_IR_IN
X861949-001
V_5P0STBY
D5C1
5
4
KIC
IC
SMC_UART1_TXD
SMC_UART1_RTS
SMC_P2_GPIO7 SMC_P2_GPIO6 SMC_P2_GPIO5 SMC_P2_GPIO4 SMC_P2_GPIO3 SMC_P2_GPIO2 SMC_P2_GPIO1 SMC_P2_GPIO0
SMC_P1_GPIO7 SMC_P1_GPIO6 SMC_P1_GPIO5 SMC_P1_GPIO4 SMC_P1_GPIO3 SMC_P1_GPIO2 SMC_P1_GPIO1 SMC_P1_GPIO0
SMC_P0_GPIO7 SMC_P0_GPIO6 SMC_P0_GPIO5 SMC_P0_GPIO4 SMC_P0_GPIO3 SMC_P0_GPIO2 SMC_P0_GPIO1 SMC_P0_GPIO0
T24
V24
V_3P3STBY
G2 F2 G1 F1 G3 H5 J5 J6
J21 H21 J22 K22 J23 H25 J25 H26
M23 M24 L23 K24 L25 M25 L26 K26
BGA515
1
SMC_TXD
1
SMC_RTS
1
R4F19
10 KOHM 5%
2
CH 402
VREG_CPUGFX_PWRGD COLD_RESET_N HDD_PWR_EN ODD_3P3V_STBY_EN ODD_PWR_EN ODD_OPEN ODD_STATUS ODD_WAKE_N
SOC_THERMTRIP_R SOC_PWR_OK_R SOC_RESET_N_R
FAN_PWM
SMC_P1_GPIO2
SMC_P1_GPIO1 LED_NEXUS_R
HDMI_V_5P0_EN PSU_V12P0_EN DP0_HPD WIFI_RESET_N ENET_V_3P3STBY_EN HDMI_RX_DDC_5V_E_R SMC_DBG_LED0_SWO VREG_SB1P8_EN
FTP
FTP
V_5P0
FT6R14
FT6R13
I181
R9C64
1
10 KOHM 5%
CH
2
402
0 OHM
OUT
OUT
IN
IN OUT OUT OUT OUT
IN
IN
0 OHM
402
R5R9
402
OUT
OUT
OUT OUT
IN OUT OUTOUT
OUT OUT
70
70
44 45
68
39
39
39
39
39
39
R5R7
5% CH
40
40
38
41 42
38
36
32
65
60
5% CH
21
21
4.7 KOHM
0 OHM 5%
402
R5R12
0 OHM
402
R6R24
0 OHM
402
V_SOC1P8
R5R8
5% CH
402
R5R5
21
CH 21
5% CH
R5R6
4.7 KOHM
402
21
5% CH
5% CH
1
2
R5T10
1
4.7 KOHM 5%
CH
2
402
1
2
R5R33
402
R5R34
0 OHM
402
SOC_THERMTRIP SOC_PWR_OK SOC_RST_N SP_SMC_INT_NSP_SMC_INT_N_R
1
1
USB_AUX_EN
21
5%0 OHM CH
IR_BLAST_EN
21
5% CH
HDMI_RX_DDC_5V_E
1 1
FTP
FTP
FTP FTP
FT5R3
FT4T1
FT5R1 FT5R2
IN OUT OUT
IN
OUT
OUT
IN
8
8 44 68
68 8
8
36
63
37
THESE SIGNALS ARE NOT COMPLETE- ENDING IS CLK OR P AND N
DIO
GREYBULL_RETAIL
26/72 26/72 M 1.0
Page 27
KIC, FACET
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
FT6T1 FTCT3 FT6T2
FTP FTP FTP
1 1 1
65
65
65
65
65 65
65
FT6R15 FT6R18
IN IN IN IN IN
IN IN IN IN
FT6R1 FT6R3 FT6R5 FT6R4
1
FTP
1
FTP
KER_DBG_CTS
KER_DBG_RXD
SPI_SS_N SPI_MOSI SPI_CLK
SB_TDI SB_TMS SB_TRST SB_TCK
1
FTP
1
FTP
1
FTP
1
FTP
U4D2
KIC
I38
IC
2 of 11
TDO
U25
N24 P24 P25 P26
AA12 H22
R26
UART0_CTS
U26 T25
UART0_RXD
AF13
SPI_SS_N
AF11 AE12
SPI_MOSI
AE11
SPI_CLK_IN
AA13
TDI
AB14
TMS
AB12
TRST
AB13
TCK
UART0_TXD UART0_RTS
SPI_MISO
GPIO3 GPIO2 GPIO1 GPIO0
POR_ATB
BGA515X861949-001
40
38
SPI_MISO_R
IN
OUT
KER_DBG_TXD
KER_DBG_RTS
R4D3
36.5 OHM1%
1
FAN_TACH_IN
21
CH
402
SB_TDO
POR_ATB
FT6R2
FTP
HDMI_DP_OUT_SEL
1
FTP
1
FTP
SPI_MISO
SMM_GPIO3 SMM_GPIO2 SMM_GPIO1 SMM_GPIO0
1
TP
R6R16
100 OHM
402
100 OHM
5% CH
R5R21
402
FT6R16 FT6R17
OUT OUT
OUT
BI BI
BI
OUT
DB6R2
21
21
5% CH
65
65
1
65
65
FTP
FT6T4
SMM_GPIO3 (N24) OVERLOADED ON SLT SYSTEMS
BI
GREYBULL_RETAIL
27/72 27/72 M 1.0
Page 28
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
U4D2
E9
DP_VSS[0]
A8
DP_VSS[1]
D10
DP_VSS[2]
D8
DP_VSS[3]
A10
DP_VSS[4]
C8
DP_VSS[5]
C9
DP_VSS[6]
C11
DP_VSS[7]
E11
DP_VSS[8]
F4
SATA_VSS[0]
E3
SATA_VSS[1]
E5
SATA_VSS[2]
D1
SATA_VSS[3]
D2
SATA_VSS[4]
D4
SATA_VSS[5]
C2
SATA_VSS[6]
C6
SATA_VSS[7]
C4
SATA_VSS[8]
B3
SATA_VSS[9]
B2
SATA_VSS[10]
B5
SATA_VSS[11]
B7
SATA_VSS[12]
A2
SATA_VSS[13]
A3
SATA_VSS[14]
A5
SATA_VSS[15]
A7
SATA_VSS[16]
B1
SATA_VSS[17]
D6
SATA_VSS[18]
R6
HDMI_VSS[0]
N1
HDMI_VSS[1]
N2
HDMI_VSS[2]
N4
HDMI_VSS[3]
N6
HDMI_VSS[4]
M3
HDMI_VSS[5]
M4
HDMI_VSS[6]
L1
HDMI_VSS[7]
L4
HDMI_VSS[8]
K3
HDMI_VSS[9]
J1
HDMI_VSS[10]
H2
HDMI_VSS[11]
H3
HDMI_VSS[12]
H4
HDMI_VSS[13]
F14
PLL_VSS[0]
E16
PLL_VSS[1]
E13
PLL_VSS[2]
X861949-001
KIC
8 of 11
IC
PEX_VSS[0] PEX_VSS[1] PEX_VSS[2] PEX_VSS[3] PEX_VSS[4] PEX_VSS[5] PEX_VSS[6] PEX_VSS[7] PEX_VSS[8]
PEX_VSS[9] PEX_VSS[10] PEX_VSS[11] PEX_VSS[12] PEX_VSS[13] PEX_VSS[14] PEX_VSS[15]
USB3_VSS[0] USB3_VSS[1] USB3_VSS[2] USB3_VSS[3] USB3_VSS[4] USB3_VSS[5] USB3_VSS[6] USB3_VSS[7] USB3_VSS[8] USB3_VSS[9]
USB3_VSS[10] USB3_VSS[11] USB3_VSS[12] USB3_VSS[13] USB3_VSS[14] USB3_VSS[15] USB3_VSS[16] USB3_VSS[17] USB3_VSS[18] USB3_VSS[19] USB3_VSS[20] USB3_VSS[21] USB3_VSS[22] USB3_VSS[23] USB3_VSS[24] USB3_VSS[25] USB3_VSS[26] USB3_VSS[27] USB3_VSS[28] USB3_VSS[29] USB3_VSS[30] USB3_VSS[31]
I3
A26 A25 A24 A22 B26 B24 B22 C26 C25 C23 D25 D23 E25 E24 E22 F25
AC1 AC2 AC9 AC10 AB3 AB4 AB5 AB6 AB7 AB8 AA1 AA2 AA9 AA10 AA11 Y3 Y4 Y5 W1 W2 V3 V4 V5 U1 U2 T3 T4 T5 R1 R2 P3 P4
BGA515
AF1 AF2 AF3 AF7
AF9 AF10 AF12 AF15 AF17 AF19 AF21 AF24 AF25 AF26
AE1
AE2
AE5
AE7 AE16 AE22 AE23 AE24 AE25 AE26
AD3
AD4
AD6
AD8
AD9 AD18 AC12 AC13 AC15 AC17 AC19 AC20 AC21 AB16 AA14 AA18
V21
U24
T11
T12
T13
T15
T16
T22
T26
R11
R24
R25
P12
P14
P22
N15
N23
N25
M11
M14
M16
M21
M26
L5 L11 L12 L15 L16
U4D2
VSS[0] VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67]
KIC
I4
IC9 of 11
VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136]
L22 L24 K6 K21 K23 K25 J24 J26 H1 AB21 G4 G25 F3 F7 F8 F18 F23 E1 E21 AB22 AB23 AB24 D18 D19 AB25 C16 C17 C21 B12 AB26 AA19 AA20 B18 B19 A12 A17 H23 AB19 AB20 AC18 AC22 AC23 AC26 AD23 AD25 AB18 AD20 AD19 AE19 AA21 AA22 AA23 AA24 AA25 AA26 Y21 Y22 Y23 Y24 Y25 Y26 D13 D14 D15 C13 B13 B14 B15 A20
X861949-001
BGA515
GREYBULL_RETAIL
28/72 28/72 M 1.0
Page 29
V_12P0
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
1
2
22 PF 5% 50 V NPO 402
R5D5
249 KOHM1%
402
CH
Y5D1
25 MHZ
GND1 GND2
SM
XTAL
KIC, CLOCKS + STRAPPING + POR
CONNECT BYPASS PIN TO BACKUP CLOCK
V_3P3
R5R16
1
100 KOHM 5%
2
CH 402
R5R17
1
100 KOHM 5%
2
EMPTY 402
2
31 2
4
1
2
C5D10C5D11
22 PF 5% 50 V NPO 402
1
32
SMC_XTAL_OUT SMC_XTAL_IN
R5D4
49.9 OHM 1%
EMPTY 402
10 KOHM
402
DB5R2 DB5R3
IN
IN IN
R5R18
CH
IN IN
1 1
IN IN
V_1P8STBY
PEX_REF_CLK1_REQN PEX_REF_CLK2_REQN
BKUP_SB_SYNC_CLKP BKUP_SB_SYNC_CLKN
R5D11
21
0 OHM
21
5%
402
SMC_BYPASS_CLK_IN
5%
BKUP_SB_PEX_REF_CLKP BKUP_SB_PEX_REF_CLKN
250M_CLK_BYPASS_DP 250M_CLK_BYPASS_DN
BKUP_SB_AV_CLKP BKUP_SB_AV_CLKN
SMC_XTAL_OUT_R
CH
U4D2
KIC
IC
1 of 11
G22
V_VDD18_DET
C18
PEX_REF_CLK1_REQN
C19
PEX_REF_CLK2_REQN
AD22
VPGM
E18
100M_SYNC_CLK_BYPASS_DP
E19
100M_SYNC_CLK_BYPASS_DP
A18
XTAL_CLK_OUT
A19
XTAL_CLK_IN
AD24 B16
TEST
D21
SMC_BYPASS_CLK_IN
E20
PCIE_BYPASS_CLK_DP
D20
PCIE_BYPASS_CLK_DN
F20
250M_CLK_BYPASS_DP
F21
250M_CLK_BYPASS_DN
D16
AV_CLK_BYPASS_DP
D17
AV_CLK_BYPASS_DN
SOC_NS_SYNC_CLK_DP SOC_NS_SYNC_CLK_DN
V_EXT_DET
V_EXT_OK
SMC_RST_N_OUT
I27
CLK_MONITOR
RTC_CLK_OUT
EMMC_CLK
ENET_REF_CLK
SOC_NS_AV_CLK_DP SOC_NS_AV_CLK_DN
PEX_REF_CLK2_DP PEX_REF_CLK2_DN
PEX_REF_CLK1_DP PEX_REF_CLK1_DN
PEX_REF_CLK0_DP PEX_REF_CLK0_DN
G21 F22 AF22
E17
A21
AC16 C20
B17
A13 A14
B20 B21
C14 C15
A15 A16
V_EXT_DET V12P0_PWRGD
SMC_RST_N_OUT_R
SB_CLK_MONITOR
RTC_CLK_OUT
MMC_CLK
ENET_REF_CLK
SOC_REF_NS_100M_CLKP SOC_REF_NS_100M_CLKN
SOC_AV_NS_100M_CLKP SOC_AV_NS_100M_CLKN
SOC_NB_PEX_SS_100M_CLKP SOC_NB_PEX_SS_100M_CLKN
ENET_PEX_SS_100M_CLKP ENET_PEX_SS_100M_CLKN
SOC_PEX_SS_100M_CLKP SOC_PEX_SS_100M_CLKN
42
OUT
1
DB5D7
BI
33
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
2
OUT
32
OUT
32
OUT
2
OUT
2
OUT
R5R20
11.3 KOHM 1%
CH 402
R5R19
1.13 KOHM 1%
CH 402
DB5D4
R5B17
100 OHM 1%
EMPTY
402
1
PEX_XTAL2
1
2
C5R15
1 UF 10% 16 V X5R 603
1 KOHM 1%
OUT
R4D29
402
R5D12
0 OHM
402
32
CH
21
5% CH
21
SMC_RST_N
1
C4D3
270 PF 10% 50 V
2
X7R 402
X32K_X1
1
R5D13
69.8 KOHM 1%
2
EMPTY 402
OUT
OUT
65 26 42
8
X861949-001
BGA515
GREYBULL_RETAIL
29/72 29/72 M 1.0
Page 30
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_1P1STBY
120 OHM
0.2A AFB603
0.5DCR
1
4.7 UF 10%
6.3 V
2
X5R 603
V_KIC1P1SPLL2
FB6R5
21
1
C6R75C6R74
4.7 UF 10%
6.3 V
2
X5R 603
V_1P1STBY
H24
PLL2_VDD11S[0]
G23
PLL2_VDD11S[1]
G24
PLL2_VDD11S[2]
T14
VDD11S[0]
R12
VDD11S[1]
R13
VDD11S[2]
R14
VDD11S[3]
R15
VDD11S[4]
R16
VDD11S[5]
P11
VDD11S[6]
P13
VDD11S[7]
P15
VDD11S[8]
P16
VDD11S[9]
N11
VDD11S[10]
N12
VDD11S[11]
N13
VDD11S[12]
N14
VDD11S[13]
N16
VDD11S[14]
M12
VDD11S[15]
M13
VDD11S[16]
M15
VDD11S[17]
L13
VDD11S[18]
L14
VDD11S[19]
X861949-001
U4D2
KIC
10 of 11
IC
VDD33S_1[0] VDD33S_1[1] VDD33S_1[2] VDD33S_1[3] VDD33S_1[4] VDD33S_1[5] VDD33S_1[6] VDD33S_1[7] VDD33S_2[0] VDD33S_2[1]
USB2_VDD33S[0] USB2_VDD33S[1] USB2_VDD33S[2]
VDD33S_XTAL[0] VDD33S_XTAL[1]
VDD18S[0] VDD18S[1] VDD18S[2] VDD18S[3] VDD18S[4] VDD18S[5]
FLSH_VDD18S[0] FLSH_VDD18S[1] FLSH_VDD18S[2] FLSH_VDD18S[3]
I3
AB15 AB17 AA15 AA16 AA17 W21 W22 W23 L6 K5
AE10 AD10 AD11
F19 F17
AD26 AC24 AC25 W24 W25 W26
AD14 AD13 AD12 AE13
BGA515
V_3P3STBY
V_KIC3P3USB
V_1P8STBY
0.1DCR
1
C6R38
4.7 UF 10%
6.3 V
2
X5R 603
V_KIC3P3XTAL
1
4.7 UF 10%
6.3 V
2
X5R 603
V_1P8STBY
V_3P3STBY
FB6R1
21
0.5 A 603
FB60 OHM
V_3P3STBY
FB6R4
60 OHM
0.5 A
0.1DCR
FB 603
1
2
1
2
1
2
1
2
1
2
1
2
V_3P3
1
2
C6P11
4.7 UF 10%
6.3 V X5R 603
C5R5
4.7 UF 10%
6.3 V X5R 603
C5R11
4.7 UF 10%
6.3 V X5R 603
C6R90
4.7 UF 10%
6.3 V X5R 603
C6P9
4.7 UF 10%
6.3 V X5R 603
C6P17
4.7 UF 10%
6.3 V X5R 603
R6P12
0 OHM 5%
EMPTY 402
21
1%
EMPTY
V_SB1P1
V_SB1P1
V_5P0
R6P4
1
10 KOHM 1%
CH
2
402
KIC3P3HDMI_G
V_KIC3P3HDMI
60 OHM
0.5 A
0.1DCR
1
C6R93
4.7 UF 10%
6.3 V
2
X5R 603
V_KIC1P1PLL0
120 OHM
0.2A A
0.5DCR
1
C5R3
4.7 UF 10%
6.3 V
2
X5R 603
V_KIC1P1PLL1
120 OHM
0.5DCR
1
C5R10
4.7 UF 10%
6.3 V
2
X5R 603
1
C6R89
10 UF 20%
6.3 V
2
X5R 603
1
C6R92
10 UF 20%
6.3 V
2
X5R 603
1
C6P18
10 UF 20%
6.3 V
2
X5R 603
1
FB6R7
FB 603
FB5R2
FB5R4
2
SOT23 AO3414L FET Q6P2
3
21
KIC3P3HDMI_FB
V_SB1P1
21
FB 603
V_SB1P1
21
FB
6030.2A A
V_SB1P1
V_SB1P1
V_SB1P1
R6P11
21
43 V_VREG_12P0_TO_5P0_3P3
IN
V_SB1P8
60 OHM
0.5 A
0.1DCR
1
C5R7
4.7 UF 10%
6.3 V
2
X5R 603
V_SB1P8
60 OHM
0.5 A
0.1DCR
1
C6R66
4.7 UF 10%
6.3 V
2
X5R 603
V_SB1P8
1
C6R15
4.7 UF 10%
6.3 V
2
X5R 603
21
1
C6R73C6R69
4.7 UF 10%
6.3 V
2
X5R 603
V_SB1P8
60 OHM
0.1DCR
1
C5R9
4.7 UF 10%
6.3 V
2
X5R 603
V_SB1P8
0.5 A
0.1DCR
1
C5R4
4.7 UF 10%
6.3 V
2
X5R 603
1
C5R12 C5R13
1 UF 10%
6.3 V
2
X5R 402
V_KIC1P8AUX
FB5R7
21
FB 603
1
2
V_KIC1P8CK
FB6R3
21
FB 603
1
2
V_KIC1P8PLL1
FB5R3
21
FB
6030.5 A 1
2
V_KIC1P8PLL0
FB5R1
21
FB60 OHM 603
1
2
1
2
C5R14
4.7 UF 10%
6.3 V X5R 603
C6R47
4.7 UF 10%
6.3 V X5R 603
C5R8
4.7 UF 10%
6.3 V X5R 603
C5R2
4.7 UF 10%
6.3 V X5R 603
10 UF 20%
6.3 V X5R 603
E10
D9
D11
F12 F13 E12
E14 F15 E15 F16
F24 E23
AD7 AC6 AA6
Y6 W6
E2 E4
V_SB1P8
C7 D7
10 KOHM
402
U4D2
AUX_VDD18[0] AUX_VDD18[1] AUX_VDD18[2]
I4 CK_VDD18[0] CK_VDD18[1] CK_VDD18[2]
PLL1_VDD18 PLL0_VDD18
PEX_VDD18[0] PEX_VDD18[1] PEX_VDD11[1]
USB3_VDD18<0> USB3_VDD18<1> USB3_VDD18<2> USB3_VDD18<3> USB3_VDD18<4>
SATA_VDD18[0] SATA_VDD18[1]
DP_VDD18[0] DP_VDD18[1]
X861949-001
V_SB1P8
1
2
60 OHM
0.5 A
0.1DCR
C6R55
4.7 UF 10%
6.3 V X5R 603
FB6R2
FB 603
V_KIC1P8USB
21
1
C6R33
4.7 UF 10%
6.3 V
2
X5R 603
KIC3P3HDMI_C
1%
EMPTY
Q6P1
EMPTY
KIC
11 of 11
3
1
2
HDMI_VDD33[0] HDMI_VDD33[1]
HDMI_VDD11[0] HDMI_VDD11[1] HDMI_VDD11[2]
PLL1_VDD11 PLL0_VDD11
PEX_VDD11[0]
USB3_VDD11<0> USB3_VDD11<1> USB3_VDD11<2> USB3_VDD11<3>
SATA_VDD11[0] SATA_VDD11[1]
DP_VDD11[0] DP_VDD11[1] DP_VDD11[2]
KIC3P3HDMI_B
IC
M5 M6
P5 P6 N5
G26 F26
V6 U5 U6 T6
F6 E6
E7 E8 F9
BGA515
R6P7
10 KOHM
402
GREYBULL_RETAIL
30/72 30/72 M 1.0
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KIC, DECOUPLING
8 1234567
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B
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REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_1P1STBY
4.7 UF 10%
4.7 UF 10%
1 UF
1 UF 10%
1 UF
C6R70
21
6.3 V X5R 603
C6R24
21
6.3 V X5R 603
C6R53
21
10%1 UF
6.3 V X5R 402
C6R42
21
10%1 UF
6.3 V X5R 402
C6R61
21
10%
6.3 V X5R 402
C6R31
21
6.3 V X5R 402
C6R32
21
10%1 UF
6.3 V X5R 402
C6R71
21
10%
6.3 V X5R 402
V_KIC1P8PLL0
6.3 V X5R 402
1 UF
10%
C6R59
6.3 V
C6R51
6.3 V
C6R40
6.3 V
C6R68
6.3 V
C6R67
6.3 V
C6R30
6.3 V
21
10%1 UF
X5R 402
21
10%1 UF
X5R 402
21
10%1 UF
X5R 402
21
10%1 UF
X5R 402
21
10%1 UF
X5R 402
21
10%
X5R 402
V_KIC1P8PLL1
1 UF
C6R49C6R54
6.3 V X5R 402
V_SB1P1
C5R6
21
4.7 UF
6.3 V X5R 603
C6R1
6.3 V X5R 402
C6R2
1 UF
6.3 V X5R 402
C6R29
1 UF 10%
6.3 V X5R 402
C6R36
6.3 V X5R 402
C6R37
1 UF 10%
6.3 V X5R 402
C6R41
1 UF 10%
6.3 V X5R 402
10%
21
10%1 UF
21
10%
21
21
10%1 UF
21
21
1 UF 10%
6.3 V X5R 402
C6R13
1 UF 10%
6.3 V X5R 402
C6R25
1 UF 10%
6.3 V X5R 402
C6R26
1 UF 10%
6.3 V X5R 402
C6R8
1 UF 10%
6.3 V X5R 402
C6R19
10%1 UF
6.3 V X5R 402
21
21
21
21
21
V_KIC1P8CK
C6R52
21
10%
1 UF
6.3 V X5R 402
C6R46
21
10%1 UF
2121
10%1 UF
6.3 V X5R 402
C6R45
1 UF
6.3 V X5R 402
21
10%
V_3P3STBY
1 UF
1 UF 10%
1 UF
1 UF 10%
1 UF 10%
1 UF 10%
1 UF
V_SB1P1
C6R60C6R4
6.3 V X5R 402
C6R76
6.3 V X5R 402
C6R57
6.3 V X5R 402
C6R78
6.3 V X5R 402
C6R21
6.3 V X5R 402
C6R11
6.3 V X5R 402
C6R64
6.3 V X5R 402
C6R87
1 UF
6.3 V
C6R88
6.3 V
10%
10%
10%
X5R 402
X5R 402
2121
21
21
21
21
21
21
10%
10%1 UF
V_KIC1P8USB
C6R43
21
10%
1 UF
6.3 V X5R 402
C6R82
21
10%1 UF
6.3 V X5R 402
C6R44
21
10%1 UF
6.3 V X5R 402
C6R85
21
10%1 UF
6.3 V X5R 402
C6R83
21
1 UF
10%
6.3 V X5R 402
C6R86
21
10%1 UF
6.3 V X5R 402
C6R48
21
10%
1 UF
6.3 V X5R 402
V_SB1P1
C6R14
1 UF 10%
6.3 V X5R 402
C6R10
1 UF 10%
6.3 V X5R 402
21
21
21
21
V_SB1P8
V_KIC1P1PLL1
C6R12
10%1 UF
6.3 V X5R 402
C6R22
1 UF
10%
6.3 V X5R 402
C6R23
1 UF
10%
6.3 V X5R 402
C6R6
1 UF 10%
6.3 V X5R 402
C6R27
10%
1 UF
6.3 V X5R 402
C6R84
1 UF
10%
6.3 V X5R 402
C6R81
10%1 UF
6.3 V X5R 402
C6R62
1 UF
6.3 V
21
21
21
21
21
21
21
X5R 402
V_KIC3P3XTALV_KIC1P8AUX V_1P8STBY
V_KIC3P3USB
V_KIC1P1PLL0
21
10%
C6R63
1 UF
6.3 V X5R 402
C6R72
1 UF
6.3 V X5R 402
C6R34
6.3 V X5R 402
C6R28
1 UF
6.3 V X5R 402
C6R39
6.3 V X5R 402
C6R65
1 UF 10%
6.3 V X5R 402
10%
10%
10%1 UF
10%
10%1 UF
21
V_SB1P1
C6R16
10%1 UF
6.3 V X5R 402
C6R18
1 UF 10%
6.3 V X5R 402
C6R17
1 UF 10%
6.3 V X5R 402
C6R7
1 UF 10%
6.3 V X5R 402
21
21
21
21
21
21
21
V_KIC1P1SPLL2
C6R77
6.3 V X5R 402
C6R79
6.3 V X5R 402
C6R80
1 UF 10%
6.3 V X5R 402
21
10%1 UF
21
10%1 UF
21
V_SB1P8
21
21
V_KIC3P3HDMI
C6R5
21
10%1 UF
6.3 V X5R 402
C6R9
21
10%1 UF
6.3 V X5R 402
C5R1
6.3 V X5R 402
C6R20
6.3 V X5R 402
21
10%1 UF
21
10%1 UF
GREYBULL_RETAIL
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B
C
A
B
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C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
29
OUT
29
IN
R5B8
0 OHM 5%
CH 402
PEX_XTAL_1_R
C5B5
18 PF 5% 50 V NPO 402
V_3P3STBY_ENET
1
R5B2
10 KOHM 5%
CH
2
402
Y5B1
25 MHZ
31 2
GND1
4
GND2
SM
XTAL
26
OUT
29
IN
29
IN
2
2
PEX_ENET_SOC_TP_C
OUT
OUT
V_3P3STBY_ENET
26
IN
R5B7
49.9 OHM 1%
CH 402
V_3P3STBY_ENET
PEX_XTAL_2_R
C5B4
18 PF 5% 50 V NPO 402
PEX_ENET_SOC_TN_C
R5B13
1
10 KOHM 5%
EMPTY
2
402
R5B16
1
10 KOHM 5%
CH
2
402
2 2
V_1P0STBY
1
2
1
2
C5N15
0.1 UF 10% 10 V X5R 402
1
2
1
2
0.1 UF 10% 10 V X5R 402
C5N17
4.7 UF 10%
6.3 V X5R 805
C5B8
21
X5R
0.1 UF
0.2 OHM
10%
4.7 UH
0.9 A
71
FT5N3
71
FT5N4
71
FT5N5
FT5N6
IN IN
C5B7C5B9
4.7 UF 10%
6.3 V X5R 805
6.3 V
402
V_3P3STBY_ENET
YELLOW-GREEN
SM
71
2
1
L5B1
OUT
FTP
OUT
FTP
OUT
FTP
IN
FTP
D5B1
EMPTY
D5B2
GREEN SM
C5B6
21
6.3 V X5R
402
0.1 UF
21
IND SM
1
2
ENET_EEDI
1
ENET_EECS
1
ENET_EESK
1
ENET_EEDO
1
FT5N7
ENET_LED0
4
ENET_LED1
3
21
EMPTY
10%
R5B6
2.49 KOHM 1%
CH 402
FTP
DB5B1
DB5B2
ENET_LED3
DB5B3
V_3P3STBY_ENET
R5B15
10 KOHM
ENET_PEX_SS_100M_CLKP ENET_PEX_SS_100M_CLKN
1
R5N2
10 KOHM 5%
EMPTY
2
402
1 1
402
1
402
511 OHM
1
402
21
5% CH
402
FT5N9
ENET_ISOLATE_N
PEX_ENET_SOC_TP
PEX_ENET_SOC_TN PEX_SOC_ENET_TP_C PEX_SOC_ENET_TN_C
PEX_REF_CLK1_REQN
1
R5N1
10 KOHM 5%
EMPTY
2
402
R5B11
21
1%511 OHM
EMPTY
R5B12
21
1%511 OHM
EMPTY
R5B14
21
1%
EMPTY
CONTROLLER, ETHERNET
V_3P3
R5P1
1
1 KOHM 5%
CH
2
402
R5N3
1
FTP
ENET_WAKE_N
ENET_RST_N
PEX_XTAL1
PEX_XTAL2
ENET_REGOUT
ENET_RSET
ENET_LED0_R
1
15 KOHM 1%
EMPTY
2
402
U5B2
28 26
19 20 22 23 17 18 25 16
43 44
36 33 34 35 46
32 30
40 37 31
14 15 38 49
RTL8151GNM
LANWAKEB ISOLATEB
REFCLK_P REFCLK_N HSOP HSON HSIP HSIN PERSTB CLKREQB
CKXTAL1 CKXTAL2
REGOUT ENSWREG VDDREG1 VDDREG2 RSET
EEDI/SDA EECS/SCL
LED0 LED1/EESK LED2/EEDO
NC SMBDATA GPO
DVDD33_1 DVDD33_2
DVDD10_1 DVDD10_2 DVDD10_3
AVDD10_1 AVDD10_2 AVDD10_3 AVDD10_4
EVDD10
AVDD33_1 AVDD33_2 AVDD33_3 AVDD33_4
QFN49X862048-001
ENET_SMBCLK
ENET_SMBDATA
ENET_SMBALERT_N
R5B4
1
10 KOHM 5%
EMPTY
2
402
EEPROM CONFIG (93C66) GREYBULL WITH EEPROM GREYBULL W/O EEPROM
IC
MDIP0 MDIN0 MDIP1 MDIN1 MDIP2 MDIN2 MDIP3 MDIN3
GND1 GND2
402
FT6N2
27 39
13 29 41
3 6 9 45
21
12 42 47 48
1
MDIP0
2
MDIN0
4
MDIP1
5
MDIN1
7
MDIP2
8
MDIN2
10
MDIP3
11
MDIN3
24
V_3P3STBY_ENET
R5B9
21
5%1 KOHM
EMPTY
402
R5B3
21
5%1 KOHM
EMPTY
R5B5
402
21
EMPTY
1 KOHM 5%
26
1
2
IN
FTP
10%
6.3 V X5R 402
V_3P3STBY
1
1
2
CHIPSET RTL8151GNM RTL8151GNM
1
C6N2
0.1 UF 10%
6.3 V
2
X5R 402
ENET_V_3P3STBY_EN
R6N2
1
10 KOHM 5%
CH
2
402
1
0.1 UF 10% 10%
6.3 V
2
X5R 402
C5N7C5N11
0.1 UF0.1 UF 10%
6.3 V X5R 402
1
C5N14 C5N8 C5N12 C5N13 C5N4 C5N3C5N5
0.1 UF 10%
6.3 V
2
X5R 402
U5B1 STUFF EMPTY
RT4B1
21
IC
OUT
OC_N
GND
EMPTY 1206
1 3 24
V_3P3STBY_ENET_FLT_N
1
10 UF 20%
6.3 V
2
X5R 603
1
DB4B8
01.10 A
U4B5
TPS2065
5
IN
EN
X862402-001 SOT23-5
V_3P3STBY_ENET
1
0.1 UF 0.1 UF
6.3 V
2
X5R 402
1
2
10%
6.3 V X5R 402
1
2
C5N6
0.1 UF 10%
6.3 V X5R 402
1
2
0.1 UF 10%
6.3 V X5R 402
1
2
C5N10C5N2C5N9 C5N16 C5N1
0.1 UF 10%
6.3 V X5R 402
V_1P0STBY
STUFF
EMPTY
1
0.1 UF 10%
6.3 V 6.3 V
2
X5R 402
0 OHM
1210
1
0.1 UF 10%
6.3 V
2
X5R 402
BI BI BI BI BI BI BI BI
C5B3 R5B3 R5B4 R5B9 STUFF EMPTY
1 UF 10%
6.3 V X5R 402
34 34 34 34 34 34 34 34
V_3P3STBY V_3P3STBY_ENET
R4B16
5%
EMPTY
EMPTY
EMPTY
21
1
2
0.1 UF 10%
X5R 402
1
2
R5N2
STUFF
EMPTY
0.1 UF 10%
6.3 V X5R 402
V_3P3STBY_ENET
1
2
1
2
EMPTY EMPTY
C4B5C4B6
10 UF 20%
6.3 V X5R 603
1
FTP
0.1 UF 10%
6.3 V X5R 402
1
2
FT5N8
EMPTY
C6N1
0.1 UF 10%
6.3 V X5R 402
R5B5 R5N1
EMPTY
GREYBULL_RETAIL
32/72 32/72 M 1.0
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
33
BI
33
BI
33
BI
33
BI
33
BI
33
BI
33
BI
33
BI
33
BI
29
BI
33
BI
U4D2
KIC
5 of 12
MMC_RESET_N
MMC_DATA7 MMC_DATA6 MMC_DATA5 MMC_DATA4 MMC_DATA3 MMC_DATA2 MMC_DATA1 MMC_DATA0
MMC_CMD
IC
I446
AE18 AD15 AE15 AD16 AF16 AF18 AD17 AE17
AF14 AE14
X861949-001 BGA515
MMC_DATA<7> MMC_DATA<6> MMC_DATA<5> MMC_DATA<4> MMC_DATA<3> MMC_DATA<2> MMC_DATA<1> MMC_DATA<0> MMC_CMD MMC_CLK
MMC_RST_N
MMC_DATA<7..0>
7 6 5 4 3 2 1 0
MMC_CMD MMC_RST_N
0 OHM
402
R4D16
0 OHM
402
R4D8
0 OHM 5%
402
R4D10
0 OHM
21
5% CH
21
CH
V_1P8STBY
21
R4D4
R4D9
R4D13
R4D11
R4D17
R4D15
R4D21
R4D19
R4D23
CH402 1%
21
CH402 1%
21
CH402 1%
21
CH402
21
CH402
21
CH402 1%
21
CH402
21
CH402
21
CH402
10 KOHM
10 KOHM
10 KOHM
10 KOHM
1%
10 KOHM
1%
10 KOHM
10 KOHM
1%
10 KOHM
1%
10 KOHM
1%
21
21
21
CH
5%
402
CH
R4D14
0 OHM 5%
402
R4D24
0 OHM
402
5% CH
21
CH
21
5% CH
R4D18
402
0 OHM 5%
402
402
1
2
BI
OUT OUT
21
5% CH
R4D22
CH
R4D2
21
5%0 OHM CH
R4D36
10 KOHM 1%
EMPTY 402
33
33
33
R4D12
0 OHM
402
21
0 OHM 5%
402
5% CH
R4D20
R4D6
2 1
1 KOHM
SIGNALS ROUTED TO NC PINS FOR ESCAPE
D7
PIN J6 ROUTED TO PIN K7, K8 PIN J5 ROUTED TO PIN K5
D6
PIN J4 ROUTED TO PIN K3, L3
D5
PIN J3 ROUTED TO PIN H2
D4
PIN J2 ROUTED TO PIN K1
D3
VDDI
PIN K2 ROUTED TO PIN L1
EMMC
MMC_RST_N_R
DB3D3
FT7R1
FTP
FT7R2
FTP
1 1
1
V_1P8STBY
R4D7
1
10 KOHM 1% 402 CH 1/16W
2
X806693-001
U3D1 X867925-001
I477
MMC_DATA_R<7> MMC_DATA_R<6> MMC_DATA_R<5> MMC_DATA_R<4> MMC_DATA_R<3> MMC_DATA_R<2> MMC_DATA_R<1> MMC_DATA_R<0>
MMC_CMD_R MMC_CLK_R
X875870-001 EMMC_SECIC
J6 J5 J4 J3 J2 H5 H4 H3
W5 W6 U5
A4 A6 A9
A11
B2 L4
B13
D1
D14
MMC_X7
D4
MMC_X6 MMC_X4 MMC_X8
MMC_X5
D3 D5 D7
H1 H2 H8
H9 H10 H11 H12 H13 H14
J1
J7
J8
J9 J10 J11 J12 J13 J14
K1
K3
K7
K8
K9 K10 K11 K12 K13
U3D1
emmc_169pin
1 of 3
DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0
CMD CLK
X866676-001
eMMC_169PIN
NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 NC30 NC31 NC32 NC33 NC34
2 of 3
X866676-001
MEM,SM,8GB,FLASH,EMMCU3D1 MEM,SM,8GB,FLASH,EMMCU3D1 MEM,SM,8GB,FLASH,EMMC EMMC_HXIC
IC
VCCQ4 VCCQ3 VCCQ2 VCCQ1 VCCQ0
VCC3 VCC2 VCC1 VCC0
VDDI
VSSQ4 VSSQ3 VSSQ2 VSSQ1 VSSQ0
VSS3 VSS2 VSS1 VSS0RSTN
BGA169B
NC35 NC36 NC37 NC38 NC39 NC40 NC41 NC42 NC43 NC44 NC45 NC46 NC47 NC48 NC49 NC50 NC51 NC52 NC53 NC54 NC55 NC56 NC57 NC58 NC59 NC60 NC61 NC62 NC63 NC64 NC65 NC66 NC67 NC68 NC69
IC
AA5 AA3 Y4 W4 K6
U9 T10 N5 M6
K2 AA6
AA4 Y5 Y2 K4 U8 R10 P5 M7
K14 L1 L2 L3
L12 L13 L14 M1 M2 M3 M12 M13 M14 N1 N2 N3 N12 N13 N14 P1 P2 P12 P13 P14 R1 R2 R3 R12 R13 R14 T1 T2 T3 T12
1
2
D5
1
1 1 1 1
C7R4
0.1 UF 10%
6.3 V X5R 402
VDDI_ROUTE
DB633
DB634
DB635
DB636
TRUE EMMC_TOSHX866677-001 IC
TRUE TRUE
1
C3D8 C7R5
0.1 UF 10%
6.3 V
2
X5R 402
1
C7R6
0.1 UF 10%
6.3 V
2
X5R 402
DB638DB637
1
D6
V_1P8STBY
2.2 UF 20%
6.3 V X5R 402
1
2
C7R9
1 UF 10%
6.3 V X5R 402
1
2
V_3P3STBY
1
C7R7
0.1 UF 10%
6.3 V
2
X5R 402
1
C3D9
1 UF 10%
6.3 V
2
X5R 402
MMC_X NETS ARE DUMMY NETS TO IMPROVE PAD ADHESION
U3D1U3D1
eMMC_169PIN
AA7
AA10
H6 H7 K5 M5 M8
M9 M10 N10
P3 P10
R5
T5
U6
U7 U10
T13 T14
U1
U2
U3 U12 U13 U14
V1
V2
V3 V12 V13 V14
W1
W2
W3
RFU0 RFU1 RFU2 RFU3 RFU4 RFU5 RFU6 RFU7 RFU8 RFU9 RFU10 RFU11 RFU12 RFU13 RFU14 RFU15 RFU16
NC70 NC71 NC72 NC73 NC74 NC75 NC76 NC77 NC78 NC79 NC80 NC81 NC82 NC83 NC84 NC85 NC86
3 of 3
1
2
1
2
C7R8
2.2 UF 20%
6.3 V X5R 402
0.1 UF 10%
6.3 V X5R 402
BGA169BX866676-001BGA169B
1
2
IC
NC87 NC88 NC89 NC90 NC91 NC92 NC93 NC94 NC95 NC96 NC97 NC98
NC99 NC100 NC101 NC102 NC103 NC104 NC105 NC106 NC107 NC108 NC109 NC110 NC111 NC112 NC113 NC114 NC115 NC116 NC117 NC118 NC119 NC120 NC121
0.1 UF 10%
6.3 V X5R
W7 W8 W9 W10 W11 W12 W13 W14 Y1 Y3 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 AA1 AA2 AA8 AA9 AA11 AA12 AA13 AA14 AE1 AE14 AG2 AG13 AH4 AH6 AH9 AH11
1
C6R56C6R58C6R50
2.2 UF 20%
6.3 V
2
X5R 402402
MMC_X11
MMC_X3 MMC_X10 MMC_X12
MMC_X2 MMC_X1
[PAGE_TITLE=EMMC]
PIN Y2 ROUTED TO PIN W1
GND
Tue Jun 18 16:42:22 2013
DRAWING
GREYBULL_RETAIL
33/72 33/72 M 1.0
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
34
32 34 32 34
32 34 32 34
32 32 34
32 34 32 34
BI BI
BI BI
BI BI
BI BI
MDIP0 MDIN0
MDIP1 MDIN1
MDIP2 MDIN2
MDIP3 MDIN3
RJ45_CT1
1
C5B2
0.01 UF 10% 16 V
2
X7R 402
CONN, RJ45 + TOSLINK
V_5P0
1
C8A4
1 UF 10%
6.3 V
2
X5R 402
IN
SPDIF_OUT
1
C8A1
22 PF 5% 50 V
2
NPO 402
J5A1
RJ45 10P
1
TRD1_P
2
TRD1_N
3
TRD2_P
4
TRD2_N
7
TRD3_P
8
TRD3_N
9
TRD4_P
10
TRD4_N
5
CT1 SHLD1
6
CT2
X866473-004 TH
CONN
SHLD2
11 12
2
EG8A1 X882235-001
EMPTY 402
2 1
J8A2
2
VCC
3
VIN
1
GND
4
EMI1
5
EMI2
6
EMI3
7
EMI4
X866874-003
CONN
TOSLINK
TH
EG5B4 EMPTY
SP3010
32 34
BI
32 34
BI
32 34
BI
32 34
BI
32 34
BI
32 34
BI
32 34
BI
32 34
BI
MDIN3 MDIN3
MDIP3 MDIP3
MDIN2 MDIN2
MDIP2 MDIP2
1
D1A
10
D1B
2
D2A
9
D2B
4
D3A
7
D3B
5
D4A
6
D4B
CONNECT As TO Bs
X863136-001 DFN10
GNDA GNDB
3 8
32 34
BI
32 34
BI
32 34
BI
32 34
BI
32 34
BI
32 34
BI
32 34
BI
32 34
BI
MDIN1 MDIN1
MDIP1 MDIP1
MDIN0 MDIN0
MDIP0 MDIP0
EG5B5 EMPTY
1
D1A
10
D1B
2
D2A
9
D2B
4
D3A
7
D3B
5
D4A
6
D4B
CONNECT As TO Bs
X863136-001 DFN10
SP3010
GNDA GNDB
3 8
GREYBULL_RETAIL
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CONN, USB
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PROJECT NAME FABCSAPAGE
PAGE
35 24 35 24
35 24 35 24
24 35 24 35
24 35 24 35
35 24 35 24
35 24 35 24
35 35
35 35
24 35 24 35
24 35 24 35
35 35
35 35
35 24 35 24
35 24 35 24
24 35 24 35
24 35 24 35
35 35
35 35
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
USB3_BP_P0_RN USB3_BP_P0_RN
USB3_BP_P0_RP USB3_BP_P0_RP
USB2_BP_P0_DN USB2_BP_P0_DN
USB2_BP_P0_DP USB2_BP_P0_DP
USB3_BP_P1_RN USB3_BP_P1_RN
USB3_BP_P1_RP USB3_BP_P1_RP
USB3_BP_P1_TN_CMC USB3_BP_P1_TN_CMC
USB3_BP_P1_TP_CMC USB3_BP_P1_TP_CMC
USB2_BP_P1_DN USB2_BP_P1_DN
USB2_BP_P1_DP USB2_BP_P1_DP
USB3_BP_P0_TN_CMC USB3_BP_P0_TN_CMC
USB3_BP_P0_TP_CMC USB3_BP_P0_TP_CMC
USB3_FP_P0_RN USB3_FP_P0_RN
USB3_FP_P0_RP USB3_FP_P0_RP
USB2_FP_P0_DP USB2_FP_P0_DP
USB2_FP_P0_DN USB2_FP_P0_DN
USB3_FP_P0_TN_CMC USB3_FP_P0_TN_CMC
USB3_FP_P0_TP_CMC USB3_FP_P0_TP_CMC
EG7B1 ESD ARRAY
8
D1A
7
D1B
9
D2A
6
D2B
11
D3A
4
D3B
12
D4A
3
D4B
13
D5A
2
D5B
14
D6A
1
D6B
CONNECT As TO Bs
X863137-001 DFN14
EG7B2 ESD ARRAY
8
D1A
7
D1B
9
D2A
6
D2B
11
D3A
4
D3B
12
D4A
3
D4B
13
D5A
2
D5B
14
D6A
1
D6B
CONNECT As TO Bs
X863137-001 DFN14
EG3F1 ESD ARRAY
8
D1A
7
D1B
9
D2A
6
D2B
11
D3A
4
D3B
12
D4A
3
D4B
13
D5A
2
D5B
14
D6A
1
D6B
CONNECT As TO Bs
X863137-001 DFN14
SP3011
SP3011
SP3011
GNDA GNDB
GNDA GNDB
GNDA GNDB
10 5
10 5
10 5
V_5P0DUAL
24 35 24 35
35 24
35 24
V_5P0DUAL
24 35 24 35
35 24
35 24
V_5P0DUAL
24 35
BI
24 35
BI
35 24
OUT
35 24
OUT
24
IN
24
IN
01.50 A
BI BI
OUT
OUT
24
IN
24
IN
RT3F1
BI BI
OUT
OUT
24
IN
24
IN
RT7A1
THRMSTR01.50 A 1812
USB2_BP_P0_DN USB2_BP_P0_DP
USB3_BP_P0_RN
USB3_BP_P0_RP
USB3_BP_P0_TN
USB3_BP_P0_TP
RT7B2
21
THRMSTR 1812
USB2_BP_P1_DN USB2_BP_P1_DP
USB3_BP_P1_RN
USB3_BP_P1_RP
USB3_BP_P1_TN
USB3_BP_P1_TP
21
THRMSTR01.50 A 1812
USB2_FP_P0_DN USB2_FP_P0_DP
USB3_FP_P0_RN
USB3_FP_P0_RP
USB3_FP_P0_TN
USB3_FP_P0_TP
21
1
C7B1
220 UF 20% 10 V ELEC RDL
4 3
V_5P0_USB3_P0
2
470 PF 5% 50 V X7R
12
402
CM7B4
2
C7A1C7A2
4.7 UF 10%
6.3 V X5R
1
603
USB3_BP_P0_TN_CMC USB3_BP_P0_TP_CMC
BOTTOM SLOT
J7A2
1 2 3 4 5 6 7 8 9
USB3 DUAL
VBUS D­D+ GND STDA_SSRX_N STDA_SSRX_P GND_DRAIN STDA_SSTX_N STDA_SSTX_P
X865822-004 TH
CONN
MTH1 MTH2
19 20
CHK
80 OHM
SM
X869713-001
21
V_5P0_USB3_P1
1
C7B4
220 UF 20% 10 V ELEC RDL
2
470 PF 5% 50 V X7R
12
402
CM7B3
4 3
2
C7B2C7B3
4.7 UF 10%
6.3 V X5R
1
603
USB3_BP_P1_TN_CMC USB3_BP_P1_TP_CMC
J7A2
10
VBUS
11
D-
12
D+
13
GND
14
STDA_SSRX_N
15
STDA_SSRX_P
16
GND_DRAIN
17
STDA_SSTX_N
18
STDA_SSTX_P
X865822-004 TH
TOP SLOT
USB3 DUAL
CONN
MTH1 MTH2
21 22
CHK
80 OHM
SM
X869713-001
21
V_5P0_USB3_FP
1
C3F1
220 UF 20% 10 V ELEC RDL
2
12
CM3F1
4 3
80 OHM
X869713-001
5% 50 V X7R 402
CHK
SM
2
C3F3C3F2
4.7 UF470 PF 10%
6.3 V X5R
1
603
USB3_FP_P0_TN_CMC USB3_FP_P0_TP_CMC
21
J3F2
USB3_9P_2MH
1
VBUS
2
D-
3
D+
4
GND
5
STDA_SSRX_N
6
STDA_SSRX_P
7
GND_DRAIN
8
STDA_SSTX_N
9
STDA_SSTX_P
X866825-003 TH
CONN
MTH1 MTH2
10 11
GREYBULL_RETAIL
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MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
FT4N3
36 24
36 24
24
24
26
OUT
OUT
IN
IN
IN
1
FTP
2 1
USB3_AUX_RP
USB3_AUX_RN
USB3_AUX_TP
USB3_AUX_TN
36 24 36 24
36 24 36 24
24 36 24 36
24 36 24 36
36 36
36 36
V_5P0DUAL
1
C6B6
1 UF 10%
6.3 V
2
X5R 402
USB_AUX_EN
1
2
EG6B2 X882235-001
DIO 402
EG6B1 ESD ARRAY
CONN, USB
SP3011
BI BI
BI BI
BI BI
BI BI
BI BI
BI BI
R6B3
100 KOHM 5%
CH 402
USB3_AUX_RN USB3_AUX_RN
USB3_AUX_RP USB3_AUX_RP
USB2_AUX_DP USB2_AUX_DP
USB2_AUX_DN USB2_AUX_DN
USB3_AUX_TN_CMC USB3_AUX_TN_CMC
USB3_AUX_TP_CMC USB3_AUX_TP_CMC
RT6B1
TPS2065
OC_N
EMPTY
1812
OUT
GND
01.50 A U6B2
5
IN
EN
X862402-001 SOT23-5
21
IC
1 3 24
8
D1A
7
D1B
9
D2A
6
D2B
11
D3A
4
D3B
12
D4A
3
D4B
13
D5A
2
D5B
14
D6A
1
D6B
X863137-001 DFN14
V_5P0_USB3_AUX_FLT
CONNECT As TO Bs
1
DB6B3
GNDA GNDB
10 5
24 24 24 24 26
X882235-001
USB2_WIFI_DP
BI
USB2_WIFI_DN
BI
USB2_ACC_DP
BI
USB2_ACC_DN
BI
WIFI_RESET_N
IN
X882235-001
402
21
DIO
EG3B3
EG3B1 EG3B2
DIO 402
2 1
402
21
DIO X882235-001
EG3B4
X882235-001 DIO
402
2 1
R3B5
1
10 KOHM 5%
EMPTY
2
402
V_5P0_USB3_AUX
1
C6B5
220 UF 20% 10 V ELEC RDL
63
IN
24 36
BI
24 36
BI
CM6B2 R6B1
4 3
80 OHM
SM
X869713-001
IR_BLAST_SENSOR_SIG
USB2_AUX_DP USB2_AUX_DN
USB3_AUX_TP_CMC
36
USB3_AUX_TN_CMC
36
21
2
470 PF 5% 50 V X7R
12
8 2
3
12 13 17
9
10
2
C6B4C6B1
4.7 UF 10%
6.3 V X5R
1
603402
J6A1
USB_13P_4MH
VBUS IR_I/O D+
D­STDA_SSRX_P
STDA_SSRX_N STDA_SSTX_P
STDA_SSTX_N
X862297-003 TH
GND_DRAIN
CONN
VCC
GND GND GND
MTH4 MTH3 MTH2 MTH1
51
11 6 7 4
16 15 14
V12P0_AUX
26
OUT
1
C6B3
4.7 UF 10% 16 V
2
X5R 805
V_SOC1P8
USB_AUX_OCP_FLT_N
1
2
1
2
R6B8
5% CH
402
C6B2
1 UF 10% 16 V X5R 603
12 11 10
15
13 14 17
5
IC
VOUT3 VOUT2 VOUT1
FLT_N
GND1 GND2 GND3 MPAD
QFN16
26
TPS2590
IN
U6B1
VIN4 VIN3 VIN2 VIN1
ILIM IFLT
RTRY_N
EN_N
X866681-001
USB_AUX_EN
CT
V_3P3STBY_BAJA
1
C4B10 C4B9
1 UF 10%
6.3 V
2
X5R 402
J3B1
WIFI_HDR
11
3P3V2
1
3P3V1
7
NETW_DP
8
NETW_DN
3
ACC_DP
4
ACC_DN
9
RESETN
SHLD_ALL
TH
I90
4 3 2 1
7 8 9 6
16
1
V_12P0
USB_AUX_OCP_ILIM
USB_AUX_OCP_IFLT
USB_AUX_OCP_CT
USB_AUX_OCP_RTRY_N USB_AUX_OCP_EN_N
V_SOC1P8
1
10 KOHM 5%
2
CH 402
USB_AUX_EN_D
3
Q6B2 FET AO3414L SOT23
2
22 UF 20%
6.3 V X7R 805
GND SHLD2 SHLD1
1
2
0 OHM
6 10 2 5
0 OHM 5%
CH 402
R4B12
603
1
2
V_3P3STBY
21
5% CH
R6B9R6B2
0 OHM 5%
EMPTY 402
1
2
C4N1
.68 UF10 KOHM 10%
6.3 V X5R 402
R4N1
1
64.9 KOHM 1%
CH
2
603
R4N2 ON ILIM SETS LIMIT CURRENT: 3.1 A
R4N1 ON IFLT SETS FAULT CURRENT: 3.1 A
C4N1 ON CT SETS FAULT TIME: 22 MS
R4N2
1
64.9 KOHM 1%
CH
2
402
GREYBULL_RETAIL
36/72 36/72 M 1.0
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MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
25
25
25
25
OUT OUT
OUT OUT
TMDS_RX_DP2 TMDS_RX_DN2
TMDS_RX_DP1 TMDS_RX_DN1
CONN, HDMI IN
EG7B3 ESD ARRAY
1
D1A
10
D1B
2
D2A
9
D2B
4
D3A
7
D3B
5
D4A
6
D4B
SP3010
GNDA GNDB
3 8
26
HDMI_RX_DDC_5V_E
OUT
1
R8B20
0 OHM 5%
2
CH 402
1
R8B21
2 KOHM 1%
2
EMPTY 402
V_3P3STBY
1
R8B19
10 KOHM 1%
2
CH 402
2
D8B3
HDMI_RX_DDC_5V_D
3
U8B2
FET
SOT23
25
25
25
25
1
OUT OUT
OUT OUT
SOT-523
3
2
TMDS_RX_DP0 TMDS_RX_DN0
TMDS_RX_CLKP TMDS_RX_CLKN
EMPTY
1
HDMI_RX_DDC_5V_G
R8B9
10 KOHM
603
EG7B4
ESD ARRAY
SP3010
HDMI_RX_DDC_5V
21
1%
CH
R8A2
1
100 KOHM 1%
CH
2
402
1
D1A
10
D1B
1
2
9
2
D2A
D2B
C8B1
0.1 UF 10%
6.3 V EMPTY 402
4
D3A
7
D3B
6
5
D4A
D4B
GNDA
GNDB
8
3
EG7A7 X882235-001
DIO 402
2 1
DFN10
X863136-001
CONNECT As TO Bs
R3M2
1
47 KOHM 1%
CH
2
402
R3M1
1
47 KOHM 1%
CH
2
402
CONNECT As TO Bs
X863136-001 DFN10
J7A1
1
TMDS_DATA2_DP
2
TMDS_DATA2_SHD
3
TMDS_DATA2_DN
4
TMDS_DATA1_DP
5
TMDS_DATA1_SHD
6
TMDS_DATA1_DN
7
TMDS_DATA0_DP
8
TMDS_DATA0_SHD
9
TMDS_DATA0_DN
10
TMDS_CLK_DP
11
TMDS_CLK_SHD
12
38 25
BI
HDMI_RX_CEC
TMDS_CLK_DN
13
CEC
14
RESERVED
15
SCL
16
SDA
17
DDC_CEC_GND
18
5VCC
19
HOT_PLUG_DET
HDMI
CONN
MT1 MT2 MT3 MT4
20 21 22 23
SMX864613-003
EG7A9 X882235-001
DIO 402
2 1
HDMI_HPD_PIN
EG8A7 X882235-001
EMPTY 402
2 1
R8A3
1 KOHM 5%
CH
402
HDMI_RX_HPD
21
IN
25
26
BI
26
BI
HDMI_RX_DDC_CLK HDMI_RX_DDC_DATA
EG7A3 X882235-001
DIO 402
2 1
EG7A4 X882235-001
DIO 402
2 1
GREYBULL_RETAIL
37/72 37/72 M 1.0
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PROJECT NAME FABCSAPAGE
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2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
2
IN
27
IN
2
IN
2
BI
AUX VS DDX STUFFING
AUX DDC
TMDS_TX_DP2 TMDS_TX_DN2
TMDS_TX_DP1
TMDS_TX_DN1
TMDS_TX_DP0 TMDS_TX_DN0
TMDS_TX_CLKP TMDS_TX_CLKN
FT2N1
TO SB GPIO
HDMI_DP_OUT_SEL
PLACEHOLDER, ACTUAL FET REQURIEMENTS NEED TO BE ASSESSED.
HDMI_OUT_DDC_CLK
HDMI_OUT_DDC_DATA
0.1 UF
0.1 UF
6.3 V X5R 402
C8B7
0.1 UF
6.3 V X5R 402
C8B9
V_5P0DUAL
R2N3
FTP
47.5 KOHM
1
1%
EMPTY
402
1
2
R9B8/R9B9MODE
0.1 UF CAP 0 OHM RES EMPTY
R9A5/R9A6 STUFF
C8B2
402 X5R
6.3 V
21
10%
6.3 V X5R 402
C8B4
402
C8B3
X5R
6.3 V
0.1 UF 10%
21
10%0.1 UF
6.3 V X5R 402
C8B5
C8B6
402 X5R
6.3 V 10%0.1 UF
21
21
10%
C8B8
402 X5R
6.3 V 10%0.1 UF
21
21
10%
1
2
1
R2N2
47.5 KOHM 1%
CH 402
10%0.1 UF
21
21
1
2
499 OHM
R9A3/R9A4 EMPTY STUFF
R8B1
1% CH
402
499 OHM
3
U2N1
FET SOT23
2
X801032-001
1
2
499 OHM
1
R8B2
1% CH
2
402
TMDS_COMMON_FET
R8B3
1% CH
402
1
R8B4
1% CH
2
402
499 OHM
1
R8B5
1% CH
2
402
499 OHM
26
FT2N2
1
R8B6
1%
2
CH 402
499 OHM
IN
FTP
1
R8B7
1% CH
2
499 OHM
402
C8B19
0.1 UF 10% 25 V EMPTY 402
V_5P0DUAL
1
TMDS_TX_DP2_C TMDS_TX_DN2_C
TMDS_TX_DP1_C TMDS_TX_DN1_C
EG8B2
TMDS_TX_DP0_C TMDS_TX_DN0_C
TMDS_TX_CLKP_C TMDS_TX_CLKN_C
38
1
R8B8
1%
2
CH 402
499 OHM
26
IN
26
BI
1
C2N1
1 UF 10%
6.3 V
2
X5R 402
HDMI_V_5P0_EN
R2N4
1
10 KOHM 5%
CH
2
402
8
3
GNDA
GNDB
SP3010
D1A
D1B
D2A
D2B
D3B
D4A
9
2
1
C1N1
0.1 UF 10% 25 V
2
X5R 402
R1N3
2 KOHM 1%
CH 402
EMPTY01.10 A 1206
IC
OUT
FLT*
GND
21
D3A
4
7
5
402
15 3
V_5P0_HDMI_FLT_N
2
ESD ARRAY
1
10
V_5P0_HDMI_OUT HDMI_OUT_DDC_BUFF_EN
R1N4
1
2 KOHM 1%
CH
2
402
1
2
HDMI_TX_DDC_CLK
HDMI_TX_DDC_DATA
RT8A1
U8B1
TPS2051C
IN
4
EN
X867973-001 SOT23-5
CONNECT As TO Bs
D4B
6
R1N2
5%10 KOHM
EMPTY
21
DFN10
X863136-001
37 25
IC
PCA9507
8 1
VCCB VCCA
7 2
SCLB SCLA
6 3
SDAB SDAA
4 5
GND EN
X871021-001
R9B4
21
5%
0 OHM
CH
402
R9B5
402
21
CH
0 OHM 5%
BI
HDMI_RX_CEC
U1N1
MSOP8
0.1 UF
V_5P0_HDMI_OUT
1
DB8B1
38
C9B13
6.3 V EMPTY
402
C9B15
6.3 V EMPTY
402
V_5P0_HDMI_OUT
ININ
1
R1M4
2 KOHM 1%
CH
2
402
HDMI_OUT_DDC_BUFF_CLK
HDMI_OUT_DDC_BUFF_DATA
21
HDMI_OUT_DDC_CLK_R
V_3P3
10%
R9A6
1
100 KOHM 5%
EMPTY
2
402
21
HDMI_OUT_DDC_DATA_R
10%0.1 UF
0 OHMCH5%
402
R8A1
1
R1M3
2 KOHM 1%
CH
2
402
21
1
2
22 OHM
402
22 OHM
402
R9A5
1
100 KOHM 5%
EMPTY
2
402
HDMI_TX_CEC
C9B3
0.1 UF 10% 25 V X5R 402
R9A7
21
5% CH
R9A8
21
5% CH
1
4.7 UF 10% 16 V
2
X5R 805
CONN, HDMI OUT
EG8B1 ESD ARRAY
SP3010
1
D1A
10
D1B
2
D2A
9
D2B
4
D3A
7
D3B
5
D4A
6
D4B
CONNECT As TO Bs
X863136-001 DFN10
GNDA GNDB
ESD DIODE ARRAYS ARE INCLUDED FOR EVALUATION. TO BE CLEANED UP LATER.
3 8
J8A1
HDMI_TX_HPD_PIN
EG9B1 X882235-001
DIO 402
2 1
1
C8A3C8A2
0.1 UF 10%
6.3 V
2
X5R 402
EG9A2 X882235-001
DIO 402
2 1
EG9A1 X882235-001
DIO 402
2 1
R9B16
402
38
1% CH
10 KOHM
OUT
EG8A8 X882235-001
DIO 402
2 1
V_3P3STBY
1
2
1
C9B1
0.1 UF 10%
6.3 V EMPTY 402
21
HDMI_TX_HPD_G
R1N1
1
100 KOHM 1%
CH
2
402
GREYBULL_RETAIL
1
TMDS_DATA2_DP
2
TMDS_DATA2_SHD
3
TMDS_DATA2_DN
4
TMDS_DATA1_DP
5
TMDS_DATA1_SHD
6
TMDS_DATA1_DN
7
TMDS_DATA0_DP
8
TMDS_DATA0_SHD
9
TMDS_DATA0_DN
10
TMDS_CLK_DP
11
TMDS_CLK_SHD
12
TMDS_CLK_DN
13
CEC
14
RESERVED
15
SCL
16
SDA
17
DDC_CEC_GND
18
5VCC
19
HOT_PLUG_DET
1
R9B1
10 KOHM 1%
CH
2
402
HDMI_TX_HPD_D
3
U9B1 FET
SOT23
2
38/72 38/72 M 1.0
2
1
HDMI
3
CONN
MT1 MT2 MT3 MT4
SMX864613-003
DP0_HPD
U9B2 FET
SOT23 X857156-001
OUT
20 21 22 23
2 26
Page 39
25
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C
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B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
SATA1_HDD_TP
IN
C5C6
0.01 UF 16 V
X7R 402
21
10%
SATA1_HDD_TP_C
CONN, ODD + HDD
V_3P3STBY
25
25
25
25
25
SATA1_HDD_TN
IN
SATA1_HDD_RN
OUT
SATA1_HDD_RP
OUT
IN
IN
25
OUT
25
OUT
0.01 UF
0.01 UF
ODD SATA
SATA0_ODD_TP
SATA0_ODD_TN
V_3P3STBY
C5C7
21
10%
16 V
X7R 402
C5C8
21
10%0.01 UF
16 V
X7R 402
C5C9
21
10%
16 V
X7R 402
C4C17
0.01 UF10% 16 V
X7R 402
C4C18
0.01 UF 16 V
X7R 402
10%
C4C19
0.01 UF 16 V
X7R 402
10%
C4C20
0.01 UF 16 V
X7R 402
10%
21
SATA0_ODD_TP_C
21
SATA0_ODD_TN_C
21
SATA0_ODD_RN_CSATA0_ODD_RN
21
SATA0_ODD_RP_CSATA0_ODD_RP
SATA1_HDD_TN_C
SATA1_HDD_RN_C
SATA1_HDD_RP_C
J4C1
1X7SATA
9 1
2 3 4 5 6 7
8
TH
HDD SATA
J5C1
1X7SATA
9 1
2 3 4 5 6 7
8
TH
V_12P0
1
2
26
IN
C4C3
1 UF 10% 16 V X7R 603
ODD_PWR_EN
1
2
R6P3
10 KOHM 5%
EMPTY 402
FT5P1
39
IN
U4C2
1 9
X866665-001 DFN8
26
IN
FTP
V_5P0_HDD
2
C5C13
4.7 UF 10%
6.3 V X5R
1 2
603
1
C5P4
1 UF 10%
6.3 V X5R 402
IC
NCP45521
3
VCC
7
SR
V_12P0_ODD 8 5
6
ODD_PWR_SR
42
1
2
R5C5
1 KOHM
402
CH
VIN1 VIN2
EN
VOUT1 VOUT2 BLEED
GND
HDD_PWR_EN HDD_PWR_EN_R
11
R5C2
10 KOHM 5%
2
CH 402
J4B2
1X5HDR2
1 2 3 4
TH
V_5P0
1
2
1
C4C7
0.015 UF 10% 50 V
2
X7R 603
HDD_PWR_DVDT
C5C25
270 PF 10% 50 V X7R 402
21
1%
C4C4
1 UF 10%
6.3 V X5R 402
26
IN
1
10 UF 10% 16 V
2
X5R 805
U5C4
MP5010B
9
DV/DT EN/FLT
X878106-001 DFN11
ODD_3P3V_STBY_EN
10 UF 10% 16 V X5R 805
1
2
1
2
IC
VCC
SOURCE1 SOURCE2 SOURCE3 SOURCE4 SOURCE5
ILIMIT
NC
GND
2
R5C7
10 KOHM 5%
CH
1
402
10 UF 10% 16 V EMPTY 805
11 1
2 3 4 5
7 6 108
1
2
V_5P0_HDD
HDD_PWR_ILIMIT
C4C10C6P5C6P4C4C9
10 UF 10% 16 V EMPTY 805
1
OUT
1
2
1
R5C8
0 OHM 5%
2
CH 402
ODD_3P3V_STBY_S
2
3
39
V_5P0
C5C1
220 UF 20% 10 V ELEC RDL
1
R5C6
22 OHM 5%
2
CH 402
V_5P0
U5C2 FET
SOT23 X857156-001
ODD_3P3V_STBY_PULSE
OUT
1
C5C12
10 UF 20%
6.3 V
2
X5R 805
39
OUT
39
1
R5C14
100 KOHM 5%
2
CH 402
26
OUT
26
IN
ODD_OPEN
ODD_WAKE_N
1
C5C17
75 PF 5% 50 V
2
NPO 402
J5C3
2X6HDR2
1
9
TH
ODD_STATUS_R
43 65 87 10 1211
R5C13
21
1%100 OHM CH
402
ODD_3P3V_STBY_PULSE V_5P0_ODD V_12P0_ODD
1
10% 16 V
2
X5R 805
1
2
ODD_STATUS
C4C11
1 UF 10% 16 V X5R 603
1
C5C14C5C3
4.7 UF4.7 UF 10%
6.3 V X5R 603
R5C12
1
100 KOHM 5%
CH
2
402
12
C5P3
1 UF 10%
6.3 V
2
X5R 402
1
2
C5C24
1 UF 10%
6.3 V X5R 402
OUT
IN IN IN
39 39 39
26
FT5P2
26
IN
FTP
ODD_PWR_EN
121
R5C3
10 KOHM 5%
CH 402
R5C1
1 KOHM
402
ODD_PWR_DVDT
1
C5C16
270 PF 10% 50 V
2
X7R 402
ODD_PWR_EN_R
21
1%
CH
U5C1
MP5010B
9
DV/DT EN/FLT
X878106-001 DFN11
VCC
SOURCE1 SOURCE2 SOURCE3 SOURCE4 SOURCE5
ILIMIT
GND
IC
NC
11 1
2 3 4 5
7 6 108
1
C5C2
1 UF 10%
6.3 V
2
X5R 402
V_5P0_ODD
R5C4
1
22 OHM 5%
CH
2
ODD_PWR_ILIMIT
GREYBULL_RETAIL
402
39
OUT
1
C5C11
10 UF 20%
6.3 V
2
X5R 805
39/72 39/72 M 1.0
Page 40
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_3P3STBY
V_5P0DUAL
1
2
1
2
C5F15
470 PF 5% 50 V NPO 402
C5F12
470 PF 5% 50 V NPO 402
C5F10
100 UF 20% 16 V ELEC RDL
C5F11
100 UF 20% 16 V ELEC RDL
26 44 65
26 44 50 52 53 54 64 65 66
26
26
26
67 26
67 26
IN
BI
OUT OUT
IN
OUT
OUT
SMBUS_CLK SMBUS_DATA
BINDSW_N IR_DATA LED_NEXUS_R
PWRSW_N
EJECTSW_N
1
100 KOHM 5%
CH
2
402
R5F24
402
1%10 KOHM CH
21
1
100 KOHM 5%
2
CH 402
R5F26
402
1
R5F25 R5F21R5F23
100 KOHM 5%
2
CH 402 402
402
21
1%10 KOHM CH
R5F19
5%0 OHM CH
21
1
100 KOHM 5%
2
CH
R5F20R5F22
1
249 KOHM 1%
CH
2
402
BINDSW_N_R
PWRSW_N_R
EJECTSW_N_R
J5F1
LITHIUM CONN
12
V_3P3STBY
5
I2C_CLK
6
I2C_DATA
4
V5P0_DUAL
13
BINDSW_N
7
IR_DATA
1
LED_NEXUS
8
PWRSW_N
10
EJECTSW_N
2
LED_HALO
3
LED_ZONE
CONN
26
IN
FAN_PWM
26
OUT
1
2
33 OHMS 1%
INT_N
V_12P0 V_3P3
C7B14
1 UF 10% 16 V X5R 603
R5R11
21 4
CH
402
C7C1
100 UF 20% 16 V ELEC RDL
FAN_PWM_R
J7C1
1X4HDR
1 2 3
TH
R7B2
1
4.7 KOHM 5%
CH
2
402
FAN_TACH_IN_R
0 OHM
402
1
2
R7B3
R5F32
100 KOHM 5%
CH 402
FAN_TACH_IN
21
5% CH
1
2
C7B13
4700 PF 10% 16 V EMPTY 603
9
GND1
14
GND2
11
INT_N
18
MTH1
19
MTH2
X866836-003
27
OUT
SPARE3 SPARE2 SPARE1
TH
17 16 15
GREYBULL_RETAIL
40/72 40/72 M 1.0
Page 41
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
1
2
26
C9B11
470 UF 20% 16 V POLY TH
IN
V_5P0STBY
V_12P0
1
C9B6
470 UF 20% 16 V POLY
2
TH
1
0.1 UF 10% 25 V X7R
2
603
PSU_V12P0_EN PSU_V12P0_EN_R
1
C1N3C1N4
0.1 UF 10% 25 V X7R
2
603
1
2
R9B2
10 KOHM 5%
CH 402
1
0.1 UF 25 V
X7R
2
603
100 OHM
402
R9A2
1% CH
21
1
2
C1N2C1N5
0.1 UF 10%10% 25 V X7R 603
DB9A1
1
0.1 UF 10%
6.3 V
2
X5R 402
1
1
2
C9A1C9A2
470 PF 5% 50 V EMPTY 402
J9A1
12P_PWR_RCPT
1
GND
2
GND
3
GND
4
GND
5
+12V MAIN
6
+12V MAIN
7
+12V MAIN
8
+12V MAIN
9
POWER ENABLE
10
+5V STANDBY
11
MH1
12
MH2
X863226-003 TH
CONN
1
C9B5
220 UF 20% 10 V ELEC
2
RDL
1
C9B2
470 PF 5% 50 V
2
X7R 402
Tue Jun 18 16:42:28 2013
DRAWING
GREYBULL_RETAIL
41/72 41/72 M 1.0
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A
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
26
29
IN
IN
DB8C2
PSU_V12P0_EN
V12P0_PWRGD
DB8C1
V_12P0V_5P0STBY
V_5P0DUAL
DB4B1
R4B5R4B2
20 OHM 5%
CH 1206
1
R2N7R2N9
1
5% CH
2
402
BLEEDER_V12P0_C1
1
R8C2
2.2 KOHM 402
R8C1
2.2 KOHMCH5% 402
1
5% CH
21
BLEEDER_V12P0_B1
3
U2N4
121
XSTR
2
1
2
BLEEDER_V12P0_C2
1
2.2 KOHM2.2 KOHM 5%
CH 402
3
U2N3 FET
SOT23
2
R2N8
549 OHM 1%
402
CH
21
BLEEDER_V12P0_LOAD
R2N11
1
10 OHMS 1%
CH
2
1206
BLEEDER_V12P0_B2
1
10 OHMS 1%
CH
2
1206
R2N13R2N12
1
10 OHMS 1%
CH
2
1206
V_12P0
1
3
U8B3
XSTR 42
R2N10
1
10 OHMS 1%
CH
2
1206
1
2
R4B4R4B3R4B6
20 OHM 5%
CH 1206
1
1
20 OHM 5%
2
CH 1206
BLEEDER_C2
3
U4B1
XSTR
2
1
10 KOHM 5%
2
CH 402
BLEEDER_C1
R4B1
BLEEDER_BSMC_RST_N
402
21
CH
29 65
IN
10 KOHM 5%
3
U4B2
1
XSTR
2
1
2
20 OHM 5%
CH 1206
1
2
V_5P0DUAL BLEEDER
V_12P0 BLEEDER
[PAGE_TITLE=VREGS, INPUT + OUTPUT FILTERS]
Tue Jun 18 16:42:20 2013
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GREYBULL_RETAIL
42/72 42/72 M 1.0
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VREGS, INPUT + OUTPUT FILTERS
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
IO/NBCORE/MEMCORE INPUT FILTER
V_12P0
L9B2
21
V_VREG_12P0_MEM_NBCORE
0.68 UH
15.5 A SM
0.005 OHM
V_GFXCORE
IND
1
C9B7
470 UF 20% 16 V POLY
2
TH
1
2
C9B14
10 UF 10% 16 V X5R 805
V_GFXCORE OUTPUT FILTER
1
FTP
OUT
FT2R1
50 51 52 53
V_12P0
1
C8B11
10 UF 10% 16 V
2
X5R 805
0.68 UH
15.5 A
0.005 OHM
L9B1
21
IND SM
1
470 UF 20% 16 V POLY
2
TH
V_CPUCORE
GFX/CPU INPUT FILTER
V_VREG_12P0_GFXCPU
1
C9B8C9B12
470 UF 20% 16 V POLY
2
TH
1
C9B4
470 UF 20% 16 V POLY
2
TH
1
2
C9B9
10 UF 10% 16 V X5R 805
1
2
C9B10
10 UF 10% 16 V X5R 805
V_CPUCORE OUTPUT FILTER
1
FTP
FT1T1
OUT
44 46 47 48
1
820 UF 20%
2.5 V POLY
2
RDL
1
C8D4C8E1
820 UF 20%
2.5 V POLY
2
RDL
1
820 UF 20%
2.5 V POLY
2
RDL
5P0/3P3 INPUT FILTER
V_12P0
L8B1
21
V_VREG_12P0_TO_5P0_3P3
0.68 UH
15.5 A
0.005 OHM
IND SM
1
2
C8B18
470 UF 20% 16 V POLY TH
1
2
C8B17
4.7 UF 10% 16 V X5R 1206
1
C8D1C8D2
820 UF 20%
2.5 V POLY
2
RDL
OUT
30 54 56
1
C8E5
820 UF 20%
2.5 V POLY
2
RDL
1
C8E8
820 UF 20%
2.5 V POLY
2
RDL
1
C8E10
820 UF 20%
2.5 V POLY
2
RDL
[PAGE_TITLE=VREGS, INPUT + OUTPUT FILTERS]
Tue Jun 18 16:42:25 2013
DRAWING
GREYBULL_RETAIL
43/72 43/72 M 1.0
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A
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D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_5P0
43
V_SOC1P8
1
C9C9
2.2 UF 10%
6.3 V
2
X5R 603
26
IN
FT1P7
26 65 40 50 52
OUT
53 54 64 66
64 65 66 26 40 50
BI
52 53 54
8
BI
8
IN
FT1P2
8
OUT
IN
SOC_PWR_OK
1
FTP
SMBUS_CLK
SMBUS_DATA
SVD
SVC
1
FTP
SVT
VREG_CPUCORE_DIFFOUT
R9C32
150 OHMS1%
402
VREG_CPUCORE_FB_C
CH
V_VREG_12P0_GFXCPU
IN
1
2
R9C1
21
0 OHM 5%
CH
402
R9C2
402
DB9C1
IN
C9C12
50 V
X7R 402
21
CH
1%18.2 OHM CH
21
21
21
CH
FT1P1
FT1P3
44
21
10%
43.2 KOHM
36.5 OHM1%
R2R2
18.2 OHM1% 402
R2R3
402
1
1500 PF
R9C23
1%1 KOHM CH
402
R1P8
1 KOHM
402
VREG_CPUCORE_EN
FT1P4
FTP
R1P10
10 KOHM 5%
CH 402
SMBUS_CLK_CPUCORE
SMBUS_DATA_CPUCORE
BI
IN
1
FTP
SVD_R
1
FTP
R9C21
402
21
CH
18.2 OHM1%
VREG_CPUCORE_FB
C9C11
21
VREG_CPUCORE_COMP_R
10%1500 PF
50 V
X7R 402
R9C29
VREG_CPUCORE_TRBST_R
21
402
1% CH
1
2
21
1% CH
1
R9C4
402
C9C13
470 PF 5% 50 V X7R 402
21 1%10 OHM
CH
5.9 KOHM
470 PF
R9C36
402
C9C15
5%
50 V
EMPTY
402
10 KOHM 1%
1
C9C8
1 UF 10% 16 V
2
X5R 603
1%
CH
21
VREG_VDD_TRBST_C
R9C38
21
CH
402
C9C16
68 PF 5% 50 V NPO 402
R9C35
0 OHM 5%
EMPTY
402
VREGS, CPUCORE
8
IN
1
1
2
R1P9
0 OHM 5%
EMPTY 402
48
VREG_CPUCORE_CSN
IN
R9C43
165 KOHM
402
48
IN
DB9C8DB9C7DB9C3
R9C54
10 OHMCH1%
402
R1P19
2.8 KOHM
R9C39
402
RT9E1
603
THRMSTR
X863133-001
1% CH
21
21
73.2 KOHM
1
VREG_CPUCORE_CSCOMP_R
1% CH
2
VREG_CPUCORE_CSSUM
2
21
1% CH
402
C1P7
1 UF 10% 16 V X5R 603
VREG_GFXCPU_RAMP
SVD_R_CPUCORE SVC_R
111
1
2
C9C20
2200 PF 10% 50 V X7R 402
1500 PF 10% 50 V X7R 402
TO INCREASE CURRENT LIMIT INCREASE ILIM RES ON PIN 20 RES OF 30KOHM EFFECTIVELY REMOVES CURRENT LIMIT
SVT_R VREG_CPUCORE_FB
VREG_CPUCORE_COMP VREG_CPUCORE_TRBST
VREG_CPUCORE_CSN_R
VREG_CPUCORE_DROOP
VREG_CPUCORE_ILIM
1
2
VREG_CPUCORE_CSCOMP
1
C1P9C9C18
1500 PF 10% 50 V
2
X7R 402
R9C40
28.7 KOHM 1%
CH 402
U9C2
IC
NCP4204
VDD
DIFF
VSS
CSP1
DRON IOUT
7
15 17 14
25
27
13 32 23
11 12
52
16 19 18
26 21 20
22 24
53
4
9 5
6 1
3 2
VCC VRMP VDDIO
PWROK EN SCL
SDA SVD
SVC SVT
FB COMP TRBST
CSN1
DROOP ILIM
CSCOMP CSSUM
AGND
VDD_PWRGD
PWM1/SR
OCP_L
QFN53X861898-002
FREQUENCY = 400KHZ, CHANGED OVER I2C SEE DATASHEET FOR REGISTER TABLE
NCP4204 I2C ADDRESS 0000 000 R/W HEX WRITE 0100 000 0 0X40 READ 0100 000 1 0X41
1
FTP
VREG_CPUCORE_PWM
VREG_OCP_L
VREG_GFXCPU_DRV_EN
VREG_CPUCORE_IOUT
28.7 KOHM
VREG_CPUGFX_PWRGD
FT1P5
VREG_CPUCORE_S VREG_CPUCORE_DIFFOUT VREG_GFXCPU_S_RTN
VREG_CPUCORE_CSP
8
IN
V_SOC1P8
1
R9C17
10 KOHM 5%
CH
2
402
1
DB1P2
R9C55
R9C45
1% CH
402
10 KOHM
SLEW RATE SET BY SR RES ON PIN 27
SLEW RATE RESISTANCE 10MV/US 10 KOHM
OUT OUT
402
20MV/US 25 KOHM 30MV/US 45 KOHM
21
SVC SVD BOOT VOLTAGE 0 0 1.1V 0 1 1.0V 1 0 0.9V 1 1 0.8V
SOC_CPUCORE_S
OUT
OUT
IN
DB2P1
SOC_GFXCPU_S_RTN
OUT
46 47 48
1
1% CH
2
45 26 69
R2R1
0 OHM
805 VENABLE
44
48
1
48
21
5%
EMPTY
2121
ST1T1ST2R1
SHORTSHORT
GREYBULL_RETAIL
44/72 44/72 M 1.0
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
IN
1
VREG_GFXCORE_EN
FTP
1
FT1P6
DB9C2
VREG_GFXCORE_DIFFOUT
R9C24
21
VREG_GFXCORE_FB_C
1%49.9 OHM CH
402
73.2 KOHM
RT9D1
THRMSTR
VREG_GFXCORE_CSCOMP_R
X863133-001
1
1% CH
2
402
VREG_GFXCORE_CSSUM
46 47
R9C44
165 KOHM
IN
2200 PF
R9C26
402
R1P18
402
603
1
2
1% CH
402
C1P15
0.01 UF 10% 16 V X7R 402
1
2
SOC_GFXCORE_S
44 26 69
OUT
45
OUT
46
IN
46
IN
47
IN
47
IN
45
OUT
46
IN
46
IN
47
IN
47
IN
OUT OUT OUT OUT
0 OHM
805
VENABLE
46 46 47 47
R2P5
5%
EMPTY
21
ST2R2
21
SHORT
VREGS, GFXCORE
8
IN
VREG_CPUGFX_PWRGD
U9C2
IC
1
DB1P3
NCP4204
10
EN_NB
1
R9C18
10 KOHM 5%
CH
2
402
45
IN
DB9C6
C1P3
21
10%
50 V
X7R 402
C9C14
21
21
1%1 KOHM CH
1000 PF 10%
R9C28
43.2 KOHM 402
21
1% CH
21
VREG_GFXCORE_CSCOMP
1
2200 PF 10% 50 V X7R 402
2
VREG_GFXCORE_COMP_R
50 V
X7R 402
VREG_GFXCORE_TRBST_R
21
1% CH
1
2
C9C19C1P10
1500 PF 10% 50 V X7R 402
C1P4
470 PF 5% 50 V X7R 402
R9C37
7.32 KOHM 402
C1P6
5%
470 PF
50 V
EMPTY
402
1% CH
21
21
C1P8
100 PF 5% 50 V NPO 402
VREG_GFXCORE_TRBST_C
R9C30
21
1%10 KOHM CH
402
45
IN
R9C33
200 OHM 1%
EMPTY
402
DB9C5
21
C9C17
2200 PF 10% 50 V X7R 402
DB9C4
1
1
VREG_GFXCORE_CSREF VREG_GFXCORE_DROOP
R9C41
1
2.1 KOHM 1%
2
CH 402
1
R1P17
44.2 KOHM
402
VREG_GFXCORE_FBVREG_GFXCORE_FB VREG_GFXCORE_COMP VREG_GFXCORE_TRBST
VREG_GFXCORE_ILIM
1% CH
TO INCREASE CURRENT LIMIT INCREASE ILIM RES ON PIN 20 RES OF 30KOHM EFFECTIVELY REMOVES CURRENT LIMIT
48
FBNB
47
COMPNB
49
TRBSTNB
41
CSREFNB
45
DROOPNB
46
ILMNB
44
CSCOMPNB
43
CSSUMNB
X861898-002 QFN53
VDDNB_PWRGD
VDDNB
DIFFNB
CSP1NB CSP2NB CSP3NB CSP4NB
CSN1NB
CSN2NB
CSN3NB
CSN4NB
PWM1NB/SRNB
PWM2NB/ICCMAX
PWM3NB/ICCMAXNB
PWM4NB
IOUTNB
8 51
50
33 37 35 40
34 38 36 39
31 29 30 28
VREG_GFXCORE_IOUT
42
R1P20
10 OHM
402
R1P21
10 OHM
402
VREG_GFXCORE_S VREG_GFXCORE_DIFFOUT
VREG_GFXCORE_CSP1
VREG_GFXCORE_CSP2 VREG_GFXCORE_CSP3 VREG_GFXCORE_CSP4
VREG_GFXCORE_CSREF
21
R1P24
1% CH
10 OHM
21
1% CH
VREG_GFXCORE_CSN1 VREG_GFXCORE_CSN2 VREG_GFXCORE_CSN3 VREG_GFXCORE_CSN4
VREG_GFXCORE_PWM1 VREG_GFXCORE_PWM2 VREG_GFXCORE_PWM3 VREG_GFXCORE_PWM4
R9C48
23.7 KOHM 1%
CH 402
10 KOHM
402
R1T3
21
1% CH
R1R12
130 KOHM
1
1% CH
2
402
R1P25
1%10 OHM CH
402
R1R9
30.1 KOHM
1
1% CH
2
402
PWM4NB RES ON PIN 28 SETS I2C ADDRESS SEE DATASHEET FOR ADDRESS TABLE
21
R1R6
10 KOHM
1
1% CH
2
402
SLEW RATE SET BY SRNB RES ON PIN 31
SLEW RATE RESISTANCE 10MV/US 10 KOHM
20MV/US 25 KOHM 30MV/US 45 KOHM
GREYBULL_RETAIL
45/72 45/72 M 1.0
Page 46
VREGS, GFXCORE OUTPUT PHASE 1 & 2
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
8 1234567
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
43
45
44
IN
IN IN
V_VREG_12P0_GFXCPU
VREG_GFXCORE_PWM1 VREG_GFXCPU_DRV_EN
R9D4
402
R1R5
49.9 OHM 402
V_5P0
1
R1R4
2.2 OHM 1%
EMPTY
2
402
1%2.2 OHM CH
21
1% CH
VREG_GFXCORE1_VCC
1
C9D4
1 UF 10% 16 V
2
X7R 805
VREG_GFXCORE_PH1_EN
21
U9D2
NCP5901B
4
VCC
2
PWM
3
EN
6 9
MPAD
X863210-001 DFN9
BST
DRVH
SW
DRVLGND
1 8 7 5
IC
R9D5
2.2 OHM 805
VREG_GFXCORE_DRVH1
VREG_GFXCORE_DRVL1
1% CH
5
Q9D1 NTTFS4928N
C9D5
25 V
X7R 603
21
4
21
VREG_GFXCORE_BST1_RVREG_GFXCORE_BST1
0.1 UF10%
X862002-001 DFN5 FET
321
1
2
10 UF 10% 16 V X5R 805
1
2
C9D3C9D2
10 UF 10% 16 V X5R 805
1
2
C1R1 10 UF 10% 16 V EMPTY 805
VREG_GFXCORE_SW1
1
R9D2
5
Q9D2 NTMFS4985NF
4
X866717-001 DFN5 FET
321
1 OHM 1%
2
CH 805
VREG_GFXCORE_SW1_R
1
C9D1
1000 PF 10% 50 V
2
X7R 603
230 NH
0.00029 OHM
21
ST9D2
SHORT
R9C59
5.9 KOHM 603
VREG_GFXCORE_SW1_S
R1P29
20 KOHM
402
1
C1R2 10 UF 10% 16 V
2
EMPTY 805
V_GFXCORE
L9D1
21
IND
61 A
SM
21
1% CH
VREG_GFXCORE_CSSUM
1%
CH
V_GFXCORE
NOM.VOLTAGE: 0.9-1.1V
ST9D1
SHORT
2 1
VREG_GFXCORE_CSN1
1
R1P26
1 KOHM 5%
2
EMPTY 402
VREG_GFXCORE_CSP1
1
2
C9C24
0.15 UF 10% 16 V X7R 603
OUT
OUT
OUT
45
45
46 47 45
V_5P0
1
R1R7
2.2 OHM 1%
EMPTY
2
402
R9D7
2.2 OHM
45
I69
I70
I71
ZZ400 I75
I72
I73
I74
ZZ401 I76
VREG_GFXCORE_PWM2
IN
Q9D1,Q9D3 X875313-001 FET_CPUGFX_TOS Q9D1,Q9D3 FET
X875319-001
X878211-001 X875317-001
49.9 OHM1% 402
FET
FETQ9D1,Q9D3
FETQ9D2,Q9D4
R1R8
21
1% CH
402
VREG_GFXCORE_PH2_EN
21
CH
TRA-N-CNL,SM,WDFN8,8.9 MOHM,30 V,24 A FET_CPUGFX_IRFQ9D1,Q9D3 TRA-N-CNL,SM,WDFN8,10 MOHM,30 V,27 AFET TRA-N-CNL,SM,WDFN8,9 MOHM,30 V,12 AX876425-001 FET_CPUGFX_STM TRA-N-CNL,SM,WDFN8,8.8 MOHM,30 V,24 AX875316-001 TRA-N-CNL,SM,SO-8FL,3.1 MOHM,30 V,50 AX875320-001 FET_CPUGFX_IRFFETQ9D2,Q9D4 TRA-N-CNL,SM,SO-8FL,3.5 MOHM,30 V,35 AFETX875312-001Q9D2,Q9D4 FET_CPUGFX_TOS TRA-N-CNL,SM,SO-8FL,4.5 MOHM,30 V,24 AFETQ9D2,Q9D4 FET_CPUGFX_STM TRA-N-CNL,SM,SO-8FL,3.6 MOHM,30 V,32 A FET_CPUGFX_AOS
VREG_GFXCORE2_VCC
1
C9D9
1 UF 10% 16 V
2
X7R 805
TRUE TRUE TRUE TRUE
FET_CPUGFX_AOS
TRUE TRUE TRUE TRUE
U9D3
NCP5901B
4
VCC
2
PWM
3
EN
6 9
MPAD
X863210-001 DFN9
BST
DRVH
SW
DRVLGND
VREG_GFXCORE_BST2
IC
1 8 7 5
VREG_GFXCORE_DRVH2
VREG_GFXCORE_DRVL2
R9D8
2.2 OHM1% 805
CH
21
VREG_GFXCORE_BST2_R
C9D10
21
0.1 UF10% 25 V
X7R 603
5
Q9D3 NTTFS4928N
4
X862002-001 DFN5 FET
321
1
2
C9D8
10 UF 10% 16 V X5R 805
1
2
C9D7
10 UF 10% 16 V X5R 805
1
2
C1R3 10 UF 10% 16 V EMPTY 805
VREG_GFXCORE_SW2
R9D6
5
Q9D4 NTMFS4985NF
4
X866717-001 DFN5 FET
321
1
1 OHM 1%
CH
2
805
VREG_GFXCORE_SW2_R
1
C9D6
1000 PF 10% 50 V
2
X7R 603
1
C1R4 10 UF 10% 16 V
2
EMPTY 805
230 NH
0.00029 OHM
ST9D4
SHORT
2 1
VREG_GFXCORE_SW2_S
L9D2
21
IND
SM61 A
R9C57
5.9 KOHM 603
R9C58
20 KOHM 1%
402
V_GFXCORE
ST9D3
SHORT
2 1
VREG_GFXCORE_CSN2
1
R1P28
1 KOHM 5%
EMPTY
2
402
21
1% CH
VREG_GFXCORE_CSP2
VREG_GFXCORE_CSSUM
CH
1
2
OUT
C9C26
0.15 UF 10% 16 V X7R 603
OUT
OUT
45
45
46 47 45
Tue Jun 18 16:42:25 2013
DRAWING
GREYBULL_RETAIL
46/72 46/72 M 1.0
Page 47
VREGS, GFXCORE OUTPUT PHASE 3 & 4
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
43
45
44
IN
IN IN
V_VREG_12P0_GFXCPU
VREG_GFXCORE_PWM3
VREG_GFXCPU_DRV_EN
R9D10
2.2 OHM 402
R1R11
49.9 OHM 402
V_5P0
1
R1R10
2.2 OHM 1%
EMPTY
2
402
VREG_GFXCORE3_VCC
1
C9D14
1 UF 10% 16 V
2
X7R 805
VREG_GFXCORE_PH3_EN
1% CH
1% CH
21
21
U9D4
NCP5901B
4
VCC
2
PWM
3
EN
6 9
MPAD
X863210-001 DFN9
BST
DRVH
SW
DRVLGND
5
Q9D5 NTTFS4928N
R9D11
21
IC
1 8 7 5
2.2 OHM 805
VREG_GFXCORE_DRVH3
VREG_GFXCORE_DRVL3
1% CH
VREG_GFXCORE_BST3_RVREG_GFXCORE_BST3
C9D15
0.1 UF 25 V
X7R 603
10%
4
21
5
4
X862002-001 DFN5 FET
321
Q9D6 NTMFS4985NF X866717-001 DFN5 FET
321
1
2
10 UF 10% 16 V X5R 805
1
C9D12C9D13
10 UF 10% 16 V
2
X5R 805
VREG_GFXCORE_SW3
R9D9
1
1 OHM 1%
2
CH 805
1
VREG_GFXCORE_SW3_RVREG_GFXCORE_SW4_R
C9D11
1000 PF 10% 50 V
2
X7R 603
1
2
C1R5 10 UF 10% 16 V EMPTY 805
1
C1R6 10 UF 10% 16 V
2
EMPTY 805
230 NH
0.00029 OHM
21
ST9D6
SHORT
VREG_GFXCORE_SW3_S
5.9 KOHM 603
R1P30
20 KOHM
402
V_GFXCORE
L9D3
R9C60
21
1% CH
1%
CH
V_GFXCORE
NOM.VOLTAGE: 0.9-1.1V
21
IND SM61 A
ST9D5
SHORT
2 1
VREG_GFXCORE_CSN3
1
R1P27
1 KOHM 5%
EMPTY
2
402
VREG_GFXCORE_CSP3
VREG_GFXCORE_CSSUM
1
2
C9C25
0.15 UF 10% 16 V X7R 603
OUT
OUT
OUT
45
45
46 47 45
45
IN
49.9 OHM1% 402
I73
Q9D5,Q9E1 TRA-N-CNL,SM,WDFN8,10 MOHM,30 V,27 A FET_CPUGFX_TOSX875313-001 FET
I74
Q9D5,Q9E1 X876425-001 FET_CPUGFX_STMFET
I72
Q9D5,Q9E1
ZZ402 I76
I71
I70
I69
Q9D6,Q9E2
ZZ403 I75
X875320-001 X875312-001 X878211-001 X875317-001
V_5P0
1
R9E2
2.2 OHM 1%
EMPTY
2
402
R1T1
2.2 OHM
R1T2
FETX875316-001 TRA-N-CNL,SM,WDFN8,8.8 MOHM,30 V,24 A FET_CPUGFX_AOS FET FET_CPUGFX_IRF FET FET FET_CPUGFX_STM FET FET_CPUGFX_AOSTRA-N-CNL,SM,SO-8FL,3.6 MOHM,30 V,32 A
21
1% CH
402
VREG_GFXCORE_PH4_EN
21
CH
VREG_GFXCORE4_VCC
1
C9E4
1 UF 10% 16 V
2
X7R 805
TRA-N-CNL,SM,WDFN8,8.9 MOHM,30 V,24 AQ9D5,Q9E1 FET_CPUGFX_IRFX875319-001 FET
TRA-N-CNL,SM,WDFN8,9 MOHM,30 V,12 A
TRA-N-CNL,SM,SO-8FL,3.1 MOHM,30 V,50 AQ9D6,Q9E2 TRA-N-CNL,SM,SO-8FL,3.5 MOHM,30 V,35 A FET_CPUGFX_TOSQ9D6,Q9E2 TRA-N-CNL,SM,SO-8FL,4.5 MOHM,30 V,24 AQ9D6,Q9E2
U9E1
NCP5901B
4
VCC
2
PWM
3
EN
6 9
MPAD
X863210-001 DFN9
TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE
BST
DRVH
SW
DRVLGND
5
Q9E1 NTTFS4928N
R9E3
21
IC
1 8 7 5
2.2 OHM 805
VREG_GFXCORE_DRVH4VREG_GFXCORE_PWM4
VREG_GFXCORE_DRVL4
CH
VREG_GFXCORE_BST4_RVREG_GFXCORE_BST4
1%
C9E5
0.1 UF 25 V
X7R 603
21
10%
4
4
X862002-001 DFN5 FET
321
5
Q9E2 NTMFS4985NF X866717-001 DFN5 FET
321
1
2
C9E2
10 UF 10% 16 V X5R 805
1
2
C9E3
10 UF 10% 16 V X5R 805
VREG_GFXCORE_SW4
1
R9E1
1 OHM 1%
CH
2
805
1
C9E1
1000 PF 10% 50 V
2
X7R 603
1
C1T1 10 UF 10% 16 V
2
EMPTY 805
ST9E2
SHORT
2 1
VREG_GFXCORE_SW4_S
DRAWING
Tue Jun 18 16:42:25 2013
1
C1T2 10 UF 10% 16 V
2
EMPTY 805
L9E1
230 NH
61 A
0.00029 OHM
V_GFXCORE
21
IND SM
ST9E1
SHORT
2 1
VREG_GFXCORE_CSN4
1
R9C51
1 KOHM 5%
EMPTY
2
R9C52
5.9 KOHM 603
20 KOHM
402
GREYBULL_RETAIL
402
21
VREG_GFXCORE_CSP4
1% CH
R9C56
VREG_GFXCORE_CSSUM
1%
CH
45
OUT
1
C9C21
0.15 UF 10% 16 V
2
X7R 603
45
OUT
OUT
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
43
44
44
IN
IN IN
V_VREG_12P0_GFXCPU
VREG_CPUCORE_PWM
VREG_GFXCPU_DRV_EN
2.2 OHM 402
R1T5
21
1%49.9 OHM CH
402
I39
I38
I37
Q9E3
ZZ410 I43
Q9E4 X875320-001
I36
I41
Q9E4
I40
ZZ411 I42
X875319-001Q9E3 X875313-001Q9E3 X876425-001Q9E3
X875312-001Q9E4 X878211-001 X875317-001Q9E4
V_5P0
R1T4
1
2.2 OHM 1%
EMPTY
2
402
R9E5
1% CH
21
1
2
VREG_CPUCORE_VCC
C9E9
1 UF 10% 16 V X7R 805
VREG_CPUCORE_PH_EN
FET FET
FET TRA-N-CNL,SM,SO-8FL,3.5 MOHM,30 V,35 A FET_CPUGFX_TOS FET FET_CPUGFX_STM
VREG_CPUCORE_BST
BST
DRVH DRVLGND
SW
1 8 7 5
IC
U9E2
NCP5901B
4
VCC
2
PWM
3
EN
6 9
MPAD
X863210-001 DFN9
TRA-N-CNL,SM,WDFN8,8.9 MOHM,30 V,24 A FET_CPUGFX_IRFFET TRA-N-CNL,SM,WDFN8,10 MOHM,30 V,27 A FET_CPUGFX_TOSFET TRA-N-CNL,SM,WDFN8,9 MOHM,30 V,12 A FET_CPUGFX_STM TRA-N-CNL,SM,WDFN8,8.8 MOHM,30 V,24 AX875316-001 FET
TRA-N-CNL,SM,SO-8FL,4.5 MOHM,30 V,24 A
TRA-N-CNL,SM,SO-8FL,3.6 MOHM,30 V,32 A FET_CPUGFX_AOSFET
TRUE TRUE TRUE TRUE
FET_CPUGFX_AOS
TRUE FET_CPUGFX_IRFTRA-N-CNL,SM,SO-8FL,3.1 MOHM,30 V,50 A
TRUE TRUE TRUE
R9E6
VREG_CPUCORE_BST_R
21
805
1% CH
2.2 OHM
VREG_CPUCORE_DRVH
VREG_CPUCORE_DRVL
C9E10
0.1 UF 25 V
X7R 603
21
10%
5
Q9E3 NTTFS4928N
4
X862002-001 DFN5 FET
321
1
2
C9E8
10 UF 10% 16 V X5R 805
1
2
C9E7
10 UF 10% 16 V X5R 805
1
2
C1T3 10 UF 10% 16 V EMPTY 805
VREG_CPUCORE_SW
5
1
R9E4
Q9E4 NTMFS4985NF
4
X866717-001 DFN5 FET
321
1 OHM 1%
2
CH 805
1
VREG_CPUCORE_SW_R
C9E6
1000 PF 10% 50 V
2
X7R 603
21
ST9E4
VREG_CPUCORE_SW_S
1
C1T4 10 UF 10% 16 V
2
EMPTY 805
L9E2
300 NH
42 A
0.00047 OHM
SHORT
R9C50
402
R9C49
19.6 KOHM 402
V_CPUCORE
NOM.VOLTAGE: 0.8-1.2V
V_CPUCORE
21
IND SM
ST9E3
SHORT
2 1
VREG_CPUCORE_CSN
1
R9C53
1 KOHM 5%
EMPTY
2
402
1%7.15 KOHM CH
1% CH
21
21
VREG_CPUCORE_CSP
VREG_CPUCORE_CSSUM
1
2
C9C23
0.15 UF 10% 16 V X7R 603
OUT
OUT
OUT
44
44
44
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V_5P0
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
VREGS, VTT TERMINATION
POWERED BY V3P3 DUE TO PHYSICAL LAYOUT CONSTRAINTS
V_3P3
EXHIBITS CORRECT FUNCTIONALITY
R8C9
1
10 KOHM 5%
2
CH 402
VREG_VTTA_EN
V_MEMIOCD
R8C13
1
1 KOHM 1%
EMPTY
2
402
R8C14
1
1 KOHM 1%
EMPTY
2
402
1
C8C7
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOCD
R8C15
1
0 OHM 5%
CH
2
402
U8C2
TPS51206
1
VDDQSNS
7
S3
9
S5
X864012-001 SON11
VREG_VTTA_SNS
1
C8C6
10 UF 20%
6.3 V
2
X5R 805
IC
VDD
VTTVLDOIN VTTSNS VTTREF
PGND
GND
MPAD
10 32
VREG_VTTA_VO
5
VREG_VTTA_REFOUT
6 4
8 11
1
2
C8C5
1 UF 10%
6.3 V X5R 402
V_VTTD
1
FT1P8
FTP
1
R9C3 R4R5
0 OHMCH5% 0 OHM
402
1
C9C5 C4R13
1 UF 10%
6.3 V
2
X5R 402
ST9C1
21 21
21
1
C9C3
10 UF 20%
6.3 V
2
X5R 805
1
2
FT1P9
C9C1
10 UF 20%
6.3 V X5R 805
1
C9C7
22 UF 20%
6.3 V
2
X7R 805
1
DB9C10
C9C10
10%
1 UF
6.3 V X5R 402
C9C4
10%1 UF
6.3 V X5R 402
C9C6
10%1 UF
6.3 V X5R 402
C9C2
1 UF 10%
6.3 V X5R 402
21
21
V_MEMIOCD
21
21
R4R4
1
10 KOHM 5%
CH
2
402
VREG_VTTB_EN
R4R2
1
1 KOHM 1%
EMPTY
2
402
R4R3
1
1 KOHM 1%
EMPTY
2
402
1
C4R9
1 UF 10%
6.3 V
2
X5R 402
V_MEMIOCD
R4R1
1
0 OHM 5%
2
CH 402
1
C4R6
10 UF 20%
6.3 V
2
X5R 805
U4R1
TPS51206
1
VDDQSNS
7
S3
9
S5
X864012-001 SON11
VREG_VTTB_SNS
IC
VDD
VTTVLDOIN VTTSNS VTTREF
PGND
GND
MPAD
10 32 5
VREG_VTTB_VO
VREG_VTTB_REFOUT
6 4
8 11
1
2
C4R12
1 UF 10%
6.3 V X5R 402
1
2
402
1 UF 10%
6.3 V X5R 402
5% CH
ST4R1
SHORTSHORT
V_VTTC
1
FT4R3
FTP
1
21
C4R20
10 UF 20%
6.3 V X5R 805
1
2
FT4R2
DB6D4DB9C9
C4R31
10 UF 20%
6.3 V X5R 805
FTPFTP
1
C4R26
10 UF 20%
6.3 V
2
X5R 805
1 11
1
2
DB6D5
C4R22
1 UF 10%
6.3 V X5R 402
C4R15
1 UF 10%
6.3 V X5R 402
C4R28
10%1 UF
6.3 V X5R 402
C4R32
1 UF 10%
6.3 V X5R 402
21
21
21
21
V_5P0
R9F17
1
10 KOHM 5%
CH
2
402
VREG_VTTC_EN
V_MEMIOAB
1
2
1
2
V_MEMIOAB
R9F15
1 KOHM 1%
EMPTY 402
R9F16
1 KOHM 1%
EMPTY 402
1
2
C9F11
1 UF 10%
6.3 V X5R 402
R9F14
1
0 OHM 5%
CH
2
402
VREG_VTTC_SNS
1
C9F10
10 UF 20%
6.3 V
2
X5R 805
U9F4
TPS51206
1
VDDQSNS
7
S3
9
S5
X864012-001 SON11
NOTE: VOSNS SHOULD BE CONNECTED AS A
SEPARATE TRACE FROM VO PATH
IC
VDD
VTTVLDOIN VTTSNS VTTREF
PGND
GND
MPAD
10 32
VREG_VTTC_VO
5
VREG_VTTC_REFOUT
6 4
8 11
1
C9F12
1 UF 10%
6.3 V
2
X5R 402
1
2
R9F18
0 OHM 5%
402
C9F13
1 UF 10%
6.3 V X5R 402
CH
V_5P0
V_VTTB
R6E29
1
1
FT1U6
FTP
1 1
ST9F1
21
SHORT
21
FTP
1
C9F16C9F19
10 UF 20%
6.3 V
2
X5R 805
1 1
1
2
C9F20
10 UF 20%
6.3 V X5R 805
1
2
FT7P11
DB9F6
10 UF 20%
6.3 V X5R 805
DB9F5 FT4T3
C9F14
21
1 UF 10%
6.3 V X5R 402
C9F17
21
10%1 UF
6.3 V X5R 402
C8F7
21
1 UF 10%
6.3 V X5R 402
C9F18
21
10%1 UF
6.3 V X5R 402
10 KOHM 5%
2
CH 402
V_MEMIOAB
R6E32
1
1 KOHM 1%
EMPTY
2
402
R6E30
1
1 KOHM 1%
EMPTY
2
402
1
C6E16
1 UF 10%
6.3 V
2
X5R 402
VREG_VTTD_EN
V_MEMIOAB
1
2
R6E31
0 OHM 5%
CH 402
1
7 9
VREG_VTTD_SNS
1
C6E17
10 UF 20%
6.3 V
2
X5R 805
U6E4
TPS51206
VDDQSNS
S3 S5
X864012-001 SON11
VTTSNS VTTREF
IC
VDD VTTVLDOIN
PGND
GND
MPAD
10 32
VREG_VTTD_VO
5
VREG_VTTD_REFOUT
6 4
8 11
1
2
C6E13
1 UF 10%
6.3 V X5R 402
1
2
R6E19
402
C6E12
1 UF 10%
6.3 V X5R 402
5%0 OHM CH
V_VTTA
FTP
ST6E2
21
SHORT
21
10 UF 20%
X5R 805
1
2
FT4T4
DB6E2
10 UF 20%
6.3 V6.3 V X5R 805
FTP
1
2
1
DB6E1
C6E11
6.3 V
1
C6E10C6E8C6E5
10 UF 20%
6.3 V
2
X5R 805
1 1
6.3 V
1 UF 10%
6.3 V
6.3 V
X5R 402
C6E4
X5R 402
C6E9
X5R 402
C6E7
X5R 402
21
10%1 UF
21
10%1 UF
21
21
10%1 UF
[PAGE_TITLE=VTT TERMINATION]
DRAWING
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
43
V_VREG_12P0_MEM_NBCORE
IN
R5F15
1
249 KOHM 1%
CH
2
402
R5F12
1
47.5 KOHM 1%
CH
2
402
1
C5F6
1 UF 10%
6.3 V
2
X5R 402
FT5U2
26 69
IN
TO INCREASE CURRENT LIMIT INCREASE TRIP RESISTOR VALUE
FT5U1 FTP
1
51 57 26 69
FTP
OUT
1
R5F13
402
1% CH
21
1
2.2 OHM
2
VREG_PWRGPB_PWRGD
DB5U1
26 44 65
26 40 44 52 53 54 64 65 66
1
C5F7
10 UF 10% 16 V
2
X5R 805
C5F4 1 UF 10% 16 V X7R 805
VREG_NBCORE_VCC
VREG_NBCORE_LDO5
VREG_NBCORE_ADDR
1
VREG_NBCORE_ALERT_N
VREG_PWRGPB_EN
IN
BI
SMBUS_CLK SMBUS_DATA
VREG_NBCORE_OCP
R5F10
1
130 KOHM 1%
CH
2
402
FREQUENCY = 400KHZ, SET OVER I2C SEE DATASHEET FOR REGISTER TABLE
TPS53819 I2C ADDRESS 0010 101 R/W HEX WRITE 0010 101 0 0X2A READ 0010 101 1 0X2B
1
2
10 UF 10%
X5R 805
U5F3
8
VDD
9
VREG
15
PGOOD
16
ADDR
3
ALERT_N
14
EN
1
SCL
2
SDA
4
TRIP
7
GND
17
X869867-001 QFN17
1
10 UF 10% 16 V16 V
2
EMPTY 805
TPS53819A
IC
DRVH
VBST
DRVL
1
C5U3C5U4C5F8
10 UF 10% 16 V
2
EMPTY 805
VREG_NBCORE_DH
11
VREG_NBCORE_BST
13
12
SW
10 5
VO
6
FBMPAD
DB5F1
VREG_NBCORE_SW VREG_NBCORE_DL VREG_NBCORE_VO VREG_NBCORE_FB
1
1
2
0.1 UF 10%
R5F8
13.3 KOHM 1%
CH 402
C5F5
25 V
X7R 603
1
4
21
4
DB3T2
5
321
5
Q5F2 NTMFS4985NF X866717-001 DFN5 FET
321
Q5F1
FET
NTTFS4928N X862002-001 DFN5
R5F18
1 OHM EMPTY
C5F9
1000 PF
50 V
EMPTY
R5F9
10 KOHMCH1%
402
Q5F1
I295
I296
I294
Q5F1
ZZ412 I301
Q5F2 X875320-001
I291
Q5F2
I293
I292
Q5F2 FET_MEMNB_AOS
ZZ413 I300
X875313-001Q5F1 FET_MEMNB_TOS X876425-001Q5F1 FET
X878211-001 X875317-001 FET
FTP
1 1
FT4U2
DB6F2
FETX875319-001
FET TRA-N-CNL,SM,SO-8FL,3.1 MOHM,30 V,50 A FET_MEMNB_IRF
TRA-N-CNL,SM,WDFN8,8.9 MOHM,30 V,24 A
TRA-N-CNL,SM,WDFN8,10 MOHM,30 V,27 AFET TRA-N-CNL,SM,WDFN8,8.8 MOHM,30 V,24 AX875316-001 FET TRA-N-CNL,SM,SO-8FL,3.5 MOHM,30 V,35 AFETX875312-001
TRA-N-CNL,SM,SO-8FL,4.5 MOHM,30 V,24 AFET
TRA-N-CNL,SM,SO-8FL,3.6 MOHM,30 V,32 A
V_NBCORE
NOM.VOLTAGE: 1.25V
TRUE FET_MEMNB_IRF
TRUE TRUE
FET_MEMNB_STMTRA-N-CNL,SM,WDFN8,9 MOHM,30 V,12 A
TRUE FET_MEMNB_AOS
TRUE TRUE
FET_MEMNB_TOS
TRUE FET_MEMNB_STMQ5F2
TRUE
V_NBCORE
L5F1
21
1%
805
VREG_NBCORE_SW_R
10%
603
400 NH
1
0.00047 OHM
2
1
2
IND SM42 A
R5F7
EMPTY
805
VENABLE
1
C6F9 820 UF 20%
2.5 V POLY
2
RDL
1
21
5%0 OHM
ST3T3
SHORT
21
1
C6F12 820 UF 20%
2.5 V POLY
2
RDL
FT4U3
FTP
1
DB6F3
1
FTP
FT4U1
1
DB6F1
VREG_NPCORE_FB_R_GND
21
ST3T4
SHORT
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REF_DES DESCR.MS_PART# MATL BOM PROPERTY
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
8
8
26 69
1
2
IN IN
IN
OUT
C5E19
0.1 UF 10%
6.3 V X5R 402
43
VREG_MEMCORE_VID1 VREG_MEMCORE_VID0
R5E12
1
10 KOHM 5%
EMPTY
2
402
R5E22
1
10 KOHM 5%
CH
2
402
R5E27
1
10 KOHM 5%
CH
2
402
V_VREG_12P0_MEM_NBCORE
IN
V_SOC1P8V_SOC1P8
R5E25 R5T15
1
0 OHM 5%
CH
2
402
R5E26
1
0 OHM 5%
EMPTY
2
402
VR_MM
RSET1
R5E38
1
76.8 KOHM 1%
CH
2
402
1
2
RSET2
R5E35
1
15.8 KOHM 1%
CH
2
402
RSET3
R5E34
1
18.7 KOHM 1%
CH
2
402
RSET4
1
R5E29
130 KOHM 1%
2
CH 402
V_5P0
R5E30
402
10 KOHM 5%
EMPTY 402
VREG_PWRGPB_EN
VREG_MEMCORE_VID1_R VREG_MEMCORE_VID0_R
1
VREG_MEMCORE_SS
VREG_MEMCORE_SET0
VREG_MEMCORE_SET1
VREG_MEMCORE_SET2
VREG_MEMCORE_RTN
FT5T4
FTP
21
ST3T1
SHORT
ST5E2 IS OUTPUT VOLTAGE SENSE RETURN PLACE NEAR ST1002 AND CONNECT TO GND PLANE
1%2.2 OHM CH
21
VREG_VDDR_VCC5
1
C5E14
4.7 UF 10%
6.3 V
2
X5R 603
U5E2
NCP5269
1
EN
3
VID1
4 12
8
VREF
7
V1
6
V2
5
V3
18
FBRTN
10
PGND
21
MPAD
X862818-001 QFN20
I306
I307
I305
Q5E1 FET_MEMNB_AOSX875316-001
ZZ408 I312
I302
Q5E2 TRA-N-CNL,SM,WDFN8,5.4 MOHM,30 V,27 A FET_MEMNB_TOSX875314-001
I308
I309
ZZ409 I313
C5T12
0.1 UF 25 V
X7R 603
1
2
C5E18
68 PF
50 V
NPO 402
TRUE TRUE TRUE
FET_MEMNB_STMTRA-N-CNL,SM,WDFN8,9 MOHM,30 V,12 AQ5E1 X876425-001 FET
TRUE TRUE TRUE TRUE TRUE
1
10 UF 10% 16 V
2
EMPTY 805
OUT
4
21
10%
4
R5E42
15 KOHM 1%
CH 402
35.7 KOHM
21
5%
50 57 26 69
1
402
FTP
VREG_MEMCORE_BST_R
C5E15
21
10%
50 V
X7R 402
1
10 UF 10% 16 V
2
X5R 805
1
VREG_MEMCORE_RNT_R
1
C5T10
10 UF 10% 16 V
2
X5R 805
1
FETX875313-001
FET FET_MEMNB_IRFTRA-N-CNL,SM,WDFN8,6.3 MOHM,30 V,24 AQ5E2 X875318-001 FET
FETQ5E2
2
C5E23
4.7 UF 10%
6.3 V X5R 603
2.2 OHM 1% 805
1
TRA-N-CNL,SM,WDFN8,8.9 MOHM,30 V,24 AFET FET_MEMNB_IRFQ5E1 TRA-N-CNL,SM,WDFN8,10 MOHM,30 V,27 A FET_MEMNB_TOSQ5E1
TRA-N-CNL,SM,WDFN8,8.8 MOHM,30 V,24 AFET
TRA-N-CNL,SM,WDFN8,5 MOHM,30 V,30 A FET_MEMNB_AOSX875315-001
FT5T5
R5T7
21
CH
3300 PF
IC
2
VCC
VCCPVID0
VREG_PWRGPB_PWRGD
9
PG
VREG_MEMCORE_DH
14
GH
VREG_MEMCORE_BST
15
BST
VREG_MEMCORE_SW
13
SW
VREG_MEMCORE_DL
CSP CSN
FB
COMP
11
16
VREG_MEMCORE_CSP
17
VREG_MEMCORE_CSN
19
VREG_MEMCORE_FB
20
VREG_MEMCORE_COMP
DB5E3
GL_FSET
X875319-001
X876423-001Q5E2 FET TRA-N-CNL,SM,WDFN8,4.5 MOHM,30 V,17 A FET_MEMNB_STM
1
2
53
321
5
Q5E2 NTTFS4939N X863539-001 DFN5 FET
2
R5E36
21
1% CH
C5T9C5E22C5E21
10 UF 10% 16 V EMPTY 805
Q5E1
FET
NTTFS4928N X862002-001 DFN5
VREG_MEMCORE_SW_S
R5E37
21
402
1% CH
562 OHM
21
0.005 OHM
ST5E3
SHORT
10 KOHM 1%
402
R5E44
1
1 OHM 1%
2
EMPTY 805
1
VREG_MEMCORE_SW_R
C5E25
1000 PF 10% 50 V
2
EMPTY 603
10 KOHM
402
VREG_MEMCORE_FB_R
L5E1
0.68 UH
15.5 A SM
R5E43
21
CH
4.99 KOHM
R5E39
21
1% CH
FT5T7
DB5E1
21
IND
C5E20
0.1 UF
10%
25 V
X5R 402
R5E40
402
VREG_MEMCORE_S
1500 PF
V_MEMCORE
DUAL SETPOINT VR V_HI = 1.25V V_LO = 0.95V
1
FTP
1
21
1
C6E15
ST5E4
50 V
X7R 402
SHORT
21
10%
21
1% CH
C5E17
2
1
1
NOTE: FSEL RES (R1127) FSW
1 820 UF 20%
2.5 V POLY RDL
DB3T3
DB3T1
22 UF 20%
6.3 V
2
X7R 805
0 OHM 5%
GREYBULL_RETAIL
22 UF 20%
6.3 V X7R 805
R5E32
21
EMPTY
805
VENABLE
2K 300KHZ 6K 400KHZ 15K 600KHZ
1
2
22 UF 20%
6.3 V X7R 805
V_MEMCORE
C6F1C5U6C5F1C6F2C5U5
22 UF 20%
6.3 V X7R 805
1 1
22 UF 20%
6.3 V X7R 805
FTP
FT4T5
DB6E3
1
2
1
FTP
FT5U3
1
DB5E2
ST3T2
21
SHORT
51/72 51/72 M 1.0
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
43
IN
V_VREG_12P0_MEM_NBCORE
1
C6C13 1 UF 10%
1
R5C10
249 KOHM 1%
CH
2
402
R5C11
1
105 KOHM 1%
CH
2
402
16 V
2
X5R 603
26 69
I297
Q5C1
I295
Q5C1
I296
ZZ404 I303
Q5C2 FET_MEMNB_IRF
I294
Q5C2 FET_MEMNB_TOS
I298
Q5C2 FET_MEMNB_STM
I293
Q5C2 FETX875315-001 FET_MEMNB_AOS
ZZ405 I302
1
R6C4
21
1%2.2 OHM
1
CH
FT5P3
FT5P4 FTP
1
53 56 26 69
FTP
402
OUT
1
2
DB6C2
C6C4 1 UF 10% 16 V X7R 805
1
IN
26 44 65
IN
26 40 44 50 53 54 64 65 66
BI
1
2
TO INCREASE CURRENT LIMIT
INCREASE TRIP RESISTOR VALUE
X875319-001 FETQ5C1 TRA-N-CNL,SM,WDFN8,8.9 MOHM,30 V,24 A FET_MEMNB_IRF
FETX875313-001 FET_MEMNB_TOSTRA-N-CNL,SM,WDFN8,10 MOHM,30 V,27 A FETX876425-001 TRA-N-CNL,SM,WDFN8,9 MOHM,30 V,12 A FET_MEMNB_STM
TRA-N-CNL,SM,WDFN8,8.8 MOHM,30 V,24 A
TRA-N-CNL,SM,WDFN8,6.3 MOHM,30 V,24 AX875318-001 FET TRA-N-CNL,SM,WDFN8,5.4 MOHM,30 V,27 AX875314-001 FET TRA-N-CNL,SM,WDFN8,4.5 MOHM,30 V,17 AFETX876423-001
TRA-N-CNL,SM,WDFN8,5 MOHM,30 V,30 A
2
VREG_MEMIOCD_VCC
VREG_MEMIOCD_LDO5
VREG_PWRGPA_PWRGD
VREG_MEMIOCD_ADDR VREG_MEMIOCD_ALERT_N
VREG_PWRGPA_EN SMBUS_CLK
SMBUS_DATA
VREG_MEMIOCD_OCP
R6C11
100 KOHM 1%
CH 402
10 UF 10% 16 V X5R 805
TRUE TRUE TRUE TRUE
FET_MEMNB_AOSQ5C1 FETX875316-001
TRUE TRUE TRUE TRUE
VREG, MEMIOCD
1
2
10 UF 10% 16 V X5R 805
1
2
C5C5C5P1C5P2
10 UF 10% 16 V EMPTY 805
U6C1
TPS53819A
8
VDD
9
VREG
15
PGOOD
16
ADDR
3
ALERT_N
14
EN
1
SCL
2
SDA
4
TRIP
7
GND
17
X869867-001 QFN17
FREQUENCY = 400KHZ, SET OVER I2C SEE DATASHEET FOR REGISTER TABLE
TPS53819 I2C ADDRESS 0011 001 R/W HEX WRITE 0011 001 0 0X32 READ 0011 001 1 0X33
1
2
IC
DRVH
VBST
SW
DRVL
VO FBMPAD
C5C4
10 UF 10% 16 V EMPTY 805
DB6C1
VREG_MEMIOCD_DH
11
VREG_MEMIOCD_BST
13
VREG_MEMIOCD_SW
12
VREG_MEMIOCD_DL
10
VREG_MEMIOCD_VO
5
VREG_MEMIOCD_FB
6
1
0.1 UF
R6C8
10 KOHM 1%
402
R6C9
1
6.65 KOHM 1%
CH
2
402
VREG_MEMIOCD_FB_R_GND
21
C5C10
25 V
X7R 603
21
CH
10%
4
5
Q5C1
FET
4
21
5
NTTFS4928N X862002-001 DFN5
321
Q5C2 NTTFS4939N X863539-001 DFN5 FET
321
R6C2
1 OHM EMPTY
805
C6C2
1000 PF
10%
50 V
EMPTY
603
R6C10
0 OHM 5%
EMPTY
805
VENABLE
1
0.003 OHM
1%
2
1
VREG_MEMIOCD_SW_R
2
21
L5C1
1 UH
13.9 A
FT4N2
DB6B1
21
IND
SM
FTP
ST7C1
SHORT
1
1
1
C6C14
820 UF 20%
2.5 V POLY
2
RDL
DUPLICATE TEST POINTS FOR
21
PROBING AT VR SOURCE+SINK
V_MEMIOCD
NOM.VOLTAGE: 1.5V
V_MEMIOCD
1
1
C6B10
22 UF 20%
6.3 V
2
EMPTY 805
1
FT4N1
FTP
1
DB6B2
1
DB3P2
1 1
FTP
FT4N4
DB6C4 DB3P1
ST7C2
SHORT
GREYBULL_RETAIL
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
43
IN
V_VREG_12P0_MEM_NBCORE
1
C9F6 1 UF
1
R9F6
249 KOHM 1%
CH
2
402
R9F11
1
90.9 KOHM 1%
CH
2
402
2
10% 16 V X5R 603
I296
I294
I295
ZZ406 I302
I293
I297
I292
ZZ407 I301
Q9F2 Q9F2
Q9F2 Q9F1 Q9F1 Q9F1 Q9F1
FT1U2
26 69
R1U3
21
402
1% CH
1
2
DB9F2
C9F8 1 UF 10% 16 V X7R 805
FT1U1
FTP
2.2 OHM
52 56
OUT
26 69
1
FTP
1
IN
26 44 65
IN
26 40 44 50 52 54 64 65 66
BI
TO INCREASE CURRENT LIMIT INCREASE TRIP RESISTOR VALUE
X875319-001 FET_MEMNB_IRFFET TRA-N-CNL,SM,WDFN8,8.9 MOHM,30 V,24 A X876425-001 TRA-N-CNL,SM,WDFN8,9 MOHM,30 V,12 A FET_MEMNB_STMFET X875318-001
X875314-001
FET TRA-N-CNL,SM,WDFN8,10 MOHM,30 V,27 AX875313-001
TRA-N-CNL,SM,WDFN8,6.3 MOHM,30 V,24 A FET_MEMNB_IRFFET TRA-N-CNL,SM,WDFN8,5.4 MOHM,30 V,27 A FET_MEMNB_TOSFET
FETX875315-001 FET_MEMNB_AOSTRA-N-CNL,SM,WDFN8,5 MOHM,30 V,30 A
TRA-N-CNL,SM,WDFN8,4.5 MOHM,30 V,17 AX876423-001 FET_MEMNB_STMFET
1
10 UF 10% 16 V
2
X5R 805
VREG_MEMIOAB_VCC VREG_MEMIOAB_LDO5
VREG_PWRGPA_PWRGD
VREG_MEMIOAB_ADDR VREG_MEMIOAB_ALERT_N
1
VREG_PWRGPA_EN SMBUS_CLK
SMBUS_DATA VREG_MEMIOAB_OCP
R9F12
1
100 KOHM 1%
CH
2
402
TRUE TRUE
FET_MEMNB_TOSQ9F2
TRUE TRUE
FET_MEMNB_AOSFETX875316-001 TRA-N-CNL,SM,WDFN8,8.8 MOHM,30 V,24 A
TRUE TRUE TRUE TRUE
VREG, MEMIOAB
1
2
10 UF 10% 16 V X5R 805
1
2
10 UF 10% 16 V EMPTY 805
U9F2
TPS53819A
8
VDD
9
VREG
15
PGOOD
16
ADDR
3
ALERT_N
14
EN
1
SCL
2
SDA
4
TRIP
7
GND
17
X869867-001 QFN17
FREQUENCY = 400KHZ, SET OVER I2C SEE DATASHEET FOR REGISTER TABLE
TPS53819 I2C ADDRESS 0011 000 R/W HEX WRITE 0011 000 0 0X30 READ 0011 000 1 0X31
1
2
IC
DRVH
VBST
SW
DRVL
VO FBMPAD
C9F3C1U3C1U2C9F4
10 UF 10% 16 V EMPTY 805
DB9F1
VREG_MEMIOAB_DH
11
VREG_MEMIOAB_BST
13
VREG_MEMIOAB_SW
12
VREG_MEMIOAB_DL
10
VREG_MEMIOAB_VO
5
VREG_MEMIOAB_FB
6
1
0.1 UF
R9F10
10 KOHM
402
R1U5
1
6.65 KOHM 1%
CH
2
402
VREG_MEMIOAB_FB_R_GND
21
C9F7
25 V
X7R 603
21
1% CH
4
10%
5
Q9F2
FET
4
21
5
NTTFS4928N X862002-001 DFN5
321
Q9F1 NTTFS4939N X863539-001 DFN5 FET
321
R9F1
1 OHM EMPTY
805
C9F2
1000 PF
10%
50 V
EMPTY
603
R9F13
0 OHM 5%
805
VENABLE
1
1%
2
VREG_VDDIOCD_SW_R
1
2
21
EMPTY
L9E3
1 UH
13.9 A SM
0.003 OHM
FT1U3
DB9F7
21
IND
ST7F1
SHORT
FTP
1
1
1
2
DUPLICATE TEST POINTS FOR
21
PROBING AT VR SOURCE+SINK
V_MEMIOAB
NOM.VOLTAGE: 1.5V
C9E11
820 UF 20%
2.5 V POLY RDL
1
2
1
FTP
1
1
V_MEMIOAB
C9F21
22 UF 20%
6.3 V EMPTY 805
FT1U5
DB9F4
DB3U2
1
FTP
FT1U4
1
DB9F3
1
DB3U1
ST7F2
SHORT
GREYBULL_RETAIL
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MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
REF_DES DESCR.MS_PART# MATL BOM PROPERTY
43
IN
1
R3E20
249 KOHM 1%
2
CH 402
1
R3E18
61.9 KOHM 1%
2
CH 402
V_VREG_12P0_TO_5P0_3P3
1
2
26 69
C3E16
1 UF 10% 16 V X7R 603
FT7T4
IN
FTP
FT7T3
R3E22
1
10 KOHM 5%
CH
2
402
26 69
1
FTP
OUT
1
DB3E4
65 26 44
66 26 40 44 50 52 53 64 65
R3E23
2.2 OHM 402
VREG_5P0_LDO5
R7T4
10 KOHM 5%
CH 402
VREG_V5P0_PWRGD
VREG_5P0_ALERT_N
1
R3E17
90.9 KOHM 1%
2
CH 402
IN
BI
1
2
1
1
C6T17
10 UF 10% 16 V
2
X5R 805
21
VREG_5P0_VDD
1%
1
CH
C3E13
1 UF 10% 16 V
2
X7R 603
VREG_5P0_ADDR
VREG_V5P0_EN SMBUS_CLK
SMBUS_DATA VREG_5P0_OCP
1
C3E12
10 UF 10% 16 V
2
X5R 805
U3E2
TPS53819A
8
VDD
9
VREG
15
PGOOD
16
ADDR
3
ALERT_N
14
EN
1
SCL
2
SDA
4
TRIP
7
GND
17
X869867-001 QFN17
1
2
C4E4
10 UF 10% 16 V X5R 805
IC
DRVH
VBST
SW
DRVL
VO FBMPAD
1
C7T2
10 UF 10% 16 V
2
X5R 805
VREG_5P0_DH
11
13
VREG_5P0_BST
VREG_5P0_SW
12 10
VREG_5P0_DL
5
VREG_5P0_VO
6
VREG_5P0_FB
C3E14
0.1 UF 25 V
X7R 603
10%
4
5
Q3E2 NTTFS4939N
4
21
X863539-001 DFN5 FET
321
DB3F5
FT7U1
FTP
1 1
V_5P0
VOLTAGE: 5.09V
V_5P0
L3E1
5
Q3E1 NTTFS4939N X863539-001 DFN5 FET
321
1.5 UH
11.1 A
0.00475 OHM 1
R3E25
1 OHM 1%
2
EMPTY 402
VREG_5P0_SW_R
1
C3E17
0.01 UF 10% 16 V
2
EMPTY 402
IND SM
1
2
C3E15
820 UF 20%
6.3 V POLY TH
22 UF 20%
6.3 V X7R 805
22 UF 20%
6.3 V X7R 805
C3E10C3E9C3E8
22 UF 20%
6.3 V X7R 805
1
1
FTP
1
1
FT7U2
DB3F6
FTP
FT7T5
DB3F7
I110
I114
I109
Q3E2 FET_5P0_AOS
ZZ414 I122
ZZ451 I121
[PAGE_TITLE=VREGS, V5P0]
TPS53819 I2C ADDRESS 0010 110 R/W HEX WRITE 0010 110 0 0X2C READ 0010 110 1 0X2D
TRA-N-CNL,SM,WDFN8,6.3 MOHM,30 V,24 AX875318-001 FETQ3E2 FET_5P0_IRF
X876423-001 FETQ3E2 FET_5P0_STMTRA-N-CNL,SM,WDFN8,4.5 MOHM,30 V,17 A
FETX875315-001 FETX875318-001 FET FETX876423-001Q3E1
TRA-N-CNL,SM,WDFN8,5.4 MOHM,30 V,27 AX875314-001 FETQ3E2 FET_5P0_TOS
TRA-N-CNL,SM,WDFN8,5 MOHM,30 V,30 A
TRA-N-CNL,SM,WDFN8,6.3 MOHM,30 V,24 A
TRA-N-CNL,SM,WDFN8,5.4 MOHM,30 V,27 AQ3E1 TRA-N-CNL,SM,WDFN8,4.5 MOHM,30 V,17 A FET_5P0_STM TRA-N-CNL,SM,WDFN8,5 MOHM,30 V,30 AX875315-001 FETQ3E1 FET_5P0_AOS
TRUE TRUE TRUE
TRUE TRUE
TRUE
I115 I117
TRUE FET_5P0_IRFQ3E1
I116 FET_5P0_TOSX875314-001
TRUE
DB3E3
1
R3E21
1
1 KOHM 1%
CH
2
402
VREG_5P0_FB_R_GND
21
ST3E1
SHORT
R3E19
7.5 KOHM
5.6 PF 0.5PF
402
C3E2
50 V
NPO 402
1% CH
21
21
R3E16
EMPTY
805
VENABLE
21
5%0 OHM
ST4B1
SHORT
21
GREYBULL_RETAIL
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MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
26
IN
V_5P0STBY V_12P0
R6N1
1
10 KOHM 5%
CH
2
402
R4B9
21
402
U4B3
1% CH
3
4
VREG_V5P0_SEL_C
402
R4B10
21
1%4.75 KOHM CH
VREG_V5P0_DUAL_SEL0 VREG_V5P0_SEL_B1 VREG_V5P0_SEL_B2
R4B8
1
10 KOHM 5%
CH
2
402
FT6N3
FTP
1
10 KOHM
5
R4B11
1
10 KOHM 5%
CH
2
402
VREG_V5P0_SEL_PGATE VREG_V5P0_SEL_PGATE_R VREG_V5P0_SEL_NGATE
6
2
XSTR
1
1
R4B7
1
4.75 KOHM 1%
CH
2
402
0.22 UF 10%
6.3 V EMPTY 402
1
2
VREG_V5P0DUAL_CDG
1
C4B3C4B1
4.7 UF 10% 16 V X5R 1206
2
V_5P0
C4B11
0.22 UF 10% 10 V X7R 603
12
2
C4B2
1 UF 10% 10 V X5R 402
V_5P0STBY
R4B14
0 OHM
402
1
2
5% CH
C4B4
220 UF 20% 10 V ELEC RDL
21
U4B4
3
S2
4
G2
2
G1
1
S1
X801132-002
4
402
R4B13
1%100 OHM CH
SI4501DY
5
321
21
Q6N1 NTTFS4939N X863539-001 DFN5 FET
D<3> D<2> D<1> D<0>
IC
V_5P0DUAL
5 8 7 6
V_5P0DUAL
NOM.VOLTAGE: 5.00V
1
1
1
FTP
FT6N1
DB4B6
DB4B7
[PAGE_TITLE=VREGS, V5P0 DUAL]
VREG_V5P0_DUAL_SEL0
HIGH LOW
VREG_5P0_SEL NGATE/PGATE
LOW HIGH
V_5P0DUAL
V_5P0STBY V_5P0
Tue Jun 18 16:42:27 2013
DRAWING
GREYBULL_RETAIL
55/72 55/72 M 1.0
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CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
43
IN
V_VREG_12P0_TO_5P0_3P3
26 69
IN
1
C4F6
0.022 UF 10% 16 V
2
X7R 402
R4F6
1
0 OHM 5%
2
CH 402
VREG_3P3_VIN2
1
C4F3
1 UF 10% 16 V
2
X5R 603
VREG_PWRGPA_EN
VREG_V3P3_SS
1
2
U4F1
TPS54526
13
VIN1
14
VIN2
7
EN
4
SS
X865085-001 TSSOP15
10 UF 20% 16 V X5R 1206
1
2
IC
SW1 SW2
VBST
VO
VFB
PG
VREG5 PGND1
PGND2
GND
MPAD
C6T20 C4E10C4F2
10 UF 20% 16 V X5R 1206
1
2
10
VREG_V3P3_VSW
11 12
VREG_V3P3_BST 1 2
VREG_V3P3_FB 6
VREG_PWRGPA_PWRGD 3
VREG_V3P3_VREG 8
9 5 15
C6U2 C4E11
10 UF 20% 16 V X5R 1206
10 UF 20% 16 V X5R 1206
OUT
1
10 UF 20% 16 V
2
X5R 1206
0.1 UF 10%
C4F5
25 V
X7R 603
52 53 26 69
21
R4F8
1
30.1 KOHM 1%
2
CH 402
VREG_V3P3_VO
R4F4
402
1% CH
21
102 K
DB4F5
FT6U4
1 1
FTP
1.5 UH
0.0156 OHM
805
VENABLE
L4F1
R4F5
EMPTY
V_3P3
V_3P3
VOLTAGE: 3.3V
21
IND SM4.95 A
R4F25
1
100 OHM 5%
CH
2
1206
21
5%0 OHM
ST4F3
SHORT
21
C4E14 C4E13
22 UF 20%
6.3 V EMPTY 805
22 UF 20%
6.3 V EMPTY 805
C6U3 C4F7
22 UF 20%
6.3 V X7R 805
22 UF 20%
6.3 V X7R 805
1
1
FTP
DB3R1
FT6U1
C4F8 C6U4
22 UF 20%
6.3 V 6.3 V X7R 805
22 UF 20%
X7R 805
1
C4F21
470 UF 20%
6.3 V POLY TH
1
1
FTP
DB4F1
FT5U4
DB5F2
[PAGE_TITLE=VREGS, V3P3]
1
2
C4F4
1 UF 10% 16 V X7R 603
GREYBULL_RETAIL
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MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_3P3
1
2
C4F14
1 UF 10%
6.3 V X5R 402
1
2
C4F15
10 UF 20%
6.3 V X5R 805
1
2
C4F16
10 UF 20%
6.3 V EMPTY 805
V_SOCPHY
NOM.VOLTAGE: 0.95V
FT6U5
DB4F7
U4F3
RT8071A
2
VCC
3
VIN
OUT
VREG_PWRGPB_EN
VREG_PWRGPB_PWRGD
50 51 26 69
26 69
IN
9
PGOOD
10
X865086-001 DFN11
IC
SW1 SW2
FB
NC GND1 GND2 MPADEN
6
VREG_SOCPHY_SW
7 1
VREG_SOCPHY_FB
8 4 5 11
1.5 UH
R4F18
1
82.5 KOHM 1%
CH
2
402
R4F14
402
L4F2
CH
21
IND
SM2.6 A
1
R4F16
4.7 KOHM 5%
EMPTY
2
402
VREG_SOCPHY_COMP_C
1
C4F11
2200 PF 10% 50 V
2
EMPTY 402
C4F10
220 PF
50 V
NPO 402
21
1%47.5 KOHM
1
FTP
1
0.04 OHM
21
5%
R4F10
0 OHM
805
VENABLE
21
5%
EMPTY
22 UF 20%
6.3 V X7R 805
VREG_SOCPHY_FB_TOP
22 UF 20%
6.3 V X7R 805
V_SOCPHY
1
1
C4F17C4F13C4F12
10 UF 20%
6.3 V
2
X5R 805
1
FT6U3
FTP
1
DB4F6
ST4F4
2 1
SHORT
R4F24
1
182 OHMS 1%
EMPTY
2
603
1
DB4F2
FTP
FT6U2
GREYBULL_RETAIL
57/72 57/72 M 1.0
Page 58
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
I170
V_1P8STBY
R6R21
1
0 OHM 5%
2
CH 402
1
R6R20
4.99 KOHM 1%
2
EMPTY 402
I171
V_BAT
NOM.VOLTAGE: 1.8V
I169
V_BAT
VREGS, VSOCPLL + VBURN + VFUSE + VBAT
V_3P3
1
R6C14
4.7 KOHM 5%
2
EMPTY 402
VREG_BURN_EN_R
1
C6C5
1 UF 10%
6.3 V
2
X5R 402
IN
VREG_BURN_EN
8
21
R6C13
CH
5%
402
0 OHM
1
R6C15
10 KOHM 5%
2
CH 402
U6C3
CAT6219
VIN
EN GND
X865083-001 SOT23-5
IC
VOUT
ADJ
51 4 23
VREG_BURN_OUT
VREG_BURN_ADJUST
1
C6C6
0.1 UF 10%
6.3 V
2
EMPTY 402
R6C22
1
1 OHM 1%
2
CH 402
VREG_BURN_COUT
1
2
C6D1
4.7 UF 10%
6.3 V X5R 603
1
2
1 UF 10%
6.3 V EMPTY 402
R6C19
1
887 OHM 1%
CH
2
402
R6C16
1
1.65 KOHM 1%
CH
2
402
1
2
C6C8C6C7
1 UF 10%
6.3 V EMPTY 402
1
2
1
2
2
C6C10
1 1 UF 10%
6.3 V X5R 402
R6D38
5.49 KOHM 1%
CH 402
3
U6C6 FET
SOT23 X857156-001
R6D39
402
V_BURN
NOM.VOLTAGE: 1.9V
1
0.047 UF 10% 10 V
2
X7R 402
21
VREG_BURN_OUT_CGDVREG_BURN_OUT_G
1%100 OHM CH
1
2
C6C9C6D11
10 UF 10%
6.3 V X5R 805
V_BURN
1
R3R1
1
1 KOHM 1%
CH
2
402
DB6C3
1
C5C19 C5C20
1 UF 10%
6.3 V
2
EMPTY 402
NOTE: THIS WAS SET TO 1.83V TO ACCOMODATE DROP IN FERRITES
V_3P3
1
2
C5C23
1 UF 10%
6.3 V X5R 402
U5C3
NCP1117
IN
1
ADJUST/GND
X819037-001
1.8V
VREG_SOC1P8_ADJUST
1
2
IC
OUT
C5C18
0.1 UF 10%
6.3 V EMPTY 402
FT5P6
DB5C2
1
1 UF 10%
6.3 V
2
EMPTY 402
23
1
R5C20
1 OHM 1%
2
CH 402
VREG_SOC1P8_COUT
1
2
FTP
C5C21
4.7 UF 10%
6.3 V X5R 603
1 1
1
R5C19 200 OHM 1%
2
CH 603
R5C15 100 OHM 1%
CH 402
V_SOC1P8
V_SOC1P8
NOM.VOLTAGE: 1.83V
1
DB5D3
1
FTP
1
DB5D1
1
FTP
NOTE: BOTTOM ADJUST RESISTOR LEFT IN TO REDUCE EFFECT OF ADJUST PIN CURRENT WHEN USED WITH 1K DIGIPOT
26 69
1 1
DB6D3
FTP
DB5D2
IN
FT5R5
VREG_PWRGPB_EN
1
1
2
C6D5
1 UF 10%
6.3 V X5R 402
FT5R4
FT5P5
V_3P3
VREG_FUSE_CBYP
1
2
U6D1
CAT6241
1
VIN1
2
VIN2
4
EN
5
CBYP
X865082-001 DFN9
C6D6
0.01 UF 10% 16 V EMPTY 402
IC
VOUT1 VOUT2
ADJ GND
MPAD
7 8
6 3
9
I178
1
R6D8
1 OHM 1%
2
CH 402
VREG_FUSE_COUT
VREG_FUSE_ADJ
1
C6D2
4.7 UF 10%
6.3 V
2
X5R 603
C6D3 C6D4
1 UF 10% 10%
6.3 V X5R 402
1 UF
6.3 V X5R 402
V_FUSE
NOM.VOLTAGE: 0.95V
V_FUSE
1
R6D10
2.74 KOHM 1%
2
CH 402
1
R6D11
3 KOHM 1%
2
CH 402
I176
1
FT4R1
FTP
1
DB6D2
1
DB3R2
NOTE: BOTTOM ADJUST RESISTOR LEFT IN TO REDUCE EFFECT OF ADJUST PIN CURRENT WHEN USED WITH 1K DIGIPOT
GREYBULL_RETAIL
58/72 58/72 M 1.0
Page 59
VREGS, VSB2P5
8 1234567
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_5P0
1
2
C3E4
1 UF 10%
6.3 V X5R 402
1
2
10 UF 20%
6.3 V X5R 805
1
2
C4B12C4B13
10 UF 20%
6.3 V X5R 805
1
R3D4
10 KOHM 5%
2
CH 402
1
C3D4
4.7 UF 10%
6.3 V
2
EMPTY 603
1
R3D3
100 KOHM 1%
2
CH 402
VREG_VSB2P5_PWRGD
VREG_VSB2P5_EN
U3D5
RT8071A
2
VCC
3
VIN
9
PGOOD
10
X865086-001 DFN11
IC
SW1 SW2
FB
NC GND1 GND2 MPADEN
6
VREG_SB2P5_SW
7 1
8 4 5 11
1.5 UH
1
R3E2
15 KOHM 1%
2
CH 402
2.6 A
VREG_SB2P5_FB
L3D1
21
IND
SM
1
R3E4
4.7 KOHM 5%
2
EMPTY 402
VREG_SB2P5_COMP_C
1
C3E3
2200 PF 10% 50 V
2
EMPTY 402
C3E1
220 PF 5%
50 V
NPO 402
47.5 KOHM 1%
0.04 OHM
21
R3D5
402
CH
V_SB2P5
NOM.VOLTAGE: 2.5V
V_SB2P5
1
R3D1
1
22 UF 20%
6.3 V X7R 805
R3D2
EMPTY
805
VENABLE
21
5%
21
0 OHM
VREG_SB2P5_TOP
22 UF 20%
6.3 V X7R 805
1
1
FTP
C3D3C3D2C3D1
10 UF 20%
6.3 V
2
X5R 805
FT7R9
DB3D1
ST3D1
2 1
SHORT
1
182 OHMS 1%
EMPTY
2
603
1
DB3D2
FTP
FT7R10
GREYBULL_RETAIL
59/72 59/72 M 1.0
Page 60
VREGS, VSB1P8PLL + VSB1P8IO + VSBCORE + VSB1P1PLL
8 1234567
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_SB2P5
1
1 UF 10%
6.3 V
2
EMPTY 402
NOTE: THIS WAS SET TO 1.83V TO ACCOMODATE DROP IN FERRITES
U3E1
CAT6243DC
VIN
5
EN
X854310-001 DPAK-6
VOUT
GND1 GND2
1
2
C7T4
1 UF 10%
6.3 V X5R 402
26
IN
R7T7
1
10 KOHM 5%
EMPTY
2
402
VREG_SB1P8_EN
C7T6
0.1 UF 10% 16 V EMPTY 603
1
R7T2
10 KOHM 5%
CH
2
402
IC
ADJ
1
C7T7C7T8
1 UF 10%
6.3 V
2
EMPTY 402
FTP
1 1
R3E10
1.47 KOHM 1%
CH 402
FT7T6
DB3E5
24 1
3 6
1
2
1 OHM 1%
CH 402
V_SB1P8
V_SB1P8
NOM.VOLTAGE: 1.83V
1
DB3E2
1
1 1
FTP
FTP
FT7T2
FT7T1
DB3E1R7T8
1
FTP
FT1U7
1
DB3D10
VREG_SB1P8_COUT
VREG_SB1P8_ADJUST
1
2
C7T5
4.7 UF 10%
6.3 V X5R 603
R3E11
1.15 KOHM 1%
CH 402
V_SB1P1
1
DB3D4
V_SB2P5
NOTE: BOTTOM ADJUST RESISTOR LEFT IN TO REDUCE EFFECT OF ADJUST
R7R3
1
10 KOHM
1
2
C7R14
1 UF 10%
6.3 V X5R 402
5% CH
2
402
VREG_SB1P1_EN
1
C7R15
0.1 UF 10% 16 V
2
EMPTY 603
1
1 UF 10%
6.3 V
2
EMPTY 402
U3D3
CAT6243DC
VIN
5
EN
X854310-001 DPAK-6
IC
VOUT
ADJ GND1 GND2
1
2
C7R12C7R13
1 UF 10%
6.3 V EMPTY 402
24 1
3 6
VREG_SB1P1_ADJUST
1
C3D17 C7R11
0.1 UF 10%
6.3 V
2
EMPTY 402
FT7R7
DB3D9
1
FTP
1
1
R7R5
1 OHM 1%
2
CH 402
VREG_SB1P1_COUT
1
4.7 UF 10%
6.3 V
2
X5R 603
R3D19 825 OHMS 1%
CH 402
R7R4 2 KOHM 1%
CH 402
V_SB1P1
NOM.VOLTAGE: 1.1VPIN CURRENT WHEN USED WITH 1K DIGIPOT
1
FTP
FT7R4
1
DB3D5
1
FTP
FT7R3
1
FT7R8
FTP
1
DB3D11
NOTE: BOTTOM ADJUST RESISTOR LEFT IN TO REDUCE EFFECT OF ADJUST PIN CURRENT WHEN USED WITH 1K DIGIPOT
GREYBULL_RETAIL
60/72 60/72 M 1.0
Page 61
VREGS,STANDBY SWITCHERS 3P3
8 1234567
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
VREG_3P3STBY_IN_SEL
VREG_3P3STBY_IN_SEL NGATE/PGATE
VREG_3P3STBY_VCC
V_5P0STBY
2.2 UH
1.6 A 1210
0.08DCR
L4C1
21
IND
OUT
61 62
61
V_VREG_STBY_VIN
IN
26
IN
61
R7N2
1
4.7 KOHM 5%
2
CH 402
VREG_3P3STBY_IN_SEL
FT7P2
V_VREG_STBY_VIN
IN
1
FTP
R7N1
1
10 KOHM 5%
CH
2
402
VREG_3P3STBY_IN_SEL_C
R7P2
4.75 KOHM 1% 402
CH
VREG_3P3STBY_IN_SEL_B1
21
V_VREG_3P3STBY_IN
R7P1
10 KOHM 1%
402
U7P1
3
5
4
V_12P0
R3B1
1
10 KOHM 5%
CH
2
402
21
CH
VREG_3P3STBY_IN_SEL_PGATE
VREG_3P3STBY_IN_SEL_NGATE
6
XSTR
1
61
IN
2
VREG_3P3STBY_IN_SEL_B2
V_VREG_STBY_VIN
2
C7N1
0.22 UF 10%
6.3 V
1
X5R 402
12
C3C1C3B2
22 UF 20% 10 V
2
EMPTY 1206
1
0.22 UF 10%
6.3 V EMPTY 402
R7P3
1
4.75 KOHM 1%
CH
2
402
1
2
C3B1
220 UF 20% 10 V ELEC RDL
V_5P0
U3C1
3
S2
4
G2
2
G1
1
S1
X801132-002
SI4501DY
LOWHIGH
IC
5
D<3>
8
D<2>
7
D<1>
6 1
D<0>
V_3P3STBY
NOM.VOLTAGE: 3.315V
MAX RECOMMENDED CURRENT: 1A
V_5P0STBY V_5P0HIGHLOW
V_VREG_3P3STBY_IN
NOM.VOLTAGE: 5.00V
FTP
FT7P1
I288
1
DB3C7
1
DB3C8
V_VREG_STBY_VIN
2
D4C1 SMA
EMPTY
1
V_VREG_STBY_VIN_CR
R3C1
0 OHM 5%
1210
EMPTY
FT7P4
FTP
C3C3
20%
10 UF
6.3 V X5R 805
C7P3
10 UF 20%
6.3 V
EMPTY
805
C3C11
10 UF 20%
6.3 V X5R 805
C3C4
21
1 UF 10%
6.3 V X5R 402
V_1P8STBY
1
U3C2
TPS54218
1
VIN1
2
R3C3
1
R3C2
21
21
21
1
100 KOHM 1%
2
EMPTY 402
R7P4
1
20 KOHM 1%
2
CH 402
10 KOHM 1%
402
CH
2
VREG_3P3STBY_PWRGD
1
VREG_3P3STBY_EN
R7P5
1
0 OHM 5%
CH
2
402
FT7P5
FTP
1
2
FT7P10
C7P1
4.7 UF 10%
6.3 V X5R 603
FTP
1
R3C8
1
90.9 KOHM 1%
2
CH 402
VIN2
16
VIN3
15
EN
14
PWRGD
8
RT/CLK
9
SS
X865747-001 QFN17
VREG_3P3STBY_RT
VREG_3P3STBY_SS
1
2
C3C5
1500 PF 10% 50 V X7R 402
IC
PH1 PH2 PH3
BOOST
VSENSE
COMP GND1 GND2 AGND MPAD
10
VREG_3P3STBY_SW 11 12
13
VREG_3P3STBY_BT
VREG_3P3STBY_FB
6 7
VREG_3P3STBY_COMP 3 4
1
5 17
C3C6
0.012 UF 10% 16 V
2
X7R 402
VREG_3P3STBY_COMP_C
1
R3C10
21.5 KOHM 1%
CH
2
402
VREG_3P3STBY_AGND
21
ST3C1
SHORT
CR4C1
1 2
SMA DIO
C3C2
0.1 UF 10% 16 V
X7R 603
1
C3C8
100 PF 5% 50 V
2
NPO 402
1.5 UH
0.04 OHM
1
R3C7
30.1 KOHM 1%
CH
2
402
FT6P2
DB4C5
L4C2
FTP
21
IND
SM2.6 A
1 1
0.05 OHM
R3C6
93.1 KOHM1% 402
C3C7
470 PF
50 V
NPO 402
CH
21
5%
V_3P3STBY
DB4C1
FT6P1
1
1
C4C6
22 UF 20%
6.3 V
2
X7R 805
21
0 OHM 5%
R3C9
EMPTY
402
VENABLE
10 UF 20%
6.3 V X5R 805
21
C6P2C4C5
10 UF 20%
6.3 V X5R 805
1
FTP
1
VREG_3P3STBY_FB_TOP
FT6P3
DB4C4
10 UF 20%
6.3 V X5R 805
C4C8C6P3
10 UF 20%
6.3 V X5R 805
ST4C3
2 1
SHORT
1
FTP
[PAGE_TITLE=VREGS, STANDBY SWITCHERS]
R5A5 SHOULD BE 182KOHM 0402, WAITING ON COMPONENT TB ADDED IN TC
GREYBULL_RETAIL
61/72 61/72 M 1.0
Page 62
VREGS,STANDBY SWITCHERS 1P1 + 1P8
8 1234567
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
FTP
FT7N1
IN
1
1
2
C3C16C3C15
10 UF 20%
6.3 V EMPTY 805805
1
2
1
FTP
1
10 UF 20%
6.3 V
2
EMPTY 805
VREG_1P1STBY_PWRGD
C7P10
1 UF 10%
6.3 V X5R 402
NOTE: THIS WAS SET TO 1.83V TO ACCOMODATE DROP IN FERRITES
1
C7P5C7P6
1 UF 10%
6.3 V
2
X5R 402
61
61
IN
IN
V_VREG_STBY_VIN
1
10 UF 20%
6.3 V
2
X5R 805
V_VREG_STBY_VIN
V_3P3STBY
FT7P9
C7P8C7P9
10 UF 20%
6.3 V X5R 805
2
1
2
1
2
1
2
1
CR3C3
SMA DIO
CR7P2 SMA
DIO
CR3C1 SMA
DIO
CR7P1 SMA
DIO
CR3C2 SMA
DIO
12
1
2
10 UF 20%
6.3 V EMPTY
62
1
2
[PAGE_TITLE=VREGS, STANDBY SWITCHERS]
R7P11
1
10 KOHM 1%
CH
2
402
1
R3C29
10 KOHM 5%
2
EMPTY 402
1
2
62
OUT
VREG_1P8STBY_IN
R3D31
0 OHM 5%
CH 402
R7P10
1
20 KOHM 1%
CH
2
VREG_1P1STBY_PWRGD
1
FTP
VREG_1P1STBY_EN
1
C3C18
4.7 UF 10%
6.3 V
2
X5R 603
1
R7P9
100 KOHM 1%
2
EMPTY 402
VREG_1P8STBY_EN
1
C3D20
4.7 UF 20%
6.3 V
2
X5R 402
1
2
402
FT7R5
1
R3D30
20 KOHM 1%
CH 402
U3C4
NCP3170
7
6
EN
X865081-001 SO8
1
U3C3
CAT6243DC
VIN
5
EN
X854310-001 DPAK-6
DB3C2
1
2
DB3C5
1 UF 10%
6.3 V EMPTY 402
VOUT
GND1 GND2
IC
VSWVIN
FB COMPPG AGND
PGND
IC
ADJ
82
VREG_1P1STBY_SW
4
VREG_1P1STBY_FB
5
VREG_1P1STBY_COMP
ST3C3
1
2
21
C3D5C3D6
1 UF 10%
6.3 V EMPTY 402
1
2
1
2
SHORT
3 1
24 1
3 6
C3C17
0.012 UF 10% 16 V X7R 402
VREG_1P1STBY_COMP_C
R3C24
21.5 KOHM 1%
CH 402
VREG_1P1STBY_AGND
FT7P15
DB3C10
1
R3D6
1 OHM 1%
2
CH 402
VREG_1P8STBY_COMP_C
VREG_1P8STBY_FB
1
C3C9
4.7 UF 10%
6.3 V
2
X5R 603
FTP
1
2
0.04 OHM
C7P11
100 PF 5% 50 V EMPTY 402
1 1
1
R3C23
90.9 KOHM 1%
2
CH 402
1
R7R1
1.47 KOHM 1%
2
CH 402
1
R7R2
1.15 KOHM 1%
2
CH 402
1.5 UH
FT7P12
L3C2
DB3C9
21
IND SM2.6 A
FTP
10 UF 20%
6.3 V X5R 805
1 1
470 PF
R3C27
21
1%36.5 KOHM CH
402
C3C19
21
5%
50 V
NPO 402
C3D21C3D22
10 UF 20%
6.3 V X5R 805
1
1
C3C21
22 UF 20%
6.3 V
2
X7R 805
R3C28
0 OHM
402
VENABLE
V_1P8STBY
C3D23
10 UF 20%
6.3 V EMPTY 805
1
DB3C1
FTP
FT7P16
21
5%
EMPTY
1
V_1P1STBY
NOM.VOLTAGE: 1.13V
MAX RECOMMENDED CURRENT: 1.25A
10 UF 20%
6.3 V X5R 805
VREG_1P1STBY_FB_TOP
V_1P8STBY
NOM.VOLTAGE: 1.8V
MAX RECOMMENDED CURRENT: 300MA
1
FTP
C3C22C7P12
10 UF 20%
6.3 V X5R 805
DB3D7
FT7R6
GREYBULL_RETAIL
C7P13
10 UF 20%
6.3 V X5R 805
V_1P1STBY
1
DB3C6
1
FT7P14
C3C23
10 UF 20%
6.3 V X5R 805
1
DB3C4
1
FTP
FT7P13
ST3C6
2 1
SHORT
62/72 62/72 M 1.0
FTP
Page 63
8 1234567
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D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
26
FT7N2
V_3P3STBY
IN
1
FTP
V_3P3STBY_IR
70
OUT
70
IN
1
C7N2
0.1 UF 10%
6.3 V
2
X5R 402
IR_BLAST_EN
R7N3
1
100 KOHM 5%
2
CH 402
402
0 OHM 5%
402
1
C7N5
1 UF 10%
6.3 V
2
X5R 402
IR_BLAST_TXD
IR_BLAST_RXD
R5B28
R5B27
EMPTY
R7N4
1
10 KOHM 5%
CH
2
402
R3B2
EMPTY
1210
TPS2065
OUT
OC_N
GND
IN
21
IC
IR_BLAST_SMC_OUT
5%0 OHM CH
0 OHM 5%
U3B3
5
IN
EN
X862402-001 SOT23-5
26
21
21
IC
74LVC1G07
5
VCC
4
Y
3 1
GND
X801758-001SC70
R3B3
21
5%0 OHM
EMPTY
402
U3B2
74AUP1G125
2
A
1 3
OE_N
X867692-001 SC70-5
R3C37
21
5%
0 OHM
EMPTY
402
1
V_3P3STBY_IR_FLT_N
3 24
IR_BLAST_P3_1_R
IR_BLAST_SENSOR_SIG
IR_BLAST_P3_1_IN
U3B1
2
A
NC
IC
VCC
Y
GND
R7N5
1
10 KOHM 5%
EMPTY
2
402
V_3P3STBY_IR
5 4
V_3P3STBY_IR
1
R5B1
1
10 KOHM 5%
CH
2
402
1
C7N4
1 UF 10%
6.3 V
2
X5R 402
1
C7N3
0.1 UF 10%
6.3 V
2
X5R 402
DB3B1
1 KOHM 1%
V_3P3STBY_IR
V_3P3STBY_IR
R3C12
1 KOHM 1%
EMPTY 402
R3B4
1 KOHM 1%
CH 402
C5B1
10 PF 5%
50 V
EMPTY
402
R5B29
402
1
2
V_3P3STBY_IR
21
21
1
CH
R5B19
10 KOHM 1%
402
1
R5B30
4.7 KOHM 1%
2
402
3
Q5B1
XSTR
2
U5B4
IR_BLAST_SMC_OUT_C
2
X853473-001
V_3P3STBY_IR
1
R3C39
475 OHM 1%
EMPTY
2
402
IR_BLAST_LED
1
D3C2 GREEN SM
2
EMPTY
IR BLASTER
V_5P0DUAL
V_3P3STBY_IR
1
C5B13
0.1 UF 10%
6.3 V
2
X5R 402
R5B25
21
5%0 OHM CH
402
IR_BLAST_P3_1_OUT
R5B21
402
1% CH
21
24.9 OHM
OUT
IR_BLAST_XIN
U3C6
TEST XIN
20
P3_1/REM/T0CK
19
P3_0/T0PWM/T0CAP/T1CAP/T2CAP
21
P2_0/INT5
18
P1_7
17
P1_6
16
P1_5
15
P1_4
14
P1_3
13
P1_2
12
P1_1
11
P1_0
10
P0_7/INT4
9
P0_6/INT4
8
P0_5/INT4
7
P0_4/INT4
6
P0_3/INT3
5
NRESET/P0_2_INT2
4
SCLK/P0_1/INT1
3
SDAT/P0_0/INT0
X855475-001 QFN25
74LVC1G00
B
IR_BLAST_P1_5
V_3P3STBY_IR
IR_BLAST_P0_6 IR_BLAST_P0_5
IR_BLAST_P0_7
IC
VCCA GND
J6B2
1X2HDR
SM
EMPTY
R3C38
1
10 KOHM 1%
EMPTY
2
402
5 4
IR_BLAST_OR_OUT
Y
31
SC70
1 2
RT5B1
PTC
1206
X882908-001
36
S3F80P5
21
1
C5B11
10 UF 20% 10 V
2
X5R 603
1.47 KOHM
R5B22
1
10 KOHM 1%
CH
2
402
IR_BLAST_SNUB
1
C5A2
0.01 UF 10% 50 V
2
X7R 805
R5B26
21
1% CH
402
IC
VDD
XOUT
VSS
MPAD
R5A1
1%
10 OHM
CH
805
IR_BLAST_SLEEVE
IR_BLAST_G1
Q5B2
3
XSTR
IR_BLAST_G2
1
2
V_3P3STBY_IR
222 124
23 25
1
2
IR_BLAST_XOUT
IR_BLAST_TIP
21
221 OHM
402
0.1 UF 10%
6.3 V X5R 402
R6B11
1% CH
21
4
21
5%0 OHM CH
0 OHM
603
1
2
R5A3
1
2
603
10 PF 5% 50 V EMPTY 402
R5A2
Q6B1 NPN
IR_BLAST_E1
R6B10
1
15.8 OHMS 1%
CH
2
805
21
5%
EMPTY
8 MHZ
1
2
1
C3C26C3C25
1 UF 10%
6.3 V
2
X5R 402
R7P13
1 MOHM
402
XTAL Y3C1
XTAL
2
X854881-001
SM
C5A3C5A1
10 PF 5% 50 V EMPTY 402
IR_BLAST_TIP_R
IR_BLAST_SLEEVE_R
21
5% CH
1
C6A1 C6A2
10 PF 10 PF 5% 50 V
2
EMPTY 402
R3C13
10 KOHM 1%
CH 402
31
1
2
EG5A1 X882235-001
DIO 402
2 1
5% 50 V EMPTY 402
J5A2
3
3
2
2
1
1
IR_JACK_3P
X852978-004 TH
EG6A1 X882235-001
DIO 402
2 1
CONN
MH2 MH1
CH
5 4
GREYBULL_RETAIL
CH
63/72 63/72 M 1.0
Page 64
I2C
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
26 44 65
IN
26 40 44 50 52 53 54 65 66
BI
SMBUS_CLK
SMBUS_DATA
1
FT4P1
FTP
1
FT4P3
FTP
J3E2
2X2HDR
TH
EMPTY
V_5P0STBY
R3E7 0 OHM 5%
EMPTY 402
21
I2C_2X2_HDR_VDD
43
GREYBULL_RETAIL
64/72 64/72 M 1.0
Page 65
FACET, FTDI
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
29 26 42
27 27 27 27
27
26
27
DB4E3 DB4E4
26 44 40 50 52 53 54 64 66
27
OUT
IN
OUT OUT OUT OUT
OUT
IN
IN
IN
BI
SMC_RST_N
SPI_MISO
SMC_DBG_LED0_SWO
KER_DBG_TXD
1 1
SMBUS_CLK
R4E2
100 OHM 1%
402
CH
R4E3
5%0 OHM CH
402
R4E4
402
402
1% CH
1% CH
33 OHMS
33 OHMS
R5T2
0 OHM 5%
CH
402
V_3P3STBY
21
1 UF 10%
6.3 V X5R 402
1
2
C4E2C4E1
1 UF 10%
6.3 V X5R 402
R4D1
33 OHMS 1%
402
CH
R4E1R4E5
1%33 OHMS CH
402
R5T1
5%0 OHM CH
402
21
2121
21
SB_TDO
KER_DBG_CTS
KER_DBG_RTS
SMBUS_DATA
27
OUT
27
IN
27
OUT
27
IN
1
DB4E1
1
DB4E2
26 40 44 50 52 53 54 64 66
BI
1
21
2
J4E1
2X13HDR
19
1
9
SM
EMPTY
2
SPI_MOSI
43 65 87 10
SB_TDO_FACET 1211 1413 1615 1817
KER_DBG_RTS_FACET
20
FTDI_SMC_CTS_FACET FTDI_SMC_RTS_FACET
2221 2423
SMBUS_DATA_FACET
2625
SMC_RST_N_FACET
SPI_MISO_FACET
SPI_SS_N
SPI_CLK
SB_TDI
21
SMC_DBG_LED0_SWO_FACET
KER_DBG_TXD_FACET
FTDI_SMC_TXD_FACET FTDI_SMC_RXD_FACET
SMBUS_CLK_FACET
21
SB_TMS SB_TCK
KER_DBG_RXD
GREYBULL_RETAIL
1.0M65/7265/72
Page 66
FACET, FTDI+MISC
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
1
0 OHM 5%
2
EMPTY 402
CAT24M01 I2C ADDRESSES 1010 110 R/W HEX WRITE 1010 110 0 0XAC READ 1010 110 1 0XAD
1010 111 R/W HEX WRITE 1010 111 0 0XAE READ 1010 111 1 0XAF
1
2
26 44 65
IN
R5U5R5U4
0 OHM 5%
EMPTY 402
EEPROM_A2 EEPROM_A1
SMBUS_CLK
U5F4
CAT24M01
3
A2
2
A1
6
SCL
7
WP
X868479-001 DFN9
VCC
SDA
VSS
MPAD
DEBUG
EMPTY
NC
V_3P3STBY
8
SMBUS_DATA
5 1
4 9
C5U10
0.1 UF 10%
6.3 V EMPTY
402
1
1
C5U9
1 UF
2
10%
6.3 V
2
EMPTY 402
26 40 44 50 52 53 54 64 65
BI
GREYBULL_RETAIL
66/72 66/72 M 1.0
Page 67
CONN, SWITCHES
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
J4F4
1X2HDR
1 2
TH
EMPTY
J4F5
1X2HDR
1 2
EMPTY
EJECTSW_N_SW
PWRSW_N_SW
TH
R4F21
2.49 KOHM 402
CH
R4F20
2.49 KOHM 1% 402
1%
CH
EJECTSW_N
PWRSW_N
OUT
OUT
40 26
40 26
V_5P0STBY
1
R8B18
2 KOHM 1%
EMPTY
2
402
V_5P0STBY_LED_R
1
D8B2 GREEN SM
2
EMPTY
V_12P0
1
R8B17
6.04 KOHM 1%
2
EMPTY 402
V_12P0_LED_R
1
D8B1 GREEN SM
2
EMPTY
GREYBULL_RETAIL
67/72 67/72 M 1.0
Page 68
CONN, HDT
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
X802100-002
SW4F2
EMPTY
43
21
SM
8
COLD_RESET_N
J4F2
1X2HDR
1 2
TH
EMPTY
V_SOC1P8
1
1 UF 10%
1
R5E4
1 KOHM 5%
2
CH 402
TRST_L HDT_TRST
OUT
OUT
1
C4F18
0.22 UF 10%
6.3 V
2
EMPTY 402
R5E3
0 OHM 5%
EMPTY
402
26
6.3 V
2
EMPTY 402
21
1
R5D8 R5E2
10 KOHM 5%
2
EMPTY 402
V_SOC1P8
1
2
C5T6 C5T4C5E1
0.1 UF 10%
6.3 V EMPTY 402
1
10 KOHM 5%
2
EMPTY 402
1
2
0.1 UF 10%
6.3 V EMPTY 402
HDT_PIN11 HDT_PIN13 HDT_PIN15
1
R5E1
10 KOHM 5%
2
EMPTY 402
V_SOC1P8
FT5T1
DEBUG
FT5T2
J5E1
2x10HDR_HDT
1 3 5 7
9 11 13 15 17 19
SM
EMPTY
R5E14
FTP
FTP
2
TCK
4
TMS
6
TDI
8
TDO
10
PWROK_BUF
12
RESET_L_BUF
14
DBRDY
16
DBREQ_L
18
TEST19
20
TEST18
U6E1
SN74AUP2G07
1A 2A
X865298-001 SC70-6
1 KOHM
1%
EMPTY
402
1
1
1
2
1
2
EMPTY
VCC
1Y 2Y
GND
V_SOC1P8
1
2
R5E17
1 KOHM 1%
EMPTY 402
V_SOC1P8
1
2
5 61 43 2
R5E18
1 KOHM 1%
EMPTY 402
C6E1
0.22 UF 10%
6.3 V EMPTY 402
1
2
R5E19
1 KOHM 1%
EMPTY 402
1
1
OUT OUT OUT
IN
IN OUT OUT OUT
1
2
FTP
FTP
8 8 8
8
8
8 70 8 70 8
R5E16
1 KOHM 5%
EMPTY 402
FT4T2
FT5T3
1
1
2
FT5T6
FTP
R5E15
1 KOHM 5%
EMPTY 402
X802100-002
SW4F1
EMPTY
WARM_RESET_N
43
21
SM
J4F1
1X2HDR
1 2
TH
EMPTY
V_SOC1P8
1
R3F2
47 KOHM 1%
2
EMPTY 402
1
C4F19
0.22 UF 10%
6.3 V
2
EMPTY 402
1
C6E2
0.22 UF 10%
6.3 V
2
EMPTY 402
U4F4
SN74AUP1G17
2
A
1 3
NC
X862374-001 SC70-5
EMPTY
VCC
Y
GND
IN
SOC_PWR_OK
26
V_SOC1P8
U6E2
2
74LVC1G07
A NC
5 4
EMPTY
VCC
GND
5 4
Y
SOC_RST_NWARM_RESET_N_DEBOUNCE
31
OUT
26 8
SC70X801758-001
GREYBULL_RETAIL
68/72 68/72 M 1.0
Page 69
DEBUG, VR HEADERS AND TEST POINTS
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
V_CPUCORE
EMPTY
V_VTTD
EMPTY
V_VTTC
EMPTY
V_GFXCORE
TP9F1
1
EMPTY
EMPTY EMPTY
V_3P3
EMPTY
V_3P3STBY
EMPTY
TP9C1
1
EMPTY
TP6D2
1
EMPTY
V_VTTB
EMPTY
V_VTTA
EMPTY
TP9F3
1
EMPTY
TP6E1
1
EMPTY
TP9C2
1
EMPTY
TP5F1
1
EMPTY
TP4C1
1
EMPTY
V_NBCORE
EMPTY
V_5P0
EMPTY
V_5P0STBY
EMPTY
V_MEMIOCD
EMPTY
TP6F1
1
EMPTY
TP3E3
1
EMPTY
TP4B3
1
EMPTY
TP6C1
1
V_MEMCORE
EMPTY
V_5P0DUAL
EMPTY
V_12P0
EMPTY
EMPTY
TP5E2
1
TP4B1
1
EMPTY
TP8B1
1
EMPTY
EMPTY
EMPTY
EMPTY
54
EMPTY
26 54
IN
OUT
VREG_V5P0_PWRGD
VREG_V5P0_EN
TP3E2
1
EMPTY TP3E1
1
V_MEMIOAB
EMPTY
TP9F2
1
EMPTY
EMPTY
TP4C2 TP5E1
1 1
EMPTY
EMPTY
EMPTY
50 51 57
IN
VREG_PWRGPB_PWRGD
TP4F5
1
EMPTY
EMPTY
26 50 51 57 58
OUT
VREG_PWRGPB_EN
TP4F3
1
EMPTY
EMPTY
52 53 56
IN
VREG_PWRGPA_PWRGD
TP4F1
1
EMPTY
EMPTY
26 52 53 56
OUT
VREG_PWRGPA_EN
TP4F2
1
EMPTY
EMPTY
44 45
IN
VREG_CPUGFX_PWRGD
TP7C1
1
EMPTY
V_SOCPHY
EMPTY
V_SOC1P8
EMPTY
V_SOC1P8
EMPTY
EMPTY
EMPTY
TP4F4
1
EMPTY
TP5D2
1
EMPTY
TP3F1
1
EMPTY
TP9F4TP4B2
11
EMPTY
EMPTY
V_BURN
V_FUSE
V_BAT
EMPTY
EMPTY
V_SB1P8
EMPTY
TP6D4
1
EMPTY
EMPTY
TP6D1
1
EMPTY
EMPTY
TP4D3
1
EMPTY
EMPTY
TP4D1 TP6F2 TP8B2
1 1 1
EMPTY
EMPTY
V_SB1P8
EMPTY
V_SB1P1
EMPTY
EMPTY
EMPTY
TP5C2
1
EMPTY
TP5D1
1
EMPTY
TP3D3
1
EMPTY
EMPTY
EMPTY
V_1P1STBY
EMPTY
V_1P8STBY
EMPTY
V_SB1P1
EMPTY
EMPTY
EMPTY
TP3C1
1
EMPTY
TP4D2
1
EMPTY
TP3D2
1
EMPTY
TP4E1TP5C1TP5B1
111
EMPTY
EMPTY
GREYBULL_RETAIL
69/72 69/72 M 1.0
Page 70
DEBUG, CONNECTORS
PAGE
CONFIDENTIAL
MICROSOFT
PROJECT NAME
PAGE
REV
CSA
12345678
D
A
A
B
B
C C
D
12345678
TITAN POWER CONNECTOR
V_3P3STBY
DEBUG
J3C2
1X2HDR
1 2
TH
EMPTY
V_SOCPHY
R5F31
1
510 OHM 5%
CH
2
402
R5F27
1
510 OHM 5%
CH
2
402
1
2
R5E7
1 KOHM 5%
EMPTY 402
1
2
R5E8
1 KOHM 5%
EMPTY 402
TEST19 TEST18
OUT OUT
68 8
68 8
DB4D2
63
26 26 26 26
IN
BI BI BI BI
FTDI_SMC_CTS
1
IR_BLAST_TXD
100 OHM
5% CH
402
SMC_TXD SMC_RTS SMC_CTS SMC_RXD
1
R6R9R6R8
100 OHM 5%
212
EMPTY 402
R6R11
100 OHM
5% CH
402
1
2
R6R10
1
100 OHM 5%
2
EMPTY 402
IR_BLAST_RXD
FTDI_SMC_RTS
63
OUT
1
DB4D3
2
IN
2
IN
TEST25_N TEST25_P
GREYBULL_RETAIL
70/72 1.070/72
Page 71
DEBUG, ENET EEPROM + MISC
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
32
32
IN IN IN
ENET_EESK ENET_EECS
U5B1
93LC66B
2
CLK
1
CS
X867158-001 TSSOP8
EMPTY
VCC
DODI
NC1 NC2 GND
V_3P3STBY_ENET
8
ENET_EEDOENET_EEDI
43 6
7 5
1
2
C5B3
0.1 UF 10%
6.3 V EMPTY 402
OUT
32 32
GREYBULL_RETAIL
71/72 71/72 M 1.0
Page 72
LABELS AND MOUNTING
8 1234567
12345678
D
B
C
A
B
D
C
A
REV
CONFIDENTIAL
MICROSOFT
PROJECT NAME FABCSAPAGE
PAGE
STD
MTG8D1
MTG_HOLE
GND=1,2,3,4,5,6,7,8
MTG8E1
MTG_HOLE
GND=1,2,3,4,5,6,7,8
NC9
STD
NC9
9
EMPTY
9
EMPTY
HEAT SINK MOUNTING HOLES
GND=1,2,3,4,5,6,7,8
GND=1,2,3,4,5,6,7,8
STD
MTG7E1
MTG_HOLE
NC9
EMPTY
STD
MTG7D1
MTG_HOLE
NC9
EMPTY
9
9
INTELLIGENT SERIAL NUMBER TARGET
X801181-001
LB3F1
LABEL
1
1375X250_TARGET
GREYBULL_RETAIL
72/72 72/72 M 1.0
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