The acceleration sensor is a 14-bit digital ultra-low-power and high-performance three-axis
linear accelerometer with digital output interface. It measures user selectable acceleration
range of ±2g, ±4g, ±8g, ±16g with an output data rate up to 1600 Hz. It consists of a 32
level FIFO buffer to store the output data. It is embedded with a temperature sensor for ambient temperature measurement. The sensor is capable of detecting events like free fall, tap
recognition, wake up, stationary/motion, activity/inactivity and 6D orientation. The dimension
of the sensor is 2.0 mm×2.0 mm×0.7 mm. It is available in land grid array package (LGA).
1.2 Applications
• Industrial IoT and connected devices
• Industrial tools and factory equipment
• Vibration monitoring
• Tilt/inclination measurements
• Impact recognition and logging
1.3 Sensor features
•Selectable full scale:
•Output data rate:
•Bandwidth:
•Operating modes:
•Noise density:
•Current consumption:
•FIFO:
•Communication interface:
•Motion detection functionality:
•Embedded temperature sensor
±2g, ±4g, ±8g, ±16g
Up to 1600 Hz
400 Hz
High performance, normal, low power
90 µg /√Hz
High performance mode: 155µA
The sensor is a MEMS based capacitive acceleration sensor with an integrated ASIC. The
MEMS element is capable of measuring both dynamic acceleration due to motion or vibration and also static acceleration due to gravity. The sensor measures the acceleration or
vibration through MEMS capacitive sensing principle. The MEMS element consists of a
fixed structure and movable structure. The movable structure is free to move in the direction
of acceleration applied i.e. X, Y and Z direction. The force induced on the MEMS element
produces change in the capacitance value that is proportional to the force exerted on it.
Without any force on the sensor the capacitors will have a nominal capacitance value in the
range of picofarad (pF). When an acceleration is applied, the change in the capacitance
value is induced in the range of femtofarad (fF). The induced analog signal is converted to
digital form using an analog to digital converter followed by filters and controller logic blocks.
The final acceleration data from the output register can be accessed through an I2C or SPI
digital communication interface using host processor.
1.5 Ordering information
Figure 1: Block diagram
WE order codeTemperature RangeDescription
2533020201601-40° C to +85° CTape & reel packaging
Minimum and maximum values are based on characterization at 3σ.
Supply voltage on any pin should never exceed 4.8 V
2.5 General information
1
Max.
DD_IO
1
Unit
+ 0.3V
3000g
ParametersValues
Operating temperature-40°C to +85°C
Storage temperature-40°C to +125°C
Communication interfaceI2C & SPI
Moisture sensitivity level (MSL)3
Electrostatic discharge protection(HBM)2 kV
Table 7: General information
The device is susceptible to damage by electrostatic discharge (ESD). Always
use proper ESD precautions when handling. Improper handling of the device
can cause performance degradation or permanent damage to the part
1SCLI2C /SPI serial clockInput
2CSI2C enable/disable, SPI chip selectInput
3SAO
I2C device address selection, SPI
serial data output
Input/Output
4SDAI2C serial data, SPI serial data inputInput/Output
5NCNo connection6GNDNegative supply voltageSupply
7RSVDReserved, connect to GNDInput
8GNDNegative supply voltageSupply
9VDDPositive supply voltageSupply
10VDD_IOPositive supply voltage for I/O pinsSupply
11INT_1Interrupt pin 1Input/Output
12INT_0Interrupt pin 0Output
A positive supply voltage is applied to the sensor through VDD pin and I/O supply voltage for
digital interface through VDD_IO. The decoupling capacitor of 100 nF and 10µF in parallel
is highly recommended and should be placed as close as possible to the VDD pin. Communication is still possible, even if the supply voltage to theVDD pin is removed but maintaining
the VDD_IO. In this case, measurement chain of the sensor is not active.
The CS pin shall be connected to SS (slave select) pin on the controller side to enable SPI
communication interface. The CS pin shall be connected to VDD_IO in order to enable the
I2C communication interface. It is possible to have two I2C slave addresses by connecting
SAO pin either to VDD_IO or GND. In the above connection the SAO pin is connected to
VDD_IO. Rpare the recommended pull up resistors for I2C communication interface which
should be connected parallel between I/O supply voltage VDD_IO and SCL and SDA pins.
The SAO and CS pins are internally pulled up. The internal pull up resistor values of SAO
and CS pins for different supply voltage of the I/O pins are given below in table 9.
VDD_IOResistor value of SAO and CS (Typ.)
1.7V54.4 KΩ
1.8V49.2 KΩ
2.5V30.4 KΩ
3.6V20.4 KΩ
Table 9: Internal pull up values (typ) for SAO and CS pins
The acceleration sensor supports standard I2C (Inter-IC) bus protocol. Further information
of the I2C interface can be found at https://www.nxp.com/docs/en/user-guide/UM10204.pdf.
I2C is a serial 8-bit protocol with two-wire interface which supports communication between
different ICs. For example, between the microcontroller and other peripheral devices.
5.1 General characteristics
A serial data line (SDA) and a serial clock line (SCL) are required for the communication
between the devices connected via I2C bus. Both SDA and SCL lines are bidirectional. The
output stages of devices connected to the bus must have an open-drain or open-collector.
Hence, the SDA and SCL lines are connected to a positive supply voltage via pull-up resistors. In I2C protocol, the communication is realized through master-slave principle. The
master device generates the clock pulse, a start command and a stop command for the data
transfer. Each connected device on the bus is addressable via a unique address. Master
and slave can act as a transmitter or a receiver depending upon whether the data needs to
be transmitted or received.
The sensor behaves like a slave device on the I2C bus
The positive supply voltage to which SDA and SCL lines are pulled up (through pull-up
resistors), in turn determines the high level input for the slave devices. The sensor has
separate supply voltage VDD_IO for the SDA and SCL lines. The logic high ’1’ and logic low
’0’ levels for the SDA and SCL lines then depend on the VDD_IO. Input reference levels for
the acceleration sensor are set as 0.8 * VDD_IO (for logic high) and 0.2 * VDD_IO (for logic
low). See in figure 5.
Figure 5: SDA and SCL logic levels
5.3 Communication phase
5.3.1 Idle state
During the idle state, the bus is free and both SDA and SCL lines are in logic high ’1’ state.
5.3.2 START(S) and STOP(P) condition
Data transfer on the bus starts with a START command, which is generated by the master.
A start condition is defined as a high-to-low transition on the SDA line while the SCL line is
held high. The bus is considered busy after the start condition.
Data transfer on the bus is terminated with a STOP command, which is also generated by
the master. A low-to-high transition on the SDA line, while the SCL line being high is defined
as a STOP condition. After the stop condition, the bus is again considered free and is in idle
state. Figure 6 shows the I2C bus START and STOP conditions.
Master can also send a REPEATED START (SR) command instead of STOP command.
REPEATED START condition is same as the START condition.
After the start condition, one data bit is transmitted with each clock pulse. The transmitted
data is only valid when the SDA line data is stable (high or low) during the high period of the
clock pulse. High or low state of the data line can only change when the clock pulse is in low
state.
Figure 6: Data validity, START and STOP condition
5.3.4 Byte format
Data transmission on the SDA line is always done in bytes, with each byte being 8-bits long.
Data is transmitted with the most significant bit (MSB) followed by other bits.
If the slave cannot receive or transmit another complete byte of data, it can force the master
into a wait state by holding SCL LOW. Data transfer continues when the slave is ready which
is indicated by releasing the SCL pin.
5.3.5 Acknowledge(ACK) and No-Acknowledge(NAACK)
Each byte transmitted on the data line must follow an Acknowledge bit. The receiver (master or slave) generates an Acknowledge signal to indicate that the data byte was received
successfully and ready to receive next data byte.
After one byte is transmitted, the master generates an additional Acknowledge clock pulse
to continue the data transfer. The transmitter releases the SDA line during this clock pulse
so that the receiver can pull the SDA line to low state in such a way that the SDA line
remains stable low during the entire high period of the clock pulse. It is considered as an
Acknowledge signal.
If the receiver does not want to receive any further byte, it will not pull down the SDA line
and it remains in stable high state during the entire clock pulse. It is considered as a NoAcknowledge signal and the master can generate either a stop condition to terminate the
data transfer or a repeated start condition to initiate a new data transfer.
The slave address is transmitted after sending the start condition. Each device on the I2C
bus has a unique address. Master selects the slave by sending corresponding slave address
after the start condition. A slave address is a 7 bits long followed by a Read/Write bit.
Figure 7: Slave address format
The 7-bit slave address of the acceleration sensor is 001100xb. LSB of the 7-bit slave
address can be modified with the SAO pin. If SAO is connected to positive supply voltage
i.e. LSB is ’1’, making 7-bit slave address 0011001b (0x19). If SAO is connected to ground
i.e. LSB is ’0’, making 7-bit address 0011000b (0x18).
The R/W bit determines the data direction. A ’0’ indicates a write operation (transmission
from master to slave) and a ’1’ indicates a read operation (data request from slave).
Once the slave-address and data direction bit is transmitted, the slave acknowledges the
master. The next byte is transmitted by the master, which must be a register-address of the
sensor. It indicates the address of the register where data needs to be written to or read
from.
After receiving the register address, the slave sends an Acknowledgement (ACK). If the
master is still writing to the slave (R/W bit = 0), it will transmit the data to slave in the same
direction. If the master wants to read from the addressed register (R/W bit =1), a repeated
start (SR) condition must be transmitted to the slave. Master acknowledges the slave after
receiving each data byte. If the master no longer wants to receive further data from the slave,
it would send No-Acknowledge (NACK). Afterwards, master can send a STOP condition to
terminate the data transfer. Figure 9 shows the writing and reading procedures between the
master and the slave device (sensor).
5.4 I2C timing parameters
Standard modeFast mode
ParameterSymbol
MinMaxMinMax
Unit
SCL clock frequencyf
LOW period for SCL clockt
HIGH period for SCL clockt
Serial Peripheral Interface (SPI) is a synchronous serial communication bus system for the
communication between host microcontroller and other peripheral ICs such as ADCs, EEPROMs, sensors, etc. SPI is a full-duplex master-slave based interface allowing the communication to happen in both directions simultaneously. The data from the master or the slave
is synchronized either on the rising or falling edge of clock pulse. SPI can be either 4-wire or
3-wire interface. 4-wire interface consists of two signal lines and two data lines. All of these
bus lines are unidirectional.
1. Clock (SCL)
2. Chip select (CS)
3. Master out, slave in (MOSI)
4. Master in, slave out (MISO)
Figure 10: SPI Interface
Master generates the clock signal and is connected to all slave devices. Data transmission
between the master and salves is synchronized to the clock signal generated by the master.
One master can be connected to one or more slave devices. Each slave device is addressed
and controlled by the master via individual chip select (CS) signals. CS is controlled by the
master and is normally an active low signal.
MOSI and MISO are data lines. MOSI transmits data from the master to the slave. MISO
transmits data from the slave to the master.
The acceleration sensor supports 4-wire SPI communication protocol
Communication begins when the master selects a slave device by pulling the CS line to
LOW. The clock and data lines (MOSI/MISO) are available for the selected slave device.
Data stored in the specific shift registers are exchanged synchronously between master and
the slave through MISO and MOSI lines. The data transmission is over when the chip select
line is pulled up to the HIGH state. 4-wire SPI uses both data lines for the synchronous data
exchange in both the direction. 3-wire SPI shares a single data line for the data transfer,
where the master and slave alternate their transmitter and receiver roles synchronously.
6.2 Communication modes
In SPI, the master can select the clock polarity (CPOL) and clock phase (CPHA). The CPOL
bit sets the polarity of the clock signal during the idle state. The CPHA bit selects the clock
phase. Depending on the CPHA bit, the rising or falling clock edge is used to sample and
shift the data. Depending on the CPOL and CPHA bit selection in the SPI control registers,
four SPI modes are available as per table12. In order to ensure proper communication,
master and the slave must be set to same communication modes.
CPOLCPHADescription
00Clock polarity LOW in idle state; Data sampled on the rising clock edge
01Clock polarity LOW in idle state; Data sampled on the falling clock edge
11Clock polarity HIGH in idle state; Data sampled on the falling clock edge
10Clock polarity HIGH in idle state; Data sampled on the rising clock edge
4-Wire SPI of this sensor uses following lines: SDA (data input, MOSI), SAO (data output,
MISO), SCL (serial clock) and CS (chip select). For more information, please refer to pin
description in the section 3.
CS is pulled LOW by the master at the start of communication. The SCL polarity is HIGH in
the idle state (CPOL = 1). The data lines (SDA & SAO) are sampled at the falling clock edge
and latched at the rising clock edge (CPHA = 1). Data is transmitted with MSB first and the
LSB last.
SPI read and write operations are completed in 2 or more bytes (multiple of 16 or more clock
pulses). Each block consists of a register address byte and a data byte. The first byte is the
register address. In the SPI communication, the register address is specified in the 7-bits
and the MSB of the register address is used as an SPI read/write bit (Figure11). When R/W
is ’0’, the data is written on to the sensor. When ’1’, the data is read from the sensor.
Figure 11: SPI register address
The next bytes of data, depending on the R/W bit, is either written to or read from the indexed
register. Figure12shows the complete SPI data transfer protocol.
Figure 12: 4-wire SPI data transfer (CPOL = 1, CPHA = 1)
The write operation starts with the CS = LOW and sending the 7-bit register address with
R/W bit = ’0’ (write command). Next byte is the data byte that is the data to be written to the
indexed register. Several write command pairs can be sent without raising the CS back to
HIGH. The operation is ended with CS = HIGH. The SPI write protocol is shown in the figure
13
.
Figure 13: SPI write protocol
6.3.2 SPI read operation
The read operation starts with the CS = LOW and sending the 7-bit register address with
R/W bit = ’1’ (read command). Data is sent out from the sensor through the SAO line. The
SPI read protocol is shown in the figure14.
Figure 14: SPI read protocol
During multiple read/write operation, the register address is automatically incremented after each block. This feature is enabled by default with the bit
IF_ADD_INC set to ’1’ in the CTRL_2 register.
Sensitivity is defined as the ratio of change in input acceleration to the change in the output signal. The unit of sensitivity is typically expressed in mg/digit. It can be measured
by pointing the sensor horizontally downwards, an acceleration of 1g is measured due to
earth’s gravity (9.807 m/s2). Similarly by pointing sensor horizontally upwards (rotation of
180 degree), again an acceleration of 1g is measured due to earth’s gravity (9.807 m/s2). By
subtracting the larger measured output value from the smaller measured output value and
dividing by two gives the actual sensitivity of the acceleration sensor.
The sensitivity value will drift over time and temperature.
Sensitivity =
larger value - smaller value
(1)
2
7.2 0 g Level offset
0 g level is the output level when there is no acceleration or motion acting on the sensor i.e.
zero input. A sensor placed on a perfect horizontal plane will give 0 g output on X-axis and
Y-axis but 1 g on Z-axis. The deviation of an actual output value from the ideal value gives
the 0 g level offset. 0 g offset value is influenced by external parameters like temperature
and stress. External stress on the sensor will affect the sensor performance significantly.
The 0 g level offset will also drift over temperature.
External stress: Vias under the sensor on a PCB, PCB warpage, external
mechanical stress to the sensor.
7.3 Noise density
Noise density of the sensor is expressed as µg /√Hz. Noise density of the acceleration
sensor is dependent on the output data rate. The values are expressed in the chapter9.
The noise of the acceleration sensor is determined by the equivalent noise bandwidth of the
output filter and coefficient of the filter order. In general, the noise density is determined by
the equation:
This chapter describes the start up sequence of the acceleration sensor.
8.1 Power supply
The sensor has two individual supply voltage pins.
• VDD is main supply voltage
• VDD_IO is the I/O pin supply voltage for the digital I2C or SPI communication interface
It should be noted that VDD level should never be lower than VDD_IO i.e. proper power up
should be VDD > VDD_IO. It is possible to remove VDD by keeping VDD_IO pin without
communication interruption but the measurement chain of the sensor is turned off i.e. VDD
= 0 with VDD_IO "high" is allowed. In this case, the measurement chain is turned off but the
communication to the sensor is possible without interruption.
Power up sequence should be VDD > VDD_IO .
8.2 Boot status
By proper powering up of the sensor with correct voltage level to the respective pins, the
sensor enters into a 20 ms boot sequence to load the trimming parameters. After completion of the boot up sequence the sensor automatically enters to power down mode.
It is also possible to initiate the boot sequence manually by the user. It is performed by
setting the BOOT bit of the CTRL_2 register to ’1’, then the boot sequence is initiated and
trimming parameters are reloaded. In this case, the device operation mode does not change
after boot procedure. No toggle of the power is required and the content of the device control
registers is not modified.
During the 20ms boot sequence the registers are not accessible.
The boot status signal is identified by setting the INT1_BOOT bit of the CTRL_5 register
to ’1’. When the sensor is in boot sequence, INT_1 interrupt pin is driven high. Similarly
when the boot sequence is completed, INT_0 interrupt pin is driven low.
If required, the soft reset of the sensor is possible. It resets the default value of the control
registers. The soft reset procedure will take 5 µs.
The below steps should be considered for setting the BOOT bit manually:
1. Write SOFT_RESET bit to ’1’
2. Wait for 5 µs
3. Write BOOT bit to ’1’
4. Wait for 20 ms
ParameterTime
Boot sequence20 ms
Soft reset duration5 µs
Table 14: Time consumption
8.3 Flow chart
8.3.1 Communication check
After proper powering of the sensor, the first step is to check the communication of the
sensor with an I2C or SPI communication interface. It can be verified by reading the value
of DEVICE_ID register(0x0F). If the value from the DEVICE_ID register(0x0F) is 0x44, then
the communication to the sensor is successful.