Wistron HM72-DN, JE70-DN, SJV71-DN, Aspire 7541, Aspire 7541G Schematic

5

4

3

2

1

-('16-9'1+0'1%ORFN

-('16-9'1+0'1%ORFN-('16-9'1+0'1%ORFN

Project code: 91.4HP01.001 PCB P/N : 48.4HP01.011

'LDJUDP

'LDJUDP'LDJUDP

DDR3

D D

DIMM1

DDR3

800/1066/1333 MHz

DIMM2 & DIMM3

CLK GEN.

ICS9LPRS480BKLFT 71.09480.A03 RTM880N-796-VB-GRT 71.00880.A03

C C

B B

A A

INT MIC

30

MIC In

30

Line Out

30

INT.SPKR

30

5

3

800/1066/1333MHz

16

800/1066/1333MHz

17

Codec

ALC272

28

OP AMP

29

HDD SATA

ODD SATA

AZALIA

AMD Champlain CPU S1G4 (45W)

638-Pin uFCPGA638

4,5,6,7

OUT

North Bridge

AMD RS880M

CPU I/F INTEGRATED GRAHPICS

LVDS, CRT I/F

21*21*1.84mm

8,9,10

South Bridge

AMD SB820

USB 2.0/1.1 ports

(10/100/1000Mb)ETHERNET

High Definition Audio

ATA 66/100

ACPI 1.1 LPC I/F

PCI/PCI BRIDGE

23*23*1.92mm

11,12,13,14,15

SATA

22

SATA

HT 3.0

16X16

IN

A-Link 4X1

USB

16X

PCI EXPRESS GRAPHIC

PCIex1

CardReader AU6437

USB 2 Port

LPC BUS

25

Giga LAN

BCM57780

Mini Card

WLAN

Mini Card

KBC

Novoton

NPCE781B

Touch Pad

38 36

MS/MS Pro/xD /MMC/SD

5 in 1

Daughter Boar d USB Board

CRT

LCD

HDMI

LAN

36

INT. KB

23

Blue Tooth Camera

24

19

USB 1 Port

4

25

3

REVISION : 09929-1

TOP

20

19

21

Madison & Park

ATI

52,53,54,55,56

TXFM RJ45

26

33

BIOS

MXIC MX25L1605

3232

27 27

LPC

37 37

DEBUG CONN.

Daughter Boar d Power Board(09744-1)

Daughter Boar d Power Board(09741-1)

Daughter Boar d Power Board(09742-1)

2

VCC

S

GND

BOTTOM

DDR3 VRAM

57, 58, 59, 60

JE70-DN

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

PCB STACKUP

BLOCK DIAGRAM

JE70-DN

SYSTEM DC/DC

RT8223

INPUTS

DCBATOUT

OUTPUTS

5V_S5(5A)

3D3V_S5(5A)

SYSTEM DC/DC

RT8209E

INPUTS OUTPUTS

DCBATOUT 1D5V_S3

SYSTEM DC/DC

RT8015A

INPUTS OUTPUTS

DCBATOUT 1D8V_S0

RT9025

5V_S5

RT9161

3D3V_S0 2D5V_S0

RT9025

3D3V_S0 1V_VGA

RT9025,RT8209E

3D3V_S5 1D1V_S5

5V_S5 1D1V_S0

CHARGER

DCBATOUT

CPU DC/DC

INPUTS

DCBATOUT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

1D05V_S0

(200mA)

(1.2A)

BQ24745

OUTPUTSINPUTS

CHG_PWR

18V 6.0A

UP+5V

5V 100mA

ISL6265HR

OUTPUTS

VCC_CORE_S0_0

0~1.55V 18A

VCC_CORE_S0_1

0~1.55V 18A

VDDNB

0~1.55V 18A

of

163Wednesday, March 31, 2010

45

46

47

48

47

49

44

SB

5

page9

STRAP_DEBUG_BUS_GPIO_ENABLEb

D D

Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#) 1 :Disable 0 : Enable

*

RS780: Enables Side port memory ( RS880 use HSYNC#)

1 :Disable 0 : Enable

*

SUS_STAT#

Selects Loading of STRAPS From EEPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values

*

0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

page15

C C

PULL HIGH

PULL LOW

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

PCI_AD25 PCI_AD24

USE FC PLL

DEFAULT

BYPASS FC PLL

Note: SB820 has 15K internal P U FOR P CI_AD[27:23]

4

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULT

ENABLE PCI MEM BOOT

page36

3

2

EC Functional Strap Definitions

Signal Comment

TEST#

pin110

XORTR#

pin111

TRIST#

pin112

JEN0#, JENK#

pin49,53

SHBM

pin83

SDP_VIS#

pin41

XOR_OUT XOR-Tree Output. The device pins are internally connected in a XOR-tree structure

pin35

Test Mode Select. Sampled at VCC Power-Up reset or VCC_POR Input reset, to determine the device operation mode as follows:

No pull-down resistor: Normal operation mode (XORTR and TRIST strap pins are ignored).

10 Kȍ external pull-down resistor:Test mode (ICT or XOR-Tree Test mode, according to XORTR and TRIST strap pins).

XOR-Tree Mode Select. Sampled at VCC Power-Up reset or VCC_POR Input reset, to select the XOR-Tree Test mode, if TEST is strapped low:

No pull-down resistor: Not allowed if TEST pin is strapped low.

10 Kȍ external pull-down resistor:XOR-Tree Test mode .Note: TRIST strap pin must be left unconnected.

ICT Mode Select. Sampled at VCC Power-Up reset or VCC_POR Input reset, to select the ICT Test mode, if TEST is strapped low:

No pull-down resistor: Not allowed if TEST pin is strapped low.

10 Kȍ external pull-down resistor:ICT Test mode (see Section 3.4.1 on page

53), forces the device to float its output and I/O pins.Note: XORTR strap pin must be left unconnected.

JTAG Select. Sampled at VCC Power-Up reset or VCC_POR Input reset, to select the JTAG signals to device pins (see Table 4 on page 35 for details).

Both JEN0 and JENK, are pulled to 1 by an internal resistor

The external 10 Kȍ pull-down resistor must be connected to GND.

Shared Host BIOS Memory. Sampled at VCC Power-Up reset or VCC_POR Input reset, to determine the state of the shared BIOS memory.

No pull-down resistor:Disable the shared BIOS memory.

10 Kȍ external pull-down resistor:Enable the shared BIOS memory

Port80 (SDP) Visibility Mode Select. Sampled at VCC Power-Up reset or VCC_POR Input reset, to select the Visibility mode for the Port80 (SDP).

No pull-down resistor: SDP in Normal mode

10 Kȍ external pull-down resistor:SDP in Visibility mode.

1

page15

PCI_CLK1 PCI_CLK2

B B

PULL HIGH

PULL LOW

ALLOW PCIE Gen2

DEFAULT

FORCE PCIE Gen1

Watchdog Timer Enabled

Watchdog Timer Disabled

DEFAULT

PCI_CLK3

USE DEBUG STRAP

IGNORE DEBUG STRAP

DEFAULT

PCI_CLK4

non_Fusion CLOCK MODE

DEFAULT

FUSION CLOCK MODE

LPC_CLK0

EC ENABLED

EC DISABLED

DEFAULT

LPC_CLK1

CLKGEN ENABLED

DEFAULT

CLKGEN DISABLED

AZ_SDOUT

LOW POWER MODE

PERFORMANCE MODE

DEFAULT

GPIO200

H,H = Reserved

H,L = SPI ROM

L,H = LPC ROM (Default)

L,L = FWH ROM

GPIO199

NOTE: SB820 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK

A A

5

4

3

page12

OCP3#

OCP2#

OCP0#

USB

Pair

Device

12 MINI2 CARD

11

NC

10

9

CCD

8

NC

7 Bluetooth

6

USB3

5

USB2

4

CardReader

3

NC

2

USB4

1

MINI1 CARD

USB10

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

A3

Reference

JE70-DN

Taipei Hsien 221, Taiwan, R.O.C.

of

263Thursday, November 19, 2009

1

SB

5

4

3

2

1

3D3V_S0 3D3V_CLK_VDD

R556

1 2

0R0603-PAD

12

C808

C809

SC10U10V5ZY-1GP

DY

12

C519

SCD1U10V2KX-4GP

12

C825

C814

SCD1U10V2KX-4GP

DY

12

C817

SCD1U10V2KX-4GP

12

C512

C812

SCD1U10V2KX-4GP

12

C517

SCD1U10V2KX-4GP

3D3V_S0

R603

1 2

2R3J-GP

12

DY

3D3V_48MPWR_S0

12

C840

C838

C838 SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC4D7U6D3V3KX-GP

3000mA.80ohm

D D

DY

1D1V_CLK_VDDIO3D3V_S0

SC12P50V2JN-L1-GP

R591

R565

1 2

0R0603-PAD

C C

SB A-Link

LAN

NB A-Link

MINI1

MINI2

CLK_27M_VGA53

B B

CLK_PCIE_SB#11

CLK_PCIE_LAN26

CLK_PCIE_LAN#26

CLK_NB_GPPSB#9

CLK_PCIE_MINI133

CLK_PCIE_MINI1#33

CLK_PCIE_MINI233

CLK_PCIE_MINI2#33

CLK_PCIE_SB11

CLK_NB_GPPSB9

OSC_SPREAD53

1K2R2F-1-GP

12

C816

SC10U6D3V3MX-GP

DY

12

R615

DY

12

C820

C518

SC10U6D3V3MX-GP

3D3V_CLK_VDD

JTAG_TCK53

CLK_NBHT_CLK9 CLK_NBHT_CLK#9

12

C813

C516

SCD1U10V2KX-4GP

R608 0R0402-PADR608 0R0402-PAD

SCD1U10V2KX-4GP

R303

1 2

0R0603-PAD

SC1U10V2KX-1GP

1 2

DY

R606

1 2

0R2J-2-GP

NB HT

3D3V_S5

3D3V_S0

DY

10KR2J-3-GP

A A

10KR2J-3-GP

R308

R307

DY

10KR2J-3-GP

1 2

10KR2J-3-GP

1 2

R302

R306

10KR2J-3-GP

1 2

DY

10KR2J-3-GP

1 2

5

R587

R582

1 2

REF0 REF1 REF2

12

C515

C815

SCD1U10V2KX-4GP

12

C826

CLK_SRC0T_LPRS

R60722R2J-2-GP

12

ATI_ES

R579 0R0402-PADR579 0R0402-PAD R577 0R0402-PADR577 0R0402-PAD

3D3V_S0

CLK_SRC0C_LPRS

1026 add R904

1 2 1 2

RN77

8 7 6

SRN10KJ-6-GP

SEL_27 REF2

SEL_SATA REF1

SEL_HTT66 REF0

CPU_CLK(200MHz)

3D3V_CLK_VDD

1D1V_CLK_VDDIO

VDD_REF

3D3V_48MPWR_S0

CLK_NBHT_CLK_1 CLK_NBHT_CLK#_1

PD#

1 2

WLAN_CLKREQ#

3

RUNPWROK_D

45

27MHz non-sprea ding singled clock on pin 5

1*

and 27MHz spread clock on pin 6 100MHz differ ential spreading SRC clock

0 1

100MHz non-spreading differential SATA clock

*0

100MHz differ ential spreading SRC clock

66MHz 3.3V single ended HTT clock

1 0 * 100MHz differential HTT clock

4

26 25

48 47

16 17 11

35 34

40

4 55 56 63

PD#

51

22 21 20 19 15 14 13 12

9

8 41

6

5

37 36 32 31

54 53

RUNPWROK_D 41

U75

VDDATIG VDDATIG_IO

VDDCPU VDDCPU_IO

VDDSRC VDDSRC_IO VDDSRC_IO

VDDSB_SRC VDDSB_SRC_IO

VDDSATA VDD VDDHTT VDDREF VDD48

PD#

SRC0T_LPRS SRC0C_LPRS SRC1T_LPRS SRC1C_LPRS SRC2T_LPRS SRC2C_LPRS SRC3T_LPRS SRC3C_LPRS SRC4T_LPRS SRC4C_LPRS SRC6T/SATAT_LPRS42GNDSATA SRC6C/SATAC_LPRS SRC7T_LPRS/27MHZ_SS SRC7C_LPRS/27MHZ_NS

SB_SRC0T_LPRS SB_SRC0C_LPRS SB_SRC1T_LPRS SB_SRC1C_LPRS

HTT0T_LPRS/66M HTT0C_LPRS/66M

ICS9LPRS480BKLFT-GP

71.09480.A03

2ND = 71.00880.A03

ATIG0T_LPRS ATIG0C_LPRS ATIG1T_LPRS ATIG1C_LPRS

CPUKG0T_LPRS CPUKG0C_LPRS

REF0/SEL_HTT66

REF1/SEL_SATA

REF2/SEL_27

3D3V_S0

SMBCLK SMBDAT

CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

48MHZ_0

GNDATIG

GNDHTT GNDREF GNDCPU

GND48

GNDSRC GNDSRC

GNDSB_SRC

R572

10KR2J-3-GP

GND

X1 X2

12

61 62

2 3

30 29 28 27

23 45 44 39 38

50 49

64

59 58 57

43 24 7 52 60 46 1

10 18

33 65

MIN2_CLKREQ#LAN_CLKREQ#

GEN_XTAL_IN

GEN_XTAL_OUT

CLKREQ0# LAN_CLKREQ# CLKREQ2# WLAN_CLKREQ# MIN2_CLKREQ#

CLK_48

REF0 REF1 REF2

3

R591

1 2

DY

10MR2J-L-GP

TP168 TPAD14-GPTP168 TPAD14-GP

LAN_CLKREQ# 26

TP166 TPAD14-GPTP166 TPAD14-GP

WLAN_CLKREQ# 33 MIN2_CLKREQ# 33

R602 22R2J-2-GPR602 22R2J-2-GP

1 2

REF1

REF0

SC12P50V2JN-L1-GP

82.30005.A51

X-14D31818M-50GP

1105 modify R229

R301

1 2

33R2F-3-GP

DY

R299

12

75R2F-2-GP

DY

R310

12

158R2F-GP

R309

12

90D9R2F-1-GP

OSC_14M_NB

1.1V 158R/90.9RRS880M

C830

1 2

12

X7

C833

1 2

SMBC0_SB 12,16,17 SMBD0_SB 12,16,17

CLK_PCIE_PEG 52

CLK_PCIE_PEG# 52

CLK_NB_GFX 9

CLK_NB_GFX# 9

CPU_CLK 6 CPU_CLK# 6

12

EC59

SC22P50V2JN-4GP

DY

CLK_NB_14M 9

SC12P50V2JN-L1-GP

CLK48_USB 12

CLK_SB_14M 11,12

2

CLK_PCIE_PEG CLK_PCIE_PEG#

CLK_NB_GFX CLK_NB_GFX#

CLK_PCIE_SB CLK_PCIE_SB#

CLK_PCIE_LAN CLK_PCIE_LAN#

CLK_NB_GPPSB CLK_NB_GPPSB#

CLK_PCIE_MINI1 CLK_PCIE_MINI1#

CLK_PCIE_MINI2 CLK_PCIE_MINI2#

CPU_CLK CPU_CLK#

CLK_NBHT_CLK CLK_NBHT_CLK#

CLK_27M_VGA

SB_1224 EMI

JE70-DN

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

1 2

EC62 SC22P50V2JN-4GP

DY

1 2

EC63 SC22P50V2JN-4GP

DY

1 2

EC65 SC22P50V2JN-4GP

DY

1 2

EC64 SC22P50V2JN-4GP

DY

1 2

EC69 SC22P50V2JN-4GP

DY

1 2

EC68 SC22P50V2JN-4GP

DY

1 2

EC67 SC22P50V2JN-4GP

DY

1 2

EC66 SC22P50V2JN-4GP

DY

1 2

EC71 SC22P50V2JN-4GP

DY

1 2

EC70 SC22P50V2JN-4GP

DY

1 2

EC73 SC22P50V2JN-4GP

DY

1 2

EC72 SC22P50V2JN-4GP

DY

1 2

EC76 SC22P50V2JN-4GP

DY

1 2

EC77 SC22P50V2JN-4GP

DY

1 2

EC75 SC22P50V2JN-4GP

DY

1 2

EC74 SC22P50V2JN-4GP

DY

1 2

EC79 SC22P50V2JN-4GP

DY

1 2

EC78 SC22P50V2JN-4GP

DY

1 2

EC80 SC22P50V2JN-4GP

DY

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF

CLKGEN_ICS9LPRS480

RS880

100M DIFF 100M DIFF 14M SE (1.1V) vref

100M DIFF(IN/OUT) *

NC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

1

363Monday, March 01, 2010

SB

of

SB

5

D D

1D1V_S0

Place close to socket

C271

12

C280

C271

12

C281

SCD22U6D3V2KX-1GP

SC10U6D3V3MX-GP

12

C261

SC10U6D3V3MX-GP

C C

B B

12

C284

SCD22U6D3V2KX-1GP

4

12

C274

SC180P50V2JN-1GP

DY

HT_NB_CPU_CAD_H08 HT_NB_CPU_CAD_L08 HT_NB_CPU_CAD_H18 HT_NB_CPU_CAD_L18 HT_NB_CPU_CAD_H28 HT_NB_CPU_CAD_L28 HT_NB_CPU_CAD_H38 HT_NB_CPU_CAD_L38 HT_NB_CPU_CAD_H48 HT_NB_CPU_CAD_L48 HT_NB_CPU_CAD_H58 HT_NB_CPU_CAD_L58 HT_NB_CPU_CAD_H68 HT_NB_CPU_CAD_L68 HT_NB_CPU_CAD_H78 HT_NB_CPU_CAD_L78 HT_NB_CPU_CAD_H88 HT_NB_CPU_CAD_L88 HT_NB_CPU_CAD_H98 HT_NB_CPU_CAD_L98 HT_NB_CPU_CAD_H108 HT_NB_CPU_CAD_L108 HT_NB_CPU_CAD_H118 HT_NB_CPU_CAD_L118 HT_NB_CPU_CAD_H128 HT_NB_CPU_CAD_L128 HT_NB_CPU_CAD_H138 HT_NB_CPU_CAD_L138 HT_NB_CPU_CAD_H148 HT_NB_CPU_CAD_L148 HT_NB_CPU_CAD_H158 HT_NB_CPU_CAD_L158

HT_NB_CPU_CLK_H08 HT_NB_CPU_CLK_L08 HT_NB_CPU_CLK_H18 HT_NB_CPU_CLK_L18

HT_NB_CPU_CTL_H08 HT_NB_CPU_CTL_L08 HT_NB_CPU_CTL_H18 HT_NB_CPU_CTL_L18

12

C255

SC180P50V2JN-1GP

DY

3

2

1

1.5A

12

DY

ACPU1A

D1

VLDT_A0

D2

VLDT_A1

D3

VLDT_A2

D4

VLDT_A3

E3

L0_CADIN_H0

E2

L0_CADIN_L0

E1

L0_CADIN_H1

F1

L0_CADIN_L1

G3

L0_CADIN_H2

G2

L0_CADIN_L2

G1

L0_CADIN_H3

H1

L0_CADIN_L3

J1

L0_CADIN_H4

K1

L0_CADIN_L4

L3

L0_CADIN_H5

L2

L0_CADIN_L5

L1

L0_CADIN_H6

M1

L0_CADIN_L6

N3

L0_CADIN_H7

N2

L0_CADIN_L7

E5

L0_CADIN_H8

F5

L0_CADIN_L8

F3

L0_CADIN_H9

F4

L0_CADIN_L9

G5

L0_CADIN_H10

H5

L0_CADIN_L10

H3

L0_CADIN_H11

H4

L0_CADIN_L11

K3

L0_CADIN_H12

K4

L0_CADIN_L12

L5

L0_CADIN_H13

M5

L0_CADIN_L13

M3

L0_CADIN_H14

M4

L0_CADIN_L14

N5

L0_CADIN_H15

P5

L0_CADIN_L15

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

SKT-CPU638P,DANUB

62.10055.111

HT LINK

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

HT_CPU_NB_CAD_H0 8 HT_CPU_NB_CAD_L0 8 HT_CPU_NB_CAD_H1 8 HT_CPU_NB_CAD_L1 8 HT_CPU_NB_CAD_H2 8 HT_CPU_NB_CAD_L2 8 HT_CPU_NB_CAD_H3 8 HT_CPU_NB_CAD_L3 8 HT_CPU_NB_CAD_H4 8 HT_CPU_NB_CAD_L4 8 HT_CPU_NB_CAD_H5 8 HT_CPU_NB_CAD_L5 8 HT_CPU_NB_CAD_H6 8 HT_CPU_NB_CAD_L6 8 HT_CPU_NB_CAD_H7 8 HT_CPU_NB_CAD_L7 8 HT_CPU_NB_CAD_H8 8 HT_CPU_NB_CAD_L8 8 HT_CPU_NB_CAD_H9 8 HT_CPU_NB_CAD_L9 8 HT_CPU_NB_CAD_H10 8 HT_CPU_NB_CAD_L10 8 HT_CPU_NB_CAD_H11 8 HT_CPU_NB_CAD_L11 8 HT_CPU_NB_CAD_H12 8 HT_CPU_NB_CAD_L12 8 HT_CPU_NB_CAD_H13 8 HT_CPU_NB_CAD_L13 8 HT_CPU_NB_CAD_H14 8 HT_CPU_NB_CAD_L14 8 HT_CPU_NB_CAD_H15 8 HT_CPU_NB_CAD_L15 8

HT_CPU_NB_CLK_H0 8 HT_CPU_NB_CLK_L0 8 HT_CPU_NB_CLK_H1 8 HT_CPU_NB_CLK_L1 8

HT_CPU_NB_CTL_H0 8 HT_CPU_NB_CTL_L0 8 HT_CPU_NB_CTL_H1 8 HT_CPU_NB_CTL_L1 8

SKT-BGA638H176

A A

5

4

3

2

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

CPU_HT_LINK I/F_(1/4)

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

of

463Monday, March 01, 2010

1

SB

5

Place near to CPU

D D

C341

SC4D7U6D3V3MX-2GP

1D5V_S3

C C

B B

A A

4.7u x 4 0.22u X 2 180P x 6

12

C314

SCD22U6D3V2KX-1GP

DY

D10 C10 B10

AD10

AF10

AE10

H16 T19

V22 U21 V19

T20 U19 U20 V20

J22 J20

N19 N20 E16 F16 Y16

AA16

P19 P20

N21 M20 N22 M19 M22

L20

M24

L21

L19 K22 R21

L22 K20 V24 K24 K19

R20 R23

J21 R19

T22 T24

12

DY

12

C327

SC180P50V2JN-1GP

1500 mA

ACPU1B

VTT1

MEM:CMD/CTRL/CLK

VTT2 VTT3 VTT4

VDDR

MEMZP MEMZN

RSVD_M1 MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

SKT-CPU638P,DANUB

62.10055.111

MEM_MA0_ODT017 MEM_MA0_ODT117 MEM_MA1_ODT017 MEM_MA1_ODT117

MEM_MA0_CS#017 MEM_MA0_CS#117 MEM_MA1_CS#017 MEM_MA1_CS#117

MEM_MA_CKE017 MEM_MA_CKE117

MEM_MA_CLK5_P17

MEM_MA_CLK5_N17 MEM_MA_CLK1_P17 MEM_MA_CLK1_N17 MEM_MA_CLK7_P17 MEM_MA_CLK7_N17

MEM_MA_CLK4_P17

MEM_MA_CLK4_N17

MEM_MA_ADD017

MEM_MA_ADD117

MEM_MA_ADD217

MEM_MA_ADD317

MEM_MA_ADD417

MEM_MA_ADD517

MEM_MA_ADD617

MEM_MA_ADD717

MEM_MA_ADD817

MEM_MA_ADD917

MEM_MA_ADD1017

MEM_MA_ADD1117

MEM_MA_ADD1217

MEM_MA_ADD1317

MEM_MA_ADD1417

MEM_MA_ADD1517

MEM_MA_BANK017

MEM_MA_BANK117

MEM_MA_BANK217

MEM_MA_RAS#17

MEM_MA_CAS#17

MEM_MA_WE#17

12

C317

DY

R429

R429 39D2R2F-L-GP

39D2R2F-L-GP

R432

R432 39D2R2F-L-GP

39D2R2F-L-GP

12

C332

SC4D7U6D3V3MX-2GP

DY

1 2 1 2

M_A_RST#17

12

C305

C316

SC4D7U6D3V3MX-2GP

1D05V_S0

MEMZP MEMZN

M_A_RST#

SCD22U6D3V2KX-1GP

12

C320

C315

SC180P50V2JN-1GP

VTT5 VTT6 VTT7 VTT8 VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

4

12

C311

SC180P50V2JN-1GP

DY

W10 AC10 AB10 AA10 A10

VTT_SENSE

Y10 W17

M_B_RST#

B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

12

C321

SC180P50V2JN-1GP

1

MEM_MB0_ODT0 16 MEM_MB0_ODT1 16

MEM_MB0_CS#0 16 MEM_MB0_CS#1 16

MEM_MB_CKE0 16 MEM_MB_CKE1 16

MEM_MB_CLK5_P 16 MEM_MB_CLK5_N 16

MEM_MB_CLK4_P 16 MEM_MB_CLK4_N 16

MEM_MB_ADD0 16 MEM_MB_ADD1 16 MEM_MB_ADD2 16 MEM_MB_ADD3 16 MEM_MB_ADD4 16 MEM_MB_ADD5 16 MEM_MB_ADD6 16 MEM_MB_ADD7 16 MEM_MB_ADD8 16 MEM_MB_ADD9 16 MEM_MB_ADD10 16 MEM_MB_ADD11 16 MEM_MB_ADD12 16 MEM_MB_ADD13 16 MEM_MB_ADD14 16 MEM_MB_ADD15 16

MEM_MB_BANK0 16 MEM_MB_BANK1 16 MEM_MB_BANK2 16

MEM_MB_RAS# 16 MEM_MB_CAS# 16 MEM_MB_WE# 16

12

C313

SC180P50V2JN-1GP

DY

TP49 TPAD14-GPTP49 TPAD14-GP

M_B_RST# 16

CLOSE TO CPU

1D5V_S3

C364

SCD1U10V2KX-4GP

VREF_DDR_CLAW

C364

C359

C358

12

SC1KP50V2KX-1GP

SCD1U10V2KX-4GP

3

12

SRN1KJ-7-GP

2 3 1

RN13

12

1110 swap RN48

2

ACPU1C

MEM_MA_DATA017 MEM_MA_DATA117 MEM_MA_DATA217 MEM_MA_DATA317 MEM_MA_DATA417 MEM_MA_DATA517 MEM_MA_DATA617 MEM_MA_DATA717 MEM_MA_DATA817 MEM_MA_DATA917 MEM_MA_DATA1017 MEM_MA_DATA1117 MEM_MA_DATA1217 MEM_MA_DATA1317 MEM_MA_DATA1417 MEM_MA_DATA1517 MEM_MA_DATA1617 MEM_MA_DATA1717 MEM_MA_DATA1817 MEM_MA_DATA1917 MEM_MA_DATA2017 MEM_MA_DATA2117 MEM_MA_DATA2217 MEM_MA_DATA2317 MEM_MA_DATA2417 MEM_MA_DATA2517 MEM_MA_DATA2617 MEM_MA_DATA2717 MEM_MA_DATA2817 MEM_MA_DATA2917 MEM_MA_DATA3017 MEM_MA_DATA3117 MEM_MA_DATA3217 MEM_MA_DATA3317 MEM_MA_DATA3417 MEM_MA_DATA3517 MEM_MA_DATA3617 MEM_MA_DATA3717 MEM_MA_DATA3817 MEM_MA_DATA3917 MEM_MA_DATA4017 MEM_MA_DATA4117

4

MEM_MA_DATA4217 MEM_MA_DATA4317 MEM_MA_DATA4417 MEM_MA_DATA4517 MEM_MA_DATA4617 MEM_MA_DATA4717 MEM_MA_DATA4817 MEM_MA_DATA4917 MEM_MA_DATA5017 MEM_MA_DATA5117 MEM_MA_DATA5217 MEM_MA_DATA5317 MEM_MA_DATA5417 MEM_MA_DATA5517 MEM_MA_DATA5617 MEM_MA_DATA5717 MEM_MA_DATA5817 MEM_MA_DATA5917 MEM_MA_DATA6017 MEM_MA_DATA6117 MEM_MA_DATA6217 MEM_MA_DATA6317

MEM_MA_DM017 MEM_MA_DM117 MEM_MA_DM217 MEM_MA_DM317 MEM_MA_DM417 MEM_MA_DM517 MEM_MA_DM617 MEM_MA_DM717

MEM_MA_DQS0_P17 MEM_MA_DQS0_N17 MEM_MA_DQS1_P17 MEM_MA_DQS1_N17 MEM_MA_DQS2_P17 MEM_MA_DQS2_N17 MEM_MA_DQS3_P17 MEM_MA_DQS3_N17 MEM_MA_DQS4_P17 MEM_MA_DQS4_N17 MEM_MA_DQS5_P17 MEM_MA_DQS5_N17 MEM_MA_DQS6_P17 MEM_MA_DQS6_N17 MEM_MA_DQS7_P17 MEM_MA_DQS7_N17

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24

J19 E21 E22 H20 H22 Y24

AB24 AB22 AA21

W22 W21

Y22

AA22

Y20

AA20 AA18 AB18 AB21 AD21 AD19

Y18

AD17

W16 W14

Y14 Y17

AB17 AB15 AD15 AB13 AD13

Y12

W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24

AC24

Y19

AB16

Y13 G13

H13 G16 G15 C22 C21 G22

G21 AD23 AC23 AB19 AB20

Y15

W15 W12 W13

SKT-CPU638P,DANUB

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

JE70-DN

MEM:DATA

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0

MB_DQS_L0

MB_DQS_H1

MB_DQS_L1

MB_DQS_H2

MB_DQS_L2

MB_DQS_H3

MB_DQS_L3

MB_DQS_H4

MB_DQS_L4

MB_DQS_H5

MB_DQS_L5

MB_DQS_H6

MB_DQS_L6

MB_DQS_H7

MB_DQS_L7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11

A12 B16 A22 E25 AB26 AE22 AC16 AD12

C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

1

MEM_MB_DATA0 16 MEM_MB_DATA1 16 MEM_MB_DATA2 16 MEM_MB_DATA3 16 MEM_MB_DATA4 16 MEM_MB_DATA5 16 MEM_MB_DATA6 16 MEM_MB_DATA7 16 MEM_MB_DATA8 16 MEM_MB_DATA9 16 MEM_MB_DATA10 16 MEM_MB_DATA11 16 MEM_MB_DATA12 16 MEM_MB_DATA13 16 MEM_MB_DATA14 16 MEM_MB_DATA15 16 MEM_MB_DATA16 16 MEM_MB_DATA17 16 MEM_MB_DATA18 16 MEM_MB_DATA19 16 MEM_MB_DATA20 16 MEM_MB_DATA21 16 MEM_MB_DATA22 16 MEM_MB_DATA23 16 MEM_MB_DATA24 16 MEM_MB_DATA25 16 MEM_MB_DATA26 16 MEM_MB_DATA27 16 MEM_MB_DATA28 16 MEM_MB_DATA29 16 MEM_MB_DATA30 16 MEM_MB_DATA31 16 MEM_MB_DATA32 16 MEM_MB_DATA33 16 MEM_MB_DATA34 16 MEM_MB_DATA35 16 MEM_MB_DATA36 16 MEM_MB_DATA37 16 MEM_MB_DATA38 16 MEM_MB_DATA39 16 MEM_MB_DATA40 16 MEM_MB_DATA41 16 MEM_MB_DATA42 16 MEM_MB_DATA43 16 MEM_MB_DATA44 16 MEM_MB_DATA45 16 MEM_MB_DATA46 16 MEM_MB_DATA47 16 MEM_MB_DATA48 16 MEM_MB_DATA49 16 MEM_MB_DATA50 16 MEM_MB_DATA51 16 MEM_MB_DATA52 16 MEM_MB_DATA53 16 MEM_MB_DATA54 16 MEM_MB_DATA55 16 MEM_MB_DATA56 16 MEM_MB_DATA57 16 MEM_MB_DATA58 16 MEM_MB_DATA59 16 MEM_MB_DATA60 16 MEM_MB_DATA61 16 MEM_MB_DATA62 16 MEM_MB_DATA63 16

MEM_MB_DM0 16 MEM_MB_DM1 16 MEM_MB_DM2 16 MEM_MB_DM3 16 MEM_MB_DM4 16 MEM_MB_DM5 16 MEM_MB_DM6 16 MEM_MB_DM7 16

MEM_MB_DQS0_P 16 MEM_MB_DQS0_N 16 MEM_MB_DQS1_P 16 MEM_MB_DQS1_N 16 MEM_MB_DQS2_P 16 MEM_MB_DQS2_N 16 MEM_MB_DQS3_P 16 MEM_MB_DQS3_N 16 MEM_MB_DQS4_P 16 MEM_MB_DQS4_N 16 MEM_MB_DQS5_P 16 MEM_MB_DQS5_N 16 MEM_MB_DQS6_P 16 MEM_MB_DQS6_N 16 MEM_MB_DQS7_P 16 MEM_MB_DQS7_N 16

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

CPU_DDR_(2/4)

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

SB

of

563Monday, March 01, 2010

1

SB

5

1D5V_S0 1D5V_S0 1D5V_S0

R172

1 2

300R2J-4-GP

R172

300R2J-4-GP

1 2

1 2 1 2 1 2 1 2

R146 0R2J-2-GP

R162

0R0402-PAD

R141

0R0402-PAD

R170

0R0402-PAD

DY

1 2

C298

C298 SC100P50V2JN-3GP

SC100P50V2JN-3GP

LDT_PWROK

CPU_LDT_REQ#_CPU

R171

SB_1218

D D

CPU_LDT_RST#11,51

CPU_PWRGD11,51

CPU_LDT_STOP#11

ALLOW_LDTSTOP9

1 2

300R2J-4-GP

R148

S1G3&S1G4 not support LDTREQ_L(CPU_LDT_REQ#_CPU)

3D3V_S0

R136

10KR2J-3-GP

DY

CPU_PWRGD_SVID_REG44

1105 modify Q8,R81,R375,C205

C C

12

LDT_PWROK_G

Q7

CBE

MMBT3904-4-GP

DY

R135

R135 2K2R2J-2-GP

2K2R2J-2-GP

DY

LDT_PWROK

SCD1U16V2ZY-2GP

Near CPU PIN

R114

CPU_PWRGD_SVID_REG

R114

1 2

0R0402-PAD

LDT_PWROK

The Processor has reached a preset maximum operating temperature. 100 I=Active HTC O=FAN

12

C287

DY

1026 modify R364

1029 delete R364 and add RN127,R946

R165

1 2

300R2J-4-GP

DY

1D5V_S3

B B

123

678

4 5

RN7

SRN1KJ-4-GP

CPU_ALERT# CPU_SIC THERMTRIP# CPU_SID

1102 swap these nets

CPU_TEST22 CPU_TEST20 CPU_TEST24 CPU_TEST21

1 2 3 4 5

1026 modify RN42

A A

CPU_TEST27 CPU_TEST18 CPU_TEST19 CPU_TEST12

1 2 3 4 5

CPU_DBRDY CPU_TEST23

RN10

8 7 6

SRN1KJ-4-GP

1D5V_S3

RN12

8 7 6

SRN1KJ-4-GP

5

SB_1218

THERMTRIP#

1KR2J-1-GP

1KR2J-1-GP R155

R155

1 2

12

R430

2K2R2J-2-GP

C680

C680 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1 2

1D8V_SUS_Q2

B

Q33

C

E

MMBT3904-4-GP

84.T3904.C11

2ND = 84.03904.L06

CPU exceeds to 125

LDT_RST#_CPU 9

LDT_STP#_CPU 9

CPU_VDD0_RUN_FB_H44 CPU_VDD0_RUN_FB_L44

CPU_VDD1_RUN_FB_H44 CPU_VDD1_RUN_FB_L44

LDT_PWROK

4

к

RSMRST# 35,36

к

4

3

IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491

2D5V_VDDA_S02D5V_S0

R164

1 2

0R0603-PAD

12

C304

SC10U10V5ZY-1GP

DY

12

C300

C301

SC4D7U10V5ZY-3GP

SC3300P50V2KX-1GP

Cloce To CPU

1 2

CPU_CLK3 CPU_CLK#3

LDT_RST#_CPU

HDT_RST#

For HDT DBG

1 2

C328 SC3900P50V2KX-2GPC328 SC3900P50V2KX-2GP

1 2

C329 SC3900P50V2KX-2GPC329 SC3900P50V2KX-2GP

1 2

R151

R151 0R0402-PAD

0R0402-PAD

1D1V_S0

RN8

23 1

4

RN

0R4P2R-PAD

RN9

1

4

23

RN

0R4P2R-PAD

-1_0211

1D5V_S3

R161 169R2F-GPR161 169R2F-GP

LDT_PWROK LDT_STP#_CPU CPU_LDT_REQ#_CPU

1 2

R143 44D2R2F-GPR143 44D2R2F-GP

1 2

R145 44D2R2F-GPR145 44D2R2F-GP

R129

1 2

0R0402-PAD

1 2 1 2

CPU_VDD0_RUN_FB_H_R CPU_VDD0_RUN_FB_L_R

CPU_VDD1_RUN_FB_H_R CPU_VDD1_RUN_FB_L_R

R150510R2F-L-GP R150510R2F-L-GP R152510R2F-L-GP R152510R2F-L-GP

TP45TP45

HDT Connectors

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

1D5V_S3

SMC-CONN26A-FP

HDT_RST#

SMC-CONN26A-FP

3

LYAOUT:ROUTE VDDA TRACE APPROX. 50mils WIDE(USE 2X25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

12

C303

C302

1 3

5 7

9 11 13 15 17 19 21 23

SC10U10V5ZY-1GP

DY

CLKCPU_IN

CLKCPU#_IN

CPU_SIC CPU_SID

CPU_ALERT#

CPU_HTREF0 CPU_HTREF1

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPU_TEST23 CPU_TEST18

CPU_TEST19 CPU_TEST25

CPU_TEST25# CPU_TEST21

CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12 CPU_TEST27

CPU_TEST9 CPU_TEST6

1

HDT1

2 4

6 8 10 12 14 16 18 20 22 24 26

DY

SCD22U16V3ZY-GP

F8 F9

A9 A8

B7 A7

F10

C6

AF4 AF5 AE6

R6 P6

F6 E6

Y6

AB6 G10

AA9 AC9 AD9 AF9

AD7 H10

G9

E9 E8

AB8 AF7 AE7 AE8 AC8 AF8

C2

AA6

A3 A5 B3 B5 C1

ACPU1D

VDDA1 VDDA2

CLKIN_H CLKIN_L

RESET_L PWROK LDTSTOP_L LDTREQ_L

SIC SID ALERT_L

HT_REF0 HT_REF1

VDD0_FB_H VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23 TEST18

TEST19 TEST25_H

TEST25_L TEST21

TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

SKT-CPU638P,DANUB

THERMTRIP_L

PROCHOT_L

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

MEMHOT_L

KEY1 KEY2

SVC SVD

THERMDC THERMDA

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

2

1026 modify RN84,R612,R611

1029 delete R612

1D5V_S3

1D5V_S0

DY

12

R131

R132

1KR2J-1-GP

12

M11 W18

A6 A4

THERMTRIP#

AF6

PROCHOT#

AC7

CPU_MEMHOT#

AA8

internal pull high 300 ohm

W7 W8

1 2

C290SC3300P50V2KX-1GP

DY

CPU_VDDIO_SUS_FB_H

W9

CPU_VDDIO_SUS_FB_L

Y9 H6

G6

E10 AE9

J7 H8

D7 E7 F7 C7

C3 K8

C4

C9 C8

H18 H19 AA7 D5 C5

2

CPU_VDDNB_RUN_FB_H 44 CPU_VDDNB_RUN_FB_L 44

CPU_DBREQ# CPU_TDO

CPU_TEST10

CPU_TEST29H CPU_TEST29L

12

R127

1KR2J-1-GP

H_THERMDC 35 H_THERMDA 35

1 1

differentially impedance 80

R154

1 2

80D6R2F-L-GP

JE70-DN

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

1

R126

R126 1KR2J-1-GP

1KR2J-1-GP

CPU_SVC 44 CPU_SVD 44

TP47TP47 TP48TP48

1D5V_S3

4

1

2 3

1D5V_S3

12

RN11

R418

R418 1KR2J-1-GP

1KR2J-1-GP

DY

SRN300J-3-GP

1105 modify R366

CPU_DBREQ#

R420

1 2

0R0402-PAD

LAYOUT: Route FBCLKOUT_H/L

1D1V_S0

DY

R149

300R2J-4-GP

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU_Control&Debug_(3/4)

JE70-DN

1

PROCHOT#_SB 11

CPU_MEMHOT# 16

663Tuesday, February 23, 2010

SB

of

SB

5

4

3

2

1

ACPU1F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

D D

C C

B B

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

SKT-CPU638P,DANUB

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

VCC_CORE_S0

Bottom Side Decoupling Bottom Side Decoupling

C306

C294

12

SC10U6D3V5KX-1GP

VDDNB

C348

SC10U6D3V5KX-1GP

1D5V_S3

C336

C319

12

DY

SC10U6D3V5KX-1GP

C272

C285

12

DY

SC10U6D3V5KX-1GP

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

4A for VDDNB

C354

C350

12

Bottom Side Decoupling

C402

12

DY

SC10U6D3V5KX-1GP

C350

12

SC10U6D3V5KX-1GP

C401

C382

12

DY

SCD22U6D3V2KX-1GP

SC10U6D3V5KX-1GP

C377

12

SCD22U6D3V2KX-1GP

12

DY

C371

12

DY

SC180P50V2JN-1GP

C279

12

DY

36A for VDD0&VDD1

G4

H2

J9 J11 J13 J15

12

K6 K10 K12

M10

M16

M18 M21 M23 M25

K14

L11 L13 L15

N11 K16 P16

T16 V16

H25 K18

K21 K23 K25 L17

N17

L4 L7 L9

M2 M6 M8

N7

N9

J17

SC180P50V2JN-1GP

C374

12

SC180P50V2JN-1GP

ACPU1E

VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12

SKT-CPU638P,DANUB

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

C275

C276

12

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

C381

C388

12

SC180P50V2JN-1GP

C381

C365

12

DY

SCD01U50V2KX-1GP

VCC_CORE_S0

C307

C347

12

SCD22U6D3V2KX-1GP

C335

C346

12

DY

SC10U6D3V5KX-1GP

C307

C318

12

DY

SC10U6D3V5KX-1GP

9A for VDDIO

Place near to CPU

C378

C397

C375

C372

12

SCD22U6D3V2KX-1GP

C397

12

DY

SCD22U6D3V2KX-1GP

C383

12

SC4D7U6D3V3MX-2GP

1D5V_S3

C360

C400

12

DY

SC4D7U6D3V3KX-GP

C396

12

DY

SC4D7U6D3V3KX-GP

VCC_CORE by HT bus power moat use

VCC_CORE_S0

C179

SB_0106

C179

C273

12

SCD1U10V2KX-4GP

DY

C187

C277

12

SCD1U10V2KX-4GP

DY

C296

C293

12

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

C203

C219

12

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

A A

5

4

3

2

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

CPU_Power_(4/4)

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

of

763Wednesday, January 06, 2010

1

SB

5

HT_CPU_NB_CAD_H04 HT_CPU_NB_CAD_L04 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H24 HT_CPU_NB_CAD_L24 HT_CPU_NB_CAD_H34 HT_CPU_NB_CAD_L34 HT_CPU_NB_CAD_H44 HT_CPU_NB_CAD_L44 HT_CPU_NB_CAD_H54

D D

C C

PEG_RXN[15..0]52 PEG_RXP[15..0]52

B B

MINICARD1 MINICARD1

A A

A-LINK

5

HT_CPU_NB_CAD_L54 HT_CPU_NB_CAD_H64 HT_CPU_NB_CAD_L64 HT_CPU_NB_CAD_H74 HT_CPU_NB_CAD_L74

HT_CPU_NB_CAD_H84 HT_CPU_NB_CAD_L84 HT_CPU_NB_CAD_H94 HT_CPU_NB_CAD_L94 HT_CPU_NB_CAD_H104 HT_CPU_NB_CAD_L104 HT_CPU_NB_CAD_H114 HT_CPU_NB_CAD_L114 HT_CPU_NB_CAD_H124 HT_CPU_NB_CAD_L124 HT_CPU_NB_CAD_H134 HT_CPU_NB_CAD_L134 HT_CPU_NB_CAD_H144 HT_CPU_NB_CAD_L144 HT_CPU_NB_CAD_H154 HT_CPU_NB_CAD_L154

HT_CPU_NB_CLK_H04 HT_CPU_NB_CLK_L04 HT_CPU_NB_CLK_H14 HT_CPU_NB_CLK_L14

HT_CPU_NB_CTL_H04 HT_CPU_NB_CTL_L04 HT_CPU_NB_CTL_H14 HT_CPU_NB_CTL_L14

1 2

Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24

LAN

ALINK_NBRX_SBTX_P011 ALINK_NBRX_SBTX_N011 ALINK_NBRX_SBTX_P111 ALINK_NBRX_SBTX_N111 ALINK_NBRX_SBTX_P211 ALINK_NBRX_SBTX_N211 ALINK_NBRX_SBTX_P311 ALINK_NBRX_SBTX_N311

R74

R74 301R2F-GP

301R2F-GP

PCIE_RXP026 PCIE_RXN026 PCIE_RXP133 PCIE_RXN133 PCIE_RXP233 PCIE_RXN233

PEG_RXP15 PEG_RXN15 PEG_RXP14 PEG_RXN14 PEG_RXP13 PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10 PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0

4

ANB1A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCALP HT_TXCALP HT_RXCALN

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS880M-1-GP

ANB1B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS880M-1-GP

4

PART 1 OF 6

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP

HT_TXCALN

GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

PCIE I/F GFX

PCE_CALRP

PCE_CALRN

GFX_TX0P

GFX_TX0N

GFX_TX1P

GFX_TX1N

GFX_TX2P

GFX_TX2N

GFX_TX3P

GFX_TX3N

GFX_TX4P

GFX_TX4N

GFX_TX5P

GFX_TX5N

GFX_TX6P

GFX_TX6N

GFX_TX7P

GFX_TX7N

GFX_TX8P

GFX_TX8N

GFX_TX9P

GFX_TX9N

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P

SB_TX0N

SB_TX1P

SB_TX1N

SB_TX2P

SB_TX2N

SB_TX3P

SB_TX3N

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

3

HT_TXCALN

GTXP15 PEG_TXP15

DIS_PX

GTXN15 PEG_TXN15

DIS_PX

GTXP14 PEG_TXP14

DIS_PX

DIS_PX DIS_PX

DIS_PX

GTXP13 PEG_TXP13

DIS_PX

DIS_PX DIS_PX

DIS_PX

GTXN12 PEG_TXN12

DIS_PX

GTXP11 PEG_TXP11

DIS_PX

DIS_PX DIS_PX

DIS_PX

GTXP9 PEG_TXP9

DIS_PX

GTXN9 PEG_TXN9

DIS_PX

DIS_PX DIS_PX

DIS_PX

GTXN6 PEG_TXN6

DIS_PX

DIS_PX DIS_PX

DIS_PX

GTXP4 PEG_TXP4

DIS_PX

DIS_PX DIS_PX

DIS_PX

GTXP3 PEG_TXP3

DIS_PX

DIS_PX DIS_PX

DIS_PX

GTXP0 PEG_TXP0

DIS_PX

DIS_PX DIS_PX

DIS_PX

TXP0 TXN0 TXP1 TXN1 TXP2 TXN2

1105 delete TP16,TP17

ALINK_NBTX_SBRX_P0 ALINK_NBTX_SBRX_N0 ALINK_NBTX_SBRX_P1 ALINK_NBTX_SBRX_N1 ALINK_NBTX_SBRX_P2 ALINK_NBTX_SBRX_N2 ALINK_NBTX_SBRX_P3 ALINK_NBTX_SBRX_N3

PCE_PCAL PCE_NCAL

Place < 100mils from pin AC8 and AB8

3

HT_NB_CPU_CAD_H0 4 HT_NB_CPU_CAD_L0 4 HT_NB_CPU_CAD_H1 4 HT_NB_CPU_CAD_L1 4 HT_NB_CPU_CAD_H2 4 HT_NB_CPU_CAD_L2 4 HT_NB_CPU_CAD_H3 4 HT_NB_CPU_CAD_L3 4 HT_NB_CPU_CAD_H4 4 HT_NB_CPU_CAD_L4 4 HT_NB_CPU_CAD_H5 4 HT_NB_CPU_CAD_L5 4 HT_NB_CPU_CAD_H6 4 HT_NB_CPU_CAD_L6 4 HT_NB_CPU_CAD_H7 4 HT_NB_CPU_CAD_L7 4

HT_NB_CPU_CAD_H8 4 HT_NB_CPU_CAD_L8 4 HT_NB_CPU_CAD_H9 4 HT_NB_CPU_CAD_L9 4 HT_NB_CPU_CAD_H10 4 HT_NB_CPU_CAD_L10 4 HT_NB_CPU_CAD_H11 4 HT_NB_CPU_CAD_L11 4 HT_NB_CPU_CAD_H12 4 HT_NB_CPU_CAD_L12 4 HT_NB_CPU_CAD_H13 4 HT_NB_CPU_CAD_L13 4 HT_NB_CPU_CAD_H14 4 HT_NB_CPU_CAD_L14 4 HT_NB_CPU_CAD_H15 4 HT_NB_CPU_CAD_L15 4

HT_NB_CPU_CLK_H0 4 HT_NB_CPU_CLK_L0 4 HT_NB_CPU_CLK_H1 4 HT_NB_CPU_CLK_L1 4

HT_NB_CPU_CTL_H0 4 HT_NB_CPU_CTL_L0 4 HT_NB_CPU_CTL_H1 4 HT_NB_CPU_CTL_L1 4

1 2

C585 SCD1U16V2KX-3GP

1 2

C581 SCD1U16V2KX-3GP

1 2

C590 SCD1U16V2KX-3GP

1 2

C586 SCD1U16V2KX-3GP

1 2

C595 SCD1U16V2KX-3GP

1 2

C593 SCD1U16V2KX-3GP

1 2

C600 SCD1U16V2KX-3GP

1 2

C597 SCD1U16V2KX-3GP

1 2

C607 SCD1U16V2KX-3GP

1 2

C604 SCD1U16V2KX-3GP

1 2

C611 SCD1U16V2KX-3GP

1 2

C608 SCD1U16V2KX-3GP

1 2

C619 SCD1U16V2KX-3GP

1 2

C614 SCD1U16V2KX-3GP

1 2

C626 SCD1U16V2KX-3GP

1 2

C620 SCD1U16V2KX-3GP

1 2

C632 SCD1U16V2KX-3GP

1 2

C629 SCD1U16V2KX-3GP

1 2

C635 SCD1U16V2KX-3GP

1 2

C633 SCD1U16V2KX-3GP

1 2

C639 SCD1U16V2KX-3GP

1 2

C637 SCD1U16V2KX-3GP

1 2

C642 SCD1U16V2KX-3GP

1 2

C641 SCD1U16V2KX-3GP

1 2

C644 SCD1U16V2KX-3GP

1 2

C643 SCD1U16V2KX-3GP

1 2

C646 SCD1U16V2KX-3GP

1 2

C645 SCD1U16V2KX-3GP

1 2

C649 SCD1U16V2KX-3GP

1 2

C648 SCD1U16V2KX-3GP

1 2

C651 SCD1U16V2KX-3GP

1 2

C650 SCD1U16V2KX-3GP

1 2

C577 SCD1U16V2KX-3GPC577 SCD1U16V2KX-3GP

1 2

C578 SCD1U16V2KX-3GPC578 SCD1U16V2KX-3GP

1 2

C572 SCD1U16V2KX-3GPC572 SCD1U16V2KX-3GP

1 2

C574 SCD1U16V2KX-3GPC574 SCD1U16V2KX-3GP

1 2

C564 SCD1U16V2KX-3GPC564 SCD1U16V2KX-3GP

1 2

C565 SCD1U16V2KX-3GPC565 SCD1U16V2KX-3GP

1 2

C609 SCD1U16V2KX-3GPC609 SCD1U16V2KX-3GP

1 2

C605 SCD1U16V2KX-3GPC605 SCD1U16V2KX-3GP

1 2

C594 SCD1U16V2KX-3GPC594 SCD1U16V2KX-3GP

1 2

C598 SCD1U16V2KX-3GPC598 SCD1U16V2KX-3GP

1 2

C587 SCD1U16V2KX-3GPC587 SCD1U16V2KX-3GP

1 2

C591 SCD1U16V2KX-3GPC591 SCD1U16V2KX-3GP

1 2

C580 SCD1U16V2KX-3GPC580 SCD1U16V2KX-3GP

1 2

C584 SCD1U16V2KX-3GPC584 SCD1U16V2KX-3GP

1 2

R46

R46 R44

R44

1 2 1 2

1K27R2F-L-GP

1K27R2F-L-GP 2KR2F-3-GP

2KR2F-3-GP

Placement: close RS880

R78

R78 301R2F-GP

301R2F-GP

Placement: close RS880

PEG_TXN14GTXN14 PEG_TXN13GTXN13

PEG_TXP12GTXP12

PEG_TXN11GTXN11 PEG_TXP10GTXP10 PEG_TXN10GTXN10

PEG_TXP8GTXP8 PEG_TXN8GTXN8 PEG_TXP7GTXP7 PEG_TXN7GTXN7 PEG_TXP6GTXP6

PEG_TXP5GTXP5 PEG_TXN5GTXN5

PEG_TXN4GTXN4 PEG_TXN3GTXN3

PEG_TXP2GTXP2 PEG_TXN2GTXN2 PEG_TXP1GTXP1 PEG_TXN1GTXN1

PEG_TXN0GTXN0

PCIE_TXP0 26

PCIE_TXN0 26

PCIE_TXP1 33

PCIE_TXN1 33

PCIE_TXP2 33

PCIE_TXN2 33

ALINK_NBTX_C_SBRX_P0 11 ALINK_NBTX_C_SBRX_N0 11 ALINK_NBTX_C_SBRX_P1 11 ALINK_NBTX_C_SBRX_N1 11 ALINK_NBTX_C_SBRX_P2 11 ALINK_NBTX_C_SBRX_N2 11 ALINK_NBTX_C_SBRX_P3 11 ALINK_NBTX_C_SBRX_N3 11

1D1V_S0

2

PEG_TXP[15..0] 52 PEG_TXN[15..0] 52

1

RS880M Display Port Support(muxed on GFX)

DP0

GFX_TX0,TX1,TX2,TX3,AUX0,HPD0 GFX_TX4,TX5,TX6,TX7,AUX1,HPD1DP1

GTXP15 GTXN15 GTXP14 GTXN14 GTXP13 GTXN13 GTXP12 GTXN12

HDMI_UMA

HDMI_UMA HDMI_UMA

HDMI_UMA

C599 SCD1U16V2KX-3GP

1 2

C596 SCD1U16V2KX-3GP

1 2

C610 SCD1U16V2KX-3GP

1 2

C606 SCD1U16V2KX-3GP

1 2

C618 SCD1U16V2KX-3GP

1 2

C612 SCD1U16V2KX-3GP

1 2

C622 SCD1U16V2KX-3GP

1 2

C623 SCD1U16V2KX-3GP

1 2

LAN

MINICARD2MINICARD2

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-RS880M_HT LINK&PCIe(1/3)

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

1

HDMI_DATA2+ 21 HDMI_DATA2- 21 HDMI_DATA1+ 21 HDMI_DATA1- 21 HDMI_DATA0+ 21 HDMI_DATA0- 21 HDMI_CLK+ 21 HDMI_CLK- 21

of

863Tuesday, February 23, 2010

SB

5

R34 0R2J-2-GP

1 2

DY

LDT_RST#_CPU6

D D

PLT_RST1#11,36,52

Close to NB ball

C C

ALLOW_LDTSTOP6

2ND = 77.C1071.081

20mA

1D8V_S0

L7

B B

A A

1 2

220ohm 200mA

SBK160808T-221Y-N-GP

68.00119.111

2ND = 68.00217.711

20mA

1D8V_S0

L1

1 2

220ohm 200mA

SBK160808T-221Y-N-GP

68.00119.111

2ND = 68.00217.711

LDT_STP#_CPU6

SC1U10V2KX-1GP

DY

R32

1 2

0R0402-PAD

GMCH_BLUE

GMCH_GREEN

12

R68

R67

VDDA18PCIEPLL

150R2F-1-GP

R48

1 2

0R0402-PAD

80.10715.L04

VDDA18HTPLL

12

C174

DY

12

C63

DY

1D5V_S0 1D8V_S0

12

R31

R31 2K2R2J-2-GP

2K2R2J-2-GP

B

Q5

C

E

MMBT3904-4-GP

R37

1 2

DY

0R2J-2-GP

5

SYSREST#

12

C56

C56 SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

GMCH_RED

12

R64

R64 133R2F-GP

133R2F-GP

SB_1223

NB_ALLOW_LDTSTOP

1D8V_S0

12

TC7

ST100U6D3VBML1GP

12

C127

C127 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C59

C59 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

NB_LDT_STOP#

SB_1216

1 2

3D9R3-GP

63.3R934.15L

SB_1223

R35

R35 2K2R2J-2-GP

2K2R2J-2-GP

1D8V_S0

TC2

ST100U6D3VBM-5GP

DY

1D8V_S0

12

R45

R45 1KR2F-3-GP

L3

1KR2F-3-GP

220ohm 200mA

2ND = 68.00217.711

1D1V_S0

L38

1 2

SBK160808T-221Y-N-GP

SC1U10V2KX-1GP

12

UMA

ENABLE External CLK GEN

DP_AUX0N18

4

110mA

20mA

68.00119.111

2ND = 68.00217.711

4mA

SBK160808T-221Y-N-GP

12

220ohm 200mA

GMCH_RED18

GMCH_GREEN18

GMCH_BLUE18

68.00119.111

65mA

C624

C105

SC1U10V2KX-1GP

C107

DY

SC47U6D3V5MX-1-GP

3D3V_S0

12

R378

DY

2K2R2J-2-GP

STRP_DATA

4

3D3V_S0

1 2

SBK160808T-221Y-N-GP

68.00119.111

2ND = 68.00217.711

SC1U10V2KX-1GP

1D8V_S0

SC1U10V2KX-1GP

R71

1 2

SC1U10V2KX-1GP

GMCH_DDCCLK20

GMCH_DDCDATA20

1D1V_S0_PLLVDD

12

C631

C631 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

12

C106

C106 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D1V_S0

RN6

1 2 3

SRN4K7J-8-GP

R368

1 2

0R0402-PAD

GMCH_HDMI_CLK21

GMCH_HDMI_DATA21

220ohm 200mA

L2

C90

R62

1 2

0R0603-PAD

C119

12

C188

GMCH_HSYNC20 GMCH_VSYNC20

NB_ALLOW_LDTSTOP11

CLK_NBHT_CLK3 CLK_NBHT_CLK#3

4

TPAD14-GP

TPAD14-GP TPAD14-GP

TPAD14-GP

12

UMA

12

C133

C133 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

NB_PWRGD12,41

CLK_NB_14M3

CLK_NB_GFX3 CLK_NB_GFX#3

CLK_NB_GPPSB3 CLK_NB_GPPSB#3

CLK_DDC_EDID18

DAT_DDC_EDID18

3D3V_S0_AVDD

12

C108

SC2D2U6D3V2MX-GP

SB_0106

1D8V_S0_AVDDDI

C118

C118 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_S0_AVDDQ

GMCH_HSYNC GMCH_VSYNC

R57

1 2

715R2F-GP

1D8V_S0_PLVDD18

VDDA18HTPLL

VDDA18PCIEPLL

SYSREST#

NB_LDT_STOP# NB_ALLOW_LDTSTOP

NB_REFCLK_N

CLK_NB_GFX CLK_NB_GFX#

CLK_NBGPP_CLK

TP140

CLK_NBGPP_CLK#

TP139

DDC_CLK0/AUX0P

TP142

GMCH_HDMI_CLK GMCH_HDMI_DATA

STRP_DATA

RS780_AUX_CAL

12

DAC_RSET

AUX0N

R367

R367 150R2F-1-GP

150R2F-1-GP

3

ANB1C

F12

E12

F14 G15 H15 H14

E17

F17

F15 G18

G17 E18

F18 E19

F19 A11

B11

F8

E8 G14 A12

D14 B12

H17

D7

E7

D8 A10 C10 C12

C25 C24

E11

F11

T2

T1

U1

U2

V4

V3

B9

A9

B8

A8

B7

A7 B10 G11

C8

RS880M-1-GP

3

3D3V_S0

R372

3K3R3J-L-GP

AVDD1 AVDD2 AVDDDI AVSSDI AVDDQ AVSSQ

C_Pr Y COMP_Pb

RED REDb GREEN GREENb BLUE BLUEb

DAC_HSYNC DAC_VSYNC DAC_SCL DAC_SDA

DAC_RSET PLLVDD

PLLVDD18 PLLVSS

VDDA18HTPLL VDDA18PCIEPLL1

VDDA18PCIEPLL2 SYSRESET#

POWERGOOD LDTSTOP# ALLOW_LDTSTOP

HT_REFCLKP HT_REFCLKN

REFCLK_P/OSCIN REFCLK_N

GFX_REFCLKP GFX_REFCLKN

GPP_REFCLKP GPP_REFCLKN

GPPSB_REFCLKP GPPSB_REFCLKN

I2C_CLK I2C_DATA DDC_DATA0/AUX0N DDC_CLK0/AUX0P DDC_CLK1/AUX1P DDC_DATA1/AUX1N

STRP_DATA RESERVED AUX_CAL

12

R373

R373 3K3R3J-L-GP

3K3R3J-L-GP

GMCH_VSYNC

GMCH_HSYNC

PART 3 OF 6

DDC_DATA0/AUX0N DDC_CLK0/AUX0P

CRT/TVOUT

LVTM

PM

CLOCKs PLL PWR

MIS.

2

1

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO.(PIN: RS880M--> DAC_VSYNC) 1 :Disable 0 : Enable

*

RS880: Enables Side port memory (PIN: RS880M--> DAC_HSYNC)

1 :Disable 0 : Enable

*

SUS_STAT#

Selects Loading of STRAPS From EEPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values

*

0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N

TXCLK_LP TXCLK_LN TXCLK_UP

TXCLK_UN

VDDLTP18 VSSLTP18

VDDLT18_1 VDDLT18_2 VDDLT33_1 VDDLT33_2

VSSLT1 VSSLT2 VSSLT3 VSSLT4 VSSLT5 VSSLT6 VSSLT7

LVDS_DIGON

LVDS_BLON

LVDS_ENA_BL

TMDS_HPD

HPD

SUS_STAT#

THERMALDIODE_P THERMALDIODE_N

TESTMODE

2

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

GMCH_TXAOUT0+ 18 GMCH_TXAOUT0- 18 GMCH_TXAOUT1+ 18 GMCH_TXAOUT1- 18 GMCH_TXAOUT2+ 18 GMCH_TXAOUT2- 18

GMCH_TXBOUT0+ 18 GMCH_TXBOUT0- 18 GMCH_TXBOUT1+ 18 GMCH_TXBOUT1- 18 GMCH_TXBOUT2+ 18 GMCH_TXBOUT2- 18

GMCH_TXACLK+ 18

GMCH_TXACLK- 18

GMCH_TXBCLK+ 18

GMCH_TXBCLK- 18

1D8V_S0_VDDLP18

C638

SC1U10V2KX-1GP

1D8V_S0_VDDLT18

SC4D7U6D3V3MX-2GP

NB_DVI_HPD NB_SUS_STAT# RS780_DXP3_1

RS780_DXN3_1 TESTMODE_NB

JE70-DN

Title

Size Document Number Rev

Date: Sheet

15mA

1 2

12

SBK160808T-221Y-N-GP

DY

C634

C634 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

PBY201209T-221Y-N-GP

12

C120

C128

1 2

12

R66

R66 1K8R2F-GP

1K8R2F-GP

A3

2 3 1

1 2

C120

DY

SCD1U10V2KX-4GP

RN5

4

SRN4K7J-8-GP

SRN4K7J-8-GP R365

R365

4K7R2J-2-GP

HDMI_DETECT# 21

TP23 TPAD14-GPTP23 TPAD14-GP

R49

DY

0R2J-2-GP

ATi-RS880M_LVDS&CRT_(2/3)

1D8V_S0

L40

2ND = 68.00217.711

L6

2ND = 68.00217.711

300mA

GMCH_LCDVDD_ON 19 GMCH_BL_PWM 19 LVDS_ENA_BL 18

SUS_STAT# 12

TP143 TPAD14-GPTP143 TPAD14-GP TP20 TPAD14-GPTP20 TPAD14-GP

NB_SUS_STAT#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

1

68.00119.111

68.00206.121

2ND = 68.00216.161

3D3V_S0

12

R42

R42 4K7R2J-2-GP

4K7R2J-2-GP

of

963Tuesday, February 23, 2010

SB

5

1D1V_S0

L39

1 2

PBY201209T-221Y-N-GP

220 ohm @ 100MHz,2A

D D

220 ohm @ 100MHz,2A

C C

220 ohm @ 100MHz,2A

2ND = 68.00216.161

68.00206.121

2ND = 68.00216.161

1D1V_S0

L12

1 2

PBY201209T-221Y-N-GP

68.00206.121

2ND = 68.00216.161

1D1V_S0

L9

1 2

PBY201209T-221Y-N-GP

68.00206.121

2ND = 68.00216.161

1D8V_S0

L5

1 2

PBY201209T-221Y-N-GP

68.00206.121

1D8V_S0

12

C92

SC1U10V2KX-1GP

C176

12

80mil Width

12

C100

SC4D7U6D3V3KX-GP

DY

0.01A

0.6A

C621

12

+1.1V_RUN_VDDHT

SC4D7U6D3V3MX-2GP

12

C129

0.7A

C150

SC4D7U6D3V3MX-2GP

12

0.4A

SC4D7U6D3V3MX-2GP

SCD1U10V2KX-4GP

12

+1.1V_RUN_VDDHTTX

C146

SC4D7U6D3V3MX-2GP

0.7A

12

C70

SCD1U10V2KX-4GP

SC2D2U10V3KX-1GP

C131

C132

SCD1U10V2KX-4GP

12

DY

SC2D2U10V3KX-1GP

+1.1V_RUN_VDDHTRX

C144

12

C147

12

DY

+1.8V_RUN_VDDA18PCIE

12

C83

12

C194

SCD1U10V2KX-4GP

12

DY

C177

12

SCD1U10V2KX-4GP

12

C87

C84

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

C189

12

SCD1U10V2KX-4GP

DY

C161

12

SCD1U10V2KX-4GP

DY

12

C86

SCD1U10V2KX-4GP

DY

M16 R16

H18 G19

D22

AE25 AD24 AC23 AB22 AA21

W19

U17 R17 M17

M10

R10 AA9

AB9 AD9 AE9 U10

AE11 AD11

J17 K16 L16

P16 T16

F20 E21

B23 A23

Y20 V18 T17 P17

J10 P10 K10

L10

W9

H9

T10

Y9

F9

G9

4

ANB1E

VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2

RS880M-1-GP

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

POWER

VDD_MEM1

VDD_MEM2

VDD_MEM3

VDD_MEM4

VDD_MEM5

VDD_MEM6

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD33_1 VDD33_2

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11

+3.3V_RUN_VDD33

H12

C57

SCD1U10V2KX-4GP

C57

300mil Width

12

C116

DY

12

C124

SCD1U10V2KX-4GP

DY

12

DY

3

2.5A

12

C102

SCD1U10V2KX-4GP

12

C85

C66

SCD1U10V2KX-4GP

DY

12

C97

SCD1U10V2KX-4GP

12

C95

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

DY

7.6A

12

C126

SCD1U10V2KX-4GP

DY

R40

1 2

0R0603-PAD

1D1V_S0

12

C142

SC1U10V2KX-1GP

C160

C160 SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

+NB_VCORE 0.95V~1.1V

1D1V_S0

12

C69

C101

SCD1U10V2KX-4GP

DY

3D3V_S0

SCD1U10V2KX-4GP

12

C96

SCD1U10V2KX-4GP

12

C123

2

SC10U6D3V3MX-GP

12

C159

SC10U6D3V3MX-GP

M20 N22

R19 R22 R24 R25 H20 U22

W22 W24 W25

AD25

M14 N13

R11 R14

U14 U11 U15

W11 W15

AC12

AA14 AB11

AB15 AB17 AB19 AE20 AB21

A25 D23 E22 G22 G24 G25 H19

L17 L22 L24 L25

P20

V19

Y21

L12

P12 P15

T12

V12

Y18

K11

J22

ANB1F

VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34

RS880M-1-GP

PART 6/6

GROUND

1

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

B B

A A

5

AB12 AE16

AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

AD16 AE17 AD17

W12

AD18 AB13 AB18

W14

AE12 AD12

V11

Y14

Y12

V14 V15

ANB1D

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CKP MEM_CKN

MEM_COMPP MEM_COMPN

RS880M-1-GP

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC MEM_DQ1/DVO_HSYNC

MEM_DQ2/DVO_DE MEM_DQ3/DVO_D0

MEM_DQ4 MEM_DQ5/DVO_D1 MEM_DQ6/DVO_D2 MEM_DQ7/DVO_D4 MEM_DQ8/DVO_D3 MEM_DQ9/DVO_D5

MEM_DQ10/DVO_D6 MEM_DQ11/DVO_D7

MEM_DQ12

MEM_DQ13/DVO_D9 MEM_DQ14/DVO_D10 MEM_DQ15/DVO_D11

MEM_DQS0P/DVO_IDCKP MEM_DQS0N/DVO_IDCKN

MEM_DQS1P

MEM_DQS1N

MEM_DM0

MEM_DM1/DVO_D8

SBD_MEM/DVO_I/F

4

IOPLLVDD18

IOPLLVDD

IOPLLVSS

MEM_VREF

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions

1D8V_S0

+1.8V_IOPLLVDD18

+1.1V_IOPLLVDD

R389

1 2

0R0402-PAD

R390

1 2

0R0402-PAD

1D1V_S0

3

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-RS880M_Side Port&PWR&GND(3/3)

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

SB

of

10 63Tuesday, February 23, 2010

1

SB

5

1 2

C705 SC150P50V2KX-GPC705 SC150P50V2KX-GP

PCIE_RST#26,33

1 2

C706 SC150P50V2KX-GPC706 SC150P50V2KX-GP

D D

PLT_RST1#9,36,52

ALINK_NBRX_SBTX_P08 ALINK_NBRX_SBTX_N08 ALINK_NBRX_SBTX_P18 ALINK_NBRX_SBTX_N18 ALINK_NBRX_SBTX_P28 ALINK_NBRX_SBTX_N28 ALINK_NBRX_SBTX_P38 ALINK_NBRX_SBTX_N38

PLT_RST1#

C666 SCD1U16V2KX-3GPC666 SCD1U16V2KX-3GP

1 2

C665 SCD1U16V2KX-3GPC665 SCD1U16V2KX-3GP

1 2

C672 SCD1U16V2KX-3GPC672 SCD1U16V2KX-3GP

1 2

C671 SCD1U16V2KX-3GPC671 SCD1U16V2KX-3GP

1 2

C669 SCD1U16V2KX-3GPC669 SCD1U16V2KX-3GP

1 2

C670 SCD1U16V2KX-3GPC670 SCD1U16V2KX-3GP

1 2

C667 SCD1U16V2KX-3GPC667 SCD1U16V2KX-3GP

1 2

C668 SCD1U16V2KX-3GPC668 SCD1U16V2KX-3GP

1 2

ALINK_NBTX_C_SBRX_P08 ALINK_NBTX_C_SBRX_N08 ALINK_NBTX_C_SBRX_P18 ALINK_NBTX_C_SBRX_N18 ALINK_NBTX_C_SBRX_P28 ALINK_NBTX_C_SBRX_N28 ALINK_NBTX_C_SBRX_P38

1D1V_PCIE_VDDR_S0

43 mA

ALINK_NBTX_C_SBRX_N38

R144 590R2F-GPR144 590R2F-GP R142 2K05R2F-GPR142 2K05R2F-GP

1 2

1 2 1 2

R45133R2J-2-GP R45133R2J-2-GP

PCIE_RST#_1

1 2

ALINK_NBRX_C_SBTX_P0 ALINK_NBRX_C_SBTX_N0 ALINK_NBRX_C_SBTX_P1 ALINK_NBRX_C_SBTX_N1 ALINK_NBRX_C_SBTX_P2 ALINK_NBRX_C_SBTX_N2 ALINK_NBRX_C_SBTX_P3 ALINK_NBRX_C_SBTX_N3

R45333R2J-2-GP R45333R2J-2-GP

NB_RST#

PCIE_CALRP

PCIE_CALRN

Place R <100mils form pins AD29,AD28

3D3V_S5

U44A

C C

B B

PLT_RST1#

147

1 2

2ND = 73.07408.L15

2ND = 73.07408.L15 3RD = 73.07408.02B

3RD = 73.07408.02B

73.07408.L16

3

TSLVC08APW-1-GP

PLT_RST1#_B 25,37

CLK_PCIE_SB3 CLK_PCIE_SB#3

for Internal CLK GEN

DY

CLK_SB_14M_1

CLK_SB_14M3,12

C673

1 2

SC12P50V2JN-L1-GP

XTAL-25MHZ-102-GP

1027 modify C543,C306

XTAL-25MHZ-102-GP

C674

1 2

SC12P50V2JN-L1-GP

SB_1209

A A

5

1 2

R157 0R2J-2-GP

X2

1 2

82.30020.851

12

1MR2J-1-GP

R417

SB_25M_X1

SB_25M_X2

4

ASB1A

P1

PCIE_RST#

L1

A_RST#

AD26

A_TX0P

AD27

A_TX0N

AC28

A_TX1P

AC29

A_TX1N

AB29

A_TX2P

AB28

A_TX2N

AB26

A_TX3P

AB27

A_TX3N

AE24

A_RX0P

AE23

A_RX0N

AD25

A_RX1P

AD24

A_RX1N

AC24

A_RX2P

AC25

A_RX2N

AB25

A_RX3P

AB24

A_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

SB820M-1-GP

4

3

Part 1 of 5

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

PCI CLKS

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17

PCI EXPRESS INTERFACES

ALLOW_LDTSTP/DMA_ACTIVE#

CLOCK GENERATOR

G116

GAP-OPEN

AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

DEVSEL#

REQ1#/GPIO40

REQ2#/CLK_REQ8#/GPIO41

PCI INTERFACELPC

REQ3#/CLK_REQ5#/GPIO42

GNT1#/GPO44 GNT2#/GPO45

GNT3#/CLK_REQ7#/GPIO46

LDRQ1#/CLK_REQ6#/GPIO49

INTE#/GPIO 32

INTF# /GPIO33 INTG# /GPIO 34 INTH#/GPIO35

SERIRQ/GPIO48

CPU

INTRUDER_ALERT#

VDDBT_RTC_G

RTC

RTC_AUX_S5_R

21

CLKRUN#

LPCCLK0 LPCCLK1

LFRAME#

PROCHOT#

LDT_STP# LDT_RST#

PCICLK0

PCIRST#

CBE0# CBE1# CBE2# CBE3#

FRAME#

IRDY#

TRDY#

STOP# PERR# SERR#

REQ0#

GNT0#

LOCK#

LAD0 LAD1 LAD2 LAD3

LDRQ0#

LDT_PG

32K_X1 32K_X2

RTCCLK

PCI_CLK0_R

W2 W1 W3 W4 Y1

PCIRST#_SB

V2

AA1 AA4 AA3 AB1

1020 add these nets(INT_VGA_EN#,EDP_EN)

AA5 AB2 AB6

HDMI_SUPPORT#

AB5

dGPU_PRSNT#

AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5

PAR

AF5 AE6 AE4

PCI_REQ#0

AE11

PCI_REQ#1

AH5

PCI_REQ#2

AH4

PCI_REQ#3

AC12

PCI_GND0#

AD12

PCI_GNT1#

AJ5

PE_GPIO1

AH6

PCI_GNT3#

AB12 AB11

PCI_LOOK#

AD7

INT_PIRQE#

AJ6

INT_PIRQ F#

AG6

INT_PIRQG#

AG4 AJ4

H24 H25 J27 J26 H29 H28 G28

LDRQ0#

J25

PCI_REQ#6

AA18 AB19

G21 H21 K19 G22 J24

C1 C2 D2

INTRUDER#

B2

RTC_AUX_S5_R

B1

12

C700

EDP_EN 18

R441 0R0402-PADR441 0R0402-PAD

1 2

LPC_LAD0 36,37 LPC_LAD1 36,37 LPC_LAD2 36,37 LPC_LAD3 36,37

TP65 TPAD14-GPTP65 TPAD14-GP TP80 TPAD14-GPTP80 TPAD14-GP

INT_SERIRQ 36

12

C703

SC1U10V2KX-1GP

DY

TP151 TPAD14-GPT P151 TPAD14-GP

TP95 TPAD14-GPTP95 TPAD14-GP

INT_VGA_EN# 18

PCI_AD23 15 PCI_AD24 15 PCI_AD25 15 PCI_AD26 15 PCI_AD27 15 PCI_AD28 15 PCI_AD29 15 PCI_AD30 15

TP86 TPAD14-GPTP86 TPAD14-GP

TP149 TPAD14-GPT P149 TPAD14-GP TP82 TPAD14-GPTP82 TPAD14-GP TP84 TPAD14-GPTP84 TPAD14-GP TP148 TPAD14-GPT P148 TPAD14-GP

TP83 TPAD14-GPTP83 TPAD14-GP TP92 TPAD14-GPTP92 TPAD14-GP

TP91 TPAD14-GPTP91 TPAD14-GP TP96 TPAD14-GPTP96 TPAD14-GP

LPCCLK0_R 15

LPCCLK1_R 15

1 2 3

LPC_LFRAME# 36,37

NB_ALLOW_LDTSTOP 9

PROCHOT#_SB 6

CPU_PWRGD 6,51 CPU_LDT_STOP# 6 CPU_LDT_RST# 6,51

RTC_CLK 35,36

TP153

TPAD14-GP

SCD1U16V2ZY-2GP

R180

1 2

0R0402-PAD

RN58

SB_1202

PX_EN :Power Xpress enable

PE_GPIO1 :use to turn on the power of Discrete VGA

PE_GPIO0 :use to reset the MXM module when enables Power Xpress

3

SB_1221

1D05V_0D9V_EN 48

SB_1218

1110 add R960,R961

3D3V_S0

12

R440

PX

8K2R2J-3-GP

PX_EN# PE_GPIO0

3D3V_S0

12

PX_EN# 18

1 2

R445

R445 0R2J-2-GP

0R2J-2-GP

PX

SRN22-3-GP

4

EC35

EC35 EC34

EC34

510R2J-1-GP

PX

R627

0R2J-2-GP

DY

DY DY

DY

R458

R439

R439 10KR2J-3-GP

10KR2J-3-GP

DY

12

PE_GPIO0PE_GPIO

1 2 1 2

12

DY

1030 modify the net

R404

PX

8K2R2J-3-GP

PE_GPIO1 43,48,53

DGPU_PWROK

PCLK_FWH 37

SC22P50V2JN-4GP

SC22P50V2JN-4GP SC22P50V2JN-4GP

SC22P50V2JN-4GP

RTC_AUX_S5

EC16 SC22P50V2JN-4GPDYEC16 SC22P50V2JN-4GP

EC46 SC22P50V2JN-4GPDYEC46 SC22P50V2JN-4GP

EC47 SC22P50V2JN-4GPDYEC47 SC22P50V2JN-4GP

12

DY

12

DY

PCLK_KBC 36

NP1 NP2

EC43 SC22P50V2JN-4GPDYEC43 SC22P50V2JN-4GP

12

DY

R176

R176 10KR2J-3-GP

10KR2J-3-GP

SB_1216

RTC1

1

PWR

2

GND NP1 NP2

BAT-CON2-1-GP-U

2nd = 62.70001.041

2

PCI_CLK1 15

PCI_CLK2 15 PCI_CLK3 15 PCI_CLK4 15

PM_CLKRUN# 36

LPC_LAD[0..3]

62.70001.011

2

3D3V_S0 3D3V_S0

DIS_UMA

R625

R625 10KR2J-3-GP

10KR2J-3-GP

1 2

dGPU_PRSNT#

R624

R624 10KR2J-3-GP

10KR2J-3-GP

PX

1 2

SB_1209

3D3V_S5

PCIE_RST# PE_GPIO0

DGPU_PWROK48,52,61

147

4 5

TSLVC08APW-1-GP

2ND = 73.07408.L15

3D3V_VGA 3D3V_S5

12

R433

DY

10KR2F-2-GP

12

C684

DY

SCD1U10V2KX-4GP

SB_1216

LPC_LAD[0..3] 36,37

C702

12

C702

1 2

SC15P50V2JN-2-GP

4

1

2 3

C704

1 2

SC15P50V2JN-2-GP

32K_X1

20MR3F-L-GP

32K_X2

R450

1

noHDMI

R632

R632 10KR2J-3-GP

10KR2J-3-GP

1 2

HDMI_SUPPORT#

R631

R631 10KR2J-3-GP

10KR2J-3-GP

HDMI

1 2

SB_1221

3D3V_S5

U44B

PE_RST

6

73.07408.L16

9

10

147

12 13

U44C

8

TSLVC08APW-1-GP

SB_1130

DY

12

R45710MR2J-L-GPDYR45710MR2J-L-GP

82.30001.661

X-32D768KHZ-34GPU

X-32D768KHZ-34GPU X5

X5

-1 0208

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-SB820_PCIE&PCI_(1/5)

Size Document Number Rev

Date: Sheet

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

1

C853

12

SCD1U10V2KX-5GP

DY

147

U44D

11

TSLVC08APW-1-GP

DGPU_HOLD_RST# 52

of

11 63Tuesday, February 23, 2010

SB

1 2

0R0402-PAD

RN16

DY

1 2 3 4 5

RN60

1

DY

2 3 4 5

DY

DY DY

DY

1 2 3 45

R410

5

NB_PWRGD

SUS_STAT#

R168

1 2

DY

NB_PWRGD_R

12

USB_OC#5

8

USB_OC#4

7

USB_OC#1

6

USB_OC#0

SB_TEST2

8

SB_TEST1

7

SB_TEST0

6

USB_OC#2

USB_OC#3

ICH_PME# PCIE_WAKE# SMB_ALERT#

ECSCI#_1 PM_SLP_S5# PM_SLP_S3# ECSWI#

10KR2J-3-GP

SRN2K2J-4-GP

ECSMI#_KBC

1D8V_S0

3D3V_S0

R158 300R2J-4-GPR158 300R2J-4-GP

1 2

R182 4K7R2J-2-GPR182 4K7R2J-2-GP

NB_PWRGD9,41

D D

3D3V_S5

1 2

R179 10KR2J-3-GP

1 2

R196 10KR2J-3-GP

1 2

R185 10KR2J-3-GPR185 10KR2J-3-GP

1 2

R186 10KR2J-3-GP

RN62

8 7

3D3V_S0

6

SRN10KJ-6-GP

C C

Reference Datashht

Close to SB820

DY

SRN33J-5-GP-U

EC45

DY

1 2

R188 33R2J-2-GPR188 33R2J-2-GP

1 2

R452 33R2J-2-GPR452 33R2J-2-GP

RN61

1 2 3

EC48

EC49

SC12P50V2JN-3GP

DY

1 2

ACZ_BITCLK28

ACZ_SDATAOUT_R15

ACZ_SDATAOUT28

ACZ_SDATAIN028

B B

A A

ACZ_SYNC28 ACZ_RST#28

R456

SMB_CLK33 SMB_DATA33 SMBC0_SB3,16,17 SMBD0_SB3,16,17

C309

SC100P50V2JN-3GP

C309

10KR2J-3-GP

DY

1 2

123

12

DY

EC15

SC12P50V2JN-3GP

DY

1 2

3D3V_S03D3V_S5

678

RN63

RN63 SRN2K2J-2-GP

SRN2K2J-2-GP

4 5

12

C312

C312 SC100P50V2JN-3GP

SC100P50V2JN-3GP

DY

SB_0106

5

4

DY

4

CLK_SB_14M3,11

TPAD14-GP

TPAD14-GP TPAD14-GP

TPAD14-GP

R187

10KR2J-3-GP

1 2

4

KA20GATE36 KBRCIN#36 ECSCI#_136

PCIE_WAKE#26,33

PM_SLP_S3#29,35,36,41,43,46,47,48 PM_SLP_S5#36,46 PM_PWRBTN#36,51

SUS_STAT#9

TP152

TP152 TP160

TP160 TP103

TP103

3D3V_S5

SB_PWRGD41

TPAD14-GP

TPAD14-GP TPAD14-GP

TPAD14-GP

PM_RSMRST#43

TPAD14-GP

TPAD14-GP TPAD14-GP

TPAD14-GP

ACZ_SPKR28

TPAD14-GP

TPAD14-GP TPAD14-GP

TPAD14-GP

R438 0R2J-2-GP

TPAD14-GP

TPAD14-GP TPAD14-GP

TPAD14-GP

ACZ_BIT_CLK ACZ_SDATAOUT_R

ACZ_SDIN1 ACZ_SDIN2 ACZ_SDIN3 ACZ_SYNC_R ACZ_RST#_R

3D3V_S5

TP99TP99 TP155TP155 TP102TP102

TP157

TP157 TP108

TP108 TP106

TP106

TP81

TP81 TP66

TP66

No HDMI function

TP78

TP79

TP79 TP150

TP150 TP146

TP146 TP100

TP100

DY

1 2

ECSWI#36

USB_OC#325 USB_OC#225

USB_OC#025

RN18

1 2 3 4 5

SRN10KJ-6-GP

R181

1 2

TPAD14-GP

TPAD14-GP TPAD14-GP

TPAD14-GP

1 1 1

SUS_STAT# SB_TEST0 SB_TEST1 SB_TEST2

ECSMI#_KBC GEVENT5# SYS_RST#

EC_TMR SMB_ALERT# NB_PWRGD_R

CLK_REQ1# SMARTVOLT2

CLK_SB_14M_R

TP101

TP101 TP105

TP105

TP90

8 7 6

10KR2J-3-GP

10KR2J-3-GP TP67

TP67 TP50

TP50

ICH_PME# RI# S2# PM_SLP_S3# PM_SLP_S5#

GPIO6 GPIO4

GPIO39

SMBC0_SB

SMBD0_SB SMB_CLK SMB_DATA

IR_LED#

DDR3_RST#

USB_OC#5 USB_OC#4 USB_OC#3 USB_OC#2 USB_OC#1 USB_OC#0

3

ASB1D

J2

PCI_PME#/GEVENT4#

K1

RI#/GEVENT22#

D3

SPI_CS3#/GBE_STAT1/GEVENT21#

F1

SLP_S3#

H1

SLP_S5#

F2

PWR_BTN#

H5

PWR_GOOD

G6

SUS_STAT#

B3

TEST0

C4

TEST1/TMS

F6

TEST2

AD21

GA20IN/GEVENT0#

AE21

KBRST#/GEVENT1#

K2

LPC_PME#/GEVENT3#

J29

LPC_SMI#/GEVENT23#

H2

GEVENT5#

J1

SYS_RESET#/GEVENT19#

H6

WAKE#/GEVENT8#

F3

IR_RX1/GEVENT20#

J6

THRMTRIP#/SMBALERT#/GEVENT2#

AC19

NB_PWRGD

G1

RSMRST#

AD19

CLK_REQ4#/SATA_IS0#/GPIO64

AA16

CLK_REQ3#/SATA_IS1#/GPIO63

AB21

SMARTVOLT1/SATA_IS2#/GPIO50

AC18

CLK_REQ0#/SATA_IS3#/GPIO60

AF20

SATA_IS4#/FANOUT3/GPIO55

AE19

SATA_IS5#/FANIN3/GPIO59

AF19

SPKR/GPIO66

AD22

SCL0/GPIO43

AE22

SDA0/GPIO47

F5

SCL1/GPIO227

F4

SDA1/GPIO228

AH21

CLK_REQ2#/FANIN4/GPIO62

AB18

CLK_REQ1#/FANOUT4/GPIO61

E1

IR_LED#/LLB#/GPIO184

AJ21

SMARTVOLT2/SHUTDOWN#/GPIO51

H4

DDR3_RST#/GEVENT7#

D5

GBE_LED0/GPIO183

D7

GBE_LED1/GEVENT9#

G5

GBE_LED2/GEVENT10#

K3

GBE_STAT0/GEVENT11#

AA20

CLK_REQG#/GPIO65/OSCIN/IDLEEXT#

H3

BLINK/USB_OC7#/GEVENT18#

D1

USB_OC6#/IR_TX1/GEVENT6#

E4

USB_OC5#/IR_TX0/GEVENT17#

D4

USB_OC4#/IR_RX0/GEVENT16#

E8

USB_OC3#/AC_PRES/TDO/GEVENT15#

F7

USB_OC2#/TCK/GEVENT14#

E7

USB_OC1#/TDI/GEVENT13#

F8

USB_OC0#/TRST#/GEVENT12#

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0/GPIO167

M2

AZ_SDIN1/GPIO168

M1

AZ_SDIN2/GPIO169

M4

AZ_SDIN3/GPIO170

N2

AZ_SYNC

P2

AZ_RST#

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL/RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL/TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST#

V7

GBE_PHY_INTR

E23

PS2_DAT/SDA4/GPIO187

E24

PS2_CLK/SCL4/GPIO188

F21

SPI_CS2#/GBE_STAT2/GPIO166

G29

FC_RST#/GPO160

D27

PS2KB_DAT/GPIO189

F28

PS2KB_CLK/GPIO190

F29

PS2M_DAT/GPIO191

E27

PS2M_CLK/GPIO192

SB820M-1-GP

3

Part 4 of 5

HD AUDIO

GBE LAN

USBCLK/14M_25M_48M_OSC

USB_RCOMP

USB_FSD1P/GPIO186

USB_FSD1N

USB_FSD0P/GPIO185

USB_FSD0N

USB_HSD13P USB_HSD13N

USB 1.1USB MISCEMBEDDED CTRL

USB_HSD12P

ACPI / WAKE UP EVENTS

GPIO

USB OC

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199 EC_PWM3/EC_TIMER3/GPIO200

EMBEDDED CTRL

USB_HSD12N USB_HSD11P

USB_HSD11N USB_HSD10P

USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P

USB 2.0

USB_HSD6N USB_HSD5P

USB_HSD5N USB_HSD4P

USB_HSD4N USB_HSD3P

USB_HSD3N USB_HSD2P

USB_HSD2N USB_HSD1P

USB_HSD1N USB_HSD0P

USB_HSD0N

SCL2/GPIO193

SDA2/GPIO194

SCL3_LV/GPIO195

SDA3_LV/GPIO196

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217

KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

A10 G19

J10 H11

H9 J8

B12 A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

2

USB_PCOMP

1 2

R169

R169 11K8R2F-GP

11K8R2F-GP

1%

Place R near pin14. Route it with 10mils Trace width and 25mils spacing to any signals in X, Y, Z directions.

R177

R177 10KR2J-3-GP

10KR2J-3-GP

Place these close SB820

1 2

DY

CLK48_USB_R2

SC10P50V2JN-4GP

1020 modify these nets

USBPP12 33 USBPN12 33

USBPP9 19 USBPN9 19

USBPP7 24 USBPN7 24

USBPP6 25 USBPN6 25

USBPP5 25 USBPN5 25

USBPP4 25 USBPN4 25

USBPP3 25 USBPN3 25

USBPP1 33 USBPN1 33

USBPP0 25 USBPN0 25

RN59

1 2 3 4 5

SRN10KJ-6-GP

1105 modify these nets

8 7 6

SB_GPO199 15 SB_GPO200 15

Strap Pin / define to use LPC or SPI ROM

JE70-DN

Title

ATi-SB820_USB&GPIO_(2/5)

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

JE70-DN

1

CLK48_USB 3

DY

1 2

C367

USB

Pair

Device

12 MINI2 CARD

11

NC

10

NC

CCD

9

NC

8

7 Bluetooth

6

USB3

5

OCP3#

OCP2#

OCP0#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

4

3

2

1

12 63Tuesday, February 23, 2010

USB2

CardReader

USB4

NC

MINI1 CARD

USB10

of

SB

5

D D

SATA_TXP022

SATA HDD

SATA ODD

C C

SATA_TXN022

SATA_RXN022 SATA_RXP022

SATA_TXP123 SATA_TXN123

SATA_RXN123 SATA_RXP123

Depand on SB820 Ver.

Very Close to SB820

1D1V_AVDD_SATA_S0

C683

C683 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

12

DY

82.30020.A31

2ND = 82.30020.791

2ND = 82.30020.791 3RD = 82.30020.851

3RD = 82.30020.851

B B

12

C692

C692 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

DY

12

R436

X4XTAL-25MHZ-120-GP-U

DY

R436 10MR2J-L-GP

10MR2J-L-GP

DY

SATA_X2_R SATA_X2

4

1KR2F-3-GP

1 2 1 2

R173 931R2F-1-GPR173 931R2F-1-GP

SATA_LED#40

1 2

R437 300R2J-4-GP

DY

SB_SPI_MISO

TP97TPAD14-GP TP97TPAD14-GP

SPI_MOSI_R

TP107TPAD14-GP TP107TPAD14-GP

ICH_SPICLK

TP104TPAD14-GP TP104TPAD14-GP

SB_SPI_HOLD

TP88TPAD14-GP TP88TPAD14-GP

ICH_SPICS0#

TP158TPAD14-GP TP158TPAD14-GP

R175

SATA_CAL SATA_CALN

SATA_LED#

SATA_X1

ASB1B

AH9

SATA_TX0P

AJ9

SATA_TX0N

AJ8

SATA_RX0N

AH8

SATA_RX0P

AH10

SATA_TX1P

AJ10

SATA_TX1N

AG10

SATA_RX1N

AF10

SATA_RX1P

AG12

SATA_TX2P

AF12

SATA_TX2N

AJ12

SATA_RX2N

AH12

SATA_RX2P

AH14

SATA_TX3P

AJ14

SATA_TX3N

AG14

SATA_RX3N

AF14

SATA_RX3P

AG17

SATA_TX4P

AF17

SATA_TX4N

AJ17

SATA_RX4N

AH17

SATA_RX4P

AJ18

SATA_TX5P

AH18

SATA_TX5N

AH19

SATA_RX5N

AJ19

SATA_RX5P

AB14

SATA_CALRP

AA14

SATA_CALRN

AD11

SATA_ACT#/GPIO67

AD16

SATA_X1

AC16

SATA_X2

J5

SPI_DI/GPIO164

E2

SPI_DO/GPIO163

K4

SPI_CLK/GPIO162

K9

SPI_CS1#/GPIO165

G2

ROM_RST#/GPIO161

SB820M-1-GP

3

Part 2 of 5

SERIAL ATA

HW MONITOR

SPI ROM

FC_CLK

FC_FBCLKOUT

FC_FBCLKIN

FC_OE#/GPIOD145

FC_AVD#/GPIOD146

FC_WE#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150

FC_INT1/GPIOD144 FC_INT2/GPIOD147

FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140 FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

FLASH

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173

TEMPIN3/TALERT#/GPIO174

TEMP_COMM

VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

NC#G27 NC2#Y2

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

G27 Y2

TEMPIN0 TEMPIN1 TEMPIN2

PSW_CLR# VIN1 VIN2 VIN3

VIN5 VIN6 VIN7

2

Put near Dimm Door

ALERT# 35

MEM_1V5 48

PSW_CLR#

GAP-OPEN

G48

21

TEMPIN1 TEMPIN0 TEMPIN2

VIN2 VIN1 VIN3

VIN7 VIN6

VIN5

RN15

1 2 3 4 5

SRN10KJ-6-GP

RN17

1 2 3 4 5

SRN10KJ-6-GP

SRN10KJ-6-GP RN14

RN14

1 2 3 4 5

SRN10KJ-6-GP

1

8 7 6

3D3V_S5

RN29

2 3 1

4

SRN10KJ-5-GP

1029 modify the net(SATA_LED#)

A A

3D3V_S0

R178 10KR2J-3-GPR178 10KR2J-3-GP

1 2

5

4

PSW_CLR# ALERT#

SATA_LED#

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-SB820_SATA-IDE_(3/5)

Size Document Number Rev

A3

Date: Sheet

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

SB

of

13 63Tuesday, February 23, 2010

of

13 63Tuesday, February 23, 2010

of

13 63Tuesday, February 23, 2010

1

SB

5

3D3V_S0

C379

D D

SC22U6D3V5MX-2GP

C380

12

DY

SC4D7U6D3V3KX-GP

SC10U10V5ZY-1GP

C390

12

DY

SCD1U10V2MX-3GP

C376

12

131mA

C369

12

71mA

SCD1U10V2MX-3GP

DY

SCD1U10V2MX-3GP

C333

12

GPIOD not used

R163

1 2

0R0402-PAD

SC22U6D3V5MX-2GP

C299

12

43mA

0R0402-PAD

600mA

C288

12

DY

SC1U6D3V2KX-GP

SCD1U10V2MX-3GP

3D3V_VDDPL_PCIE_S03D3V_S0

L29

1 2

PBY160808T-600Y-N-GP

20mil Width

1 2

BLM15AG221SS1D-GP

1D1V_PCIE_VDDR_S01D1V_S0

L30

42R 3A

L35

1 2

BLM15AG221SS1D-GP

20mil Width

Close to SB820

C C

C289

12

C297

SCD1U10V2MX-3GP

SC2D2U10V3KX-1GP

12

C286

3D3V_VDDPL_SATA_S03D3V_S0

C352

C351

12

Close to SB820

1D1V_S0 1D1V_AVDD_SATA_S0

L44

1 2

PBY160808T-600Y-N-GP

1 2

3D3V_S5

PBY160808T-221Y-N-GP

B B

1D1V_S5

BLM15AG221SS1D-GP

L34

1 2

L45

C678

12

C366

SCD1U10V2MX-3GP

C322

12

SC22U6D3V5MX-2GP

3V_AVDD_USB_S5

12

C685

SC10U6D3V3MX-GP

1D1V_AVDD_USB_S5

12

SC2D2U10V3KX-1GP

DY

SC1U6D3V2KX-GP

12

C331

DY

12

C363

12

C323

SC1U6D3V2KX-GP

12

C334

SC1U10V3KX-3GP

DY

567mA

C345

12

658mA

SCD1U10V2MX-3GP

12

C339

SC1U10V3KX-3GP

SCD1U10V2MX-3GP

12

C343

TBDmA

4

PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE.

ASB1C

93mA

AC21

AA19

AF22 AE25 AF24 AC22

AE28

AD14 AJ20

AF18 AH20

AG19

AE18 AD18 AE16

AH1

V6 Y19 AE5

AA2 AB4 AC8 AA7 AA9 AF7

U26 V22 V26 V27 V28 V29

W22 W26

A18 A19 A20 B18 B19 B20 C18 C20 D18 D19 D20 E19

C11 D11

ASB1C

VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP VDDIO_33_PCIGP

VDDIO_18_FC VDDIO_18_FC VDDIO_18_FC VDDIO_18_FC

POWER

VDDPL_33_PCIE

VDDAN_11_PCIE VDDAN_11_PCIE VDDAN_11_PCIE VDDAN_11_PCIE VDDAN_11_PCIE VDDAN_11_PCIE VDDAN_11_PCIE VDDAN_11_PCIE

VDDPL_33_SATA VDDAN_11_SATA

VDDAN_11_SATA VDDAN_11_SATA VDDAN_11_SATA VDDAN_11_SATA VDDAN_11_SATA VDDAN_11_SATA

VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S VDDAN_33_USB_S

VDDAN_11_USB_S VDDAN_11_USB_S

SB820M-1-GP

Part 3 of 5

PCI/GPIO I/O

FLASH I/O

PCI EXPRESSSERIAL ATA

USB I/O

CORE S03.3V_S5 I/O

VDDAN_11_CLK VDDAN_11_CLK VDDAN_11_CLK VDDAN_11_CLK VDDAN_11_CLK VDDAN_11_CLK VDDAN_11_CLK VDDAN_11_CLK

VDDRF_GBE_S

VDDIO_33_GBE_S

VDDCR_11_GBE_S VDDCR_11_GBE_S

GBE LAN

VDDIO_GBE_S VDDIO_GBE_S

VDDIO_33_S VDDIO_33_S VDDIO_33_S VDDIO_33_S VDDIO_33_S VDDIO_33_S VDDIO_33_S VDDIO_33_S

VDDCR_11_S VDDCR_11_S

VDDIO_AZ_S

CORE S5

VDDCR_11_USB_S VDDCR_11_USB_S

VDDPL_33_SYS

VDDPL_11_SYS_S

VDDPL_33_USB_S

PLL CLKGEN I/O

VDDAN_33_HWM_S

VDDXL_33_S

VDDCR_11 VDDCR_11 VDDCR_11 VDDCR_11 VDDCR_11 VDDCR_11 VDDCR_11 VDDCR_11 VDDCR_11

N13 R15 N17 U13 U17 V12 V18 W12 W18

20mil

K28 K29 J28 K26 J21 J20 K21 J22

V1 M10

L7 L9

M6 P8

A21 D21 B21 K10 L10 J9 T6 T8

F26 G26

M8 A11

B11

47mA

M21

62mA

L22

17mA

F19 D6 L20

C699

12

SCD1U10V2MX-3GP

VDDIO_18_FC

C292

C308

12

DY

SCD1U10V2MX-3GP

C324

12

DY

12

C344

SCD1U10V2KX-4GP

GBE PHY not used

3D3V_VDDIO_AZ_S5

3V_VDDPL_S0 1D1V_VDDPL_S5 3V_AVDD_USB_S5

5mA

3D3V_AVDD_HWM_S5

3D3V_VDDXL_S5

C342

3

12

C353

SC10U6D3V3MX-GP

R153

1 2

0R0603-PAD

510mA

12

C349

DY

SCD1U10V2MX-3GP

1D1V_S01D1V_SB_CLKGEN_S0

32mA

113mA

3D3V_VDDIO_AZ_S5

C373

12

SB_1130

SC2D2U10V3KX-1GP

C337

SCD1U10V2MX-3GP

SC2D2U10V3KX-1GP

Decoupled along with the VDDAN_33_USB_S power rail. Separate ferrite bead or additional capacitors are not required

L33

12

BLM15AG221SS1D-GP

TBDmA

3D3V_VDDXL_S5 3D3V_S5

12

SC2D2U10V3KX-1GP

12

C356

SCD1U10V2MX-3GP

R184

1 2

0R0402-PAD

R620

1 2

197mA

C690

12

SC10U6D3V3MX-GP

SCD1U10V2MX-3GP

C664

12

SC2D2U10V3KX-1GP

DY

0R2J-2-GP

C361

12

DY

12

C355

C340

SC1U6D3V2KX-GP

C357

C677

12

SC2D2U10V3KX-1GP

SCD1U10V2MX-3GP

C291

12

3D3V_S5

3D3V_S0

SC1U6D3V2KX-GP

1D1V_VDDCR_USB_S5

C362

1 2

BLM15AG221SS1D-GP

12

SCD1U10V2MX-3GP

1D1V_S0

12

C338

DY

SC1U6D3V2KX-GP

3D3V_S5

C368

12

SCD1U10V2MX-3GP

C295

12

SC1U6D3V2KX-GP

L46

1D1V_S5

2

ASB1E

Part 5 of 5

VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA VSSIO_SATA

VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB

EFUSE VSSAN_HWM VSSXL

VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK

Part 5 of 5

GROUND

VSSPL_SYS

VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK VSSIO_PCIECLK

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AB16 AC14 AE12 AE14

AF11 AF13 AF16

AH11 AH13 AH16

Y14 Y16

AF9

AG8 AH7

AJ7 AJ11 AJ13 AJ16

B10

K11

D10

D12

D14

D17

F12

F14

F16

G11

F18

H12

H14

H16

H18

J11

J19

K12

K14

K16

K18

H19

M19

P21

P20

M22 M24 M26

P22

P24

P26

T20

T22

T24

V20

J23

A9

B9

E9 F9

C9

D9

Y4 D8

SB820M-1-GP

AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20

1

SCD1U10V2MX-3GP

SC2D2U10V3KX-1GP

C325

12

C326

SCD1U10V2MX-3GP

SC2D2U10V3KX-1GP

A A

5

SCD1U10V2MX-3GP

L32

12

BLM15AG221SS1D-GP

3D3V_S03V_VDDPL_S0

1D1V_VDDPL_S5 1D1V_S5

C310

12

SC2D2U10V3KX-1GP

12

C330

SCD1U10V2MX-3GP

4

L31

12

BLM15AG221SS1D-GP

3D3V_AVDD_HWM_S5

R183

1 2

0R0402-PAD

12

C370

SCD1U10V2MX-3GP

3D3V_S5

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R . O .C.

Taipei Hsien 221, Taiwan, R . O .C.

Title

ATi-SB820_POWER&GND_(4/5)

Size Document Num ber Rev

Custom

Date: Sheet

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R . O .C.

JE70-DN

1

SB

of

14 63Friday, February 12, 2010

of

14 63Friday, February 12, 2010

of

14 63Friday, February 12, 2010

5

4

3

2

1

REQUIRED STRAPS

D D

R210

R459

12

10KR2J-3-GP

C C

R460

12

DY

10KR2J-3-GP

B B

PULL HIGH

PULL LOW

PCI_CLK1 PCI_CLK2

ALLOW PCIE Gen2

DEFAULT

FORCE PCIE Gen1

R207

DY

12

10KR2J-3-GP

RN19

SRN10KJ-5-GP

Watchdog Timer Enabled

Watchdog Timer Disabled

DEFAULT

R210

DY

R455

12

10KR2J-3-GP

1

23

R454

4

PCI_CLK3

USE DEBUG STRAP

IGNORE DEBUG STRAP

DEFAULT

3D3V_S0 3D3V_S5

R415

12

DY

10KR2J-3-GP

R416

12

DY

10KR2J-3-GP

PCI_CLK4

non_Fusion CLOCK MODE

DEFAULT

FUSION CLOCK MODE

REQUIRED SYSTEM STRAPS

R412

12

10KR2J-3-GP

12

10KR2J-3-GP

R412

12

DY

10KR2J-3-GP

R411

12

10KR2J-3-GP

1118 modify R412,R411

LPC_CLK0

EC ENABLED

EC DISABLED

DEFAULT

LPC_CLK1

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

R192

12

DY

10KR2J-3-GP

R189

12

10KR2J-3-GP

AZ_SDOUT

LOW POWER MODE

PERFORMANCE MODE

DEFAULT

R156

R166

DY

R160

GPIO200

12

DY

10KR2J-3-GP

R159

12

DY

2K2R2F-GP

GPIO199

12

10KR2J-3-GP

12

2K2R2F-GP

H,H = Reserved

H,L = SPI ROM

L,H = LPC ROM (Default)

L,L = FWH ROM

PCI_CLK1 11 PCI_CLK2 11 PCI_CLK3 11

PCI_CLK4 11

LPCCLK0_R 11 LPCCLK1_R 11

ACZ_SDATAOUT_R 12 SB_GPO200 12 SB_GPO199 12

PULL HIGH

PULL LOW

DEBUG STRAPS

TPAD14-GP

TPAD14-GP TPAD14-GP

TPAD14-GP

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

TP89

TP89 TP87

TP87 TP85

TP85 TP93

TP93 TP98

TP98 TP156

TP156 TP159

TP159 TP154

TP154

PCI_AD23 11 PCI_AD24 11 PCI_AD25 11 PCI_AD26 11 PCI_AD27 11 PCI_AD28 11 PCI_AD29 11 PCI_AD30 11

PCI_AD25 PCI_AD24

USE FC PLL

DEFAULT

BYPASS FC PLL

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULT

ENABLE PCI MEM BOOT

NOTE: SB820 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK

A A

5

4

3

Note: SB820 has 15K internal P U FOR P CI_AD[27:23]

JE70-DN

Title

ATi-SB820_STRAPPING_(5/5)

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

1

SB

of

15 63Tuesday, February 23, 2010

of

15 63Tuesday, February 23, 2010

of

15 63Tuesday, February 23, 2010

SB

5

MEM_MB_ADD05 MEM_MB_ADD15 MEM_MB_ADD25 MEM_MB_ADD35 MEM_MB_ADD45 MEM_MB_ADD55 MEM_MB_ADD65 MEM_MB_ADD75 MEM_MB_ADD85 MEM_MB_ADD95 MEM_MB_ADD105 MEM_MB_ADD115 MEM_MB_ADD125 MEM_MB_ADD135

D D

C C

B B

VREF_DDR_MEM DDR_VREF_DQ

A A

MEM_MB_ADD145 MEM_MB_ADD155

MEM_MB_BANK25 MEM_MB_BANK05

MEM_MB_BANK15

MEM_MB_DATA05 MEM_MB_DATA15 MEM_MB_DATA25 MEM_MB_DATA35 MEM_MB_DATA45 MEM_MB_DATA55 MEM_MB_DATA65 MEM_MB_DATA75 MEM_MB_DATA85

MEM_MB_DATA95 MEM_MB_DATA105 MEM_MB_DATA115 MEM_MB_DATA125 MEM_MB_DATA135 MEM_MB_DATA145 MEM_MB_DATA155 MEM_MB_DATA165 MEM_MB_DATA175 MEM_MB_DATA185 MEM_MB_DATA195 MEM_MB_DATA205 MEM_MB_DATA215 MEM_MB_DATA225 MEM_MB_DATA235 MEM_MB_DATA245 MEM_MB_DATA255 MEM_MB_DATA265 MEM_MB_DATA275 MEM_MB_DATA285 MEM_MB_DATA295 MEM_MB_DATA305 MEM_MB_DATA315 MEM_MB_DATA325 MEM_MB_DATA335 MEM_MB_DATA345 MEM_MB_DATA355 MEM_MB_DATA365 MEM_MB_DATA375 MEM_MB_DATA385 MEM_MB_DATA395 MEM_MB_DATA405 MEM_MB_DATA415 MEM_MB_DATA425 MEM_MB_DATA435 MEM_MB_DATA445 MEM_MB_DATA455 MEM_MB_DATA465 MEM_MB_DATA475 MEM_MB_DATA485 MEM_MB_DATA495 MEM_MB_DATA505 MEM_MB_DATA515 MEM_MB_DATA525 MEM_MB_DATA535 MEM_MB_DATA545 MEM_MB_DATA555 MEM_MB_DATA565 MEM_MB_DATA575 MEM_MB_DATA585 MEM_MB_DATA595 MEM_MB_DATA605 MEM_MB_DATA615 MEM_MB_DATA625 MEM_MB_DATA635

MEM_MB_DQ S0_N5 MEM_MB_DQ S1_N5 MEM_MB_DQ S2_N5 MEM_MB_DQ S3_N5 MEM_MB_DQ S4_N5 MEM_MB_DQ S5_N5 MEM_MB_DQ S6_N5 MEM_MB_DQ S7_N5

MEM_MB_DQ S0_P5

MEM_MB_DQ S1_P5

MEM_MB_DQ S2_P5

MEM_MB_DQ S3_P5

MEM_MB_DQ S4_P5

MEM_MB_DQ S5_P5

MEM_MB_DQ S6_P5

MEM_MB_DQ S7_P5

MEM_MB0_O DT05 MEM_MB0_O DT15

C455

12

SC1KP50V2KX-1GP

M_B_RST #5

12

C492

0D75V_S3

C454

SC1KP50V2KX-1GP

SC2D2U6D3V3KX-GP

5

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

12

VTT2

2ND = 62.10017.V51

2ND = 62.10017.V51 3RD = 62.10017.M51

3RD = 62.10017.M51

1106 modify ADM1

ADM1

DDR3-204P-97-GP

62.10017.W11

NP1

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

EVENT#

199

VDDSPD

197

SA0

201

SA1

77

NC#1

122

NC#2

125

NC#/TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

REVERSE TYPE

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

4

MEM_MB_RAS# 5 MEM_MB_W E# 5 MEM_MB_CAS# 5

MEM_MB0_C S#0 5 MEM_MB0_C S#1 5

MEM_MB_CKE0 5 MEM_MB_CKE1 5

MEM_MB_CLK5_P 5 MEM_MB_CLK5_N 5

MEM_MB_CLK4_P 5 MEM_MB_CLK4_N 5

MEM_MB_DM0 5 MEM_MB_DM1 5 MEM_MB_DM2 5 MEM_MB_DM3 5 MEM_MB_DM4 5 MEM_MB_DM5 5 MEM_MB_DM6 5 MEM_MB_DM7 5

M_B_EVENT#

SA0_DIM1 SA1_DIM1

(B0)

1D5V_S3

Layout Note: Place these Caps near SO-DIMMA0.

4

SMBD0_SB 3,12,17 SMBC0_SB 3,12,17

SC2D2U6D3V3KX-GP

SA1_DIM1 SA0_DIM1

DY

1021 add R880~883

1106 modify R880~R883

12

C443

C443 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

1D5V_S3

C435

SC1U10V2KX-1GP

DY

C444

3D3V_S0

DY

12

SB_0106

VREF_DDR_MEMDDR_VREF_S3

R291

DY

DDR_VREF_DQ

1 2

0R3J-0-U-GP

R284

1 2

0R3J-0-U-GP

1029 add R934,R935

1105 modify R934,R935

3D3V_S03D3V_S0

R256

R256 10KR2J-3-GP

10KR2J-3-GP

R257

R257 10KR2J-3-GP

10KR2J-3-GP

12

DY

12

R258

R258 10KR2J-3-GP

10KR2J-3-GP

R259

R259 10KR2J-3-GP

10KR2J-3-GP

12

1029 delete C338,C331

SODIMM A DECOUPLING

12

C446

C458

SC10U6D3V3MX-GP

3DIMM

C433

C436

SC1U10V2KX-1GP

12

C449

3

Note: If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is SO-DIMMA TS Address is

Check if SB need Memhot event

DY

1 2

R260 0R2J-2-GP

DY

CPU_MEMHOT#6

1 2

R276 0R2J-2-GP

M_B_EVENT#

M_A_EVENT#

2

M_A_EVENT# 17

1

VREF_DDR_MEM

1D5V_S3

1 2 3

SRN1KJ-7-GP

12

C456

SC10U6D3V3MX-GP

12

C448

C442

SC10U6D3V3MX-GP

SRN1KJ-7-GP

/$<287/RFDWHFORVHWR',00

SCD1U10V2KX-5GP

12

DY

DDR_VREF_DQ

1D5V_S3

1 2 3

SRN1KJ-7-GP

C434

C450

SCD1U10V2KX-5GP

/$<287/RFDWHFORVHWR',00

3

RN41

RN39

VREF_DDR_MEM

12

C497

4

DDR_VREF_DQ

12

C468

4

2

SCD1U10V2KX-4GP

12

C494

SCD1U10V2KX-4GP

12

C479

SCD1U10V2KX-4GP

12

C447

C447 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

12

C439

C439 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

DDRIII_SO-DIMM SKT_1

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

of

16 63Tuesday, February 23, 2010

1

SB

5

MEM_MA_ADD05 MEM_MA_ADD15 MEM_MA_ADD25 MEM_MA_ADD35 MEM_MA_ADD45 MEM_MA_ADD55 MEM_MA_ADD65 MEM_MA_ADD75 MEM_MA_ADD85 MEM_MA_ADD95 MEM_MA_ADD105 MEM_MA_ADD115 MEM_MA_ADD125 MEM_MA_ADD135

D D

C C

B B

VREF_DDR_MEM DDR_VREF_DQ

MEM_MA_ADD145 MEM_MA_ADD155

MEM_MA_BANK25 MEM_MA_BANK05

MEM_MA_BANK15

MEM_MA_DATA05 MEM_MA_DATA15 MEM_MA_DATA25 MEM_MA_DATA35 MEM_MA_DATA45 MEM_MA_DATA55 MEM_MA_DATA65 MEM_MA_DATA75 MEM_MA_DATA85 MEM_MA_DATA95 MEM_MA_DATA105 MEM_MA_DATA115 MEM_MA_DATA125 MEM_MA_DATA135 MEM_MA_DATA145 MEM_MA_DATA155 MEM_MA_DATA165 MEM_MA_DATA175 MEM_MA_DATA185 MEM_MA_DATA195 MEM_MA_DATA205 MEM_MA_DATA215 MEM_MA_DATA225 MEM_MA_DATA235 MEM_MA_DATA245 MEM_MA_DATA255 MEM_MA_DATA265 MEM_MA_DATA275 MEM_MA_DATA285 MEM_MA_DATA295 MEM_MA_DATA305 MEM_MA_DATA315 MEM_MA_DATA325 MEM_MA_DATA335 MEM_MA_DATA345 MEM_MA_DATA355 MEM_MA_DATA365 MEM_MA_DATA375 MEM_MA_DATA385 MEM_MA_DATA395 MEM_MA_DATA405 MEM_MA_DATA415 MEM_MA_DATA425 MEM_MA_DATA435 MEM_MA_DATA445 MEM_MA_DATA455 MEM_MA_DATA465 MEM_MA_DATA475 MEM_MA_DATA485 MEM_MA_DATA495 MEM_MA_DATA505 MEM_MA_DATA515 MEM_MA_DATA525 MEM_MA_DATA535 MEM_MA_DATA545 MEM_MA_DATA555 MEM_MA_DATA565 MEM_MA_DATA575 MEM_MA_DATA585 MEM_MA_DATA595 MEM_MA_DATA605 MEM_MA_DATA615 MEM_MA_DATA625 MEM_MA_DATA635

MEM_MA_DQS0_N5 MEM_MA_DQS1_N5 MEM_MA_DQS2_N5 MEM_MA_DQS3_N5 MEM_MA_DQS4_N5 MEM_MA_DQS5_N5 MEM_MA_DQS6_N5 MEM_MA_DQS7_N5

MEM_MA_DQS0_P5 MEM_MA_DQS1_P5 MEM_MA_DQS2_P5 MEM_MA_DQS3_P5 MEM_MA_DQS4_P5 MEM_MA_DQS5_P5 MEM_MA_DQS6_P5 MEM_MA_DQS7_P5

MEM_MA0_ODT05 MEM_MA0_ODT15

C457

3DIMM

SC1KP50V2KX-1GP

M_A_RST#5

12

C469

0D75V_S3

SC1KP50V2KX-1GP

ADM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

12

VTT2

C489

DDR3-204P-9 9-GP

62.10017.W01

2ND = 62.10017.V31

2ND = 62.10017.V31 3RD = 62.10017.M41

3RD = 62.10017.M41

SC2D2U6D3V3KX-GP

NP1

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

M_A_EVENT#

198

EVENT#

199

VDDSPD

SA0_DIM2

197

SA0

SA1_DIM2

201

SA1

77

NC#1

(A0)

122

NC#2

125

NC#/TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

STANDARD TYPE

195

VSS

196

VSS

205

VSS

206

VSS

1D5V_S3

MEM_MA_RAS# 5 MEM_MA_WE# 5 MEM_MA_CAS# 5

MEM_MA0_CS#0 5 MEM_MA0_CS#1 5

MEM_MA_CLK5_P 5 MEM_MA_CLK5_N 5

MEM_MA_CLK4_P 5 MEM_MA_CLK4_N 5

MEM_MA_DM0 5 MEM_MA_DM1 5 MEM_MA_DM2 5 MEM_MA_DM3 5 MEM_MA_DM4 5 MEM_MA_DM5 5 MEM_MA_DM6 5 MEM_MA_DM7 5

SMBD0_SB 3,12,16

SMBC0_SB 3,12,16

M_A_EVENT# 16

1106 modify ADM2

A A

5

C482

SC2D2U6D3V3KX-GP

4

3D3V_S0

4

3

MEM_MA_CKE0 5 MEM_MA_CKE1 5

SA1_DIM2 SA0_DIM2

12

C445

SC10U6D3V3MX-GP

C470

SCD1U10V2KX-5 GP

12

3DIMM

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is SO-DIMMA TS Address is

If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is SO-DIMMA TS Address is

3D3V_S03D3V_S0

12

R285

R287

10KR2J-3-GP

12

R286

R286 10KR2J-3-GP

10KR2J-3-GP

DY

12

10KR2J-3-GP

R288

R288 10KR2J-3-GP

10KR2J-3-GP

DY

1021 add R884~R887

12

C465

SC10U6D3V3MX-GP

C488

SCD1U10V2KX-5 GP

12

VREF_DDR_MEM DDR_VREF_DQ

3

MEM_MA_ADD05 MEM_MA_ADD15 MEM_MA_ADD25 MEM_MA_ADD35 MEM_MA_ADD45 MEM_MA_ADD55 MEM_MA_ADD65 MEM_MA_ADD75 MEM_MA_ADD85 MEM_MA_ADD95 MEM_MA_ADD105 MEM_MA_ADD115 MEM_MA_ADD125 MEM_MA_ADD135 MEM_MA_ADD145 MEM_MA_ADD155

MEM_MA_BANK25 MEM_MA_BANK05

MEM_MA_BANK15

MEM_MA_DATA05 MEM_MA_DATA15 MEM_MA_DATA25 MEM_MA_DATA35 MEM_MA_DATA45 MEM_MA_DATA55 MEM_MA_DATA65 MEM_MA_DATA75 MEM_MA_DATA85 MEM_MA_DATA95 MEM_MA_DATA105 MEM_MA_DATA115 MEM_MA_DATA125 MEM_MA_DATA135 MEM_MA_DATA145 MEM_MA_DATA155 MEM_MA_DATA165 MEM_MA_DATA175 MEM_MA_DATA185 MEM_MA_DATA195 MEM_MA_DATA205 MEM_MA_DATA215 MEM_MA_DATA225 MEM_MA_DATA235 MEM_MA_DATA245 MEM_MA_DATA255 MEM_MA_DATA265 MEM_MA_DATA275 MEM_MA_DATA285 MEM_MA_DATA295 MEM_MA_DATA305 MEM_MA_DATA315 MEM_MA_DATA325 MEM_MA_DATA335 MEM_MA_DATA345 MEM_MA_DATA355 MEM_MA_DATA365 MEM_MA_DATA375 MEM_MA_DATA385 MEM_MA_DATA395 MEM_MA_DATA405 MEM_MA_DATA415 MEM_MA_DATA425 MEM_MA_DATA435 MEM_MA_DATA445 MEM_MA_DATA455 MEM_MA_DATA465 MEM_MA_DATA475 MEM_MA_DATA485 MEM_MA_DATA495 MEM_MA_DATA505 MEM_MA_DATA515 MEM_MA_DATA525 MEM_MA_DATA535 MEM_MA_DATA545 MEM_MA_DATA555 MEM_MA_DATA565 MEM_MA_DATA575 MEM_MA_DATA585 MEM_MA_DATA595 MEM_MA_DATA605 MEM_MA_DATA615 MEM_MA_DATA625 MEM_MA_DATA635

MEM_MA_DQS0_N5 MEM_MA_DQS1_N5 MEM_MA_DQS2_N5 MEM_MA_DQS3_N5 MEM_MA_DQS4_N5 MEM_MA_DQS5_N5 MEM_MA_DQS6_N5 MEM_MA_DQS7_N5

MEM_MA_DQS0_P5 MEM_MA_DQS1_P5 MEM_MA_DQS2_P5 MEM_MA_DQS3_P5 MEM_MA_DQS4_P5 MEM_MA_DQS5_P5 MEM_MA_DQS6_P5 MEM_MA_DQS7_P5

MEM_MA1_ODT05 MEM_MA1_ODT15

C474

SC1KP50V2KX-1GP

M_A_RST#5

12

C491

0D75V_S3

3DIMM

SC1KP50V2KX-1GP

1D5V_S3

12

R283

R456,R466 CLOSE TO ADM2

2K2R2F-GP

DY

R282 0R0402-PADR282 0R0402-PAD

12

R290 0R0402-PADR290 0R0402-PAD

12

1026 modify these nets

R289

R289 2K2R2F-GP

2K2R2F-GP

DY

1 2

1D5V_S3

12

C481

DY

SCD1U10V2KX-4 GP

SODIMM B DECOUPLING

1D5V_S3

12

C467

3DIMM

C476

C477

SC1U10V2KX-1GP

12

DY

C478

SC10U6D3V3MX-GP

3DIMM

SC1U10V2KX-1GP

12

C464

C466

SC10U6D3V3MX-GP

3DIMM

C471

SCD1U10V2KX-5 GP

12

DY

SB_0106

C473

3DIMM

SC2D2U6D3V3KX-GP

ADM3

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

12

VTT2

DDR3-240P-28-GP

2ND = 62.10017.S01

2ND = 62.10017.S01 3RD = 62.10017.V61

3RD = 62.10017.V61

3DIMM

1021 modify ADM3

62.10017.R91

NC#125/TEST

2

NP1

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

M_A_EVENT#

198

EVENT#

199

VDDSPD

REVERSE TYPE

NC#77

NC#122

SA0_DIM3

197

SA0

SA1_DIM3

201

SA1

77 122 125

75

VDD

76

VDD

81

VDD

82

VDD

87

VDD

88

VDD

93

VDD

94

VDD

99

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

2

MEM_MA_RAS# 5 MEM_MA_WE# 5 MEM_MA_CAS# 5

MEM_MA1_CS#0 5 MEM_MA1_CS#1 5

MEM_MA_CLK1_P 5 MEM_MA_CLK1_N 5

MEM_MA_CLK7_P 5 MEM_MA_CLK7_N 5

SC2D2U6D3V3KX-GP

(A1)

1D5V_S3

Layout Note: Place these Caps near SO-DIMMA3.

MEM_MA_DM0 5 MEM_MA_DM1 5 MEM_MA_DM2 5 MEM_MA_DM3 5 MEM_MA_DM4 5 MEM_MA_DM5 5 MEM_MA_DM6 5 MEM_MA_DM7 5

SMBD0_SB 3,12,16

SMBC0_SB 3,12,16

C463

3D3V_S0

DY

12

1D5V_S3

12

DY

1 2

1D5V_S3

12

C462

C462 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

SB_0106

R265

R265 2K2R2F-GP

2K2R2F-GP

R264 0R0402-PADR264 0R0402-PAD R278 0R0402-PADR278 0R0402-PAD

R275

R275 2K2R2F-GP

2K2R2F-GP

1D5V_S3

C486

SC1U10V2KX-1GP

DY

1

Note: If SA0 DIM0 = 0, SA1_DIM0 = 1 SO-DIMMA SPD Address is

R457,R468 CLOSE TO ADM3

12

MEM_MA_CKE0 5

12

MEM_MA_CKE1 5

SO-DIMMA TS Address is

12

R271

R271 10KR2J-3-GP

10KR2J-3-GP

DY

SA1_DIM3 SA0_DIM3

12

R272

R272 10KR2J-3-GP

10KR2J-3-GP

3DIMM

SODIMM B DECOUPLING

12

C441

C480

SC10U6D3V3MX-GP

C472

C459

SC1U10V2KX-1GP

12

3DIMM

JE70-DN

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

12

C475

SC10U6D3V3MX-GP

C461

SCD1U10V2KX-5GP

12

C485

C484

SC10U6D3V3MX-GP

C460

C487

SCD1U10V2KX-5GP

12

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDRIII_SO-DIMM SKT_2

JE70-DN

1

3D3V_S03D3V_S0

12

R274

R274 10KR2J-3-GP

10KR2J-3-GP

3DIMM

12

R277

R277 10KR2J-3-GP

10KR2J-3-GP

DY

SC10U6D3V3MX-GP

SB

of

17 63Tuesday, February 23, 2010

5

3D3V_S0

12

R340

R340 10KR2F-2-GP

10KR2F-2-GP

DY

Q21

G

DY

S D

2N7002-11-GP

DY

Q20

3D3V_S0

12

R354

R354 10KR2F-2-GP

10KR2F-2-GP

DY

D D

EDP_EN11

2N7002-11-GP

2ND = 84.27002.N31

PX_EN#11

Q24

G

EDP_EN_C#

DY

S D

2ND = 84.27002.N31

2N7002-11-GP

2ND = 84.27002.N31

Q23

G

S D

2N7002-11-GP

2ND = 84.27002.N31

DY

INT_VGA_EN# keeps high if PX is enable

INT_VGA_EN#11

EDP_EN_C

DP_AUX0N9

G

DY

S D

DAT_DDC_EDID

4

DY

Q4

1 2 3 4

2N7002KDW-G P

84.2N702.A3F

DY

Q3

1 2 3 4

2N7002KDW-G P

84.2N702.A3F

6 5

3

EDP_EN_C#

EDP_EN_C

D5

83.00054.T81

PX

1

BAT54PT-GP

2

3D3V_S0

PX

12

R27

R27 10KR2F-2-GP

10KR2F-2-GP

PE_GPIO2

PE_GPIO2 19,20

3

PE_GPIO2

L=> UMA H=> DIS

GMCH_TXBCLK+9 GMCH_TXBCLK-9

GMCH_TXBOUT2-9 GMCH_TXBOUT2+9 GMCH_TXBOUT1+9

GMCH_TXBOUT1-9 GMCH_TXBOUT0+9

GMCH_TXBOUT0-9

GPU_TXBCLK+53

GPU_TXBCLK-53 GPU_TXBOUT2-53 GPU_TXBOUT2+53 GPU_TXBOUT1+53 GPU_TXBOUT1-53 GPU_TXBOUT0+53 GPU_TXBOUT0-53

RN54

2 3 1

SRN100KJ-6-GP

4

PX

1.8V level

GPIO_SEL_RPE_GPIO2

PX

U4

38

ATMDS2+

37

ATMDS2-

36

ATMDS1+

35

ATMDS1-

34

ATMDS0+

33

ATMDS0-

32

ATMDSCLK+

31

ATMDSCLK-

29

BTMDS2+

28

BTMDS2-

27

BTMDS1+

26

BTMDS1-

25

BTMDS0+

24

BTMDS0-

23

BTMDSCLK+

22

BTMDSCLK-

9

SEL

TS3DV421RUAR- G P

71.03421.003

71.03412.B0G

71.03412.C0G

TMDS2+

TMDS2-

TMDS1+

TMDS1-

TMDS0+

TMDS0-

TMDSCLK+

TMDSCLK-

GND

43

2

1D8V_S0

RN47

SCD1U10V2KX-4GP

12

C29

C11

C20

2

VDD

8

VDD

16

VDD

18

VDD

20

VDD

30

VDD

40

VDD

42

VDD

3 4 6 7 11 12 14 15

1

VSS

5

VSS

10

VSS

13

VSS

17

VSS

19

VSS

21

VSS

39

VSS

41

VSS

PX

LCD_TXBCLK+ 19

LCD_TXBCLK- 19

LCD_TXBOUT2- 19 LCD_TXBOUT2+ 19 LCD_TXBOUT1+ 19

LCD_TXBOUT1- 19 LCD_TXBOUT0+ 19

LCD_TXBOUT0- 19

PX

GMCH_TXACLK+ GMCH_TXACLKGMCH_TXAOUT2GMCH_TXAOUT2+

GMCH_TXAOUT1+ GMCH_TXAOUT1GMCH_TXAOUT0+ GMCH_TXAOUT0-

GMCH_TXBCLK+ GMCH_TXBCLKGMCH_TXBOUT2GMCH_TXBOUT2+

GMCH_TXBOUT1+ GMCH_TXBOUT1GMCH_TXBOUT0+ GMCH_TXBOUT0-

RN47

1 2 3 4 5

SRN0J-7-GP

UMA

RN45

1 2 3 4 5

SRN0J-7-GP

UMA

RN48

1 2 3 4 5

SRN0J-7-GP

UMA

RN50

1 2 3 4 5

SRN0J-7-GP

UMA

8 7 6

LCD_TXACLK+ LCD_TXACLKLCD_TXAOUT2LCD_TXAOUT2+

LCD_TXAOUT1+ LCD_TXAOUT1LCD_TXAOUT0+ LCD_TXAOUT0-

LCD_TXBCLK+ LCD_TXBCLKLCD_TXBOUT2LCD_TXBOUT2+

LCD_TXBOUT1+ LCD_TXBOUT1LCD_TXBOUT0+ LCD_TXBOUT0-

1

DISPLAY SUPPORT TABLE

DP_AUX0N

PX_EN#

EDP diabled

IGP only mode

C C

MXM only mode

Power Express(muxed)

Power Express(muxless)

PX mode display device auto detection method: VGA:I2C interface to NB DP:HPD

1

0

LVDS

Function SEL

An to nB1

An to nB2

L

H

CRT

B B

EDID

LVDS_ENA_BL9 MA_BLON_IN53

A A

PE_GPIO2

L=> UMA H=> DIS

100KR2J-1-GP

12

R347

DY

5

R346

R346 100KR2J-1-GP

100KR2J-1-GP

DY

LVDS_ENA_BL

MA_BLON_IN

X

0/1

X

I2C_DATA

EDP diabled

PX

B03A

2

GND

1

B1

NC7SB3157P6X-1GP

73.03157.C0H

PE_GPIO2

R342

1 2

0R2J-2-GP

UMA

R345

1 2

0R2J-2-GP

DIS_only

X

0/1

X

U33

VCC

S

KBC_BL_ON_IN

INT_VGA_EN#

3D3V_S0

4 5 6

DISPLAY OUTPUT

0

IGP(LVDS,EDP,VGA,DP)

1

MXM(LVDS,EDP,VGA,DP)

1

MXM/IGP(LVDS,EDP,VGA);MXM(DP)

0

IGP(LVDS,EDP,VGA,DP)

2ND = 84.27002.N31

KBC_BL_ON_IN

12

R339

R339 100KR2J-1-GP

100KR2J-1-GP

KBC_BL_ON_IN 36

PE_GPIO2

2N7002-11-GP

4

3D3V_S0

PX

Q40

PX

G

SRN2K2J-1-GP

SB_1130

12

R506

R506 10KR2F-2-GP

10KR2F-2-GP

S D

RN55

PE_GPIO2#

3D3V_S0

PE_GPIO2# 20

PE_GPIO2 PE_GPIO2_R

1

23

4

LCD_EDID_DAT_1 LCD_EDID_CLK_1

R508

1 2

PX

PE_GPIO2

L=> UMA H=> DIS

0R2J-2-GP

DAT_DDC_EDID9 LCD_EDID_DAT53

CLK_DDC_EDID9 LCD_EDID_CLK53

GMCH_TXACLK+9 GMCH_TXACLK-9

GMCH_TXAOUT2-9 GMCH_TXAOUT2+9 GMCH_TXAOUT1+9

GMCH_TXAOUT1-9 GMCH_TXAOUT0+9

GMCH_TXAOUT0-9

GPU_TXACLK+53

GPU_TXACLK-53

GPU_TXAOUT2-53 GPU_TXAOUT2+53 GPU_TXAOUT1+53

GPU_TXAOUT1-53 GPU_TXAOUT0+53

GPU_TXAOUT0-53

SCD1U10V2KX-4GP

GPIO_SEL_R

PX

GMCH_RED9

MA_CRT_RED53

GMCH_GREEN9

MA_CRT_GREEN53

GMCH_BLUE9

MA_CRT_BLUE53

3

TS3DV421RUAR- G P

71.03421.003

C753

12

PX

U5

38

ATMDS2+

37

ATMDS2-

36

ATMDS1+

35

ATMDS1-

34

ATMDS0+

33

ATMDS0-

32

ATMDSCLK+

31

ATMDSCLK-

29

BTMDS2+

28

BTMDS2-

27

BTMDS1+

26

BTMDS1-

25

BTMDS0+

24

BTMDS0-

23

BTMDSCLK+

22

BTMDSCLK-

9

SEL

71.03412.B0G

71.03412.C0G

5V_S0

U34

2 1

NC7SB3157P6X-1GP

73.03157.C0H

2ND = 73.53157.A0J

2ND = 73.53157.A0J 3RD = 73.03201.00J

3RD = 73.03201.00J

U35

2 1

NC7SB3157P6X-1GP

73.03157.C0H

2ND = 73.53157.A0J

2ND = 73.53157.A0J 3RD = 73.03201.00J

3RD = 73.03201.00J

VDD VDD VDD VDD VDD VDD VDD VDD

TMDS2+ TMDS2TMDS1+ TMDS1TMDS0+ TMDS0-

TMDSCLK+

TMDSCLK-

VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

43

PX

U60

16

VCC

1

S

2

IA0

3

IA1

5

IB0

6

IB1

11

IC0

10

IC1

14

ID0

13

ID1

8

GND

PI5C3257QE-GP

73.53257.B0C

2ND = 73.03257.A07

2ND = 73.03257.A07 3RD = 73.03204.007

3RD = 73.03204.007

PX

4

B03A

5

GND

VCC

6

B1

S

PX

4

B03A

5

GND

VCC

6

B1

S

PE_GPIO2

2 8 16 18 20 30 40 42

3 4 6 7 11 12 14 15

1 5 10 13 17 19 21 39 41

YA YB YC YD

OE#

1 2

4 7 9 12 15

3D3V_S0

R26

PX

12

C21

PX

LCD_TXACLK+ 19 LCD_TXACLK- 19

LCD_TXAOUT2- 19 LCD_TXAOUT2+ 19 LCD_TXAOUT1+ 19

LCD_TXAOUT1- 19 LCD_TXAOUT0+ 19

LCD_TXAOUT0- 19

LCD_EDID_DAT_1

LCD_EDID_CLK_1

EDID_SELETE#_LCD

0R2J-2-GP

1D8V_S0

SCD1U10V2KX-4GP

12

C31

PX

CRT_RED 20 CRT_GREEN 20

CRT_BLUE 20

SCD1U10V2KX-4GP

12

C22

PX

LCD_EDID_DAT_1 19

LCD_EDID_CLK_1 19

RN44

GPU_TXACLK+ GPU_TXACLKGPU_TXAOUT2GPU_TXAOUT2+

GPU_TXAOUT1+ GPU_TXAOUT1GPU_TXAOUT0+ GPU_TXAOUT0-

GPU_TXBCLK+ GPU_TXBCLKGPU_TXBOUT2-

GPU_TXBOUT1+ GPU_TXBOUT1GPU_TXBOUT0+

GMCH_RED9 GMCH_GREEN9

GMCH_BLUE9

DAT_DDC_EDID9 CLK_DDC_EDID9

MA_CRT_BLUE53 MA_CRT_GREEN53

MA_CRT_RED53

LCD_EDID_DAT53 LCD_EDID_CLK53

2

RN44

LCD_TXACLK+

1

8

LCD_TXACLK-

2

7

LCD_TXAOUT2-

3

6

LCD_TXAOUT2+

4 5

SRN0J-7-GP

DIS_only

RN46

LCD_TXAOUT1+

1

8

LCD_TXAOUT1-

2

7

LCD_TXAOUT0+

3

6

LCD_TXAOUT0-

4 5

SRN0J-7-GP

DIS_only

RN49

LCD_TXBCLK+

1

8

LCD_TXBCLK-

2

7

LCD_TXBOUT2-

3

6

LCD_TXBOUT2+GPU_TXBOUT2+

4 5

SRN0J-7-GP

DIS_only

RN51

LCD_TXBOUT1+

1

8

LCD_TXBOUT1-

2

7

LCD_TXBOUT0+

3

6

LCD_TXBOUT0-GPU_TXBOUT0-

4 5

SRN0J-7-GP

DIS_only

RN69

1

8

2

7

3

6

4 5

SRN0J-7-GP

UMA

RN4

LCD_EDID_DAT_1

1

4

LCD_EDID_CLK_1

23

SRN0J-6-GP

UMA

RN23

1

8

2

7

3

6

4 5

SRN0J-7-GP

DIS_only

RN56

LCD_EDID_DAT_1

1

4

LCD_EDID_CLK_1

23

SRN0J-6-GP

DIS_only

JE70-DN

Title

Size Document Number Rev

A2

Date: Sheet

CRT_RED 20 CRT_GREEN 20

CRT_BLUE 20

LCD_EDID_DAT_1 19

LCD_EDID_CLK_1 19

CRT_BLUE 20

CRT_GREEN 20

CRT_RED 20

LCD_EDID_DAT_1 19

LCD_EDID_CLK_1 19

Wistron Corporat ion

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

PX

PX JE70-DN

JE70-DN

1

of

18 63Tuesday, February 23, 2010

of

18 63Tuesday, February 23, 2010

of

18 63Tuesday, February 23, 2010

SB

5

4

3

2

1

Inverter Pin

LCD1

48

D D

C C

41

42

43

44

45

46

47 49

IPEX-CONN40-2R- GP-U

20.F1093.040

2nd = 20.F1289.040

LCDVDD

12

C2

SCD1U16V2ZY-2GP

50 1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 51

SCD1U16V2ZY-2GP

APS_EN

USBPN9 USBPP9 CCD_PWR

BLON_OUT_1 BRIGHTNESS_CN

DCBATOUT_LCD1

LCD CONN

LCD_TXACLK+ 18 LCD_TXACLK- 18 LCD_TXAOUT2- 18 LCD_TXAOUT2+ 18 LCD_TXAOUT1+ 18 LCD_TXAOUT1- 18 LCD_TXAOUT0+ 18 LCD_TXAOUT0- 18 LCD_TXBCLK+ 18 LCD_TXBCLK- 18 LCD_TXBOUT2- 18 LCD_TXBOUT2+ 18 LCD_TXBOUT1+ 18 LCD_TXBOUT1- 18 LCD_TXBOUT0+ 18 LCD_TXBOUT0- 18

USBPN9 12 USBPP9 12

1020 delete CCD1 conn and modify these nets for CCD

LCD_EDID_DAT_1 18 LCD_EDID_CLK_1 18

3D3V_S0

DCBATOUT

F1

C10

12

SC10U25V6KX-1GP

POLYSW-1D1A24V-GP-U

69.50007.A31

USBPN9 USBPP9

1029 add EC99,EC100

CCD

1 2 1 2

EC31

DY

SC22P50V2JN-4GP

SC22P50V2JN-4GP EC30

EC30

DY

SC22P50V2JN-4GP

APS_EN36

APS_EN

10KR2J-3-GP

SB_1202

SB_1222

CCD_PWR

12

C25

C32

C32 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U6D3V5KX-3GP

DY

B B

UMA

GMCH_LCDVDD_ON9

MA_LCDVDD_ON53

1 2

R7 0R2J-2-GP

1 2

R8 0R2J-2-GP

GMCH_LCDVDD_ON MA_LCDVDD_ON

DIS_only

PE_GPIO2

100KR2J-1-GP

L=> UMA

A A

H=> DIS

100KR2J-1-GP

5

R316

LCDVDD_ON

VCC

3D3V_S0

U2

LCDVDD_ON

4 5 6

S

100KR2J-1-GP

4

PX

B03A

2

GND

1

B1

NC7SB3157P6X-1GP

DY

12

R317

100KR2J-1-GP

NC7SB3157P6X-1GP

73.03157.C0H

2ND = 73.53157.A0J

PE_GPIO218,20

DY

LCDVDD 3D3V_S0

Layout 40 mil

12

C3

SC4D7U6D3V3MX-2GPC3SC4D7U6D3V3MX-2GP

12

C19

R12

SCD1U16V2ZY-2GP

DY

Symbol

Vin

1

Vin

2

Brightness

3

BLON

4

5

GND

6

GND

CCD Pin

Symbol

CCD_PWR

1

USB-

USB+

3

42GND

5

GND

3D3V_S0

12

R622

DY

12

R623

DY

F2

1 2

FUSE-1D1A6V-4GP-U

69.50007.691

2ND = 69.50007.771

U3

1

EN

2

GND OUT3IN#4

G5285T11U-GP

74.05285.07F

IN#5

5 4

3D3V_S0

Reserve direct connector to KBC

3D3V_S0

PX

U30

UMA_PX

R325

GMCH_BL_PWM9

ATI_BRIGHTNESS53

SB

BRIGHTNESS36

SB_1130

R325 R327

R327

R322

33R2J-2-GP

PE_GPIO2

L=> UMA H=> DIS

BLON_OUT36

12

C17

SC4D7U6D3V5KX-3GP

3

2

GMCH_BL_PWM_R BRIGHTNESS_CN

12

33R2J-2-GP

ATI_BRIGHTNESS_R

12

33R2J-2-GP

DIS_PX

DIS_PX DY

DY

1 2

PE_GPIO218,20

GMCH_BL_PWM_R

ATI_BRIGHTNESS_R

1KR2F-3-GP

JE70-DN

Title

Size Document Nu m ber Rev

Custom

Date: Sheet

R314

12

0R2J-2-GP

LCD CONN

U30

4

B03A

2 1

NC7SB3157P6X-1GP

73.03157.C0H

1 2

12

R313

100KR2J-1-GP

5

GND

VCC

6

B1

S

PX

PE_GPIO2_C

R318

BRIGHTNESS_CN

R321

UMA

BRIGHTNESS_CN

R320

DIS_only

SC100P50V2JN-3GP

12

C526

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

JE70-DN

1

19 63Tuesday, February 23, 2010

12

C531

BLON_OUT_1

of

SC100P50V2JN-3GP

SB

5

Layout Note: Place these resistors close to the CRT-out connector

CRT_RED18

D D

CRT_GREEN18

CRT_BLUE18

678

RN24

RN24 SRN150F-1-GP

SRN150F-1-GP

123

4 5

12

C758

C760

DY

SC3P50V2CN-1-GP

Ferrite bead impedance: 10 oh m@ 100MHz

L54

1 2

FCB1608CF-GP

68.00230.021

2nd = 68.00226.121

L53

1 2

FCB1608CF-GP

68.00230.021

2nd = 68.00226.121

L52

1 2

FCB1608CF-GP

12

C756

68.00230.021

2nd = 68.00226.121

DY

SC3P50V2CN-1-GP

SB_1202

Layout Note:

C C

* Must be a ground return path between this ground and the ground on the VGA connector. Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

CRT I/F & CONNECTOR

CRT1

17

6

C417

CRT_R

1 7

CRT_G

2 8

CRT_B

3 9 4

10

CRT_IN#_R

2ND = 20.20832.015

CRT_IN#_R

12

C745

5

16

VIDEO-15-121-GP-U

20.20789.015

3

BAV99PT-GP-U

SCD01U16V2KX-3GP

R491

12

DAT_DDC1_5

CRT_HSYNC1

5V_CRT_S0

CRT_VSYNC1

C750

CLK_DDC1_5

12

C744

C749

DY

SC18P50V2JN-1-GP

SC100P50V2JN-3GP

CRT_DEC#36

5

470R2J-2-GP

SC100P50V2JN-3GP

12

C747

DY

B B

SC100P50V2JN-3GP

6 1 7 2 8 3 9 4 10 5

A A

11

12 13 14 15

D23

DAT_DDC1_5 CRT_HSYNC1 CRT_VSYNC1 CLK_DDC1_5

5V_S0

DY

4

3

2

1

Function OE#

Hsync & Vsync level shift

CRT_R

R505

DIS_only

1 2

R505 0R2J-2-GP

0R2J-2-GP

UMA

R509

R509 0R2J-2-GP

0R2J-2-GP

1 2

U16

1

1OE#

2

1A

3

2Y GND42A

SSLVC2G125DP-1GP

73.2G125.A07

2ND = 73.2G125.007

U17

1

1OE#

2

1A

3

2Y GND42A

SSLVC2G125DP-1GP

73.2G125.A07

2ND = 73.2G125.007

CRT_G

12

C761

SC6D8P50V2DN-GP

CRT_B

12

C757

C759

PE_GPIO2

L=> UMA H=> DIS

SC6D8P50V2DN-GP

1029 add R936

MA_CRT_HSYNC53,56

For DIS CRT

MA_CRT_VSYNC53,56

GMCH_HSYNC9

For UMA CRT

GMCH_VSYNC9

1029 add R937

DIS_PX

VCC

2OE#

1Y

UMA_PX

VCC

2OE#

1Y

5V_S0

PE_GPIO2# 18

8 7 6 5

CRT_VSYNC1_1

8 7 6 5

CRT_HSYNC1_1

PE_GPIO2

R503

1 2

R504

1 2

SB_1221

PE_GPIO2 18,19

33R2J-2-GP

nA to nY

X

CRT_VSYNC1

CRT_HSYNC1

L

H

DDC_CLK & DATA level shift

5V_S0

1 2

FUSE-1D1A6V-4GP-U

69.50007.691

2nd = 69.50007.771

-1_0209

1029 swap these nets

PX

U56

GMCH_DDCDATA9

MA_CRT_DDCDATA53

GMCH_DDCCLK9

MA_CRT_DDCCLK53

1

2

4

PE_GPIO2

L=> UMA H=> DIS

GMCH_DDCDATA9 GMCH_DDCCLK9

MA_CRT_DDCDATA53 MA_CRT_DDCCLK53

RN66

4

SRN0J-6-GP

UMA

RN65

4

SRN0J-6-GP

DIS_only

3

B03A

2

GND

1

B1

NC7SB3157P6X-1GP

73.03157.C0H

2ND = 73.53157.A0J

2ND = 73.53157.A0J 3RD = 73.03201.00J

3RD = 73.03201.00J

B03A

2

GND

1

B1

NC7SB3157P6X-1GP

73.03157.C0H

2ND = 73.53157.A0J

2ND = 73.53157.A0J 3RD = 73.03201.00J

3RD = 73.03201.00J

PE_GPIO2

DDCDATA

1

DDCCLK

23

DDCDATA

23

DDCCLK

1

PX

VCC

S

U13

VCC

S

1 2

0R2J-2-GP

R496

4 5 6

PX

3D3V_S0

4

1

DDC_SELETE#_CRT

F3

RN21

RN21 SRN2K2J-1-GP

SRN2K2J-1-GP

2 3

DDCDATA

DDCCLK

5V_CRT_DDC

83.R5003.H8H

2ND = 83.5R003.08F

2ND = 83.5R003.08F 3rd = 83.R5003.C8F

3rd = 83.R5003.C8F

3D3V_S0

1 2

U14

5 6

2N7002KDW-GP

84.2N702.A3F

2ND = 84.DM601.03F

2

D27

RB551V30-GP

R229

R229 0R0603-PAD

0R0603-PAD

3D3V_S0_DDC

34 2 1

5V_CRT_S0

KA

3D3V_S0

500mA

678

RN22

SRN10KJ-6-GP

123

4 5

CRT_IN#_R DAT_DDC1_5

CLK_DDC1_5

JE70-DN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CRT Connector

JE70-DN

1

SB

of

20 63Tuesday, February 23, 2010