Wistron SJV50-PU Schematic

5

4

3

2

1

PCB Layer Stackup

SJV50-PU Block Diagram

D D

DIMM1

16,17

DDR2 SODIMM

DIMM2

16,17

CLK GEN.

DDR II 533/667

HyperTransport

14.318MHz

AMD Giffin CPU S1G2 (35W)

638-Pin uFCPGA638

16x16

OUT

IN

G792

33

4,5, 6,7

ICS9LPRS480BKLFT

3

C C

North Bridge

AMD RS780M

CPU I/F INTEGRATED GRAHPICS

LVDS, CRT I/F

PCIex16

PCI-E x 1

GPU ON BOARD

8,9,10

PCI-E x 4

32.768KHz

USB

25MHz

CardReader RTS5159

29

MIC In

Codec

CX20561

27

AZALIA

South Bridge

AMD SB700

USB 2.0/1.1 ports

ETHERNET (10/100/1000Mb)

29

B B

Line Out

High Definition Audio

ATA 66/100

ACPI 1.1

LPC I/F

PCI/PCI BRIDGE

29

AMP G1454

28

AZALIA

INT.SPKR

USB

CCD .3M

3

32.768KHz

18

RJ11

30

MODEM

MDC Card

30

11,12,13,14,15

SATA

HDD

A A

CDROM

5

21

22

SATA

USB x 4

USB 4 Port

24 23

4

MINI USB BlueTooth

Project code: 91.4BX01.001 PCB P/N : 48.4BX04.011 REVISION : 08260-1

Video RAM

64Mbx16x4

M92-M2

50, 51, 52, 53, 54, 55, 56

10/100/1000

BCM5764/5784

25MHz

PCI-E x 2

31 31

Winbond

WPC773L

Touch Pad

55,56

LAN

LPC BUS

KBC

34

INT. KB

36 34

25

SD/ MMC/ MS MS PRO/ XD

5 in 1

SPI I/F

2

TXFM RJ45

Mini Card(1)Half

802.11a/b/g/n

Mini Card(2)

802.11a/b/g/n

BIOS

W25X80-VSS

26 26

32

DEBUG

35

CONN.

SJV50

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

HDMI

20

LCD

18

CRT

19

LPC

35

BLOCK DIAGRAM

SJV50-PU

L1: Signal 1 L2: VCC L3: Inner Signal 2 L4: Inner Signal 3 L5: GND L6: Signal 4

CPU V_CORE

INPUT

DCBATOUT

SYSTEM DC/DC

INPUT

DCBATOUT

SYSTEM DC/DC

INPUT

DCBATOUT

SYSTEM LDO

INPUT

1D8V_S3

SYSTEM LDO

INPUT

3D3V_S5 3D3V_S0 3D3V_S0

SYSTEM LDO

DCBATOUT

Battery Charger

INPUTS

AD+ BAT+

1

OUTPUT

VCC_CORE_S0

OUTPUT

1D1V_S0 1D2V_S0 1D8V_S3

OUTPUT

5V_S5 3D3V_S5

OUTPUT

0D9V_S3

OUTPUT

1D2V_S5 2D5V_S0 1D5V_S0

OUTPUTINPUT

5V_AUX_S5 3D3V_AUX_S5

OUTPUTS

DCBATOUT

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd Hsichih, Taipei

Hsichih, Taipei

of

159Wednesday, February 25, 2009

-1

5

4

3

2

1

PCIE

D D

C C

PCIE0 LAN

PCIE1 MINICARD1

PCIE2 MINICARD2

PCIE3

USB

Pair

11 10 9 8 7 USB1 6 5 4 3 2 1 0

Device

CardReader CCD Mini Card2 USB4

USB2 BlueTooth NC NC NC Mini Card1 USB3

OCP2# OCP1#

OCP0#

B B

A A

5

4

3

2

SJV50

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

USB&PCIE ROUTING

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

SJV50-PU

of

259Wednesday, February 25, 2009

1

-1

A

B

C

D

E

3D3V_S0 3D3V_CLK_VDD

1 2

R175

R175 0R0603-PAD

0R0603-PAD

4 4

3D3V_S0

1 2

R176

1 2

R163

R163 0R3-0-U-GP

0R3-0-U-GP

DY

R176 0R0603-PAD

0R0603-PAD

12

C415

3D3V_S0

1D2V_S0

3 3

2 2

12

C432

SC10U10V5ZY-1GP

CLK_PCIE_MINI1#32 CLK_PCIE_MINI2#32

12

C428

SC10U10V5ZY-1GP

1D1V_CLK_VDDIO

12

C406

C399

SC10U10V5ZY-1GP

CLK_PCIE_SB11

CLK_PCIE_SB#11

CLK_PCIE_LAN25

CLK_PCIE_LAN#25

CLK_NB_GPPSB9

CLK_NB_GPPSB#9

CLK_PCIE_MINI132 CLK_PCIE_MINI232

12

C397

SCD1U10V2KX-4GP

3D3V_CLK_VDD

SC1U10V2KX-1GP

CLK_NBHT_CLK9 CLK_NBHT_CLK#9

SCD1U10V2KX-4GP

0R0603-PAD

1 2

R172

12

C427

TP205TPAD14-GP TP205TPAD14-GP TP202TPAD14-GP TP202TPAD14-GP TP196TPAD14-GP TP196TPAD14-GP TP217TPAD14-GP TP217TPAD14-GP

C433

12

C437

12

C438

SCD1U10V2KX-4GP

12

C434

SCD1U10V2KX-4GP

12

1 1 1 1

C396

12

C395

SCD1U10V2KX-4GP

20090106 SB modify

3D3V_S0

R174

R174 10KR2J-3-GP

10KR2J-3-GP

12

C394

C422

SCD1U10V2KX-4GP

1D1V_CLK_VDDIO

VDD_REF

3D3V_48MPWR_S0

SRC6T_LPRS SRC6C_LPRS CLK_27M_SSIN CLK_27M_M92

PD#

12

C436

SCD1U10V2KX-4GP

3D3V_CLK_VDD

PD#

U24

26

VDDATIG

25

VDDATIG_IO

48

VDDCPU

47

VDDCPU_IO

16

VDDSRC

17

VDDSRC_IO

11

VDDSRC_IO

35

VDDSB_SRC

34

VDDSB_SRC_IO

40

VDDSATA

4

VDD

55

VDDHTT

56

VDDREF

63

VDD48

51

PD#

22

SRC0T_LPRS

21

SRC0C_LPRS

20

SRC1T_LPRS

19

SRC1C_LPRS

15

SRC2T_LPRS

14

SRC2C_LPRS

13

SRC3T_LPRS

12

SRC3C_LPRS

9

SRC4T_LPRS

8

SRC4C_LPRS SRC6T/SATAT_LPRS42GNDSATA

41

SRC6C/SATAC_LPRS

6

SRC7T_LPRS/27MHZ_SS

5

SRC7C_LPRS/27MHZ_NS

37

SB_SRC0T_LPRS

36

SB_SRC0C_LPRS

32

SB_SRC1T_LPRS

31

SB_SRC1C_LPRS

54

HTT0T_LPRS/66M

53

HTT0C_LPRS/66M

ICS9LPRS480BKLFT-GP

71.09480.A03

2ND = 71.08628.003

DY

12

R173

R173 0R2J-2-GP

0R2J-2-GP

ATIG0T_LPRS ATIG0C_LPRS ATIG1T_LPRS ATIG1C_LPRS

CPUKG0T_LPRS CPUKG0C_LPRS

REF0/SEL_HTT66

REF1/SEL_SATA

SB_PWRGD 12,39

SMBCLK SMBDAT

CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

48MHZ_0

REF2/SEL_27

GNDATIG

GND

GNDHTT GNDREF GNDCPU

GND48

GNDSRC GNDSRC

GNDSB_SRC

GND

61

X1

62

X2

2 3

30 29 28 27

23 45 44 39 38

50 49

64

59 58 57

43 24 7 52 60 46 1

10 18

33 65

3D3V_S0

3000mA.80ohm

GEN_XTAL_INGEN_XTAL_INGEN_XTAL_INGEN_XTAL_INGEN_XTAL_INGEN_XTAL_IN

GEN_XTAL_OUTGEN_XTAL_OUT

SB_MEM_480_CLK SB_MEM_480_DAT

CLKREQ0#

1

CLKREQ1#

1

CLKREQ2#

1

CLKREQ3#

1

CLKREQ4#

1

CLK_48

REF0 REF1 REF2

R164

1 2

2R3J-GP

2ND = 82.30005.881

G29

G29 G28

G28

GAP-CLOSE

GAP-CLOSE GAP-CLOSE

GAP-CLOSE

TP200 TPAD14-GPTP200 TPAD14-GP TP206 TPAD14-GPTP206 TPAD14-GP TP207 TPAD14-GPTP207 TPAD14-GP TP204 TPAD14-GPTP204 TPAD14-GP TP203 TPAD14-GPTP203 TPAD14-GP

12

C400

DY

SC4D7U6D3V3KX-GP

82.30005.A11

X-14D3181MHZ-GP

CL=20pF±0.2pF

12

SB_MEM_CLK 12,16,17

12

SB_MEM_DAT 12,16,17

CLKREQ# Internal pull high

20090107_SB mofify

REF0

150R2F-1-GP

3D3V_48MPWR_S0

12

C398

C398 SC1U10V2KX-1GP

SC1U10V2KX-1GP

C414

12

X5

C405 SC33P50V2JN-3GPC405 SC33P50V2JN-3GP

CLK_PCIE_PEG 50

CLK_PCIE_PEG# 50

CLK_NB_GFX 9

CLK_NB_GFX# 9

CPU_CLK 6 CPU_CLK# 6

R165

12

R16675R2F-2-GP R16675R2F-2-GP

12

OSC_14M_NB

1.1V 158R/90.9RRS780M

12

SC33P50V2JN-3GP

12

R161

12

22R2J-2-GP

22R2J-2-GP R162

R162

12

22R2J-2-GP

12

C855

SC22P50V2JN-4GP

CLK_NB_14M 9

Due to PLL issue on current clock chip, the SBlink clock need to come from SRC clocks for RS740 and RS780. Future clock chip revision will fix this.

Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.

CLK48_USB 12 CLK48_5159E 31

12

C856

SC22P50V2JN-4GP

-1 090223

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF

* RS780 can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode.

RS740 RX780 RS780

66M SE(SINGLE END)

NC

14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) NC NC vref

100M DIFF NC 100M DIFF

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

For SB710

DY

R169

10KR2J-3-GP

1 1

10KR2J-3-GP

DY

R170

10KR2J-3-GP

1 2

TP197TPAD14-GPTP197TPAD14-GP TP199TPAD14-GPTP199TPAD14-GP

REF0

1

REF1

1

REF2REF2REF2REF2REF2REF2REF2REF2REF2REF2REF2REF2REF2REF2

27M

1 2

A

SEL_SATA REF1

SEL_HTT66 REF0

SEL_27 REF2

1

100 MHz non-spreading differential SRC clock

*0

100 MHz spreading differential SRC clock

1

66 MHz 3.3V single ended HTT clock

0* 100 MHz differential HTT clock

27 MHz 3.3V single ended enable

1*

100 MHz spreading differential SRC clock

0

* default

CPU_CLK(200MHz)

B

REF1

110R2F-GP

75R2F-2-GP

C

R168

R167

DY

12

DY

12

CLK_SB_14M 11

SA_20081106

D

SJV50

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock Generator ICS9LPRS480BKLFT

Size Document Number Rev

Date: Sheet

SJV50-PU

E

of

359Wednesday, February 25, 2009

of

359Wednesday, February 25, 2009

of

359Wednesday, February 25, 2009

-1

A

B

C

D

E

4 4

Placement note: 10ux1,4.7ux1,0.22ux1,180px1 for each group

1D2V_S0

SC10U6D3V5KX-1GP

SC4D7U6D3V3KX-GP

12

C621

3 3

2 2

SC4D7U6D3V3KX-GP

12

C616

C617

Place close to socket

SC4D7U6D3V3KX-GP

SCD22U6D3V2KX-1GP

12

C625

12

C608

SCD22U6D3V2KX-1GP

12

C609

HT_NB_CPU_CAD_H08 HT_NB_CPU_CAD_L08 HT_NB_CPU_CAD_H18 HT_NB_CPU_CAD_L18 HT_NB_CPU_CAD_H28 HT_NB_CPU_CAD_L28 HT_NB_CPU_CAD_H38 HT_NB_CPU_CAD_L38 HT_NB_CPU_CAD_H48 HT_NB_CPU_CAD_L48 HT_NB_CPU_CAD_H58 HT_NB_CPU_CAD_L58 HT_NB_CPU_CAD_H68 HT_NB_CPU_CAD_L68 HT_NB_CPU_CAD_H78 HT_NB_CPU_CAD_L78 HT_NB_CPU_CAD_H88 HT_NB_CPU_CAD_L88 HT_NB_CPU_CAD_H98 HT_NB_CPU_CAD_L98 HT_NB_CPU_CAD_H108 HT_NB_CPU_CAD_L108 HT_NB_CPU_CAD_H118 HT_NB_CPU_CAD_L118 HT_NB_CPU_CAD_H128 HT_NB_CPU_CAD_L128 HT_NB_CPU_CAD_H138 HT_NB_CPU_CAD_L138 HT_NB_CPU_CAD_H148 HT_NB_CPU_CAD_L148 HT_NB_CPU_CAD_H158 HT_NB_CPU_CAD_L158

HT_NB_CPU_CLK_H08 HT_NB_CPU_CLK_L08 HT_NB_CPU_CLK_H18 HT_NB_CPU_CLK_L18

HT_NB_CPU_CTL_H08 HT_NB_CPU_CTL_L08 HT_NB_CPU_CTL_H18 HT_NB_CPU_CTL_L18

1.5Amp

SC180P50V2JN-1GP

12

C618

12

C619

ACPU1A

HT LINK

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

HT LINK

L0_CADOUT_H0 L0_CADOUT_H1 L0_CADOUT_H2 L0_CADOUT_H3 L0_CADOUT_H4 L0_CADOUT_H5 L0_CADOUT_H6 L0_CADOUT_H7 L0_CADOUT_H8 L0_CADOUT_H9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_L0 L0_CADOUT_L1 L0_CADOUT_L2 L0_CADOUT_L3 L0_CADOUT_L4 L0_CADOUT_L5 L0_CADOUT_L6 L0_CADOUT_L7 L0_CADOUT_L8 L0_CADOUT_L9

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

2ND = 62.10040.471

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

HT_CPU_NB_CAD_H0 8 HT_CPU_NB_CAD_L0 8 HT_CPU_NB_CAD_H1 8 HT_CPU_NB_CAD_L1 8 HT_CPU_NB_CAD_H2 8 HT_CPU_NB_CAD_L2 8 HT_CPU_NB_CAD_H3 8 HT_CPU_NB_CAD_L3 8 HT_CPU_NB_CAD_H4 8 HT_CPU_NB_CAD_L4 8 HT_CPU_NB_CAD_H5 8 HT_CPU_NB_CAD_L5 8 HT_CPU_NB_CAD_H6 8 HT_CPU_NB_CAD_L6 8 HT_CPU_NB_CAD_H7 8 HT_CPU_NB_CAD_L7 8 HT_CPU_NB_CAD_H8 8 HT_CPU_NB_CAD_L8 8 HT_CPU_NB_CAD_H9 8 HT_CPU_NB_CAD_L9 8 HT_CPU_NB_CAD_H10 8 HT_CPU_NB_CAD_L10 8 HT_CPU_NB_CAD_H11 8 HT_CPU_NB_CAD_L11 8 HT_CPU_NB_CAD_H12 8 HT_CPU_NB_CAD_L12 8 HT_CPU_NB_CAD_H13 8 HT_CPU_NB_CAD_L13 8 HT_CPU_NB_CAD_H14 8 HT_CPU_NB_CAD_L14 8 HT_CPU_NB_CAD_H15 8 HT_CPU_NB_CAD_L15 8

HT_CPU_NB_CLK_H0 8 HT_CPU_NB_CLK_L0 8 HT_CPU_NB_CLK_H1 8 HT_CPU_NB_CLK_L1 8

HT_CPU_NB_CTL_H0 8 HT_CPU_NB_CTL_L0 8 HT_CPU_NB_CTL_H1 8 HT_CPU_NB_CTL_L1 8

D1 D2 D3 D4

E3 E2 E1

F1 G3 G2 G1

H1

J1

K1

L3 L2 L1

M1

N3

N2

E5

F5

F3

F4 G5

H5

H3

H4

K3

K4

L5 M5 M3 M4

N5 P5

J3

J2

J5

K5 N1

P1 P3 P4

SKT-CPU638P-GP-U2

62.10055.111

SKT-BGA638H176

1 1

A

B

C

D

SJV50

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

CPU (1 of 4)

SJV50-PU

E

of

459Wednesday, February 25, 2009

of

459Wednesday, February 25, 2009

of

459Wednesday, February 25, 2009

-1

A

Placement note:

4.7ux2,0.22ux1,180px1 for each group

4 4

1D8V_S3

3 3

2 2

1 1

4.7u x 4 0.22u X 2 180P x 2

SC4D7U6D3V3KX-GP

MEM_MA0_ODT017 MEM_MA0_ODT117

MEM_MA0_CS#017 MEM_MA0_CS#117

MEM_MA_CKE017 MEM_MA_CKE117

MEM_MA_CLK0_P17 MEM_MA_CLK0_N17 MEM_MA_CLK1_P17 MEM_MA_CLK1_N17

MEM_MA_ADD017 MEM_MA_ADD117 MEM_MA_ADD217 MEM_MA_ADD317 MEM_MA_ADD417 MEM_MA_ADD517 MEM_MA_ADD617 MEM_MA_ADD717 MEM_MA_ADD817 MEM_MA_ADD917 MEM_MA_ADD1017 MEM_MA_ADD1117 MEM_MA_ADD1217 MEM_MA_ADD1317 MEM_MA_ADD1417 MEM_MA_ADD1517

MEM_MA_BANK017 MEM_MA_BANK117 MEM_MA_BANK217

MEM_MA_RAS#17 MEM_MA_CAS#17 MEM_MA_WE#17

12

C122

DY

R315

R315 39D2R2F-L-GP

39D2R2F-L-GP

R317

R317 39D2R2F-L-GP

39D2R2F-L-GP

12

C123

1 2 1 2

TPAD14-GP

SC4D7U6D3V3KX-GP

12

TP125

A

C135

DY

Place near to CPU

SC4D7U6D3V3KX-GP

12

C128

MEMZP MEMZN

MEM_RSVD_M1

1

SCD22U6D3V2KX-1GP

0D9V_S3

12

C150

SCD22U6D3V2KX-1GP

12

C149

ACPU1B

D10

VTT1

MEM:CMD/CTRL/CLK

C10 B10

AD10

AF10

AE10

H16 T19

V22 U21 V19

T20 U19 U20 V20

N19 N20 E16 F16 Y16

AA16

P19 P20

N21 M20 N22 M19 M22

M24

K22 R21

K20 V24 K24 K19

R20 R23

R19 T22 T24

J22 J20

L20 L21

L19

L22

J21

MEM:CMD/CTRL/CLK

VTT2 VTT3 VTT4

MEMZP MEMZN

RSVD_M1 MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

SKT-CPU638P-GP-U2

62.10055.111

2ND = 62.10055.251

VTT5 VTT6 VTT7 VTT8 VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C139

SC180P50V2JN-1GP

B

12

W10 AC10 AB10 AA10 A10

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

B

VTT_SENSE

MEM_RSVD_M2

MEM_MB0_ODT0 16 MEM_MB0_ODT1 16

MEM_MB0_CS#0 16 MEM_MB0_CS#1 16

MEM_MB_CKE0 16 MEM_MB_CKE1 16

MEM_MB_CLK0_P 16 MEM_MB_CLK0_N 16 MEM_MB_CLK1_P 16 MEM_MB_CLK1_N 16

MEM_MB_ADD0 16 MEM_MB_ADD1 16 MEM_MB_ADD2 16 MEM_MB_ADD3 16 MEM_MB_ADD4 16 MEM_MB_ADD5 16 MEM_MB_ADD6 16 MEM_MB_ADD7 16 MEM_MB_ADD8 16 MEM_MB_ADD9 16 MEM_MB_ADD10 16 MEM_MB_ADD11 16 MEM_MB_ADD12 16 MEM_MB_ADD13 16 MEM_MB_ADD14 16 MEM_MB_ADD15 16

MEM_MB_BANK0 16 MEM_MB_BANK1 16 MEM_MB_BANK2 16

MEM_MB_RAS# 16 MEM_MB_CAS# 16 MEM_MB_WE# 16

1

C140

SC180P50V2JN-1GP

12

TP115

TP115 TPAD14-GP

TPAD14-GP

TP140

TP140 TPAD14-GP

TPAD14-GP

SCD1U10V2KX-4GP

VREF_DDR_CLAW

SC10U6D3V5MX-3GP

12

C217

DY

C

CLOSE TO CPU

1D8V_S3

12

C208

1 2 3

SCD1U10V2KX-4GP

SC1KP50V2KX-1GP

12

C235

12

C232

C

RN25

SRN1KJ-7-GP

D

ACPU1C

MEM_MA_DATA017 MEM_MA_DATA117 MEM_MA_DATA217 MEM_MA_DATA317 MEM_MA_DATA417 MEM_MA_DATA517 MEM_MA_DATA617 MEM_MA_DATA717 MEM_MA_DATA817 MEM_MA_DATA917 MEM_MA_DATA1017 MEM_MA_DATA1117 MEM_MA_DATA1217 MEM_MA_DATA1317 MEM_MA_DATA1417 MEM_MA_DATA1517 MEM_MA_DATA1617 MEM_MA_DATA1717 MEM_MA_DATA1817 MEM_MA_DATA1917 MEM_MA_DATA2017 MEM_MA_DATA2117 MEM_MA_DATA2217 MEM_MA_DATA2317 MEM_MA_DATA2417 MEM_MA_DATA2517 MEM_MA_DATA2617 MEM_MA_DATA2717 MEM_MA_DATA2817 MEM_MA_DATA2917 MEM_MA_DATA3017 MEM_MA_DATA3117 MEM_MA_DATA3217 MEM_MA_DATA3317 MEM_MA_DATA3417 MEM_MA_DATA3517 MEM_MA_DATA3617 MEM_MA_DATA3717 MEM_MA_DATA3817 MEM_MA_DATA3917 MEM_MA_DATA4017

4

MEM_MA_DATA4117 MEM_MA_DATA4217 MEM_MA_DATA4317 MEM_MA_DATA4417 MEM_MA_DATA4517 MEM_MA_DATA4617 MEM_MA_DATA4717 MEM_MA_DATA4817 MEM_MA_DATA4917 MEM_MA_DATA5017 MEM_MA_DATA5117 MEM_MA_DATA5217 MEM_MA_DATA5317 MEM_MA_DATA5417 MEM_MA_DATA5517 MEM_MA_DATA5617 MEM_MA_DATA5717 MEM_MA_DATA5817 MEM_MA_DATA5917 MEM_MA_DATA6017 MEM_MA_DATA6117 MEM_MA_DATA6217 MEM_MA_DATA6317

MEM_MA_DM017 MEM_MA_DM117 MEM_MA_DM217 MEM_MA_DM317 MEM_MA_DM417 MEM_MA_DM517 MEM_MA_DM617 MEM_MA_DM717

MEM_MA_DQS0_P17 MEM_MA_DQS0_N17 MEM_MA_DQS1_P17 MEM_MA_DQS1_N17 MEM_MA_DQS2_P17 MEM_MA_DQS2_N17 MEM_MA_DQS3_P17 MEM_MA_DQS3_N17 MEM_MA_DQS4_P17 MEM_MA_DQS4_N17 MEM_MA_DQS5_P17 MEM_MA_DQS5_N17 MEM_MA_DQS6_P17 MEM_MA_DQS6_N17 MEM_MA_DQS7_P17 MEM_MA_DQS7_N17

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22

Y24 AB24 AB22 AA21

W22 W21

Y22 AA22

Y20 AA20 AA18 AB18 AB21 AD21 AD19

Y18 AD17

W16 W14

Y14

Y17 AB17 AB15 AD15 AB13 AD13

Y12

W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24

AC24

Y19

AB16

Y13 G13

H13 G16 G15 C22 C21 G22

G21 AD23 AC23 AB19 AB20

Y15

W15 W12 W13

SKT-CPU638P-GP-U2

62.10055.111

2ND = 62.10055.251

D

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

Title

Size Document Number Rev

Date: Sheet

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DQS_H0

MB_DQS_L0

MB_DQS_H1

MB_DQS_L1

MB_DQS_H2

MB_DQS_L2

MB_DQS_H3

MB_DQS_L3

MB_DQS_H4

MB_DQS_L4

MB_DQS_H5

MB_DQS_L5

MB_DQS_H6

MB_DQS_L6

MB_DQS_H7

MB_DQS_L7

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

CPU (2 of 4)

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11

A12 B16 A22 E25 AB26 AE22 AC16 AD12

C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

SJV50-PU

E

MEM_MB_DATA0 16 MEM_MB_DATA1 16 MEM_MB_DATA2 16 MEM_MB_DATA3 16 MEM_MB_DATA4 16 MEM_MB_DATA5 16 MEM_MB_DATA6 16 MEM_MB_DATA7 16 MEM_MB_DATA8 16 MEM_MB_DATA9 16 MEM_MB_DATA10 16 MEM_MB_DATA11 16 MEM_MB_DATA12 16 MEM_MB_DATA13 16 MEM_MB_DATA14 16 MEM_MB_DATA15 16 MEM_MB_DATA16 16 MEM_MB_DATA17 16 MEM_MB_DATA18 16 MEM_MB_DATA19 16 MEM_MB_DATA20 16 MEM_MB_DATA21 16 MEM_MB_DATA22 16 MEM_MB_DATA23 16 MEM_MB_DATA24 16 MEM_MB_DATA25 16 MEM_MB_DATA26 16 MEM_MB_DATA27 16 MEM_MB_DATA28 16 MEM_MB_DATA29 16 MEM_MB_DATA30 16 MEM_MB_DATA31 16 MEM_MB_DATA32 16 MEM_MB_DATA33 16 MEM_MB_DATA34 16 MEM_MB_DATA35 16 MEM_MB_DATA36 16 MEM_MB_DATA37 16 MEM_MB_DATA38 16 MEM_MB_DATA39 16 MEM_MB_DATA40 16 MEM_MB_DATA41 16 MEM_MB_DATA42 16 MEM_MB_DATA43 16 MEM_MB_DATA44 16 MEM_MB_DATA45 16 MEM_MB_DATA46 16 MEM_MB_DATA47 16 MEM_MB_DATA48 16 MEM_MB_DATA49 16 MEM_MB_DATA50 16 MEM_MB_DATA51 16 MEM_MB_DATA52 16 MEM_MB_DATA53 16 MEM_MB_DATA54 16 MEM_MB_DATA55 16 MEM_MB_DATA56 16 MEM_MB_DATA57 16 MEM_MB_DATA58 16 MEM_MB_DATA59 16 MEM_MB_DATA60 16 MEM_MB_DATA61 16 MEM_MB_DATA62 16 MEM_MB_DATA63 16

MEM_MB_DM0 16 MEM_MB_DM1 16 MEM_MB_DM2 16 MEM_MB_DM3 16 MEM_MB_DM4 16 MEM_MB_DM5 16 MEM_MB_DM6 16 MEM_MB_DM7 16

MEM_MB_DQS0_P 16 MEM_MB_DQS0_N 16 MEM_MB_DQS1_P 16 MEM_MB_DQS1_N 16 MEM_MB_DQS2_P 16 MEM_MB_DQS2_N 16 MEM_MB_DQS3_P 16 MEM_MB_DQS3_N 16 MEM_MB_DQS4_P 16 MEM_MB_DQS4_N 16 MEM_MB_DQS5_P 16 MEM_MB_DQS5_N 16 MEM_MB_DQS6_P 16 MEM_MB_DQS6_N 16 MEM_MB_DQS7_P 16 MEM_MB_DQS7_N 16

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

559Wednesday, February 25, 2009

of

559Wednesday, February 25, 2009

of

559Wednesday, February 25, 2009

E

-1

5

4

3

2

1

1D8V_S0

678

RN52

RN52 SRN300J-1-GP

SRN300J-1-GP

D D

CPU_LDT_RST#11

CPU_PWRGD11,58

CPU_LDT_STOP#11

ALLOW_LDTSTOP9,11

123

4 5

1 2

R242 33R2J-2-GPR242 33R2J-2-GP

1 2

R243 0R0402-PADR243 0R0402-PAD

1 2

R244 0R0402-PADR244 0R0402-PAD

1 2

R241 0R0402-PADR241 0R0402-PAD

LDT_PWROK

CPU_LDT_REQ#_CPU

LDT_RST#_CPU 9,58

LDT_STP#_CPU 9

IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491

R301

1 2

0R0603-PAD

C667

2D5V_VDDA_S02D5V_S0

12

C666

SC4D7U6D3V3KX-GP

C666

-1 090213

Cloce To CPU

CPU_CLK3 CPU_CLK#3

1D8V_S3

12

R266

R266 390R2J-1-GP

390R2J-1-GP

R74

1 2

1D8V_S3

R277

300R2J-4-GP

C C

B B

CPU_PWRGD_SVID_REG41

CPU_SIC

1 2

R308 0R2J-2-GPR308 0R2J-2-GP

LDT_PWROK

R57

1 2

300R2J-4-GP

LDT_RST#_CPULDT_RST#_CPU

HDT_RST#

For HDT DBG

1D2V_S0

12

300R2J-4-GP

R66

1 2

300R2J-4-GP

1 2

C660 SC3900P50V2KX-2GPC660 SC3900P50V2KX-2GP

1 2

C657 SC3900P50V2KX-2GPC657 SC3900P50V2KX-2GP

1 2

R273

R273 0R0402-PAD

0R0402-PAD

R64

1 2

R283 169R2F-GPR283 169R2F-GP

LDT_PWROK LDT_STP#_CPU CPU_LDT_REQ#_CPU

1 2

R247 44D2R2F-GPR247 44D2R2F-GP

1 2

R248 44D2R2F-GPR248 44D2R2F-GP

CPU_VDD0_RUN_FB_H41 CPU_VDD0_RUN_FB_L41

CPU_VDD1_RUN_FB_H41 CPU_VDD1_RUN_FB_L41

TP118TP118

R61

1 2

300R2J-4-GP

20081126

LDT_PWROK

12

R275

R275 2K2R2J-2-GP

2K2R2J-2-GP

C640

1 2

1D8V_SUS_Q2

B

SCD1U16V2ZY-2GP

A A

CPU exceeds to 125

5

4

THERMTRIP#

SCD1U16V2ZY-2GP

Q20

E

MMBT3904-4-GP

℃

2ND = 84.03904.L06

C

84.T3904.C11

LYAOUT:ROUTE VDDA TRACE APPROX. 50mils WIDE(USE 2X25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

12

C665

C669

SC3300P50V2KX-1GP

TP97TP97 TP220TP220 TP221TP221

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

1

CPU_TEST25_H CPU_TEST25_L

TP112TP112 TP110TP110 TP108TP108

R54

1 2

0R0402-PAD

SCD22U6D3V2KX-1GP

SC10U10V5ZY-1GP

CLKCPU_IN

CLKCPU#_IN

CPU_SIC

1

CPU_SID

1

CPU_ALERT#

1

CPU_HTREF0 CPU_HTREF1

CPU_TEST23 CPU_TEST18

CPU_TEST21CPU_TEST21

CPU_TEST20

CPU_TEST24CPU_TEST24

CPU_TEST22

1

CPU_TEST12

1

CPU_TEST27

1

CPU_TEST9

RSMRST# 33,34,39

3

ACPU1D

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

C6

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

R6

HT_REF0

P6

HT_REF1

F6

VDD0_FB_H

E6

VDD0_FB_L

Y6

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

G9

TEST19

E9

TEST25_H

E8

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

C2

TEST9

AA6

TEST6

A3

RSVD1

A5

RSVD2

B3

RSVD3

B5

RSVD4

C1

RSVD5

SKT-CPU638P-GP-U2

62.10055.111

2ND = 62.10040.471

SA_20081030

KEY1 KEY2

SVC SVD

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC THERMDA

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

SA_20081127

1D8V_S0

4

RN54

RN54 SRN1KJ-7-GP

M11 W18

A6 A4

THERMTRIP#

AF6 AC7

CPU_MEMHOT#

AA8

internal pull high 300 ohm

W7 W8

1 2

DY

C116

C116 SC100P50V2JN-3GP

SC100P50V2JN-3GP

CPU_VDDIO_SUS_FB_H

W9

CPU_VDDIO_SUS_FB_L

Y9 H6

G6

CPU_DBREQ#

E10

CPU_TDO

AE9

J7 H8

CPU_TEST17

D7 E7 F7

CPU_TEST14

C7 C3

K8 C4

CPU_TEST29H

C9

CPU_TEST29L

C8

H18 H19 AA7 D5 C5

SRN1KJ-7-GP

1

2 3

CPU_SVC 41 CPU_SVD 41

H_THERMDC 33 H_THERMDA 33

1 1

CPU_VDDNB_RUN_FB_H 41 CPU_VDDNB_RUN_FB_L 41

1

1 1

2

1D8V_S3

678

RN17

RN17 SRN300J-1-GP

SRN300J-1-GP

123

4 5

CPU_DBREQ#

TP116TP116 TP113TP113

LAYOUT: Route FBCLKOUT_H/L differentially impedance 80

TP106TP106

TP107TP107

TP114TP114 TP109TP109

HDT Connectors

1D8V_S3

SJV50

Title

CPU (3 of 4)

Size Document Number Rev

Date: Sheet

CPU (3 of 4)

SJV50-PU

The Processor has reached a preset maximum operating temperature. 100 I=Active HTC O=FAN

PROCHOT#_SB 11

HDT1

1

DY

3

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

HDT_RST#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

5 7

9 11 13 15 17 19 21 23

SMC-CONN26A-FP

659Wednesday, February 25, 2009

1

℃

2 4

6 8 10 12 14 16 18 20 22 24 26

-1

of

-1

5

4

3

2

1

36A for VDD0&VDD1

ACPU1E

G4

VDD0_1

H2

VDD0_2

J9

VDD0_3

J11

VDD0_4

J13

VDD0_5

J15

VDD0_6

K6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

L4

VDD0_11

L7

VDD0_12

L9

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

M2

VDD0_17

M6

VDD0_18

M8

VDD0_19

M10

VDD0_20

N7

VDD0_21

N9

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SKT-CPU638P-GP-U2

62.10055.111

2ND = 62.10040.471

3

SC180P50V2JN-1GP

C120

12

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

VCC_CORE_S0_1

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

Title

Size Document Number Rev

Date: Sheet

C228

12

SC180P50V2JN-1GP

2

C148

12

SC180P50V2JN-1GP

C202

12

SCD01U50V2KX-1GP

C114

12

SCD01U50V2KX-1GP

C121

C167

12

SC10U6D3V5MX-3GP

SCD22U6D3V2KX-1GP

SC10U6D3V5MX-3GP

Place near to CPU

C268

12

SCD22U6D3V2KX-1GP

CPU (4 of 4)

SJV50-PU

C642

C643

C166

12

SC10U6D3V5MX-3GP

C643

12

SC10U6D3V5MX-3GP

2A for VDDIO

C297

C258

C301

12

SCD22U6D3V2KX-1GP

SC4D7U6D3V3KX-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

759Wednesday, February 25, 2009

1

1D8V_S3

C302

C300

12

SC4D7U6D3V3KX-GP

-1

of

SC10P50V2JN-4GP

C393

12

SC10U6D3V5MX-3GP

1D8V_S3

4

VCC_CORE_S0_0

C110

C118

12

SC10U6D3V5MX-3GP

VDDNB

SC10U6D3V5KX-1GP

4A for VDDNB

SC10U6D3V5KX-1GP

12

C726

C306

C305

12

SC10U6D3V5KX-1GP

C162

12

SC10U6D3V5MX-3GP

C188

C183

12

SC10U6D3V5KX-1GP

SCD22U6D3V2KX-1GP

12

C145

12

C189

C199

12

SC180P50V2JN-1GP

C165

12

SCD01U50V2KX-1GP

ACPU1F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

D D

C C

B B

A A

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

SKT-CPU638P-GP-U2

62.10055.111

VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

5

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

-1 090219

C474

12

SC10P50V2JN-4GP

1 2

EC44

SC47P50V2JN-3GP

near to the CPU

1 2

EC47

SC47P50V2JN-3GP

20081202

5

HT_CPU_NB_CAD_H04 HT_CPU_NB_CAD_L04 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H24 HT_CPU_NB_CAD_L24 HT_CPU_NB_CAD_H34 HT_CPU_NB_CAD_L34 HT_CPU_NB_CAD_H44 HT_CPU_NB_CAD_L44 HT_CPU_NB_CAD_H54

D D

C C

B B

MINICARD1 MINICARD2 MINICARD2

A A

A-LINK

5

HT_CPU_NB_CAD_L54 HT_CPU_NB_CAD_H64 HT_CPU_NB_CAD_L64 HT_CPU_NB_CAD_H74 HT_CPU_NB_CAD_L74

HT_CPU_NB_CAD_H84 HT_CPU_NB_CAD_L84 HT_CPU_NB_CAD_H94 HT_CPU_NB_CAD_L94 HT_CPU_NB_CAD_H104 HT_CPU_NB_CAD_L104 HT_CPU_NB_CAD_H114 HT_CPU_NB_CAD_L114 HT_CPU_NB_CAD_H124 HT_CPU_NB_CAD_L124 HT_CPU_NB_CAD_H134 HT_CPU_NB_CAD_L134 HT_CPU_NB_CAD_H144 HT_CPU_NB_CAD_L144 HT_CPU_NB_CAD_H154 HT_CPU_NB_CAD_L154

HT_CPU_NB_CLK_H04 HT_CPU_NB_CLK_L04 HT_CPU_NB_CLK_H14 HT_CPU_NB_CLK_L14

HT_CPU_NB_CTL_H04 HT_CPU_NB_CTL_L04 HT_CPU_NB_CTL_H14 HT_CPU_NB_CTL_L14

1 2

Place < 100mils from pin C23 and A24

PEG_RXN[15..0]50 PEG_RXP[15..0]50

LAN

ALINK_NBRX_SBTX_P011 ALINK_NBRX_SBTX_N011 ALINK_NBRX_SBTX_P111 ALINK_NBRX_SBTX_N111 ALINK_NBRX_SBTX_P211 ALINK_NBRX_SBTX_N211 ALINK_NBRX_SBTX_P311 ALINK_NBRX_SBTX_N311

R236

R236 301R2F-GP

301R2F-GP

PCIE_RXP125 PCIE_RXN125 PCIE_RXP232 PCIE_RXN232 PCIE_RXP332 PCIE_TXP3 32 PCIE_RXN332

TP44TP44 TP36TP36

4

ANB1A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCALP HT_TXCALP HT_RXCALN

PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7

PEG_RXP8 PEG_RXN8 PEG_RXP9 PEG_RXN9 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15

GPP_RX5P

1

GPP_RX5N

1

4

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780M-GP-U2

ANB1B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780M-GP-U2

PART 1 OF 6

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP

HT_TXCALN

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

PCIE I/F GFX

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

PCE_CALRP PCE_CALRN

3

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

HT_TXCALN

HT_NB_CPU_CAD_H0 4 HT_NB_CPU_CAD_L0 4 HT_NB_CPU_CAD_H1 4 HT_NB_CPU_CAD_L1 4 HT_NB_CPU_CAD_H2 4 HT_NB_CPU_CAD_L2 4 HT_NB_CPU_CAD_H3 4 HT_NB_CPU_CAD_L3 4 HT_NB_CPU_CAD_H4 4 HT_NB_CPU_CAD_L4 4 HT_NB_CPU_CAD_H5 4 HT_NB_CPU_CAD_L5 4 HT_NB_CPU_CAD_H6 4 HT_NB_CPU_CAD_L6 4 HT_NB_CPU_CAD_H7 4 HT_NB_CPU_CAD_L7 4

HT_NB_CPU_CAD_H8 4 HT_NB_CPU_CAD_L8 4 HT_NB_CPU_CAD_H9 4 HT_NB_CPU_CAD_L9 4 HT_NB_CPU_CAD_H10 4 HT_NB_CPU_CAD_L10 4 HT_NB_CPU_CAD_H11 4 HT_NB_CPU_CAD_L11 4 HT_NB_CPU_CAD_H12 4 HT_NB_CPU_CAD_L12 4 HT_NB_CPU_CAD_H13 4 HT_NB_CPU_CAD_L13 4 HT_NB_CPU_CAD_H14 4 HT_NB_CPU_CAD_L14 4 HT_NB_CPU_CAD_H15 4 HT_NB_CPU_CAD_L15 4

HT_NB_CPU_CLK_H0 4 HT_NB_CPU_CLK_L0 4 HT_NB_CPU_CLK_H1 4 HT_NB_CPU_CLK_L1 4

HT_NB_CPU_CTL_H0 4 HT_NB_CPU_CTL_L0 4 HT_NB_CPU_CTL_H1 4 HT_NB_CPU_CTL_L1 4

1 2

Place < 100mils from pin B25 and B24

Placement: close RS780

GTXP0

A5

GTXN0

B5

GTXP1

A4

GTXN1

B4

GTXP2

C3

GTXN2

B2

GTXP3

D1

GTXN3

D2

GTXP4

E2

GTXN4

E1

GTXP5

F4

GTXN5

F3

GTXP6

F1

GTXN6

F2

GTXP7

H4

GTXN7

H3

GTXP8

H1

GTXN8

H2

GTXP9

J2

GTXN9

J1

GTXP10

K4

GTXN10

K3

GTXP11

K1

GTXN11

K2

GTXP12

M4

GTXN12

M3

GTXP13

M1

GTXN13

M2

GTXP14

N2

GTXN14

N1

GTXP15

P1

GTXN15

P2

TXP1

AC1

TXN1

AC2

TXP2

AB4

TXN2

AB3

TXP3

AA2

TXN3

AA1 Y1 Y2 Y4 Y3

GPP_TX5P

V1

GPP_TX5N

V2

ALINK_NBTX_SBRX_P0

AD7

ALINK_NBTX_SBRX_N0

AE7

ALINK_NBTX_SBRX_P1

AE6

ALINK_NBTX_SBRX_N1

AD6

ALINK_NBTX_SBRX_P2

AB6

ALINK_NBTX_SBRX_N2

AC6

ALINK_NBTX_SBRX_P3

AD5

ALINK_NBTX_SBRX_N3

AE5

PCE_PCAL

AC8

PCE_NCAL

AB8

Place < 100mils from pin AC8 and AB8

3

C630 SCD1U10V2KX-4GP

1 2

DIS

C631 SCD1U10V2KX-4GP

1 2

DIS

C632 SCD1U10V2KX-4GP

1 2

DIS

C633 SCD1U10V2KX-4GP

1 2

DIS

C634 SCD1U10V2KX-4GP

1 2

DIS

C635 SCD1U10V2KX-4GP

1 2

DIS

C636 SCD1U10V2KX-4GP

1 2

DIS

C637 SCD1U10V2KX-4GP

1 2

DIS

C521 SCD1U10V2KX-4GP

1 2

DIS

C520 SCD1U10V2KX-4GP

1 2

DIS

C505 SCD1U10V2KX-4GP

1 2

DIS

C504 SCD1U10V2KX-4GP

1 2

DIS

C519 SCD1U10V2KX-4GP

1 2

DIS

C518 SCD1U10V2KX-4GP

1 2

DIS

C503 SCD1U10V2KX-4GP

1 2

DIS

C502 SCD1U10V2KX-4GP

1 2

DIS

C517 SCD1U10V2KX-4GP

1 2

DIS

C516 SCD1U10V2KX-4GP

1 2

DIS

C501 SCD1U10V2KX-4GP

1 2

DIS

C500 SCD1U10V2KX-4GP

1 2

DIS

C515 SCD1U10V2KX-4GP

1 2

DIS

C514 SCD1U10V2KX-4GP

1 2

DIS

C499 SCD1U10V2KX-4GP

1 2

DIS

C498 SCD1U10V2KX-4GP

1 2

DIS

C513 SCD1U10V2KX-4GP

1 2

DIS

C512 SCD1U10V2KX-4GP

1 2

DIS

C497 SCD1U10V2KX-4GP

1 2

DIS

C496 SCD1U10V2KX-4GP

1 2

DIS

C510 SCD1U10V2KX-4GP

1 2

DIS

C511 SCD1U10V2KX-4GP

1 2

DIS

C495 SCD1U10V2KX-4GP

1 2

DIS

C494 SCD1U10V2KX-4GP

1 2

DIS

C525 SCD1U10V2KX-4GPC525 SCD1U10V2KX-4GP

1 2

C524 SCD1U10V2KX-4GPC524 SCD1U10V2KX-4GP

1 2

C527 SCD1U10V2KX-4GPC527 SCD1U10V2KX-4GP

1 2

C526 SCD1U10V2KX-4GPC526 SCD1U10V2KX-4GP

1 2

C522 SCD1U10V2KX-4GPC522 SCD1U10V2KX-4GP

1 2

C523 SCD1U10V2KX-4GPC523 SCD1U10V2KX-4GP

1 2

C557 SCD1U10V2KX-4GPC557 SCD1U10V2KX-4GP C551 SCD1U10V2KX-4GPC551 SCD1U10V2KX-4GP C548 SCD1U10V2KX-4GPC548 SCD1U10V2KX-4GP C549 SCD1U10V2KX-4GPC549 SCD1U10V2KX-4GP C538 SCD1U10V2KX-4GPC538 SCD1U10V2KX-4GP C545 SCD1U10V2KX-4GPC545 SCD1U10V2KX-4GP C536 SCD1U10V2KX-4GPC536 SCD1U10V2KX-4GP C537 SCD1U10V2KX-4GPC537 SCD1U10V2KX-4GP

1 2

R207 1K27R2F-L-GPR207 1K27R2F-L-GP

1 2

R25 2KR2F-3-GPR25 2KR2F-3-GP

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

R235

R235 301R2F-GP

301R2F-GP

1 1

TP28TP28 TP29TP29

2

RS780M Display Port Support(muxed on GFX)

PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 PEG_TXP8 PEG_TXN8 PEG_TXP9 PEG_TXN9 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14 PEG_TXP15 PEG_TXN15

ALINK_NBTX_C_SBRX_P0 11 ALINK_NBTX_C_SBRX_N0 11 ALINK_NBTX_C_SBRX_P1 11 ALINK_NBTX_C_SBRX_N1 11 ALINK_NBTX_C_SBRX_P2 11 ALINK_NBTX_C_SBRX_N2 11 ALINK_NBTX_C_SBRX_P3 11 ALINK_NBTX_C_SBRX_N3 11

1D1V_S0

2

GTXP0 GTXN0 GTXP1 GTXN1 GTXP2 GTXN2 GTXP3 GTXN3

DP0

GFX_TX0,TX1,TX2,TX3,AUX0,HPD0

C645 SCD1U10V2KX-4GP

1 2

HDMI_SL

C646 SCD1U10V2KX-4GP

1 2

HDMI_SL

C647 SCD1U10V2KX-4GP

1 2

HDMI_SL

C648 SCD1U10V2KX-4GP

1 2

HDMI_SL

C649 SCD1U10V2KX-4GP

1 2

HDMI_SL

C650 SCD1U10V2KX-4GP

1 2

HDMI_SL

C651 SCD1U10V2KX-4GP

1 2

HDMI_SL

C652 SCD1U10V2KX-4GP

1 2

HDMI_SL

GFX_TX4,TX5,TX6,TX7,AUX1,HPD1DP1

PEG_TXP[15..0] 50 PEG_TXN[15..0] 50

PCIE_TXP1 25

PCIE_TXN1 25

PCIE_TXP2 32

PCIE_TXN2 32 PCIE_TXN3 32

LAN MINICARD1

Title

Size Document Number Rev

Date: Sheet

1

TMDS_A_TX2+ 20,51 TMDS_A_TX2- 20,51 TMDS_A_TX1+ 20,51 TMDS_A_TX1- 20,51 TMDS_A_TX0+ 20,51 TMDS_A_TX0- 20,51

TMDS_A_TXC+ 20,51

TMDS_A_TXC- 20,51

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

RS780 (1 of 3)

SJV50-PU

859Wednesday, February 25, 2009

1

-1

of

-1

5

1 2

DY

LDT_RST#_CPU6,58

PLT_RST1#11

D D

LDT_STP#_CPU6

ALLOW_LDTSTOP6,11

DY

R14 0R2J-2-GP

1 2

R11 0R0402-PADR11 0R0402-PAD

SC330P50V2KX-3GP

1 2

R19 0R0402-PADR19 0R0402-PAD

1 2

R24 0R0402-PADR24 0R0402-PAD

SYSREST#

12

C12

NB_LDT_STOP#

NB_ALLOW_LDTSTOP

Close to NB ball

C C

C97

SC22U6D3V5MX-2GP

C97

1D1V_S0

1D8V_S0

12

L2

1 2

FCM1608CF-221T02-GP

220ohm 200mA

SC1U10V2KX-1GP

L13

1 2

63.2R003.15L

2R3J-GP

SC22U6D3V5MX-2GP

ENABLE External CLK GEN

1D8V_S0

L15

B B

1 2

FCM1608CF-221T02-GP

220ohm 200mA

1D8V_S0

L1

1 2

FCM1608CF-221T02-GP

220ohm 200mA

VDDA18HTPLL

C62

SC1U10V2KX-1GP

C62

VDDA18PCIEPLL

C18

12

C85

C85 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C17

C17 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

STRP_DATA VCC_NB

GPIO MODE

0

1.0V 1.1V

4

1D8V_S0

L12

1 2

FCM1608CF-221T02-GP

220ohm 200mA

SC1U10V2KX-1GP

GMCH_RED19

GMCH_GREEN19

GMCH_BLUE19

1D1V_S0_PLLVDD

12

C553

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C78

C63

NB_LCD_CLK18 NB_LCD_DAT18

1

*

C78

1D1V_S0

HDMI_NB_DAT20

HDMI_NB_CLK20

3D3V_S0

L7

1 2

FCM1608CF-221T02-GP

220ohm 200mA

SC1U10V2KX-1GP

1D8V_S0

R47

1 2

0R0603-PAD

C86

SC1U10V2KX-1GP

12

C68

GMCH_HSYNC19 GMCH_VSYNC19

NB_CRT_CLK19

NB_CRT_DAT19

C554

C554 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

RN2

1 2 3

SRN1KJ-7-GP

4

TP38TP38 TP39TP39

12

C38

12

C46

C46 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

NB_PWRGD12,39

CLK_NB_14M3

1 2

3D3V_S0_AVDD

12

C49

C49 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_S0_AVDDDI

12

C91

C91 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R41 140R2F-GPR41 140R2F-GP

1 2

R43 150R2F-1-GPR43 150R2F-1-GP

1 2

R42 150R2F-1-GPR42 150R2F-1-GP

1 2

R34

1 2

715R2F-GP

1D8V_S0_PLVDD18

VDDA18HTPLL

VDDA18PCIEPLL

SYSREST#

NB_LDT_STOP#

NB_ALLOW_LDTSTOP

CLK_NBHT_CLK3 CLK_NBHT_CLK#3

CLK_NB_GFX3 CLK_NB_GFX#3

TP215TP215 TP216TP216

1 1

R192

R192 150R2F-1-GP

150R2F-1-GP

CLK_NBGPP_CLK

1

CLK_NBGPP_CLK#

1

CLK_NB_GPPSB3 CLK_NB_GPPSB#3

1D8V_S0_AVDDQ

DAC_RSET

NB_REFCLK_N

NB_DVI_CLK NB_DVI_DATA

STRP_DATA

RS780_AUX_CAL

3

ANB1C

F12

AVDD1

E12

AVDD2

F14

AVDDDI

G15

AVSSDI

H15

AVDDQ

H14

AVSSQ

E17

C_Pr

F17

Y

F15

COMP_Pb

G18

RED

G17

REDb

E18

GREEN

F18

GREENb

E19

BLUE

F19

BLUEb

A11

DAC_HSYNC

B11

DAC_VSYNC

F8

DAC_SCL

E8

DAC_SDA

G14

DAC_RSET

A12

PLLVDD

D14

PLLVDD18

B12

PLLVSS

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESET#

A10

POWERGOOD

C10

LDTSTOP#

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN

F11

REFCLK_N

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP

V3

GPPSB_REFCLKN

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_CLK0/AUX0P

A8

DDC_DATA0/AUX0N

B7

DDC_CLK1/AUX1P

A7

DDC_DATA1/AUX1N

B10

STRP_DATA

G11

RESERVED

C8

AUX_CAL

RS780M-GP-U2

3D3V_S0

123

678

RN49

RN49 SRN3K3J-1-GP

SRN3K3J-1-GP

4 5

GMCH_HSYNC

GMCH_VSYNC

PART 3 OF 6

DDC_DATA0/AUX0N DDC_CLK0/AUX0P

CRT/TVOUT

LVTM

PM

CLOCKs PLL PWR

MIS.

2

1

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#) 1 :Disable 0 : Enable

*

RS780: Enables Side port memory ( RS780 use HSYNC#)

1 :Disable 0 : Enable

*

SUS_STAT#

Selects Loading of STRAPS From EEPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values

*

0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P

TXOUT_L3N TXOUT_U0P

TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N

TXCLK_LP

TXCLK_LN TXCLK_UP TXCLK_UN

VDDLTP18

VSSLTP18

VDDLT18_1 VDDLT18_2 VDDLT33_1 VDDLT33_2

VSSLT1 VSSLT2 VSSLT3 VSSLT4 VSSLT5 VSSLT6 VSSLT7

LVDS_DIGON

LVDS_BLON

LVDS_ENA_BL

TMDS_HPD

HPD

SUS_STAT#

THERMALDIODE_P THERMALDIODE_N

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9

GMCH_BL_ON

F7

LVDS_ENA_BL

G12

D9 D10

D12 AE8

AD8

TESTMODE_NB

D13

GMCH_TXAOUT0+ 18

GMCH_TXAOUT0- 18

GMCH_TXAOUT1+ 18

GMCH_TXAOUT1- 18

GMCH_TXAOUT2+ 18

GMCH_TXAOUT2- 18

GMCH_TXBOUT0+ 18

GMCH_TXBOUT0- 18

GMCH_TXBOUT1+ 18

GMCH_TXBOUT1- 18

GMCH_TXBOUT2+ 18

GMCH_TXBOUT2- 18

GMCH_TXACLK+ 18

GMCH_TXACLK- 18

GMCH_TXBCLK+ 18

GMCH_TXBCLK- 18

1D8V_S0_VDDLP18

C560

SC1U10V2KX-1GP

1D8V_S0_VDDLT18

SC4D7U6D3V3KX-GP

NB_DVI_HPD SUS_STAT#

L8

1 2

FCM1608CF-221T02-GP

12

C42

C42 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

L10

1 2

PBY201209T-221Y-N-GP

12

C571

RN1

2 3 1

SRN4K7J-8-GP

1 2

DY

HDMI_NB_HPD 20

TP48TP48

12

R29

10KR2J-3-GP

R31

R31 1K8R2F-GP

1K8R2F-GP

C571 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

GMCH_LCDVDD_ON 18

GMCH_BL_ON 34

1

TP52TP52

4

3D3V_S0

C567

R27 100KR2J-1-GP

1

12

1D8V_S0

12

TC12

A A

TC12 ST100U6D3VBM-5GP

ST100U6D3VBM-5GP

77.C1071.081

Near NB

5

3D3V_S0

12

R201

R201 2K2R2J-2-GP

2K2R2J-2-GP

DY

STRP_DATA

4

20090106_SB modify

BLON_IN34,51

BRIGHTNESS_AMD51

3

DY

1 2

R459 0R2J-2-GP

UMA

1 2

R458 0R2J-2-GP

DY

1 2

R460 0R2J-2-GP

LVDS_ENA_BL

GMCH_BL_ON

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

RS780 (2 of 3)

SJV50-PU

1

-1

of

959Wednesday, February 25, 2009

of

959Wednesday, February 25, 2009

of

959Wednesday, February 25, 2009

-1

5

1D1V_S0

L43

1 2

PBY201209T-221Y-N-GP

220 ohm @ 100MHz,2A

D D

1D1V_S0

1 2

PBY201209T-221Y-N-GP

220 ohm @ 100MHz,2A

1D2V_S0

L44

1 2

PBY201209T-221Y-N-GP

220 ohm @ 100MHz,2A

C C

220 ohm @ 100MHz,2A

SC1U10V2KX-1GP

1D8V_S0

L3

1 2

PBY201209T-221Y-N-GP

1D8V_S0

12

C34

SC4D7U6D3V3KX-GP

L45

SC4D7U6D3V3KX-GP

12

C88

80mil Width

SC4D7U6D3V3KX-GP

12

C31

0.6A per ANT Rev1.1, Page3

12

C587

SCD1U10V2KX-4GP

C55

12

C54

12

SCD1U10V2KX-4GP

+1.1V_RUN_VDDHT

SCD1U10V2KX-4GP

0.45A per ANT Rev1.1, Page3

+1.1V_RUN_VDDHTRX

SCD1U10V2KX-4GP

12

C594

SCD1U10V2KX-4GP

C599

12

C30

SCD1U10V2KX-4GP

C81

12

+1.2V_RUN_VDDHTTX

SCD1U10V2KX-4GP

C598

12

+1.8V_RUN_VDDA18PCIE+1.8V_RUN_VDDA18PCIE+1.8V_RUN_VDDA18PCIE

SCD1U10V2KX-4GP

C29

12

R214

1 2

0R0603-PAD

C89

12

SCD1U10V2KX-4GP

C79

12

SCD1U10V2KX-4GP

C20

12

+1.8V_RUN_VDD18_MEM

SC1U10V2KX-1GP

SC4D7U6D3V3KX-GP

C52

12

C25

12

SCD1U10V2KX-4GP

C72

12

SCD1U10V2KX-4GP

C61

12

SCD1U10V2KX-4GP

C24

12

C568

M16

G19

AE25 AD24 AC23 AB22 AA21

W19

M17

M10

AA9 AB9 AD9 AE9

AE11 AD11

K16 L16

P16 R16 T16

H18 F20

E21 D22 B23 A23

Y20 V18

U17 T17 R17 P17

P10 K10

L10

T10 R10

U10

4

J17

J10

W9

H9

Y9

F9

G9

ANB1E

VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2

RS780M-GP-U2

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13

POWER

VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6

VDD33_1 VDD33_2

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

3

300mil Width

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

12

C58

12

C59

SC1U10V2KX-1GP

12

C56

7A per ANT Rev1.1, Page3 Per check list (Rev 0.02) RS780M: 1V ~ 1.1V, check PWR team

SCD1U10V2KX-4GP

C39

12

VDD_MEM

+3.3V_RUN_VDD33

SCD1U10V2KX-4GP

12

C36

C51

12

1 2

0R0603-PAD

SCD1U10V2KX-4GP

R210

12

C35

SCD1U10V2KX-4GP

C26

12

1 2

0R0603-PAD

SCD1U10V2KX-4GP

C28

12

R30

SCD1U10V2KX-4GP

1D1V_S0

SC1U10V2KX-1GP

12

C57

C19

12

3D3V_S0

SC4D7U6D3V3KX-GP

12

C577

SCD1U10V2KX-4GP

+NB_VCORE

1D1V_S0

SC10U6D3V5KX-1GP

C27

12

C37

2

ANB1F

A25

VSSAHT1

D23

VSSAHT2

E22

VSSAHT3

G22

VSSAHT4

G24

VSSAHT5

G25

VSSAHT6

H19

VSSAHT7

J22

VSSAHT8

L17

VSSAHT9

L22

VSSAHT10

L24

VSSAHT11

L25

VSSAHT12

M20

VSSAHT13

N22

VSSAHT14

P20

VSSAHT15

R19

VSSAHT16

R22

VSSAHT17

R24

VSSAHT18

R25

VSSAHT19

H20

VSSAHT20

U22

VSSAHT21

V19

VSSAHT22

SC10U6D3V5KX-1GP

12

C67

W22 W24 W25

AD25

M14 N13

R11 R14

U14 U11 U15

W11

W15 AC12 AA14

AB11 AB15 AB17 AB19 AE20 AB21

Y21

L12

P12 P15

T12

V12

Y18

K11

VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34

RS780M-GP-U2

PART 6/6

GROUND

1

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

ANB1D

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

ANB1D

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CKP MEM_CKN

MEM_COMPP MEM_COMPN

RS780M-GP-U2

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC MEM_DQ1/DVO_HSYNC

MEM_DQ2/DVO_DE

MEM_DQ3/DVO_D0

MEM_DQ4 MEM_DQ5/DVO_D1 MEM_DQ6/DVO_D2 MEM_DQ7/DVO_D4 MEM_DQ8/DVO_D3 MEM_DQ9/DVO_D5

MEM_DQ10/DVO_D6 MEM_DQ11/DVO_D7

MEM_DQ12

MEM_DQ13/DVO_D9 MEM_DQ14/DVO_D10 MEM_DQ15/DVO_D11

MEM_DQS0P/DVO_IDCKP MEM_DQS0N/DVO_IDCKN

MEM_DQS1P

MEM_DQS1N

MEM_DM0

MEM_DM1/DVO_D8

SBD_MEM/DVO_I/F

4

IOPLLVDD18

IOPLLVDD IOPLLVSS

MEM_VREF

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions

1D8V_S0

R226

1 2

0R0402-PAD

+1.8V_IOPLLVDD18

+1.1V_IOPLLVDD

1 2

0R0402-PAD

R230

1D1V_S0

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

RS780 (3 of 3)

SJV50-PU

10 59Wednesday, February 25, 2009

1

-1

of

-1

B B

A A

5

33R2J-2-GP

33R2J-2-GP R339

R339

PLT_RST1#9

ALINK_NBRX_SBTX_P08 ALINK_NBRX_SBTX_N08 ALINK_NBRX_SBTX_P18 ALINK_NBRX_SBTX_N18

SC1U10V2KX-1GP

12

C719

ALINK_NBRX_SBTX_P28 ALINK_NBRX_SBTX_N28 ALINK_NBRX_SBTX_P38 ALINK_NBRX_SBTX_N38

20mil Width

SC1U10V2KX-1GP

12

C720

12 13

3D3V_S5

147

D D

1D2V_S0 +1.2V_RUN_PCIE_PVDD PCIE_VDDR

L36

1 2

PBY201209T-221Y-N-GP

220 ohm 2A

C C

PLT_RST1#9

1 2

C703 SCD1U10V2KX-4GPC703 SCD1U10V2KX-4GP

1 2

C701 SCD1U10V2KX-4GPC701 SCD1U10V2KX-4GP

1 2

C291 SCD1U10V2KX-4GPC291 SCD1U10V2KX-4GP

1 2

SCD1U10V2KX-4GP

C296

C296 C311

C311 C304 SCD1U10V2KX-4GPC304 SCD1U10V2KX-4GP C709 SCD1U10V2KX-4GPC709 SCD1U10V2KX-4GP C705 SCD1U10V2KX-4GPC705 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

SCD1U10V2KX-4GP

1 2 1 2 1 2

ALINK_NBTX_C_SBRX_P08 ALINK_NBTX_C_SBRX_N08 ALINK_NBTX_C_SBRX_P18 ALINK_NBTX_C_SBRX_N18 ALINK_NBTX_C_SBRX_P28 ALINK_NBTX_C_SBRX_N28 ALINK_NBTX_C_SBRX_P38 ALINK_NBTX_C_SBRX_N38

R144 562R2F-GPR144 562R2F-GP

1 2

R146 2K05R2F-GPR146 2K05R2F-GP

1 2

Place R <100mils form pins T25,T24

U6D

11

TSLVC08APW-1-GP

73.07408.L16

2ND = 73.07408.02B

SA_20081106

B B

X-32D768KHZ-34GPU

82.30001.661

2nd = 82.30001.B21

A A

X4

C385

C385 SC10P50V2JN-4GP

SC10P50V2JN-4GP

12

2 3

12

C384

SC10P50V2JN-4GP

5

4

1

32K_X1

12

R153

R153 10MR2J-L-GP

10MR2J-L-GP

32K_X2

CLK_SB_14M3

4

NB_RST#

ALINK_NBRX_C_SBTX_P0 ALINK_NBRX_C_SBTX_N0 ALINK_NBRX_C_SBTX_P1 ALINK_NBRX_C_SBTX_N1 ALINK_NBRX_C_SBTX_P2 ALINK_NBRX_C_SBTX_N2 ALINK_NBRX_C_SBTX_P3 ALINK_NBRX_C_SBTX_N3

PCIE_CALRP

PCIE_CALRN

CLK_PCIE_SB3 CLK_PCIE_SB#3

PLT_RST1#_B 25,31,32,34,35,50,58

DY

R345

0R2J-2-GP

ALLOW_LDTSTOP6,9

PROCHOT#_SB6

CPU_PWRGD6,58 CPU_LDT_STOP#6 CPU_LDT_RST#6

R345

4

TP243TP243

25M_X1

12

25M_X2

1

ASB1A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

SB700-1-GP-U1

71.SB700.M02

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

LPC

CPU

LPC

RTC

RTC XTAL

3

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4

PCICLK5/GPIO41

PCI CLKS

PCIRST#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

PCI INTERFACE

CLOCK GENERATOR

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

3

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0# REQ1# REQ2#

REQ3#/GPIO70 REQ4#/GPIO71

GNT0# GNT1# GNT2#

GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

LOCK#

INTE#/GPIO33 INTF#/GPIO34

INTG#/GPIO35

INTH#/GPIO36

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

INTRUDER_ALERT#

VBAT

P4 P3 P1 P2 T4 T3

PCIRST#_SB

N1

U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2 AE3

G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15

C3

INTRUDER#

C2

RTC_AUX_S5_R

B2

PCI_CLK0 PCI_CLK1

1

INT_PIRQE#

1

INT_PIRQF#

1

INT_PIRQG#

1

INT_PIRQH#

1

LPCCLK0_R

R357 22R2J-2-GPR357 22R2J-2-GP

LPCCLK1_R

R358 22R2J-2-GPR358 22R2J-2-GP

LPC_LDRQ0#

1

LPC_LDRQ1#

1

PCI_REQ#5

INT_SERIRQ 34

RTC_CLK 15,33

1

SC1U10V2KX-1GP

SCD1U16V2ZY-2GP

12

C763

2

TP237TP237

1

TP238TP238

1

PCI_CLK2 15

PCI_CLK3 15 CLK_PCI4 15 CLK_PCI_LOM 15

TP172TP172

PCI_AD23 15 PCI_AD24 15 PCI_AD25 15 PCI_AD26 15 PCI_AD27 15 PCI_AD28 15 PCI_AD29 15 PCI_AD30 15

Delete test pad

TP160TP160 TP229TP229 TP161TP161 TP159TP159

1 2 1 2

LPC_LAD0 34,35,58 LPC_LAD1 34,35,58 LPC_LAD2 34,35,58 LPC_LAD3 34,35,58

LPC_LFRAME# 34,35,58

TP245TP245 TP233TP233

TP183TP183

1 2

R361 1KR2J-1-GPR361 1KR2J-1-GP

12

C762

1 2

R331 10KR2J-3-GPR331 10KR2J-3-GP

RTC_AUX_S5

2

-1 090219

DY

DY DY

DY

PM_CLKRUN# 34

PCLK_FWH 15,35,58

EC51 SC10P50V2JN-4GP

1 2

EC50 SC10P50V2JN-4GP

1 2

3D3V_S0

PCLK_KBC 15,34

Title

Size Document Number Rev

Date: Sheet

1

RTC1

1

PWR

2

GND

NP1

NP2

BAT-CON2-1-GP-U

62.70001.011

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SB700 (1 of 5)

SJV50-PU

11 59Wednesday, February 25, 2009

1

-1

of

-1

5

20090114 SB

NB_PWRGD_R

ACZ_BITCLK_MDC30

HDMI

DY

ACZ_BITCLK27

ACZ_SDATAOUT27,30

ACZ_SDATAIN027 ACZ_SDATAIN130

12

R3300R2J-2-GPDYR3300R2J-2-GP

NB_PWRGD ECSMI#_KBC

FP_ID

SB_TEST2 SB_TEST1 SB_TEST0

ICH_PME# PCIE_WAKE# SMB_ALERT#

ACZ_SYNC27,30 ACZ_RST#27,30

PM_SLP_S5# ECSCI#_SB ECSWI#_SB PM_SLP_S3#

RSMRST#_KBC34

Close to SB700

EC49

EC122

SC12P50V2JN-3GP

1 2

DY

3D3V_S5

12

EC48

1 2

R362

R362 10KR2J-3-GP

10KR2J-3-GP

RSMRST#_KBC

NB_PWRGD9,39

1D8V_S0

3D3V_S0

D D

C C

B B

A A

1 2

R20 1KR2J-1-GPR20 1KR2J-1-GP

1 2

R353 10KR2J-3-GPR353 10KR2J-3-GP

1 2

R329 10KR2J-3-GPR329 10KR2J-3-GP

3D3V_S5

1 2

DY

R351 2K2R2F-GP

1 2

DY

R349 2K2R2F-GP

1 2

DY

R348 2K2R2F-GP

1 2

DY

R148 10KR2J-3-GP

1 2

DY

R350 10KR2J-3-GP

1 2

DY

R341 10KR2J-3-GP

RN65

8 7 6

SRN10KJ-6-GP

1 2 3 45

12

R328

R328 10KR2J-3-GP

10KR2J-3-GP

DY

5

4

3D3V_S0

12

R347

R347 4K7R2F-GP

4K7R2F-GP

SB_ASF_CLK SB_ASF_DAT

1 2

R462 33R2J-2-GPR462 33R2J-2-GP

1 2

R346 33R2J-2-GPR346 33R2J-2-GP

1 2

R342 33R2J-2-GPR342 33R2J-2-GP

1 2

R333 33R2J-2-GPR333 33R2J-2-GP

1 2

R338 33R2J-2-GPR338 33R2J-2-GP

EC83

EC84

SC12P50V2JN-3GP

1 2

DY

4

3

ASB1D

Part 4 of 5

SB700

ICH_PME#

TP179TP179

1

TP178TP178

1

TP244TP244

PM_SLP_S3#33,34,39,47,48 PM_SLP_S5#34,44,46 PM_PWRBTN#34,58

SB_PWRGD3,39

KA20GATE34

KBRCIN#34 ECSCI#_SB34

PCIE_WAKE#25

ACZ_SPKR27

ECSWI#_SB34

SC12P50V2JN-3GP

ECSMI#_KBC

TP177TP177 TP175TP175

EC_TMR34

TP228TP228 TP230TP230

TP232TP232 TP234TP234 TP182TP182 TP235TP235 TP248TP248

TP190TP190 TP194TP194

USB_OC#324,58

TP250TP250 TP193TP193

USB_OC#024

TP240TP240 TP239TP239

TP241TP241

1

PM_SUS_STAT#PM_SUS_STAT#

SB_TEST2 SB_TEST1 SB_TEST0

GEVENT5#

1

SYS_RST#

1

SMB_ALERT# NB_PWRGD_R

RSMRST#_KBC

FP_ID GPIO6

1

GPIO4

1

HDMI

SB_MEM_CLK SB_MEM_DAT

DDC1_SCL

1

DDC1_SDA

1

SATA_DET#

1

GPIO5

1

GEVENT7#

1

USB_OC#5

1

USB_OC#4

1 1

1

ACZ_BTCLK_R ACZ_SDATAOUT_RACZ_SDATAOUT_RACZ_SDATAOUT_RACZ_SDATAOUT_RACZ_SDATAOUT_RACZ_SDATAOUT_R

ACZ_SDIN2

1

ACZ_SDIN3

1

ACZ_SYNC_R ACZ_RST#_R

1

ACZ_RST#_R 15

RI# S2#

GPM8#

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

SB700

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

USB OC

HD AUDIO

TO STRAPS

INTEGRATED uC

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

SB700-1-GP-U1

71.SB700.M02

3

INTEGRATED uC

Part 4 of 5

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N USB_FSD12P

USB_FSD12N

USB_HSD11P

USB 1.1

USB_HSD11N USB_HSD10P

USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N USB_HSD3P

GPIO

USB_HSD3N USB_HSD2P

USB_HSD2N USB_HSD1P

USB_HSD1N USB_HSD0P

USB_HSD0N

IMC_GPIO8 IMC_GPIO9

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11 SDA2/IMC_GPIO12

SCL3_LV/IMC_GPIO13

SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

2

CLK48_USB

C8

USB_PCOMP

G8

E6 E7

F7 E8

H11 J10

E11 F11

A11 B11

C10 D10

G11 H12

E12 E14

C12 D12

B12 A12

G12 G14

H14 H15

A13 B13

B14 A14

A18 B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

1 2

R355

R355 11K8R2F-GP

11K8R2F-GP

1%

Place R near pin14. Route it with 10mils Trace width and 25mils spacing to any signals in X, Y, Z directions.

USBPP11 31 USBPN11 31

USBPP10 18 USBPN10 18

USBPP9 32 USBPN9 32

USBPP8 24 USBPN8 24

USBPP7 24,58 USBPN7 24,58

USBPP6 24 USBPN6 24

USBPP5 23,58 USBPN5 23,58

USBPP1 32

USBPN1 32

USBPP0 24

USBPN0 24

SB_GPO16 15 SB_GPO17 15

Strap Pin / define to use LPC or SPI ROM

2

1

CLK48_USB 3

CLK48_USB_R2

1 2

DY

R364

R364 10KR2J-3-GP

10KR2J-3-GP

Place these close SB700

1 2

C767

SC10P50V2JN-4GP

DY

USB

Pair

SB_ASF_CLK SB_ASF_DAT

SJV50

Title

Size Document Number Rev

Date: Sheet

Device

11

CardReader

10

CCD Mini Card2

9 8

USB4

7 USB3

USB2

6

BlueTooth

5

NC

4

NC

3 2

NC Mini Card1

1

USB1

0

3D3V_S5

RN63

SRN2K2J-2-GP

4 5

SB_MEM_CLK3,16,17 SB_MEM_DAT3,16,17

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SB700 (2 of 5)

SJV50-PU

1

OCP2# OCP1#

OCP0#

3D3V_S0

678

123

12 59Wednesday, February 25, 2009

of

-1

5

4

3

2

1

D D

SATA_TXP021

SATA HDD

SATA ODD

C C

SATA_TXN021

SATA_RXN021 SATA_RXP021

SATA_TXP122 SATA_TXN122

SATA_RXN122 SATA_RXP122

C244

C244 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

12

X3

XTAL-25MHZ-102-GP

2ND = 82.30020.791

X3

82.30020.851

12

C245

C245 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

Very Close to SB700

12

R134

R134 10MR2J-L-GP

10MR2J-L-GP

SATA_X2_R

R332

1 2

0R0603-PAD

1 2

R135 300R2J-4-GPR135 300R2J-4-GP

PLLVDD_SATA1D2V_S0

20mil Width

12

C710

C710 SC1U10V2KX-1GP

SC1U10V2KX-1GP

R336

1KR2F-3-GP

1 2

MEDIA_LED#

SATA_CAL SATA_X1

12

C711

SCD1U10V2KX-4GP

SATA_X2

Close to SB700

B B

3D3V_S0

R335

1 2

0R0603-PAD

XTLVDD_SATA

20mil Width

12

C706

C706 SC1U10V2KX-1GP

SC1U10V2KX-1GP

Close to SB700

ASB1B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W12

XTLVDD_SATA

SB700-1-GP-U1

71.SB700.M02

SB700

Part 2 of 5

SATA PWR SERIAL ATA

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23 IDE_D9/GPIO24

ATA 66/100/133

IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS#/GPIO32

LAN_RST#/GPIO13

ROM_RST#/GPIO14

SPI ROM

FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55

HW MONITOR

VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE_DRQ

IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#

AVDD AVSS

Delete Test Pad

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

LAN_RST# ROM_RST#

PSW_CLR#

SB_SPI_MISO SPI_MOSI_R ICH_SPICLK SB_SPI_HOLD ICH_SPICS0#

G6 D2 D1 F4 F3

U15 J1

M8 M5 M7

P5 P8 R8

C6 B6 A6 A5 B5

A4 B4 C4 D4 D5 D6 A7 B7

F6 G7

1 1

AVDD_HWM

SCD1U10V2KX-4GP

R359

12

1 1 1 1 1

TP236TP236 TP176TP176

3D3V_S0

SC2D2U6D3V3KX-GP

TP247TP247 TP181TP181 TP180TP180 TP246TP246 TP249TP249

1

23

RN66

RN66 SRN10KJ-5-GP

SRN10KJ-5-GP

4

1 2

0R0603-PAD

12

R360

DY

R363

3D3V_S5

PSW_CLR# 58

ALERT#_SB 33

20081201

3D3V_S0

12

R337

10KR2J-3-GP

A A

MEDIA_LED#38

MEDIA_LED#

SA_20081030

5

4

3

Layout connect to Cap then GND

2

SJV50

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

SB700 (3 of 5)

SJV50-PU

1

of

13 59Wednesday, February 25, 2009

of

13 59Wednesday, February 25, 2009

of

13 59Wednesday, February 25, 2009

-1

5

3D3V_S0

D D

12

C279

SC10U10V5ZY-1GP

1D2V_S0

L33

1 2

PBY201209T-221Y-N-GP

220 ohm 2A

C C

L28

1 2

PBY201209T-221Y-N-GP

DY

12

EC85

SCD1U16V2ZY-2GP

12

C708

SC4D7U6D3V3KX-GP

50mil Width

12

C334

SC4D7U6D3V3KX-GP

50mil Width

C218

SC10U6D3V5KX-1GP

12

C714

C721

C241

3D3V_S0

C717

SCD1U10V2KX-4GP

12

SC1U10V2KX-1GP

PCIE_VDDR

SC1U10V2KX-1GP

AVDD_SATA1D2V_S0

C712

SC10U6D3V5KX-1GP

SC1U10V2KX-1GP

12

C702

SCD1U10V2KX-4GP

12

C722

SCD1U10V2KX-4GP

C700

C699

SCD1U10V2KX-4GP

12

C732

SCD1U10V2KX-4GP

C724

SCD1U10V2KX-4GP

Use Plane Shape for +3.3V_AVDD_USB

3D3V_S5

L38

1 2

PBY201209T-221Y-N-GP

B B

12

C387

SC10U10V5ZY-1GP

C383

SC10U10V5ZY-1GP

AVDD_USB

12

C739

SC1U10V2KX-1GP

12

C751

SC1U10V2KX-1GP

50mil Width

12

C741

SCD1U10V2KX-4GP

C754

SCD1U10V2KX-4GP

AB21

AA21 AA22 AE25

AA14 AB18 AA15

AA17 AC18 AD17

AE17

T15 U16

U17

AA4 AB5

Y20

P18 P19 P20 P21 R22 R24 R25

A16 B16 C16 D16 D17 E17 F15 F17 F18 G15 G17 G18

L9

M9

U9

V8

W7

Y6

4

ASB1C

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12

VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4

PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7

AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7

AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5

SB700-1-GP-U1

71.SB700.M02

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

3.3V_S5 I/OCORE S5

SATA I/O

USB_PHY_1.2V_1 USB_PHY_1.2V_2

PLL CLKGEN I/O

USB I/O

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

S5_1.2V_1 S5_1.2V_2

V5_VREF AVDDCK_3.3V AVDDCK_1.2V

AVDDC

L15 M12 M14 N13 P12 P14 R11 R15 T16

L21 L22 L24 L25

A17 A24 B17 J4 J5 L1 L2

50mil Width

G2 G4

A10 B10

V5_VREF

AE7

AVDDCK_3D3V

J16

AVDDK_1D2V

K17

3D3V_AVDDC

E9

12

C752

12

C731

C730

SC1U10V2KX-1GP

12

C369

SC2D2U6D3V3KX-GP

DY

12

C760

DY

1 2

12

C765

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

68.00206.121

3

1D2V_S0

12

C718

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

3D3V_S5

12

C729

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

12

C764

C755

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

3D3V_S5

L37

PBY201209T-221Y-N-GP

CKVDD

12

C728

SCD1U10V2KX-4GP

1D2V_S5

12

C386

SC10U10V5ZY-1GP

12

C375

SC10U10V5ZY-1GP

R147

1 2

0R0402-PAD

12

C370

SC2D2U6D3V3KX-GP

DY

12

C757

SC4D7U6D3V3KX-GP

12

C373

SC10U10V5ZY-1GP

12

C251

C255

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

1D2V_S0

5V_S0

R128

12

2ND = 83.R0304.A8F

12

1KR2J-1-GP

3D3V_S0

RB751V-40-2-GP

K A

D3

83.R2004.B8F

2

ASB1E

Part 5 of 5

GROUND

AB11 AB13 AB15 AB17

AC8 AD8

M16 M17 M21

T10 U10 U11 U12 V11 V14

Y11 Y14 Y17 AA9 AB9

AE8

A15 B15 C14

D11 D13 D14 D15 E15 F12 F14

H17

K10 K12 K14 K15

H18

K25

P16

W9

Y9

D8 D9

G9

H9

J9 J11 J12 J14 J15

J17 J22

F9

SB700

AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20

AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24

PCIE_CK_VSS_1 PCIE_CK_VSS_2 PCIE_CK_VSS_3 PCIE_CK_VSS_4 PCIE_CK_VSS_5 PCIE_CK_VSS_6 PCIE_CK_VSS_7 PCIE_CK_VSS_8

AVSSC

SB700-1-GP-U1

71.SB700.M02

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

AVSSCK

1

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

AVDDCK_3D3V

C736

SCD1U10V2KX-4GP

AVDDK_1D2V

C727

SCD1U10V2KX-4GP

A A

5

4

SCD1U10V2KX-4GP

3

20mil Width

12

SC1U10V2KX-1GP

12

SC1U10V2KX-1GP

12

C737

20mil Width

12

C733

R354

0R0603-PAD

R344

1 2

0R0603-PAD

3D3V_S0

12

1D2V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

SB700 (4 of 5)

SJV50-PU

1

-1

of

14 59Wednesday, February 25, 2009

of

14 59Wednesday, February 25, 2009

of

14 59Wednesday, February 25, 2009

-1

A

B

C

D

E

Delete DY Parts

REQUIRED STRAPS

4 4

TP170TP170

1

TP171TP171

1

3 3

REQUIRED SYSTEM STRAPS

TP186TP186

1

3D3V_S5

PCI_CLK2 11

PCI_CLK3 11

CLK_PCI4 11

CLK_PCI_LOM 11

PCLK_FWH 11,35,58 PCLK_KBC 11,34

RTC_CLK 11,33

ACZ_RST#_R 12

SB_GPO17 12

R34010KR2J-3-GP R34010KR2J-3-GP

1

23

RN62

RN62 SRN10KJ-5-GP

SRN10KJ-5-GP

4

2 2

PULL HIGH

PCI_CLK2

WatchDOG (NB_PWRGD) ENABLED

PCI_CLK3

USE DEBUG STRAPS

CLK_PCI_LOM CLK_PCI4

RESERVED

PULL LOW

WatchDog (NB_PWRGD) DISABLED

DEFAULT

IGNORE DEBUG STRAPS

DEFAULT

1

23

RN61

RN61 SRN10KJ-5-GP

SRN10KJ-5-GP

4

PCLK_FWH

IMC ENABLED

IMC DISABLED

DEFAULT

CLKGEN ENABLED

(Use Internal)

CLKGEN DISABLED

(Use External)

DEFAULT

RTCCLKPCLK_KBC

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

12

AZ_RST#

ENABLE PCI ROM BOOT

DISABLE PCI ROM BOOT

DEFAULT

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK

1 1

A

B

1

23

RN29

RN29 SRN2K2J-1-GP

SRN2K2J-1-GP

4

SB_GPO17 , SB_GPO16

ROM TYPE: H, H = Reserved

H, L = SPI ROM

DEFAULT

L, H = LPC ROM

L, L = FWH ROM

C

SB_GPO16 12

DEBUG STRAPS

TP169TP169

1

TP168TP168 TP231TP231 TP166TP166 TP164TP164 TP165TP165 TP163TP163 TP162TP162

PCI_AD28

USE

PULL

LONG

HIGH

RESET

(DEFAULT) (DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)

USE

PULL

SHORT

LOW

RESET

USE PCI PLL

BYPASS PCI PLL

PCI_AD26PCI_AD27

USE ACPI BCLK

BYPASS ACPI BCLK

Note: SB700 has 15K internal PU FOR PCI_AD[30:23]

D

PCI_AD23 11

1

PCI_AD24 11

1

PCI_AD25 11

1

PCI_AD26 11

1

PCI_AD27 11

1

PCI_AD28 11

1

PCI_AD29 11

1

PCI_AD30 11

PCI_AD25 PCI_AD23

USE IDE PLL

BYPASS IDE PLL

Title

Size Document Number Rev

Date: Sheet

PCI_AD24

USE DEFAULT PCIE STRAPS

USE EEPROM PCIE STRAPS

SB700 (5 of 5)

Reserved

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SJV50-PU

PCI_AD30 PCI_AD29

Reserved

-1

of

15 59Wednesday, February 25, 2009

of

15 59Wednesday, February 25, 2009

of

15 59Wednesday, February 25, 2009

E

A

B

C

D

E

DDR2 SOCKET_2 (9.2mm)

PARALLEL TERMINATION

4 4

DM2

MEM_MB_ADD05 MEM_MB_ADD15 MEM_MB_ADD25 MEM_MB_ADD35 MEM_MB_ADD45 MEM_MB_ADD55 MEM_MB_ADD65 MEM_MB_ADD75 MEM_MB_ADD85

MEM_MB_ADD95 MEM_MB_ADD105 MEM_MB_ADD115 MEM_MB_ADD125 MEM_MB_ADD135 MEM_MB_ADD145 MEM_MB_ADD155

MEM_MB_BANK25 MEM_MB_BANK05 MEM_MB_BANK15

MEM_MB_DATA05 MEM_MB_DATA15 MEM_MB_DATA25 MEM_MB_DATA35 MEM_MB_DATA45 MEM_MB_DATA55 MEM_MB_DATA65 MEM_MB_DATA75 MEM_MB_DATA85

MEM_MB_DATA95 MEM_MB_DATA105 MEM_MB_DATA115

3 3

2 2

VREF_DDR_MEM

1 1

MEM_MB_DATA125 MEM_MB_DATA135 MEM_MB_DATA145 MEM_MB_DATA155 MEM_MB_DATA165 MEM_MB_DATA175 MEM_MB_DATA185 MEM_MB_DATA195 MEM_MB_DATA205 MEM_MB_DATA215 MEM_MB_DATA225 MEM_MB_DATA235 MEM_MB_DATA245 MEM_MB_DATA255 MEM_MB_DATA265 MEM_MB_DATA275 MEM_MB_DATA285 MEM_MB_DATA295 MEM_MB_DATA305 MEM_MB_DATA315 MEM_MB_DATA325 MEM_MB_DATA335 MEM_MB_DATA345 MEM_MB_DATA355 MEM_MB_DATA365 MEM_MB_DATA375 MEM_MB_DATA385 MEM_MB_DATA395 MEM_MB_DATA405 MEM_MB_DATA415 MEM_MB_DATA425 MEM_MB_DATA435 MEM_MB_DATA445 MEM_MB_DATA455 MEM_MB_DATA465 MEM_MB_DATA475 MEM_MB_DATA485 MEM_MB_DATA495 MEM_MB_DATA505 MEM_MB_DATA515 MEM_MB_DATA525 MEM_MB_DATA535 MEM_MB_DATA545 MEM_MB_DATA555 MEM_MB_DATA565 MEM_MB_DATA575 MEM_MB_DATA585 MEM_MB_DATA595 MEM_MB_DATA605 MEM_MB_DATA615 MEM_MB_DATA625 MEM_MB_DATA635

MEM_MB_DQS0_N5 MEM_MB_DQS1_N5 MEM_MB_DQS2_N5 MEM_MB_DQS3_N5 MEM_MB_DQS4_N5 MEM_MB_DQS5_N5 MEM_MB_DQS6_N5 MEM_MB_DQS7_N5

MEM_MB_DQS0_P5 MEM_MB_DQS1_P5 MEM_MB_DQS2_P5 MEM_MB_DQS3_P5 MEM_MB_DQS4_P5 MEM_MB_DQS5_P5 MEM_MB_DQS6_P5 MEM_MB_DQS7_P5

MEM_MB0_ODT05 MEM_MB0_ODT15

SC10U6D3V5MX-3GP

12

C458

DY

A

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

12

C449

C455

Place C2.2uF and 0.1uF < 500mils from DDR connector

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

1

VREF

2

VSS

202

GND

MH1

DDR2-200P-23-GP-U1

62.10017.A71

62.10017.B51

9.2 mm

B

108

RAS#

109

WE#

113

CAS#

110

CS0#

115

CS1#

79

CKE0

80

CKE1

30

CK0

32

CK0#

164

CK1

166

CK1#

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

195

SDA

197

SCL

199

VDDSPD

NC#163/TEST

REVERSE TYPE

NC#50 NC#69 NC#83

NC#120

DIMM2_SA0

198

SA0

200

SA1

50 69 83 120 163

1D8V_S3

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

MH2

R177

1 2

(A1)

MEM_MB_RAS# 5 MEM_MB_WE# 5 MEM_MB_CAS# 5

MEM_MB0_CS#0 5 MEM_MB0_CS#1 5

MEM_MB_CKE0 5 MEM_MB_CKE1 5

MEM_MB_CLK0_P 5 MEM_MB_CLK0_N 5

MEM_MB_CLK1_P 5 MEM_MB_CLK1_N 5

MEM_MB_DM0 5 MEM_MB_DM1 5 MEM_MB_DM2 5 MEM_MB_DM3 5 MEM_MB_DM4 5 MEM_MB_DM5 5 MEM_MB_DM6 5 MEM_MB_DM7 5

SB_MEM_DAT 3,12,17

SB_MEM_CLK 3,12,17

10KR2J-3-GP

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

MEM_MB_CLK0_P

12

C203

C203 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MB_CLK0_N MEM_MB_CLK1_P

12

C197

C197 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MB_CLK1_N

C

3D3V_S0

SC2D2U6D3V3KX-GP

12

C454

C454 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C457

DY

1D8V_S3

Place these Caps near DM2

0D9V_S3

12

C476

12

C472

C475

SC2D2U6D3V3KX-GP

Place these Caps near PARALLEL TERMINATION

12

C466

C468

SCD1U16V2ZY-2GP

Put decap near power(0.9V) and pull-up resistor

0D9V_S3

RN41

1

8 2 3 4 5

SRN47J-4-GP

RN38

1 2 3 4 5

SRN47J-4-GP

RN44

1 2 3 4 5

SRN47J-4-GP

RN39

1 2 3 4 5

SRN47J-4-GP

RN40

1 2 3 4 5

SRN47J-4-GP

RN42

1 2 3 4 5

SRN47J-4-GP

RN43

1 2 3 4 5

SRN47J-4-GP

Do not share the Term resistor between the DDR addess and Control Signals.

Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor

0D9V_S3

12

C450

SCD1U16V2ZY-2GP

12

C473

SC2D2U6D3V3KX-GP

12

C447

C463

SCD1U16V2ZY-2GP

C452

C461

SCD1U16V2ZY-2GP

12

C478

C404

SCD1U16V2ZY-2GP

12

C443

C413

SCD1U16V2ZY-2GP

D

MEM_MB0_ODT1 5

7

MEM_MB0_CS#1 5

6

MEM_MB_CAS# 5 MEM_MB_WE# 5

8

MEM_MB_BANK2 5

7

MEM_MB_CKE0 5

6

MEM_MB_ADD15 5 MEM_MB_CKE1 5

8

MEM_MB_BANK1 5

7

MEM_MB0_CS#0 5

6

MEM_MB0_ODT0 5 MEM_MB_ADD13 5

8

MEM_MB_ADD5 5

7

MEM_MB_ADD8 5

6

MEM_MB_ADD12 5 MEM_MB_ADD9 5

8

MEM_MB_BANK0 5

7

MEM_MB_ADD10 5

6

MEM_MB_ADD1 5 MEM_MB_ADD3 5

8

MEM_MB_ADD14 5

7

MEM_MB_ADD11 5

6

MEM_MB_ADD7 5 MEM_MB_ADD6 5

8

MEM_MB_ADD2 5

7

MEM_MB_ADD4 5

6

MEM_MB_ADD0 5 MEM_MB_RAS# 5

12

C460

C424

SCD1U16V2ZY-2GP

12

C401

SCD1U16V2ZY-2GP

Layout Note: Place one cap close to every 2 pullup resistors terminated to 0D9V_S3

12

C410

C464

SCD1U16V2ZY-2GP

Title

Size Document Number Rev

Date: Sheet

12

C462

C423

SC1KP50V2KX-1GP

SC10P50V2JN-4GP

1D8V_S3

12

C407

SCD1U16V2ZY-2GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR2 Socket_2

SJV50-PU

16 59Wednesday, February 25, 2009

E

-1

of

A

B

C

D

E

DDR2 SOCKET_1 (5.2mm)

DM1

MEM_MA_ADD05 MEM_MA_ADD15 MEM_MA_ADD25 MEM_MA_ADD35 MEM_MA_ADD45 MEM_MA_ADD55 MEM_MA_ADD65 MEM_MA_ADD75 MEM_MA_ADD85 MEM_MA_ADD95 MEM_MA_ADD105 MEM_MA_ADD115

4 4

3 3

2 2

VREF_DDR_MEM

SC10U6D3V5MX-3GP

DY

MEM_MA_ADD125 MEM_MA_ADD135 MEM_MA_ADD145 MEM_MA_ADD155

MEM_MA_BANK25 MEM_MA_BANK05 MEM_MA_BANK15

MEM_MA_DATA05 MEM_MA_DATA15 MEM_MA_DATA25 MEM_MA_DATA35 MEM_MA_DATA45 MEM_MA_DATA55 MEM_MA_DATA65 MEM_MA_DATA75 MEM_MA_DATA85 MEM_MA_DATA95 MEM_MA_DATA105 MEM_MA_DATA115 MEM_MA_DATA125 MEM_MA_DATA135 MEM_MA_DATA145 MEM_MA_DATA155 MEM_MA_DATA165 MEM_MA_DATA175 MEM_MA_DATA185 MEM_MA_DATA195 MEM_MA_DATA205 MEM_MA_DATA215 MEM_MA_DATA225 MEM_MA_DATA235 MEM_MA_DATA245 MEM_MA_DATA255 MEM_MA_DATA265 MEM_MA_DATA275 MEM_MA_DATA285 MEM_MA_DATA295 MEM_MA_DATA305 MEM_MA_DATA315 MEM_MA_DATA325 MEM_MA_DATA335 MEM_MA_DATA345 MEM_MA_DATA355 MEM_MA_DATA365 MEM_MA_DATA375 MEM_MA_DATA385 MEM_MA_DATA395 MEM_MA_DATA405 MEM_MA_DATA415 MEM_MA_DATA425 MEM_MA_DATA435 MEM_MA_DATA445 MEM_MA_DATA455 MEM_MA_DATA465 MEM_MA_DATA475 MEM_MA_DATA485 MEM_MA_DATA495 MEM_MA_DATA505 MEM_MA_DATA515 MEM_MA_DATA525 MEM_MA_DATA535 MEM_MA_DATA545 MEM_MA_DATA555 MEM_MA_DATA565 MEM_MA_DATA575 MEM_MA_DATA585 MEM_MA_DATA595 MEM_MA_DATA605 MEM_MA_DATA615 MEM_MA_DATA625 MEM_MA_DATA635

MEM_MA_DQS0_N5 MEM_MA_DQS1_N5 MEM_MA_DQS2_N5 MEM_MA_DQS3_N5 MEM_MA_DQS4_N5 MEM_MA_DQS5_N5 MEM_MA_DQS6_N5 MEM_MA_DQS7_N5

MEM_MA_DQS0_P5 MEM_MA_DQS1_P5 MEM_MA_DQS2_P5 MEM_MA_DQS3_P5 MEM_MA_DQS4_P5 MEM_MA_DQS5_P5 MEM_MA_DQS6_P5 MEM_MA_DQS7_P5

MEM_MA0_ODT05 MEM_MA0_ODT15

SC2D2U6D3V3KX-GP

12

C430

C429

Place C2.2uF and 0.1uF < 500mils from DDR connector

SCD1U10V2KX-4GP

12

C426

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

/DQS0

29

/DQS1

49

/DQS2

68

/DQS3

129

/DQS4

146

/DQS5

167

/DQS6

186

/DQS7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

ODT0

119

ODT1

1

VREF

2

VSS

202

GND

SKT-SODIMM20022U2GP

62.10017.691

2ND = 62.10017.911

5.2mm

108

/RAS

109

/WE

113

/CAS

110

/CS0

115

/CS1

79

CKE0

80

CKE1

30

CK0

32

/CK0

164

CK1

166

/CK1

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

195

SDA

197

SCL

199

VDDSPD

198

SA0

200

SA1

50

NC#50

69

NC#69

83

NC#83

120

NC#120

163

NC#163/TEST

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

REVERSE TYPE

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

1D8V_S3

(A0)

MEM_MA_RAS# 5 MEM_MA_WE# 5 MEM_MA_CAS# 5

MEM_MA0_CS#0 5 MEM_MA0_CS#1 5

MEM_MA_CKE0 5 MEM_MA_CKE1 5

MEM_MA_CLK0_P 5 MEM_MA_CLK0_N 5

MEM_MA_CLK1_P 5 MEM_MA_CLK1_N 5

MEM_MA_DM0 5 MEM_MA_DM1 5 MEM_MA_DM2 5 MEM_MA_DM3 5 MEM_MA_DM4 5 MEM_MA_DM5 5 MEM_MA_DM6 5 MEM_MA_DM7 5

SB_MEM_DAT 3,12,16

SB_MEM_CLK 3,12,16

SC2D2U6D3V3KX-GP

SC1D5P50V2CN-1GP

C425

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

12

3D3V_S0

12

C416

C416 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

MEM_MA_CLK0_P

C198

MEM_MA_CLK0_N MEM_MA_CLK1_P

C186

MEM_MA_CLK1_N

Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor

12

C459

Place these Caps near DM2

1D8V_S3

12

0D9V_S3

C811

12

C810

C808

SC2D2U6D3V3KX-GP

Place these Caps near PARALLEL TERMINATION

12

C408

12

C409

C465

SCD1U16V2ZY-2GP

C465

SCD1U16V2ZY-2GP

PARALLEL TERMINATION

Put decap near power(0.9V) and pull-up resistor

0D9V_S3

RN33

1

8 2 3 4 5

SRN47J-4-GP

RN36

1 2 3 4 5

SRN47J-4-GP

RN37

1 2 3 4 5

SRN47J-4-GP

RN34

1 2 3 4 5

SRN47J-4-GP

RN35

1 2 3 4 5

SRN47J-4-GP

RN31

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN32

RN32

1 2 3 4 5

SRN47J-4-GP

Do not share the Term resistor between the DDR addess and Control Signals.

0D9V_S3

12

C420

C446

SCD1U16V2ZY-2GP

12

C809

12

C444

SC2D2U6D3V3KX-GP

SCD01U50V2KX-1GP

12

C467

C469

SCD1U16V2ZY-2GP

MEM_MA_BANK2 5

7

MEM_MA_ADD15 5

6

MEM_MA_CKE0 5 MEM_MA_CKE1 5

8

MEM_MA_ADD0 5

7

MEM_MA_ADD2 5

6

MEM_MA_ADD4 5

MEM_MA_BANK1 5

8

MEM_MA0_CS#0 5

7

MEM_MA_RAS# 5

6

MEM_MA_ADD13 5 MEM_MA0_ODT0 5

8

MEM_MA_ADD5 5

7

MEM_MA_ADD8 5

6

MEM_MA_ADD9 5 MEM_MA_ADD12 5

8

MEM_MA_ADD14 5

7

MEM_MA_ADD11 5

6

MEM_MA_ADD7 5 MEM_MA_ADD6 5

8

MEM_MA_ADD10 5

7

MEM_MA_BANK0 5

6

MEM_MA_ADD3 5 MEM_MA_ADD1 5

8

MEM_MA0_CS#1 5

7

MEM_MA0_ODT1 5

6

MEM_MA_CAS# 5 MEM_MA_WE# 5

12

C445

C477

SCD01U50V2KX-1GP

12

C448

12

C421

SCD1U16V2ZY-2GP

12

C402

SC180P50V2JN-1GP

12

C412

SCD1U16V2ZY-2GP

12

C451

C453

SC1KP50V2KX-1GP

12

C403

SC180P50V2JN-1GP

Layout Note: Place one cap close to every 2 pullup resistors terminated to 0D9V_S3

1D8V_S3

12

C456

C411

SCD1U16V2ZY-2GP

SC10P50V2JN-4GP

SCD1U16V2ZY-2GP

DDR_VREF

1D8V_S3

1 1

LAYOUT: Locate close to DIMM

A

B

RN30

1 2 3

SRN1KJ-7-GP

VREF_DDR_MEM

SCD1U10V2KX-4GP

12

C419

4

SC1KP50V2KX-1GP

SCD1U10V2KX-4GP

SC1KP50V2KX-1GP

12

C418

C417

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR2 Socket_1

Size Document Number Rev

Date: Sheet

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

SJV50-PU

E

-1

of

17 59Wednesday, February 25, 2009

of

17 59Wednesday, February 25, 2009

of

17 59Wednesday, February 25, 2009

LCD/CCD CONN

20081231 Add for KBC

DCBATOUT

2nd = 69.50007.A41

F2

1 2

POLYSW-1D1A24V-GP

69.50007.A31

3D3V_S0

DBC_EN34

M92_LCD_CLK M92_LCD_DAT

BRIGHTNESS_CN BLON_OUT_R

DCBATOUT_LCD1

12

C489

RN3

LCD_TXACLK+ LCD_TXACLKLCD_TXBCLK+ LCD_TXBCLK-

LCDVDD

20081231 change LCD conn.

LCD1

41 40

39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

SC10U25V6KX-1GP

21 42

1 2

3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

ACES-CONN40C-4-GP

20.F1296.040

LCD_TXBCLK+ LCD_TXBCLKLCD_TXBOUT2+ LCD_TXBOUT2LCD_TXBOUT1+ LCD_TXBOUT1LCD_TXBOUT0+ LCD_TXBOUT0LCD_TXACLK+ LCD_TXACLKLCD_TXAOUT2+ LCD_TXAOUT2LCD_TXAOUT1+ LCD_TXAOUT1LCD_TXAOUT0+ LCD_TXAOUT0-

SC10U25V6KX-1GPC4SC10U25V6KX-1GP

12

C4

LCD_TXAOUT1+ LCD_TXAOUT1LCD_TXAOUT0+ LCD_TXAOUT0-

LCD_TXAOUT2+ LCD_TXAOUT2LCD_TXBOUT2+ LCD_TXBOUT2-

LCD_TXBOUT1+ LCD_TXBOUT1LCD_TXBOUT0LCD_TXBOUT0+

LCD_TXBCLKLCD_TXBCLK+ LCD_TXACLKLCD_TXACLK+

LCD_TXAOUT0LCD_TXAOUT0+ LCD_TXAOUT1LCD_TXAOUT1+

LCD_TXBOUT2LCD_TXBOUT2+ LCD_TXAOUT2LCD_TXAOUT2+

LCD_TXBOUT0+ LCD_TXBOUT0LCD_TXBOUT1LCD_TXBOUT1+

RN3

1 2 3 4 5

SRN0J-7-GP

UMA

RN9

1 2 3 4 5

SRN0J-7-GP

UMA

RN7

1 2 3 4 5

SRN0J-7-GP

UMA

RN5

1 2 3 4 5

SRN0J-7-GP

UMA

RN4

1 2 3 4 5

SRN0J-7-GP

DIS

RN10

1 2 3 4 5

SRN0J-7-GP

DIS

RN8

1 2 3 4 5

SRN0J-7-GP

DIS

RN6

1 2 3 4 5

SRN0J-7-GP

DIS

8 7 6

GMCH_TXACLK+ 9

GMCH_TXACLK- 9

GMCH_TXBCLK+ 9

GMCH_TXBCLK- 9

GMCH_TXAOUT1+ 9

GMCH_TXAOUT1- 9

GMCH_TXAOUT0+ 9

GMCH_TXAOUT0- 9

GMCH_TXAOUT2+ 9

GMCH_TXAOUT2- 9

GMCH_TXBOUT2+ 9

GMCH_TXBOUT2- 9

GMCH_TXBOUT1+ 9

GMCH_TXBOUT1- 9 GMCH_TXBOUT0- 9

GMCH_TXBOUT0+ 9

LVDS_M92_TXBCLK- 51

LVDS_M92_TXBCLK+ 51

LVDS_M92_TXACLK- 51

LVDS_M92_TXACLK+ 51

LVDS_M92_TXAOUT0- 51

LVDS_M92_TXAOUT0+ 51

LVDS_M92_TXAOUT1- 51

LVDS_M92_TXAOUT1+ 51

LVDS_M92_TXBOUT2- 51

LVDS_M92_TXBOUT2+ 51

LVDS_M92_TXAOUT2- 51

LVDS_M92_TXAOUT2+ 51

LVDS_M92_TXBOUT0+ 51

LVDS_M92_TXBOUT0- 51 LVDS_M92_TXBOUT1- 51

LVDS_M92_TXBOUT1+ 51

F3

CCD_PWR

12

C493

SC4D7U10V5ZY-3GP

USBPN10_R USBPP10_R

12

C11

SCD1U16V2ZY-2GP

1 2 1 2

F3

1 2

FUSE-1A6V-2-GP

69.50007.721

2nd = 69.50007.981

EC73

DY

SC22P50V2JN-4GP

EC72

DY

SC22P50V2JN-4GP

3D3V_S0

USBPN1012

USBPP1012

Layout 40 mil

LCDVDD

U1

LCDVDD_ON51

GMCH_LCDVDD_ON9 BRIGHTNESS 34

R1

0R2J-2-GP

UMA

12

C2

SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP

12

C1

SC4D7U6D3V3KX-GPC1SC4D7U6D3V3KX-GP

U1

1

EN

2

GND OUT3IN#4

G5285T11U-GP

74.05285.07F

IN#5

INT_MIC127,58

3D3V_S0

5 4

-1 090223

12

EC11

MLVG0402220NV05BP-GP-U

CCD_PWR

R188

USBPN10_R

0R0402-PAD

12

USBPP10_R

12

R189

R189 0R0402-PAD

0R0402-PAD

-1 090213

12

C492

C492 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

6 1

2 3 4 5 7

BRIGHTNESS_CN BLON_OUT_R

AMIC1

3 1

2 4

ACES-CON2-3-GP-U

20.F0825.002

2ND = 20.F1396.002

CCD1

CCD_PWR USBPN10_R USBPP10_R

FOX-CON5-3-GP-U1

20.F0411.005

2ND = 20.F1396.005

12

C491

SC100P50V2JN-3GP

DY

12

C490

DY

CCD_PWR 58 USBPN10_R 58 USBPP10_R 58

RN45

1 2 3

SRN33J-5-GP-U

SC100P50V2JN-3GP

M92_LCD_CLK51 M92_LCD_DAT51

NB_LCD_CLK9 NB_LCD_DAT9

4

12

R469

R469 100KR2J-1-GP

100KR2J-1-GP

BLON_OUT 34

-1 090219

3D3V_S0 VDDR3

1

23

RN20

SRN2K2J-1-GP

UMA

4

RN16

2 3 1

UMA

SJV50

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

23

RN19

RN19 SRN2K2J-1-GP

SRN2K2J-1-GP

DIS

4

SRN0J-10-GP-U

LED & LCD CONN / CCD

M92_LCD_CLK M92_LCD_DAT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SJV50-PU

18 59Wednesday, February 25, 2009

-1

of

-1