and speci fi ca tions at any time with out no tice.
WinSystems - "The Embedded Systems Authority"
RE VI SION HIS TORY
P/N 403- 0247- 000
ECO Num ber Date Code Re vi sion
ORIGI NATED 960508 A
98- 88 980826 A1
98- 105 981117 A2
TABLE OF CONTENTS
Section Paragraph Title Page
Visual Index – Quick Reference
1 General Information 1-1
1.1 Features 1-1
1.2 General Description 1-1
1.3 Specifications 1-2
2 PCM-DSPIO Technical Reference 2-1
2.1 Introduction 2-1
2.2 Serial I/O Address Selection 2-1
2.3 Serial Interrupt Selection 2-2
2.4 RS- 232 Mode Configuration 2-2
2.5 RS- 422 Mode Configuration 2-3
2.6 RS- 485 Mode Configuration 2-5
2.7 SAE J1708 Mode Configuration 2-7
2.8 Parallel Port I/O Address Selection 2-8
2.9 Parallel Port Direction Control 2-9
2.10 Parallel Port Interrupt Routing Selection 2-9
2.11 Parallel Port I/O Connector Pinout 2-9
2.12 PC/104 Bus Connectors 2-10
2.13 Connector/Jumper Summary 2-11
APPENDIX
Visual Index – Quick Reference
For the convenience of the user, a copy of the Visual Index has been provided with direct links to
connector and jumper configuration data.
J12
PC/104 16-BIT
BUS CONNECTOR
BUS CONNECTOR
J11
PC/104 8-BIT
PARALLEL PORT
I/O CONNECTOR
J4
J1
SERIAL I/O
CONNECTOR
PARALLEL PORT
BI-DIRECTIONAL MODE
CONTROL JUMPER
SELECTION JUMPER
J8
J9
SERIAL I/O MAP
J10
PARALLEL PORT
I/O ADDRESS
SELECTION JUMPER
INTERRUPT ROUTING
J7
981117 PCM-DSPIO/J1708 OPERATIONS MANUAL
CHANNEL 1 RS-485/J1708
J5, J6
CONFIGURATION JUMPER
CHANNEL 2 RS-485/J1708
J2 , J3
CONFIGURATION JUMPER
1GENERAL INFORMATION
1.1FEATURES
n PC/104 com pli ant dual se rial/par al lel I/O mod ule
n Two fully 16550 com pati ble async se rial chan nels
nA fully com pati ble Cen tron ics par al lel port
n 16- byte se rial trans mit/re ceive FIFO
nFull RS- 232 Mo dem con trol line sup port
nPro gram ma ble Baud rates from 50 to 115,200 bps
n Four Jumper se lecta ble se rial I/O maps
nTwo jumper se lecta ble Par al lel port ad dresses
nSup ports op tional RS- 422, RS- 485, and SAE J1708 on both chan nels
n Dual mode bi- directional par al lel printer port
n +5 Volt only op era tion
n-40° to +85° C op er at ing tem pera ture range
1.2GENERAL DESCRIPTION
The PCM- DSPIO is a small low- cost, add- on mod ule for PC/104 based sys tems that pro vides two PC com pati ble se rial ports and a PC com pati ble par al lel printer port. Both se rial
chan nels come stan dard sup port ing RS- 232 in clud ing all stan dard Mo dem con trol lines.
Ei ther or both chan nels can op tion ally be con fig ured for RS- 422 or RS- 485 in ter face lev e ls.
A fac tory con fig ured op tion al lows for sup port of SAE J1708 on both se rial chan nels. The
pro gram ma ble 16- byte trans mit and re ceive FI FOs al low for mul ti ple chan nels of high
speed se rial I/O with out ex ces sive proc es sor bot tle neck ing. The PC com pati ble par al lel
port can be used as a pri mary or sec on dary printer port or can be used for gen eral pur pose
digi tal I/O with its bi- directional ca pa bil ity.
981117PCM-DSPIO/J1708 OPERATIONS MANUALPage 1-1
WinSystems - "The Embedded Systems Authority"
1.3SPECIFICATIONS
1.3.1Electrical
Bus In ter face : PC/104 8- Bit (op tional 16- bit con nec tor avail able for ex panded in ter rupt ca pa bil ity)
VCC :+5V +/-5% @ 90mA. typ. all chan nels RS- 232
120ma typ. all chan nels RS- 422
I/O Ad dress ing :PLD Con trolled I/O ad dress uses 10- bit ad dress. Each se rial chan nel re quires 8
con secu tive I/O port ad dresses.
Par al lel port re quires 4 con secu tive I/O port ad dresses.
1.3.2Mechanical
Di men sions :3.8" X 3.8" X 0.5"
PC Board : FR4 Ep oxy Glass, with 2 sig nal lay ers with screened com po nent leg end, and plated
through holes.
Jump ers :0.025" square posts on 0.10" cen ters
Se rial I/O Con nec tor : 20 pin 0.10" grid RN type IDH- 20- LP
Par al lel I/O Con nec tor : 26 pin 0.10" grid RN type IDH- 26- LP
1.3.3Environmental
Op er at ing Tem pera ture : -40° to +85°C
Non- Condensing Rela tive Hu mid ity : 5% to 95%
Page 1-2PCM-DSPIO/J1708 OPERATIONS MANUAL981117
2PCM-DSPIO TECHNICAL REFERENCE
2.1Introduction
This sec tion of the man ual is in tended to pro vide suf fi cient in for ma tion re gard ing the
con figu ra tion and us age of the PCM- DSPIO mod ule. Win Sys tems main tains a Tech ni cal
Sup port Group to help an swer ques tions re gard ing con figu ra tion and pro gram ming of the
board. For an swers to ques tions not ade quately ad dressed in this man ual, con tact Tech ni cal Sup port at (817) 274- 7553 be tween 8AM and 5PM Cen tral Time. Tech ni cal sup port
may also be re quested via FAX at (817) 548- 1358. Ap pen dix C con tains the com plete re print of the Star tech 16C552 da tasheet and is pro vided to the pro gram mer as a source of in for ma tion for all UART reg is ters and par al lel port reg is ter de tails.
2.2Serial I/O Address Selection
Serial Address Select jumper J9
Interrupt Routing Header J7
J7
J9
1 o o 2
3 o o 4
1 o o 2
3 o o 4
5 o o 6
7 o o 8
9 o o 10
11 o o 12
13 o o 14
15 o o 16
17 o o 18
19 o o 20
The PCM- DSPIO maps the two se rial chan nels to any of 4 pairs of ad dresses as de fined
in the il lus tra tion be low.
J9J9
1 o o 2
3 o o 4
CH1 - 3F8H
CH2 - 2F8H
1 o o 2
3 o o 4
CH1 - 3E8H
CH2 - 2E8H
J9
1 o o 2
3 o o 4
CH1 - 3A8H
CH2 - 2A8H
J9
1 o o 2
3 o o 4
CH1 - 380H
CH2 - 280H
981117PCM-DSPIO/J1708 OPERATIONS MANUALPage 2-1
WinSystems - "The Embedded Systems Authority"
2.3Serial Interrupt Selection
Both se rial chan nels can be pro grammed to gen er ate in ter rupts on Trans mit ter empty,
Re ceive char ac ter ready, or Line status changes. Each chan nel's in ter rupt out put can be
routed to an IRQ pin on the PC/104 bus via the jumper block at J7. Note that each chan nel
is re peated through out the jumper block sev eral times al low ing ac cess to most any of the
bus in ter rupts. Jump ers may be placed ver ti cally or hori zon tally to route the se rial in ter rupt to the bus. The il lus tra tion be low shows the J7 header and its cor re spond ing pin defi ni tions.
J7
CH1
IRQ3
CH1
IRQ5
CH1
IRQ10
CH1
IRQ12
CH1
LPT
1 o o 2
3 o o 4
5 o o 6
7 o o 8
9 o o 10
11 o o 12
13 o o 14
15 o o 16
17 o o 18
19 o o 20
IRQ2
CH2
IRQ4
CH2
IRQ7
CH2
IRQ11
CH2
IRQ15
CH2
2.4
RS-232 Line Drivers U1, U2
RS-422/RS-485/J1708
Line Drivers U3, U4, U5, U6
Serial configuration
jumpers J2, J3, J5, J6
RS-232 Mode Configuration
U2
U5
J6
1 o
2 o
3 o
J5
1 o
2 o
3 o
U6U4
U1
U3
J2
1 o
2 o
3 o
J3
1 o
2 o
3 o
Full RS- 232 sig nal lev els are stan dard on both se rial chan nels. The two se rial chan nels
are ter mi nated at J1 and a dual DB9 ca ble is avail able from Win Sys tems un der part
number CBL- 173-1. The fol low ing il lus tra tions show the cor rect jump er ing, driver IC in stal la tion, and DB9 I/O con nec tor pin- out for RS- 232 on each chan nel. Ref er to Ap pen dix D
for pin defi ni tions when not us ing the CBL- 173-1 ca ble.
Page 2-2PCM-DSPIO/J1708 OPERATIONS MANUAL981117
WinSystems - "The Embedded Systems Authority"
2.4.1Channel 1 - RS-232
Jumper PositionsDriver IC StatusI/O Connector Pin Defs
J5J6CH1 DB9
1 o
2 o
3 o
1 o
2 o
3 o
U2 - Installed
U5 - Not Installed
U6 - Not Installed
CD
RX Data
TX Data
DTR
GND
1 o o 6
2 o o 7
3 o o 8
4 o o 9
5 o
DSR
RTS
CTS
RI
2.4.2
2.5
Channel 2 - RS-232
Jumper PositionsDriver IC StatusI/O Connector Pin Defs
J2J3CH2 DB9
1 o
2 o
3 o
1 o
2 o
3 o
U1 - Installed
U3 - Not Installed
U4 - Not Installed
RX Data
TX Data
CD
DTR
GND
1 o o 6
2 o o 7
3 o o 8
4 o o 9
5 o
DSR
RTS
CTS
RI
RS-422 Mode Configuration
RS- 422 sig nal lev els are sup ported on ei ther or both se rial chan nels with the in stal la tion of the op tional “Chip Kit” part number CK- 75176-2. This kit pro vides the driver ICs
nec es sary for a sin gle chan nel of RS- 422. If two chan nels of RS- 422 are re quired then two
kit will be needed. RS- 422 is a 4- wire point to point full- duplex in ter face al low ing much
longer runs than are pos si ble with RS- 232. The dif fer en tial trans mit ter and re ceiver
twisted- pairs of fer a high de gree of noise im mu nity. RS- 422 usu ally re quires that the lines
be ter mi nated at both ends. This ter mi na tion can be ac com plished ei ther on the ca ble or by
in stall ing re sis tors on the board in lo ca tions re served for them. The meth od ol ogy in de t er min ing the cor rect re sis tor val ues is be yond the scope of this docu ment but we rec om mend
trial val ues of 100 Ohms in all three lo ca tions at the re ceiver end. The fol low ing il lus tra tions show the cor rect jump er ing, driver IC in stal la tion, DB-9 I/O con nec tor pin- out, and
ter mi na tion re sis tor lo ca tions for each of the chan nels when used in RS- 422 mode.
981117PCM-DSPIO/J1708 OPERATIONS MANUALPage 2-3
WinSystems - "The Embedded Systems Authority"
2.5.1Channel 1 - RS-422
Jumper PositionsDriver IC Status
J5J6
1 o
2 o
3 o
vcc
1 o
2 o
3 o
U2 - Not Installed
U5 - Installed
U6 - Installed
I/O Connector Pin Defs
CH1 DB9
1 o o 6
N/C
TX+
TX-
N/C
GND
2 o o 7
3 o o 8
4 o o 9
5 o
RX+
RXN/C
N/C
RS- 422 NOTE : When used in RS- 422
R10
mode the trans mit ter must be en abled via
soft ware by set ting the RTS bit in the Mo -
RX+
R11
RX-
R12
2.5.2
Jumper PositionsDriver IC StatusI/O Connector Pin Defs
Channel 2 - RS-422
dem Con trol reg is ter (Bit 1).
J2J3CH2 DB9
1 o
2 o
3 o
1 o
2 o
3 o
vcc
U1 - Not Installed
U3 - Installed
U4 - Installed
N/C
TX+
TX-
N/C
GND
1 o o 6
2 o o 7
3 o o 8
4 o o 9
5 o
RS- 422 NOTE : When used in RS- 422
R7
RX+
R5
RX-
R6
mode the trans mit ter must be en abled via
soft ware by set ting the RTS bit in the Mo dem Con trol reg is ter (Bit 1).
RX+
RXN/C
N/C
Page 2-4PCM-DSPIO/J1708 OPERATIONS MANUAL981117
WinSystems - "The Embedded Systems Authority"
2.6RS-485 Mode Configuration
The RS- 485 multi- drop in ter face is sup ported on both se rial chan nels with the in stal la tion of the op tional “Chip Kit”, Win Sys tems part number CK- 75176-2. A sin gle kit is suf fi cient to con fig ure both chan nels for RS- 485. RS- 485 is a 2 wire multi- drop in ter face where
only one sta tion at a time talks (trans mits) while all oth ers lis ten (re ceive). RS- 485 usu al ly
re quires that the line- pair be ter mi nated at each end of the run. The re quired ter mi na tion
show the cor rect jump er ing, driver IC in stal la tion, DB9 I/O con nec tor pin- out, and ter mi na tion re sis tor lo ca tions for each of the chan nels when used in the RS- 485 mode.
2.6.1Channel 1 - RS-485
Jumper PositionsDriver IC StatusI/O Connector Pin Defs
1 o
2 o
3 o
J5
J6CH1 DB9
1 o
2 o
3 o
vcc
U2 - Not Installed
U5 - Installed
U6 - Not Installed
1 o o 6
N/C
N/C
GND
2 o o 7
3 o o 8
4 o o 9
5 o
TX/RX+
TX/RX-
RS- 485 NOTE : Be cause RS- 485 uses
a sin gle twisted- pair, all trans mit ters are
R15
con nected in par al lel. Only one sta tion
may trans mit, or have its trans mit ter en -
TX/RX+
R16
abled at a time. The trans mit ter En able/Dis able is con trolled by Bit 1 in the
Mo dem Con trol reg is ter (RTS). When set,
TX/RX-
R17
the trans mit ter is en abled, when cleared
(the nor mal state) the trans mit ter is dis abled and the re ceiver is en abled. Note
that it is nec es sary to al low some mini mal
set tling time af ter ena bling the trans mit ter bef ore trans mit ting the first char ac ter. Like wise, fol low ing a trans mis sion, it
is nec es sary to be sure that all char ac ters
have been com pletely shifted out of the
UART (Check bit 6 in the Line status reg is ter) bef ore dis abling the trans mit ter to
avoid chop ping off the last char ac ter.
TX/RX+
TX/RXN/C
N/C
981117PCM-DSPIO/J1708 OPERATIONS MANUALPage 2-5
WinSystems - "The Embedded Systems Authority"
2.6.2Channel 2 - RS-485
Jumper PositionsDriver IC StatusI/O Connector Pin Defs
J2
1 o
2 o
3 o
J3
1 o
2 o
3 o
R2
R3
R4
vcc
U1 - Not Installed
U3 - Installed
U4 - Not Installed
TX/RX+
TX/RX-
CH2 DB9
N/C
TX/RX+
TX/RX-
N/C
GND
1 o o 6
2 o o 7
3 o o 8
4 o o 9
5 o
TX/RX+
TX/RXN/C
N/C
RS- 485 NOTE : Be cause RS- 485 uses
a sin gle twisted- pair, all trans mit ters are
con nected in par al lel. Only one sta tion
may trans mit, or have its trans mit ter en abled at a time. The trans mit ter En able/Dis able is con trolled by Bit 1 in the
Mo dem Con trol reg is ter (RTS). When set,
the trans mit ter is en abled, when cleared
(the nor mal state) the trans mit ter is dis abled and the re ceiver is en abled. Note
that it is nec es sary to al low some mini mal
set tling time af ter ena bling the trans mit ter bef ore trans mit ting the first char ac ter. Like wise, fol low ing a trans mis sion, it
is nec es sary to be sure that all char ac ters
have been com pletely shifted out of the
UART (Check bit 6 in the Line status reg is ter) bef ore dis abling the trans mit ter to
avoid chop ping off the last char ac ter.
Page 2-6PCM-DSPIO/J1708 OPERATIONS MANUAL981117
WinSystems - "The Embedded Systems Authority"
2.7SAE J1708 Configuration
The So ci ety of Auto mo tive En gi neers (SAE) J1708 in ter face is a varia tion of the RS- 485
in ter face which is used for “Se rial Data Com mu ni ca tions be tween Mi cro com puter Sys tems
in Heavy Duty Ve hi cle Ap pli ca tions”. It is be yond the scope of this docu ment to go into de tail on the J1708 speci fi ca tion. The PCM- DSPIO must be fac tory con fig ured for J1708 us age through the in stal la tion of a number of re quired ter mi na tion and fil ter ing com po nent s.
The fol low ing il lus tra tions show the cor rect jump er ing, driver IC in stal la tion, DB9 I/O con nec tor pin defi ni tions, and ter mi na tion net work de tails for each of the chan nels when used
in J1708 mode.
2.7.1Channel 1 - SAE J1708
Jumper PositionsDriver IC StatusI/O Connector Pin Defs
R15
4.7K
R16
Absent
R17
4.7K
J5
1 o
2 o
3 o
vcc
J6
1 o
2 o
3 o
R14
4.7 OHM
C15 .0022 ufd
C11 .0022 ufd
R9
4.7 OHM
U2 - Not Installed
U5 - Installed
U6 - Not Installed
TX/RX+
TX/RX-
N/C
TX/RX+
TX/RX-
N/C
GND
CH1 DB9
1 o o 6
2 o o 7
3 o o 8
4 o o 9
5 o
TX/RX+
TX/RXN/C
N/C
981117PCM-DSPIO/J1708 OPERATIONS MANUALPage 2-7
WinSystems - "The Embedded Systems Authority"
2.7.2Channel 2 - SAE J1708
Jumper PositionsDriver IC StatusI/O Connector Pin Defs
J2J3CH2 DB9
1 o
2 o
3 o
vcc
R2
4.7K
R3
Absent
R4
4.7K
1 o
2 o
3 o
R8
4.7 OHM
C7 .0022 ufd
C3 .0022 ufd
4.7 OHM
R1
U1 - Not Installed
U3 - Installed
U4 - Not Installed
TX/RX+
TX/RX-
N/C
TX/RX+
TX/RX-
N/C
GND
1 o o 6
2 o o 7
3 o o 8
4 o o 9
5 o
TX/RX+
TX/RXN/C
N/C
2.8
Parallel Port I/O Address Selection
Parallel Port Configuration
Jumpers J8, J10
J8
1 o o 2
J10
1 o o 2
The par al lel port on the PCM- DSPIO can be I/O mapped at ei ther of 2 base ad dresses as
de ter mined by jumper block J10. The fol low ing il lus tra tion shows the J10 jump er ing for
each of the two sup ported ad dresses.
Page 2-8PCM-DSPIO/J1708 OPERATIONS MANUAL981117
WinSystems - "The Embedded Systems Authority"
J10J10
1 o o 2 1 o o 2
BASE ADDRESS 378H
BASE ADDRESS 3BCH
2.9Parallel Port Direction Control
The par al lel port on the PCM- DSPIO is ca pa ble of bi- directional data trans fer. The
jumper block at J8 de fines the method(s) avail able to con vert be tween in put mode and out put mode. The ta ble be low shows the re la tion ship be tween the J8 jumper in stal la tion and
the I/O se lec tion modes avail able. For ad di tional de tails on I/O di rec tion con trol ref er to the
Star tech 16C552 re print in Ap pen dix C.
Con trol Reg is ter Bit
5J8 Jumper
XONAA HexIn put Mode
XON55 HexOut put Mode
0OFFXOut put Mode
1OFFXIn put Mode
2.10
Parallel Port Interrupt Routing
I/O Se lect
Reg is ter
Port Di rec tion
The par al lel port on the PCM- DSPIO, like those on stan dard PC printer ports, is ca pa ble of gen er at ing an in ter rupt on printer ac knowl edge. This fea ture is not used by a PC
BIOS and is rarely used by PC soft ware. In the event this in ter rupt is de sired, it may be
routed to the bus us ing a jumper wire from pin 19 on J7 to the de sired bus in ter rupt. The
pin defi ni tions for the J7 in ter rupt rout ing header are shown be low :
J7
CH1
2.11
1 o o 2
IRQ3
3 o o 4
CH1
5 o o 6
IRQ5
7 o o 8
CH1
CH1
CH1
LPT
9 o o 10
11 o o 12
13 o o 14
15 o o 16
17 o o 18
19 o o 20
IRQ10
IRQ12
Parallel Port I/O Connector Pinout
IRQ2
CH2
IRQ4
CH2
IRQ7
CH2
IRQ11
CH2
IRQ15
CH2
The par al lel port on the PCM- DSPIO ter mi nates at con nec tor J4. An in ter face ca ble
Win Sys tems part number CBL- 102-1 is avail able which con nects to J4 and then pres ents
the stan dard DB25 female con nec tor to which PC printer ca bles may be at tached. If us ing
981117PCM-DSPIO/J1708 OPERATIONS MANUALPage 2-9
WinSystems - "The Embedded Systems Authority"
the par al lel port for cus tom I/O or for ref er ence, the fol low ing il lus tra tion shows the p in
defi ni tions for J4.
J4
/STB
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
/ACK
BUSY
PE
SLCT
1 o o 2
3 o o 4
5 o o 6
7 o o 8
9 o o 10
11 o o 12
13 o o 14
15 o o 16
17 o o 18
19 o o 20
21 o o 22
23 o o 24
25 o o 26
The PCM- DSPIO plugs onto the PC/104 bus us ing the con nec tors at J11 and J12 (PCM-
DSPIO- 16 only). The PC/104 bus pin defi ni tions are shown here for ref er ence.
GND
RESET
+5V
IRQ2
-5V
DRQ2
-12V
0WS
+12V
GND
SMEMW
SMEMR
IOW
IOR
DACK3
DRQ3
DACK1
DRQ1
DACK0
CLK
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
DACK2
T/C
BALE
+5V
OSC
GND
GND
J11
B1 o o A1
B2 o o A2
B3 o o A3
B4 o o A4
B5 o o A5
B6 o o A6
B7 o o A7
B8 o o A8
B9 o o A9
B10 o o A10
B11 o o A11
B12 o o A12
B13 o o A13
B14 o o A14
B15 o o A15
B16 o o A16
B17 o o A17
B18 o o A18
B19 o o A19
B20 o o A20
B21 o o A21
B22 o o A22
B23 o o A23
B24 o o A24
B25 o o A25
B26 o o A26
B27 o o A27
B28 o o A28
B29 o o A29
B30 o o A30
B31 o o A31
B32 o o A32
C0 o o D0
C1 o o D1
C2 o o D2
C3 o o D3
C4 o o D4
C5 o o D5
C6 o o D6
C7 o o D7
C8 o o D8
C9 o o D9
C10 o o D10
C11 o o D11
C12 o o D12
C13 o o D13
C14 o o D14
C15 o o D15
C16 o o D16
C17 o o D17
C18 o o D18
C19 o o D19
J1Se rial I/O Con nec tor2-2
J2Chan nel 2 RS- 485/J1708 con figu ra tion jumper 2-3
J3Chan nel 2 RS- 486/J1708 con figu ra tion jumper 2-3
J4Par al lel Port I/O con nec tor2-9
J5Chan nel 1 RS- 485/J1708 con figu ra tion jumper 2-3
J6Chan nel 1 RS- 485/J1708 con figu ra tion jumper 2-3
J7In ter rupt rout ing header2-2
J8Par al lel Port Bi- directional mode con trol jumper 2-9
J9Se rial I/O Map se lect jumper2-1
J10Par al lel Port I/O ad dress se lect jumper2-8
J11PC/104 8- bit Bus con nec tor2-10
J12PC/104 16- bit Bus con nec tor2-10
981117PCM-DSPIO/J1708 OPERATIONS MANUALPage 2-11
APPENDIX
Startech 16C522 Datasheet Reprint
Printable datasheet in PDF format DP83905_ ATLANTIC .pdf
Cables
Part Number Description
CBL-101-3 26-pin ribbon to 25-pin male “D” connector parallel adapter cable
CBL-173-1 20-pin ribbon to two male 9-pin “D” connector adapter cable
Software
Simple C routine that uses receive interrupt 8250INTA.ZIP
981117 PCM-DSPIO/J1708 OPERATIONS MANUAL
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