Winstron X17 Schematics

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X17 Block Diagram

CLK GEN

D D

ICS9LPRS480

DDRII 667/800

DDRIII

52 53

32Mbx32bitsx4pcs

TV-OUT 24

HDMI CONN

C C

CRT CONN

17'' LCD

1394

HDMI

CRT

LVDS

SD/MMC MS/MS Pro/xD

Digital Array Mic

B B

MIC IN

LINE IN

LINE1 OUT/ HP OUT

LINE2 OUT

W/SPDIF

A A

2CH

OP AMP G1412

SPEAKER

SUBWOOFER

Slot 0

Slot 1

ATi M86-ME

VRAMx4 GDDR3

512MB

49,50,51,52,53,54,55

CRT MUX

LVDS MUX

1394 card reader

JMB380

Azalia CODEC

ALC888

OP AMP

G1432Q

DDRII 667/800 MHz Channel A

DDRII 667/800 MHz Channel B

OP AMP

APA3010

HyperTransport

PCIE X16

PCIE

AZALIA

LED Board CONN

CIR

AMD S1G2 CPU

638-Pin uFCPGA

4,5,6,7

16X16

OUT

North Bridge

AMD RS780MN

HyperTransport LINK0 CPU I/F DX10 IGP LVDS/TVOUT/TMDS DISPLY PORT X2

Side Port Memory

1 X 16 PCIE I/F 1 X 4 PCIE I/F WITH SB

6 X 1 PCIE I/F

10,11,12,13

PCIE

4X4

South Bridge

AMD SB700

USB 2.0/1.1 ports

(10/100/1000Mb)ETHERNET

High Definition Audio

ATA 66/100

PCI/PCI BRIDGE

ACPI 1.1 LPC I/F

18,19,20,21,22

KBC

Winbond WPC775L

Touch Pad

Int. KB

LPC Bus

35,36

SPI

Flash ROM

2MB

Side Port

Thermal & Fan

G792

SMBUS

MMC Board

CONN

PCIE

USB 2.0

SATA

PATA

LPC DEBUG

CONN

DDRII

(64MB)

PCIE x 1 & USB 2.0 x 1

PCIE x 1

PCIE x 1 & USB 2.0 x 1

USB 2.0 x 1

USB 2.0 x 3

STAT & USB 2.0 x 1

SATA

Hyper Flash

Project code : 91.4H901.001 PCB Number : 07256 Revision : SB

MMC Board:48.4H902.0SA(07940) LED Board:48.4H704.0SA(07865) USB Board: 48.4H903.0SB(07939)

RealTek 1000

RTL8111C

Power SW

G577

New Card

Mini-Card

802.11a/b/g/n

MINI CARD TV TUNER

Bluetooth

WUSB

CAMERA

USB Board (USBx3)

e-SATA Combo (USBx1)

HDD x2

ODD

RJ45 CONN

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System Block Diagram

CPU V_CORE

ISL6265

INPUTS

DCBATOUT

OUTPUTS VCC_CORE

SYSTEM DC/DC

TPS51124

INPUTS

DCBATOUT

OUTPUTS

1D8V_S3 1D2V_S0

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

SYSTEM DC/DC

LDO

INPUTS

5V_S5

OUTPUTS

0D9V_S3 1D5V_S03D3V_S0

SYSTEM DC/DC

LDO

INPUTS

3D3V_S5 3D3V_S0

OUTPUTS

1D2V_S5 2D5V_S0

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

OUTPUTS

5V_AUX_S5 3D3V_AUX_S5

MAXIM CHARGER

BQ24745

INPUTS

AD+ BT+

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

156Friday, February 15, 2008

DCBATOUT

OUTPUTS

5V_S5 3D3V_S5

OUTPUTS

40,41

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USB PORT#

D D

0 1 2 3 4 5

2.0

SB700

6 7

C C

8 9 WUSB 10 11 12

1.1 13

DESTINATION

Combo(ESATA/USB)

USB1

USB2 CAMERA Bluetooth

NEW CARD

USB3

WLAN

TV TUNER

NC NC NC NC

PCI EXPRESS

Lane 0

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

DESTINATION

NEW CARD

WLAN

LAN

CARD READER &1394

TV tuner

Note:1 VIP3 MUST NOT BE PULLED HIGH ON M82-M Note:2 GPIO8 MUST NOT BE PULLED HIGH ON M86-M or M7X

CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

BIF_MSI_DIS BIF_AUDIO_EN BIF_64BAR_EN_A TX_PWRS_ENB

BIF_DEBUG_ACCESS BIF_AUDIO_EN

BIOS_ROM_EN

ROMIDCFG(3:0) GPIO[13:11,9]

BIF_VGA DIS VGA ENABLEDPSYNC BIF_HDMI_EN HDMI ENABLE (SEE NOTE 2)HSYNC DEBUG_ I2C_ENABLE

MEM_TYPE

PIN DESCRIPTION OF DEFAULT SETTINGS

VIP1 VIP3 VIP5

GPIO4 GPIO8 GPIO5BIF_GEN2_EN_A

GPIO_22_ROMCSB

GPIO6 Internal use only

ANY UNUSED GPIO OR DVP THAT ARE NOT CONFIG STRAPS FOR EXAMPLE DVPDATA20:23 IN THIS DESIGN

MESSAGE SIGNAL INTERRUPT ENABLED ENABLE HD AUDIO 64 BIT BARS DISABLED PCIE FULL TX OUTPUT SWINGGPIO0 PCIE TRANSMITTER DE-EMPHASIS ENABLEDTX_DEEMPH_EN GPIO1 DEBUG SIGNALS MUXED OUT ENABLE HD AUDIO

Allows either PCIe 2.5GT/s or 5.0GT/s operation DISABLE EXTERNAL BIOS ROM SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT IGNORE VIP DEVICE STRAPSVSYNCVIP_DEVICE_STRAP_ENA

MEMORY TYPE,MAKE AND SIZE INFO

(M7XM and M86M ONLY)

( M82M ONLY)

Note:2

RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE RSVD = ATI RESERVED (DO NOT INSTALL)

M8x M7x

X0X

X NA X X

X X

XXX O 0 X

Note:1

0 X 0 X X 0 RSVD 0 XNA

XXXX

O O X

SB700 Functional Strap Definitions

B B

P10 71.RS780.M07

P18

P41

P46

A A

P12

P53 P54

Release BOM need modify

Location

Schematic BOMPage

71.09480.003P3 71.08628.003U41(CLK GEN) 71.09480.003

U65(RS780MN)

U74(SB700) U57,U11,U52,U51,

(CPU power)

71.RS780.M02

71.SB700.M02 71.SB700.M06

ZZ.COMBO.001 84.04634.037

U56,U53

U62(GPU power)

U17 (Side Port)

U68~U71 (Vram)

ZZ.COMBO.001 84.07686.037

72.18512.M0U

72.18321.00U(Qimonda 700M)

2nd Source

72.18512.M0U(Qimonda)

72.18321.A0U(Qimonda 900M) 72.18321.00U(Qimonda 700M)

ATI RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

VIP0 VIP7VIP6

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

GENERICC

Main source 3rd source

72.55162.00U(HYNIX)

72.45116.A0U(Samsung)

72.41032.B0U(Samsung)

GPIO3GPIO2VIP4VIP2

GPIO21_BB_ENGPIO_28_TDO

NOTE 1: HD AUDIO MUST ONLY BE ENABLED ON SYSTEMS THAT ARE LEGALLY ENTITLED. IT IS THE RESPONSIBILITY OF THE SYSTEM DESIGNER TO ENSURE ENTITLEMENT

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H2SYNCVHAD0

NOTE 2: HDMI MUST ONLY BE ENABLED ON SYSTEMS THAT ARE LEGALLY ENTITLED. IT IS THE RESPONSIBILITY OF THE SYSTEM DESIGNER TO ENSURE ENTITLEMENT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

X17 SA

256Friday, February 15, 2008

www.kythuatvitinh.com

3D3V_S0 3D3V_CLK_VDD

R248

1 2

0R3-0-U-GP

D D

3D3V_S0

1 2

1D1V_S0 1D1V_CLK_VDDIO

1 2

0R3-0-U-GP

3D3V_S0

1:NORMAL

C C

EXPRESS CARD(100MHz) LAN(100MHz) WLAN(100MHz)

CARD READER

TV Tuner

B B

0:POWER DOWN

R253

R253 10KR2J-3-GP

10KR2J-3-GP

CLK_NBGPP_CLK11

CLK_NBGPP_CLK#11

CLK_PCIE_NEW24

CLK_PCIE_NEW#24

CLK_PCIE_LAN25

CLK_PCIE_LAN#25

CLK_PCIE_WLAN24

CLK_PCIE_WLAN#24

CLK_PCIE_CARD28

CLK_PCIE_CARD#28

CLK_PCIE_TV24

CLK_PCIE_TV#24

NB ALINK(100MHz)

C524

R527

R527 0R3-0-U-GP

0R3-0-U-GP R242

R242

CLOCK_EN#CLOCK_EN#CLOCK_EN#CLOCK_EN#

CLK_NB_GPPSB11

CLK_NB_GPPSB#11

CLK_PCIE_SB18

CLK_PCIE_SB#18

SC10U10V5ZY-1GP

C457

SC10U10V5ZY-1GP

C472

SC10U10V5ZY-1GP

SRN0J-6-GP

C523

RN35

RN32

RN30

RN29

RN31

RN31 RN22

RN22

SB PCIE(100MHz)

* default

SEL_HTT66

A A

FS0

SEL_SATA FS1

SEL_27 FS2

66 MHz 3.3V single ended HTT clock

100 MHz differential HTT clock

100 MHz non-spreading differential SATA clock

100 MHz spreading differential SRC clock

27MHz non-spreading singled clock on pin 13 and

10*

27MHz spread clock on pin 14

100MHz differential spreading SRC clock

C783

C493

C787

SCD1U10V2KX-4GP

C786

C784

SCD1U10V2KX-4GP

C788

C520

C519

C520

SCD1U10V2KX-4GP

C789

SCD1U10V2KX-4GP

C790

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SB-EC23

23 1

4 4

CLK_NBHT_CLK11 CLK_NBHT_CLK#11

CLK_PCIE_NEW_R

CLK_PCIE_NEW#_R

CLK_PCIE_LAN_R

CLK_PCIE_LAN#_R

CLK_PCIE_WLAN_RCLK_PCIE_WLAN_RCLK_PCIE_WLAN_R

CLK_PCIE_WLAN#_RCLK_PCIE_WLAN#_RCLK_PCIE_WLAN#_R

CLK_PCIE_CARD_R

CLK_PCIE_CARD#_R

CLK_PCIE_TV_R

CLK_PCIE_TV_R#CLK_PCIE_TV_R#

2 3 1

RN21

SRN0J-6-GP

SRN0J-6-GP RN19

RN19

SRN0J-6-GP

C775

C776

SCD1U10V2KX-4GP

CLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRSCLK_SRC0T_LPRS

CLK_SRC0C_LPRSCLK_SRC0C_LPRSCLK_SRC0C_LPRSCLK_SRC0C_LPRSCLK_SRC0C_LPRSCLK_SRC0C_LPRS

CLK_NB_GPPSB_RCLK_NB_GPPSB_RCLK_NB_GPPSB_RCLK_NB_GPPSB_R

CLK_NB_GPPSB#_RCLK_NB_GPPSB#_RCLK_NB_GPPSB#_RCLK_NB_GPPSB#_R

CLK_PCIE_SB_RCLK_PCIE_SB_RCLK_PCIE_SB_RCLK_PCIE_SB_R

CLK_PCIE_SB#_RCLK_PCIE_SB#_RCLK_PCIE_SB#_RCLK_PCIE_SB#_R

RN18

2 3 1

1D1V_CLK_VDDIO

VDD_REF 3D3V_48MPWR_S0

CLOCK_EN#

CLK_NBHT_CLK_R CLK_NBHT_CLK#_R

3D3V_CLK_VDD

27M_SS_R 27M_NS_R

27M_NS_R 27M_SS_R

R246

1 2

0R3-0-U-GP

SC1U10V2KX-1GP

U41

VDDATIG

VDDATIG_IO

VDDCPU

VDDCPU_IO

VDDSRC

VDDSRC_IO

VDDSB_SRC

VDDSB_SRC_IO

VDDSATA

VDD

VDDHTT

VDDREF

VDD48

PD#

SRC0T_LPRS

SRC0C_LPRS

SRC1T_LPRS

SRC1C_LPRS

SRC2T_LPRS

SRC2C_LPRS

SRC3T_LPRS

SRC3C_LPRS

SRC4T_LPRS

SRC4C_LPRS SRC6T/SATAT_LPRS42GNDSATA

SRC6C/SATAC_LPRS

SRC7T_LPRS/27MHZ_SS

SRC7C_LPRS/27MHZ_NS

SB_SRC0T_LPRS

SB_SRC0C_LPRS

SB_SRC1T_LPRS

SB_SRC1C_LPRS

HTT0T_LPRS/66M

HTT0C_LPRS/66M

ICS9LPRS480AKLFT-GP-U

71.09480.003

2'nd SLG8SP628(71.08628.003) 3'st RTM880 (71.00880.003)

C485

VDD_REF

ATIG0T_LPRS ATIG0C_LPRS ATIG1T_LPRS ATIG1C_LPRS

CPUKG0T_LPRS CPUKG0C_LPRS

REF0/SEL_HTT66

REF1/SEL_SATA

SB-EC1

R235

1 2 1 2

R234

0R2J-2-GP

0R2J-2-GP 0R2J-2-GP

0R2J-2-GP

SMBCLK SMBDAT

CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

48MHZ_0

REF2/SEL_27

GNDATIG

GND

GNDHTT GNDREF GNDCPU

GND48

GNDSRC GNDSRC

GNDSB_SRC

GND

2 3

30 29 28 27

23 45 44 39 38

50 49

59 58 57

43 24 7 52 60 46 1

10 18

33 65

27M_NS 50 27M_SS 50

CLK_X1CLK_X1 CLK_X2CLK_X2

CLK_PCIE_VGA_RCLK_PCIE_VGA_R CLK_PCIE_VGA#_RCLK_PCIE_VGA#_R

CLK_NB_GFX_R CLK_NB_GFX#_R

CPU_CLK_RCPU_CLK_R CPU_CLK#_RCPU_CLK#_R

CLK_48CLK_48

FS0FS0

FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1FS1

FS2FS2

R236

1 2

10MR2J-L-GP

X-14D31818M-35GP

CL=20pF±0.2pF

SMBCLK0_SB 8,9,19 SMBDAT0_SB 8,9,19

23 1

RN17 SRN0J-6-GPRN17 SRN0J-6-GP

R259

261R2F-GP

1 2

RN20

23 1

SRN0J-6-GP

R239

22R2J-2-GP

EC34

SC4D7P50V2CN-1GP

8K2R2J-3-GP

SC27P50V2JN-2-GP

CLK48_USB 19

R238

R240

8K2R2J-3-GP

C469

C468

CLK_NB_GFX 11

CLK_NB_GFX# 11

CPU_CLK 6 CPU_CLK# 6

3D3V_S0

R233

1 2

2D2R3J-2-GP

3000mA.80ohm

CLK_PCIE_VGA#49 CLK_PCIE_VGA49

SB700_USB(48MHz)

R243158R2F-GP R243158R2F-GP

R24190D9R3F-GP R24190D9R3F-GP

R245

R245 8K2R2J-3-GP

8K2R2J-3-GP

R244

R244 8K2R2J-3-GP

8K2R2J-3-GP

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A3 Date: Sheet

Date: Sheet

3D3V_48MPWR_S0

C456

C458

C458 SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC4D7U6D3V3KX-GP

RN33

2 3 1

SRN0J-6-GP

For generral clock reference different moat

CLK_NB_14M 11

CLK_PCIE_VGA#_RCLK_PCIE_VGA#_RCLK_PCIE_VGA#_R CLK_PCIE_VGA_R

1D1V_S0

C943

SCD1U16V2ZY-2GP

FAE suggest

CLK_NB_14M

1.1V=(90.9/(90.9+158))*3.3VRS780M

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Clock Gen-ICS 9LPR480

X17 SA

356Tuesday, February 19, 2008

www.kythuatvitinh.com

CPU / HT3.0

SSID = CPU

D D

1D2V_S0

SC4D7U6D3V5KX-3GP

C348

C C

B B

Place close to socket

SC4D7U6D3V5KX-3GP

SCD22U6D3V2KX-1GP

C722

SCD22U6D3V2KX-1GP

C640

C351

SC180P50V2JN-1GP

SCD22U6D3V2KX-1GP

C710

HT_NB_CPU_CAD_H010 HT_NB_CPU_CAD_L010 HT_NB_CPU_CAD_H110 HT_NB_CPU_CAD_L110 HT_NB_CPU_CAD_H210 HT_NB_CPU_CAD_L210 HT_NB_CPU_CAD_H310 HT_NB_CPU_CAD_L310 HT_NB_CPU_CAD_H410 HT_NB_CPU_CAD_L410 HT_NB_CPU_CAD_H510 HT_NB_CPU_CAD_L510 HT_NB_CPU_CAD_H610 HT_NB_CPU_CAD_L610 HT_NB_CPU_CAD_H710 HT_NB_CPU_CAD_L710 HT_NB_CPU_CAD_H810 HT_NB_CPU_CAD_L810 HT_NB_CPU_CAD_H910 HT_NB_CPU_CAD_L910 HT_NB_CPU_CAD_H1010 HT_NB_CPU_CAD_L1010 HT_NB_CPU_CAD_H1110 HT_NB_CPU_CAD_L1110 HT_NB_CPU_CAD_H1210 HT_NB_CPU_CAD_L1210 HT_NB_CPU_CAD_H1310 HT_NB_CPU_CAD_L1310 HT_NB_CPU_CAD_H1410 HT_NB_CPU_CAD_L1410 HT_NB_CPU_CAD_H1510 HT_NB_CPU_CAD_L1510

HT_NB_CPU_CLK_H010 HT_NB_CPU_CLK_L010 HT_NB_CPU_CLK_H110 HT_NB_CPU_CLK_L110

HT_NB_CPU_CTL_H010 HT_NB_CPU_CTL_L010 HT_NB_CPU_CTL_H110 HT_NB_CPU_CTL_L110

SC180P50V2JN-1GP

C638

C639

(1.2V)1.5A for VLDT

U64A

D1 D2 D3 D4

E3 E2 E1

F1 G3 G2 G1 H1

J1 K1 L3 L2 L1

M1 N3 N2

E5 F5 F3 F4

G5 H5 H3 H4

K3 K4 L5

M5 M3 M4 N5

J5 K5

P1 P3 P4

HT LINK

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

SKT-CPU638P-GP-U

62.10055.111

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

HT_CPU_NB_CAD_H0 10 HT_CPU_NB_CAD_L0 10 HT_CPU_NB_CAD_H1 10 HT_CPU_NB_CAD_L1 10 HT_CPU_NB_CAD_H2 10 HT_CPU_NB_CAD_L2 10 HT_CPU_NB_CAD_H3 10 HT_CPU_NB_CAD_L3 10 HT_CPU_NB_CAD_H4 10 HT_CPU_NB_CAD_L4 10 HT_CPU_NB_CAD_H5 10 HT_CPU_NB_CAD_L5 10 HT_CPU_NB_CAD_H6 10 HT_CPU_NB_CAD_L6 10 HT_CPU_NB_CAD_H7 10 HT_CPU_NB_CAD_L7 10 HT_CPU_NB_CAD_H8 10 HT_CPU_NB_CAD_L8 10 HT_CPU_NB_CAD_H9 10 HT_CPU_NB_CAD_L9 10 HT_CPU_NB_CAD_H10 10 HT_CPU_NB_CAD_L10 10 HT_CPU_NB_CAD_H11 10 HT_CPU_NB_CAD_L11 10 HT_CPU_NB_CAD_H12 10 HT_CPU_NB_CAD_L12 10 HT_CPU_NB_CAD_H13 10 HT_CPU_NB_CAD_L13 10 HT_CPU_NB_CAD_H14 10 HT_CPU_NB_CAD_L14 10 HT_CPU_NB_CAD_H15 10 HT_CPU_NB_CAD_L15 10

HT_CPU_NB_CLK_H0 10 HT_CPU_NB_CLK_L0 10 HT_CPU_NB_CLK_H1 10 HT_CPU_NB_CLK_L1 10

HT_CPU_NB_CTL_H0 10 HT_CPU_NB_CTL_L0 10 HT_CPU_NB_CTL_H1 10 HT_CPU_NB_CTL_L1 10

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

CPU_HT_LINK I/F_(1/4)

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

456Friday, February 15, 2008

www.kythuatvitinh.com

CPU / DDR2

0D9V_S3

D D

C373

SC4D7U6D3V5KX-3GP

1D8V_S3

C C

MEM_MA0_ODT08 MEM_MA0_ODT18

MEM_MA0_CS#08 MEM_MA0_CS#18

MEM_MA_CKE08 MEM_MA_CKE18

MEM_MA_CLK0_P8 MEM_MA_CLK0_N8 MEM_MA_CLK1_P8 MEM_MA_CLK1_N8

B B

A A

MEM_MA_ADD08 MEM_MA_ADD18 MEM_MA_ADD28 MEM_MA_ADD38 MEM_MA_ADD48 MEM_MA_ADD58 MEM_MA_ADD68 MEM_MA_ADD78 MEM_MA_ADD88 MEM_MA_ADD98 MEM_MA_ADD108 MEM_MA_ADD118 MEM_MA_ADD128 MEM_MA_ADD138 MEM_MA_ADD148 MEM_MA_ADD158

MEM_MA_BANK08 MEM_MA_BANK18 MEM_MA_BANK28

MEM_MA_RAS#8 MEM_MA_CAS#8 MEM_MA_WE#8

C106

SC4D7U6D3V5KX-3GP

R382

R382 39D2R2F-L-GP

39D2R2F-L-GP

1 2 1 2

R381

R381 39D2R2F-L-GP

39D2R2F-L-GP

C380

SC4D7U6D3V5KX-3GP

TP20TP20

C385

Place near to CPU

SCD22U6D3V2KX-1GP

0D9V_S3

C126

SCD22U6D3V2KX-1GP

C149

C118

SC4D7U6D3V5KX-3GP

SCD22U6D3V2KX-1GP

C359

(0.9V)750mA for VTT

U64B

D10

VTT1

MEM:CMD/CTRL/CLK

VTT2 VTT3 VTT4

MEMZP MEMZN

RSVD_M1 MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1 MA_CLK_H5

MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4

L20

MA_ADD5 MA_ADD6

L21

MA_ADD7

L19

MA_ADD8 MA_ADD9 MA_ADD10

L22

MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1

J21

MA_BANK2 MA_RAS_L

MA_CAS_L MA_WE_L

SKT-CPU638P-GP-U

MEM:CMD/CTRL/CLK

C10 B10

MEMZP MEMZN CPU_VTT_SUS_FB

MEM_RSVD_M1

AD10 AF10

AE10

AA16

M20 M19

M22 M24

H16 T19

V22 U21 V19

T20 U19 U20 V20

N19 N20 E16 F16 Y16

P19 P20

N21 N22

K22 R21

K20 V24 K24 K19

R20 R23

R19 T22 T24

C364

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C112

SC1000P50V3JN-GP

MEM_RSVD_M2

C108

C343

SC1000P50V3JN-GP

SC180P50V2JN-1GP

TP10TP10

TP74TP74

MEM_MB0_ODT0 9 MEM_MB0_ODT1 9

MEM_MB0_CS#0 9 MEM_MB0_CS#1 9

MEM_MB_CKE0 9 MEM_MB_CKE1 9

MEM_MB_CLK0_P 9 MEM_MB_CLK0_N 9 MEM_MB_CLK1_P 9 MEM_MB_CLK1_N 9

MEM_MB_ADD0 9 MEM_MB_ADD1 9 MEM_MB_ADD2 9 MEM_MB_ADD3 9 MEM_MB_ADD4 9 MEM_MB_ADD5 9 MEM_MB_ADD6 9 MEM_MB_ADD7 9 MEM_MB_ADD8 9 MEM_MB_ADD9 9 MEM_MB_ADD10 9 MEM_MB_ADD11 9 MEM_MB_ADD12 9 MEM_MB_ADD13 9 MEM_MB_ADD14 9 MEM_MB_ADD15 9

MEM_MB_BANK0 9 MEM_MB_BANK1 9 MEM_MB_BANK2 9

MEM_MB_RAS# 9 MEM_MB_CAS# 9 MEM_MB_WE# 9

C352

SC180P50V2JN-1GP

0D9V_S3_VREF

C136

SC1000P50V3JN-GP

C121

C371

SC1000P50V3JN-GP

W10

VTT5

AC10

VTT6

AB10

VTT7

AA10

VTT8

A10

VTT9

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

MEM_MA_DATA08 MEM_MA_DATA18 MEM_MA_DATA28 MEM_MA_DATA38 MEM_MA_DATA48 MEM_MA_DATA58 MEM_MA_DATA68 MEM_MA_DATA78 MEM_MA_DATA88 MEM_MA_DATA98 MEM_MA_DATA108 MEM_MA_DATA118

C131

SC180P50V2JN-1GP

1D8V_S3

R121

C133

SCD1U10V2KX-4GP

R121 1KR3F-GP

1KR3F-GP

R107

C110

MEM_MA_DATA128 MEM_MA_DATA138 MEM_MA_DATA148 MEM_MA_DATA158 MEM_MA_DATA168 MEM_MA_DATA178 MEM_MA_DATA188 MEM_MA_DATA198 MEM_MA_DATA208 MEM_MA_DATA218 MEM_MA_DATA228 MEM_MA_DATA238 MEM_MA_DATA248 MEM_MA_DATA258 MEM_MA_DATA268 MEM_MA_DATA278 MEM_MA_DATA288 MEM_MA_DATA298 MEM_MA_DATA308 MEM_MA_DATA318 MEM_MA_DATA328 MEM_MA_DATA338 MEM_MA_DATA348 MEM_MA_DATA358 MEM_MA_DATA368 MEM_MA_DATA378 MEM_MA_DATA388 MEM_MA_DATA398 MEM_MA_DATA408 MEM_MA_DATA418 MEM_MA_DATA428 MEM_MA_DATA438 MEM_MA_DATA448 MEM_MA_DATA458 MEM_MA_DATA468 MEM_MA_DATA478 MEM_MA_DATA488 MEM_MA_DATA498 MEM_MA_DATA508 MEM_MA_DATA518 MEM_MA_DATA528 MEM_MA_DATA538 MEM_MA_DATA548 MEM_MA_DATA558 MEM_MA_DATA568 MEM_MA_DATA578 MEM_MA_DATA588 MEM_MA_DATA598 MEM_MA_DATA608 MEM_MA_DATA618 MEM_MA_DATA628 MEM_MA_DATA638

MEM_MA_DM08 MEM_MA_DM18 MEM_MA_DM28 MEM_MA_DM38 MEM_MA_DM48 MEM_MA_DM58 MEM_MA_DM68 MEM_MA_DM78

MEM_MA_DQS0_P8 MEM_MA_DQS0_N8 MEM_MA_DQS1_P8 MEM_MA_DQS1_N8 MEM_MA_DQS2_P8 MEM_MA_DQS2_N8 MEM_MA_DQS3_P8 MEM_MA_DQS3_N8 MEM_MA_DQS4_P8 MEM_MA_DQS4_N8 MEM_MA_DQS5_P8 MEM_MA_DQS5_N8 MEM_MA_DQS6_P8 MEM_MA_DQS6_N8 MEM_MA_DQS7_P8 MEM_MA_DQS7_N8

U64C

MEM:DATA

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24

J19 E21 E22 H20 H22 Y24

AB24 AB22 AA21

W22 W21

Y22

AA22

Y20

AA20 AA18 AB18 AB21 AD21 AD19

Y18

AD17

W16 W14

Y14 Y17

AB17 AB15 AD15 AB13 AD13

Y12

W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24

AC24

Y19

AB16

Y13 G13

H13 G16 G15 C22 C21 G22

G21 AD23 AC23 AB19 AB20

Y15

W15 W12 W13

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

SKT-CPU638P-GP-U

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

CPU_DDR_(2/4)

X17 SA

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11

A12 B16 A22 E25 AB26 AE22 AC16 AD12

C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

MEM_MB_DATA0 9 MEM_MB_DATA1 9 MEM_MB_DATA2 9 MEM_MB_DATA3 9 MEM_MB_DATA4 9 MEM_MB_DATA5 9 MEM_MB_DATA6 9 MEM_MB_DATA7 9 MEM_MB_DATA8 9 MEM_MB_DATA9 9 MEM_MB_DATA10 9 MEM_MB_DATA11 9 MEM_MB_DATA12 9 MEM_MB_DATA13 9 MEM_MB_DATA14 9 MEM_MB_DATA15 9 MEM_MB_DATA16 9 MEM_MB_DATA17 9 MEM_MB_DATA18 9 MEM_MB_DATA19 9 MEM_MB_DATA20 9 MEM_MB_DATA21 9 MEM_MB_DATA22 9 MEM_MB_DATA23 9 MEM_MB_DATA24 9 MEM_MB_DATA25 9 MEM_MB_DATA26 9 MEM_MB_DATA27 9 MEM_MB_DATA28 9 MEM_MB_DATA29 9 MEM_MB_DATA30 9 MEM_MB_DATA31 9 MEM_MB_DATA32 9 MEM_MB_DATA33 9 MEM_MB_DATA34 9 MEM_MB_DATA35 9 MEM_MB_DATA36 9 MEM_MB_DATA37 9 MEM_MB_DATA38 9 MEM_MB_DATA39 9 MEM_MB_DATA40 9 MEM_MB_DATA41 9 MEM_MB_DATA42 9 MEM_MB_DATA43 9 MEM_MB_DATA44 9 MEM_MB_DATA45 9 MEM_MB_DATA46 9 MEM_MB_DATA47 9 MEM_MB_DATA48 9 MEM_MB_DATA49 9 MEM_MB_DATA50 9 MEM_MB_DATA51 9 MEM_MB_DATA52 9 MEM_MB_DATA53 9 MEM_MB_DATA54 9 MEM_MB_DATA55 9 MEM_MB_DATA56 9 MEM_MB_DATA57 9 MEM_MB_DATA58 9 MEM_MB_DATA59 9 MEM_MB_DATA60 9 MEM_MB_DATA61 9 MEM_MB_DATA62 9 MEM_MB_DATA63 9

MEM_MB_DM0 9 MEM_MB_DM1 9 MEM_MB_DM2 9 MEM_MB_DM3 9 MEM_MB_DM4 9 MEM_MB_DM5 9 MEM_MB_DM6 9 MEM_MB_DM7 9

MEM_MB_DQS0_P 9 MEM_MB_DQS0_N 9 MEM_MB_DQS1_P 9 MEM_MB_DQS1_N 9 MEM_MB_DQS2_P 9 MEM_MB_DQS2_N 9 MEM_MB_DQS3_P 9 MEM_MB_DQS3_N 9 MEM_MB_DQS4_P 9 MEM_MB_DQS4_N 9 MEM_MB_DQS5_P 9 MEM_MB_DQS5_N 9 MEM_MB_DQS6_P 9 MEM_MB_DQS6_N 9 MEM_MB_DQS7_P 9 MEM_MB_DQS7_N 9

556Tuesday, February 19, 2008

www.kythuatvitinh.com

1D8V_S0

678

RN16

RN16 SRN300J-1-GP

1D8V_S3

123

R383

R383 390R2J-1-GP

390R2J-1-GP

SRN300J-1-GP

4 5

1 2

R462 0R2J-2-GPR462 0R2J-2-GP

1 2

R461 0R2J-2-GPR461 0R2J-2-GP

1 2

R465 0R2J-2-GPR465 0R2J-2-GP

1 2

R170 0R2J-2-GPR170 0R2J-2-GP

CPU_SIC CPU_SID

LDT_PWROK

CPU_LDT_REQ#_CPU

LDT_RST#_CPU 11

LDT_STP#_CPU 11

near cpu

D D

CPU_LDT_RST#18

CPU_PWRGD18 CPU_LDT_STOP#18 CPU_LDT_REQ#11

R385

390R2J-1-GP

C C

390R2J-1-GP

Sideband temperature

1D8V_S3

R384

B B

1KR2J-1-GP

CPU temperature sensor driver INT event to EC

CPU_ALERT#

3D3V_S05V_S5

R481

10KR2J-3-GP

Q33

LDT_PWROK#

S D

FDV301N, the Vgs is: min = 0.65V Typ = 0.85V Max = 1.5V

A A

LDT_PWROK

FDV301N-NL-GP

R482

R482 10KR2J-3-GP

10KR2J-3-GP

S D

Q34

Q34 FDV301N-NL-GP

FDV301N-NL-GP

CPU_PWRGD_SVID_REG 40

2D5V_S0

Cloce To CPU

CPU_CLK(200MHz)

CPU_CLK3 CPU_CLK#3

For HDT DBG

LDT_PWROK

C360

C360 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

L26

L26 BLM18PG330SN1D-GP

BLM18PG330SN1D-GP

1 2

R460 169R2F-GPR460 169R2F-GP

1 2

C728 SC3900P50V2KX-2GPC728 SC3900P50V2KX-2GP

1 2

C729 SC3900P50V2KX-2GPC729 SC3900P50V2KX-2GP

LDT_RST#_CPU

HDT_RST#

1 2

R171

R171 0R2J-2-GP

0R2J-2-GP

1D2V_S0

LYAOUT:ROUTE VDDA TRACE APPROX. 50mils WIDE(USE 2X25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

+2.5V_RUN_VDDA

(2.5V)250mA for VDDA

SCD22U6D3V2KX-1GP

SC4D7U6D3V5KX-3GP

C394

1 2

LDT_PWROK LDT_STP#_CPU

CPU_SIC CPU_SID CPU_ALERT#

1 2

R135 44D2R2F-GPR135 44D2R2F-GP

1 2

R137 44D2R2F-GPR137 44D2R2F-GP

CPU_VDD0_RUN_FB_H40 CPU_VDD0_RUN_FB_L40

CPU_VDD1_RUN_FB_H40 CPU_VDD1_RUN_FB_L40

TP64TP64 TP19TP19

TP24TP24 TP23TP23

TP21TP21 TP9TP9

TP66TP66 TP67TP67 TP68TP68 TP8TP8 TP65TP65

1 2

R467

R467 0R2J-2-GP

0R2J-2-GP

1D8V_S3

R379 300R2F-GP

R168 300R2F-GPR168 300R2F-GP

R159 300R2F-GP

R159 300R2F-GP R466 300R2F-GP

R466 300R2F-GP R167 300R2F-GP

R167 300R2F-GP R162 300R2F-GP

R162 300R2F-GP R104 300R2F-GPR104 300R2F-GP R377 300R2F-GP

R377 300R2F-GP R380 300R2F-GPR380 300R2F-GP R378 300R2F-GP

R378 300R2F-GP R105 300R2F-GP

R105 300R2F-GP

C318

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

1 1

1 1 1 1 1

1 2

1 2 1 2

1 2

SC3300P50V2KX-1GP

C306

CLKCPU_IN

CLKCPU#_IN

CPU_HTREF0

CPU_HTREF1

CPU_TEST23 CPU_TEST18

CPU_TEST19 CPU_TEST25_H

CPU_TEST25_L CPU_TEST21

CPU_TEST20

CPU_TEST24

CPU_TEST22 CPU_TEST12 CPU_TEST27

CPU_TEST9

CPU_TEST27

CPU_DBREQ#

CPU_TEST15 CPU_TEST14 CPU_TEST19 CPU_TEST18 CPU_TEST21 CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12

U64D

VDDA1

VDDA2

CLKIN_H

CLKIN_L

RESET_L

PWROK

F10

LDTSTOP_L

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

HT_REF0

HT_REF1

VDD0_FB_H

VDD0_FB_L

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

TEST19

TEST25_H

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

TEST9

AA6

TEST6

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

SKT-CPU638P-GP-U

SB-EC63

KEY1 KEY2

SVC SVD

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC THERMDA

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H VDDNB_FB_L

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

1D8V_S3

R188

1KR2J-1-GP

M11 W18

A6 A4

CPU exceeds to 125

AF6

CPU_PROCHOT#_LCPU_LDT_REQ#_CPU

AC7 AA8

W7 W8

1 2

C152

C152 SC100P50V2JN-3GP

SC100P50V2JN-3GP

CPU_VDDIO_SUS_FB_H

CPU_VDDIO_SUS_FB_L

Y9 H6

E10 AE9

J7 H8

D7 E7 F7 C7

C3 K8

C9 C8

H18 H19 AA7 D5 C5

CPU_VDDNB_RUN_FB_H 40 CPU_VDDNB_RUN_FB_L 40

CPU_DBREQ# CPU_TDO

CPU_TEST28_H CPU_TEST28_L

CPU_TEST17 CPU_TEST16 CPU_TEST15 CPU_TEST14

CPU_TEST29H CPU_TEST29L

1D8V_S3

R98

300R2J-4-GP

R187

R187 1KR2J-1-GP

1KR2J-1-GP

CPU_SVC 40 CPU_SVD 40

℃

R99

1 2

300R2J-4-GP

1 1

LAYOUT: Route FBCLKOUT_H/L differentially impedance 80

TP18TP18

TP17TP17

TP75TP75

TP25TP25

TP22TP22

TP76TP76

HDT Connectors

TP72TP72

TP73TP73

CPU_DBREQ#

CPU_DBRDY

CPU_TCK CPU_TMS CPU_TDI

CPU_TRST#

CPU_TDO

HDT_RST#

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

LDT_PWROK

R364

300R2J-4-GP

R97

1 2

0R2J-2-GP

1D8V_S3

H_THERMDC 23 H_THERMDA 23

TP13TP13 TP12TP12

300R2J-4-GP

MMBT3904-7-F-GP

R376

C613

10KR2J-3-GP

1 2

SCD1U10V2KX-4GP

CPU_THERMTRIP#_L 19

Q24

The Processor has reached a preset maximum operating temperature. 100 I=Active HTC O=FAN

HDT1

1 3

5 7

9 11 13 15 17 19 21

SMC-CONN26A-FP

20.F0357.025

656Friday, February 15, 2008

1D8V_S3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU_Control&Debug_(3/4)

X17 SA

CPU_PROCHOT# 18

℃

4 6 8 10 12 14 16 18 20 22 24 26

www.kythuatvitinh.com

SSID = CPU

D D

U64F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

C C

B B

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

VSS28

VSS29

VSS30

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

VSS40

VSS41

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

VSS51

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

VSS61

VSS62

H21

VSS63

H23

VSS64

VSS65

SKT-CPU638P-GP-U

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

+VCC_CORE0

CPU_VDDNB

1D8V_S3

36A for VDD0&VDD1

Bottom Side Decoupling Bottom Side Decoupling

C260

C259

SC22U6D3V5MX-2GP

C240

C300

C225

SC22U6D3V5MX-2GP

C228

C275

SC22U6D3V5MX-2GP

C275

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

(0.8~1.1V)3A for VDDNB

C237

(1.8V)2A for VDDIO

SC22U6D3V5MX-2GP

Bottom Side Decoupling

C190

C223

SC22U6D3V5MX-2GP

C194

C218

SC22U6D3V5MX-2GP

C281

C230

C258

C322

SC180P50V2JN-1GP

SC22U6D3V5MX-2GP

U64E

VDD0_1

VDD0_2

VDD0_3

J11

VDD0_4

J13

VDD0_5

J15

VDD0_6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

VDD0_11

VDD0_12

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

VDD0_17

VDD0_18

VDD0_19

M10

VDD0_20

VDD0_21

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SKT-CPU638P-GP-U

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

C205

C144

SCD22U6D3V2KX-1GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

Place near to CPU

C358

C303

C162

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

C132

SCD22U6D3V2KX-1GP

C189

+VCC_CORE1

C174

C170

C175

C199

SC22U6D3V5MX-2GP

C213

SCD22U6D3V2KX-1GP

SC22U6D3V5MX-2GP

1D8V_S3

C167

C283

C151

C298

C163

SC4D7U6D3V3KX-GP

SCD22U6D3V2KX-1GP

C283

C257

SC4D7U6D3V3KX-GP

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

CPU_Power_(4/4)

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

756Friday, February 15, 2008

www.kythuatvitinh.com

SSID = MEMORY

DIMM2

MEM_MA_ADD05 MEM_MA_ADD15 MEM_MA_ADD25 MEM_MA_ADD35 MEM_MA_ADD45

D D

C C

B B

VREF_DDR_MEM

MEM_MA_ADD55 MEM_MA_ADD65 MEM_MA_ADD75 MEM_MA_ADD85 MEM_MA_ADD95 MEM_MA_ADD105 MEM_MA_ADD115 MEM_MA_ADD125 MEM_MA_ADD135 MEM_MA_ADD145 MEM_MA_ADD155

MEM_MA_BANK25 MEM_MA_BANK05 MEM_MA_BANK15

MEM_MA_DATA05 MEM_MA_DATA15 MEM_MA_DATA25 MEM_MA_DATA35 MEM_MA_DATA45 MEM_MA_DATA55 MEM_MA_DATA65 MEM_MA_DATA75 MEM_MA_DATA85 MEM_MA_DATA95 MEM_MA_DATA105 MEM_MA_DATA115 MEM_MA_DATA125 MEM_MA_DATA135 MEM_MA_DATA145 MEM_MA_DATA155 MEM_MA_DATA165 MEM_MA_DATA175 MEM_MA_DATA185 MEM_MA_DATA195 MEM_MA_DATA205 MEM_MA_DATA215 MEM_MA_DATA225 MEM_MA_DATA235 MEM_MA_DATA245 MEM_MA_DATA255 MEM_MA_DATA265 MEM_MA_DATA275 MEM_MA_DATA285 MEM_MA_DATA295 MEM_MA_DATA305 MEM_MA_DATA315 MEM_MA_DATA325 MEM_MA_DATA335 MEM_MA_DATA345 MEM_MA_DATA355 MEM_MA_DATA365 MEM_MA_DATA375 MEM_MA_DATA385 MEM_MA_DATA395 MEM_MA_DATA405 MEM_MA_DATA415 MEM_MA_DATA425 MEM_MA_DATA435 MEM_MA_DATA445 MEM_MA_DATA455 MEM_MA_DATA465 MEM_MA_DATA475 MEM_MA_DATA485 MEM_MA_DATA495 MEM_MA_DATA505 MEM_MA_DATA515 MEM_MA_DATA525 MEM_MA_DATA535 MEM_MA_DATA545 MEM_MA_DATA555 MEM_MA_DATA565 MEM_MA_DATA575 MEM_MA_DATA585 MEM_MA_DATA595 MEM_MA_DATA605 MEM_MA_DATA615 MEM_MA_DATA625 MEM_MA_DATA635

MEM_MA_DQS0_N5 MEM_MA_DQS1_N5 MEM_MA_DQS2_N5 MEM_MA_DQS3_N5 MEM_MA_DQS4_N5 MEM_MA_DQS5_N5 MEM_MA_DQS6_N5 MEM_MA_DQS7_N5

MEM_MA_DQS0_P5 MEM_MA_DQS1_P5 MEM_MA_DQS2_P5 MEM_MA_DQS3_P5 MEM_MA_DQS4_P5 MEM_MA_DQS5_P5 MEM_MA_DQS6_P5

MEM_MA_DQS7_P5

MEM_MA0_ODT05 MEM_MA0_ODT15

SCD1U16V2KX-3GP

SC2D2U6D3V3KX-GP

C423

C428

Place C2.2uF and 0.1uF < 500mils from DDR connector

102

101

100

105

A10/AP

A11

A12

116

A13

A14

A15

A16/BA2

107

BA0

106

BA1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

DQS0#

DQS1#

DQS2#

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

DQS0

DQS1

DQS2

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

VREF

VSS

202

GND

MH1

DDR2-200P-22-GP-U2

62.10017.A61

108

RAS#

109

WE#

113

CAS#

110

CS0#

115

CS1#

CKE0

CKE1

CK0

CK0#

164

CK1

166

CK1#

DM0

DM1

DM2

DM3

130

DM4

147

DM5

170

DM6

185

DM7

195

SDA

197

SCL

199

VDDSPD

198

SA0

200

SA1

NC#50

NC#69

NC#83

120

NC#120

163

NC#163/TEST

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

VSS

REVERSE TYPE

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

MH2

DIMM1_SA0 DIMM1_SA1

1D8V_S3

MEM_MA_RAS# 5 MEM_MA_WE# 5 MEM_MA_CAS# 5

MEM_MA0_CS#0 5 MEM_MA0_CS#1 5

MEM_MA_CKE0 5 MEM_MA_CKE1 5

MEM_MA_CLK0_P 5 MEM_MA_CLK0_N 5

MEM_MA_CLK1_P 5 MEM_MA_CLK1_N 5

MEM_MA_DM0 5 MEM_MA_DM1 5 MEM_MA_DM2 5 MEM_MA_DM3 5 MEM_MA_DM4 5 MEM_MA_DM5 5 MEM_MA_DM6 5 MEM_MA_DM7 5

1 2

R101 10KR2J-3-GPR101 10KR2J-3-GP

1 2

R102 10KR2J-3-GPR102 10KR2J-3-GP

(A0)

TP11TP11

DDR_VREF

1D8V_S3

R209

R209 1KR2F-3-GP

1KR2F-3-GP

R210

R210 1KR2F-3-GP

1KR2F-3-GP

LAYOUT: Locate close to DIMM

TP27TP27

TP6TP6

TP5TP5

C94

SC2D2U6D3V3KX-GP

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

MEM_MA_CLK0_P

C313

C313 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MA_CLK0_N MEM_MA_CLK1_P

C140

C140 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MA_CLK1_N

C416

SCD1U10V2KX-4GP

C421

C421 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SMBDAT0_SB 3,9,19

SMBCLK0_SB 3,9,19

VREF_DDR_MEM

C97

C97 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

TP29TP29

C419

C419 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

3D3V_S0

A10

A11

A4C1A6

A12

A13

B12

B10

B13

B11 AB11

C13

C10

C11

C4C3C15

C12

D10

D11

D12

D13

E8E9E10

E12H3E14

E13

E11

F10

F11

F12

F13

G10

G11 AD11

G12

G13

H10

H11

H12

H13

J11

J12

J10

J3 W3

J13

BGA638_50_26SQ_S1G2_OEM

K11

K10

K12

K13

L13

L12

L10

L11 AE11

M11

M10

N9 P9

N11

N10

P10 AA10

P11K8P17

P4G4

R10

R11

R2 V2

T5T6T7

T10 AE10

T11

T13

U10

U11

U13

U12

U8N8

V10

V3D3

V11

V12

V13

W11

W13

W12

W10

W4W5W6

Y11

Y12

Y10

Y13

AA11

AA12

AA13

AA7

AA1

AA9

AA2

AA6

AA3

AA4

AA5

AA8

AB12

AB13

AB10

AB7

AB3

AB4

AB5

AB6

AB9

AB1

AB2

AB8

AC12

AC10

AC11

AC13

AC5

AC3

AC6

AC7

AC8

AC4

AC9

AC2

AC1

AD10

AD12

AD13

AD1

AD2

AD8

AD9

AD3

AD6

AD7

AD5

AD4

AE12

AE13

AE5

AE9

AE3

AE2

AE8

AE4P8AE6

AE7

AF10

AF12

AF11

AF13

AF5

AF7

AF8

AF9

AF4

AF6

A18

A19

A20

A24

A15D7A17

A21

A22

A16

A14

A23

B14

B23

B22

B19

B24

B18

B15

B17

B16

B25

B21

B20

C18

C23

C24

C14

C21

C22

C17

C16

C19

C25

C20

D24

D22

D23

D26

D25

D19

D17

D21

D14

D18

D15

D16

D20

E26

E18

E19

E23

E16

E17

E21

E22

E25

E15

E20

E24

F18

F20

F24

F25

F15

F17

F21

F26

F19

F22

F23

F16

F14

G21

G22

G15

G23

G18

G16

G25

G14

G24

G17

G26

H20

H21

H22

H14

H18

H19

H16

H17

H23

H26

H24

H25

J25

J24

J26

J21

J23

J22

J14

J16

J17

J18

J20

K16

K17

K14

K15

K26

K19

K21

K22

K20

K18

K24

K25

K23

L19

L20

L23

L26

L14

L21

L25

L16

L22

L24

L15

L18

L17

M21

M22

M18

M17

M23

M24

M26C26

M19

M20

M16

M25

N16

N22

N21U2N23

N24

N25

N26

N20

N17

N18

P21

P25

P26

P16

P18

P24

P22

P20

R16

R23

R24

R25

R21

R22

R18

R17

R20

R26

R19

T24

T25

T26

T23

T20

T18

T16

T17N6T12

T14

T22

T21

T15

U23

U24

U25

U26

U19N19

U15

U21

U22

U16

U17

U18

U14

U20

V22

V23P23

V24

V17

V15

V16

V14

V26

V25

V18

V21

V20

V19J19 P19

W18

W25

W26

W21

W22

W23

W17

W24

W16

W14

W15

Y16

Y26

Y14

Y15

Y21

Y22

Y17

Y19

Y20

Y18

Y24

Y25

Y23

AA24

AA16

AA15

AA19

AA20

AA23

AA26

AA17

AA14

AA18

AA22

AA21

AA25

AB16

AB17

AB18

AB19W7AB21

AB22

AB20

AB24

AB25

AB26

AB14

AB15J15

AB23

AC19

AC26

AC14

AC15

AC16

AC17

AC22

AC23

AC24

AC25

AC18

AC20

AC21

AD23

AD15

AD16

AD17

AD18

AD20

AD26

AD14

AD22M8AD24

AD25

AD19M9AD21

AE20

AE17

AE18

AE16

AE14

AE15H15

AE22

AE23

AE24

AE25

AE19

AE21

AF23

AF20

AF21

AF22

AF24

AF15

AF14

AF16

AF17

AF18

AF19T19

PARALLEL TERMINATION

Put decap near power(0.9V) and pull-up resistor

Do not share the Term resistor between the DDR addess and Control Signals.

Decoupling Capacitor

Place these Caps near DM1

1D8V_S3

SC2D2U6D3V3KX-GP

0D9V_S3

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

C282

C323

C354

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

C757

C176

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

C335

C272

SCD1U10V2KX-4GP

(A0)

DIMM1

DIMM2

(A4)

SC2D2U6D3V3KX-GP

C403

C310

SCD1U10V2KX-4GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

C750

C241

C581

C410

C200

C217

SCD1U10V2KX-4GP

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

C214

C407

C265

C332

C215

C370

SCD1U10V2KX-4GP

0D9V_S3

RN13

1 2

MEM_MA_CKE1 5

MEM_MA_ADD4 5

MEM_MA_ADD11 5 MEM_MA_ADD6 5

MEM_MA_WE# 5

MEM_MA_ADD10 5

MEM_MA_BANK0 5 MEM_MA_ADD3 5

MEM_MA_ADD14 5

MEM_MA_ADD12 5

MEM_MA_ADD15 5 MEM_MA_CKE0 5

MEM_MA_BANK1 5

MEM_MA0_CS#1 5

MEM_MA_CAS# 5 MEM_MA0_ODT1 5

MEM_MA0_CS#0 5

MEM_MA0_ODT0 5

MEM_MA_RAS# 5 MEM_MA_ADD13 5

MEM_MA_ADD5 5

MEM_MA_ADD8 5

MEM_MA_ADD9 5 MEM_MA_BANK2 5

MEM_MA_ADD7 5

MEM_MA_ADD2 5

MEM_MA_ADD0 5 MEM_MA_ADD1 5

1D8V_S3

1 2

C740

C740 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C412

C412 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY DY

1 2

C181

C181 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C384

C384 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN7

RN7

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN15

RN15

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN3

RN3

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN5

RN5

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN11

RN11

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN9

RN9

1 2 3 4 5

SRN47J-4-GP

0D9V_S3

C301

C301 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C262

C262 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C202

C202 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C386

C386 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C392

C392 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C287

C287 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C397

C314

C254

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

C397 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C226

C226 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

HI 9.2mm

A A

Title

DDR_DIMM1

Size Document Number Rev

Size Document Number Rev A2

A2 Date: Sheet of

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

856Friday, February 15, 2008

www.kythuatvitinh.com

SSID = MEMORY

DIMM1

MH1

MEM_MB_ADD05 MEM_MB_ADD15 MEM_MB_ADD25 MEM_MB_ADD35 MEM_MB_ADD45

D D

C C

B B

VREF_DDR_MEM

MEM_MB_ADD55 MEM_MB_ADD65 MEM_MB_ADD75 MEM_MB_ADD85

MEM_MB_ADD95 MEM_MB_ADD105 MEM_MB_ADD115 MEM_MB_ADD125 MEM_MB_ADD135 MEM_MB_ADD145 MEM_MB_ADD155

MEM_MB_BANK25

MEM_MB_BANK05 MEM_MB_BANK15

MEM_MB_DATA05 MEM_MB_DATA15 MEM_MB_DATA25 MEM_MB_DATA35 MEM_MB_DATA45 MEM_MB_DATA55 MEM_MB_DATA65 MEM_MB_DATA75 MEM_MB_DATA85

MEM_MB_DATA95 MEM_MB_DATA105 MEM_MB_DATA115 MEM_MB_DATA125 MEM_MB_DATA135 MEM_MB_DATA145 MEM_MB_DATA155 MEM_MB_DATA165 MEM_MB_DATA175 MEM_MB_DATA185 MEM_MB_DATA195 MEM_MB_DATA205 MEM_MB_DATA215 MEM_MB_DATA225 MEM_MB_DATA235 MEM_MB_DATA245 MEM_MB_DATA255 MEM_MB_DATA265 MEM_MB_DATA275 MEM_MB_DATA285 MEM_MB_DATA295 MEM_MB_DATA305 MEM_MB_DATA315 MEM_MB_DATA325 MEM_MB_DATA335 MEM_MB_DATA345 MEM_MB_DATA355 MEM_MB_DATA365 MEM_MB_DATA375 MEM_MB_DATA385 MEM_MB_DATA395 MEM_MB_DATA405 MEM_MB_DATA415 MEM_MB_DATA425 MEM_MB_DATA435 MEM_MB_DATA445 MEM_MB_DATA455 MEM_MB_DATA465 MEM_MB_DATA475 MEM_MB_DATA485 MEM_MB_DATA495 MEM_MB_DATA505 MEM_MB_DATA515 MEM_MB_DATA525 MEM_MB_DATA535 MEM_MB_DATA545 MEM_MB_DATA555 MEM_MB_DATA565 MEM_MB_DATA575 MEM_MB_DATA585 MEM_MB_DATA595 MEM_MB_DATA605 MEM_MB_DATA615 MEM_MB_DATA625 MEM_MB_DATA635

MEM_MB0_CS#05 MEM_MB0_CS#15

MEM_MB_CKE05 MEM_MB_CKE15 MEM_MB_RAS#5 MEM_MB_CAS#5

MEM_MB_WE#5

SMBCLK0_SB3,8,19

SMBDAT0_SB3,8,19

MEM_MB0_ODT05 MEM_MB0_ODT15

SC2D2U6D3V3KX-GP

SCD1U16V2KX-3GP

C427

C424

102

101

100

105

A10/AP

A11

A12

116

A13

A14

A15

A16_BA2

107

BA0

106

BA1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

NC#50

NC#69

NC#83

120

NC#120

163

NC#163/TEST

110

CS0#

115

CS1#

CKE0

CKE1

108

RAS#

113

CAS#

109

WE#

197

SCL

195

SDA

114

ODT0

119

ODT1

VREF

201

GND

SKT-SODIMM200-38GP

MH2

DQS0

DQS1

DQS2

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

DQS0#

DQS1#

DQS2#

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

DM0

DM1

DM2

DM3

130

DM4

147

DM5

170

DM6

185

DM7

CK0

CK0#

164

CK1

166

CK1#

DIMM2_SA0

198

SA0

DIMM2_SA1

R96 10KR2J-3-GPR96 10KR2J-3-GP

200

SA1

VDD_SPD

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

REVERSE TYPE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

199

81 82 87 88 95 96 103 104 111 112 117 118

2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

202

R95 10KR2J-3-GPR95 10KR2J-3-GP

1D8V_S3

1 2 1 2

MEM_MB_DQS0_P 5 MEM_MB_DQS1_P 5 MEM_MB_DQS2_P 5 MEM_MB_DQS3_P 5 MEM_MB_DQS4_P 5 MEM_MB_DQS5_P 5 MEM_MB_DQS6_P 5 MEM_MB_DQS7_P 5 MEM_MB_DQS0_N 5 MEM_MB_DQS1_N 5 MEM_MB_DQS2_N 5 MEM_MB_DQS3_N 5 MEM_MB_DQS4_N 5 MEM_MB_DQS5_N 5 MEM_MB_DQS6_N 5 MEM_MB_DQS7_N 5

MEM_MB_DM0 5 MEM_MB_DM1 5 MEM_MB_DM2 5 MEM_MB_DM3 5 MEM_MB_DM4 5 MEM_MB_DM5 5 MEM_MB_DM6 5 MEM_MB_DM7 5

MEM_MB_CLK0_P 5 MEM_MB_CLK0_N 5 MEM_MB_CLK1_P 5 MEM_MB_CLK1_N 5

3D3V_S0

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

(A2)

SC2D2U6D3V3KX-GP

MEM_MB_CLK0_P

C369

C369 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MB_CLK0_N MEM_MB_CLK1_P

C105

C105 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MB_CLK1_N

0D9V_S3

RN12

PARALLEL TERMINATION

Put decap near power(0.9V) and pull-up resistor

Do not share the Term resistor between the DDR addess and Control Signals.

3D3V_S0

C107

C107 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C104

3 4 5

SRN47J-4-GP

SRN47J-4-GP RN8

RN8

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN6

RN6

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN14

RN14

1 2 3 4 5

SRN47J-4-GP

RN10

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN4

RN4

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN2

RN2

1 2 3 4 5

SRN47J-4-GP

MEM_MB_ADD8 5

MEM_MB_ADD12 5

MEM_MB_ADD9 5 MEM_MB_BANK2 5

MEM_MB_BANK0 5

MEM_MB_ADD6 5

MEM_MB_ADD1 5 MEM_MB_ADD5 5

MEM_MB_ADD2 5

MEM_MB_ADD0 5

MEM_MB_RAS# 5 MEM_MB_ADD10 5

MEM_MB_CKE1 5

MEM_MB_CKE0 5

MEM_MB_ADD14 5 MEM_MB_ADD15 5

MEM_MB_ADD11 5

MEM_MB_ADD7 5

MEM_MB_ADD4 5 MEM_MB_ADD3 5

MEM_MB0_CS#1 5

MEM_MB_CAS# 5

MEM_MB0_ODT1 5 MEM_MB_WE# 5

MEM_MB_ADD13 5

MEM_MB0_ODT0 5

MEM_MB0_CS#0 5 MEM_MB_BANK1 5

Decoupling Capacitor

Place these Caps near DM2

0D9V_S3

SCD1U10V2KX-4GP

1D8V_S3

SC2D2U6D3V3KX-GP

C355

SC180P50V2JN-1GP

SC2D2U6D3V3KX-GP

C317

C304

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

C297

C245

C247

C236

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

C204

C315

C362

SCD1U10V2KX-4GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

C337

SCD1U10V2KX-4GP

C756

C762

C263

C216

C375

SCD1U10V2KX-4GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

C277

C180

C173

C415

SCD1U10V2KX-4GP

C400

C404

SCD1U10V2KX-4GP

0D9V_S3

C411

SCD1U10V2KX-4GP

1D8V_S3

1 2

C345

C345 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C291

C291 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C256

C256 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C192

C192 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C367

C367 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C329

C329 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C274

C274 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C224

C224 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C342

C342 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C164

C164 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C759

C759 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C158

C158 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

62.10017.E31

Place C2.2uF and 0.1uF <

500mils from DDR connector

A A

62.10017.E31

HI 5.2mm

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR_DIMM2

Size Document Number Rev

Size Document Number Rev A2

A2 Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

956Friday, February 15, 2008

www.kythuatvitinh.com

HT_CPU_NB_CAD_H04

SSID = N.B

D D

C C

B B

NEW WLAN LAN CARD CARD

A A

A-LINK

HT_CPU_NB_CAD_L04 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H24 HT_CPU_NB_CAD_L24 HT_CPU_NB_CAD_H34 HT_CPU_NB_CAD_L34 HT_CPU_NB_CAD_H44 HT_CPU_NB_CAD_L44 HT_CPU_NB_CAD_H54 HT_CPU_NB_CAD_L54 HT_CPU_NB_CAD_H64 HT_CPU_NB_CAD_L64 HT_CPU_NB_CAD_H74 HT_CPU_NB_CAD_L74

HT_CPU_NB_CAD_H84 HT_CPU_NB_CAD_L84 HT_CPU_NB_CAD_H94 HT_CPU_NB_CAD_L94 HT_CPU_NB_CAD_H104 HT_CPU_NB_CAD_L104 HT_CPU_NB_CAD_H114 HT_CPU_NB_CAD_L114 HT_CPU_NB_CAD_H124 HT_CPU_NB_CAD_L124 HT_CPU_NB_CAD_H134 HT_CPU_NB_CAD_L134 HT_CPU_NB_CAD_H144 HT_CPU_NB_CAD_L144 HT_CPU_NB_CAD_H154 HT_CPU_NB_CAD_L154

HT_CPU_NB_CLK_H04 HT_CPU_NB_CLK_L04 HT_CPU_NB_CLK_H14 HT_CPU_NB_CLK_L14

HT_CPU_NB_CTL_H04 HT_CPU_NB_CTL_L04 HT_CPU_NB_CTL_H14 HT_CPU_NB_CTL_L14

Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24

PCIE_MXM_NB_RX15P49 PCIE_MXM_NB_RX15N49 PCIE_MXM_NB_RX14P49 PCIE_MXM_NB_RX14N49 PCIE_MXM_NB_RX13P49 PCIE_MXM_NB_RX13N49 PCIE_MXM_NB_RX12P49 PCIE_MXM_NB_RX12N49 PCIE_MXM_NB_RX11P49 PCIE_MXM_NB_RX11N49 PCIE_MXM_NB_RX10P49 PCIE_MXM_NB_RX10N49 PCIE_MXM_NB_RX9P49 PCIE_MXM_NB_RX9N49 PCIE_MXM_NB_RX8P49 PCIE_MXM_NB_RX8N49 PCIE_MXM_NB_RX7P49 PCIE_MXM_NB_RX7N49 PCIE_MXM_NB_RX6P49 PCIE_MXM_NB_RX6N49 PCIE_MXM_NB_RX5P49 PCIE_MXM_NB_RX5N49 PCIE_MXM_NB_RX4P49 PCIE_MXM_NB_RX4N49 PCIE_MXM_NB_RX3P49 PCIE_MXM_NB_RX3N49 PCIE_MXM_NB_RX2P49 PCIE_MXM_NB_RX2N49 PCIE_MXM_NB_RX1P49 PCIE_MXM_NB_RX1N49 PCIE_MXM_NB_RX0P49 PCIE_MXM_NB_RX0N49

PCIE_NBRX_NEWTX_P024 PCIE_NBRX_NEWTX_N024 PCIE_NBRX_WLANTX_P124 PCIE_NBRX_WLANTX_N124

PCIE_NBRX_CARDTX_P328 PCIE_NBRX_CARDTX_N328 PCIE_NBRX_TVTX_P124 PCIE_NBRX_TVTX_N124

1 2

PCIE_NBRX_LANTX_P225 PCIE_NBRX_LANTX_N225

ALINK_NBRX_SBTX_P018 ALINK_NBRX_SBTX_N018 ALINK_NBRX_SBTX_P118 ALINK_NBRX_SBTX_N118 ALINK_NBRX_SBTX_P218 ALINK_NBRX_SBTX_N218 ALINK_NBRX_SBTX_P318 ALINK_NBRX_SBTX_N318

R450

R450 301R2F-GP

301R2F-GP

Symbol use (71.RS780.002) BOM use AMD RS780 (71.RS780.007)

U65A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCALP HT_TXCALP HT_RXCALN

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780M-GP-U1

U65B

GFX_RX0P

GFX_RX0N

GFX_RX1P

GFX_RX1N

GFX_RX2P

GFX_RX2N

GFX_RX3P

GFX_RX3N

GFX_RX4P

GFX_RX4N

GFX_RX5P

GFX_RX5N

GFX_RX6P

GFX_RX6N

GFX_RX7P

GFX_RX7N

GFX_RX8P

GFX_RX8N

GFX_RX9P

GFX_RX9N

GFX_RX10P

GFX_RX10N

GFX_RX11P

GFX_RX11N

GFX_RX12P

GFX_RX12N

GFX_RX13P

GFX_RX13N

GFX_RX14P

GFX_RX14N

GFX_RX15P

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

GPP_RX3P

GPP_RX3N

GPP_RX4P

GPP_RX4N

GPP_RX5P

GPP_RX5N

AA8

SB_RX0P

SB_RX0N

AA7

SB_RX1P

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

SB_RX3P

SB_RX3N

RS780M-GP-U1

PART 1 OF 6

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP HT_TXCALN

GFX_TX10P

GFX_TX10N

GFX_TX11P

GFX_TX11N

GFX_TX12P

GFX_TX12N

GFX_TX13P

GFX_TX13N

GFX_TX14P

GFX_TX14N

GFX_TX15P

GFX_TX15N

PCIE I/F GFX

PCE_CALRP PCE_CALRN

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

HT_TXCALN

GFX_TX15P_C GFX_TX15N_C GFX_TX14P_C GFX_TX14N_C GFX_TX13P_C GFX_TX13N_C GFX_TX12P_C GFX_TX12N_C GFX_TX11P_C GFX_TX11N_C GFX_TX10P_C GFX_TX10N_C GFX_TX9P_C GFX_TX9N_C GFX_TX8P_CGFX_TX8P_C GFX_TX8N_CGFX_TX8N_C GFX_TX7P_CGFX_TX7P_C GFX_TX7N_CGFX_TX7N_C GFX_TX6P_CGFX_TX6P_C GFX_TX6N_CGFX_TX6N_C GFX_TX5P_CGFX_TX5P_C GFX_TX5N_CGFX_TX5N_C GFX_TX4P_CGFX_TX4P_C GFX_TX4N_CGFX_TX4N_C GFX_TX3P_CGFX_TX3P_C GFX_TX3N_CGFX_TX3N_C GFX_TX2P_CGFX_TX2P_C GFX_TX2N_CGFX_TX2N_C GFX_TX1P_CGFX_TX1P_C GFX_TX1N_C GFX_TX0P_CGFX_TX0P_C GFX_TX0N_CGFX_TX0N_C

PCIE_NBTX_NEWRX_P0 PCIE_NBTX_NEWRX_N0 PCIE_NBTX_WLANRX_P1 PCIE_NBTX_WLANRX_N1 PCIE_NBTX_LANRX_P2 PCIE_NBTX_LANRX_N2 PCIE_NBTX_CARDRX_P3 PCIE_NBTX_CARDRX_N3 PCIE_NBTX_TVRX_P1 PCIE_NBTX_TVRX_N1

ALINK_NBTX_SBRX_P0 ALINK_NBTX_SBRX_N0 ALINK_NBTX_SBRX_P1 ALINK_NBTX_SBRX_N1 ALINK_NBTX_SBRX_P2 ALINK_NBTX_SBRX_N2 ALINK_NBTX_SBRX_P3 ALINK_NBTX_SBRX_N3

PCE_PCAL PCE_NCAL

Place < 100mils from pin AC8 and AB8

HT_NB_CPU_CAD_H0 4 HT_NB_CPU_CAD_L0 4 HT_NB_CPU_CAD_H1 4 HT_NB_CPU_CAD_L1 4 HT_NB_CPU_CAD_H2 4 HT_NB_CPU_CAD_L2 4 HT_NB_CPU_CAD_H3 4 HT_NB_CPU_CAD_L3 4 HT_NB_CPU_CAD_H4 4 HT_NB_CPU_CAD_L4 4 HT_NB_CPU_CAD_H5 4 HT_NB_CPU_CAD_L5 4 HT_NB_CPU_CAD_H6 4 HT_NB_CPU_CAD_L6 4 HT_NB_CPU_CAD_H7 4 HT_NB_CPU_CAD_L7 4

HT_NB_CPU_CAD_H8 4 HT_NB_CPU_CAD_L8 4 HT_NB_CPU_CAD_H9 4 HT_NB_CPU_CAD_L9 4 HT_NB_CPU_CAD_H10 4 HT_NB_CPU_CAD_L10 4 HT_NB_CPU_CAD_H11 4 HT_NB_CPU_CAD_L11 4 HT_NB_CPU_CAD_H12 4 HT_NB_CPU_CAD_L12 4 HT_NB_CPU_CAD_H13 4 HT_NB_CPU_CAD_L13 4 HT_NB_CPU_CAD_H14 4 HT_NB_CPU_CAD_L14 4 HT_NB_CPU_CAD_H15 4 HT_NB_CPU_CAD_L15 4

HT_NB_CPU_CLK_H0 4 HT_NB_CPU_CLK_L0 4 HT_NB_CPU_CLK_H1 4 HT_NB_CPU_CLK_L1 4

HT_NB_CPU_CTL_H0 4 HT_NB_CPU_CTL_L0 4 HT_NB_CPU_CTL_H1 4 HT_NB_CPU_CTL_L1 4

1 2

Placement: close RS780

C717 SCD1U10V2KX-4GP

1 2

C718 SCD1U10V2KX-4GP

1 2

C716 SCD1U10V2KX-4GP

1 2

C711 SCD1U10V2KX-4GP

1 2

C709 SCD1U10V2KX-4GP

1 2

C712 SCD1U10V2KX-4GP

1 2

C705 SCD1U10V2KX-4GP

1 2

C708 SCD1U10V2KX-4GP

1 2

C706 SCD1U10V2KX-4GP

1 2

C702 SCD1U10V2KX-4GP

1 2

C296 SCD1U10V2KX-4GP

1 2

C288 SCD1U10V2KX-4GP

1 2

C700 SCD1U10V2KX-4GP

1 2

C698 SCD1U10V2KX-4GP

1 2

C266 SCD1U10V2KX-4GP

1 2

C278 SCD1U10V2KX-4GP

1 2

C695 SCD1U10V2KX-4GP

1 2

C697 SCD1U10V2KX-4GP

1 2

C693 SCD1U10V2KX-4GP

1 2

C691 SCD1U10V2KX-4GP

1 2

C242 SCD1U10V2KX-4GP

1 2

C253 SCD1U10V2KX-4GP

1 2

C687 SCD1U10V2KX-4GP

1 2

C690 SCD1U10V2KX-4GP

1 2

C688 SCD1U10V2KX-4GP

1 2

C685 SCD1U10V2KX-4GP

1 2

C220 SCD1U10V2KX-4GP

1 2

C219 SCD1U10V2KX-4GP

1 2

C681 SCD1U10V2KX-4GP

1 2

C683 SCD1U10V2KX-4GP

1 2

C677 SCD1U10V2KX-4GP

1 2

C679 SCD1U10V2KX-4GP

1 2

C663 SCD1U10V2KX-4GPC663 SCD1U10V2KX-4GP

1 2

C660 SCD1U10V2KX-4GPC660 SCD1U10V2KX-4GP

1 2

C666 SCD1U10V2KX-4GPC666 SCD1U10V2KX-4GP

1 2

C664 SCD1U10V2KX-4GPC664 SCD1U10V2KX-4GP

1 2

C673 SCD1U10V2KX-4GPC673 SCD1U10V2KX-4GP

1 2

C670 SCD1U10V2KX-4GPC670 SCD1U10V2KX-4GP

1 2

C672 SCD1U10V2KX-4GPC672 SCD1U10V2KX-4GP

1 2

C675 SCD1U10V2KX-4GPC675 SCD1U10V2KX-4GP

1 2

C182 SCD1U10V2KX-4GPC182 SCD1U10V2KX-4GP

1 2

C193 SCD1U10V2KX-4GPC193 SCD1U10V2KX-4GP

1 2

C135 SCD1U10V2KX-4GPC135 SCD1U10V2KX-4GP

1 2

C142 SCD1U10V2KX-4GPC142 SCD1U10V2KX-4GP

1 2

C659 SCD1U10V2KX-4GPC659 SCD1U10V2KX-4GP

1 2

C655 SCD1U10V2KX-4GPC655 SCD1U10V2KX-4GP

1 2

C155 SCD1U10V2KX-4GPC155 SCD1U10V2KX-4GP

1 2

C150 SCD1U10V2KX-4GPC150 SCD1U10V2KX-4GP

1 2

C661 SCD1U10V2KX-4GPC661 SCD1U10V2KX-4GP

1 2

C656 SCD1U10V2KX-4GPC656 SCD1U10V2KX-4GP

1 2

R126 1K27R2F-L-GPR126 1K27R2F-L-GP

1 2

R130 2KR2F-3-GPR130 2KR2F-3-GP

VGA

VGA VGA

VGA

R449

R449 301R2F-GP

301R2F-GP

SB-EC13

Placement: close RS780

PCIE_NB_MXM_TX15P 49 PCIE_NB_MXM_TX15N 49 PCIE_NB_MXM_TX14P 49 PCIE_NB_MXM_TX14N 49 PCIE_NB_MXM_TX13P 49 PCIE_NB_MXM_TX13N 49 PCIE_NB_MXM_TX12P 49 PCIE_NB_MXM_TX12N 49 PCIE_NB_MXM_TX11P 49 PCIE_NB_MXM_TX11N 49 PCIE_NB_MXM_TX10P 49 PCIE_NB_MXM_TX10N 49 PCIE_NB_MXM_TX9P 49 PCIE_NB_MXM_TX9N 49 PCIE_NB_MXM_TX8P 49 PCIE_NB_MXM_TX8N 49 PCIE_NB_MXM_TX7P 49 PCIE_NB_MXM_TX7N 49 PCIE_NB_MXM_TX6P 49 PCIE_NB_MXM_TX6N 49 PCIE_NB_MXM_TX5P 49 PCIE_NB_MXM_TX5N 49 PCIE_NB_MXM_TX4P 49 PCIE_NB_MXM_TX4N 49 PCIE_NB_MXM_TX3P 49 PCIE_NB_MXM_TX3N 49 PCIE_NB_MXM_TX2P 49 PCIE_NB_MXM_TX2N 49 PCIE_NB_MXM_TX1P 49 PCIE_NB_MXM_TX1N 49 PCIE_NB_MXM_TX0P 49 PCIE_NB_MXM_TX0N 49

PCIE_NBTX_C_NEWRX_P0 24 PCIE_NBTX_C_NEWRX_N0 24 PCIE_NBTX_C_WLANRX_P1 24 PCIE_NBTX_C_WLANRX_N1 24 PCIE_NBTX_C_LANRX_P2 25 PCIE_NBTX_C_LANRX_N2 25 PCIE_NBTX_C_CARDRX_P3 28 PCIE_NBTX_C_CARDRX_N3 28 PCIE_NBTX_C_TVRX_P1 24 PCIE_NBTX_C_TVRX_N1 24

ALINK_NBTX_C_SBRX_P0 18 ALINK_NBTX_C_SBRX_N0 18 ALINK_NBTX_C_SBRX_P1 18 ALINK_NBTX_C_SBRX_N1 18 ALINK_NBTX_C_SBRX_P2 18 ALINK_NBTX_C_SBRX_N2 18 ALINK_NBTX_C_SBRX_P3 18 ALINK_NBTX_C_SBRX_N3 18

1D1V_S0

For A-Link reference different moat

1D1V_S0

C941

C940

NEW

C940

SCD1U16V2ZY-2GP

C942

SCD1U16V2ZY-2GP

WLAN LAN

TVTV

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

ATi-RS780M_HT LINK&PCIE(1/4)

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

10 56Tuesday, February 19, 2008

www.kythuatvitinh.com

SSID = N.B

1 2

LDT_RST#_CPU6

D D

1D8V_S0

R475

R475 300R2J-4-GP

300R2J-4-GP

1 2

NB_PWRGD

LDT_STP#_CPU6

C C

CPU_LDT_REQ#6

ALLOW_LDTSTOP18

1D8V_S0

L12

B B

1 2

BLM15AG221SN-GP

SC2D2U6D3V3KX-GP

1D8V_S0

L21

1 2

BLM18BB221SN1D-GP

SC2D2U6D3V3KX-GP

PLTRST#18,27,35,38

close NB within 1000 mil

R182

1 2

0R2J-2-GP

15mil width

+1.8V_VDDA18HTPLL

C229

15mil width

+1.8V_VDDA18PCIEPLL

C308

R464 0R2J-2-GP

1 2

R474 0R2J-2-GPR474 0R2J-2-GP

3D3V_S0

R463

NB_CRT_GREEN14

4K7R2F-GP

R459

1 2

0R2J-2-GP

R173

1 2

0R2J-2-GP

NB_LDT_STOP#

1D8V_S0

R175

R175 4K7R2F-GP

4K7R2F-GP

NB_ALLOW_LDTSTOP

1D8V_S0

4K7R2F-GP

L18

1 2

BLM15AG221SN-GP

SC2D2U6D3V3KX-GP

ENABLE External CLK GEN

C239

C239 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

STRP_DATA 01 VCC_NB

C312

C312 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SYSREST#

NB_CRT_RED14

NB_CRT_BLUE14

Close to NB ball

1 2

SC2D2U6D3V3KX-GP

+1.8V_RUN_PLVDD18

C268

NB_LCD_DDCLK15

GPIO MODE

NB_LCD_DDCDAT15

1.0V 1.1V

1D8V_S0

L22

1 2

BLM18BB221SN1D-GP

SC2D2U6D3V3KX-GP

1 2

R146 140R2F-GPR146 140R2F-GP

R160 150R2F-1-GPR160 150R2F-1-GP

1 2

R158 150R2F-1-GPR158 150R2F-1-GP

1 2

+1.1V_RUN_PLLVDD1D1V_S0

L65

L65 BLM15AG221SN-GP

BLM15AG221SN-GP

C714

C279

C279 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D1V_S0

1 2

3D3V_S0

L20

1 2

BLM18PG330SN1D-GP

33ohm 3A

1D8V_S0

1 2

0R3-0-U-GP

+1.8V_RUN_AVDDQ

C334

NB_CRT_HSYNC16 NB_CRT_VSYNC16

NB_CRT_DDCCLK16

NB_CRT_DDCDATA16

1KR2F-3-GP

1KR2F-3-GP R154

R154

1 2

R155

1KR2F-3-GP

DP_AUX0N18

3D3V_S0

R161

NB_PWRGD38

CLK_NBHT_CLK3 CLK_NBHT_CLK#3

+3.3V_RUN_AVDD

1 2

R456 0R2J-2-GP

VGA

1 2

10KR2J-3-GP

C325

C325 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

+1.8V_RUN_AVDDDI

C269

SCD1U10V2KX-4GP

1 2

R157 715R2F-GPR157 715R2F-GP

+1.8V_VDDA18HTPLL

+1.8V_VDDA18PCIEPLL

SYSREST# NB_LDT_STOP#

NB_ALLOW_LDTSTOP

CLK_NB_14M3

CLK_NB_GFX3 CLK_NB_GFX#3

CLK_NBGPP_CLK3 CLK_NBGPP_CLK#3

CLK_NB_GPPSB3 CLK_NB_GPPSB#3

R451

TP16TP16

R452

1 2

150R2F-1-GP

C307

SC2D2U6D3V3KX-GP

DAC_RSET

NB_REFCLK_N

DP_AUX0N_R

STRP_DATA

RS780_AUX_CAL

F12

E12

F14 G15 H15 H14

E17

F17

F15 G18

G17 E18

F18 E19

F19 A11

B11

E8 G14 A12

D14 B12

H17

D8 A10 C10 C12

C25 C24

E11

F11

T2 T1

V4 V3

B9 A9 B8 A8 B7

A7 B10 G11

3D3V_S0

R453

3KR2F-GP

R458

3KR2F-GP

U65C

AVDD1 AVDD2 AVDDDI AVSSDI AVDDQ AVSSQ

C_Pr Y COMP_Pb

RED REDb GREEN GREENb BLUE BLUEb

DAC_HSYNC DAC_VSYNC DAC_SCL DAC_SDA

DAC_RSET PLLVDD

PLLVDD18 PLLVSS

VDDA18HTPLL VDDA18PCIEPLL1

VDDA18PCIEPLL2 SYSRESET#

POWERGOOD LDTSTOP# ALLOW_LDTSTOP

HT_REFCLKP HT_REFCLKN

REFCLK_P/OSCIN REFCLK_N

GFX_REFCLKP GFX_REFCLKN

GPP_REFCLKP GPP_REFCLKN

GPPSB_REFCLKP GPPSB_REFCLKN

I2C_CLK I2C_DATA DDC_CLK0/AUX0P DDC_DATA0/AUX0N DDC_CLK1/AUX1P DDC_DATA1/AUX1N

STRP_DATA RESERVED AUX_CAL

RS780M-GP-U1

SB-EC-81

R455

R455 3KR2F-GP

3KR2F-GP

1 2

NB_CRT_VSYNC NB_CRT_HSYNC

R457

R457 3KR2F-GP

3KR2F-GP

PART 3 OF 6

CRT/TVOUT

LVTM

CLOCKs PLL PWR

MIS.

DDC_DATA0/AUX0N DDC_CLK0/AUX0P

STRAP_DEBUG_BUS_GPIO_ENABLE

Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC) 0 : Enable 1 : Disable

RS780: Enables Side port memory ( RS780 use HSYNC)

0 : Enable 1 : Disable

SUS_STAT#

Selects Loading of STRAPS From EEPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values

0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P

TXOUT_L3N TXOUT_U0P

TXOUT_U0N

TXOUT_U1P

TXOUT_U1N

TXOUT_U2P

TXOUT_U2N

TXOUT_U3P

TXOUT_U3N

TXCLK_LP TXCLK_LN TXCLK_UP TXCLK_UN

VDDLTP18

VSSLTP18

VDDLT18_1 VDDLT18_2 VDDLT33_1 VDDLT33_2

VSSLT1 VSSLT2 VSSLT3 VSSLT4 VSSLT5 VSSLT6 VSSLT7

LVDS_DIGON

LVDS_BLON

LVDS_ENA_BL

TMDS_HPD

SUS_STAT#

THERMALDIODE_P

THERMALDIODE_N

TESTMODE

HPD

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

LVDS_ENA_BL

SUS_STAT#_R

TESTMODE_NBNB_RESERVED

NB_TXACLK+ 14 NB_TXACLK- 14 NB_TXBCLK+ 14 NB_TXBCLK- 14

+1.8V_RUN_VDDLP18

+1.8V_RUN_VDDLT18

SC4D7U6D3V3KX-GP

R174 0R2J-2-GPR174 0R2J-2-GP

1 2

pull up form SB

R454

R454 1K8R2F-GP

1K8R2F-GP

NB_TXAOUT0+ 14 NB_TXAOUT0- 14 NB_TXAOUT1+ 14 NB_TXAOUT1- 14 NB_TXAOUT2+ 14 NB_TXAOUT2- 14

NB_TXBOUT0+ 14 NB_TXBOUT0- 14 NB_TXBOUT1+ 14 NB_TXBOUT1- 14 NB_TXBOUT2+ 14 NB_TXBOUT2- 14

C719

C713

C719

SC2D2U6D3V3KX-GP

SB-EC6

R164 1K27R2F-L-GP

1 2

R165 1K27R2F-L-GP

1 2

R156 100KR2J-1-GP

1 2

BLM15AG221SN-GP

1 2

BLM15AG221SN-GP

C721

C721 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

NB_LVDS_DIGON 15

PANEL_BKEN 35

NB_HDMI_HPD 17

SUS_STAT# 19

1D8V_S0

L64

L66

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

ATi-RS780M_LVDS&CRT_(2/4)

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

11 56Tuesday, February 19, 2008

www.kythuatvitinh.com

SSID = N.B

SCD1U10V2KX-4GP

C622

R131

R131 100R2F-L1-GP-U

100R2F-L1-GP-U

+1.8V_MEM_VDDQ

SCD1U10V2KX-4GP

C82

C618

U17

BA0

BA1

A12

A11

A10/AP

CKE

RAS

CAS

LDM

UDM

ODT

LDQS

UDQS

VREF

NC#A2

NC#E2

NC#L1

NC#R3

NC#R7

NC#R8

HYB18T512161B2F-25-GP

72.18512.M0U

D D

C C

B B

A A

1D8V_S0

SB-EC-78

C78

SCD1U10V2KX-4GP

C76

SCD1U10V2KX-4GP

1 2

BLM21PG221SN-1GP

ATI DY

MEM_CLKN MEM_CLKP

+1.8V_MEM_VDDQ

220 ohm @ 100MHz,2A

MEM_BA0 MEM_BA1

MEM_A12 MEM_A11 MEM_A10 MEM_A9 MEM_A8 MEM_A7 MEM_A6 MEM_A5 MEM_A4 MEM_A3 MEM_A2 MEM_A1 MEM_A0

1 2

CKE

CS# WE# RAS# CAS# MEM_DM0

MEM_DM1

ODT

MEM_DQS0P MEM_DQS0N

R84

MEM_DQS1P

1KR2F-3-GP

MEM_DQS1N

MEM_VREF_CHIP

R76

MEM_BA2

1KR2F-3-GP

SC22U6D3V5MX-2GP

SC1U6D3V2KX-GP

C617

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

C619

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

MEM_DQ15 MEM_DQ14 MEM_DQ13 MEM_DQ12 MEM_DQ11 MEM_DQ10

MEM_DQ9 MEM_DQ8 MEM_DQ7 MEM_DQ6 MEM_DQ5 MEM_DQ4 MEM_DQ3 MEM_DQ2 MEM_DQ1 MEM_DQ0

VDDL_VRAM

+1.8V_MEM_VDDQ

L3 BLM18AG601SN-3GP

BLM18AG601SN-3GP

600 ohm @ 100MHz,200mA

Layout Note: 50 mil for VSSDL

C77

SC1U6D3V3KX-1GP

Main source: 72.55162.00U(HYNIX) 2'nd source : 72.18512.M0U(Qimonda)

TP14TP14

40D2R2F-GP

40D2R2F-GP R120

R120

1 2 1 2

R411

40D2R2F-GP

3'rd source : 72.45116.A0U(Samsung)

U65D

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9

MEM_A11 MEM_A12 MEM_A13

MEM_BA0 MEM_BA1 MEM_BA2 MEM_DQS0P

RAS# CAS# WE# CS# CKE ODT

MEM_CLKN

MEM_COMPP MEM_COMPN

AB12 AE16

AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

AD16 AE17 AD17

W12

AD18 AB13 AB18

W14

AE12 AD12

V11

Y14

Y12

V14 V15

U65D

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CKP MEM_CKN

MEM_COMPP MEM_COMPN

RS780M-GP-U1

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC MEM_DQ1/DVO_HSYNC

MEM_DQ10/DVO_D6 MEM_DQ11/DVO_D7

MEM_DQ13/DVO_D9 MEM_DQ14/DVO_D10 MEM_DQ15/DVO_D11

MEM_DQS0P/DVO_IDCKP MEM_DQS0N/DVO_IDCKN

SBD_MEM/DVO_I/F

MEM_DQ2/DVO_DE MEM_DQ3/DVO_D0

MEM_DQ4 MEM_DQ5/DVO_D1 MEM_DQ6/DVO_D2 MEM_DQ7/DVO_D4 MEM_DQ8/DVO_D3 MEM_DQ9/DVO_D5

MEM_DQ12

MEM_DQS1P

MEM_DQS1N

MEM_DM0

MEM_DM1/DVO_D8

IOPLLVDD18

IOPLLVDD

IOPLLVSS

MEM_VREF

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8

MEM_DQ9 MEM_DQ10MEM_A10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15

MEM_DQS0N

MEM_DQS1P

MEM_DQS1N

MEM_DM0

MEM_DM1

+1.8V_IOPLLVDD18

+1.1V_IOPLLVDDMEM_CLKP

MEM_VREF_NB

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions

L57

1 2

SCD1U10V2KX-4GP

12 56Tuesday, February 19, 2008

1D8V_S0

1D1V_S0

C634

C633

L58

15mil width

1 2

BLM15AG221SN-GP

C631

C631 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

L58

15mil width

BLM15AG221SN-GP

SC2D2U6D3V3KX-GP

ATi-RS780M_SidePort_(3/4)

X17 SA

BLM15AG221SN-GP

C629

C636

SCD1U10V2KX-4GP

+1.8V_MEM_VDDQ

R410

1KR2F-3-GP

R409

1KR2F-3-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

www.kythuatvitinh.com

SSID = N.B

D D

1D1V_S0

L15

1 2

BLM21PG221SN-1GP

220 ohm @ 100MHz,2A

1D1V_S0

L68

1 2

BLM21PG221SN-1GP

220 ohm @ 100MHz,2A

C C

FOR version A12

1D2V_S0

L61

1 2

BLM21PG221SN-1GP

220 ohm @ 100MHz,2A

1D8V_S0

L56

1 2

BLM21PG221SN-1GP

220 ohm @ 100MHz,2A

B B

1D8V_S0

SC1U6D3V2KX-GP

C328

SC4D7U6D3V3KX-GP

C178

SC4D7U6D3V3KX-GP

C630

15mil width

1D8V_S0

0.6A per ANT Rev1.1, Page3

+1.1V_RUN_VDDHT

SCD1U10V2KX-4GP

C206

C207

+1.1V_RUN_VDDHTRX

SCD1U10V2KX-4GP

C736

+1.2V_RUN_VDDHTTX

SCD1U10V2KX-4GP

C186

+1.8V_RUN_VDDA18PCIE

SCD1U10V2KX-4GP

C179

1 2

R123

R123 0R3-0-U-GP

0R3-0-U-GP

C207

SCD1U10V2KX-4GP

C637

+1.8V_RUN_VDD18_MEM

C231

0.45A per ANT Rev1.1, Page3

SC4D7U6D3V3KX-GP

C741

SCD1U10V2KX-4GP

C171

20mil width

SC4D7U6D3V3KX-GP

C628

15mil width

SCD1U10V2KX-4GP

C737

C643

U65E

AE25 AD24 AC23 AB22 AA21

W19

AE11 AD11

K16 M16

P16 R16 T16

H18 G19 F20 E21 D22 B23 A23

Y20 V18

U17 T17 R17 P17 M17

P10 K10 M10

T10 R10

AA9 AB9 AD9 AE9 U10

J17 L16

J10

L10

W9 H9

U65E

VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2

RS780M-GP-U1

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13

POWER

VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6

VDD33_1 VDD33_2

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

+1.1V_RUN_VDDPCIE

SCD1U10V2KX-4GP

C238

7A per ANT Rev1.1, Page3 Per check list (Rev 0.02) RS780M: 1V ~ 1.1V, check PWR team

SCD1U10V2KX-4GP

C212

C733

15mil width

+3.3V_RUN_VDD33

SCD1U10V2KX-4GP

C233

C209

SCD1U10V2KX-4GP

C738

SCD1U10V2KX-4GP

C197

SCD1U10V2KX-4GP

C191

C642

SC1U6D3V2KX-GP

C141

0.7A per ANT Rev1.1, Page3

C203

C731

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

C227

100mil Width

C715

SCD1U10V2KX-4GP

15mil width

SCD1U10V2KX-4GP

C243

SCD1U10V2KX-4GP

C127

1 2

R147

R147 0R3-0-U-GP

0R3-0-U-GP

C113

SC1U6D3V2KX-GP

C720

C734

SCD1U10V2KX-4GP

3D3V_S0

SC4D7U6D3V3KX-GP

C724

1 2

BLM21PG221SN-1GP

220 ohm @ 100MHz, 2A

SCD1U10V2KX-4GP

C251

C117

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

C732

+1.8V_RUN_MEM

SC4D7U6D3V3KX-GP

C122

C235

BLM21PG221SN-1GP

C125

1D1V_S0

L67

1D1V_S0

SC10U6D3V5KX-1GP

C208

1D8V_S0

1 2

220 ohm @ 100MHz, 2A

M20 N22

R19 R22 R24 R25 H20 U22

W22 W24 W25

AD25

M14 N13

R11 R14

U14 U11 U15

W11

W15 AC12 AA14

AB11 AB15 AB17 AB19 AE20 AB21

A25 D23 E22 G22 G24 G25 H19 J22 L17 L22 L24 L25

P20

V19

Y21

L12

P12 P15

T12

V12

Y18

K11

U65F

VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34

RS780M-GP-U1

PART 6/6

GROUND

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

ATi-RS780M_PWR&GD_(4/4)

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

13 56Friday, February 15, 2008

www.kythuatvitinh.com

1D8V_S0

VGA

D D

TXACLK-15 TXACLK+15 TXAOUT0-15 TXAOUT0+15 TXAOUT1-15 TXAOUT1+15 TXAOUT2-15 TXAOUT2+15

R64

PE_GPIO2 GPIO_SEL_R

C C

R64

10KR2J-3-GP

VGA

R61

R61 10KR2J-3-GP

10KR2J-3-GP

VGA

1 2

SB-EC-67

B B

TXBCLK-15 TXBCLK+15 TXBOUT0-15 TXBOUT0+15 TXBOUT1-15 TXBOUT1+15 TXBOUT2-15 TXBOUT2+15

GPIO_SEL_R

2 3 6

7 11 12 15 16

A0 A1 A2 A3 A4 A5 A6 A7

SEL

U16

U10

SEL

71.02412.003

VDD

GND

VDD

GND

VDD

GND

VDD

GND

VDD

GND

VDD

B1_0 B1_1 B1_2 B1_3 B1_4 B1_5 B1_6 B1_7

B2_0 B2_1 B2_2 B2_3 B2_4 B2_5 B2_6 B2_7

GND

PI2PCIE412-DZHE-GP

VDD

B1_0 B1_1 B1_2 B1_3 B1_4 B1_5 B1_6 B1_7

B2_0 B2_1 B2_2 B2_3 B2_4 B2_5 B2_6 B2_7

GND

PI2PCIE412-DZHE-GP

VGA

38 37 36 35 29 28 27 26

34 33 32 31 25 24 23 22

38 37 36 35 29 28 27 26

34 33 32 31 25 24 23 22

C80

VGA

SCD1U10V2KX-4GP

GPU_TXBCLK- 50 GPU_TXBCLK+ 50 GPU_TXBOUT0- 50 GPU_TXBOUT0+ 50 GPU_TXBOUT1- 50 GPU_TXBOUT1+ 50 GPU_TXBOUT2- 50 GPU_TXBOUT2+ 50

NB_TXBCLK- 11 NB_TXBCLK+ 11 NB_TXBOUT0- 11 NB_TXBOUT0+ 11 NB_TXBOUT1- 11 NB_TXBOUT1+ 11 NB_TXBOUT2- 11 NB_TXBOUT2+ 11

C74

VGA

SCD1U10V2KX-4GP

NB_TXACLK- 11 NB_TXACLK+ 11 NB_TXAOUT0- 11 NB_TXAOUT0+ 11 NB_TXAOUT1- 11 NB_TXAOUT1+ 11 NB_TXAOUT2- 11 NB_TXAOUT2+ 11

GPU_TXACLK- 50 GPU_TXACLK+ 50 GPU_TXAOUT0- 50 GPU_TXAOUT0+ 50 GPU_TXAOUT1- 50 GPU_TXAOUT1+ 50 GPU_TXAOUT2- 50 GPU_TXAOUT2+ 50

SB-EC-67

1D8V_S0

C84

VGA

SCD1U10V2KX-4GP

C56

C71

C56

VGA

PE_GPIO2

NB_CRT_RED11 GPU_CRT_RED50

CRT_RED16

NB_CRT_GREEN11

SCD1U10V2KX-4GP

C89

SCD1U10V2KX-4GP

PX_EN18

GPU_CRT_GREEN50

CRT_GREEN16

R100

VGA

1 2

0R2J-2-GP

3D3V_S0

S D

U18

S1A

S2A

S1B

S2B

DB GND8DC

PI5V330SQE-GP

VGA

R89

R89 10KR2J-3-GP

10KR2J-3-GP

VGA

Q8 2N7002-11-GP

2N7002-11-GP

VGA

5V_S0

VCC

EN#

S1D

S2D

S1C

S2C

PE_GPIO2 16

GPIO SEL :

VGA

C101 SCD1U10V2KX-4GP

1 2

NB_CRT_BLUE 11

GPU_CRT_BLUE 50 CRT_BLUE 16

H : SELECTION EXTERNAL GRAPHIC

PE_GPIO2_NB18

L : SELECTION INTERNAL GRAPHIC

A A

71.02412.003

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

CRT / LVDS MUX

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

14 56Tuesday, February 19, 2008

www.kythuatvitinh.com

3D3V_S0

R75

R75 4K7R2F-GP

4K7R2F-GP

R74 0R2J-2-GPR74 0R2J-2-GP

3.3V_DELAY

VGA

2N7002-11-GP

VGA

3D3V_S0

3.3V_DELAY

VGA

1 2

R72

R72 4K7R2F-GP

4K7R2F-GP

S D

R83

R83 4K7R2F-GP

4K7R2F-GP

R77 0R2J-2-GPR77 0R2J-2-GP

1 2

R82

R82 4K7R2F-GP

4K7R2F-GP

S D

ID_CLKID_CLKID_CLKID_CLKID_CLKID_CLK

ID_DAT

NB_LCD_DDCLK11

D D

GPU_EDID_CLK50

NB_LCD_DDCDAT11

C C

2N7002-11-GP

GPU_EDID_DATA50

2N7002-11-GP

CAMERA POWER

5V_S0

B B

SCD1U16V2ZY-2GP

C69

IN#5

IN#6

IN#7 IN#88OUT

GND

G5281RC1U-GP

74.05281.093

GND

IN#1

4 3

2 1

R59

R59 100KR2J-1-GP

100KR2J-1-GP

D_MIC_CLKOUT31

DMIC_DATAIN31

CAMERA_EN 35

C67

C67 SC1U10V2KX-1GP

SC1U10V2KX-1GP

5V_CAM_S0

LCD CONNECTOR

DCBATOUT

5V_CAM_S0

SCD1U16V2ZY-2GP

1 2

R68

EC6

10R2J-2-GP

SC100P50V2JN-3GP

R68

EC6

MLVG0402220NV09BP-GP

EL2

EL1

1 2

C65

BLON_OUT35

D_MIC_CLKOUT D_MIC_DATAIN

C57

SC10U25V6KX-1GP

R85

10KR2F-2-GP

LCDVDD_S0

SC10U10V5KX-2GP

3D3V_S0

BRIGHTNESS36 ARRAY_DETC31

USBP3-19 USBP3+19

EC7

SCD1U16V2ZY-2GP

C87

TOP VIEW

C62

C62 SCD1U25V3KX-GP

SCD1U25V3KX-GP

D_MIC_CLKOUT D_MIC_DATAIN ID_CLK ID_DAT CAMERA_EN

C88

C88 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

LCD1

42 20 19 18 17 16 15 14 13 12 11 10

8 7

6 5

4 3

2 1

ACES-CONN40C-1-GP-U2

20.F1047.040

TXACLK- 14 TXACLK+ 14

TXAOUT0- 14 TXAOUT0+ 14 TXAOUT1- 14 TXAOUT1+ 14 TXAOUT2- 14 TXAOUT2+ 14

TXBCLK- 14 TXBCLK+ 14

TXBOUT0- 14 TXBOUT0+ 14 TXBOUT1- 14 TXBOUT1+ 14 TXBOUT2- 14 TXBOUT2+ 14

LCDVDD_S0

C81

C81 SC1U10V2KX-1GP

U13

3D3V_S0

SCD1U16V2ZY-2GP

A A

C83

IN#5

IN#6

IN#7 IN#88OUT

GND

G5281RC1U-GP

74.05281.093

GND

IN#1

4 3

2 1

SC1U10V2KX-1GP

LCDVDD_ON

100KR2J-1-GP

U12

R81

CH715FPT-GP

NB_LVDS_DIGON 11

GPU_LCDVDD_ON 50

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

LCD CONN/CAMERA

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

15 56Tuesday, February 19, 2008

www.kythuatvitinh.com

CRT I/F & CONNECTOR

D D

CN2

Layout Note: Place these resistors close to the CRT-out connector

L44

EC40

SC10P50V2JN-4GP

1 2

MLB-201209-24-GP

L46

1 2

MLB-201209-24-GP

L45

1 2

MLB-201209-24-GP

EC38

SC10P50V2JN-4GP

CRT_RED14

CRT_GREEN14

CRT_BLUE14

R296

140R2F-GP

C C

1 2

R304

R297

150R2F-1-GP

EC39

SC10P50V2JN-4GP

CRT_R

CRT_G

CRT_B

EC35

SC10P50V2JN-4GP

SB-EC15

1 2

5V_S0

FUSE-1D1A6V-4GP-U

EC36

EC37

SC10P50V2JN-4GP

PE_GPIO214

PE_GPIO2

3D3V_S0

VGA

CRT_FUSE

R318

R318 20KR2F-L-GP

20KR2F-L-GP

Q20

Q20 2N7002-11-GP

2N7002-11-GP

VGA

S D

RB751V-40-2-GP

PE_GPIO2#

VGA

D24

VGA

5V_CRT_S0

C549

SCD01U50V2ZY-1GP

CRT_G JVGA_HS

CRT_DDCCLK

NP1

9 4

NP2

Hsync & Vsync level shift

VSYNC_5 HSYNC_5

5V_S0

C554

C554 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2 3 1

RN23

SRN33J-5-GP-U

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

3.3V_DELAY

3D3V_S0

4K7R2J-2-GP

B B

NB_CRT_DDCCLK11

GPU_CRT_DDCCLK50

3D3V_S0

4K7R2J-2-GP

A A

NB_CRT_DDCDATA11

GPU_CRT_DDCDATA50

4K7R2J-2-GP

R298

R310

VGA

Q14

2N7002-11-GP

3.3V_DELAY

4K7R2J-2-GP

R311

R294

VGA

Q16

2N7002-11-GP

VGA

S D

2N7002-11-GP

S D

VGA

2N7002-11-GP

Q15

Q17

VGA

S D

VGA

5V_CRT_S0

4K7R2J-2-GP

CRT_DDCCLK

5V_CRT_S0

4K7R2J-2-GP

CRT_DDCDATA

R292

VGA

R293

VGA

PE_GPIO214

PE_GPIO2#

NB_CRT_VSYNC11

GPU_CRT_VSYNC50

5V_S0

PE_GPIO2PE_GPIO2

PE_GPIO2#

NB_CRT_HSYNC11

GPU_CRT_HSYNC50

5 6

VGA

12 11

VGA

2 3

U46B

SSAHCT125PWR-GP

9 8

U46D

SSAHCT125PWR-GP

U46A

U46A SSAHCT125PWR-GP

SSAHCT125PWR-GP

U46C

U46C SSAHCT125PWR-GP

SSAHCT125PWR-GP

16 6 1

12 8 3 14 10 5 17

VIDEO-15-84-GP-U

VGA

20.20735.015

JVGA_VS

JVGA_HS

CRT CONN

CRT_R

CRT_DDCDATA

CRT_B JVGA_VS

5V_CRT_S0

CRT_R

CRT_G

CRT_B

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

BAV99-5-GP

16 56Tuesday, February 19, 2008

www.kythuatvitinh.com

EMI

D D

C C

HDMI_TXD250

HDMI_TXD2#50

HDMI_TXD050

HDMI_TXD0#50

1 2

L43

FILTER-79-GP

1 2

L41

FILTER-79-GP

1 2

0R2J-2-GP

0R2J-2-GP R291

R291

0R2J-2-GP

0R2J-2-GP R290

R290

0R2J-2-GP

0R2J-2-GP R287

R287

0R2J-2-GP

0R2J-2-GP R286

R286

HDMI_TXD2_1

HDMI_TXD2#_1

HDMI_TXD0_1

HDMI_TXD0#_1

HDMI_TXD150

HDMI_TXD1#50

HDMI_CLK50

HDMI_CLK#50

1 2

L42

FILTER-79-GP

1 2

L40

FILTER-79-GP

1 2

0R2J-2-GP

0R2J-2-GP R289

R289

0R2J-2-GP

0R2J-2-GP R288

R288

0R2J-2-GP

0R2J-2-GP R285

R285

0R2J-2-GP

0R2J-2-GP R284

R284

HDMI_TXD1_1

HDMI_TXD1#_1

HDMI_CLK_1

HDMI_CLK#_1

5V_S0

HDMI1

+5V_POWER

HDMI_TXD0_1HDMI_TXD0_1 HDMI_TXD0#_1HDMI_TXD0#_1 HDMI_CEC HDMI_TXD1_1HDMI_TXD1_1 HDMI_TXD1#_1HDMI_TXD1#_1

HDMI_TXD2_1

HDMI_CLK_1HDMI_CLK_1HDMI_CLK_1 HDMI_CLK#_1HDMI_CLK#_1

TMDS_DATA0+

TMDS_DATA0-

TMDS_DATA1+

TMDS_DATA1-

TMDS_DATA2+

TMDS_DATA2-

TMDS_DATA0_SHIELD

TMDS_DATA1_SHIELD

TMDS_DATA2_SHIELD

TMDS_CLOCK_SHIELD

TMDS_CLOCK+

TMDS_CLOCK-

SKT-HDMI19P-16-GP-U

VGA

SDA

DDC/CEC_GROUNG

HOT_PLUG_DETECT

CEC

RESERVED#14

GND GND GND GND

SCL

15 16

13 17 19

20 21 22 23

HDMI_CLK11 HDMI_DAT11

HDMI_DET_K

HDMI_CNCHDMI_TXD2#_1

TP1TP1

TP2TP2

HDMI_TXD2

3.3V_DELAY 5V_S0 5V_S0

R309

R302

VGA

HDMI_DDCCLK50 HDMI_DDCDATA50

B B

A A

VGA

HDMI_HDP50

NB_HDMI_HPD11

4K7R2J-2-GP

VGA

1 2

R317 0R2J-2-GPR317 0R2J-2-GP

1 2

R316 0R2J-2-GP

3.3V_DELAY

3 4

Q18 2N7002DW-7F-GP

VGA

3.3V_DELAY

R314

R314 22KR2F-GP

22KR2F-GP

HDMI_HDP_R

SB-EC11

CH3904PT-GP

D26

RB751V-40-2-GP

NB_HDMI_HPD_R

VGA

2K2R2J-2-GP

VGA

3.3V_DELAY

Q19

R299

R315

R315 2K2R2F-GP

2K2R2F-GP

1 2

R312

HDMI_CLK11

HDMI_DAT11

HDMI_DET_R

2K2R2J-2-GP

R301

1 2

200KR2F-L-GP

HDMI_TXD2#

HDMI_TXD1

HDMI_TXD1#

HDMI_TXD0

HDMI_TXD0#

HDMI_CLK

HDMI_CLK#

R303

R303 200KR2F-L-GP

200KR2F-L-GP

HDMI_DET_K

SB-EC11

1 2

R1 499R2F-2-GP

VGA

1 2

R2 499R2F-2-GP

VGA

1 2

R3 499R2F-2-GP

VGA

1 2

R4 499R2F-2-GP

VGA

1 2

R5 499R2F-2-GP

VGA

1 2

R6 499R2F-2-GP

VGA

1 2

R7 499R2F-2-GP

VGA

1 2

R8 499R2F-2-GP

VGA

TMDS_PL

2N7002-11-GP

Q13

S D

R283

100KR2J-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

DVI & HDMI CONN

Taipei Hsien 221, Taiwan, R.O.C.

X17 SA

17 56Friday, February 15, 2008

+ 39 hidden pages

Winstron X17 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual